1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 99e90c351SLorenzo Bianconi #define FW_FEATURE_SET_ENCRYPT BIT(0) 109e90c351SLorenzo Bianconi #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 119e90c351SLorenzo Bianconi #define FW_FEATURE_ENCRY_MODE BIT(4) 129e90c351SLorenzo Bianconi #define FW_FEATURE_OVERRIDE_ADDR BIT(5) 139e90c351SLorenzo Bianconi 149e90c351SLorenzo Bianconi #define DL_MODE_ENCRYPT BIT(0) 159e90c351SLorenzo Bianconi #define DL_MODE_KEY_IDX GENMASK(2, 1) 169e90c351SLorenzo Bianconi #define DL_MODE_RESET_SEC_IV BIT(3) 179e90c351SLorenzo Bianconi #define DL_MODE_WORKING_PDA_CR4 BIT(4) 189e90c351SLorenzo Bianconi #define DL_MODE_VALID_RAM_ENTRY BIT(5) 199e90c351SLorenzo Bianconi #define DL_CONFIG_ENCRY_MODE_SEL BIT(6) 209e90c351SLorenzo Bianconi #define DL_MODE_NEED_RSP BIT(31) 219e90c351SLorenzo Bianconi 229e90c351SLorenzo Bianconi #define FW_START_OVERRIDE BIT(0) 239e90c351SLorenzo Bianconi #define FW_START_WORKING_PDA_CR4 BIT(2) 249e90c351SLorenzo Bianconi 259e90c351SLorenzo Bianconi #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) 269e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) 279e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_INFO 0x2 289e90c351SLorenzo Bianconi 2928fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24) 3028fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_PLAIN 0x00 3128fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_AES 0x01 3228fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_SCRAMBLE 0x02 3328fec923SLorenzo Bianconi #define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0) 3428fec923SLorenzo Bianconi #define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0) 3528fec923SLorenzo Bianconi 36*fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_txd { 37*fc6ee71aSLorenzo Bianconi __le32 txd[8]; 38*fc6ee71aSLorenzo Bianconi 39*fc6ee71aSLorenzo Bianconi __le16 len; 40*fc6ee71aSLorenzo Bianconi __le16 pq_id; 41*fc6ee71aSLorenzo Bianconi 42*fc6ee71aSLorenzo Bianconi u8 cid; 43*fc6ee71aSLorenzo Bianconi u8 pkt_type; 44*fc6ee71aSLorenzo Bianconi u8 set_query; /* FW don't care */ 45*fc6ee71aSLorenzo Bianconi u8 seq; 46*fc6ee71aSLorenzo Bianconi 47*fc6ee71aSLorenzo Bianconi u8 uc_d2b0_rev; 48*fc6ee71aSLorenzo Bianconi u8 ext_cid; 49*fc6ee71aSLorenzo Bianconi u8 s2d_index; 50*fc6ee71aSLorenzo Bianconi u8 ext_cid_ack; 51*fc6ee71aSLorenzo Bianconi 52*fc6ee71aSLorenzo Bianconi u32 rsv[5]; 53*fc6ee71aSLorenzo Bianconi } __packed __aligned(4); 54*fc6ee71aSLorenzo Bianconi 55*fc6ee71aSLorenzo Bianconi /** 56*fc6ee71aSLorenzo Bianconi * struct mt76_connac2_mcu_uni_txd - mcu command descriptor for firmware v3 57*fc6ee71aSLorenzo Bianconi * @txd: hardware descriptor 58*fc6ee71aSLorenzo Bianconi * @len: total length not including txd 59*fc6ee71aSLorenzo Bianconi * @cid: command identifier 60*fc6ee71aSLorenzo Bianconi * @pkt_type: must be 0xa0 (cmd packet by long format) 61*fc6ee71aSLorenzo Bianconi * @frag_n: fragment number 62*fc6ee71aSLorenzo Bianconi * @seq: sequence number 63*fc6ee71aSLorenzo Bianconi * @checksum: 0 mean there is no checksum 64*fc6ee71aSLorenzo Bianconi * @s2d_index: index for command source and destination 65*fc6ee71aSLorenzo Bianconi * Definition | value | note 66*fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM 67*fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM 68*fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA 69*fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM 70*fc6ee71aSLorenzo Bianconi * 71*fc6ee71aSLorenzo Bianconi * @option: command option 72*fc6ee71aSLorenzo Bianconi * BIT[0]: UNI_CMD_OPT_BIT_ACK 73*fc6ee71aSLorenzo Bianconi * set to 1 to request a fw reply 74*fc6ee71aSLorenzo Bianconi * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY 75*fc6ee71aSLorenzo Bianconi * is set, mcu firmware will send response event EID = 0x01 76*fc6ee71aSLorenzo Bianconi * (UNI_EVENT_ID_CMD_RESULT) to the host. 77*fc6ee71aSLorenzo Bianconi * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD 78*fc6ee71aSLorenzo Bianconi * 0: original command 79*fc6ee71aSLorenzo Bianconi * 1: unified command 80*fc6ee71aSLorenzo Bianconi * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY 81*fc6ee71aSLorenzo Bianconi * 0: QUERY command 82*fc6ee71aSLorenzo Bianconi * 1: SET command 83*fc6ee71aSLorenzo Bianconi */ 84*fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_uni_txd { 85*fc6ee71aSLorenzo Bianconi __le32 txd[8]; 86*fc6ee71aSLorenzo Bianconi 87*fc6ee71aSLorenzo Bianconi /* DW1 */ 88*fc6ee71aSLorenzo Bianconi __le16 len; 89*fc6ee71aSLorenzo Bianconi __le16 cid; 90*fc6ee71aSLorenzo Bianconi 91*fc6ee71aSLorenzo Bianconi /* DW2 */ 92*fc6ee71aSLorenzo Bianconi u8 rsv; 93*fc6ee71aSLorenzo Bianconi u8 pkt_type; 94*fc6ee71aSLorenzo Bianconi u8 frag_n; 95*fc6ee71aSLorenzo Bianconi u8 seq; 96*fc6ee71aSLorenzo Bianconi 97*fc6ee71aSLorenzo Bianconi /* DW3 */ 98*fc6ee71aSLorenzo Bianconi __le16 checksum; 99*fc6ee71aSLorenzo Bianconi u8 s2d_index; 100*fc6ee71aSLorenzo Bianconi u8 option; 101*fc6ee71aSLorenzo Bianconi 102*fc6ee71aSLorenzo Bianconi /* DW4 */ 103*fc6ee71aSLorenzo Bianconi u8 rsv1[4]; 104*fc6ee71aSLorenzo Bianconi } __packed __aligned(4); 105*fc6ee71aSLorenzo Bianconi 106*fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_rxd { 107*fc6ee71aSLorenzo Bianconi __le32 rxd[6]; 108*fc6ee71aSLorenzo Bianconi 109*fc6ee71aSLorenzo Bianconi __le16 len; 110*fc6ee71aSLorenzo Bianconi __le16 pkt_type_id; 111*fc6ee71aSLorenzo Bianconi 112*fc6ee71aSLorenzo Bianconi u8 eid; 113*fc6ee71aSLorenzo Bianconi u8 seq; 114*fc6ee71aSLorenzo Bianconi u8 rsv[2]; 115*fc6ee71aSLorenzo Bianconi 116*fc6ee71aSLorenzo Bianconi u8 ext_eid; 117*fc6ee71aSLorenzo Bianconi u8 rsv1[2]; 118*fc6ee71aSLorenzo Bianconi u8 s2d_index; 119*fc6ee71aSLorenzo Bianconi }; 120*fc6ee71aSLorenzo Bianconi 1213d8c636cSLorenzo Bianconi struct mt76_connac2_patch_hdr { 1223d8c636cSLorenzo Bianconi char build_date[16]; 1233d8c636cSLorenzo Bianconi char platform[4]; 1243d8c636cSLorenzo Bianconi __be32 hw_sw_ver; 1253d8c636cSLorenzo Bianconi __be32 patch_ver; 1263d8c636cSLorenzo Bianconi __be16 checksum; 1273d8c636cSLorenzo Bianconi u16 rsv; 1283d8c636cSLorenzo Bianconi struct { 1293d8c636cSLorenzo Bianconi __be32 patch_ver; 1303d8c636cSLorenzo Bianconi __be32 subsys; 1313d8c636cSLorenzo Bianconi __be32 feature; 1323d8c636cSLorenzo Bianconi __be32 n_region; 1333d8c636cSLorenzo Bianconi __be32 crc; 1343d8c636cSLorenzo Bianconi u32 rsv[11]; 1353d8c636cSLorenzo Bianconi } desc; 1363d8c636cSLorenzo Bianconi } __packed; 1373d8c636cSLorenzo Bianconi 1383d8c636cSLorenzo Bianconi struct mt76_connac2_patch_sec { 1393d8c636cSLorenzo Bianconi __be32 type; 1403d8c636cSLorenzo Bianconi __be32 offs; 1413d8c636cSLorenzo Bianconi __be32 size; 1423d8c636cSLorenzo Bianconi union { 1433d8c636cSLorenzo Bianconi __be32 spec[13]; 1443d8c636cSLorenzo Bianconi struct { 1453d8c636cSLorenzo Bianconi __be32 addr; 1463d8c636cSLorenzo Bianconi __be32 len; 1473d8c636cSLorenzo Bianconi __be32 sec_key_idx; 1483d8c636cSLorenzo Bianconi __be32 align_len; 1493d8c636cSLorenzo Bianconi u32 rsv[9]; 1503d8c636cSLorenzo Bianconi } info; 1513d8c636cSLorenzo Bianconi }; 1523d8c636cSLorenzo Bianconi } __packed; 1533d8c636cSLorenzo Bianconi 1543d8c636cSLorenzo Bianconi struct mt76_connac2_fw_trailer { 1553d8c636cSLorenzo Bianconi u8 chip_id; 1563d8c636cSLorenzo Bianconi u8 eco_code; 1573d8c636cSLorenzo Bianconi u8 n_region; 1583d8c636cSLorenzo Bianconi u8 format_ver; 1593d8c636cSLorenzo Bianconi u8 format_flag; 1603d8c636cSLorenzo Bianconi u8 rsv[2]; 1613d8c636cSLorenzo Bianconi char fw_ver[10]; 1623d8c636cSLorenzo Bianconi char build_date[15]; 1633d8c636cSLorenzo Bianconi __le32 crc; 1643d8c636cSLorenzo Bianconi } __packed; 1653d8c636cSLorenzo Bianconi 1663d8c636cSLorenzo Bianconi struct mt76_connac2_fw_region { 1673d8c636cSLorenzo Bianconi __le32 decomp_crc; 1683d8c636cSLorenzo Bianconi __le32 decomp_len; 1693d8c636cSLorenzo Bianconi __le32 decomp_blk_sz; 1703d8c636cSLorenzo Bianconi u8 rsv[4]; 1713d8c636cSLorenzo Bianconi __le32 addr; 1723d8c636cSLorenzo Bianconi __le32 len; 1733d8c636cSLorenzo Bianconi u8 feature_set; 1743d8c636cSLorenzo Bianconi u8 rsv1[15]; 1753d8c636cSLorenzo Bianconi } __packed; 1763d8c636cSLorenzo Bianconi 177d0e274afSLorenzo Bianconi struct tlv { 178d0e274afSLorenzo Bianconi __le16 tag; 179d0e274afSLorenzo Bianconi __le16 len; 180d0e274afSLorenzo Bianconi } __packed; 181d0e274afSLorenzo Bianconi 1825562d5f6SLorenzo Bianconi struct bss_info_omac { 1835562d5f6SLorenzo Bianconi __le16 tag; 1845562d5f6SLorenzo Bianconi __le16 len; 1855562d5f6SLorenzo Bianconi u8 hw_bss_idx; 1865562d5f6SLorenzo Bianconi u8 omac_idx; 1875562d5f6SLorenzo Bianconi u8 band_idx; 1885562d5f6SLorenzo Bianconi u8 rsv0; 1895562d5f6SLorenzo Bianconi __le32 conn_type; 1905562d5f6SLorenzo Bianconi u32 rsv1; 1915562d5f6SLorenzo Bianconi } __packed; 1925562d5f6SLorenzo Bianconi 1935562d5f6SLorenzo Bianconi struct bss_info_basic { 1945562d5f6SLorenzo Bianconi __le16 tag; 1955562d5f6SLorenzo Bianconi __le16 len; 1965562d5f6SLorenzo Bianconi __le32 network_type; 1975562d5f6SLorenzo Bianconi u8 active; 1985562d5f6SLorenzo Bianconi u8 rsv0; 1995562d5f6SLorenzo Bianconi __le16 bcn_interval; 2005562d5f6SLorenzo Bianconi u8 bssid[ETH_ALEN]; 2015562d5f6SLorenzo Bianconi u8 wmm_idx; 2025562d5f6SLorenzo Bianconi u8 dtim_period; 2035562d5f6SLorenzo Bianconi u8 bmc_wcid_lo; 2045562d5f6SLorenzo Bianconi u8 cipher; 2055562d5f6SLorenzo Bianconi u8 phy_mode; 2065562d5f6SLorenzo Bianconi u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */ 2075562d5f6SLorenzo Bianconi u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */ 2085562d5f6SLorenzo Bianconi u8 bmc_wcid_hi; /* high Byte and version */ 2095562d5f6SLorenzo Bianconi u8 rsv[2]; 2105562d5f6SLorenzo Bianconi } __packed; 2115562d5f6SLorenzo Bianconi 2125562d5f6SLorenzo Bianconi struct bss_info_rf_ch { 2135562d5f6SLorenzo Bianconi __le16 tag; 2145562d5f6SLorenzo Bianconi __le16 len; 2155562d5f6SLorenzo Bianconi u8 pri_ch; 2165562d5f6SLorenzo Bianconi u8 center_ch0; 2175562d5f6SLorenzo Bianconi u8 center_ch1; 2185562d5f6SLorenzo Bianconi u8 bw; 2195562d5f6SLorenzo Bianconi u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */ 2205562d5f6SLorenzo Bianconi u8 he_all_disable; /* 1: disallow all HETB, 0: allow */ 2215562d5f6SLorenzo Bianconi u8 rsv[2]; 2225562d5f6SLorenzo Bianconi } __packed; 2235562d5f6SLorenzo Bianconi 2245562d5f6SLorenzo Bianconi struct bss_info_ext_bss { 2255562d5f6SLorenzo Bianconi __le16 tag; 2265562d5f6SLorenzo Bianconi __le16 len; 2275562d5f6SLorenzo Bianconi __le32 mbss_tsf_offset; /* in unit of us */ 2285562d5f6SLorenzo Bianconi u8 rsv[8]; 2295562d5f6SLorenzo Bianconi } __packed; 2305562d5f6SLorenzo Bianconi 2315562d5f6SLorenzo Bianconi enum { 2325562d5f6SLorenzo Bianconi BSS_INFO_OMAC, 2335562d5f6SLorenzo Bianconi BSS_INFO_BASIC, 2345562d5f6SLorenzo Bianconi BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 2355562d5f6SLorenzo Bianconi BSS_INFO_PM, /* sta only */ 2365562d5f6SLorenzo Bianconi BSS_INFO_UAPSD, /* sta only */ 2375562d5f6SLorenzo Bianconi BSS_INFO_ROAM_DETECT, /* obsoleted */ 2385562d5f6SLorenzo Bianconi BSS_INFO_LQ_RM, /* obsoleted */ 2395562d5f6SLorenzo Bianconi BSS_INFO_EXT_BSS, 2405562d5f6SLorenzo Bianconi BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */ 2415562d5f6SLorenzo Bianconi BSS_INFO_SYNC_MODE, /* obsoleted */ 2425562d5f6SLorenzo Bianconi BSS_INFO_RA, 2435562d5f6SLorenzo Bianconi BSS_INFO_HW_AMSDU, 2445562d5f6SLorenzo Bianconi BSS_INFO_BSS_COLOR, 2455562d5f6SLorenzo Bianconi BSS_INFO_HE_BASIC, 2465562d5f6SLorenzo Bianconi BSS_INFO_PROTECT_INFO, 2475562d5f6SLorenzo Bianconi BSS_INFO_OFFLOAD, 2485562d5f6SLorenzo Bianconi BSS_INFO_11V_MBSSID, 2495562d5f6SLorenzo Bianconi BSS_INFO_MAX_NUM 2505562d5f6SLorenzo Bianconi }; 2515562d5f6SLorenzo Bianconi 252d0e274afSLorenzo Bianconi /* sta_rec */ 253d0e274afSLorenzo Bianconi 254d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 255d0e274afSLorenzo Bianconi u8 rsv[2]; 256d0e274afSLorenzo Bianconi __le16 tlv_num; 257d0e274afSLorenzo Bianconi } __packed; 258d0e274afSLorenzo Bianconi 259d0e274afSLorenzo Bianconi struct sta_req_hdr { 260d0e274afSLorenzo Bianconi u8 bss_idx; 261d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 262d0e274afSLorenzo Bianconi __le16 tlv_num; 263d0e274afSLorenzo Bianconi u8 is_tlv_append; 264d0e274afSLorenzo Bianconi u8 muar_idx; 265d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 266d0e274afSLorenzo Bianconi u8 rsv; 267d0e274afSLorenzo Bianconi } __packed; 268d0e274afSLorenzo Bianconi 269d0e274afSLorenzo Bianconi struct sta_rec_basic { 270d0e274afSLorenzo Bianconi __le16 tag; 271d0e274afSLorenzo Bianconi __le16 len; 272d0e274afSLorenzo Bianconi __le32 conn_type; 273d0e274afSLorenzo Bianconi u8 conn_state; 274d0e274afSLorenzo Bianconi u8 qos; 275d0e274afSLorenzo Bianconi __le16 aid; 276d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 277d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 278d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 279d0e274afSLorenzo Bianconi __le16 extra_info; 280d0e274afSLorenzo Bianconi } __packed; 281d0e274afSLorenzo Bianconi 282d0e274afSLorenzo Bianconi struct sta_rec_ht { 283d0e274afSLorenzo Bianconi __le16 tag; 284d0e274afSLorenzo Bianconi __le16 len; 285d0e274afSLorenzo Bianconi __le16 ht_cap; 286d0e274afSLorenzo Bianconi u16 rsv; 287d0e274afSLorenzo Bianconi } __packed; 288d0e274afSLorenzo Bianconi 289d0e274afSLorenzo Bianconi struct sta_rec_vht { 290d0e274afSLorenzo Bianconi __le16 tag; 291d0e274afSLorenzo Bianconi __le16 len; 292d0e274afSLorenzo Bianconi __le32 vht_cap; 293d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 294d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 2955562d5f6SLorenzo Bianconi /* mt7915 - mt7921 */ 296d0e274afSLorenzo Bianconi u8 rts_bw_sig; 297d0e274afSLorenzo Bianconi u8 rsv[3]; 298d0e274afSLorenzo Bianconi } __packed; 299d0e274afSLorenzo Bianconi 300d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 301d0e274afSLorenzo Bianconi __le16 tag; 302d0e274afSLorenzo Bianconi __le16 len; 303d0e274afSLorenzo Bianconi u8 dac_map; 304d0e274afSLorenzo Bianconi u8 tac_map; 305d0e274afSLorenzo Bianconi u8 max_sp; 306d0e274afSLorenzo Bianconi u8 rsv0; 307d0e274afSLorenzo Bianconi __le16 listen_interval; 308d0e274afSLorenzo Bianconi u8 rsv1[2]; 309d0e274afSLorenzo Bianconi } __packed; 310d0e274afSLorenzo Bianconi 311d0e274afSLorenzo Bianconi struct sta_rec_ba { 312d0e274afSLorenzo Bianconi __le16 tag; 313d0e274afSLorenzo Bianconi __le16 len; 314d0e274afSLorenzo Bianconi u8 tid; 315d0e274afSLorenzo Bianconi u8 ba_type; 316d0e274afSLorenzo Bianconi u8 amsdu; 317d0e274afSLorenzo Bianconi u8 ba_en; 318d0e274afSLorenzo Bianconi __le16 ssn; 319d0e274afSLorenzo Bianconi __le16 winsize; 320d0e274afSLorenzo Bianconi } __packed; 321d0e274afSLorenzo Bianconi 322d0e274afSLorenzo Bianconi struct sta_rec_he { 323d0e274afSLorenzo Bianconi __le16 tag; 324d0e274afSLorenzo Bianconi __le16 len; 325d0e274afSLorenzo Bianconi 326d0e274afSLorenzo Bianconi __le32 he_cap; 327d0e274afSLorenzo Bianconi 328d0e274afSLorenzo Bianconi u8 t_frame_dur; 329d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 330d0e274afSLorenzo Bianconi u8 bw_set; 331d0e274afSLorenzo Bianconi u8 device_class; 332d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 333d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 334d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 335d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 336d0e274afSLorenzo Bianconi u8 dcm_max_ru; 337d0e274afSLorenzo Bianconi u8 punc_pream_rx; 338d0e274afSLorenzo Bianconi u8 pkt_ext; 339d0e274afSLorenzo Bianconi u8 rsv1; 340d0e274afSLorenzo Bianconi 341d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 342d0e274afSLorenzo Bianconi 343d0e274afSLorenzo Bianconi u8 rsv2[2]; 344d0e274afSLorenzo Bianconi } __packed; 345d0e274afSLorenzo Bianconi 346d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 347d0e274afSLorenzo Bianconi __le16 tag; 348d0e274afSLorenzo Bianconi __le16 len; 349d0e274afSLorenzo Bianconi u8 max_amsdu_num; 350d0e274afSLorenzo Bianconi u8 max_mpdu_size; 351d0e274afSLorenzo Bianconi u8 amsdu_en; 352d0e274afSLorenzo Bianconi u8 rsv; 353d0e274afSLorenzo Bianconi } __packed; 354d0e274afSLorenzo Bianconi 355d0e274afSLorenzo Bianconi struct sta_rec_state { 356d0e274afSLorenzo Bianconi __le16 tag; 357d0e274afSLorenzo Bianconi __le16 len; 358d0e274afSLorenzo Bianconi __le32 flags; 359d0e274afSLorenzo Bianconi u8 state; 360d0e274afSLorenzo Bianconi u8 vht_opmode; 361d0e274afSLorenzo Bianconi u8 action; 362d0e274afSLorenzo Bianconi u8 rsv[1]; 363d0e274afSLorenzo Bianconi } __packed; 364d0e274afSLorenzo Bianconi 36599b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 36699b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 367d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 368d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 369d0e274afSLorenzo Bianconi __le16 tag; 370d0e274afSLorenzo Bianconi __le16 len; 371d0e274afSLorenzo Bianconi __le16 legacy; 372d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 373d0e274afSLorenzo Bianconi } __packed; 374d0e274afSLorenzo Bianconi 375d0e274afSLorenzo Bianconi struct sta_rec_phy { 376d0e274afSLorenzo Bianconi __le16 tag; 377d0e274afSLorenzo Bianconi __le16 len; 378d0e274afSLorenzo Bianconi __le16 basic_rate; 379d0e274afSLorenzo Bianconi u8 phy_type; 380d0e274afSLorenzo Bianconi u8 ampdu; 381d0e274afSLorenzo Bianconi u8 rts_policy; 382d0e274afSLorenzo Bianconi u8 rcpi; 383d0e274afSLorenzo Bianconi u8 rsv[2]; 384d0e274afSLorenzo Bianconi } __packed; 385d0e274afSLorenzo Bianconi 3865883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 3875883892bSLorenzo Bianconi __le16 tag; 3885883892bSLorenzo Bianconi __le16 len; 3895883892bSLorenzo Bianconi __le16 capa; 3905883892bSLorenzo Bianconi u8 rsv[2]; 3915883892bSLorenzo Bianconi } __packed; 3925883892bSLorenzo Bianconi 3935562d5f6SLorenzo Bianconi struct sec_key { 3945562d5f6SLorenzo Bianconi u8 cipher_id; 3955562d5f6SLorenzo Bianconi u8 cipher_len; 3965562d5f6SLorenzo Bianconi u8 key_id; 3975562d5f6SLorenzo Bianconi u8 key_len; 3985562d5f6SLorenzo Bianconi u8 key[32]; 3995562d5f6SLorenzo Bianconi } __packed; 4005562d5f6SLorenzo Bianconi 4015562d5f6SLorenzo Bianconi struct sta_rec_sec { 4025562d5f6SLorenzo Bianconi __le16 tag; 4035562d5f6SLorenzo Bianconi __le16 len; 4045562d5f6SLorenzo Bianconi u8 add; 4055562d5f6SLorenzo Bianconi u8 n_cipher; 4065562d5f6SLorenzo Bianconi u8 rsv[2]; 4075562d5f6SLorenzo Bianconi 4085562d5f6SLorenzo Bianconi struct sec_key key[2]; 4095562d5f6SLorenzo Bianconi } __packed; 4105562d5f6SLorenzo Bianconi 4115562d5f6SLorenzo Bianconi struct sta_rec_bf { 4125562d5f6SLorenzo Bianconi __le16 tag; 4135562d5f6SLorenzo Bianconi __le16 len; 4145562d5f6SLorenzo Bianconi 4155562d5f6SLorenzo Bianconi __le16 pfmu; /* 0xffff: no access right for PFMU */ 4165562d5f6SLorenzo Bianconi bool su_mu; /* 0: SU, 1: MU */ 4175562d5f6SLorenzo Bianconi u8 bf_cap; /* 0: iBF, 1: eBF */ 4185562d5f6SLorenzo Bianconi u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */ 4195562d5f6SLorenzo Bianconi u8 ndpa_rate; 4205562d5f6SLorenzo Bianconi u8 ndp_rate; 4215562d5f6SLorenzo Bianconi u8 rept_poll_rate; 4225562d5f6SLorenzo Bianconi u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */ 4235562d5f6SLorenzo Bianconi u8 ncol; 4245562d5f6SLorenzo Bianconi u8 nrow; 4255562d5f6SLorenzo Bianconi u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */ 4265562d5f6SLorenzo Bianconi 4275562d5f6SLorenzo Bianconi u8 mem_total; 4285562d5f6SLorenzo Bianconi u8 mem_20m; 4295562d5f6SLorenzo Bianconi struct { 4305562d5f6SLorenzo Bianconi u8 row; 4315562d5f6SLorenzo Bianconi u8 col: 6, row_msb: 2; 4325562d5f6SLorenzo Bianconi } mem[4]; 4335562d5f6SLorenzo Bianconi 4345562d5f6SLorenzo Bianconi __le16 smart_ant; 4355562d5f6SLorenzo Bianconi u8 se_idx; 4365562d5f6SLorenzo Bianconi u8 auto_sounding; /* b7: low traffic indicator 4375562d5f6SLorenzo Bianconi * b6: Stop sounding for this entry 4385562d5f6SLorenzo Bianconi * b5 ~ b0: postpone sounding 4395562d5f6SLorenzo Bianconi */ 4405562d5f6SLorenzo Bianconi u8 ibf_timeout; 4415562d5f6SLorenzo Bianconi u8 ibf_dbw; 4425562d5f6SLorenzo Bianconi u8 ibf_ncol; 4435562d5f6SLorenzo Bianconi u8 ibf_nrow; 4445562d5f6SLorenzo Bianconi u8 nrow_bw160; 4455562d5f6SLorenzo Bianconi u8 ncol_bw160; 4465562d5f6SLorenzo Bianconi u8 ru_start_idx; 4475562d5f6SLorenzo Bianconi u8 ru_end_idx; 4485562d5f6SLorenzo Bianconi 4495562d5f6SLorenzo Bianconi bool trigger_su; 4505562d5f6SLorenzo Bianconi bool trigger_mu; 4515562d5f6SLorenzo Bianconi bool ng16_su; 4525562d5f6SLorenzo Bianconi bool ng16_mu; 4535562d5f6SLorenzo Bianconi bool codebook42_su; 4545562d5f6SLorenzo Bianconi bool codebook75_mu; 4555562d5f6SLorenzo Bianconi 4565562d5f6SLorenzo Bianconi u8 he_ltf; 4575562d5f6SLorenzo Bianconi u8 rsv[3]; 4585562d5f6SLorenzo Bianconi } __packed; 4595562d5f6SLorenzo Bianconi 4605562d5f6SLorenzo Bianconi struct sta_rec_bfee { 4615562d5f6SLorenzo Bianconi __le16 tag; 4625562d5f6SLorenzo Bianconi __le16 len; 4635562d5f6SLorenzo Bianconi bool fb_identity_matrix; /* 1: feedback identity matrix */ 4645562d5f6SLorenzo Bianconi bool ignore_feedback; /* 1: ignore */ 4655562d5f6SLorenzo Bianconi u8 rsv[2]; 4665562d5f6SLorenzo Bianconi } __packed; 4675562d5f6SLorenzo Bianconi 4685562d5f6SLorenzo Bianconi struct sta_rec_muru { 4695562d5f6SLorenzo Bianconi __le16 tag; 4705562d5f6SLorenzo Bianconi __le16 len; 4715562d5f6SLorenzo Bianconi 4725562d5f6SLorenzo Bianconi struct { 4735562d5f6SLorenzo Bianconi bool ofdma_dl_en; 4745562d5f6SLorenzo Bianconi bool ofdma_ul_en; 4755562d5f6SLorenzo Bianconi bool mimo_dl_en; 4765562d5f6SLorenzo Bianconi bool mimo_ul_en; 4775562d5f6SLorenzo Bianconi u8 rsv[4]; 4785562d5f6SLorenzo Bianconi } cfg; 4795562d5f6SLorenzo Bianconi 4805562d5f6SLorenzo Bianconi struct { 4815562d5f6SLorenzo Bianconi u8 punc_pream_rx; 4825562d5f6SLorenzo Bianconi bool he_20m_in_40m_2g; 4835562d5f6SLorenzo Bianconi bool he_20m_in_160m; 4845562d5f6SLorenzo Bianconi bool he_80m_in_160m; 4855562d5f6SLorenzo Bianconi bool lt16_sigb; 4865562d5f6SLorenzo Bianconi bool rx_su_comp_sigb; 4875562d5f6SLorenzo Bianconi bool rx_su_non_comp_sigb; 4885562d5f6SLorenzo Bianconi u8 rsv; 4895562d5f6SLorenzo Bianconi } ofdma_dl; 4905562d5f6SLorenzo Bianconi 4915562d5f6SLorenzo Bianconi struct { 4925562d5f6SLorenzo Bianconi u8 t_frame_dur; 4935562d5f6SLorenzo Bianconi u8 mu_cascading; 4945562d5f6SLorenzo Bianconi u8 uo_ra; 4955562d5f6SLorenzo Bianconi u8 he_2x996_tone; 4965562d5f6SLorenzo Bianconi u8 rx_t_frame_11ac; 4975562d5f6SLorenzo Bianconi u8 rsv[3]; 4985562d5f6SLorenzo Bianconi } ofdma_ul; 4995562d5f6SLorenzo Bianconi 5005562d5f6SLorenzo Bianconi struct { 5015562d5f6SLorenzo Bianconi bool vht_mu_bfee; 5025562d5f6SLorenzo Bianconi bool partial_bw_dl_mimo; 5035562d5f6SLorenzo Bianconi u8 rsv[2]; 5045562d5f6SLorenzo Bianconi } mimo_dl; 5055562d5f6SLorenzo Bianconi 5065562d5f6SLorenzo Bianconi struct { 5075562d5f6SLorenzo Bianconi bool full_ul_mimo; 5085562d5f6SLorenzo Bianconi bool partial_ul_mimo; 5095562d5f6SLorenzo Bianconi u8 rsv[2]; 5105562d5f6SLorenzo Bianconi } mimo_ul; 5115562d5f6SLorenzo Bianconi } __packed; 5125562d5f6SLorenzo Bianconi 5135562d5f6SLorenzo Bianconi struct sta_phy { 5145562d5f6SLorenzo Bianconi u8 type; 5155562d5f6SLorenzo Bianconi u8 flag; 5165562d5f6SLorenzo Bianconi u8 stbc; 5175562d5f6SLorenzo Bianconi u8 sgi; 5185562d5f6SLorenzo Bianconi u8 bw; 5195562d5f6SLorenzo Bianconi u8 ldpc; 5205562d5f6SLorenzo Bianconi u8 mcs; 5215562d5f6SLorenzo Bianconi u8 nss; 5225562d5f6SLorenzo Bianconi u8 he_ltf; 5235562d5f6SLorenzo Bianconi }; 5245562d5f6SLorenzo Bianconi 5255562d5f6SLorenzo Bianconi struct sta_rec_ra { 5265562d5f6SLorenzo Bianconi __le16 tag; 5275562d5f6SLorenzo Bianconi __le16 len; 5285562d5f6SLorenzo Bianconi 5295562d5f6SLorenzo Bianconi u8 valid; 5305562d5f6SLorenzo Bianconi u8 auto_rate; 5315562d5f6SLorenzo Bianconi u8 phy_mode; 5325562d5f6SLorenzo Bianconi u8 channel; 5335562d5f6SLorenzo Bianconi u8 bw; 5345562d5f6SLorenzo Bianconi u8 disable_cck; 5355562d5f6SLorenzo Bianconi u8 ht_mcs32; 5365562d5f6SLorenzo Bianconi u8 ht_gf; 5375562d5f6SLorenzo Bianconi u8 ht_mcs[4]; 5385562d5f6SLorenzo Bianconi u8 mmps_mode; 5395562d5f6SLorenzo Bianconi u8 gband_256; 5405562d5f6SLorenzo Bianconi u8 af; 5415562d5f6SLorenzo Bianconi u8 auth_wapi_mode; 5425562d5f6SLorenzo Bianconi u8 rate_len; 5435562d5f6SLorenzo Bianconi 5445562d5f6SLorenzo Bianconi u8 supp_mode; 5455562d5f6SLorenzo Bianconi u8 supp_cck_rate; 5465562d5f6SLorenzo Bianconi u8 supp_ofdm_rate; 5475562d5f6SLorenzo Bianconi __le32 supp_ht_mcs; 5485562d5f6SLorenzo Bianconi __le16 supp_vht_mcs[4]; 5495562d5f6SLorenzo Bianconi 5505562d5f6SLorenzo Bianconi u8 op_mode; 5515562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 5525562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 5535562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 5545562d5f6SLorenzo Bianconi 5555562d5f6SLorenzo Bianconi __le32 sta_cap; 5565562d5f6SLorenzo Bianconi 5575562d5f6SLorenzo Bianconi struct sta_phy phy; 5585562d5f6SLorenzo Bianconi } __packed; 5595562d5f6SLorenzo Bianconi 5605562d5f6SLorenzo Bianconi struct sta_rec_ra_fixed { 5615562d5f6SLorenzo Bianconi __le16 tag; 5625562d5f6SLorenzo Bianconi __le16 len; 5635562d5f6SLorenzo Bianconi 5645562d5f6SLorenzo Bianconi __le32 field; 5655562d5f6SLorenzo Bianconi u8 op_mode; 5665562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 5675562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 5685562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 5695562d5f6SLorenzo Bianconi 5705562d5f6SLorenzo Bianconi struct sta_phy phy; 5715562d5f6SLorenzo Bianconi 5725562d5f6SLorenzo Bianconi u8 spe_en; 5735562d5f6SLorenzo Bianconi u8 short_preamble; 5745562d5f6SLorenzo Bianconi u8 is_5g; 5755562d5f6SLorenzo Bianconi u8 mmps_mode; 5765562d5f6SLorenzo Bianconi } __packed; 5775562d5f6SLorenzo Bianconi 578d0e274afSLorenzo Bianconi /* wtbl_rec */ 579d0e274afSLorenzo Bianconi 580d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 581d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 582d0e274afSLorenzo Bianconi u8 operation; 583d0e274afSLorenzo Bianconi __le16 tlv_num; 584d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 585d0e274afSLorenzo Bianconi u8 rsv[3]; 586d0e274afSLorenzo Bianconi } __packed; 587d0e274afSLorenzo Bianconi 588d0e274afSLorenzo Bianconi struct wtbl_generic { 589d0e274afSLorenzo Bianconi __le16 tag; 590d0e274afSLorenzo Bianconi __le16 len; 591d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 592d0e274afSLorenzo Bianconi u8 muar_idx; 593d0e274afSLorenzo Bianconi u8 skip_tx; 594d0e274afSLorenzo Bianconi u8 cf_ack; 595d0e274afSLorenzo Bianconi u8 qos; 596d0e274afSLorenzo Bianconi u8 mesh; 597d0e274afSLorenzo Bianconi u8 adm; 598d0e274afSLorenzo Bianconi __le16 partial_aid; 599d0e274afSLorenzo Bianconi u8 baf_en; 600d0e274afSLorenzo Bianconi u8 aad_om; 601d0e274afSLorenzo Bianconi } __packed; 602d0e274afSLorenzo Bianconi 603d0e274afSLorenzo Bianconi struct wtbl_rx { 604d0e274afSLorenzo Bianconi __le16 tag; 605d0e274afSLorenzo Bianconi __le16 len; 606d0e274afSLorenzo Bianconi u8 rcid; 607d0e274afSLorenzo Bianconi u8 rca1; 608d0e274afSLorenzo Bianconi u8 rca2; 609d0e274afSLorenzo Bianconi u8 rv; 610d0e274afSLorenzo Bianconi u8 rsv[4]; 611d0e274afSLorenzo Bianconi } __packed; 612d0e274afSLorenzo Bianconi 613d0e274afSLorenzo Bianconi struct wtbl_ht { 614d0e274afSLorenzo Bianconi __le16 tag; 615d0e274afSLorenzo Bianconi __le16 len; 616d0e274afSLorenzo Bianconi u8 ht; 617d0e274afSLorenzo Bianconi u8 ldpc; 618d0e274afSLorenzo Bianconi u8 af; 619d0e274afSLorenzo Bianconi u8 mm; 620d0e274afSLorenzo Bianconi u8 rsv[4]; 621d0e274afSLorenzo Bianconi } __packed; 622d0e274afSLorenzo Bianconi 623d0e274afSLorenzo Bianconi struct wtbl_vht { 624d0e274afSLorenzo Bianconi __le16 tag; 625d0e274afSLorenzo Bianconi __le16 len; 626d0e274afSLorenzo Bianconi u8 ldpc; 627d0e274afSLorenzo Bianconi u8 dyn_bw; 628d0e274afSLorenzo Bianconi u8 vht; 629d0e274afSLorenzo Bianconi u8 txop_ps; 630d0e274afSLorenzo Bianconi u8 rsv[4]; 631d0e274afSLorenzo Bianconi } __packed; 632d0e274afSLorenzo Bianconi 633d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 634d0e274afSLorenzo Bianconi __le16 tag; 635d0e274afSLorenzo Bianconi __le16 len; 636d0e274afSLorenzo Bianconi u8 txps; 637d0e274afSLorenzo Bianconi u8 rsv[3]; 638d0e274afSLorenzo Bianconi } __packed; 639d0e274afSLorenzo Bianconi 640d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 641d0e274afSLorenzo Bianconi __le16 tag; 642d0e274afSLorenzo Bianconi __le16 len; 643d0e274afSLorenzo Bianconi u8 to_ds; 644d0e274afSLorenzo Bianconi u8 from_ds; 645d4b98c63SRyder Lee u8 no_rx_trans; 646d0e274afSLorenzo Bianconi u8 rsv; 647d0e274afSLorenzo Bianconi } __packed; 648d0e274afSLorenzo Bianconi 649d0e274afSLorenzo Bianconi struct wtbl_ba { 650d0e274afSLorenzo Bianconi __le16 tag; 651d0e274afSLorenzo Bianconi __le16 len; 652d0e274afSLorenzo Bianconi /* common */ 653d0e274afSLorenzo Bianconi u8 tid; 654d0e274afSLorenzo Bianconi u8 ba_type; 655d0e274afSLorenzo Bianconi u8 rsv0[2]; 656d0e274afSLorenzo Bianconi /* originator only */ 657d0e274afSLorenzo Bianconi __le16 sn; 658d0e274afSLorenzo Bianconi u8 ba_en; 659d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 6605562d5f6SLorenzo Bianconi /* originator & recipient */ 661d0e274afSLorenzo Bianconi __le16 ba_winsize; 662d0e274afSLorenzo Bianconi /* recipient only */ 663d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 664d0e274afSLorenzo Bianconi u8 rst_ba_tid; 665d0e274afSLorenzo Bianconi u8 rst_ba_sel; 666d0e274afSLorenzo Bianconi u8 rst_ba_sb; 667d0e274afSLorenzo Bianconi u8 band_idx; 668d0e274afSLorenzo Bianconi u8 rsv1[4]; 669d0e274afSLorenzo Bianconi } __packed; 670d0e274afSLorenzo Bianconi 671d0e274afSLorenzo Bianconi struct wtbl_smps { 672d0e274afSLorenzo Bianconi __le16 tag; 673d0e274afSLorenzo Bianconi __le16 len; 674d0e274afSLorenzo Bianconi u8 smps; 675d0e274afSLorenzo Bianconi u8 rsv[3]; 676d0e274afSLorenzo Bianconi } __packed; 677d0e274afSLorenzo Bianconi 678d0e274afSLorenzo Bianconi /* mt7615 only */ 679d0e274afSLorenzo Bianconi 680d0e274afSLorenzo Bianconi struct wtbl_bf { 681d0e274afSLorenzo Bianconi __le16 tag; 682d0e274afSLorenzo Bianconi __le16 len; 683d0e274afSLorenzo Bianconi u8 ibf; 684d0e274afSLorenzo Bianconi u8 ebf; 685d0e274afSLorenzo Bianconi u8 ibf_vht; 686d0e274afSLorenzo Bianconi u8 ebf_vht; 687d0e274afSLorenzo Bianconi u8 gid; 688d0e274afSLorenzo Bianconi u8 pfmu_idx; 689d0e274afSLorenzo Bianconi u8 rsv[2]; 690d0e274afSLorenzo Bianconi } __packed; 691d0e274afSLorenzo Bianconi 692d0e274afSLorenzo Bianconi struct wtbl_pn { 693d0e274afSLorenzo Bianconi __le16 tag; 694d0e274afSLorenzo Bianconi __le16 len; 695d0e274afSLorenzo Bianconi u8 pn[6]; 696d0e274afSLorenzo Bianconi u8 rsv[2]; 697d0e274afSLorenzo Bianconi } __packed; 698d0e274afSLorenzo Bianconi 699d0e274afSLorenzo Bianconi struct wtbl_spe { 700d0e274afSLorenzo Bianconi __le16 tag; 701d0e274afSLorenzo Bianconi __le16 len; 702d0e274afSLorenzo Bianconi u8 spe_idx; 703d0e274afSLorenzo Bianconi u8 rsv[3]; 704d0e274afSLorenzo Bianconi } __packed; 705d0e274afSLorenzo Bianconi 706d0e274afSLorenzo Bianconi struct wtbl_raw { 707d0e274afSLorenzo Bianconi __le16 tag; 708d0e274afSLorenzo Bianconi __le16 len; 709d0e274afSLorenzo Bianconi u8 wtbl_idx; 710d0e274afSLorenzo Bianconi u8 dw; 711d0e274afSLorenzo Bianconi u8 rsv[2]; 712d0e274afSLorenzo Bianconi __le32 msk; 713d0e274afSLorenzo Bianconi __le32 val; 714d0e274afSLorenzo Bianconi } __packed; 715d0e274afSLorenzo Bianconi 716d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 717d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 718d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 719d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 720d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 721d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 722d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 723d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 724d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 725d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 726d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 727d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 728d0e274afSLorenzo Bianconi 729d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 730d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 7315562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bf) + \ 732d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 733d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 734d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 735d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 736d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 737d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 7385562d5f6SLorenzo Bianconi sizeof(struct sta_rec_muru) + \ 7395562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bfee) + \ 7405562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra) + \ 741e2c93b68SLorenzo Bianconi sizeof(struct sta_rec_sec) + \ 7425562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra_fixed) + \ 7435883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 744d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 745d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 746d0e274afSLorenzo Bianconi 747d0e274afSLorenzo Bianconi enum { 748d0e274afSLorenzo Bianconi STA_REC_BASIC, 749d0e274afSLorenzo Bianconi STA_REC_RA, 750d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 751d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 752d0e274afSLorenzo Bianconi STA_REC_BF, 753d0e274afSLorenzo Bianconi STA_REC_AMSDU, 754d0e274afSLorenzo Bianconi STA_REC_BA, 755d0e274afSLorenzo Bianconi STA_REC_STATE, 756d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 757d0e274afSLorenzo Bianconi STA_REC_HT, 758d0e274afSLorenzo Bianconi STA_REC_VHT, 759d0e274afSLorenzo Bianconi STA_REC_APPS, 760d0e274afSLorenzo Bianconi STA_REC_KEY, 761d0e274afSLorenzo Bianconi STA_REC_WTBL, 762d0e274afSLorenzo Bianconi STA_REC_HE, 763d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 764d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 765d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 766d0e274afSLorenzo Bianconi STA_REC_MURU, 767d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 768d0e274afSLorenzo Bianconi STA_REC_BFEE, 769d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 7705883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 771d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 772d0e274afSLorenzo Bianconi }; 773d0e274afSLorenzo Bianconi 774d0e274afSLorenzo Bianconi enum { 775d0e274afSLorenzo Bianconi WTBL_GENERIC, 776d0e274afSLorenzo Bianconi WTBL_RX, 777d0e274afSLorenzo Bianconi WTBL_HT, 778d0e274afSLorenzo Bianconi WTBL_VHT, 779d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 780d0e274afSLorenzo Bianconi WTBL_TX_PS, 781d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 782d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 783d0e274afSLorenzo Bianconi WTBL_BA, 784d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 785d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 786d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 787d0e274afSLorenzo Bianconi WTBL_BF, 788d0e274afSLorenzo Bianconi WTBL_SMPS, 789d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 790d0e274afSLorenzo Bianconi WTBL_PN, 791d0e274afSLorenzo Bianconi WTBL_SPE, 792d0e274afSLorenzo Bianconi WTBL_MAX_NUM 793d0e274afSLorenzo Bianconi }; 794d0e274afSLorenzo Bianconi 795d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 796d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 797d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 798d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 799d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 800d0e274afSLorenzo Bianconi 801d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 802d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 803d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 804d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 805d0e274afSLorenzo Bianconi 8064da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 8074da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 8084da64fe0SSean Wang 809d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 810d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 811d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 812d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 813d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 814d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 815d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 816d0e274afSLorenzo Bianconi 817d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 818d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 819d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 820d0e274afSLorenzo Bianconi 821d0e274afSLorenzo Bianconi /* HE MAC */ 822d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 823d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 824d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 825d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 826d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 827d0e274afSLorenzo Bianconi /* HE PHY */ 828d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 829d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 830d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 831d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 832d0e274afSLorenzo Bianconi /* STBC */ 833d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 834d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 835d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 836d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 837d0e274afSLorenzo Bianconi /* GI */ 838d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 839d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 840d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 841d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 842d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 843d0e274afSLorenzo Bianconi /* 242 TONE */ 844d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 845d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 846d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 847d0e274afSLorenzo Bianconi 848d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 849d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 850d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 851d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 852d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 853d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 854d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 855d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 856dfdf6725SLorenzo Bianconi 857dfdf6725SLorenzo Bianconi #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ 858d0e274afSLorenzo Bianconi 859d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 860d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 861d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 862d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 863d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 864d0e274afSLorenzo Bianconi 8655562d5f6SLorenzo Bianconi #define STA_CAP_WMM BIT(0) 8665562d5f6SLorenzo Bianconi #define STA_CAP_SGI_20 BIT(4) 8675562d5f6SLorenzo Bianconi #define STA_CAP_SGI_40 BIT(5) 8685562d5f6SLorenzo Bianconi #define STA_CAP_TX_STBC BIT(6) 8695562d5f6SLorenzo Bianconi #define STA_CAP_RX_STBC BIT(7) 8705562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_80 BIT(16) 8715562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_160 BIT(17) 8725562d5f6SLorenzo Bianconi #define STA_CAP_VHT_TX_STBC BIT(18) 8735562d5f6SLorenzo Bianconi #define STA_CAP_VHT_RX_STBC BIT(19) 8745562d5f6SLorenzo Bianconi #define STA_CAP_VHT_LDPC BIT(23) 8755562d5f6SLorenzo Bianconi #define STA_CAP_LDPC BIT(24) 8765562d5f6SLorenzo Bianconi #define STA_CAP_HT BIT(26) 8775562d5f6SLorenzo Bianconi #define STA_CAP_VHT BIT(27) 8785562d5f6SLorenzo Bianconi #define STA_CAP_HE BIT(28) 8795562d5f6SLorenzo Bianconi 880d0e274afSLorenzo Bianconi enum { 881d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 882d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 883d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 884d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 885d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 886d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 887d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 888d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 889d0e274afSLorenzo Bianconi }; 890d0e274afSLorenzo Bianconi 891d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 892d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 893d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 894d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 895d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 896d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 897d0e274afSLorenzo Bianconi 898d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 899d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 900d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 901d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 902d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 903d0e274afSLorenzo Bianconi 904d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 905d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 906d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 907d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 908d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 909d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 910d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 911d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 912d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 913d0e274afSLorenzo Bianconi 914d0e274afSLorenzo Bianconi enum { 915d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 916d0e274afSLorenzo Bianconi WTBL_SET, 917d0e274afSLorenzo Bianconi WTBL_QUERY, 918d0e274afSLorenzo Bianconi WTBL_RESET_ALL 919d0e274afSLorenzo Bianconi }; 920d0e274afSLorenzo Bianconi 921d0e274afSLorenzo Bianconi enum { 922d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 923d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 924d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 925d0e274afSLorenzo Bianconi }; 926d0e274afSLorenzo Bianconi 927d0e274afSLorenzo Bianconi enum { 928d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 929d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 930d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 931d0e274afSLorenzo Bianconi }; 932d0e274afSLorenzo Bianconi 933d0e274afSLorenzo Bianconi enum { 934d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 935d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 936d0e274afSLorenzo Bianconi }; 937d0e274afSLorenzo Bianconi 9385562d5f6SLorenzo Bianconi /* event table */ 9395562d5f6SLorenzo Bianconi enum { 9405562d5f6SLorenzo Bianconi MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, 9415562d5f6SLorenzo Bianconi MCU_EVENT_FW_START = 0x01, 9425562d5f6SLorenzo Bianconi MCU_EVENT_GENERIC = 0x01, 9435562d5f6SLorenzo Bianconi MCU_EVENT_ACCESS_REG = 0x02, 9445562d5f6SLorenzo Bianconi MCU_EVENT_MT_PATCH_SEM = 0x04, 9455562d5f6SLorenzo Bianconi MCU_EVENT_REG_ACCESS = 0x05, 9465562d5f6SLorenzo Bianconi MCU_EVENT_LP_INFO = 0x07, 9475562d5f6SLorenzo Bianconi MCU_EVENT_SCAN_DONE = 0x0d, 9485562d5f6SLorenzo Bianconi MCU_EVENT_TX_DONE = 0x0f, 9495562d5f6SLorenzo Bianconi MCU_EVENT_ROC = 0x10, 9505562d5f6SLorenzo Bianconi MCU_EVENT_BSS_ABSENCE = 0x11, 9515562d5f6SLorenzo Bianconi MCU_EVENT_BSS_BEACON_LOSS = 0x13, 9525562d5f6SLorenzo Bianconi MCU_EVENT_CH_PRIVILEGE = 0x18, 9535562d5f6SLorenzo Bianconi MCU_EVENT_SCHED_SCAN_DONE = 0x23, 9545562d5f6SLorenzo Bianconi MCU_EVENT_DBG_MSG = 0x27, 9555562d5f6SLorenzo Bianconi MCU_EVENT_TXPWR = 0xd0, 9565562d5f6SLorenzo Bianconi MCU_EVENT_EXT = 0xed, 9575562d5f6SLorenzo Bianconi MCU_EVENT_RESTART_DL = 0xef, 9585562d5f6SLorenzo Bianconi MCU_EVENT_COREDUMP = 0xf0, 9595562d5f6SLorenzo Bianconi }; 9605562d5f6SLorenzo Bianconi 9615562d5f6SLorenzo Bianconi /* ext event table */ 9625562d5f6SLorenzo Bianconi enum { 9635562d5f6SLorenzo Bianconi MCU_EXT_EVENT_PS_SYNC = 0x5, 9645562d5f6SLorenzo Bianconi MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, 9655562d5f6SLorenzo Bianconi MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, 9665562d5f6SLorenzo Bianconi MCU_EXT_EVENT_ASSERT_DUMP = 0x23, 9675562d5f6SLorenzo Bianconi MCU_EXT_EVENT_RDD_REPORT = 0x3a, 9685562d5f6SLorenzo Bianconi MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, 9695562d5f6SLorenzo Bianconi MCU_EXT_EVENT_BCC_NOTIFY = 0x75, 9701966a507SMeiChia Chiu MCU_EXT_EVENT_MURU_CTRL = 0x9f, 9715562d5f6SLorenzo Bianconi }; 9725562d5f6SLorenzo Bianconi 9735562d5f6SLorenzo Bianconi enum { 9745562d5f6SLorenzo Bianconi MCU_Q_QUERY, 9755562d5f6SLorenzo Bianconi MCU_Q_SET, 9765562d5f6SLorenzo Bianconi MCU_Q_RESERVED, 9775562d5f6SLorenzo Bianconi MCU_Q_NA 9785562d5f6SLorenzo Bianconi }; 9795562d5f6SLorenzo Bianconi 9805562d5f6SLorenzo Bianconi enum { 9815562d5f6SLorenzo Bianconi MCU_S2D_H2N, 9825562d5f6SLorenzo Bianconi MCU_S2D_C2N, 9835562d5f6SLorenzo Bianconi MCU_S2D_H2C, 9845562d5f6SLorenzo Bianconi MCU_S2D_H2CN 9855562d5f6SLorenzo Bianconi }; 9865562d5f6SLorenzo Bianconi 9875562d5f6SLorenzo Bianconi enum { 9885562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_FAIL, 9895562d5f6SLorenzo Bianconi PATCH_IS_DL, 9905562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_SUCCESS, 9915562d5f6SLorenzo Bianconi PATCH_REL_SEM_SUCCESS 9925562d5f6SLorenzo Bianconi }; 9935562d5f6SLorenzo Bianconi 9945562d5f6SLorenzo Bianconi enum { 9955562d5f6SLorenzo Bianconi FW_STATE_INITIAL, 9965562d5f6SLorenzo Bianconi FW_STATE_FW_DOWNLOAD, 9975562d5f6SLorenzo Bianconi FW_STATE_NORMAL_OPERATION, 9985562d5f6SLorenzo Bianconi FW_STATE_NORMAL_TRX, 9995562d5f6SLorenzo Bianconi FW_STATE_RDY = 7 10005562d5f6SLorenzo Bianconi }; 10015562d5f6SLorenzo Bianconi 10025562d5f6SLorenzo Bianconi enum { 10035562d5f6SLorenzo Bianconi CH_SWITCH_NORMAL = 0, 10045562d5f6SLorenzo Bianconi CH_SWITCH_SCAN = 3, 10055562d5f6SLorenzo Bianconi CH_SWITCH_MCC = 4, 10065562d5f6SLorenzo Bianconi CH_SWITCH_DFS = 5, 10075562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_START = 6, 10085562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 10095562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 10105562d5f6SLorenzo Bianconi CH_SWITCH_SCAN_BYPASS_DPD = 9 10115562d5f6SLorenzo Bianconi }; 10125562d5f6SLorenzo Bianconi 10135562d5f6SLorenzo Bianconi enum { 10145562d5f6SLorenzo Bianconi THERMAL_SENSOR_TEMP_QUERY, 10155562d5f6SLorenzo Bianconi THERMAL_SENSOR_MANUAL_CTRL, 10165562d5f6SLorenzo Bianconi THERMAL_SENSOR_INFO_QUERY, 10175562d5f6SLorenzo Bianconi THERMAL_SENSOR_TASK_CTRL, 10185562d5f6SLorenzo Bianconi }; 10195562d5f6SLorenzo Bianconi 10205562d5f6SLorenzo Bianconi enum mcu_cipher_type { 10215562d5f6SLorenzo Bianconi MCU_CIPHER_NONE = 0, 10225562d5f6SLorenzo Bianconi MCU_CIPHER_WEP40, 10235562d5f6SLorenzo Bianconi MCU_CIPHER_WEP104, 10245562d5f6SLorenzo Bianconi MCU_CIPHER_WEP128, 10255562d5f6SLorenzo Bianconi MCU_CIPHER_TKIP, 10265562d5f6SLorenzo Bianconi MCU_CIPHER_AES_CCMP, 10275562d5f6SLorenzo Bianconi MCU_CIPHER_CCMP_256, 10285562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP, 10295562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP_256, 10305562d5f6SLorenzo Bianconi MCU_CIPHER_WAPI, 10315562d5f6SLorenzo Bianconi MCU_CIPHER_BIP_CMAC_128, 10325562d5f6SLorenzo Bianconi }; 10335562d5f6SLorenzo Bianconi 10345562d5f6SLorenzo Bianconi enum { 10355562d5f6SLorenzo Bianconi EE_MODE_EFUSE, 10365562d5f6SLorenzo Bianconi EE_MODE_BUFFER, 10375562d5f6SLorenzo Bianconi }; 10385562d5f6SLorenzo Bianconi 10395562d5f6SLorenzo Bianconi enum { 10405562d5f6SLorenzo Bianconi EE_FORMAT_BIN, 10415562d5f6SLorenzo Bianconi EE_FORMAT_WHOLE, 10425562d5f6SLorenzo Bianconi EE_FORMAT_MULTIPLE, 10435562d5f6SLorenzo Bianconi }; 10445562d5f6SLorenzo Bianconi 10455562d5f6SLorenzo Bianconi enum { 10465562d5f6SLorenzo Bianconi MCU_PHY_STATE_TX_RATE, 10475562d5f6SLorenzo Bianconi MCU_PHY_STATE_RX_RATE, 10485562d5f6SLorenzo Bianconi MCU_PHY_STATE_RSSI, 10495562d5f6SLorenzo Bianconi MCU_PHY_STATE_CONTENTION_RX_RATE, 10505562d5f6SLorenzo Bianconi MCU_PHY_STATE_OFDMLQ_CNINFO, 10515562d5f6SLorenzo Bianconi }; 10525562d5f6SLorenzo Bianconi 1053d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 1054d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 1055d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 1056d0e274afSLorenzo Bianconi 1057d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 1058d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 1059d0e274afSLorenzo Bianconi 1060e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_ID GENMASK(7, 0) 1061e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8) 1062e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_QUERY BIT(16) 106354722402SLorenzo Bianconi #define __MCU_CMD_FIELD_UNI BIT(17) 1064680a2eadSLorenzo Bianconi #define __MCU_CMD_FIELD_CE BIT(18) 10655562d5f6SLorenzo Bianconi #define __MCU_CMD_FIELD_WA BIT(19) 1066e6d2070dSLorenzo Bianconi 1067e6d2070dSLorenzo Bianconi #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \ 1068e6d2070dSLorenzo Bianconi MCU_CMD_##_t) 1069e6d2070dSLorenzo Bianconi #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \ 1070e6d2070dSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 1071e6d2070dSLorenzo Bianconi MCU_EXT_CMD_##_t)) 1072e6d2070dSLorenzo Bianconi #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY) 107354722402SLorenzo Bianconi #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \ 107454722402SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 107554722402SLorenzo Bianconi MCU_UNI_CMD_##_t)) 1076680a2eadSLorenzo Bianconi #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \ 1077680a2eadSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 1078680a2eadSLorenzo Bianconi MCU_CE_CMD_##_t)) 1079680a2eadSLorenzo Bianconi #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY) 1080d0e274afSLorenzo Bianconi 10815562d5f6SLorenzo Bianconi #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA) 10825562d5f6SLorenzo Bianconi #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA) 10835562d5f6SLorenzo Bianconi #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \ 10845562d5f6SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 10855562d5f6SLorenzo Bianconi MCU_WA_PARAM_CMD_##_t)) 10865562d5f6SLorenzo Bianconi 1087d0e274afSLorenzo Bianconi enum { 1088d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 1089d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 10909d8d136cSLorenzo Bianconi MCU_EXT_CMD_RF_TEST = 0x04, 1091d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 1092d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 1093d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 1094d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 10959d8d136cSLorenzo Bianconi MCU_EXT_CMD_TXBF_ACTION = 0x1e, 1096d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 10979d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_PROT = 0x23, 1098d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 1099d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 1100d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 1101d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 11029d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_CTRL = 0x2c, 1103d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 11049d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_DRR_CTRL = 0x36, 1105d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 1106d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 1107d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 1108d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 1109d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 1110d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 1111d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 1112d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 11139d8d136cSLorenzo Bianconi MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, 1114d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 11159d8d136cSLorenzo Bianconi MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, 1116d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 1117d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 11189d8d136cSLorenzo Bianconi MCU_EXT_CMD_GET_MIB_INFO = 0x5a, 1119d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 112003a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 11219d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RADAR_TH = 0x7c, 1122d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 11239d8d136cSLorenzo Bianconi MCU_EXT_CMD_MWDS_SUPPORT = 0x80, 11249d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, 11259d8d136cSLorenzo Bianconi MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, 11269d8d136cSLorenzo Bianconi MCU_EXT_CMD_FW_DBG_CTRL = 0x95, 112739cdf080SLorenzo Bianconi MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, 11289d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x9d, 11299d8d136cSLorenzo Bianconi MCU_EXT_CMD_MURU_CTRL = 0x9f, 11309d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SPR = 0xa8, 11319d8d136cSLorenzo Bianconi MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, 11329d8d136cSLorenzo Bianconi MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, 11339d8d136cSLorenzo Bianconi MCU_EXT_CMD_PHY_STAT_INFO = 0xad, 1134d0e274afSLorenzo Bianconi }; 1135d0e274afSLorenzo Bianconi 1136d0e274afSLorenzo Bianconi enum { 113754722402SLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01, 113854722402SLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02, 113954722402SLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = 0x03, 114054722402SLorenzo Bianconi MCU_UNI_CMD_SUSPEND = 0x05, 114154722402SLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = 0x06, 114254722402SLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = 0x07, 1143cbaa0a40SSean Wang MCU_UNI_CMD_SNIFFER = 0x24, 1144d0e274afSLorenzo Bianconi }; 1145d0e274afSLorenzo Bianconi 1146d0e274afSLorenzo Bianconi enum { 11477159eb82SLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 11487159eb82SLorenzo Bianconi MCU_CMD_FW_START_REQ = 0x02, 1149d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 11507159eb82SLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = 0x4, 11517159eb82SLorenzo Bianconi MCU_CMD_PATCH_START_REQ = 0x05, 11527159eb82SLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = 0x07, 11537159eb82SLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = 0x10, 11549d8d136cSLorenzo Bianconi MCU_CMD_WA_PARAM = 0xc4, 1155d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 11567159eb82SLorenzo Bianconi MCU_CMD_FW_SCATTER = 0xee, 11577159eb82SLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = 0xef, 1158d0e274afSLorenzo Bianconi }; 1159d0e274afSLorenzo Bianconi 1160d0e274afSLorenzo Bianconi /* offload mcu commands */ 1161d0e274afSLorenzo Bianconi enum { 1162680a2eadSLorenzo Bianconi MCU_CE_CMD_TEST_CTRL = 0x01, 1163680a2eadSLorenzo Bianconi MCU_CE_CMD_START_HW_SCAN = 0x03, 1164680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_PS_PROFILE = 0x05, 1165680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f, 1166680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, 1167680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_ABORT = 0x17, 1168680a2eadSLorenzo Bianconi MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, 1169bf9727a2SSean Wang MCU_CE_CMD_SET_ROC = 0x1c, 117066ca1a7bSSean Wang MCU_CE_CMD_SET_EDCA_PARMS = 0x1d, 1171680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_P2P_OPPPS = 0x33, 1172680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, 1173680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, 1174680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_REQ = 0x62, 1175680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_NIC_CAPAB = 0x8a, 1176680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0, 1177680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_WRITE = 0xc0, 1178680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_READ = 0xc0, 1179680a2eadSLorenzo Bianconi MCU_CE_CMD_CHIP_CONFIG = 0xca, 1180680a2eadSLorenzo Bianconi MCU_CE_CMD_FWLOG_2_HOST = 0xc5, 1181680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_WTBL = 0xcd, 1182680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_TXPWR = 0xd0, 1183d0e274afSLorenzo Bianconi }; 1184d0e274afSLorenzo Bianconi 1185d0e274afSLorenzo Bianconi enum { 1186d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 1187d0e274afSLorenzo Bianconi PATCH_SEM_GET 1188d0e274afSLorenzo Bianconi }; 1189d0e274afSLorenzo Bianconi 1190d0e274afSLorenzo Bianconi enum { 1191d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 1192d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 1193b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 1194d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 1195d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 1196d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 1197d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 119867aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 119967aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 1200d0e274afSLorenzo Bianconi }; 1201d0e274afSLorenzo Bianconi 120255d4c19cSLorenzo Bianconi enum { 120355d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 120455d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 120555d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 120655d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 120755d4c19cSLorenzo Bianconi }; 120855d4c19cSLorenzo Bianconi 1209f7d2958cSLorenzo Bianconi enum { 1210f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 1211f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 1212f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 1213f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 1214f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 1215f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 1216f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 1217f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 1218f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 1219f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 1220f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 1221f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 1222f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 1223f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 1224f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 1225f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 1226f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 1227f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 1228f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 1229f7d2958cSLorenzo Bianconi }; 1230f7d2958cSLorenzo Bianconi 1231193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 1232193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 1233193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 1234193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 1235193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 1236193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 1237193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 1238193e5f22SYN Chen 123955d4c19cSLorenzo Bianconi enum { 124055d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 124155d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 124255d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 124355d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 124455d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 124555d4c19cSLorenzo Bianconi }; 124655d4c19cSLorenzo Bianconi 124755d4c19cSLorenzo Bianconi enum { 124855d4c19cSLorenzo Bianconi WOW_USB = 1, 124955d4c19cSLorenzo Bianconi WOW_PCIE = 2, 125055d4c19cSLorenzo Bianconi WOW_GPIO = 3, 125155d4c19cSLorenzo Bianconi }; 125255d4c19cSLorenzo Bianconi 1253d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 1254d0e274afSLorenzo Bianconi __le16 tag; 1255d0e274afSLorenzo Bianconi __le16 len; 1256d0e274afSLorenzo Bianconi u8 active; 1257d0e274afSLorenzo Bianconi u8 omac_idx; 1258d0e274afSLorenzo Bianconi u8 hw_bss_idx; 1259d0e274afSLorenzo Bianconi u8 band_idx; 1260d0e274afSLorenzo Bianconi __le32 conn_type; 1261d0e274afSLorenzo Bianconi u8 conn_state; 1262d0e274afSLorenzo Bianconi u8 wmm_idx; 1263d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1264d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 1265d0e274afSLorenzo Bianconi __le16 bcn_interval; 1266d0e274afSLorenzo Bianconi u8 dtim_period; 1267d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 1268d0e274afSLorenzo Bianconi * bit(1): B 1269d0e274afSLorenzo Bianconi * bit(2): G 1270d0e274afSLorenzo Bianconi * bit(3): GN 1271d0e274afSLorenzo Bianconi * bit(4): AN 1272d0e274afSLorenzo Bianconi * bit(5): AC 12733cf3e01bSLorenzo Bianconi * bit(6): AX2 12743cf3e01bSLorenzo Bianconi * bit(7): AX5 12753cf3e01bSLorenzo Bianconi * bit(8): AX6 1276d0e274afSLorenzo Bianconi */ 1277d0e274afSLorenzo Bianconi __le16 sta_idx; 12783cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 12793cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 12803cf3e01bSLorenzo Bianconi u8 pad[1]; 1281d0e274afSLorenzo Bianconi } __packed; 1282d0e274afSLorenzo Bianconi 1283d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 1284d0e274afSLorenzo Bianconi __le16 tag; 1285d0e274afSLorenzo Bianconi __le16 len; 1286d0e274afSLorenzo Bianconi u8 qos; 1287d0e274afSLorenzo Bianconi u8 pad[3]; 1288d0e274afSLorenzo Bianconi } __packed; 1289d0e274afSLorenzo Bianconi 1290d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 1291d0e274afSLorenzo Bianconi u8 bss_idx; 1292d0e274afSLorenzo Bianconi u8 reason; 1293d0e274afSLorenzo Bianconi u8 pad[2]; 1294d0e274afSLorenzo Bianconi } __packed; 1295d0e274afSLorenzo Bianconi 1296d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 1297d0e274afSLorenzo Bianconi u8 bss_idx; 1298d0e274afSLorenzo Bianconi u8 is_absent; 1299d0e274afSLorenzo Bianconi u8 free_quota; 1300d0e274afSLorenzo Bianconi u8 pad; 1301d0e274afSLorenzo Bianconi } __packed; 1302d0e274afSLorenzo Bianconi 1303399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 1304399090efSLorenzo Bianconi __le32 ssid_len; 1305399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1306399090efSLorenzo Bianconi } __packed; 1307399090efSLorenzo Bianconi 1308399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 1309399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 1310399090efSLorenzo Bianconi * 2: 5.0GHz 1311399090efSLorenzo Bianconi * Others: Reserved 1312399090efSLorenzo Bianconi */ 1313399090efSLorenzo Bianconi u8 channel_num; 1314399090efSLorenzo Bianconi } __packed; 1315399090efSLorenzo Bianconi 1316399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 1317399090efSLorenzo Bianconi __le32 rssi_th; 1318399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1319399090efSLorenzo Bianconi u8 ssid_len; 1320399090efSLorenzo Bianconi u8 rsv[3]; 1321399090efSLorenzo Bianconi } __packed; 1322399090efSLorenzo Bianconi 1323399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 1324399090efSLorenzo Bianconi u8 seq_num; 1325399090efSLorenzo Bianconi u8 bss_idx; 1326399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 1327399090efSLorenzo Bianconi * 1: ACTIVE SCAN 1328399090efSLorenzo Bianconi */ 1329399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 1330399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 1331399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 1332399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 1333399090efSLorenzo Bianconi */ 1334399090efSLorenzo Bianconi u8 ssids_num; 1335399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 1336399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 1337399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 1338399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 1339399090efSLorenzo Bianconi */ 1340399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 1341399090efSLorenzo Bianconi * 1: Support fields after ies. 1342399090efSLorenzo Bianconi */ 1343399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 1344399090efSLorenzo Bianconi __le16 probe_delay_time; 1345399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 1346399090efSLorenzo Bianconi __le16 timeout_value; 1347399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 1348399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 1349399090efSLorenzo Bianconi * 2: Only 5GHz channels 1350399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 1351399090efSLorenzo Bianconi * 4: Specified channels 1352399090efSLorenzo Bianconi * Others: Reserved 1353399090efSLorenzo Bianconi */ 1354399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 1355399090efSLorenzo Bianconi /* valid when channels_num is set */ 1356399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 1357399090efSLorenzo Bianconi __le16 ies_len; 1358399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 1359399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 1360399090efSLorenzo Bianconi u8 ext_channels_num; 1361399090efSLorenzo Bianconi u8 ext_ssids_num; 1362399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 1363399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 1364399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 1365399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1366399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 1367399090efSLorenzo Bianconi u8 pad[63]; 1368399090efSLorenzo Bianconi u8 ssid_type_ext; 1369399090efSLorenzo Bianconi } __packed; 1370399090efSLorenzo Bianconi 1371399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 1372399090efSLorenzo Bianconi 1373399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 1374399090efSLorenzo Bianconi u8 seq_num; 1375399090efSLorenzo Bianconi u8 sparse_channel_num; 1376399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 1377399090efSLorenzo Bianconi u8 complete_channel_num; 1378399090efSLorenzo Bianconi u8 current_state; 1379399090efSLorenzo Bianconi u8 version; 1380399090efSLorenzo Bianconi u8 pad; 1381399090efSLorenzo Bianconi __le32 beacon_scan_num; 1382399090efSLorenzo Bianconi u8 pno_enabled; 1383399090efSLorenzo Bianconi u8 pad2[3]; 1384399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 1385399090efSLorenzo Bianconi u8 pad3[3]; 1386399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1387399090efSLorenzo Bianconi /* idle format for channel_idle_time 1388399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 1389399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 1390399090efSLorenzo Bianconi * 2: dwell time (16us) 1391399090efSLorenzo Bianconi */ 1392399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1393399090efSLorenzo Bianconi /* beacon and probe response count */ 1394399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1395399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1396399090efSLorenzo Bianconi __le32 beacon_2g_num; 1397399090efSLorenzo Bianconi __le32 beacon_5g_num; 1398399090efSLorenzo Bianconi } __packed; 1399399090efSLorenzo Bianconi 1400399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 1401399090efSLorenzo Bianconi u8 version; 1402399090efSLorenzo Bianconi u8 seq_num; 1403399090efSLorenzo Bianconi u8 stop_on_match; 1404399090efSLorenzo Bianconi u8 ssids_num; 1405399090efSLorenzo Bianconi u8 match_num; 1406399090efSLorenzo Bianconi u8 pad; 1407399090efSLorenzo Bianconi __le16 ie_len; 1408399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 1409399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 1410399090efSLorenzo Bianconi u8 channel_type; 1411399090efSLorenzo Bianconi u8 channels_num; 1412399090efSLorenzo Bianconi u8 intervals_num; 14137139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 1414399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 1415abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 14167139b5c0SSean Wang union { 14177139b5c0SSean Wang struct { 14187139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 1419399090efSLorenzo Bianconi u8 pad2[58]; 14207139b5c0SSean Wang } mt7663; 14217139b5c0SSean Wang struct { 14227139b5c0SSean Wang u8 bss_idx; 1423b94c0ed6SDeren Wu u8 pad1[3]; 1424b94c0ed6SDeren Wu __le32 delay; 1425b94c0ed6SDeren Wu u8 pad2[12]; 14269f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 14279f367c81SDeren Wu u8 pad3[38]; 14287139b5c0SSean Wang } mt7921; 14297139b5c0SSean Wang }; 1430399090efSLorenzo Bianconi } __packed; 1431399090efSLorenzo Bianconi 1432399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 1433399090efSLorenzo Bianconi u8 seq_num; 1434399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 1435399090efSLorenzo Bianconi __le16 pad; 1436399090efSLorenzo Bianconi } __packed; 1437399090efSLorenzo Bianconi 1438b4b880b9SYN Chen struct bss_info_uni_bss_color { 1439b4b880b9SYN Chen __le16 tag; 1440b4b880b9SYN Chen __le16 len; 1441b4b880b9SYN Chen u8 enable; 1442b4b880b9SYN Chen u8 bss_color; 1443b4b880b9SYN Chen u8 rsv[2]; 1444b4b880b9SYN Chen } __packed; 1445b4b880b9SYN Chen 1446d0e274afSLorenzo Bianconi struct bss_info_uni_he { 1447d0e274afSLorenzo Bianconi __le16 tag; 1448d0e274afSLorenzo Bianconi __le16 len; 1449d0e274afSLorenzo Bianconi __le16 he_rts_thres; 1450d0e274afSLorenzo Bianconi u8 he_pe_duration; 1451d0e274afSLorenzo Bianconi u8 su_disable; 1452d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 1453d0e274afSLorenzo Bianconi u8 rsv[2]; 1454d0e274afSLorenzo Bianconi } __packed; 1455d0e274afSLorenzo Bianconi 145655d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 145755d4c19cSLorenzo Bianconi __le16 tag; 145855d4c19cSLorenzo Bianconi __le16 len; 145955d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 146055d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 146155d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 146255d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 146355d4c19cSLorenzo Bianconi * 1: rekey offload disable 146455d4c19cSLorenzo Bianconi * 2: rekey update 146555d4c19cSLorenzo Bianconi */ 146655d4c19cSLorenzo Bianconi u8 keyid; 1467d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 1468d741abeaSLeon Yen u8 pad[1]; 146955d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 147055d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 147155d4c19cSLorenzo Bianconi __le32 group_cipher; 147255d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 147355d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 1474d741abeaSLeon Yen u8 reserverd[4]; 147555d4c19cSLorenzo Bianconi } __packed; 147655d4c19cSLorenzo Bianconi 147755d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 147855d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 147955d4c19cSLorenzo Bianconi 148055d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 148155d4c19cSLorenzo Bianconi __le16 tag; 148255d4c19cSLorenzo Bianconi __le16 len; 148355d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 148455d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 148555d4c19cSLorenzo Bianconi * 1: enable 148655d4c19cSLorenzo Bianconi */ 148755d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 148855d4c19cSLorenzo Bianconi u8 pad; 148955d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 149055d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 149155d4c19cSLorenzo Bianconi u8 rsv[4]; 149255d4c19cSLorenzo Bianconi } __packed; 149355d4c19cSLorenzo Bianconi 149455d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 149555d4c19cSLorenzo Bianconi __le16 tag; 149655d4c19cSLorenzo Bianconi __le16 len; 149755d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 149855d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 149955d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 150055d4c19cSLorenzo Bianconi */ 150155d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 150255d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 150355d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 150455d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 150555d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 150655d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 150755d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 150855d4c19cSLorenzo Bianconi */ 150955d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 151055d4c19cSLorenzo Bianconi * 0x1: HIF_USB 151155d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 151255d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 151355d4c19cSLorenzo Bianconi */ 151455d4c19cSLorenzo Bianconi u8 pad; 151555d4c19cSLorenzo Bianconi u8 rsv[4]; 151655d4c19cSLorenzo Bianconi } __packed; 151755d4c19cSLorenzo Bianconi 151855d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 151955d4c19cSLorenzo Bianconi __le16 tag; 152055d4c19cSLorenzo Bianconi __le16 len; 152155d4c19cSLorenzo Bianconi u8 gpio_pin; 152255d4c19cSLorenzo Bianconi u8 trigger_lvl; 152355d4c19cSLorenzo Bianconi u8 pad[2]; 152455d4c19cSLorenzo Bianconi __le32 gpio_interval; 152555d4c19cSLorenzo Bianconi u8 rsv[4]; 152655d4c19cSLorenzo Bianconi } __packed; 152755d4c19cSLorenzo Bianconi 152855d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 152955d4c19cSLorenzo Bianconi __le16 tag; 153055d4c19cSLorenzo Bianconi __le16 len; 153155d4c19cSLorenzo Bianconi u8 mode; 153255d4c19cSLorenzo Bianconi u8 ips_num; 153355d4c19cSLorenzo Bianconi u8 option; 153455d4c19cSLorenzo Bianconi u8 pad[1]; 153555d4c19cSLorenzo Bianconi } __packed; 153655d4c19cSLorenzo Bianconi 153755d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 153855d4c19cSLorenzo Bianconi __le16 tag; 153955d4c19cSLorenzo Bianconi __le16 len; 154055d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 154155d4c19cSLorenzo Bianconi * 1: suspend mode enabled 154255d4c19cSLorenzo Bianconi */ 154355d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 154455d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 154555d4c19cSLorenzo Bianconi * 1: update by wow dtim 154655d4c19cSLorenzo Bianconi */ 154755d4c19cSLorenzo Bianconi u8 pad[5]; 154855d4c19cSLorenzo Bianconi } __packed; 154955d4c19cSLorenzo Bianconi 1550f5056657SSean Wang enum mt76_sta_info_state { 1551f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 1552f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 1553f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 1554f5056657SSean Wang }; 1555f5056657SSean Wang 15565802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 15575802106fSLorenzo Bianconi struct ieee80211_sta *sta; 15585802106fSLorenzo Bianconi struct mt76_wcid *wcid; 15595802106fSLorenzo Bianconi 15605802106fSLorenzo Bianconi struct ieee80211_vif *vif; 15615802106fSLorenzo Bianconi 156282453b1cSLorenzo Bianconi bool offload_fw; 15635802106fSLorenzo Bianconi bool enable; 1564f5056657SSean Wang bool newly; 15655802106fSLorenzo Bianconi int cmd; 15665802106fSLorenzo Bianconi u8 rcpi; 1567f5056657SSean Wang u8 state; 15685802106fSLorenzo Bianconi }; 15695802106fSLorenzo Bianconi 157018369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 157118369a4fSLorenzo Bianconi 157218369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 157318369a4fSLorenzo Bianconi u8 channel; 157418369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 157518369a4fSLorenzo Bianconi } __packed; 157618369a4fSLorenzo Bianconi 157718369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 157818369a4fSLorenzo Bianconi /* DW0 - common info*/ 157918369a4fSLorenzo Bianconi u8 ver; 158018369a4fSLorenzo Bianconi u8 pad0; 158118369a4fSLorenzo Bianconi __le16 len; 158218369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 158318369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 15849b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 158518369a4fSLorenzo Bianconi u8 last_msg; 158618369a4fSLorenzo Bianconi u8 pad1; 158718369a4fSLorenzo Bianconi /* DW3 */ 158818369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 158918369a4fSLorenzo Bianconi u8 pad2[32]; 159018369a4fSLorenzo Bianconi } __packed; 159118369a4fSLorenzo Bianconi 1592c0b21255SSean Wang struct mt76_connac_config { 1593c0b21255SSean Wang __le16 id; 1594c0b21255SSean Wang u8 type; 1595c0b21255SSean Wang u8 resp_type; 1596c0b21255SSean Wang __le16 data_size; 1597c0b21255SSean Wang __le16 resv; 1598c0b21255SSean Wang u8 data[320]; 1599c0b21255SSean Wang } __packed; 1600c0b21255SSean Wang 160109c874a1SLorenzo Bianconi static inline enum mcu_cipher_type 160209c874a1SLorenzo Bianconi mt76_connac_mcu_get_cipher(int cipher) 160309c874a1SLorenzo Bianconi { 160409c874a1SLorenzo Bianconi switch (cipher) { 160509c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP40: 160609c874a1SLorenzo Bianconi return MCU_CIPHER_WEP40; 160709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP104: 160809c874a1SLorenzo Bianconi return MCU_CIPHER_WEP104; 160909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_TKIP: 161009c874a1SLorenzo Bianconi return MCU_CIPHER_TKIP; 161109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_AES_CMAC: 161209c874a1SLorenzo Bianconi return MCU_CIPHER_BIP_CMAC_128; 161309c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP: 161409c874a1SLorenzo Bianconi return MCU_CIPHER_AES_CCMP; 161509c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP_256: 161609c874a1SLorenzo Bianconi return MCU_CIPHER_CCMP_256; 161709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP: 161809c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP; 161909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP_256: 162009c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP_256; 162109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_SMS4: 162209c874a1SLorenzo Bianconi return MCU_CIPHER_WAPI; 162309c874a1SLorenzo Bianconi default: 162409c874a1SLorenzo Bianconi return MCU_CIPHER_NONE; 162509c874a1SLorenzo Bianconi } 162609c874a1SLorenzo Bianconi } 162709c874a1SLorenzo Bianconi 16289e90c351SLorenzo Bianconi static inline u32 16299e90c351SLorenzo Bianconi mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa) 16309e90c351SLorenzo Bianconi { 16319e90c351SLorenzo Bianconi u32 ret = 0; 16329e90c351SLorenzo Bianconi 16339e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_SET_ENCRYPT ? 16349e90c351SLorenzo Bianconi DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0; 16359e90c351SLorenzo Bianconi if (is_mt7921(dev)) 16369e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_ENCRY_MODE ? 16379e90c351SLorenzo Bianconi DL_CONFIG_ENCRY_MODE_SEL : 0; 16389e90c351SLorenzo Bianconi ret |= FIELD_PREP(DL_MODE_KEY_IDX, 16399e90c351SLorenzo Bianconi FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 16409e90c351SLorenzo Bianconi ret |= DL_MODE_NEED_RSP; 16419e90c351SLorenzo Bianconi ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; 16429e90c351SLorenzo Bianconi 16439e90c351SLorenzo Bianconi return ret; 16449e90c351SLorenzo Bianconi } 16459e90c351SLorenzo Bianconi 164667aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 164767aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 164867aa2743SLorenzo Bianconi 164967aa2743SLorenzo Bianconi static inline void 165067aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 165167aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 165267aa2743SLorenzo Bianconi { 165367aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 165467aa2743SLorenzo Bianconi 16552fec2ea6SLorenzo Bianconi if (!is_connac_v1(dev)) { 165667aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 165767aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 165867aa2743SLorenzo Bianconi } else { 165967aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 166067aa2743SLorenzo Bianconi } 166167aa2743SLorenzo Bianconi } 166267aa2743SLorenzo Bianconi 1663d0e274afSLorenzo Bianconi struct sk_buff * 1664e2c93b68SLorenzo Bianconi __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1665e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid, int len); 1666e2c93b68SLorenzo Bianconi static inline struct sk_buff * 1667d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1668e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid) 1669e2c93b68SLorenzo Bianconi { 1670e2c93b68SLorenzo Bianconi return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 1671e2c93b68SLorenzo Bianconi MT76_CONNAC_STA_UPDATE_MAX_SIZE); 1672e2c93b68SLorenzo Bianconi } 1673e2c93b68SLorenzo Bianconi 1674d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1675d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1676d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1677d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1678d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1679d0e274afSLorenzo Bianconi void *sta_wtbl); 1680d0e274afSLorenzo Bianconi static inline struct tlv * 1681d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1682d0e274afSLorenzo Bianconi { 1683d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1684d0e274afSLorenzo Bianconi } 1685d0e274afSLorenzo Bianconi 1686d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1687d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1688d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1689d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1690f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1691f5056657SSean Wang bool newly); 1692d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1693d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1694d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1695d0e274afSLorenzo Bianconi void *wtbl_tlv); 1696d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1697868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 169866978204SFelix Fietkau struct mt76_wcid *wcid, 1699d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 170024299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 170124299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 170224299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 17035a521c0fSLorenzo Bianconi int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 17045a521c0fSLorenzo Bianconi struct ieee80211_vif *vif, 17055a521c0fSLorenzo Bianconi struct ieee80211_sta *sta); 1706d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1707d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 17085802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1709f5056657SSean Wang u8 rcpi, u8 state); 1710d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1711d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1712499da720SMeiChia Chiu void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc); 1713d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1714d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1715d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1716d0e274afSLorenzo Bianconi void *wtbl_tlv); 1717d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1718d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1719d0e274afSLorenzo Bianconi bool enable, bool tx); 1720d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1721d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1722d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1723d0e274afSLorenzo Bianconi bool enable); 1724d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1725d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1726b5322e44SLorenzo Bianconi int cmd, bool enable, bool tx); 1727d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1728d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1729d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1730d0e274afSLorenzo Bianconi bool enable); 1731f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 17325802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1733d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1734d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1735d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1736d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1737d0e274afSLorenzo Bianconi bool hdr_trans); 1738d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1739d0e274afSLorenzo Bianconi u32 mode); 1740d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1741d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1742d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1743f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1744d0e274afSLorenzo Bianconi 1745399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1746399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1747399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1748399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1749399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1750399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1751399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1752399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1753399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1754399090efSLorenzo Bianconi bool enable); 1755f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1756f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1757f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 175855d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 175955d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 176055d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 176155d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 176255d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 176355d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1764f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1765f5056657SSean Wang enum ieee80211_sta_state old_state, 1766f5056657SSean Wang enum ieee80211_sta_state new_state); 17670da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1768c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 17690da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 17700da3c795SSean Wang struct mt76_connac_coredump *coredump); 177118369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 17721f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 17731f832887SLorenzo Bianconi struct ieee80211_vif *vif); 177487f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 177587f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1776e6d557a7SLorenzo Bianconi 1777e6d557a7SLorenzo Bianconi const struct ieee80211_sta_he_cap * 1778e6d557a7SLorenzo Bianconi mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); 1779e6d557a7SLorenzo Bianconi u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1780e6d557a7SLorenzo Bianconi enum nl80211_band band, struct ieee80211_sta *sta); 17816683d988SLorenzo Bianconi 17826683d988SLorenzo Bianconi int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 17836683d988SLorenzo Bianconi struct mt76_connac_sta_key_conf *sta_key_conf, 17846683d988SLorenzo Bianconi struct ieee80211_key_conf *key, int mcu_cmd, 17856683d988SLorenzo Bianconi struct mt76_wcid *wcid, enum set_key_cmd cmd); 178654735e11SLorenzo Bianconi 178764f4e823SLorenzo Bianconi void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif); 178854735e11SLorenzo Bianconi void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 178954735e11SLorenzo Bianconi struct ieee80211_vif *vif); 179049126ac1SLorenzo Bianconi int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 179149126ac1SLorenzo Bianconi struct ieee80211_vif *vif, 179249126ac1SLorenzo Bianconi struct ieee80211_sta *sta, 179395b5946eSChad Monroe struct mt76_phy *phy, u16 wlan_idx, 179449126ac1SLorenzo Bianconi bool enable); 1795836c0c98SLorenzo Bianconi void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 1796836c0c98SLorenzo Bianconi struct ieee80211_sta *sta); 17972557e568SLorenzo Bianconi void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 17982557e568SLorenzo Bianconi struct ieee80211_sta *sta, 17992557e568SLorenzo Bianconi void *sta_wtbl, void *wtbl_tlv); 180048d743d1SLorenzo Bianconi int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); 1801ae90bdd6SLorenzo Bianconi int mt76_connac_mcu_restart(struct mt76_dev *dev); 180297cef84dSLorenzo Bianconi int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 180397cef84dSLorenzo Bianconi u8 rx_sel, u8 val); 1804b9ec2710SLorenzo Bianconi int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 1805b9ec2710SLorenzo Bianconi const char *fw_wa); 180628fec923SLorenzo Bianconi int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name); 1807d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1808