1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 9d0e274afSLorenzo Bianconi struct tlv { 10d0e274afSLorenzo Bianconi __le16 tag; 11d0e274afSLorenzo Bianconi __le16 len; 12d0e274afSLorenzo Bianconi } __packed; 13d0e274afSLorenzo Bianconi 14d0e274afSLorenzo Bianconi /* sta_rec */ 15d0e274afSLorenzo Bianconi 16d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 17d0e274afSLorenzo Bianconi u8 rsv[2]; 18d0e274afSLorenzo Bianconi __le16 tlv_num; 19d0e274afSLorenzo Bianconi } __packed; 20d0e274afSLorenzo Bianconi 21d0e274afSLorenzo Bianconi struct sta_req_hdr { 22d0e274afSLorenzo Bianconi u8 bss_idx; 23d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 24d0e274afSLorenzo Bianconi __le16 tlv_num; 25d0e274afSLorenzo Bianconi u8 is_tlv_append; 26d0e274afSLorenzo Bianconi u8 muar_idx; 27d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 28d0e274afSLorenzo Bianconi u8 rsv; 29d0e274afSLorenzo Bianconi } __packed; 30d0e274afSLorenzo Bianconi 31d0e274afSLorenzo Bianconi struct sta_rec_basic { 32d0e274afSLorenzo Bianconi __le16 tag; 33d0e274afSLorenzo Bianconi __le16 len; 34d0e274afSLorenzo Bianconi __le32 conn_type; 35d0e274afSLorenzo Bianconi u8 conn_state; 36d0e274afSLorenzo Bianconi u8 qos; 37d0e274afSLorenzo Bianconi __le16 aid; 38d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 39d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 40d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 41d0e274afSLorenzo Bianconi __le16 extra_info; 42d0e274afSLorenzo Bianconi } __packed; 43d0e274afSLorenzo Bianconi 44d0e274afSLorenzo Bianconi struct sta_rec_ht { 45d0e274afSLorenzo Bianconi __le16 tag; 46d0e274afSLorenzo Bianconi __le16 len; 47d0e274afSLorenzo Bianconi __le16 ht_cap; 48d0e274afSLorenzo Bianconi u16 rsv; 49d0e274afSLorenzo Bianconi } __packed; 50d0e274afSLorenzo Bianconi 51d0e274afSLorenzo Bianconi struct sta_rec_vht { 52d0e274afSLorenzo Bianconi __le16 tag; 53d0e274afSLorenzo Bianconi __le16 len; 54d0e274afSLorenzo Bianconi __le32 vht_cap; 55d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 56d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 57d0e274afSLorenzo Bianconi /* mt7921 */ 58d0e274afSLorenzo Bianconi u8 rts_bw_sig; 59d0e274afSLorenzo Bianconi u8 rsv[3]; 60d0e274afSLorenzo Bianconi } __packed; 61d0e274afSLorenzo Bianconi 62d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 63d0e274afSLorenzo Bianconi __le16 tag; 64d0e274afSLorenzo Bianconi __le16 len; 65d0e274afSLorenzo Bianconi u8 dac_map; 66d0e274afSLorenzo Bianconi u8 tac_map; 67d0e274afSLorenzo Bianconi u8 max_sp; 68d0e274afSLorenzo Bianconi u8 rsv0; 69d0e274afSLorenzo Bianconi __le16 listen_interval; 70d0e274afSLorenzo Bianconi u8 rsv1[2]; 71d0e274afSLorenzo Bianconi } __packed; 72d0e274afSLorenzo Bianconi 73d0e274afSLorenzo Bianconi struct sta_rec_ba { 74d0e274afSLorenzo Bianconi __le16 tag; 75d0e274afSLorenzo Bianconi __le16 len; 76d0e274afSLorenzo Bianconi u8 tid; 77d0e274afSLorenzo Bianconi u8 ba_type; 78d0e274afSLorenzo Bianconi u8 amsdu; 79d0e274afSLorenzo Bianconi u8 ba_en; 80d0e274afSLorenzo Bianconi __le16 ssn; 81d0e274afSLorenzo Bianconi __le16 winsize; 82d0e274afSLorenzo Bianconi } __packed; 83d0e274afSLorenzo Bianconi 84d0e274afSLorenzo Bianconi struct sta_rec_he { 85d0e274afSLorenzo Bianconi __le16 tag; 86d0e274afSLorenzo Bianconi __le16 len; 87d0e274afSLorenzo Bianconi 88d0e274afSLorenzo Bianconi __le32 he_cap; 89d0e274afSLorenzo Bianconi 90d0e274afSLorenzo Bianconi u8 t_frame_dur; 91d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 92d0e274afSLorenzo Bianconi u8 bw_set; 93d0e274afSLorenzo Bianconi u8 device_class; 94d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 95d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 96d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 97d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 98d0e274afSLorenzo Bianconi u8 dcm_max_ru; 99d0e274afSLorenzo Bianconi u8 punc_pream_rx; 100d0e274afSLorenzo Bianconi u8 pkt_ext; 101d0e274afSLorenzo Bianconi u8 rsv1; 102d0e274afSLorenzo Bianconi 103d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 104d0e274afSLorenzo Bianconi 105d0e274afSLorenzo Bianconi u8 rsv2[2]; 106d0e274afSLorenzo Bianconi } __packed; 107d0e274afSLorenzo Bianconi 108d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 109d0e274afSLorenzo Bianconi __le16 tag; 110d0e274afSLorenzo Bianconi __le16 len; 111d0e274afSLorenzo Bianconi u8 max_amsdu_num; 112d0e274afSLorenzo Bianconi u8 max_mpdu_size; 113d0e274afSLorenzo Bianconi u8 amsdu_en; 114d0e274afSLorenzo Bianconi u8 rsv; 115d0e274afSLorenzo Bianconi } __packed; 116d0e274afSLorenzo Bianconi 117d0e274afSLorenzo Bianconi struct sta_rec_state { 118d0e274afSLorenzo Bianconi __le16 tag; 119d0e274afSLorenzo Bianconi __le16 len; 120d0e274afSLorenzo Bianconi __le32 flags; 121d0e274afSLorenzo Bianconi u8 state; 122d0e274afSLorenzo Bianconi u8 vht_opmode; 123d0e274afSLorenzo Bianconi u8 action; 124d0e274afSLorenzo Bianconi u8 rsv[1]; 125d0e274afSLorenzo Bianconi } __packed; 126d0e274afSLorenzo Bianconi 127d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 128d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 129d0e274afSLorenzo Bianconi __le16 tag; 130d0e274afSLorenzo Bianconi __le16 len; 131d0e274afSLorenzo Bianconi __le16 legacy; 132d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 133d0e274afSLorenzo Bianconi } __packed; 134d0e274afSLorenzo Bianconi 135d0e274afSLorenzo Bianconi struct sta_rec_phy { 136d0e274afSLorenzo Bianconi __le16 tag; 137d0e274afSLorenzo Bianconi __le16 len; 138d0e274afSLorenzo Bianconi __le16 basic_rate; 139d0e274afSLorenzo Bianconi u8 phy_type; 140d0e274afSLorenzo Bianconi u8 ampdu; 141d0e274afSLorenzo Bianconi u8 rts_policy; 142d0e274afSLorenzo Bianconi u8 rcpi; 143d0e274afSLorenzo Bianconi u8 rsv[2]; 144d0e274afSLorenzo Bianconi } __packed; 145d0e274afSLorenzo Bianconi 146d0e274afSLorenzo Bianconi /* wtbl_rec */ 147d0e274afSLorenzo Bianconi 148d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 149d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 150d0e274afSLorenzo Bianconi u8 operation; 151d0e274afSLorenzo Bianconi __le16 tlv_num; 152d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 153d0e274afSLorenzo Bianconi u8 rsv[3]; 154d0e274afSLorenzo Bianconi } __packed; 155d0e274afSLorenzo Bianconi 156d0e274afSLorenzo Bianconi struct wtbl_generic { 157d0e274afSLorenzo Bianconi __le16 tag; 158d0e274afSLorenzo Bianconi __le16 len; 159d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 160d0e274afSLorenzo Bianconi u8 muar_idx; 161d0e274afSLorenzo Bianconi u8 skip_tx; 162d0e274afSLorenzo Bianconi u8 cf_ack; 163d0e274afSLorenzo Bianconi u8 qos; 164d0e274afSLorenzo Bianconi u8 mesh; 165d0e274afSLorenzo Bianconi u8 adm; 166d0e274afSLorenzo Bianconi __le16 partial_aid; 167d0e274afSLorenzo Bianconi u8 baf_en; 168d0e274afSLorenzo Bianconi u8 aad_om; 169d0e274afSLorenzo Bianconi } __packed; 170d0e274afSLorenzo Bianconi 171d0e274afSLorenzo Bianconi struct wtbl_rx { 172d0e274afSLorenzo Bianconi __le16 tag; 173d0e274afSLorenzo Bianconi __le16 len; 174d0e274afSLorenzo Bianconi u8 rcid; 175d0e274afSLorenzo Bianconi u8 rca1; 176d0e274afSLorenzo Bianconi u8 rca2; 177d0e274afSLorenzo Bianconi u8 rv; 178d0e274afSLorenzo Bianconi u8 rsv[4]; 179d0e274afSLorenzo Bianconi } __packed; 180d0e274afSLorenzo Bianconi 181d0e274afSLorenzo Bianconi struct wtbl_ht { 182d0e274afSLorenzo Bianconi __le16 tag; 183d0e274afSLorenzo Bianconi __le16 len; 184d0e274afSLorenzo Bianconi u8 ht; 185d0e274afSLorenzo Bianconi u8 ldpc; 186d0e274afSLorenzo Bianconi u8 af; 187d0e274afSLorenzo Bianconi u8 mm; 188d0e274afSLorenzo Bianconi u8 rsv[4]; 189d0e274afSLorenzo Bianconi } __packed; 190d0e274afSLorenzo Bianconi 191d0e274afSLorenzo Bianconi struct wtbl_vht { 192d0e274afSLorenzo Bianconi __le16 tag; 193d0e274afSLorenzo Bianconi __le16 len; 194d0e274afSLorenzo Bianconi u8 ldpc; 195d0e274afSLorenzo Bianconi u8 dyn_bw; 196d0e274afSLorenzo Bianconi u8 vht; 197d0e274afSLorenzo Bianconi u8 txop_ps; 198d0e274afSLorenzo Bianconi u8 rsv[4]; 199d0e274afSLorenzo Bianconi } __packed; 200d0e274afSLorenzo Bianconi 201d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 202d0e274afSLorenzo Bianconi __le16 tag; 203d0e274afSLorenzo Bianconi __le16 len; 204d0e274afSLorenzo Bianconi u8 txps; 205d0e274afSLorenzo Bianconi u8 rsv[3]; 206d0e274afSLorenzo Bianconi } __packed; 207d0e274afSLorenzo Bianconi 208d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 209d0e274afSLorenzo Bianconi __le16 tag; 210d0e274afSLorenzo Bianconi __le16 len; 211d0e274afSLorenzo Bianconi u8 to_ds; 212d0e274afSLorenzo Bianconi u8 from_ds; 213d4b98c63SRyder Lee u8 no_rx_trans; 214d0e274afSLorenzo Bianconi u8 rsv; 215d0e274afSLorenzo Bianconi } __packed; 216d0e274afSLorenzo Bianconi 217d0e274afSLorenzo Bianconi struct wtbl_ba { 218d0e274afSLorenzo Bianconi __le16 tag; 219d0e274afSLorenzo Bianconi __le16 len; 220d0e274afSLorenzo Bianconi /* common */ 221d0e274afSLorenzo Bianconi u8 tid; 222d0e274afSLorenzo Bianconi u8 ba_type; 223d0e274afSLorenzo Bianconi u8 rsv0[2]; 224d0e274afSLorenzo Bianconi /* originator only */ 225d0e274afSLorenzo Bianconi __le16 sn; 226d0e274afSLorenzo Bianconi u8 ba_en; 227d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 228d0e274afSLorenzo Bianconi __le16 ba_winsize; 229d0e274afSLorenzo Bianconi /* recipient only */ 230d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 231d0e274afSLorenzo Bianconi u8 rst_ba_tid; 232d0e274afSLorenzo Bianconi u8 rst_ba_sel; 233d0e274afSLorenzo Bianconi u8 rst_ba_sb; 234d0e274afSLorenzo Bianconi u8 band_idx; 235d0e274afSLorenzo Bianconi u8 rsv1[4]; 236d0e274afSLorenzo Bianconi } __packed; 237d0e274afSLorenzo Bianconi 238d0e274afSLorenzo Bianconi struct wtbl_smps { 239d0e274afSLorenzo Bianconi __le16 tag; 240d0e274afSLorenzo Bianconi __le16 len; 241d0e274afSLorenzo Bianconi u8 smps; 242d0e274afSLorenzo Bianconi u8 rsv[3]; 243d0e274afSLorenzo Bianconi } __packed; 244d0e274afSLorenzo Bianconi 245d0e274afSLorenzo Bianconi /* mt7615 only */ 246d0e274afSLorenzo Bianconi 247d0e274afSLorenzo Bianconi struct wtbl_bf { 248d0e274afSLorenzo Bianconi __le16 tag; 249d0e274afSLorenzo Bianconi __le16 len; 250d0e274afSLorenzo Bianconi u8 ibf; 251d0e274afSLorenzo Bianconi u8 ebf; 252d0e274afSLorenzo Bianconi u8 ibf_vht; 253d0e274afSLorenzo Bianconi u8 ebf_vht; 254d0e274afSLorenzo Bianconi u8 gid; 255d0e274afSLorenzo Bianconi u8 pfmu_idx; 256d0e274afSLorenzo Bianconi u8 rsv[2]; 257d0e274afSLorenzo Bianconi } __packed; 258d0e274afSLorenzo Bianconi 259d0e274afSLorenzo Bianconi struct wtbl_pn { 260d0e274afSLorenzo Bianconi __le16 tag; 261d0e274afSLorenzo Bianconi __le16 len; 262d0e274afSLorenzo Bianconi u8 pn[6]; 263d0e274afSLorenzo Bianconi u8 rsv[2]; 264d0e274afSLorenzo Bianconi } __packed; 265d0e274afSLorenzo Bianconi 266d0e274afSLorenzo Bianconi struct wtbl_spe { 267d0e274afSLorenzo Bianconi __le16 tag; 268d0e274afSLorenzo Bianconi __le16 len; 269d0e274afSLorenzo Bianconi u8 spe_idx; 270d0e274afSLorenzo Bianconi u8 rsv[3]; 271d0e274afSLorenzo Bianconi } __packed; 272d0e274afSLorenzo Bianconi 273d0e274afSLorenzo Bianconi struct wtbl_raw { 274d0e274afSLorenzo Bianconi __le16 tag; 275d0e274afSLorenzo Bianconi __le16 len; 276d0e274afSLorenzo Bianconi u8 wtbl_idx; 277d0e274afSLorenzo Bianconi u8 dw; 278d0e274afSLorenzo Bianconi u8 rsv[2]; 279d0e274afSLorenzo Bianconi __le32 msk; 280d0e274afSLorenzo Bianconi __le32 val; 281d0e274afSLorenzo Bianconi } __packed; 282d0e274afSLorenzo Bianconi 283d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 284d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 285d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 286d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 287d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 288d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 289d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 290d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 291d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 292d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 293d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 294d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 295d0e274afSLorenzo Bianconi 296d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 297d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 298d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 299d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 300d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 301d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 302d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 303d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 304d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 305d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 306d0e274afSLorenzo Bianconi 307d0e274afSLorenzo Bianconi enum { 308d0e274afSLorenzo Bianconi STA_REC_BASIC, 309d0e274afSLorenzo Bianconi STA_REC_RA, 310d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 311d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 312d0e274afSLorenzo Bianconi STA_REC_BF, 313d0e274afSLorenzo Bianconi STA_REC_AMSDU, 314d0e274afSLorenzo Bianconi STA_REC_BA, 315d0e274afSLorenzo Bianconi STA_REC_STATE, 316d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 317d0e274afSLorenzo Bianconi STA_REC_HT, 318d0e274afSLorenzo Bianconi STA_REC_VHT, 319d0e274afSLorenzo Bianconi STA_REC_APPS, 320d0e274afSLorenzo Bianconi STA_REC_KEY, 321d0e274afSLorenzo Bianconi STA_REC_WTBL, 322d0e274afSLorenzo Bianconi STA_REC_HE, 323d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 324d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 325d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 326d0e274afSLorenzo Bianconi STA_REC_MURU, 327d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 328d0e274afSLorenzo Bianconi STA_REC_BFEE, 329d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 330d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 331d0e274afSLorenzo Bianconi }; 332d0e274afSLorenzo Bianconi 333d0e274afSLorenzo Bianconi enum { 334d0e274afSLorenzo Bianconi WTBL_GENERIC, 335d0e274afSLorenzo Bianconi WTBL_RX, 336d0e274afSLorenzo Bianconi WTBL_HT, 337d0e274afSLorenzo Bianconi WTBL_VHT, 338d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 339d0e274afSLorenzo Bianconi WTBL_TX_PS, 340d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 341d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 342d0e274afSLorenzo Bianconi WTBL_BA, 343d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 344d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 345d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 346d0e274afSLorenzo Bianconi WTBL_BF, 347d0e274afSLorenzo Bianconi WTBL_SMPS, 348d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 349d0e274afSLorenzo Bianconi WTBL_PN, 350d0e274afSLorenzo Bianconi WTBL_SPE, 351d0e274afSLorenzo Bianconi WTBL_MAX_NUM 352d0e274afSLorenzo Bianconi }; 353d0e274afSLorenzo Bianconi 354d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 355d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 356d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 357d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 358d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 359d0e274afSLorenzo Bianconi 360d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 361d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 362d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 363d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 364d0e274afSLorenzo Bianconi 3654da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 3664da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 3674da64fe0SSean Wang 368d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 369d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 370d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 371d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 372d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 373d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 374d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 375d0e274afSLorenzo Bianconi 376d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 377d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 378d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 379d0e274afSLorenzo Bianconi 380d0e274afSLorenzo Bianconi /* HE MAC */ 381d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 382d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 383d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 384d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 385d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 386d0e274afSLorenzo Bianconi /* HE PHY */ 387d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 388d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 389d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 390d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 391d0e274afSLorenzo Bianconi /* STBC */ 392d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 393d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 394d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 395d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 396d0e274afSLorenzo Bianconi /* GI */ 397d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 398d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 399d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 400d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 401d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 402d0e274afSLorenzo Bianconi /* 242 TONE */ 403d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 404d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 405d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 406d0e274afSLorenzo Bianconi 407d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 408d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 409d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 410d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 411d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 412d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 413d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 414d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 415d0e274afSLorenzo Bianconi #define PHY_MODE_AX_6G BIT(8) 416d0e274afSLorenzo Bianconi 417d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 418d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 419d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 420d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 421d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 422d0e274afSLorenzo Bianconi 423d0e274afSLorenzo Bianconi enum { 424d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 425d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 426d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 427d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 428d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 429d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 430d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 431d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 432d0e274afSLorenzo Bianconi }; 433d0e274afSLorenzo Bianconi 434d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 435d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 436d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 437d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 438d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 439d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 440d0e274afSLorenzo Bianconi 441d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 442d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 443d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 444d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 445d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 446d0e274afSLorenzo Bianconi 447d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 448d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 449d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 450d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 451d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 452d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 453d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 454d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 455d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 456d0e274afSLorenzo Bianconi 457d0e274afSLorenzo Bianconi enum { 458d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 459d0e274afSLorenzo Bianconi WTBL_SET, 460d0e274afSLorenzo Bianconi WTBL_QUERY, 461d0e274afSLorenzo Bianconi WTBL_RESET_ALL 462d0e274afSLorenzo Bianconi }; 463d0e274afSLorenzo Bianconi 464d0e274afSLorenzo Bianconi enum { 465d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 466d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 467d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 468d0e274afSLorenzo Bianconi }; 469d0e274afSLorenzo Bianconi 470d0e274afSLorenzo Bianconi enum { 471d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 472d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 473d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 474d0e274afSLorenzo Bianconi }; 475d0e274afSLorenzo Bianconi 476d0e274afSLorenzo Bianconi enum { 477d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 478d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 479d0e274afSLorenzo Bianconi }; 480d0e274afSLorenzo Bianconi 481d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 482d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 483d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 484d0e274afSLorenzo Bianconi 485d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 486d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 487d0e274afSLorenzo Bianconi 488d0e274afSLorenzo Bianconi #define MCU_FW_PREFIX BIT(31) 489d0e274afSLorenzo Bianconi #define MCU_UNI_PREFIX BIT(30) 490d0e274afSLorenzo Bianconi #define MCU_CE_PREFIX BIT(29) 491d0e274afSLorenzo Bianconi #define MCU_QUERY_PREFIX BIT(28) 492d0e274afSLorenzo Bianconi #define MCU_CMD_MASK ~(MCU_FW_PREFIX | MCU_UNI_PREFIX | \ 493d0e274afSLorenzo Bianconi MCU_CE_PREFIX | MCU_QUERY_PREFIX) 494d0e274afSLorenzo Bianconi 495d0e274afSLorenzo Bianconi #define MCU_QUERY_MASK BIT(16) 496d0e274afSLorenzo Bianconi 497d0e274afSLorenzo Bianconi enum { 498d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 499d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 500d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 501d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 502d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 503d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 504d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 505d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 506d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 507d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 508d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 509d0e274afSLorenzo Bianconi MCU_EXT_CMD_GET_TEMP = 0x2c, 510d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 511d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 512d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 513d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 514d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 515d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 516d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 517d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 518d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 519d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 520d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 521d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 522d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 523d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x7c, 524d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 525d0e274afSLorenzo Bianconi }; 526d0e274afSLorenzo Bianconi 527d0e274afSLorenzo Bianconi enum { 528d0e274afSLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = MCU_UNI_PREFIX | 0x01, 529d0e274afSLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = MCU_UNI_PREFIX | 0x02, 530d0e274afSLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = MCU_UNI_PREFIX | 0x03, 531d0e274afSLorenzo Bianconi MCU_UNI_CMD_SUSPEND = MCU_UNI_PREFIX | 0x05, 532d0e274afSLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = MCU_UNI_PREFIX | 0x06, 533d0e274afSLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = MCU_UNI_PREFIX | 0x07, 534d0e274afSLorenzo Bianconi }; 535d0e274afSLorenzo Bianconi 536d0e274afSLorenzo Bianconi enum { 537d0e274afSLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = MCU_FW_PREFIX | 0x01, 538d0e274afSLorenzo Bianconi MCU_CMD_FW_START_REQ = MCU_FW_PREFIX | 0x02, 539d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 540d0e274afSLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = MCU_FW_PREFIX | 0x4, 541d0e274afSLorenzo Bianconi MCU_CMD_PATCH_START_REQ = MCU_FW_PREFIX | 0x05, 542d0e274afSLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = MCU_FW_PREFIX | 0x07, 543d0e274afSLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = MCU_FW_PREFIX | 0x10, 544d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 545d0e274afSLorenzo Bianconi MCU_CMD_FW_SCATTER = MCU_FW_PREFIX | 0xee, 546d0e274afSLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = MCU_FW_PREFIX | 0xef, 547d0e274afSLorenzo Bianconi }; 548d0e274afSLorenzo Bianconi 549d0e274afSLorenzo Bianconi /* offload mcu commands */ 550d0e274afSLorenzo Bianconi enum { 551d0e274afSLorenzo Bianconi MCU_CMD_START_HW_SCAN = MCU_CE_PREFIX | 0x03, 552d0e274afSLorenzo Bianconi MCU_CMD_SET_PS_PROFILE = MCU_CE_PREFIX | 0x05, 553d0e274afSLorenzo Bianconi MCU_CMD_SET_CHAN_DOMAIN = MCU_CE_PREFIX | 0x0f, 554d0e274afSLorenzo Bianconi MCU_CMD_SET_BSS_CONNECTED = MCU_CE_PREFIX | 0x16, 555d0e274afSLorenzo Bianconi MCU_CMD_SET_BSS_ABORT = MCU_CE_PREFIX | 0x17, 556d0e274afSLorenzo Bianconi MCU_CMD_CANCEL_HW_SCAN = MCU_CE_PREFIX | 0x1b, 557d0e274afSLorenzo Bianconi MCU_CMD_SET_ROC = MCU_CE_PREFIX | 0x1d, 558d0e274afSLorenzo Bianconi MCU_CMD_SET_P2P_OPPPS = MCU_CE_PREFIX | 0x33, 559d0e274afSLorenzo Bianconi MCU_CMD_SET_RATE_TX_POWER = MCU_CE_PREFIX | 0x5d, 560d0e274afSLorenzo Bianconi MCU_CMD_SCHED_SCAN_ENABLE = MCU_CE_PREFIX | 0x61, 561d0e274afSLorenzo Bianconi MCU_CMD_SCHED_SCAN_REQ = MCU_CE_PREFIX | 0x62, 562f7d2958cSLorenzo Bianconi MCU_CMD_GET_NIC_CAPAB = MCU_CE_PREFIX | 0x8a, 563d0e274afSLorenzo Bianconi MCU_CMD_REG_WRITE = MCU_CE_PREFIX | 0xc0, 564d0e274afSLorenzo Bianconi MCU_CMD_REG_READ = MCU_CE_PREFIX | MCU_QUERY_MASK | 0xc0, 5650da3c795SSean Wang MCU_CMD_CHIP_CONFIG = MCU_CE_PREFIX | 0xca, 56667aa2743SLorenzo Bianconi MCU_CMD_FWLOG_2_HOST = MCU_CE_PREFIX | 0xc5, 56767aa2743SLorenzo Bianconi MCU_CMD_GET_WTBL = MCU_CE_PREFIX | 0xcd, 568ea29acc9SSean Wang MCU_CMD_GET_TXPWR = MCU_CE_PREFIX | 0xd0, 569d0e274afSLorenzo Bianconi }; 570d0e274afSLorenzo Bianconi 571d0e274afSLorenzo Bianconi enum { 572d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 573d0e274afSLorenzo Bianconi PATCH_SEM_GET 574d0e274afSLorenzo Bianconi }; 575d0e274afSLorenzo Bianconi 576d0e274afSLorenzo Bianconi enum { 577d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 578d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 579b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 580d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 581d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 582d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 583d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 58467aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 58567aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 586d0e274afSLorenzo Bianconi }; 587d0e274afSLorenzo Bianconi 58855d4c19cSLorenzo Bianconi enum { 58955d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 59055d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 59155d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 59255d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 59355d4c19cSLorenzo Bianconi }; 59455d4c19cSLorenzo Bianconi 595f7d2958cSLorenzo Bianconi enum { 596f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 597f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 598f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 599f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 600f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 601f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 602f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 603f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 604f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 605f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 606f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 607f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 608f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 609f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 610f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 611f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 612f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 613f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 614f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 615f7d2958cSLorenzo Bianconi }; 616f7d2958cSLorenzo Bianconi 617193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 618193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 619193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 620193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 621193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 622193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 623193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 624193e5f22SYN Chen 62555d4c19cSLorenzo Bianconi enum { 62655d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 62755d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 62855d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 62955d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 63055d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 63155d4c19cSLorenzo Bianconi }; 63255d4c19cSLorenzo Bianconi 63355d4c19cSLorenzo Bianconi enum { 63455d4c19cSLorenzo Bianconi WOW_USB = 1, 63555d4c19cSLorenzo Bianconi WOW_PCIE = 2, 63655d4c19cSLorenzo Bianconi WOW_GPIO = 3, 63755d4c19cSLorenzo Bianconi }; 63855d4c19cSLorenzo Bianconi 639d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 640d0e274afSLorenzo Bianconi __le16 tag; 641d0e274afSLorenzo Bianconi __le16 len; 642d0e274afSLorenzo Bianconi u8 active; 643d0e274afSLorenzo Bianconi u8 omac_idx; 644d0e274afSLorenzo Bianconi u8 hw_bss_idx; 645d0e274afSLorenzo Bianconi u8 band_idx; 646d0e274afSLorenzo Bianconi __le32 conn_type; 647d0e274afSLorenzo Bianconi u8 conn_state; 648d0e274afSLorenzo Bianconi u8 wmm_idx; 649d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 650d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 651d0e274afSLorenzo Bianconi __le16 bcn_interval; 652d0e274afSLorenzo Bianconi u8 dtim_period; 653d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 654d0e274afSLorenzo Bianconi * bit(1): B 655d0e274afSLorenzo Bianconi * bit(2): G 656d0e274afSLorenzo Bianconi * bit(3): GN 657d0e274afSLorenzo Bianconi * bit(4): AN 658d0e274afSLorenzo Bianconi * bit(5): AC 659d0e274afSLorenzo Bianconi */ 660d0e274afSLorenzo Bianconi __le16 sta_idx; 661d0e274afSLorenzo Bianconi u8 nonht_basic_phy; 662d0e274afSLorenzo Bianconi u8 pad[3]; 663d0e274afSLorenzo Bianconi } __packed; 664d0e274afSLorenzo Bianconi 665d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 666d0e274afSLorenzo Bianconi __le16 tag; 667d0e274afSLorenzo Bianconi __le16 len; 668d0e274afSLorenzo Bianconi u8 qos; 669d0e274afSLorenzo Bianconi u8 pad[3]; 670d0e274afSLorenzo Bianconi } __packed; 671d0e274afSLorenzo Bianconi 672d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 673d0e274afSLorenzo Bianconi u8 bss_idx; 674d0e274afSLorenzo Bianconi u8 reason; 675d0e274afSLorenzo Bianconi u8 pad[2]; 676d0e274afSLorenzo Bianconi } __packed; 677d0e274afSLorenzo Bianconi 678d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 679d0e274afSLorenzo Bianconi u8 bss_idx; 680d0e274afSLorenzo Bianconi u8 is_absent; 681d0e274afSLorenzo Bianconi u8 free_quota; 682d0e274afSLorenzo Bianconi u8 pad; 683d0e274afSLorenzo Bianconi } __packed; 684d0e274afSLorenzo Bianconi 685399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 686399090efSLorenzo Bianconi __le32 ssid_len; 687399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 688399090efSLorenzo Bianconi } __packed; 689399090efSLorenzo Bianconi 690399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 691399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 692399090efSLorenzo Bianconi * 2: 5.0GHz 693399090efSLorenzo Bianconi * Others: Reserved 694399090efSLorenzo Bianconi */ 695399090efSLorenzo Bianconi u8 channel_num; 696399090efSLorenzo Bianconi } __packed; 697399090efSLorenzo Bianconi 698399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 699399090efSLorenzo Bianconi __le32 rssi_th; 700399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 701399090efSLorenzo Bianconi u8 ssid_len; 702399090efSLorenzo Bianconi u8 rsv[3]; 703399090efSLorenzo Bianconi } __packed; 704399090efSLorenzo Bianconi 705399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 706399090efSLorenzo Bianconi u8 seq_num; 707399090efSLorenzo Bianconi u8 bss_idx; 708399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 709399090efSLorenzo Bianconi * 1: ACTIVE SCAN 710399090efSLorenzo Bianconi */ 711399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 712399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 713399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 714399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 715399090efSLorenzo Bianconi */ 716399090efSLorenzo Bianconi u8 ssids_num; 717399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 718399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 719399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 720399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 721399090efSLorenzo Bianconi */ 722399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 723399090efSLorenzo Bianconi * 1: Support fields after ies. 724399090efSLorenzo Bianconi */ 725399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 726399090efSLorenzo Bianconi __le16 probe_delay_time; 727399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 728399090efSLorenzo Bianconi __le16 timeout_value; 729399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 730399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 731399090efSLorenzo Bianconi * 2: Only 5GHz channels 732399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 733399090efSLorenzo Bianconi * 4: Specified channels 734399090efSLorenzo Bianconi * Others: Reserved 735399090efSLorenzo Bianconi */ 736399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 737399090efSLorenzo Bianconi /* valid when channels_num is set */ 738399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 739399090efSLorenzo Bianconi __le16 ies_len; 740399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 741399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 742399090efSLorenzo Bianconi u8 ext_channels_num; 743399090efSLorenzo Bianconi u8 ext_ssids_num; 744399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 745399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 746399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 747399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 748399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 749399090efSLorenzo Bianconi u8 pad[63]; 750399090efSLorenzo Bianconi u8 ssid_type_ext; 751399090efSLorenzo Bianconi } __packed; 752399090efSLorenzo Bianconi 753399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 754399090efSLorenzo Bianconi 755399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 756399090efSLorenzo Bianconi u8 seq_num; 757399090efSLorenzo Bianconi u8 sparse_channel_num; 758399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 759399090efSLorenzo Bianconi u8 complete_channel_num; 760399090efSLorenzo Bianconi u8 current_state; 761399090efSLorenzo Bianconi u8 version; 762399090efSLorenzo Bianconi u8 pad; 763399090efSLorenzo Bianconi __le32 beacon_scan_num; 764399090efSLorenzo Bianconi u8 pno_enabled; 765399090efSLorenzo Bianconi u8 pad2[3]; 766399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 767399090efSLorenzo Bianconi u8 pad3[3]; 768399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 769399090efSLorenzo Bianconi /* idle format for channel_idle_time 770399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 771399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 772399090efSLorenzo Bianconi * 2: dwell time (16us) 773399090efSLorenzo Bianconi */ 774399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 775399090efSLorenzo Bianconi /* beacon and probe response count */ 776399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 777399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 778399090efSLorenzo Bianconi __le32 beacon_2g_num; 779399090efSLorenzo Bianconi __le32 beacon_5g_num; 780399090efSLorenzo Bianconi } __packed; 781399090efSLorenzo Bianconi 782399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 783399090efSLorenzo Bianconi u8 version; 784399090efSLorenzo Bianconi u8 seq_num; 785399090efSLorenzo Bianconi u8 stop_on_match; 786399090efSLorenzo Bianconi u8 ssids_num; 787399090efSLorenzo Bianconi u8 match_num; 788399090efSLorenzo Bianconi u8 pad; 789399090efSLorenzo Bianconi __le16 ie_len; 790399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 791399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 792399090efSLorenzo Bianconi u8 channel_type; 793399090efSLorenzo Bianconi u8 channels_num; 794399090efSLorenzo Bianconi u8 intervals_num; 7957139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 796399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 797abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 7987139b5c0SSean Wang union { 7997139b5c0SSean Wang struct { 8007139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 801399090efSLorenzo Bianconi u8 pad2[58]; 8027139b5c0SSean Wang } mt7663; 8037139b5c0SSean Wang struct { 8047139b5c0SSean Wang u8 bss_idx; 8059f367c81SDeren Wu u8 pad2[19]; 8069f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 8079f367c81SDeren Wu u8 pad3[38]; 8087139b5c0SSean Wang } mt7921; 8097139b5c0SSean Wang }; 810399090efSLorenzo Bianconi } __packed; 811399090efSLorenzo Bianconi 812399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 813399090efSLorenzo Bianconi u8 seq_num; 814399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 815399090efSLorenzo Bianconi __le16 pad; 816399090efSLorenzo Bianconi } __packed; 817399090efSLorenzo Bianconi 818b4b880b9SYN Chen struct bss_info_uni_bss_color { 819b4b880b9SYN Chen __le16 tag; 820b4b880b9SYN Chen __le16 len; 821b4b880b9SYN Chen u8 enable; 822b4b880b9SYN Chen u8 bss_color; 823b4b880b9SYN Chen u8 rsv[2]; 824b4b880b9SYN Chen } __packed; 825b4b880b9SYN Chen 826d0e274afSLorenzo Bianconi struct bss_info_uni_he { 827d0e274afSLorenzo Bianconi __le16 tag; 828d0e274afSLorenzo Bianconi __le16 len; 829d0e274afSLorenzo Bianconi __le16 he_rts_thres; 830d0e274afSLorenzo Bianconi u8 he_pe_duration; 831d0e274afSLorenzo Bianconi u8 su_disable; 832d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 833d0e274afSLorenzo Bianconi u8 rsv[2]; 834d0e274afSLorenzo Bianconi } __packed; 835d0e274afSLorenzo Bianconi 83655d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 83755d4c19cSLorenzo Bianconi __le16 tag; 83855d4c19cSLorenzo Bianconi __le16 len; 83955d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 84055d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 84155d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 84255d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 84355d4c19cSLorenzo Bianconi * 1: rekey offload disable 84455d4c19cSLorenzo Bianconi * 2: rekey update 84555d4c19cSLorenzo Bianconi */ 84655d4c19cSLorenzo Bianconi u8 keyid; 847*d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 848*d741abeaSLeon Yen u8 pad[1]; 84955d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 85055d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 85155d4c19cSLorenzo Bianconi __le32 group_cipher; 85255d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 85355d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 854*d741abeaSLeon Yen u8 reserverd[4]; 85555d4c19cSLorenzo Bianconi } __packed; 85655d4c19cSLorenzo Bianconi 85755d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 85855d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 85955d4c19cSLorenzo Bianconi 86055d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 86155d4c19cSLorenzo Bianconi __le16 tag; 86255d4c19cSLorenzo Bianconi __le16 len; 86355d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 86455d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 86555d4c19cSLorenzo Bianconi * 1: enable 86655d4c19cSLorenzo Bianconi */ 86755d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 86855d4c19cSLorenzo Bianconi u8 pad; 86955d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 87055d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 87155d4c19cSLorenzo Bianconi u8 rsv[4]; 87255d4c19cSLorenzo Bianconi } __packed; 87355d4c19cSLorenzo Bianconi 87455d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 87555d4c19cSLorenzo Bianconi __le16 tag; 87655d4c19cSLorenzo Bianconi __le16 len; 87755d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 87855d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 87955d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 88055d4c19cSLorenzo Bianconi */ 88155d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 88255d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 88355d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 88455d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 88555d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 88655d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 88755d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 88855d4c19cSLorenzo Bianconi */ 88955d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 89055d4c19cSLorenzo Bianconi * 0x1: HIF_USB 89155d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 89255d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 89355d4c19cSLorenzo Bianconi */ 89455d4c19cSLorenzo Bianconi u8 pad; 89555d4c19cSLorenzo Bianconi u8 rsv[4]; 89655d4c19cSLorenzo Bianconi } __packed; 89755d4c19cSLorenzo Bianconi 89855d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 89955d4c19cSLorenzo Bianconi __le16 tag; 90055d4c19cSLorenzo Bianconi __le16 len; 90155d4c19cSLorenzo Bianconi u8 gpio_pin; 90255d4c19cSLorenzo Bianconi u8 trigger_lvl; 90355d4c19cSLorenzo Bianconi u8 pad[2]; 90455d4c19cSLorenzo Bianconi __le32 gpio_interval; 90555d4c19cSLorenzo Bianconi u8 rsv[4]; 90655d4c19cSLorenzo Bianconi } __packed; 90755d4c19cSLorenzo Bianconi 90855d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 90955d4c19cSLorenzo Bianconi __le16 tag; 91055d4c19cSLorenzo Bianconi __le16 len; 91155d4c19cSLorenzo Bianconi u8 mode; 91255d4c19cSLorenzo Bianconi u8 ips_num; 91355d4c19cSLorenzo Bianconi u8 option; 91455d4c19cSLorenzo Bianconi u8 pad[1]; 91555d4c19cSLorenzo Bianconi } __packed; 91655d4c19cSLorenzo Bianconi 91755d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 91855d4c19cSLorenzo Bianconi __le16 tag; 91955d4c19cSLorenzo Bianconi __le16 len; 92055d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 92155d4c19cSLorenzo Bianconi * 1: suspend mode enabled 92255d4c19cSLorenzo Bianconi */ 92355d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 92455d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 92555d4c19cSLorenzo Bianconi * 1: update by wow dtim 92655d4c19cSLorenzo Bianconi */ 92755d4c19cSLorenzo Bianconi u8 pad[5]; 92855d4c19cSLorenzo Bianconi } __packed; 92955d4c19cSLorenzo Bianconi 930f5056657SSean Wang enum mt76_sta_info_state { 931f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 932f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 933f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 934f5056657SSean Wang }; 935f5056657SSean Wang 9365802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 9375802106fSLorenzo Bianconi struct ieee80211_sta *sta; 9385802106fSLorenzo Bianconi struct mt76_wcid *wcid; 9395802106fSLorenzo Bianconi 9405802106fSLorenzo Bianconi struct ieee80211_vif *vif; 9415802106fSLorenzo Bianconi 94282453b1cSLorenzo Bianconi bool offload_fw; 9435802106fSLorenzo Bianconi bool enable; 944f5056657SSean Wang bool newly; 9455802106fSLorenzo Bianconi int cmd; 9465802106fSLorenzo Bianconi u8 rcpi; 947f5056657SSean Wang u8 state; 9485802106fSLorenzo Bianconi }; 9495802106fSLorenzo Bianconi 95018369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 95118369a4fSLorenzo Bianconi 95218369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 95318369a4fSLorenzo Bianconi u8 channel; 95418369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 95518369a4fSLorenzo Bianconi } __packed; 95618369a4fSLorenzo Bianconi 95718369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 95818369a4fSLorenzo Bianconi /* DW0 - common info*/ 95918369a4fSLorenzo Bianconi u8 ver; 96018369a4fSLorenzo Bianconi u8 pad0; 96118369a4fSLorenzo Bianconi __le16 len; 96218369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 96318369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 96418369a4fSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz */ 96518369a4fSLorenzo Bianconi u8 last_msg; 96618369a4fSLorenzo Bianconi u8 pad1; 96718369a4fSLorenzo Bianconi /* DW3 */ 96818369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 96918369a4fSLorenzo Bianconi u8 pad2[32]; 97018369a4fSLorenzo Bianconi } __packed; 97118369a4fSLorenzo Bianconi 972c0b21255SSean Wang struct mt76_connac_config { 973c0b21255SSean Wang __le16 id; 974c0b21255SSean Wang u8 type; 975c0b21255SSean Wang u8 resp_type; 976c0b21255SSean Wang __le16 data_size; 977c0b21255SSean Wang __le16 resv; 978c0b21255SSean Wang u8 data[320]; 979c0b21255SSean Wang } __packed; 980c0b21255SSean Wang 98167aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 98267aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 98367aa2743SLorenzo Bianconi 98467aa2743SLorenzo Bianconi static inline void 98567aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 98667aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 98767aa2743SLorenzo Bianconi { 98867aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 98967aa2743SLorenzo Bianconi 99067aa2743SLorenzo Bianconi if (is_mt7921(dev)) { 99167aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 99267aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 99367aa2743SLorenzo Bianconi } else { 99467aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 99567aa2743SLorenzo Bianconi } 99667aa2743SLorenzo Bianconi } 99767aa2743SLorenzo Bianconi 998d0e274afSLorenzo Bianconi struct sk_buff * 999d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1000d0e274afSLorenzo Bianconi struct mt76_wcid *wcid); 1001d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1002d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1003d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1004d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1005d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1006d0e274afSLorenzo Bianconi void *sta_wtbl); 1007d0e274afSLorenzo Bianconi static inline struct tlv * 1008d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1009d0e274afSLorenzo Bianconi { 1010d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1011d0e274afSLorenzo Bianconi } 1012d0e274afSLorenzo Bianconi 1013d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1014d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1015d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1016d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1017f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1018f5056657SSean Wang bool newly); 1019d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1020d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1021d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1022d0e274afSLorenzo Bianconi void *wtbl_tlv); 1023d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1024868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 102566978204SFelix Fietkau struct mt76_wcid *wcid, 1026d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 102724299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 102824299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 102924299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 1030d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1031d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 10325802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1033f5056657SSean Wang u8 rcpi, u8 state); 1034d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1035d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1036d0e274afSLorenzo Bianconi void *wtbl_tlv); 1037d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1038d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1039d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1040d0e274afSLorenzo Bianconi void *wtbl_tlv); 1041d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1042d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1043d0e274afSLorenzo Bianconi bool enable, bool tx); 1044d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1045d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1046d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1047d0e274afSLorenzo Bianconi bool enable); 1048d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1049d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1050d0e274afSLorenzo Bianconi bool enable, bool tx); 1051d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1052d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1053d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1054d0e274afSLorenzo Bianconi bool enable); 1055f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 10565802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1057d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1058d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1059d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1060d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1061d0e274afSLorenzo Bianconi bool hdr_trans); 1062d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1063d0e274afSLorenzo Bianconi u32 mode); 1064d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1065d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1066d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1067f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1068d0e274afSLorenzo Bianconi 1069399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1070399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1071399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1072399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1073399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1074399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1075399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1076399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1077399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1078399090efSLorenzo Bianconi bool enable); 1079f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1080f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1081f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 108255d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 108355d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 108455d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 108555d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 108655d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 108755d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1088f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1089f5056657SSean Wang enum ieee80211_sta_state old_state, 1090f5056657SSean Wang enum ieee80211_sta_state new_state); 10910da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1092c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 10930da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 10940da3c795SSean Wang struct mt76_connac_coredump *coredump); 109518369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 1096d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1097