1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 99e90c351SLorenzo Bianconi #define FW_FEATURE_SET_ENCRYPT BIT(0) 109e90c351SLorenzo Bianconi #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 119e90c351SLorenzo Bianconi #define FW_FEATURE_ENCRY_MODE BIT(4) 129e90c351SLorenzo Bianconi #define FW_FEATURE_OVERRIDE_ADDR BIT(5) 139e90c351SLorenzo Bianconi 149e90c351SLorenzo Bianconi #define DL_MODE_ENCRYPT BIT(0) 159e90c351SLorenzo Bianconi #define DL_MODE_KEY_IDX GENMASK(2, 1) 169e90c351SLorenzo Bianconi #define DL_MODE_RESET_SEC_IV BIT(3) 179e90c351SLorenzo Bianconi #define DL_MODE_WORKING_PDA_CR4 BIT(4) 189e90c351SLorenzo Bianconi #define DL_MODE_VALID_RAM_ENTRY BIT(5) 199e90c351SLorenzo Bianconi #define DL_CONFIG_ENCRY_MODE_SEL BIT(6) 209e90c351SLorenzo Bianconi #define DL_MODE_NEED_RSP BIT(31) 219e90c351SLorenzo Bianconi 229e90c351SLorenzo Bianconi #define FW_START_OVERRIDE BIT(0) 239e90c351SLorenzo Bianconi #define FW_START_WORKING_PDA_CR4 BIT(2) 249e90c351SLorenzo Bianconi 259e90c351SLorenzo Bianconi #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) 269e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) 279e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_INFO 0x2 289e90c351SLorenzo Bianconi 29d0e274afSLorenzo Bianconi struct tlv { 30d0e274afSLorenzo Bianconi __le16 tag; 31d0e274afSLorenzo Bianconi __le16 len; 32d0e274afSLorenzo Bianconi } __packed; 33d0e274afSLorenzo Bianconi 345562d5f6SLorenzo Bianconi struct bss_info_omac { 355562d5f6SLorenzo Bianconi __le16 tag; 365562d5f6SLorenzo Bianconi __le16 len; 375562d5f6SLorenzo Bianconi u8 hw_bss_idx; 385562d5f6SLorenzo Bianconi u8 omac_idx; 395562d5f6SLorenzo Bianconi u8 band_idx; 405562d5f6SLorenzo Bianconi u8 rsv0; 415562d5f6SLorenzo Bianconi __le32 conn_type; 425562d5f6SLorenzo Bianconi u32 rsv1; 435562d5f6SLorenzo Bianconi } __packed; 445562d5f6SLorenzo Bianconi 455562d5f6SLorenzo Bianconi struct bss_info_basic { 465562d5f6SLorenzo Bianconi __le16 tag; 475562d5f6SLorenzo Bianconi __le16 len; 485562d5f6SLorenzo Bianconi __le32 network_type; 495562d5f6SLorenzo Bianconi u8 active; 505562d5f6SLorenzo Bianconi u8 rsv0; 515562d5f6SLorenzo Bianconi __le16 bcn_interval; 525562d5f6SLorenzo Bianconi u8 bssid[ETH_ALEN]; 535562d5f6SLorenzo Bianconi u8 wmm_idx; 545562d5f6SLorenzo Bianconi u8 dtim_period; 555562d5f6SLorenzo Bianconi u8 bmc_wcid_lo; 565562d5f6SLorenzo Bianconi u8 cipher; 575562d5f6SLorenzo Bianconi u8 phy_mode; 585562d5f6SLorenzo Bianconi u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */ 595562d5f6SLorenzo Bianconi u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */ 605562d5f6SLorenzo Bianconi u8 bmc_wcid_hi; /* high Byte and version */ 615562d5f6SLorenzo Bianconi u8 rsv[2]; 625562d5f6SLorenzo Bianconi } __packed; 635562d5f6SLorenzo Bianconi 645562d5f6SLorenzo Bianconi struct bss_info_rf_ch { 655562d5f6SLorenzo Bianconi __le16 tag; 665562d5f6SLorenzo Bianconi __le16 len; 675562d5f6SLorenzo Bianconi u8 pri_ch; 685562d5f6SLorenzo Bianconi u8 center_ch0; 695562d5f6SLorenzo Bianconi u8 center_ch1; 705562d5f6SLorenzo Bianconi u8 bw; 715562d5f6SLorenzo Bianconi u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */ 725562d5f6SLorenzo Bianconi u8 he_all_disable; /* 1: disallow all HETB, 0: allow */ 735562d5f6SLorenzo Bianconi u8 rsv[2]; 745562d5f6SLorenzo Bianconi } __packed; 755562d5f6SLorenzo Bianconi 765562d5f6SLorenzo Bianconi struct bss_info_ext_bss { 775562d5f6SLorenzo Bianconi __le16 tag; 785562d5f6SLorenzo Bianconi __le16 len; 795562d5f6SLorenzo Bianconi __le32 mbss_tsf_offset; /* in unit of us */ 805562d5f6SLorenzo Bianconi u8 rsv[8]; 815562d5f6SLorenzo Bianconi } __packed; 825562d5f6SLorenzo Bianconi 835562d5f6SLorenzo Bianconi enum { 845562d5f6SLorenzo Bianconi BSS_INFO_OMAC, 855562d5f6SLorenzo Bianconi BSS_INFO_BASIC, 865562d5f6SLorenzo Bianconi BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 875562d5f6SLorenzo Bianconi BSS_INFO_PM, /* sta only */ 885562d5f6SLorenzo Bianconi BSS_INFO_UAPSD, /* sta only */ 895562d5f6SLorenzo Bianconi BSS_INFO_ROAM_DETECT, /* obsoleted */ 905562d5f6SLorenzo Bianconi BSS_INFO_LQ_RM, /* obsoleted */ 915562d5f6SLorenzo Bianconi BSS_INFO_EXT_BSS, 925562d5f6SLorenzo Bianconi BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */ 935562d5f6SLorenzo Bianconi BSS_INFO_SYNC_MODE, /* obsoleted */ 945562d5f6SLorenzo Bianconi BSS_INFO_RA, 955562d5f6SLorenzo Bianconi BSS_INFO_HW_AMSDU, 965562d5f6SLorenzo Bianconi BSS_INFO_BSS_COLOR, 975562d5f6SLorenzo Bianconi BSS_INFO_HE_BASIC, 985562d5f6SLorenzo Bianconi BSS_INFO_PROTECT_INFO, 995562d5f6SLorenzo Bianconi BSS_INFO_OFFLOAD, 1005562d5f6SLorenzo Bianconi BSS_INFO_11V_MBSSID, 1015562d5f6SLorenzo Bianconi BSS_INFO_MAX_NUM 1025562d5f6SLorenzo Bianconi }; 1035562d5f6SLorenzo Bianconi 104d0e274afSLorenzo Bianconi /* sta_rec */ 105d0e274afSLorenzo Bianconi 106d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 107d0e274afSLorenzo Bianconi u8 rsv[2]; 108d0e274afSLorenzo Bianconi __le16 tlv_num; 109d0e274afSLorenzo Bianconi } __packed; 110d0e274afSLorenzo Bianconi 111d0e274afSLorenzo Bianconi struct sta_req_hdr { 112d0e274afSLorenzo Bianconi u8 bss_idx; 113d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 114d0e274afSLorenzo Bianconi __le16 tlv_num; 115d0e274afSLorenzo Bianconi u8 is_tlv_append; 116d0e274afSLorenzo Bianconi u8 muar_idx; 117d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 118d0e274afSLorenzo Bianconi u8 rsv; 119d0e274afSLorenzo Bianconi } __packed; 120d0e274afSLorenzo Bianconi 121d0e274afSLorenzo Bianconi struct sta_rec_basic { 122d0e274afSLorenzo Bianconi __le16 tag; 123d0e274afSLorenzo Bianconi __le16 len; 124d0e274afSLorenzo Bianconi __le32 conn_type; 125d0e274afSLorenzo Bianconi u8 conn_state; 126d0e274afSLorenzo Bianconi u8 qos; 127d0e274afSLorenzo Bianconi __le16 aid; 128d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 129d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 130d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 131d0e274afSLorenzo Bianconi __le16 extra_info; 132d0e274afSLorenzo Bianconi } __packed; 133d0e274afSLorenzo Bianconi 134d0e274afSLorenzo Bianconi struct sta_rec_ht { 135d0e274afSLorenzo Bianconi __le16 tag; 136d0e274afSLorenzo Bianconi __le16 len; 137d0e274afSLorenzo Bianconi __le16 ht_cap; 138d0e274afSLorenzo Bianconi u16 rsv; 139d0e274afSLorenzo Bianconi } __packed; 140d0e274afSLorenzo Bianconi 141d0e274afSLorenzo Bianconi struct sta_rec_vht { 142d0e274afSLorenzo Bianconi __le16 tag; 143d0e274afSLorenzo Bianconi __le16 len; 144d0e274afSLorenzo Bianconi __le32 vht_cap; 145d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 146d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 1475562d5f6SLorenzo Bianconi /* mt7915 - mt7921 */ 148d0e274afSLorenzo Bianconi u8 rts_bw_sig; 149d0e274afSLorenzo Bianconi u8 rsv[3]; 150d0e274afSLorenzo Bianconi } __packed; 151d0e274afSLorenzo Bianconi 152d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 153d0e274afSLorenzo Bianconi __le16 tag; 154d0e274afSLorenzo Bianconi __le16 len; 155d0e274afSLorenzo Bianconi u8 dac_map; 156d0e274afSLorenzo Bianconi u8 tac_map; 157d0e274afSLorenzo Bianconi u8 max_sp; 158d0e274afSLorenzo Bianconi u8 rsv0; 159d0e274afSLorenzo Bianconi __le16 listen_interval; 160d0e274afSLorenzo Bianconi u8 rsv1[2]; 161d0e274afSLorenzo Bianconi } __packed; 162d0e274afSLorenzo Bianconi 163d0e274afSLorenzo Bianconi struct sta_rec_ba { 164d0e274afSLorenzo Bianconi __le16 tag; 165d0e274afSLorenzo Bianconi __le16 len; 166d0e274afSLorenzo Bianconi u8 tid; 167d0e274afSLorenzo Bianconi u8 ba_type; 168d0e274afSLorenzo Bianconi u8 amsdu; 169d0e274afSLorenzo Bianconi u8 ba_en; 170d0e274afSLorenzo Bianconi __le16 ssn; 171d0e274afSLorenzo Bianconi __le16 winsize; 172d0e274afSLorenzo Bianconi } __packed; 173d0e274afSLorenzo Bianconi 174d0e274afSLorenzo Bianconi struct sta_rec_he { 175d0e274afSLorenzo Bianconi __le16 tag; 176d0e274afSLorenzo Bianconi __le16 len; 177d0e274afSLorenzo Bianconi 178d0e274afSLorenzo Bianconi __le32 he_cap; 179d0e274afSLorenzo Bianconi 180d0e274afSLorenzo Bianconi u8 t_frame_dur; 181d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 182d0e274afSLorenzo Bianconi u8 bw_set; 183d0e274afSLorenzo Bianconi u8 device_class; 184d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 185d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 186d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 187d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 188d0e274afSLorenzo Bianconi u8 dcm_max_ru; 189d0e274afSLorenzo Bianconi u8 punc_pream_rx; 190d0e274afSLorenzo Bianconi u8 pkt_ext; 191d0e274afSLorenzo Bianconi u8 rsv1; 192d0e274afSLorenzo Bianconi 193d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 194d0e274afSLorenzo Bianconi 195d0e274afSLorenzo Bianconi u8 rsv2[2]; 196d0e274afSLorenzo Bianconi } __packed; 197d0e274afSLorenzo Bianconi 198d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 199d0e274afSLorenzo Bianconi __le16 tag; 200d0e274afSLorenzo Bianconi __le16 len; 201d0e274afSLorenzo Bianconi u8 max_amsdu_num; 202d0e274afSLorenzo Bianconi u8 max_mpdu_size; 203d0e274afSLorenzo Bianconi u8 amsdu_en; 204d0e274afSLorenzo Bianconi u8 rsv; 205d0e274afSLorenzo Bianconi } __packed; 206d0e274afSLorenzo Bianconi 207d0e274afSLorenzo Bianconi struct sta_rec_state { 208d0e274afSLorenzo Bianconi __le16 tag; 209d0e274afSLorenzo Bianconi __le16 len; 210d0e274afSLorenzo Bianconi __le32 flags; 211d0e274afSLorenzo Bianconi u8 state; 212d0e274afSLorenzo Bianconi u8 vht_opmode; 213d0e274afSLorenzo Bianconi u8 action; 214d0e274afSLorenzo Bianconi u8 rsv[1]; 215d0e274afSLorenzo Bianconi } __packed; 216d0e274afSLorenzo Bianconi 21799b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 21899b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 219d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 220d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 221d0e274afSLorenzo Bianconi __le16 tag; 222d0e274afSLorenzo Bianconi __le16 len; 223d0e274afSLorenzo Bianconi __le16 legacy; 224d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 225d0e274afSLorenzo Bianconi } __packed; 226d0e274afSLorenzo Bianconi 227d0e274afSLorenzo Bianconi struct sta_rec_phy { 228d0e274afSLorenzo Bianconi __le16 tag; 229d0e274afSLorenzo Bianconi __le16 len; 230d0e274afSLorenzo Bianconi __le16 basic_rate; 231d0e274afSLorenzo Bianconi u8 phy_type; 232d0e274afSLorenzo Bianconi u8 ampdu; 233d0e274afSLorenzo Bianconi u8 rts_policy; 234d0e274afSLorenzo Bianconi u8 rcpi; 235d0e274afSLorenzo Bianconi u8 rsv[2]; 236d0e274afSLorenzo Bianconi } __packed; 237d0e274afSLorenzo Bianconi 2385883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 2395883892bSLorenzo Bianconi __le16 tag; 2405883892bSLorenzo Bianconi __le16 len; 2415883892bSLorenzo Bianconi __le16 capa; 2425883892bSLorenzo Bianconi u8 rsv[2]; 2435883892bSLorenzo Bianconi } __packed; 2445883892bSLorenzo Bianconi 2455562d5f6SLorenzo Bianconi struct sec_key { 2465562d5f6SLorenzo Bianconi u8 cipher_id; 2475562d5f6SLorenzo Bianconi u8 cipher_len; 2485562d5f6SLorenzo Bianconi u8 key_id; 2495562d5f6SLorenzo Bianconi u8 key_len; 2505562d5f6SLorenzo Bianconi u8 key[32]; 2515562d5f6SLorenzo Bianconi } __packed; 2525562d5f6SLorenzo Bianconi 2535562d5f6SLorenzo Bianconi struct sta_rec_sec { 2545562d5f6SLorenzo Bianconi __le16 tag; 2555562d5f6SLorenzo Bianconi __le16 len; 2565562d5f6SLorenzo Bianconi u8 add; 2575562d5f6SLorenzo Bianconi u8 n_cipher; 2585562d5f6SLorenzo Bianconi u8 rsv[2]; 2595562d5f6SLorenzo Bianconi 2605562d5f6SLorenzo Bianconi struct sec_key key[2]; 2615562d5f6SLorenzo Bianconi } __packed; 2625562d5f6SLorenzo Bianconi 2635562d5f6SLorenzo Bianconi struct sta_rec_bf { 2645562d5f6SLorenzo Bianconi __le16 tag; 2655562d5f6SLorenzo Bianconi __le16 len; 2665562d5f6SLorenzo Bianconi 2675562d5f6SLorenzo Bianconi __le16 pfmu; /* 0xffff: no access right for PFMU */ 2685562d5f6SLorenzo Bianconi bool su_mu; /* 0: SU, 1: MU */ 2695562d5f6SLorenzo Bianconi u8 bf_cap; /* 0: iBF, 1: eBF */ 2705562d5f6SLorenzo Bianconi u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */ 2715562d5f6SLorenzo Bianconi u8 ndpa_rate; 2725562d5f6SLorenzo Bianconi u8 ndp_rate; 2735562d5f6SLorenzo Bianconi u8 rept_poll_rate; 2745562d5f6SLorenzo Bianconi u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */ 2755562d5f6SLorenzo Bianconi u8 ncol; 2765562d5f6SLorenzo Bianconi u8 nrow; 2775562d5f6SLorenzo Bianconi u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */ 2785562d5f6SLorenzo Bianconi 2795562d5f6SLorenzo Bianconi u8 mem_total; 2805562d5f6SLorenzo Bianconi u8 mem_20m; 2815562d5f6SLorenzo Bianconi struct { 2825562d5f6SLorenzo Bianconi u8 row; 2835562d5f6SLorenzo Bianconi u8 col: 6, row_msb: 2; 2845562d5f6SLorenzo Bianconi } mem[4]; 2855562d5f6SLorenzo Bianconi 2865562d5f6SLorenzo Bianconi __le16 smart_ant; 2875562d5f6SLorenzo Bianconi u8 se_idx; 2885562d5f6SLorenzo Bianconi u8 auto_sounding; /* b7: low traffic indicator 2895562d5f6SLorenzo Bianconi * b6: Stop sounding for this entry 2905562d5f6SLorenzo Bianconi * b5 ~ b0: postpone sounding 2915562d5f6SLorenzo Bianconi */ 2925562d5f6SLorenzo Bianconi u8 ibf_timeout; 2935562d5f6SLorenzo Bianconi u8 ibf_dbw; 2945562d5f6SLorenzo Bianconi u8 ibf_ncol; 2955562d5f6SLorenzo Bianconi u8 ibf_nrow; 2965562d5f6SLorenzo Bianconi u8 nrow_bw160; 2975562d5f6SLorenzo Bianconi u8 ncol_bw160; 2985562d5f6SLorenzo Bianconi u8 ru_start_idx; 2995562d5f6SLorenzo Bianconi u8 ru_end_idx; 3005562d5f6SLorenzo Bianconi 3015562d5f6SLorenzo Bianconi bool trigger_su; 3025562d5f6SLorenzo Bianconi bool trigger_mu; 3035562d5f6SLorenzo Bianconi bool ng16_su; 3045562d5f6SLorenzo Bianconi bool ng16_mu; 3055562d5f6SLorenzo Bianconi bool codebook42_su; 3065562d5f6SLorenzo Bianconi bool codebook75_mu; 3075562d5f6SLorenzo Bianconi 3085562d5f6SLorenzo Bianconi u8 he_ltf; 3095562d5f6SLorenzo Bianconi u8 rsv[3]; 3105562d5f6SLorenzo Bianconi } __packed; 3115562d5f6SLorenzo Bianconi 3125562d5f6SLorenzo Bianconi struct sta_rec_bfee { 3135562d5f6SLorenzo Bianconi __le16 tag; 3145562d5f6SLorenzo Bianconi __le16 len; 3155562d5f6SLorenzo Bianconi bool fb_identity_matrix; /* 1: feedback identity matrix */ 3165562d5f6SLorenzo Bianconi bool ignore_feedback; /* 1: ignore */ 3175562d5f6SLorenzo Bianconi u8 rsv[2]; 3185562d5f6SLorenzo Bianconi } __packed; 3195562d5f6SLorenzo Bianconi 3205562d5f6SLorenzo Bianconi struct sta_rec_muru { 3215562d5f6SLorenzo Bianconi __le16 tag; 3225562d5f6SLorenzo Bianconi __le16 len; 3235562d5f6SLorenzo Bianconi 3245562d5f6SLorenzo Bianconi struct { 3255562d5f6SLorenzo Bianconi bool ofdma_dl_en; 3265562d5f6SLorenzo Bianconi bool ofdma_ul_en; 3275562d5f6SLorenzo Bianconi bool mimo_dl_en; 3285562d5f6SLorenzo Bianconi bool mimo_ul_en; 3295562d5f6SLorenzo Bianconi u8 rsv[4]; 3305562d5f6SLorenzo Bianconi } cfg; 3315562d5f6SLorenzo Bianconi 3325562d5f6SLorenzo Bianconi struct { 3335562d5f6SLorenzo Bianconi u8 punc_pream_rx; 3345562d5f6SLorenzo Bianconi bool he_20m_in_40m_2g; 3355562d5f6SLorenzo Bianconi bool he_20m_in_160m; 3365562d5f6SLorenzo Bianconi bool he_80m_in_160m; 3375562d5f6SLorenzo Bianconi bool lt16_sigb; 3385562d5f6SLorenzo Bianconi bool rx_su_comp_sigb; 3395562d5f6SLorenzo Bianconi bool rx_su_non_comp_sigb; 3405562d5f6SLorenzo Bianconi u8 rsv; 3415562d5f6SLorenzo Bianconi } ofdma_dl; 3425562d5f6SLorenzo Bianconi 3435562d5f6SLorenzo Bianconi struct { 3445562d5f6SLorenzo Bianconi u8 t_frame_dur; 3455562d5f6SLorenzo Bianconi u8 mu_cascading; 3465562d5f6SLorenzo Bianconi u8 uo_ra; 3475562d5f6SLorenzo Bianconi u8 he_2x996_tone; 3485562d5f6SLorenzo Bianconi u8 rx_t_frame_11ac; 3495562d5f6SLorenzo Bianconi u8 rsv[3]; 3505562d5f6SLorenzo Bianconi } ofdma_ul; 3515562d5f6SLorenzo Bianconi 3525562d5f6SLorenzo Bianconi struct { 3535562d5f6SLorenzo Bianconi bool vht_mu_bfee; 3545562d5f6SLorenzo Bianconi bool partial_bw_dl_mimo; 3555562d5f6SLorenzo Bianconi u8 rsv[2]; 3565562d5f6SLorenzo Bianconi } mimo_dl; 3575562d5f6SLorenzo Bianconi 3585562d5f6SLorenzo Bianconi struct { 3595562d5f6SLorenzo Bianconi bool full_ul_mimo; 3605562d5f6SLorenzo Bianconi bool partial_ul_mimo; 3615562d5f6SLorenzo Bianconi u8 rsv[2]; 3625562d5f6SLorenzo Bianconi } mimo_ul; 3635562d5f6SLorenzo Bianconi } __packed; 3645562d5f6SLorenzo Bianconi 3655562d5f6SLorenzo Bianconi struct sta_phy { 3665562d5f6SLorenzo Bianconi u8 type; 3675562d5f6SLorenzo Bianconi u8 flag; 3685562d5f6SLorenzo Bianconi u8 stbc; 3695562d5f6SLorenzo Bianconi u8 sgi; 3705562d5f6SLorenzo Bianconi u8 bw; 3715562d5f6SLorenzo Bianconi u8 ldpc; 3725562d5f6SLorenzo Bianconi u8 mcs; 3735562d5f6SLorenzo Bianconi u8 nss; 3745562d5f6SLorenzo Bianconi u8 he_ltf; 3755562d5f6SLorenzo Bianconi }; 3765562d5f6SLorenzo Bianconi 3775562d5f6SLorenzo Bianconi struct sta_rec_ra { 3785562d5f6SLorenzo Bianconi __le16 tag; 3795562d5f6SLorenzo Bianconi __le16 len; 3805562d5f6SLorenzo Bianconi 3815562d5f6SLorenzo Bianconi u8 valid; 3825562d5f6SLorenzo Bianconi u8 auto_rate; 3835562d5f6SLorenzo Bianconi u8 phy_mode; 3845562d5f6SLorenzo Bianconi u8 channel; 3855562d5f6SLorenzo Bianconi u8 bw; 3865562d5f6SLorenzo Bianconi u8 disable_cck; 3875562d5f6SLorenzo Bianconi u8 ht_mcs32; 3885562d5f6SLorenzo Bianconi u8 ht_gf; 3895562d5f6SLorenzo Bianconi u8 ht_mcs[4]; 3905562d5f6SLorenzo Bianconi u8 mmps_mode; 3915562d5f6SLorenzo Bianconi u8 gband_256; 3925562d5f6SLorenzo Bianconi u8 af; 3935562d5f6SLorenzo Bianconi u8 auth_wapi_mode; 3945562d5f6SLorenzo Bianconi u8 rate_len; 3955562d5f6SLorenzo Bianconi 3965562d5f6SLorenzo Bianconi u8 supp_mode; 3975562d5f6SLorenzo Bianconi u8 supp_cck_rate; 3985562d5f6SLorenzo Bianconi u8 supp_ofdm_rate; 3995562d5f6SLorenzo Bianconi __le32 supp_ht_mcs; 4005562d5f6SLorenzo Bianconi __le16 supp_vht_mcs[4]; 4015562d5f6SLorenzo Bianconi 4025562d5f6SLorenzo Bianconi u8 op_mode; 4035562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 4045562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 4055562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 4065562d5f6SLorenzo Bianconi 4075562d5f6SLorenzo Bianconi __le32 sta_cap; 4085562d5f6SLorenzo Bianconi 4095562d5f6SLorenzo Bianconi struct sta_phy phy; 4105562d5f6SLorenzo Bianconi } __packed; 4115562d5f6SLorenzo Bianconi 4125562d5f6SLorenzo Bianconi struct sta_rec_ra_fixed { 4135562d5f6SLorenzo Bianconi __le16 tag; 4145562d5f6SLorenzo Bianconi __le16 len; 4155562d5f6SLorenzo Bianconi 4165562d5f6SLorenzo Bianconi __le32 field; 4175562d5f6SLorenzo Bianconi u8 op_mode; 4185562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 4195562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 4205562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 4215562d5f6SLorenzo Bianconi 4225562d5f6SLorenzo Bianconi struct sta_phy phy; 4235562d5f6SLorenzo Bianconi 4245562d5f6SLorenzo Bianconi u8 spe_en; 4255562d5f6SLorenzo Bianconi u8 short_preamble; 4265562d5f6SLorenzo Bianconi u8 is_5g; 4275562d5f6SLorenzo Bianconi u8 mmps_mode; 4285562d5f6SLorenzo Bianconi } __packed; 4295562d5f6SLorenzo Bianconi 430d0e274afSLorenzo Bianconi /* wtbl_rec */ 431d0e274afSLorenzo Bianconi 432d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 433d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 434d0e274afSLorenzo Bianconi u8 operation; 435d0e274afSLorenzo Bianconi __le16 tlv_num; 436d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 437d0e274afSLorenzo Bianconi u8 rsv[3]; 438d0e274afSLorenzo Bianconi } __packed; 439d0e274afSLorenzo Bianconi 440d0e274afSLorenzo Bianconi struct wtbl_generic { 441d0e274afSLorenzo Bianconi __le16 tag; 442d0e274afSLorenzo Bianconi __le16 len; 443d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 444d0e274afSLorenzo Bianconi u8 muar_idx; 445d0e274afSLorenzo Bianconi u8 skip_tx; 446d0e274afSLorenzo Bianconi u8 cf_ack; 447d0e274afSLorenzo Bianconi u8 qos; 448d0e274afSLorenzo Bianconi u8 mesh; 449d0e274afSLorenzo Bianconi u8 adm; 450d0e274afSLorenzo Bianconi __le16 partial_aid; 451d0e274afSLorenzo Bianconi u8 baf_en; 452d0e274afSLorenzo Bianconi u8 aad_om; 453d0e274afSLorenzo Bianconi } __packed; 454d0e274afSLorenzo Bianconi 455d0e274afSLorenzo Bianconi struct wtbl_rx { 456d0e274afSLorenzo Bianconi __le16 tag; 457d0e274afSLorenzo Bianconi __le16 len; 458d0e274afSLorenzo Bianconi u8 rcid; 459d0e274afSLorenzo Bianconi u8 rca1; 460d0e274afSLorenzo Bianconi u8 rca2; 461d0e274afSLorenzo Bianconi u8 rv; 462d0e274afSLorenzo Bianconi u8 rsv[4]; 463d0e274afSLorenzo Bianconi } __packed; 464d0e274afSLorenzo Bianconi 465d0e274afSLorenzo Bianconi struct wtbl_ht { 466d0e274afSLorenzo Bianconi __le16 tag; 467d0e274afSLorenzo Bianconi __le16 len; 468d0e274afSLorenzo Bianconi u8 ht; 469d0e274afSLorenzo Bianconi u8 ldpc; 470d0e274afSLorenzo Bianconi u8 af; 471d0e274afSLorenzo Bianconi u8 mm; 472d0e274afSLorenzo Bianconi u8 rsv[4]; 473d0e274afSLorenzo Bianconi } __packed; 474d0e274afSLorenzo Bianconi 475d0e274afSLorenzo Bianconi struct wtbl_vht { 476d0e274afSLorenzo Bianconi __le16 tag; 477d0e274afSLorenzo Bianconi __le16 len; 478d0e274afSLorenzo Bianconi u8 ldpc; 479d0e274afSLorenzo Bianconi u8 dyn_bw; 480d0e274afSLorenzo Bianconi u8 vht; 481d0e274afSLorenzo Bianconi u8 txop_ps; 482d0e274afSLorenzo Bianconi u8 rsv[4]; 483d0e274afSLorenzo Bianconi } __packed; 484d0e274afSLorenzo Bianconi 485d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 486d0e274afSLorenzo Bianconi __le16 tag; 487d0e274afSLorenzo Bianconi __le16 len; 488d0e274afSLorenzo Bianconi u8 txps; 489d0e274afSLorenzo Bianconi u8 rsv[3]; 490d0e274afSLorenzo Bianconi } __packed; 491d0e274afSLorenzo Bianconi 492d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 493d0e274afSLorenzo Bianconi __le16 tag; 494d0e274afSLorenzo Bianconi __le16 len; 495d0e274afSLorenzo Bianconi u8 to_ds; 496d0e274afSLorenzo Bianconi u8 from_ds; 497d4b98c63SRyder Lee u8 no_rx_trans; 498d0e274afSLorenzo Bianconi u8 rsv; 499d0e274afSLorenzo Bianconi } __packed; 500d0e274afSLorenzo Bianconi 501d0e274afSLorenzo Bianconi struct wtbl_ba { 502d0e274afSLorenzo Bianconi __le16 tag; 503d0e274afSLorenzo Bianconi __le16 len; 504d0e274afSLorenzo Bianconi /* common */ 505d0e274afSLorenzo Bianconi u8 tid; 506d0e274afSLorenzo Bianconi u8 ba_type; 507d0e274afSLorenzo Bianconi u8 rsv0[2]; 508d0e274afSLorenzo Bianconi /* originator only */ 509d0e274afSLorenzo Bianconi __le16 sn; 510d0e274afSLorenzo Bianconi u8 ba_en; 511d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 5125562d5f6SLorenzo Bianconi /* originator & recipient */ 513d0e274afSLorenzo Bianconi __le16 ba_winsize; 514d0e274afSLorenzo Bianconi /* recipient only */ 515d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 516d0e274afSLorenzo Bianconi u8 rst_ba_tid; 517d0e274afSLorenzo Bianconi u8 rst_ba_sel; 518d0e274afSLorenzo Bianconi u8 rst_ba_sb; 519d0e274afSLorenzo Bianconi u8 band_idx; 520d0e274afSLorenzo Bianconi u8 rsv1[4]; 521d0e274afSLorenzo Bianconi } __packed; 522d0e274afSLorenzo Bianconi 523d0e274afSLorenzo Bianconi struct wtbl_smps { 524d0e274afSLorenzo Bianconi __le16 tag; 525d0e274afSLorenzo Bianconi __le16 len; 526d0e274afSLorenzo Bianconi u8 smps; 527d0e274afSLorenzo Bianconi u8 rsv[3]; 528d0e274afSLorenzo Bianconi } __packed; 529d0e274afSLorenzo Bianconi 530d0e274afSLorenzo Bianconi /* mt7615 only */ 531d0e274afSLorenzo Bianconi 532d0e274afSLorenzo Bianconi struct wtbl_bf { 533d0e274afSLorenzo Bianconi __le16 tag; 534d0e274afSLorenzo Bianconi __le16 len; 535d0e274afSLorenzo Bianconi u8 ibf; 536d0e274afSLorenzo Bianconi u8 ebf; 537d0e274afSLorenzo Bianconi u8 ibf_vht; 538d0e274afSLorenzo Bianconi u8 ebf_vht; 539d0e274afSLorenzo Bianconi u8 gid; 540d0e274afSLorenzo Bianconi u8 pfmu_idx; 541d0e274afSLorenzo Bianconi u8 rsv[2]; 542d0e274afSLorenzo Bianconi } __packed; 543d0e274afSLorenzo Bianconi 544d0e274afSLorenzo Bianconi struct wtbl_pn { 545d0e274afSLorenzo Bianconi __le16 tag; 546d0e274afSLorenzo Bianconi __le16 len; 547d0e274afSLorenzo Bianconi u8 pn[6]; 548d0e274afSLorenzo Bianconi u8 rsv[2]; 549d0e274afSLorenzo Bianconi } __packed; 550d0e274afSLorenzo Bianconi 551d0e274afSLorenzo Bianconi struct wtbl_spe { 552d0e274afSLorenzo Bianconi __le16 tag; 553d0e274afSLorenzo Bianconi __le16 len; 554d0e274afSLorenzo Bianconi u8 spe_idx; 555d0e274afSLorenzo Bianconi u8 rsv[3]; 556d0e274afSLorenzo Bianconi } __packed; 557d0e274afSLorenzo Bianconi 558d0e274afSLorenzo Bianconi struct wtbl_raw { 559d0e274afSLorenzo Bianconi __le16 tag; 560d0e274afSLorenzo Bianconi __le16 len; 561d0e274afSLorenzo Bianconi u8 wtbl_idx; 562d0e274afSLorenzo Bianconi u8 dw; 563d0e274afSLorenzo Bianconi u8 rsv[2]; 564d0e274afSLorenzo Bianconi __le32 msk; 565d0e274afSLorenzo Bianconi __le32 val; 566d0e274afSLorenzo Bianconi } __packed; 567d0e274afSLorenzo Bianconi 568d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 569d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 570d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 571d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 572d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 573d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 574d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 575d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 576d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 577d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 578d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 579d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 580d0e274afSLorenzo Bianconi 581d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 582d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 5835562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bf) + \ 584d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 585d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 586d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 587d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 588d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 589d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 5905562d5f6SLorenzo Bianconi sizeof(struct sta_rec_muru) + \ 5915562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bfee) + \ 5925562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra) + \ 593e2c93b68SLorenzo Bianconi sizeof(struct sta_rec_sec) + \ 5945562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra_fixed) + \ 5955883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 596d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 597d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 598d0e274afSLorenzo Bianconi 599d0e274afSLorenzo Bianconi enum { 600d0e274afSLorenzo Bianconi STA_REC_BASIC, 601d0e274afSLorenzo Bianconi STA_REC_RA, 602d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 603d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 604d0e274afSLorenzo Bianconi STA_REC_BF, 605d0e274afSLorenzo Bianconi STA_REC_AMSDU, 606d0e274afSLorenzo Bianconi STA_REC_BA, 607d0e274afSLorenzo Bianconi STA_REC_STATE, 608d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 609d0e274afSLorenzo Bianconi STA_REC_HT, 610d0e274afSLorenzo Bianconi STA_REC_VHT, 611d0e274afSLorenzo Bianconi STA_REC_APPS, 612d0e274afSLorenzo Bianconi STA_REC_KEY, 613d0e274afSLorenzo Bianconi STA_REC_WTBL, 614d0e274afSLorenzo Bianconi STA_REC_HE, 615d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 616d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 617d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 618d0e274afSLorenzo Bianconi STA_REC_MURU, 619d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 620d0e274afSLorenzo Bianconi STA_REC_BFEE, 621d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 6225883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 623d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 624d0e274afSLorenzo Bianconi }; 625d0e274afSLorenzo Bianconi 626d0e274afSLorenzo Bianconi enum { 627d0e274afSLorenzo Bianconi WTBL_GENERIC, 628d0e274afSLorenzo Bianconi WTBL_RX, 629d0e274afSLorenzo Bianconi WTBL_HT, 630d0e274afSLorenzo Bianconi WTBL_VHT, 631d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 632d0e274afSLorenzo Bianconi WTBL_TX_PS, 633d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 634d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 635d0e274afSLorenzo Bianconi WTBL_BA, 636d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 637d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 638d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 639d0e274afSLorenzo Bianconi WTBL_BF, 640d0e274afSLorenzo Bianconi WTBL_SMPS, 641d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 642d0e274afSLorenzo Bianconi WTBL_PN, 643d0e274afSLorenzo Bianconi WTBL_SPE, 644d0e274afSLorenzo Bianconi WTBL_MAX_NUM 645d0e274afSLorenzo Bianconi }; 646d0e274afSLorenzo Bianconi 647d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 648d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 649d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 650d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 651d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 652d0e274afSLorenzo Bianconi 653d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 654d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 655d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 656d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 657d0e274afSLorenzo Bianconi 6584da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 6594da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 6604da64fe0SSean Wang 661d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 662d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 663d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 664d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 665d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 666d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 667d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 668d0e274afSLorenzo Bianconi 669d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 670d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 671d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 672d0e274afSLorenzo Bianconi 673d0e274afSLorenzo Bianconi /* HE MAC */ 674d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 675d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 676d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 677d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 678d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 679d0e274afSLorenzo Bianconi /* HE PHY */ 680d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 681d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 682d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 683d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 684d0e274afSLorenzo Bianconi /* STBC */ 685d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 686d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 687d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 688d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 689d0e274afSLorenzo Bianconi /* GI */ 690d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 691d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 692d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 693d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 694d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 695d0e274afSLorenzo Bianconi /* 242 TONE */ 696d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 697d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 698d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 699d0e274afSLorenzo Bianconi 700d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 701d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 702d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 703d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 704d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 705d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 706d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 707d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 708dfdf6725SLorenzo Bianconi 709dfdf6725SLorenzo Bianconi #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ 710d0e274afSLorenzo Bianconi 711d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 712d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 713d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 714d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 715d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 716d0e274afSLorenzo Bianconi 7175562d5f6SLorenzo Bianconi #define STA_CAP_WMM BIT(0) 7185562d5f6SLorenzo Bianconi #define STA_CAP_SGI_20 BIT(4) 7195562d5f6SLorenzo Bianconi #define STA_CAP_SGI_40 BIT(5) 7205562d5f6SLorenzo Bianconi #define STA_CAP_TX_STBC BIT(6) 7215562d5f6SLorenzo Bianconi #define STA_CAP_RX_STBC BIT(7) 7225562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_80 BIT(16) 7235562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_160 BIT(17) 7245562d5f6SLorenzo Bianconi #define STA_CAP_VHT_TX_STBC BIT(18) 7255562d5f6SLorenzo Bianconi #define STA_CAP_VHT_RX_STBC BIT(19) 7265562d5f6SLorenzo Bianconi #define STA_CAP_VHT_LDPC BIT(23) 7275562d5f6SLorenzo Bianconi #define STA_CAP_LDPC BIT(24) 7285562d5f6SLorenzo Bianconi #define STA_CAP_HT BIT(26) 7295562d5f6SLorenzo Bianconi #define STA_CAP_VHT BIT(27) 7305562d5f6SLorenzo Bianconi #define STA_CAP_HE BIT(28) 7315562d5f6SLorenzo Bianconi 732d0e274afSLorenzo Bianconi enum { 733d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 734d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 735d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 736d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 737d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 738d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 739d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 740d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 741d0e274afSLorenzo Bianconi }; 742d0e274afSLorenzo Bianconi 743d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 744d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 745d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 746d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 747d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 748d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 749d0e274afSLorenzo Bianconi 750d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 751d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 752d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 753d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 754d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 755d0e274afSLorenzo Bianconi 756d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 757d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 758d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 759d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 760d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 761d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 762d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 763d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 764d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 765d0e274afSLorenzo Bianconi 766d0e274afSLorenzo Bianconi enum { 767d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 768d0e274afSLorenzo Bianconi WTBL_SET, 769d0e274afSLorenzo Bianconi WTBL_QUERY, 770d0e274afSLorenzo Bianconi WTBL_RESET_ALL 771d0e274afSLorenzo Bianconi }; 772d0e274afSLorenzo Bianconi 773d0e274afSLorenzo Bianconi enum { 774d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 775d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 776d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 777d0e274afSLorenzo Bianconi }; 778d0e274afSLorenzo Bianconi 779d0e274afSLorenzo Bianconi enum { 780d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 781d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 782d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 783d0e274afSLorenzo Bianconi }; 784d0e274afSLorenzo Bianconi 785d0e274afSLorenzo Bianconi enum { 786d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 787d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 788d0e274afSLorenzo Bianconi }; 789d0e274afSLorenzo Bianconi 7905562d5f6SLorenzo Bianconi /* event table */ 7915562d5f6SLorenzo Bianconi enum { 7925562d5f6SLorenzo Bianconi MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, 7935562d5f6SLorenzo Bianconi MCU_EVENT_FW_START = 0x01, 7945562d5f6SLorenzo Bianconi MCU_EVENT_GENERIC = 0x01, 7955562d5f6SLorenzo Bianconi MCU_EVENT_ACCESS_REG = 0x02, 7965562d5f6SLorenzo Bianconi MCU_EVENT_MT_PATCH_SEM = 0x04, 7975562d5f6SLorenzo Bianconi MCU_EVENT_REG_ACCESS = 0x05, 7985562d5f6SLorenzo Bianconi MCU_EVENT_LP_INFO = 0x07, 7995562d5f6SLorenzo Bianconi MCU_EVENT_SCAN_DONE = 0x0d, 8005562d5f6SLorenzo Bianconi MCU_EVENT_TX_DONE = 0x0f, 8015562d5f6SLorenzo Bianconi MCU_EVENT_ROC = 0x10, 8025562d5f6SLorenzo Bianconi MCU_EVENT_BSS_ABSENCE = 0x11, 8035562d5f6SLorenzo Bianconi MCU_EVENT_BSS_BEACON_LOSS = 0x13, 8045562d5f6SLorenzo Bianconi MCU_EVENT_CH_PRIVILEGE = 0x18, 8055562d5f6SLorenzo Bianconi MCU_EVENT_SCHED_SCAN_DONE = 0x23, 8065562d5f6SLorenzo Bianconi MCU_EVENT_DBG_MSG = 0x27, 8075562d5f6SLorenzo Bianconi MCU_EVENT_TXPWR = 0xd0, 8085562d5f6SLorenzo Bianconi MCU_EVENT_EXT = 0xed, 8095562d5f6SLorenzo Bianconi MCU_EVENT_RESTART_DL = 0xef, 8105562d5f6SLorenzo Bianconi MCU_EVENT_COREDUMP = 0xf0, 8115562d5f6SLorenzo Bianconi }; 8125562d5f6SLorenzo Bianconi 8135562d5f6SLorenzo Bianconi /* ext event table */ 8145562d5f6SLorenzo Bianconi enum { 8155562d5f6SLorenzo Bianconi MCU_EXT_EVENT_PS_SYNC = 0x5, 8165562d5f6SLorenzo Bianconi MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, 8175562d5f6SLorenzo Bianconi MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, 8185562d5f6SLorenzo Bianconi MCU_EXT_EVENT_ASSERT_DUMP = 0x23, 8195562d5f6SLorenzo Bianconi MCU_EXT_EVENT_RDD_REPORT = 0x3a, 8205562d5f6SLorenzo Bianconi MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, 8215562d5f6SLorenzo Bianconi MCU_EXT_EVENT_BCC_NOTIFY = 0x75, 8221966a507SMeiChia Chiu MCU_EXT_EVENT_MURU_CTRL = 0x9f, 8235562d5f6SLorenzo Bianconi }; 8245562d5f6SLorenzo Bianconi 8255562d5f6SLorenzo Bianconi enum { 8265562d5f6SLorenzo Bianconi MCU_Q_QUERY, 8275562d5f6SLorenzo Bianconi MCU_Q_SET, 8285562d5f6SLorenzo Bianconi MCU_Q_RESERVED, 8295562d5f6SLorenzo Bianconi MCU_Q_NA 8305562d5f6SLorenzo Bianconi }; 8315562d5f6SLorenzo Bianconi 8325562d5f6SLorenzo Bianconi enum { 8335562d5f6SLorenzo Bianconi MCU_S2D_H2N, 8345562d5f6SLorenzo Bianconi MCU_S2D_C2N, 8355562d5f6SLorenzo Bianconi MCU_S2D_H2C, 8365562d5f6SLorenzo Bianconi MCU_S2D_H2CN 8375562d5f6SLorenzo Bianconi }; 8385562d5f6SLorenzo Bianconi 8395562d5f6SLorenzo Bianconi enum { 8405562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_FAIL, 8415562d5f6SLorenzo Bianconi PATCH_IS_DL, 8425562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_SUCCESS, 8435562d5f6SLorenzo Bianconi PATCH_REL_SEM_SUCCESS 8445562d5f6SLorenzo Bianconi }; 8455562d5f6SLorenzo Bianconi 8465562d5f6SLorenzo Bianconi enum { 8475562d5f6SLorenzo Bianconi FW_STATE_INITIAL, 8485562d5f6SLorenzo Bianconi FW_STATE_FW_DOWNLOAD, 8495562d5f6SLorenzo Bianconi FW_STATE_NORMAL_OPERATION, 8505562d5f6SLorenzo Bianconi FW_STATE_NORMAL_TRX, 8515562d5f6SLorenzo Bianconi FW_STATE_RDY = 7 8525562d5f6SLorenzo Bianconi }; 8535562d5f6SLorenzo Bianconi 8545562d5f6SLorenzo Bianconi enum { 8555562d5f6SLorenzo Bianconi CH_SWITCH_NORMAL = 0, 8565562d5f6SLorenzo Bianconi CH_SWITCH_SCAN = 3, 8575562d5f6SLorenzo Bianconi CH_SWITCH_MCC = 4, 8585562d5f6SLorenzo Bianconi CH_SWITCH_DFS = 5, 8595562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_START = 6, 8605562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 8615562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 8625562d5f6SLorenzo Bianconi CH_SWITCH_SCAN_BYPASS_DPD = 9 8635562d5f6SLorenzo Bianconi }; 8645562d5f6SLorenzo Bianconi 8655562d5f6SLorenzo Bianconi enum { 8665562d5f6SLorenzo Bianconi THERMAL_SENSOR_TEMP_QUERY, 8675562d5f6SLorenzo Bianconi THERMAL_SENSOR_MANUAL_CTRL, 8685562d5f6SLorenzo Bianconi THERMAL_SENSOR_INFO_QUERY, 8695562d5f6SLorenzo Bianconi THERMAL_SENSOR_TASK_CTRL, 8705562d5f6SLorenzo Bianconi }; 8715562d5f6SLorenzo Bianconi 8725562d5f6SLorenzo Bianconi enum mcu_cipher_type { 8735562d5f6SLorenzo Bianconi MCU_CIPHER_NONE = 0, 8745562d5f6SLorenzo Bianconi MCU_CIPHER_WEP40, 8755562d5f6SLorenzo Bianconi MCU_CIPHER_WEP104, 8765562d5f6SLorenzo Bianconi MCU_CIPHER_WEP128, 8775562d5f6SLorenzo Bianconi MCU_CIPHER_TKIP, 8785562d5f6SLorenzo Bianconi MCU_CIPHER_AES_CCMP, 8795562d5f6SLorenzo Bianconi MCU_CIPHER_CCMP_256, 8805562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP, 8815562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP_256, 8825562d5f6SLorenzo Bianconi MCU_CIPHER_WAPI, 8835562d5f6SLorenzo Bianconi MCU_CIPHER_BIP_CMAC_128, 8845562d5f6SLorenzo Bianconi }; 8855562d5f6SLorenzo Bianconi 8865562d5f6SLorenzo Bianconi enum { 8875562d5f6SLorenzo Bianconi EE_MODE_EFUSE, 8885562d5f6SLorenzo Bianconi EE_MODE_BUFFER, 8895562d5f6SLorenzo Bianconi }; 8905562d5f6SLorenzo Bianconi 8915562d5f6SLorenzo Bianconi enum { 8925562d5f6SLorenzo Bianconi EE_FORMAT_BIN, 8935562d5f6SLorenzo Bianconi EE_FORMAT_WHOLE, 8945562d5f6SLorenzo Bianconi EE_FORMAT_MULTIPLE, 8955562d5f6SLorenzo Bianconi }; 8965562d5f6SLorenzo Bianconi 8975562d5f6SLorenzo Bianconi enum { 8985562d5f6SLorenzo Bianconi MCU_PHY_STATE_TX_RATE, 8995562d5f6SLorenzo Bianconi MCU_PHY_STATE_RX_RATE, 9005562d5f6SLorenzo Bianconi MCU_PHY_STATE_RSSI, 9015562d5f6SLorenzo Bianconi MCU_PHY_STATE_CONTENTION_RX_RATE, 9025562d5f6SLorenzo Bianconi MCU_PHY_STATE_OFDMLQ_CNINFO, 9035562d5f6SLorenzo Bianconi }; 9045562d5f6SLorenzo Bianconi 905d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 906d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 907d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 908d0e274afSLorenzo Bianconi 909d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 910d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 911d0e274afSLorenzo Bianconi 912e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_ID GENMASK(7, 0) 913e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8) 914e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_QUERY BIT(16) 91554722402SLorenzo Bianconi #define __MCU_CMD_FIELD_UNI BIT(17) 916680a2eadSLorenzo Bianconi #define __MCU_CMD_FIELD_CE BIT(18) 9175562d5f6SLorenzo Bianconi #define __MCU_CMD_FIELD_WA BIT(19) 918e6d2070dSLorenzo Bianconi 919e6d2070dSLorenzo Bianconi #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \ 920e6d2070dSLorenzo Bianconi MCU_CMD_##_t) 921e6d2070dSLorenzo Bianconi #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \ 922e6d2070dSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 923e6d2070dSLorenzo Bianconi MCU_EXT_CMD_##_t)) 924e6d2070dSLorenzo Bianconi #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY) 92554722402SLorenzo Bianconi #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \ 92654722402SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 92754722402SLorenzo Bianconi MCU_UNI_CMD_##_t)) 928680a2eadSLorenzo Bianconi #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \ 929680a2eadSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 930680a2eadSLorenzo Bianconi MCU_CE_CMD_##_t)) 931680a2eadSLorenzo Bianconi #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY) 932d0e274afSLorenzo Bianconi 9335562d5f6SLorenzo Bianconi #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA) 9345562d5f6SLorenzo Bianconi #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA) 9355562d5f6SLorenzo Bianconi #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \ 9365562d5f6SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 9375562d5f6SLorenzo Bianconi MCU_WA_PARAM_CMD_##_t)) 9385562d5f6SLorenzo Bianconi 939d0e274afSLorenzo Bianconi enum { 940d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 941d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 9429d8d136cSLorenzo Bianconi MCU_EXT_CMD_RF_TEST = 0x04, 943d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 944d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 945d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 946d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 9479d8d136cSLorenzo Bianconi MCU_EXT_CMD_TXBF_ACTION = 0x1e, 948d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 9499d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_PROT = 0x23, 950d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 951d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 952d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 953d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 9549d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_CTRL = 0x2c, 955d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 9569d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_DRR_CTRL = 0x36, 957d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 958d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 959d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 960d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 961d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 962d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 963d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 964d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 9659d8d136cSLorenzo Bianconi MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, 966d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 9679d8d136cSLorenzo Bianconi MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, 968d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 969d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 9709d8d136cSLorenzo Bianconi MCU_EXT_CMD_GET_MIB_INFO = 0x5a, 971d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 97203a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 9739d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RADAR_TH = 0x7c, 974d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 9759d8d136cSLorenzo Bianconi MCU_EXT_CMD_MWDS_SUPPORT = 0x80, 9769d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, 9779d8d136cSLorenzo Bianconi MCU_EXT_CMD_SCS_CTRL = 0x82, 9789d8d136cSLorenzo Bianconi MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, 9799d8d136cSLorenzo Bianconi MCU_EXT_CMD_FW_DBG_CTRL = 0x95, 9809d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x9d, 9819d8d136cSLorenzo Bianconi MCU_EXT_CMD_MURU_CTRL = 0x9f, 9829d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SPR = 0xa8, 9839d8d136cSLorenzo Bianconi MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, 9849d8d136cSLorenzo Bianconi MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, 9859d8d136cSLorenzo Bianconi MCU_EXT_CMD_PHY_STAT_INFO = 0xad, 986d0e274afSLorenzo Bianconi }; 987d0e274afSLorenzo Bianconi 988d0e274afSLorenzo Bianconi enum { 98954722402SLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01, 99054722402SLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02, 99154722402SLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = 0x03, 99254722402SLorenzo Bianconi MCU_UNI_CMD_SUSPEND = 0x05, 99354722402SLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = 0x06, 99454722402SLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = 0x07, 995d0e274afSLorenzo Bianconi }; 996d0e274afSLorenzo Bianconi 997d0e274afSLorenzo Bianconi enum { 9987159eb82SLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 9997159eb82SLorenzo Bianconi MCU_CMD_FW_START_REQ = 0x02, 1000d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 10017159eb82SLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = 0x4, 10027159eb82SLorenzo Bianconi MCU_CMD_PATCH_START_REQ = 0x05, 10037159eb82SLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = 0x07, 10047159eb82SLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = 0x10, 10059d8d136cSLorenzo Bianconi MCU_CMD_WA_PARAM = 0xc4, 1006d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 10077159eb82SLorenzo Bianconi MCU_CMD_FW_SCATTER = 0xee, 10087159eb82SLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = 0xef, 1009d0e274afSLorenzo Bianconi }; 1010d0e274afSLorenzo Bianconi 1011d0e274afSLorenzo Bianconi /* offload mcu commands */ 1012d0e274afSLorenzo Bianconi enum { 1013680a2eadSLorenzo Bianconi MCU_CE_CMD_TEST_CTRL = 0x01, 1014680a2eadSLorenzo Bianconi MCU_CE_CMD_START_HW_SCAN = 0x03, 1015680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_PS_PROFILE = 0x05, 1016680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f, 1017680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, 1018680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_ABORT = 0x17, 1019680a2eadSLorenzo Bianconi MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, 1020*bf9727a2SSean Wang MCU_CE_CMD_SET_ROC = 0x1c, 1021680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_P2P_OPPPS = 0x33, 1022680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, 1023680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, 1024680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_REQ = 0x62, 1025680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_NIC_CAPAB = 0x8a, 1026680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0, 1027680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_WRITE = 0xc0, 1028680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_READ = 0xc0, 1029680a2eadSLorenzo Bianconi MCU_CE_CMD_CHIP_CONFIG = 0xca, 1030680a2eadSLorenzo Bianconi MCU_CE_CMD_FWLOG_2_HOST = 0xc5, 1031680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_WTBL = 0xcd, 1032680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_TXPWR = 0xd0, 1033d0e274afSLorenzo Bianconi }; 1034d0e274afSLorenzo Bianconi 1035d0e274afSLorenzo Bianconi enum { 1036d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 1037d0e274afSLorenzo Bianconi PATCH_SEM_GET 1038d0e274afSLorenzo Bianconi }; 1039d0e274afSLorenzo Bianconi 1040d0e274afSLorenzo Bianconi enum { 1041d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 1042d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 1043b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 1044d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 1045d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 1046d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 1047d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 104867aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 104967aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 1050d0e274afSLorenzo Bianconi }; 1051d0e274afSLorenzo Bianconi 105255d4c19cSLorenzo Bianconi enum { 105355d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 105455d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 105555d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 105655d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 105755d4c19cSLorenzo Bianconi }; 105855d4c19cSLorenzo Bianconi 1059f7d2958cSLorenzo Bianconi enum { 1060f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 1061f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 1062f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 1063f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 1064f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 1065f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 1066f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 1067f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 1068f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 1069f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 1070f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 1071f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 1072f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 1073f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 1074f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 1075f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 1076f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 1077f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 1078f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 1079f7d2958cSLorenzo Bianconi }; 1080f7d2958cSLorenzo Bianconi 1081193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 1082193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 1083193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 1084193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 1085193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 1086193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 1087193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 1088193e5f22SYN Chen 108955d4c19cSLorenzo Bianconi enum { 109055d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 109155d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 109255d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 109355d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 109455d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 109555d4c19cSLorenzo Bianconi }; 109655d4c19cSLorenzo Bianconi 109755d4c19cSLorenzo Bianconi enum { 109855d4c19cSLorenzo Bianconi WOW_USB = 1, 109955d4c19cSLorenzo Bianconi WOW_PCIE = 2, 110055d4c19cSLorenzo Bianconi WOW_GPIO = 3, 110155d4c19cSLorenzo Bianconi }; 110255d4c19cSLorenzo Bianconi 1103d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 1104d0e274afSLorenzo Bianconi __le16 tag; 1105d0e274afSLorenzo Bianconi __le16 len; 1106d0e274afSLorenzo Bianconi u8 active; 1107d0e274afSLorenzo Bianconi u8 omac_idx; 1108d0e274afSLorenzo Bianconi u8 hw_bss_idx; 1109d0e274afSLorenzo Bianconi u8 band_idx; 1110d0e274afSLorenzo Bianconi __le32 conn_type; 1111d0e274afSLorenzo Bianconi u8 conn_state; 1112d0e274afSLorenzo Bianconi u8 wmm_idx; 1113d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1114d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 1115d0e274afSLorenzo Bianconi __le16 bcn_interval; 1116d0e274afSLorenzo Bianconi u8 dtim_period; 1117d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 1118d0e274afSLorenzo Bianconi * bit(1): B 1119d0e274afSLorenzo Bianconi * bit(2): G 1120d0e274afSLorenzo Bianconi * bit(3): GN 1121d0e274afSLorenzo Bianconi * bit(4): AN 1122d0e274afSLorenzo Bianconi * bit(5): AC 11233cf3e01bSLorenzo Bianconi * bit(6): AX2 11243cf3e01bSLorenzo Bianconi * bit(7): AX5 11253cf3e01bSLorenzo Bianconi * bit(8): AX6 1126d0e274afSLorenzo Bianconi */ 1127d0e274afSLorenzo Bianconi __le16 sta_idx; 11283cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 11293cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 11303cf3e01bSLorenzo Bianconi u8 pad[1]; 1131d0e274afSLorenzo Bianconi } __packed; 1132d0e274afSLorenzo Bianconi 1133d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 1134d0e274afSLorenzo Bianconi __le16 tag; 1135d0e274afSLorenzo Bianconi __le16 len; 1136d0e274afSLorenzo Bianconi u8 qos; 1137d0e274afSLorenzo Bianconi u8 pad[3]; 1138d0e274afSLorenzo Bianconi } __packed; 1139d0e274afSLorenzo Bianconi 1140d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 1141d0e274afSLorenzo Bianconi u8 bss_idx; 1142d0e274afSLorenzo Bianconi u8 reason; 1143d0e274afSLorenzo Bianconi u8 pad[2]; 1144d0e274afSLorenzo Bianconi } __packed; 1145d0e274afSLorenzo Bianconi 1146d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 1147d0e274afSLorenzo Bianconi u8 bss_idx; 1148d0e274afSLorenzo Bianconi u8 is_absent; 1149d0e274afSLorenzo Bianconi u8 free_quota; 1150d0e274afSLorenzo Bianconi u8 pad; 1151d0e274afSLorenzo Bianconi } __packed; 1152d0e274afSLorenzo Bianconi 1153399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 1154399090efSLorenzo Bianconi __le32 ssid_len; 1155399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1156399090efSLorenzo Bianconi } __packed; 1157399090efSLorenzo Bianconi 1158399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 1159399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 1160399090efSLorenzo Bianconi * 2: 5.0GHz 1161399090efSLorenzo Bianconi * Others: Reserved 1162399090efSLorenzo Bianconi */ 1163399090efSLorenzo Bianconi u8 channel_num; 1164399090efSLorenzo Bianconi } __packed; 1165399090efSLorenzo Bianconi 1166399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 1167399090efSLorenzo Bianconi __le32 rssi_th; 1168399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1169399090efSLorenzo Bianconi u8 ssid_len; 1170399090efSLorenzo Bianconi u8 rsv[3]; 1171399090efSLorenzo Bianconi } __packed; 1172399090efSLorenzo Bianconi 1173399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 1174399090efSLorenzo Bianconi u8 seq_num; 1175399090efSLorenzo Bianconi u8 bss_idx; 1176399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 1177399090efSLorenzo Bianconi * 1: ACTIVE SCAN 1178399090efSLorenzo Bianconi */ 1179399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 1180399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 1181399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 1182399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 1183399090efSLorenzo Bianconi */ 1184399090efSLorenzo Bianconi u8 ssids_num; 1185399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 1186399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 1187399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 1188399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 1189399090efSLorenzo Bianconi */ 1190399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 1191399090efSLorenzo Bianconi * 1: Support fields after ies. 1192399090efSLorenzo Bianconi */ 1193399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 1194399090efSLorenzo Bianconi __le16 probe_delay_time; 1195399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 1196399090efSLorenzo Bianconi __le16 timeout_value; 1197399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 1198399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 1199399090efSLorenzo Bianconi * 2: Only 5GHz channels 1200399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 1201399090efSLorenzo Bianconi * 4: Specified channels 1202399090efSLorenzo Bianconi * Others: Reserved 1203399090efSLorenzo Bianconi */ 1204399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 1205399090efSLorenzo Bianconi /* valid when channels_num is set */ 1206399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 1207399090efSLorenzo Bianconi __le16 ies_len; 1208399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 1209399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 1210399090efSLorenzo Bianconi u8 ext_channels_num; 1211399090efSLorenzo Bianconi u8 ext_ssids_num; 1212399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 1213399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 1214399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 1215399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1216399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 1217399090efSLorenzo Bianconi u8 pad[63]; 1218399090efSLorenzo Bianconi u8 ssid_type_ext; 1219399090efSLorenzo Bianconi } __packed; 1220399090efSLorenzo Bianconi 1221399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 1222399090efSLorenzo Bianconi 1223399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 1224399090efSLorenzo Bianconi u8 seq_num; 1225399090efSLorenzo Bianconi u8 sparse_channel_num; 1226399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 1227399090efSLorenzo Bianconi u8 complete_channel_num; 1228399090efSLorenzo Bianconi u8 current_state; 1229399090efSLorenzo Bianconi u8 version; 1230399090efSLorenzo Bianconi u8 pad; 1231399090efSLorenzo Bianconi __le32 beacon_scan_num; 1232399090efSLorenzo Bianconi u8 pno_enabled; 1233399090efSLorenzo Bianconi u8 pad2[3]; 1234399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 1235399090efSLorenzo Bianconi u8 pad3[3]; 1236399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1237399090efSLorenzo Bianconi /* idle format for channel_idle_time 1238399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 1239399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 1240399090efSLorenzo Bianconi * 2: dwell time (16us) 1241399090efSLorenzo Bianconi */ 1242399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1243399090efSLorenzo Bianconi /* beacon and probe response count */ 1244399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1245399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1246399090efSLorenzo Bianconi __le32 beacon_2g_num; 1247399090efSLorenzo Bianconi __le32 beacon_5g_num; 1248399090efSLorenzo Bianconi } __packed; 1249399090efSLorenzo Bianconi 1250399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 1251399090efSLorenzo Bianconi u8 version; 1252399090efSLorenzo Bianconi u8 seq_num; 1253399090efSLorenzo Bianconi u8 stop_on_match; 1254399090efSLorenzo Bianconi u8 ssids_num; 1255399090efSLorenzo Bianconi u8 match_num; 1256399090efSLorenzo Bianconi u8 pad; 1257399090efSLorenzo Bianconi __le16 ie_len; 1258399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 1259399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 1260399090efSLorenzo Bianconi u8 channel_type; 1261399090efSLorenzo Bianconi u8 channels_num; 1262399090efSLorenzo Bianconi u8 intervals_num; 12637139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 1264399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 1265abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 12667139b5c0SSean Wang union { 12677139b5c0SSean Wang struct { 12687139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 1269399090efSLorenzo Bianconi u8 pad2[58]; 12707139b5c0SSean Wang } mt7663; 12717139b5c0SSean Wang struct { 12727139b5c0SSean Wang u8 bss_idx; 1273b94c0ed6SDeren Wu u8 pad1[3]; 1274b94c0ed6SDeren Wu __le32 delay; 1275b94c0ed6SDeren Wu u8 pad2[12]; 12769f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 12779f367c81SDeren Wu u8 pad3[38]; 12787139b5c0SSean Wang } mt7921; 12797139b5c0SSean Wang }; 1280399090efSLorenzo Bianconi } __packed; 1281399090efSLorenzo Bianconi 1282399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 1283399090efSLorenzo Bianconi u8 seq_num; 1284399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 1285399090efSLorenzo Bianconi __le16 pad; 1286399090efSLorenzo Bianconi } __packed; 1287399090efSLorenzo Bianconi 1288b4b880b9SYN Chen struct bss_info_uni_bss_color { 1289b4b880b9SYN Chen __le16 tag; 1290b4b880b9SYN Chen __le16 len; 1291b4b880b9SYN Chen u8 enable; 1292b4b880b9SYN Chen u8 bss_color; 1293b4b880b9SYN Chen u8 rsv[2]; 1294b4b880b9SYN Chen } __packed; 1295b4b880b9SYN Chen 1296d0e274afSLorenzo Bianconi struct bss_info_uni_he { 1297d0e274afSLorenzo Bianconi __le16 tag; 1298d0e274afSLorenzo Bianconi __le16 len; 1299d0e274afSLorenzo Bianconi __le16 he_rts_thres; 1300d0e274afSLorenzo Bianconi u8 he_pe_duration; 1301d0e274afSLorenzo Bianconi u8 su_disable; 1302d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 1303d0e274afSLorenzo Bianconi u8 rsv[2]; 1304d0e274afSLorenzo Bianconi } __packed; 1305d0e274afSLorenzo Bianconi 130655d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 130755d4c19cSLorenzo Bianconi __le16 tag; 130855d4c19cSLorenzo Bianconi __le16 len; 130955d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 131055d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 131155d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 131255d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 131355d4c19cSLorenzo Bianconi * 1: rekey offload disable 131455d4c19cSLorenzo Bianconi * 2: rekey update 131555d4c19cSLorenzo Bianconi */ 131655d4c19cSLorenzo Bianconi u8 keyid; 1317d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 1318d741abeaSLeon Yen u8 pad[1]; 131955d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 132055d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 132155d4c19cSLorenzo Bianconi __le32 group_cipher; 132255d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 132355d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 1324d741abeaSLeon Yen u8 reserverd[4]; 132555d4c19cSLorenzo Bianconi } __packed; 132655d4c19cSLorenzo Bianconi 132755d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 132855d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 132955d4c19cSLorenzo Bianconi 133055d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 133155d4c19cSLorenzo Bianconi __le16 tag; 133255d4c19cSLorenzo Bianconi __le16 len; 133355d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 133455d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 133555d4c19cSLorenzo Bianconi * 1: enable 133655d4c19cSLorenzo Bianconi */ 133755d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 133855d4c19cSLorenzo Bianconi u8 pad; 133955d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 134055d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 134155d4c19cSLorenzo Bianconi u8 rsv[4]; 134255d4c19cSLorenzo Bianconi } __packed; 134355d4c19cSLorenzo Bianconi 134455d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 134555d4c19cSLorenzo Bianconi __le16 tag; 134655d4c19cSLorenzo Bianconi __le16 len; 134755d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 134855d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 134955d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 135055d4c19cSLorenzo Bianconi */ 135155d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 135255d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 135355d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 135455d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 135555d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 135655d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 135755d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 135855d4c19cSLorenzo Bianconi */ 135955d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 136055d4c19cSLorenzo Bianconi * 0x1: HIF_USB 136155d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 136255d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 136355d4c19cSLorenzo Bianconi */ 136455d4c19cSLorenzo Bianconi u8 pad; 136555d4c19cSLorenzo Bianconi u8 rsv[4]; 136655d4c19cSLorenzo Bianconi } __packed; 136755d4c19cSLorenzo Bianconi 136855d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 136955d4c19cSLorenzo Bianconi __le16 tag; 137055d4c19cSLorenzo Bianconi __le16 len; 137155d4c19cSLorenzo Bianconi u8 gpio_pin; 137255d4c19cSLorenzo Bianconi u8 trigger_lvl; 137355d4c19cSLorenzo Bianconi u8 pad[2]; 137455d4c19cSLorenzo Bianconi __le32 gpio_interval; 137555d4c19cSLorenzo Bianconi u8 rsv[4]; 137655d4c19cSLorenzo Bianconi } __packed; 137755d4c19cSLorenzo Bianconi 137855d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 137955d4c19cSLorenzo Bianconi __le16 tag; 138055d4c19cSLorenzo Bianconi __le16 len; 138155d4c19cSLorenzo Bianconi u8 mode; 138255d4c19cSLorenzo Bianconi u8 ips_num; 138355d4c19cSLorenzo Bianconi u8 option; 138455d4c19cSLorenzo Bianconi u8 pad[1]; 138555d4c19cSLorenzo Bianconi } __packed; 138655d4c19cSLorenzo Bianconi 138755d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 138855d4c19cSLorenzo Bianconi __le16 tag; 138955d4c19cSLorenzo Bianconi __le16 len; 139055d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 139155d4c19cSLorenzo Bianconi * 1: suspend mode enabled 139255d4c19cSLorenzo Bianconi */ 139355d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 139455d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 139555d4c19cSLorenzo Bianconi * 1: update by wow dtim 139655d4c19cSLorenzo Bianconi */ 139755d4c19cSLorenzo Bianconi u8 pad[5]; 139855d4c19cSLorenzo Bianconi } __packed; 139955d4c19cSLorenzo Bianconi 1400f5056657SSean Wang enum mt76_sta_info_state { 1401f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 1402f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 1403f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 1404f5056657SSean Wang }; 1405f5056657SSean Wang 14065802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 14075802106fSLorenzo Bianconi struct ieee80211_sta *sta; 14085802106fSLorenzo Bianconi struct mt76_wcid *wcid; 14095802106fSLorenzo Bianconi 14105802106fSLorenzo Bianconi struct ieee80211_vif *vif; 14115802106fSLorenzo Bianconi 141282453b1cSLorenzo Bianconi bool offload_fw; 14135802106fSLorenzo Bianconi bool enable; 1414f5056657SSean Wang bool newly; 14155802106fSLorenzo Bianconi int cmd; 14165802106fSLorenzo Bianconi u8 rcpi; 1417f5056657SSean Wang u8 state; 14185802106fSLorenzo Bianconi }; 14195802106fSLorenzo Bianconi 142018369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 142118369a4fSLorenzo Bianconi 142218369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 142318369a4fSLorenzo Bianconi u8 channel; 142418369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 142518369a4fSLorenzo Bianconi } __packed; 142618369a4fSLorenzo Bianconi 142718369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 142818369a4fSLorenzo Bianconi /* DW0 - common info*/ 142918369a4fSLorenzo Bianconi u8 ver; 143018369a4fSLorenzo Bianconi u8 pad0; 143118369a4fSLorenzo Bianconi __le16 len; 143218369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 143318369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 14349b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 143518369a4fSLorenzo Bianconi u8 last_msg; 143618369a4fSLorenzo Bianconi u8 pad1; 143718369a4fSLorenzo Bianconi /* DW3 */ 143818369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 143918369a4fSLorenzo Bianconi u8 pad2[32]; 144018369a4fSLorenzo Bianconi } __packed; 144118369a4fSLorenzo Bianconi 1442c0b21255SSean Wang struct mt76_connac_config { 1443c0b21255SSean Wang __le16 id; 1444c0b21255SSean Wang u8 type; 1445c0b21255SSean Wang u8 resp_type; 1446c0b21255SSean Wang __le16 data_size; 1447c0b21255SSean Wang __le16 resv; 1448c0b21255SSean Wang u8 data[320]; 1449c0b21255SSean Wang } __packed; 1450c0b21255SSean Wang 145109c874a1SLorenzo Bianconi static inline enum mcu_cipher_type 145209c874a1SLorenzo Bianconi mt76_connac_mcu_get_cipher(int cipher) 145309c874a1SLorenzo Bianconi { 145409c874a1SLorenzo Bianconi switch (cipher) { 145509c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP40: 145609c874a1SLorenzo Bianconi return MCU_CIPHER_WEP40; 145709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP104: 145809c874a1SLorenzo Bianconi return MCU_CIPHER_WEP104; 145909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_TKIP: 146009c874a1SLorenzo Bianconi return MCU_CIPHER_TKIP; 146109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_AES_CMAC: 146209c874a1SLorenzo Bianconi return MCU_CIPHER_BIP_CMAC_128; 146309c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP: 146409c874a1SLorenzo Bianconi return MCU_CIPHER_AES_CCMP; 146509c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP_256: 146609c874a1SLorenzo Bianconi return MCU_CIPHER_CCMP_256; 146709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP: 146809c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP; 146909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP_256: 147009c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP_256; 147109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_SMS4: 147209c874a1SLorenzo Bianconi return MCU_CIPHER_WAPI; 147309c874a1SLorenzo Bianconi default: 147409c874a1SLorenzo Bianconi return MCU_CIPHER_NONE; 147509c874a1SLorenzo Bianconi } 147609c874a1SLorenzo Bianconi } 147709c874a1SLorenzo Bianconi 14789e90c351SLorenzo Bianconi static inline u32 14799e90c351SLorenzo Bianconi mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa) 14809e90c351SLorenzo Bianconi { 14819e90c351SLorenzo Bianconi u32 ret = 0; 14829e90c351SLorenzo Bianconi 14839e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_SET_ENCRYPT ? 14849e90c351SLorenzo Bianconi DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0; 14859e90c351SLorenzo Bianconi if (is_mt7921(dev)) 14869e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_ENCRY_MODE ? 14879e90c351SLorenzo Bianconi DL_CONFIG_ENCRY_MODE_SEL : 0; 14889e90c351SLorenzo Bianconi ret |= FIELD_PREP(DL_MODE_KEY_IDX, 14899e90c351SLorenzo Bianconi FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 14909e90c351SLorenzo Bianconi ret |= DL_MODE_NEED_RSP; 14919e90c351SLorenzo Bianconi ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; 14929e90c351SLorenzo Bianconi 14939e90c351SLorenzo Bianconi return ret; 14949e90c351SLorenzo Bianconi } 14959e90c351SLorenzo Bianconi 149667aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 149767aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 149867aa2743SLorenzo Bianconi 149967aa2743SLorenzo Bianconi static inline void 150067aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 150167aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 150267aa2743SLorenzo Bianconi { 150367aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 150467aa2743SLorenzo Bianconi 15052fec2ea6SLorenzo Bianconi if (!is_connac_v1(dev)) { 150667aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 150767aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 150867aa2743SLorenzo Bianconi } else { 150967aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 151067aa2743SLorenzo Bianconi } 151167aa2743SLorenzo Bianconi } 151267aa2743SLorenzo Bianconi 1513d0e274afSLorenzo Bianconi struct sk_buff * 1514e2c93b68SLorenzo Bianconi __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1515e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid, int len); 1516e2c93b68SLorenzo Bianconi static inline struct sk_buff * 1517d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1518e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid) 1519e2c93b68SLorenzo Bianconi { 1520e2c93b68SLorenzo Bianconi return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 1521e2c93b68SLorenzo Bianconi MT76_CONNAC_STA_UPDATE_MAX_SIZE); 1522e2c93b68SLorenzo Bianconi } 1523e2c93b68SLorenzo Bianconi 1524d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1525d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1526d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1527d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1528d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1529d0e274afSLorenzo Bianconi void *sta_wtbl); 1530d0e274afSLorenzo Bianconi static inline struct tlv * 1531d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1532d0e274afSLorenzo Bianconi { 1533d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1534d0e274afSLorenzo Bianconi } 1535d0e274afSLorenzo Bianconi 1536d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1537d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1538d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1539d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1540f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1541f5056657SSean Wang bool newly); 1542d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1543d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1544d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1545d0e274afSLorenzo Bianconi void *wtbl_tlv); 1546d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1547868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 154866978204SFelix Fietkau struct mt76_wcid *wcid, 1549d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 155024299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 155124299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 155224299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 15535a521c0fSLorenzo Bianconi int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 15545a521c0fSLorenzo Bianconi struct ieee80211_vif *vif, 15555a521c0fSLorenzo Bianconi struct ieee80211_sta *sta); 1556d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1557d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 15585802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1559f5056657SSean Wang u8 rcpi, u8 state); 1560d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1561d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1562187169deSLorenzo Bianconi void *wtbl_tlv, bool ldpc); 1563d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1564d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1565d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1566d0e274afSLorenzo Bianconi void *wtbl_tlv); 1567d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1568d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1569d0e274afSLorenzo Bianconi bool enable, bool tx); 1570d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1571d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1572d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1573d0e274afSLorenzo Bianconi bool enable); 1574d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1575d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1576b5322e44SLorenzo Bianconi int cmd, bool enable, bool tx); 1577d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1578d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1579d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1580d0e274afSLorenzo Bianconi bool enable); 1581f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 15825802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1583d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1584d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1585d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1586d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1587d0e274afSLorenzo Bianconi bool hdr_trans); 1588d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1589d0e274afSLorenzo Bianconi u32 mode); 1590d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1591d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1592d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1593f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1594d0e274afSLorenzo Bianconi 1595399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1596399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1597399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1598399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1599399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1600399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1601399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1602399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1603399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1604399090efSLorenzo Bianconi bool enable); 1605f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1606f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1607f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 160855d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 160955d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 161055d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 161155d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 161255d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 161355d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1614f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1615f5056657SSean Wang enum ieee80211_sta_state old_state, 1616f5056657SSean Wang enum ieee80211_sta_state new_state); 16170da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1618c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 16190da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 16200da3c795SSean Wang struct mt76_connac_coredump *coredump); 162118369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 16221f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 16231f832887SLorenzo Bianconi struct ieee80211_vif *vif); 162487f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 162587f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1626e6d557a7SLorenzo Bianconi 1627e6d557a7SLorenzo Bianconi const struct ieee80211_sta_he_cap * 1628e6d557a7SLorenzo Bianconi mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); 1629e6d557a7SLorenzo Bianconi u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1630e6d557a7SLorenzo Bianconi enum nl80211_band band, struct ieee80211_sta *sta); 16316683d988SLorenzo Bianconi 16326683d988SLorenzo Bianconi int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 16336683d988SLorenzo Bianconi struct mt76_connac_sta_key_conf *sta_key_conf, 16346683d988SLorenzo Bianconi struct ieee80211_key_conf *key, int mcu_cmd, 16356683d988SLorenzo Bianconi struct mt76_wcid *wcid, enum set_key_cmd cmd); 163654735e11SLorenzo Bianconi 163764f4e823SLorenzo Bianconi void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif); 163854735e11SLorenzo Bianconi void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 163954735e11SLorenzo Bianconi struct ieee80211_vif *vif); 164049126ac1SLorenzo Bianconi int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 164149126ac1SLorenzo Bianconi struct ieee80211_vif *vif, 164249126ac1SLorenzo Bianconi struct ieee80211_sta *sta, 164349126ac1SLorenzo Bianconi struct mt76_phy *phy, u8 wlan_idx, 164449126ac1SLorenzo Bianconi bool enable); 1645836c0c98SLorenzo Bianconi void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 1646836c0c98SLorenzo Bianconi struct ieee80211_sta *sta); 16472557e568SLorenzo Bianconi void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 16482557e568SLorenzo Bianconi struct ieee80211_sta *sta, 16492557e568SLorenzo Bianconi void *sta_wtbl, void *wtbl_tlv); 165048d743d1SLorenzo Bianconi int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); 1651ae90bdd6SLorenzo Bianconi int mt76_connac_mcu_restart(struct mt76_dev *dev); 165297cef84dSLorenzo Bianconi int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 165397cef84dSLorenzo Bianconi u8 rx_sel, u8 val); 1654d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1655