1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 99e90c351SLorenzo Bianconi #define FW_FEATURE_SET_ENCRYPT BIT(0) 109e90c351SLorenzo Bianconi #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 119e90c351SLorenzo Bianconi #define FW_FEATURE_ENCRY_MODE BIT(4) 129e90c351SLorenzo Bianconi #define FW_FEATURE_OVERRIDE_ADDR BIT(5) 139e90c351SLorenzo Bianconi 149e90c351SLorenzo Bianconi #define DL_MODE_ENCRYPT BIT(0) 159e90c351SLorenzo Bianconi #define DL_MODE_KEY_IDX GENMASK(2, 1) 169e90c351SLorenzo Bianconi #define DL_MODE_RESET_SEC_IV BIT(3) 179e90c351SLorenzo Bianconi #define DL_MODE_WORKING_PDA_CR4 BIT(4) 189e90c351SLorenzo Bianconi #define DL_MODE_VALID_RAM_ENTRY BIT(5) 199e90c351SLorenzo Bianconi #define DL_CONFIG_ENCRY_MODE_SEL BIT(6) 209e90c351SLorenzo Bianconi #define DL_MODE_NEED_RSP BIT(31) 219e90c351SLorenzo Bianconi 229e90c351SLorenzo Bianconi #define FW_START_OVERRIDE BIT(0) 239e90c351SLorenzo Bianconi #define FW_START_WORKING_PDA_CR4 BIT(2) 249e90c351SLorenzo Bianconi 259e90c351SLorenzo Bianconi #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) 269e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) 279e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_INFO 0x2 289e90c351SLorenzo Bianconi 293d8c636cSLorenzo Bianconi struct mt76_connac2_patch_hdr { 303d8c636cSLorenzo Bianconi char build_date[16]; 313d8c636cSLorenzo Bianconi char platform[4]; 323d8c636cSLorenzo Bianconi __be32 hw_sw_ver; 333d8c636cSLorenzo Bianconi __be32 patch_ver; 343d8c636cSLorenzo Bianconi __be16 checksum; 353d8c636cSLorenzo Bianconi u16 rsv; 363d8c636cSLorenzo Bianconi struct { 373d8c636cSLorenzo Bianconi __be32 patch_ver; 383d8c636cSLorenzo Bianconi __be32 subsys; 393d8c636cSLorenzo Bianconi __be32 feature; 403d8c636cSLorenzo Bianconi __be32 n_region; 413d8c636cSLorenzo Bianconi __be32 crc; 423d8c636cSLorenzo Bianconi u32 rsv[11]; 433d8c636cSLorenzo Bianconi } desc; 443d8c636cSLorenzo Bianconi } __packed; 453d8c636cSLorenzo Bianconi 463d8c636cSLorenzo Bianconi struct mt76_connac2_patch_sec { 473d8c636cSLorenzo Bianconi __be32 type; 483d8c636cSLorenzo Bianconi __be32 offs; 493d8c636cSLorenzo Bianconi __be32 size; 503d8c636cSLorenzo Bianconi union { 513d8c636cSLorenzo Bianconi __be32 spec[13]; 523d8c636cSLorenzo Bianconi struct { 533d8c636cSLorenzo Bianconi __be32 addr; 543d8c636cSLorenzo Bianconi __be32 len; 553d8c636cSLorenzo Bianconi __be32 sec_key_idx; 563d8c636cSLorenzo Bianconi __be32 align_len; 573d8c636cSLorenzo Bianconi u32 rsv[9]; 583d8c636cSLorenzo Bianconi } info; 593d8c636cSLorenzo Bianconi }; 603d8c636cSLorenzo Bianconi } __packed; 613d8c636cSLorenzo Bianconi 623d8c636cSLorenzo Bianconi struct mt76_connac2_fw_trailer { 633d8c636cSLorenzo Bianconi u8 chip_id; 643d8c636cSLorenzo Bianconi u8 eco_code; 653d8c636cSLorenzo Bianconi u8 n_region; 663d8c636cSLorenzo Bianconi u8 format_ver; 673d8c636cSLorenzo Bianconi u8 format_flag; 683d8c636cSLorenzo Bianconi u8 rsv[2]; 693d8c636cSLorenzo Bianconi char fw_ver[10]; 703d8c636cSLorenzo Bianconi char build_date[15]; 713d8c636cSLorenzo Bianconi __le32 crc; 723d8c636cSLorenzo Bianconi } __packed; 733d8c636cSLorenzo Bianconi 743d8c636cSLorenzo Bianconi struct mt76_connac2_fw_region { 753d8c636cSLorenzo Bianconi __le32 decomp_crc; 763d8c636cSLorenzo Bianconi __le32 decomp_len; 773d8c636cSLorenzo Bianconi __le32 decomp_blk_sz; 783d8c636cSLorenzo Bianconi u8 rsv[4]; 793d8c636cSLorenzo Bianconi __le32 addr; 803d8c636cSLorenzo Bianconi __le32 len; 813d8c636cSLorenzo Bianconi u8 feature_set; 823d8c636cSLorenzo Bianconi u8 rsv1[15]; 833d8c636cSLorenzo Bianconi } __packed; 843d8c636cSLorenzo Bianconi 85d0e274afSLorenzo Bianconi struct tlv { 86d0e274afSLorenzo Bianconi __le16 tag; 87d0e274afSLorenzo Bianconi __le16 len; 88d0e274afSLorenzo Bianconi } __packed; 89d0e274afSLorenzo Bianconi 905562d5f6SLorenzo Bianconi struct bss_info_omac { 915562d5f6SLorenzo Bianconi __le16 tag; 925562d5f6SLorenzo Bianconi __le16 len; 935562d5f6SLorenzo Bianconi u8 hw_bss_idx; 945562d5f6SLorenzo Bianconi u8 omac_idx; 955562d5f6SLorenzo Bianconi u8 band_idx; 965562d5f6SLorenzo Bianconi u8 rsv0; 975562d5f6SLorenzo Bianconi __le32 conn_type; 985562d5f6SLorenzo Bianconi u32 rsv1; 995562d5f6SLorenzo Bianconi } __packed; 1005562d5f6SLorenzo Bianconi 1015562d5f6SLorenzo Bianconi struct bss_info_basic { 1025562d5f6SLorenzo Bianconi __le16 tag; 1035562d5f6SLorenzo Bianconi __le16 len; 1045562d5f6SLorenzo Bianconi __le32 network_type; 1055562d5f6SLorenzo Bianconi u8 active; 1065562d5f6SLorenzo Bianconi u8 rsv0; 1075562d5f6SLorenzo Bianconi __le16 bcn_interval; 1085562d5f6SLorenzo Bianconi u8 bssid[ETH_ALEN]; 1095562d5f6SLorenzo Bianconi u8 wmm_idx; 1105562d5f6SLorenzo Bianconi u8 dtim_period; 1115562d5f6SLorenzo Bianconi u8 bmc_wcid_lo; 1125562d5f6SLorenzo Bianconi u8 cipher; 1135562d5f6SLorenzo Bianconi u8 phy_mode; 1145562d5f6SLorenzo Bianconi u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */ 1155562d5f6SLorenzo Bianconi u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */ 1165562d5f6SLorenzo Bianconi u8 bmc_wcid_hi; /* high Byte and version */ 1175562d5f6SLorenzo Bianconi u8 rsv[2]; 1185562d5f6SLorenzo Bianconi } __packed; 1195562d5f6SLorenzo Bianconi 1205562d5f6SLorenzo Bianconi struct bss_info_rf_ch { 1215562d5f6SLorenzo Bianconi __le16 tag; 1225562d5f6SLorenzo Bianconi __le16 len; 1235562d5f6SLorenzo Bianconi u8 pri_ch; 1245562d5f6SLorenzo Bianconi u8 center_ch0; 1255562d5f6SLorenzo Bianconi u8 center_ch1; 1265562d5f6SLorenzo Bianconi u8 bw; 1275562d5f6SLorenzo Bianconi u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */ 1285562d5f6SLorenzo Bianconi u8 he_all_disable; /* 1: disallow all HETB, 0: allow */ 1295562d5f6SLorenzo Bianconi u8 rsv[2]; 1305562d5f6SLorenzo Bianconi } __packed; 1315562d5f6SLorenzo Bianconi 1325562d5f6SLorenzo Bianconi struct bss_info_ext_bss { 1335562d5f6SLorenzo Bianconi __le16 tag; 1345562d5f6SLorenzo Bianconi __le16 len; 1355562d5f6SLorenzo Bianconi __le32 mbss_tsf_offset; /* in unit of us */ 1365562d5f6SLorenzo Bianconi u8 rsv[8]; 1375562d5f6SLorenzo Bianconi } __packed; 1385562d5f6SLorenzo Bianconi 1395562d5f6SLorenzo Bianconi enum { 1405562d5f6SLorenzo Bianconi BSS_INFO_OMAC, 1415562d5f6SLorenzo Bianconi BSS_INFO_BASIC, 1425562d5f6SLorenzo Bianconi BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 1435562d5f6SLorenzo Bianconi BSS_INFO_PM, /* sta only */ 1445562d5f6SLorenzo Bianconi BSS_INFO_UAPSD, /* sta only */ 1455562d5f6SLorenzo Bianconi BSS_INFO_ROAM_DETECT, /* obsoleted */ 1465562d5f6SLorenzo Bianconi BSS_INFO_LQ_RM, /* obsoleted */ 1475562d5f6SLorenzo Bianconi BSS_INFO_EXT_BSS, 1485562d5f6SLorenzo Bianconi BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */ 1495562d5f6SLorenzo Bianconi BSS_INFO_SYNC_MODE, /* obsoleted */ 1505562d5f6SLorenzo Bianconi BSS_INFO_RA, 1515562d5f6SLorenzo Bianconi BSS_INFO_HW_AMSDU, 1525562d5f6SLorenzo Bianconi BSS_INFO_BSS_COLOR, 1535562d5f6SLorenzo Bianconi BSS_INFO_HE_BASIC, 1545562d5f6SLorenzo Bianconi BSS_INFO_PROTECT_INFO, 1555562d5f6SLorenzo Bianconi BSS_INFO_OFFLOAD, 1565562d5f6SLorenzo Bianconi BSS_INFO_11V_MBSSID, 1575562d5f6SLorenzo Bianconi BSS_INFO_MAX_NUM 1585562d5f6SLorenzo Bianconi }; 1595562d5f6SLorenzo Bianconi 160d0e274afSLorenzo Bianconi /* sta_rec */ 161d0e274afSLorenzo Bianconi 162d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 163d0e274afSLorenzo Bianconi u8 rsv[2]; 164d0e274afSLorenzo Bianconi __le16 tlv_num; 165d0e274afSLorenzo Bianconi } __packed; 166d0e274afSLorenzo Bianconi 167d0e274afSLorenzo Bianconi struct sta_req_hdr { 168d0e274afSLorenzo Bianconi u8 bss_idx; 169d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 170d0e274afSLorenzo Bianconi __le16 tlv_num; 171d0e274afSLorenzo Bianconi u8 is_tlv_append; 172d0e274afSLorenzo Bianconi u8 muar_idx; 173d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 174d0e274afSLorenzo Bianconi u8 rsv; 175d0e274afSLorenzo Bianconi } __packed; 176d0e274afSLorenzo Bianconi 177d0e274afSLorenzo Bianconi struct sta_rec_basic { 178d0e274afSLorenzo Bianconi __le16 tag; 179d0e274afSLorenzo Bianconi __le16 len; 180d0e274afSLorenzo Bianconi __le32 conn_type; 181d0e274afSLorenzo Bianconi u8 conn_state; 182d0e274afSLorenzo Bianconi u8 qos; 183d0e274afSLorenzo Bianconi __le16 aid; 184d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 185d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 186d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 187d0e274afSLorenzo Bianconi __le16 extra_info; 188d0e274afSLorenzo Bianconi } __packed; 189d0e274afSLorenzo Bianconi 190d0e274afSLorenzo Bianconi struct sta_rec_ht { 191d0e274afSLorenzo Bianconi __le16 tag; 192d0e274afSLorenzo Bianconi __le16 len; 193d0e274afSLorenzo Bianconi __le16 ht_cap; 194d0e274afSLorenzo Bianconi u16 rsv; 195d0e274afSLorenzo Bianconi } __packed; 196d0e274afSLorenzo Bianconi 197d0e274afSLorenzo Bianconi struct sta_rec_vht { 198d0e274afSLorenzo Bianconi __le16 tag; 199d0e274afSLorenzo Bianconi __le16 len; 200d0e274afSLorenzo Bianconi __le32 vht_cap; 201d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 202d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 2035562d5f6SLorenzo Bianconi /* mt7915 - mt7921 */ 204d0e274afSLorenzo Bianconi u8 rts_bw_sig; 205d0e274afSLorenzo Bianconi u8 rsv[3]; 206d0e274afSLorenzo Bianconi } __packed; 207d0e274afSLorenzo Bianconi 208d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 209d0e274afSLorenzo Bianconi __le16 tag; 210d0e274afSLorenzo Bianconi __le16 len; 211d0e274afSLorenzo Bianconi u8 dac_map; 212d0e274afSLorenzo Bianconi u8 tac_map; 213d0e274afSLorenzo Bianconi u8 max_sp; 214d0e274afSLorenzo Bianconi u8 rsv0; 215d0e274afSLorenzo Bianconi __le16 listen_interval; 216d0e274afSLorenzo Bianconi u8 rsv1[2]; 217d0e274afSLorenzo Bianconi } __packed; 218d0e274afSLorenzo Bianconi 219d0e274afSLorenzo Bianconi struct sta_rec_ba { 220d0e274afSLorenzo Bianconi __le16 tag; 221d0e274afSLorenzo Bianconi __le16 len; 222d0e274afSLorenzo Bianconi u8 tid; 223d0e274afSLorenzo Bianconi u8 ba_type; 224d0e274afSLorenzo Bianconi u8 amsdu; 225d0e274afSLorenzo Bianconi u8 ba_en; 226d0e274afSLorenzo Bianconi __le16 ssn; 227d0e274afSLorenzo Bianconi __le16 winsize; 228d0e274afSLorenzo Bianconi } __packed; 229d0e274afSLorenzo Bianconi 230d0e274afSLorenzo Bianconi struct sta_rec_he { 231d0e274afSLorenzo Bianconi __le16 tag; 232d0e274afSLorenzo Bianconi __le16 len; 233d0e274afSLorenzo Bianconi 234d0e274afSLorenzo Bianconi __le32 he_cap; 235d0e274afSLorenzo Bianconi 236d0e274afSLorenzo Bianconi u8 t_frame_dur; 237d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 238d0e274afSLorenzo Bianconi u8 bw_set; 239d0e274afSLorenzo Bianconi u8 device_class; 240d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 241d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 242d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 243d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 244d0e274afSLorenzo Bianconi u8 dcm_max_ru; 245d0e274afSLorenzo Bianconi u8 punc_pream_rx; 246d0e274afSLorenzo Bianconi u8 pkt_ext; 247d0e274afSLorenzo Bianconi u8 rsv1; 248d0e274afSLorenzo Bianconi 249d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 250d0e274afSLorenzo Bianconi 251d0e274afSLorenzo Bianconi u8 rsv2[2]; 252d0e274afSLorenzo Bianconi } __packed; 253d0e274afSLorenzo Bianconi 254d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 255d0e274afSLorenzo Bianconi __le16 tag; 256d0e274afSLorenzo Bianconi __le16 len; 257d0e274afSLorenzo Bianconi u8 max_amsdu_num; 258d0e274afSLorenzo Bianconi u8 max_mpdu_size; 259d0e274afSLorenzo Bianconi u8 amsdu_en; 260d0e274afSLorenzo Bianconi u8 rsv; 261d0e274afSLorenzo Bianconi } __packed; 262d0e274afSLorenzo Bianconi 263d0e274afSLorenzo Bianconi struct sta_rec_state { 264d0e274afSLorenzo Bianconi __le16 tag; 265d0e274afSLorenzo Bianconi __le16 len; 266d0e274afSLorenzo Bianconi __le32 flags; 267d0e274afSLorenzo Bianconi u8 state; 268d0e274afSLorenzo Bianconi u8 vht_opmode; 269d0e274afSLorenzo Bianconi u8 action; 270d0e274afSLorenzo Bianconi u8 rsv[1]; 271d0e274afSLorenzo Bianconi } __packed; 272d0e274afSLorenzo Bianconi 27399b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 27499b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 275d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 276d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 277d0e274afSLorenzo Bianconi __le16 tag; 278d0e274afSLorenzo Bianconi __le16 len; 279d0e274afSLorenzo Bianconi __le16 legacy; 280d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 281d0e274afSLorenzo Bianconi } __packed; 282d0e274afSLorenzo Bianconi 283d0e274afSLorenzo Bianconi struct sta_rec_phy { 284d0e274afSLorenzo Bianconi __le16 tag; 285d0e274afSLorenzo Bianconi __le16 len; 286d0e274afSLorenzo Bianconi __le16 basic_rate; 287d0e274afSLorenzo Bianconi u8 phy_type; 288d0e274afSLorenzo Bianconi u8 ampdu; 289d0e274afSLorenzo Bianconi u8 rts_policy; 290d0e274afSLorenzo Bianconi u8 rcpi; 291d0e274afSLorenzo Bianconi u8 rsv[2]; 292d0e274afSLorenzo Bianconi } __packed; 293d0e274afSLorenzo Bianconi 2945883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 2955883892bSLorenzo Bianconi __le16 tag; 2965883892bSLorenzo Bianconi __le16 len; 2975883892bSLorenzo Bianconi __le16 capa; 2985883892bSLorenzo Bianconi u8 rsv[2]; 2995883892bSLorenzo Bianconi } __packed; 3005883892bSLorenzo Bianconi 3015562d5f6SLorenzo Bianconi struct sec_key { 3025562d5f6SLorenzo Bianconi u8 cipher_id; 3035562d5f6SLorenzo Bianconi u8 cipher_len; 3045562d5f6SLorenzo Bianconi u8 key_id; 3055562d5f6SLorenzo Bianconi u8 key_len; 3065562d5f6SLorenzo Bianconi u8 key[32]; 3075562d5f6SLorenzo Bianconi } __packed; 3085562d5f6SLorenzo Bianconi 3095562d5f6SLorenzo Bianconi struct sta_rec_sec { 3105562d5f6SLorenzo Bianconi __le16 tag; 3115562d5f6SLorenzo Bianconi __le16 len; 3125562d5f6SLorenzo Bianconi u8 add; 3135562d5f6SLorenzo Bianconi u8 n_cipher; 3145562d5f6SLorenzo Bianconi u8 rsv[2]; 3155562d5f6SLorenzo Bianconi 3165562d5f6SLorenzo Bianconi struct sec_key key[2]; 3175562d5f6SLorenzo Bianconi } __packed; 3185562d5f6SLorenzo Bianconi 3195562d5f6SLorenzo Bianconi struct sta_rec_bf { 3205562d5f6SLorenzo Bianconi __le16 tag; 3215562d5f6SLorenzo Bianconi __le16 len; 3225562d5f6SLorenzo Bianconi 3235562d5f6SLorenzo Bianconi __le16 pfmu; /* 0xffff: no access right for PFMU */ 3245562d5f6SLorenzo Bianconi bool su_mu; /* 0: SU, 1: MU */ 3255562d5f6SLorenzo Bianconi u8 bf_cap; /* 0: iBF, 1: eBF */ 3265562d5f6SLorenzo Bianconi u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */ 3275562d5f6SLorenzo Bianconi u8 ndpa_rate; 3285562d5f6SLorenzo Bianconi u8 ndp_rate; 3295562d5f6SLorenzo Bianconi u8 rept_poll_rate; 3305562d5f6SLorenzo Bianconi u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */ 3315562d5f6SLorenzo Bianconi u8 ncol; 3325562d5f6SLorenzo Bianconi u8 nrow; 3335562d5f6SLorenzo Bianconi u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */ 3345562d5f6SLorenzo Bianconi 3355562d5f6SLorenzo Bianconi u8 mem_total; 3365562d5f6SLorenzo Bianconi u8 mem_20m; 3375562d5f6SLorenzo Bianconi struct { 3385562d5f6SLorenzo Bianconi u8 row; 3395562d5f6SLorenzo Bianconi u8 col: 6, row_msb: 2; 3405562d5f6SLorenzo Bianconi } mem[4]; 3415562d5f6SLorenzo Bianconi 3425562d5f6SLorenzo Bianconi __le16 smart_ant; 3435562d5f6SLorenzo Bianconi u8 se_idx; 3445562d5f6SLorenzo Bianconi u8 auto_sounding; /* b7: low traffic indicator 3455562d5f6SLorenzo Bianconi * b6: Stop sounding for this entry 3465562d5f6SLorenzo Bianconi * b5 ~ b0: postpone sounding 3475562d5f6SLorenzo Bianconi */ 3485562d5f6SLorenzo Bianconi u8 ibf_timeout; 3495562d5f6SLorenzo Bianconi u8 ibf_dbw; 3505562d5f6SLorenzo Bianconi u8 ibf_ncol; 3515562d5f6SLorenzo Bianconi u8 ibf_nrow; 3525562d5f6SLorenzo Bianconi u8 nrow_bw160; 3535562d5f6SLorenzo Bianconi u8 ncol_bw160; 3545562d5f6SLorenzo Bianconi u8 ru_start_idx; 3555562d5f6SLorenzo Bianconi u8 ru_end_idx; 3565562d5f6SLorenzo Bianconi 3575562d5f6SLorenzo Bianconi bool trigger_su; 3585562d5f6SLorenzo Bianconi bool trigger_mu; 3595562d5f6SLorenzo Bianconi bool ng16_su; 3605562d5f6SLorenzo Bianconi bool ng16_mu; 3615562d5f6SLorenzo Bianconi bool codebook42_su; 3625562d5f6SLorenzo Bianconi bool codebook75_mu; 3635562d5f6SLorenzo Bianconi 3645562d5f6SLorenzo Bianconi u8 he_ltf; 3655562d5f6SLorenzo Bianconi u8 rsv[3]; 3665562d5f6SLorenzo Bianconi } __packed; 3675562d5f6SLorenzo Bianconi 3685562d5f6SLorenzo Bianconi struct sta_rec_bfee { 3695562d5f6SLorenzo Bianconi __le16 tag; 3705562d5f6SLorenzo Bianconi __le16 len; 3715562d5f6SLorenzo Bianconi bool fb_identity_matrix; /* 1: feedback identity matrix */ 3725562d5f6SLorenzo Bianconi bool ignore_feedback; /* 1: ignore */ 3735562d5f6SLorenzo Bianconi u8 rsv[2]; 3745562d5f6SLorenzo Bianconi } __packed; 3755562d5f6SLorenzo Bianconi 3765562d5f6SLorenzo Bianconi struct sta_rec_muru { 3775562d5f6SLorenzo Bianconi __le16 tag; 3785562d5f6SLorenzo Bianconi __le16 len; 3795562d5f6SLorenzo Bianconi 3805562d5f6SLorenzo Bianconi struct { 3815562d5f6SLorenzo Bianconi bool ofdma_dl_en; 3825562d5f6SLorenzo Bianconi bool ofdma_ul_en; 3835562d5f6SLorenzo Bianconi bool mimo_dl_en; 3845562d5f6SLorenzo Bianconi bool mimo_ul_en; 3855562d5f6SLorenzo Bianconi u8 rsv[4]; 3865562d5f6SLorenzo Bianconi } cfg; 3875562d5f6SLorenzo Bianconi 3885562d5f6SLorenzo Bianconi struct { 3895562d5f6SLorenzo Bianconi u8 punc_pream_rx; 3905562d5f6SLorenzo Bianconi bool he_20m_in_40m_2g; 3915562d5f6SLorenzo Bianconi bool he_20m_in_160m; 3925562d5f6SLorenzo Bianconi bool he_80m_in_160m; 3935562d5f6SLorenzo Bianconi bool lt16_sigb; 3945562d5f6SLorenzo Bianconi bool rx_su_comp_sigb; 3955562d5f6SLorenzo Bianconi bool rx_su_non_comp_sigb; 3965562d5f6SLorenzo Bianconi u8 rsv; 3975562d5f6SLorenzo Bianconi } ofdma_dl; 3985562d5f6SLorenzo Bianconi 3995562d5f6SLorenzo Bianconi struct { 4005562d5f6SLorenzo Bianconi u8 t_frame_dur; 4015562d5f6SLorenzo Bianconi u8 mu_cascading; 4025562d5f6SLorenzo Bianconi u8 uo_ra; 4035562d5f6SLorenzo Bianconi u8 he_2x996_tone; 4045562d5f6SLorenzo Bianconi u8 rx_t_frame_11ac; 4055562d5f6SLorenzo Bianconi u8 rsv[3]; 4065562d5f6SLorenzo Bianconi } ofdma_ul; 4075562d5f6SLorenzo Bianconi 4085562d5f6SLorenzo Bianconi struct { 4095562d5f6SLorenzo Bianconi bool vht_mu_bfee; 4105562d5f6SLorenzo Bianconi bool partial_bw_dl_mimo; 4115562d5f6SLorenzo Bianconi u8 rsv[2]; 4125562d5f6SLorenzo Bianconi } mimo_dl; 4135562d5f6SLorenzo Bianconi 4145562d5f6SLorenzo Bianconi struct { 4155562d5f6SLorenzo Bianconi bool full_ul_mimo; 4165562d5f6SLorenzo Bianconi bool partial_ul_mimo; 4175562d5f6SLorenzo Bianconi u8 rsv[2]; 4185562d5f6SLorenzo Bianconi } mimo_ul; 4195562d5f6SLorenzo Bianconi } __packed; 4205562d5f6SLorenzo Bianconi 4215562d5f6SLorenzo Bianconi struct sta_phy { 4225562d5f6SLorenzo Bianconi u8 type; 4235562d5f6SLorenzo Bianconi u8 flag; 4245562d5f6SLorenzo Bianconi u8 stbc; 4255562d5f6SLorenzo Bianconi u8 sgi; 4265562d5f6SLorenzo Bianconi u8 bw; 4275562d5f6SLorenzo Bianconi u8 ldpc; 4285562d5f6SLorenzo Bianconi u8 mcs; 4295562d5f6SLorenzo Bianconi u8 nss; 4305562d5f6SLorenzo Bianconi u8 he_ltf; 4315562d5f6SLorenzo Bianconi }; 4325562d5f6SLorenzo Bianconi 4335562d5f6SLorenzo Bianconi struct sta_rec_ra { 4345562d5f6SLorenzo Bianconi __le16 tag; 4355562d5f6SLorenzo Bianconi __le16 len; 4365562d5f6SLorenzo Bianconi 4375562d5f6SLorenzo Bianconi u8 valid; 4385562d5f6SLorenzo Bianconi u8 auto_rate; 4395562d5f6SLorenzo Bianconi u8 phy_mode; 4405562d5f6SLorenzo Bianconi u8 channel; 4415562d5f6SLorenzo Bianconi u8 bw; 4425562d5f6SLorenzo Bianconi u8 disable_cck; 4435562d5f6SLorenzo Bianconi u8 ht_mcs32; 4445562d5f6SLorenzo Bianconi u8 ht_gf; 4455562d5f6SLorenzo Bianconi u8 ht_mcs[4]; 4465562d5f6SLorenzo Bianconi u8 mmps_mode; 4475562d5f6SLorenzo Bianconi u8 gband_256; 4485562d5f6SLorenzo Bianconi u8 af; 4495562d5f6SLorenzo Bianconi u8 auth_wapi_mode; 4505562d5f6SLorenzo Bianconi u8 rate_len; 4515562d5f6SLorenzo Bianconi 4525562d5f6SLorenzo Bianconi u8 supp_mode; 4535562d5f6SLorenzo Bianconi u8 supp_cck_rate; 4545562d5f6SLorenzo Bianconi u8 supp_ofdm_rate; 4555562d5f6SLorenzo Bianconi __le32 supp_ht_mcs; 4565562d5f6SLorenzo Bianconi __le16 supp_vht_mcs[4]; 4575562d5f6SLorenzo Bianconi 4585562d5f6SLorenzo Bianconi u8 op_mode; 4595562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 4605562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 4615562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 4625562d5f6SLorenzo Bianconi 4635562d5f6SLorenzo Bianconi __le32 sta_cap; 4645562d5f6SLorenzo Bianconi 4655562d5f6SLorenzo Bianconi struct sta_phy phy; 4665562d5f6SLorenzo Bianconi } __packed; 4675562d5f6SLorenzo Bianconi 4685562d5f6SLorenzo Bianconi struct sta_rec_ra_fixed { 4695562d5f6SLorenzo Bianconi __le16 tag; 4705562d5f6SLorenzo Bianconi __le16 len; 4715562d5f6SLorenzo Bianconi 4725562d5f6SLorenzo Bianconi __le32 field; 4735562d5f6SLorenzo Bianconi u8 op_mode; 4745562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 4755562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 4765562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 4775562d5f6SLorenzo Bianconi 4785562d5f6SLorenzo Bianconi struct sta_phy phy; 4795562d5f6SLorenzo Bianconi 4805562d5f6SLorenzo Bianconi u8 spe_en; 4815562d5f6SLorenzo Bianconi u8 short_preamble; 4825562d5f6SLorenzo Bianconi u8 is_5g; 4835562d5f6SLorenzo Bianconi u8 mmps_mode; 4845562d5f6SLorenzo Bianconi } __packed; 4855562d5f6SLorenzo Bianconi 486d0e274afSLorenzo Bianconi /* wtbl_rec */ 487d0e274afSLorenzo Bianconi 488d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 489d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 490d0e274afSLorenzo Bianconi u8 operation; 491d0e274afSLorenzo Bianconi __le16 tlv_num; 492d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 493d0e274afSLorenzo Bianconi u8 rsv[3]; 494d0e274afSLorenzo Bianconi } __packed; 495d0e274afSLorenzo Bianconi 496d0e274afSLorenzo Bianconi struct wtbl_generic { 497d0e274afSLorenzo Bianconi __le16 tag; 498d0e274afSLorenzo Bianconi __le16 len; 499d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 500d0e274afSLorenzo Bianconi u8 muar_idx; 501d0e274afSLorenzo Bianconi u8 skip_tx; 502d0e274afSLorenzo Bianconi u8 cf_ack; 503d0e274afSLorenzo Bianconi u8 qos; 504d0e274afSLorenzo Bianconi u8 mesh; 505d0e274afSLorenzo Bianconi u8 adm; 506d0e274afSLorenzo Bianconi __le16 partial_aid; 507d0e274afSLorenzo Bianconi u8 baf_en; 508d0e274afSLorenzo Bianconi u8 aad_om; 509d0e274afSLorenzo Bianconi } __packed; 510d0e274afSLorenzo Bianconi 511d0e274afSLorenzo Bianconi struct wtbl_rx { 512d0e274afSLorenzo Bianconi __le16 tag; 513d0e274afSLorenzo Bianconi __le16 len; 514d0e274afSLorenzo Bianconi u8 rcid; 515d0e274afSLorenzo Bianconi u8 rca1; 516d0e274afSLorenzo Bianconi u8 rca2; 517d0e274afSLorenzo Bianconi u8 rv; 518d0e274afSLorenzo Bianconi u8 rsv[4]; 519d0e274afSLorenzo Bianconi } __packed; 520d0e274afSLorenzo Bianconi 521d0e274afSLorenzo Bianconi struct wtbl_ht { 522d0e274afSLorenzo Bianconi __le16 tag; 523d0e274afSLorenzo Bianconi __le16 len; 524d0e274afSLorenzo Bianconi u8 ht; 525d0e274afSLorenzo Bianconi u8 ldpc; 526d0e274afSLorenzo Bianconi u8 af; 527d0e274afSLorenzo Bianconi u8 mm; 528d0e274afSLorenzo Bianconi u8 rsv[4]; 529d0e274afSLorenzo Bianconi } __packed; 530d0e274afSLorenzo Bianconi 531d0e274afSLorenzo Bianconi struct wtbl_vht { 532d0e274afSLorenzo Bianconi __le16 tag; 533d0e274afSLorenzo Bianconi __le16 len; 534d0e274afSLorenzo Bianconi u8 ldpc; 535d0e274afSLorenzo Bianconi u8 dyn_bw; 536d0e274afSLorenzo Bianconi u8 vht; 537d0e274afSLorenzo Bianconi u8 txop_ps; 538d0e274afSLorenzo Bianconi u8 rsv[4]; 539d0e274afSLorenzo Bianconi } __packed; 540d0e274afSLorenzo Bianconi 541d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 542d0e274afSLorenzo Bianconi __le16 tag; 543d0e274afSLorenzo Bianconi __le16 len; 544d0e274afSLorenzo Bianconi u8 txps; 545d0e274afSLorenzo Bianconi u8 rsv[3]; 546d0e274afSLorenzo Bianconi } __packed; 547d0e274afSLorenzo Bianconi 548d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 549d0e274afSLorenzo Bianconi __le16 tag; 550d0e274afSLorenzo Bianconi __le16 len; 551d0e274afSLorenzo Bianconi u8 to_ds; 552d0e274afSLorenzo Bianconi u8 from_ds; 553d4b98c63SRyder Lee u8 no_rx_trans; 554d0e274afSLorenzo Bianconi u8 rsv; 555d0e274afSLorenzo Bianconi } __packed; 556d0e274afSLorenzo Bianconi 557d0e274afSLorenzo Bianconi struct wtbl_ba { 558d0e274afSLorenzo Bianconi __le16 tag; 559d0e274afSLorenzo Bianconi __le16 len; 560d0e274afSLorenzo Bianconi /* common */ 561d0e274afSLorenzo Bianconi u8 tid; 562d0e274afSLorenzo Bianconi u8 ba_type; 563d0e274afSLorenzo Bianconi u8 rsv0[2]; 564d0e274afSLorenzo Bianconi /* originator only */ 565d0e274afSLorenzo Bianconi __le16 sn; 566d0e274afSLorenzo Bianconi u8 ba_en; 567d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 5685562d5f6SLorenzo Bianconi /* originator & recipient */ 569d0e274afSLorenzo Bianconi __le16 ba_winsize; 570d0e274afSLorenzo Bianconi /* recipient only */ 571d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 572d0e274afSLorenzo Bianconi u8 rst_ba_tid; 573d0e274afSLorenzo Bianconi u8 rst_ba_sel; 574d0e274afSLorenzo Bianconi u8 rst_ba_sb; 575d0e274afSLorenzo Bianconi u8 band_idx; 576d0e274afSLorenzo Bianconi u8 rsv1[4]; 577d0e274afSLorenzo Bianconi } __packed; 578d0e274afSLorenzo Bianconi 579d0e274afSLorenzo Bianconi struct wtbl_smps { 580d0e274afSLorenzo Bianconi __le16 tag; 581d0e274afSLorenzo Bianconi __le16 len; 582d0e274afSLorenzo Bianconi u8 smps; 583d0e274afSLorenzo Bianconi u8 rsv[3]; 584d0e274afSLorenzo Bianconi } __packed; 585d0e274afSLorenzo Bianconi 586d0e274afSLorenzo Bianconi /* mt7615 only */ 587d0e274afSLorenzo Bianconi 588d0e274afSLorenzo Bianconi struct wtbl_bf { 589d0e274afSLorenzo Bianconi __le16 tag; 590d0e274afSLorenzo Bianconi __le16 len; 591d0e274afSLorenzo Bianconi u8 ibf; 592d0e274afSLorenzo Bianconi u8 ebf; 593d0e274afSLorenzo Bianconi u8 ibf_vht; 594d0e274afSLorenzo Bianconi u8 ebf_vht; 595d0e274afSLorenzo Bianconi u8 gid; 596d0e274afSLorenzo Bianconi u8 pfmu_idx; 597d0e274afSLorenzo Bianconi u8 rsv[2]; 598d0e274afSLorenzo Bianconi } __packed; 599d0e274afSLorenzo Bianconi 600d0e274afSLorenzo Bianconi struct wtbl_pn { 601d0e274afSLorenzo Bianconi __le16 tag; 602d0e274afSLorenzo Bianconi __le16 len; 603d0e274afSLorenzo Bianconi u8 pn[6]; 604d0e274afSLorenzo Bianconi u8 rsv[2]; 605d0e274afSLorenzo Bianconi } __packed; 606d0e274afSLorenzo Bianconi 607d0e274afSLorenzo Bianconi struct wtbl_spe { 608d0e274afSLorenzo Bianconi __le16 tag; 609d0e274afSLorenzo Bianconi __le16 len; 610d0e274afSLorenzo Bianconi u8 spe_idx; 611d0e274afSLorenzo Bianconi u8 rsv[3]; 612d0e274afSLorenzo Bianconi } __packed; 613d0e274afSLorenzo Bianconi 614d0e274afSLorenzo Bianconi struct wtbl_raw { 615d0e274afSLorenzo Bianconi __le16 tag; 616d0e274afSLorenzo Bianconi __le16 len; 617d0e274afSLorenzo Bianconi u8 wtbl_idx; 618d0e274afSLorenzo Bianconi u8 dw; 619d0e274afSLorenzo Bianconi u8 rsv[2]; 620d0e274afSLorenzo Bianconi __le32 msk; 621d0e274afSLorenzo Bianconi __le32 val; 622d0e274afSLorenzo Bianconi } __packed; 623d0e274afSLorenzo Bianconi 624d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 625d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 626d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 627d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 628d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 629d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 630d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 631d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 632d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 633d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 634d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 635d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 636d0e274afSLorenzo Bianconi 637d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 638d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 6395562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bf) + \ 640d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 641d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 642d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 643d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 644d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 645d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 6465562d5f6SLorenzo Bianconi sizeof(struct sta_rec_muru) + \ 6475562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bfee) + \ 6485562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra) + \ 649e2c93b68SLorenzo Bianconi sizeof(struct sta_rec_sec) + \ 6505562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra_fixed) + \ 6515883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 652d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 653d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 654d0e274afSLorenzo Bianconi 655d0e274afSLorenzo Bianconi enum { 656d0e274afSLorenzo Bianconi STA_REC_BASIC, 657d0e274afSLorenzo Bianconi STA_REC_RA, 658d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 659d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 660d0e274afSLorenzo Bianconi STA_REC_BF, 661d0e274afSLorenzo Bianconi STA_REC_AMSDU, 662d0e274afSLorenzo Bianconi STA_REC_BA, 663d0e274afSLorenzo Bianconi STA_REC_STATE, 664d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 665d0e274afSLorenzo Bianconi STA_REC_HT, 666d0e274afSLorenzo Bianconi STA_REC_VHT, 667d0e274afSLorenzo Bianconi STA_REC_APPS, 668d0e274afSLorenzo Bianconi STA_REC_KEY, 669d0e274afSLorenzo Bianconi STA_REC_WTBL, 670d0e274afSLorenzo Bianconi STA_REC_HE, 671d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 672d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 673d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 674d0e274afSLorenzo Bianconi STA_REC_MURU, 675d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 676d0e274afSLorenzo Bianconi STA_REC_BFEE, 677d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 6785883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 679d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 680d0e274afSLorenzo Bianconi }; 681d0e274afSLorenzo Bianconi 682d0e274afSLorenzo Bianconi enum { 683d0e274afSLorenzo Bianconi WTBL_GENERIC, 684d0e274afSLorenzo Bianconi WTBL_RX, 685d0e274afSLorenzo Bianconi WTBL_HT, 686d0e274afSLorenzo Bianconi WTBL_VHT, 687d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 688d0e274afSLorenzo Bianconi WTBL_TX_PS, 689d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 690d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 691d0e274afSLorenzo Bianconi WTBL_BA, 692d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 693d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 694d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 695d0e274afSLorenzo Bianconi WTBL_BF, 696d0e274afSLorenzo Bianconi WTBL_SMPS, 697d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 698d0e274afSLorenzo Bianconi WTBL_PN, 699d0e274afSLorenzo Bianconi WTBL_SPE, 700d0e274afSLorenzo Bianconi WTBL_MAX_NUM 701d0e274afSLorenzo Bianconi }; 702d0e274afSLorenzo Bianconi 703d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 704d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 705d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 706d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 707d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 708d0e274afSLorenzo Bianconi 709d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 710d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 711d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 712d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 713d0e274afSLorenzo Bianconi 7144da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 7154da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 7164da64fe0SSean Wang 717d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 718d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 719d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 720d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 721d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 722d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 723d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 724d0e274afSLorenzo Bianconi 725d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 726d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 727d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 728d0e274afSLorenzo Bianconi 729d0e274afSLorenzo Bianconi /* HE MAC */ 730d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 731d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 732d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 733d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 734d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 735d0e274afSLorenzo Bianconi /* HE PHY */ 736d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 737d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 738d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 739d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 740d0e274afSLorenzo Bianconi /* STBC */ 741d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 742d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 743d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 744d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 745d0e274afSLorenzo Bianconi /* GI */ 746d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 747d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 748d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 749d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 750d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 751d0e274afSLorenzo Bianconi /* 242 TONE */ 752d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 753d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 754d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 755d0e274afSLorenzo Bianconi 756d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 757d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 758d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 759d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 760d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 761d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 762d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 763d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 764dfdf6725SLorenzo Bianconi 765dfdf6725SLorenzo Bianconi #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ 766d0e274afSLorenzo Bianconi 767d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 768d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 769d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 770d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 771d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 772d0e274afSLorenzo Bianconi 7735562d5f6SLorenzo Bianconi #define STA_CAP_WMM BIT(0) 7745562d5f6SLorenzo Bianconi #define STA_CAP_SGI_20 BIT(4) 7755562d5f6SLorenzo Bianconi #define STA_CAP_SGI_40 BIT(5) 7765562d5f6SLorenzo Bianconi #define STA_CAP_TX_STBC BIT(6) 7775562d5f6SLorenzo Bianconi #define STA_CAP_RX_STBC BIT(7) 7785562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_80 BIT(16) 7795562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_160 BIT(17) 7805562d5f6SLorenzo Bianconi #define STA_CAP_VHT_TX_STBC BIT(18) 7815562d5f6SLorenzo Bianconi #define STA_CAP_VHT_RX_STBC BIT(19) 7825562d5f6SLorenzo Bianconi #define STA_CAP_VHT_LDPC BIT(23) 7835562d5f6SLorenzo Bianconi #define STA_CAP_LDPC BIT(24) 7845562d5f6SLorenzo Bianconi #define STA_CAP_HT BIT(26) 7855562d5f6SLorenzo Bianconi #define STA_CAP_VHT BIT(27) 7865562d5f6SLorenzo Bianconi #define STA_CAP_HE BIT(28) 7875562d5f6SLorenzo Bianconi 788d0e274afSLorenzo Bianconi enum { 789d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 790d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 791d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 792d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 793d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 794d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 795d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 796d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 797d0e274afSLorenzo Bianconi }; 798d0e274afSLorenzo Bianconi 799d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 800d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 801d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 802d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 803d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 804d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 805d0e274afSLorenzo Bianconi 806d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 807d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 808d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 809d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 810d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 811d0e274afSLorenzo Bianconi 812d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 813d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 814d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 815d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 816d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 817d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 818d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 819d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 820d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 821d0e274afSLorenzo Bianconi 822d0e274afSLorenzo Bianconi enum { 823d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 824d0e274afSLorenzo Bianconi WTBL_SET, 825d0e274afSLorenzo Bianconi WTBL_QUERY, 826d0e274afSLorenzo Bianconi WTBL_RESET_ALL 827d0e274afSLorenzo Bianconi }; 828d0e274afSLorenzo Bianconi 829d0e274afSLorenzo Bianconi enum { 830d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 831d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 832d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 833d0e274afSLorenzo Bianconi }; 834d0e274afSLorenzo Bianconi 835d0e274afSLorenzo Bianconi enum { 836d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 837d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 838d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 839d0e274afSLorenzo Bianconi }; 840d0e274afSLorenzo Bianconi 841d0e274afSLorenzo Bianconi enum { 842d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 843d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 844d0e274afSLorenzo Bianconi }; 845d0e274afSLorenzo Bianconi 8465562d5f6SLorenzo Bianconi /* event table */ 8475562d5f6SLorenzo Bianconi enum { 8485562d5f6SLorenzo Bianconi MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, 8495562d5f6SLorenzo Bianconi MCU_EVENT_FW_START = 0x01, 8505562d5f6SLorenzo Bianconi MCU_EVENT_GENERIC = 0x01, 8515562d5f6SLorenzo Bianconi MCU_EVENT_ACCESS_REG = 0x02, 8525562d5f6SLorenzo Bianconi MCU_EVENT_MT_PATCH_SEM = 0x04, 8535562d5f6SLorenzo Bianconi MCU_EVENT_REG_ACCESS = 0x05, 8545562d5f6SLorenzo Bianconi MCU_EVENT_LP_INFO = 0x07, 8555562d5f6SLorenzo Bianconi MCU_EVENT_SCAN_DONE = 0x0d, 8565562d5f6SLorenzo Bianconi MCU_EVENT_TX_DONE = 0x0f, 8575562d5f6SLorenzo Bianconi MCU_EVENT_ROC = 0x10, 8585562d5f6SLorenzo Bianconi MCU_EVENT_BSS_ABSENCE = 0x11, 8595562d5f6SLorenzo Bianconi MCU_EVENT_BSS_BEACON_LOSS = 0x13, 8605562d5f6SLorenzo Bianconi MCU_EVENT_CH_PRIVILEGE = 0x18, 8615562d5f6SLorenzo Bianconi MCU_EVENT_SCHED_SCAN_DONE = 0x23, 8625562d5f6SLorenzo Bianconi MCU_EVENT_DBG_MSG = 0x27, 8635562d5f6SLorenzo Bianconi MCU_EVENT_TXPWR = 0xd0, 8645562d5f6SLorenzo Bianconi MCU_EVENT_EXT = 0xed, 8655562d5f6SLorenzo Bianconi MCU_EVENT_RESTART_DL = 0xef, 8665562d5f6SLorenzo Bianconi MCU_EVENT_COREDUMP = 0xf0, 8675562d5f6SLorenzo Bianconi }; 8685562d5f6SLorenzo Bianconi 8695562d5f6SLorenzo Bianconi /* ext event table */ 8705562d5f6SLorenzo Bianconi enum { 8715562d5f6SLorenzo Bianconi MCU_EXT_EVENT_PS_SYNC = 0x5, 8725562d5f6SLorenzo Bianconi MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, 8735562d5f6SLorenzo Bianconi MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, 8745562d5f6SLorenzo Bianconi MCU_EXT_EVENT_ASSERT_DUMP = 0x23, 8755562d5f6SLorenzo Bianconi MCU_EXT_EVENT_RDD_REPORT = 0x3a, 8765562d5f6SLorenzo Bianconi MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, 8775562d5f6SLorenzo Bianconi MCU_EXT_EVENT_BCC_NOTIFY = 0x75, 8781966a507SMeiChia Chiu MCU_EXT_EVENT_MURU_CTRL = 0x9f, 8795562d5f6SLorenzo Bianconi }; 8805562d5f6SLorenzo Bianconi 8815562d5f6SLorenzo Bianconi enum { 8825562d5f6SLorenzo Bianconi MCU_Q_QUERY, 8835562d5f6SLorenzo Bianconi MCU_Q_SET, 8845562d5f6SLorenzo Bianconi MCU_Q_RESERVED, 8855562d5f6SLorenzo Bianconi MCU_Q_NA 8865562d5f6SLorenzo Bianconi }; 8875562d5f6SLorenzo Bianconi 8885562d5f6SLorenzo Bianconi enum { 8895562d5f6SLorenzo Bianconi MCU_S2D_H2N, 8905562d5f6SLorenzo Bianconi MCU_S2D_C2N, 8915562d5f6SLorenzo Bianconi MCU_S2D_H2C, 8925562d5f6SLorenzo Bianconi MCU_S2D_H2CN 8935562d5f6SLorenzo Bianconi }; 8945562d5f6SLorenzo Bianconi 8955562d5f6SLorenzo Bianconi enum { 8965562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_FAIL, 8975562d5f6SLorenzo Bianconi PATCH_IS_DL, 8985562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_SUCCESS, 8995562d5f6SLorenzo Bianconi PATCH_REL_SEM_SUCCESS 9005562d5f6SLorenzo Bianconi }; 9015562d5f6SLorenzo Bianconi 9025562d5f6SLorenzo Bianconi enum { 9035562d5f6SLorenzo Bianconi FW_STATE_INITIAL, 9045562d5f6SLorenzo Bianconi FW_STATE_FW_DOWNLOAD, 9055562d5f6SLorenzo Bianconi FW_STATE_NORMAL_OPERATION, 9065562d5f6SLorenzo Bianconi FW_STATE_NORMAL_TRX, 9075562d5f6SLorenzo Bianconi FW_STATE_RDY = 7 9085562d5f6SLorenzo Bianconi }; 9095562d5f6SLorenzo Bianconi 9105562d5f6SLorenzo Bianconi enum { 9115562d5f6SLorenzo Bianconi CH_SWITCH_NORMAL = 0, 9125562d5f6SLorenzo Bianconi CH_SWITCH_SCAN = 3, 9135562d5f6SLorenzo Bianconi CH_SWITCH_MCC = 4, 9145562d5f6SLorenzo Bianconi CH_SWITCH_DFS = 5, 9155562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_START = 6, 9165562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 9175562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 9185562d5f6SLorenzo Bianconi CH_SWITCH_SCAN_BYPASS_DPD = 9 9195562d5f6SLorenzo Bianconi }; 9205562d5f6SLorenzo Bianconi 9215562d5f6SLorenzo Bianconi enum { 9225562d5f6SLorenzo Bianconi THERMAL_SENSOR_TEMP_QUERY, 9235562d5f6SLorenzo Bianconi THERMAL_SENSOR_MANUAL_CTRL, 9245562d5f6SLorenzo Bianconi THERMAL_SENSOR_INFO_QUERY, 9255562d5f6SLorenzo Bianconi THERMAL_SENSOR_TASK_CTRL, 9265562d5f6SLorenzo Bianconi }; 9275562d5f6SLorenzo Bianconi 9285562d5f6SLorenzo Bianconi enum mcu_cipher_type { 9295562d5f6SLorenzo Bianconi MCU_CIPHER_NONE = 0, 9305562d5f6SLorenzo Bianconi MCU_CIPHER_WEP40, 9315562d5f6SLorenzo Bianconi MCU_CIPHER_WEP104, 9325562d5f6SLorenzo Bianconi MCU_CIPHER_WEP128, 9335562d5f6SLorenzo Bianconi MCU_CIPHER_TKIP, 9345562d5f6SLorenzo Bianconi MCU_CIPHER_AES_CCMP, 9355562d5f6SLorenzo Bianconi MCU_CIPHER_CCMP_256, 9365562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP, 9375562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP_256, 9385562d5f6SLorenzo Bianconi MCU_CIPHER_WAPI, 9395562d5f6SLorenzo Bianconi MCU_CIPHER_BIP_CMAC_128, 9405562d5f6SLorenzo Bianconi }; 9415562d5f6SLorenzo Bianconi 9425562d5f6SLorenzo Bianconi enum { 9435562d5f6SLorenzo Bianconi EE_MODE_EFUSE, 9445562d5f6SLorenzo Bianconi EE_MODE_BUFFER, 9455562d5f6SLorenzo Bianconi }; 9465562d5f6SLorenzo Bianconi 9475562d5f6SLorenzo Bianconi enum { 9485562d5f6SLorenzo Bianconi EE_FORMAT_BIN, 9495562d5f6SLorenzo Bianconi EE_FORMAT_WHOLE, 9505562d5f6SLorenzo Bianconi EE_FORMAT_MULTIPLE, 9515562d5f6SLorenzo Bianconi }; 9525562d5f6SLorenzo Bianconi 9535562d5f6SLorenzo Bianconi enum { 9545562d5f6SLorenzo Bianconi MCU_PHY_STATE_TX_RATE, 9555562d5f6SLorenzo Bianconi MCU_PHY_STATE_RX_RATE, 9565562d5f6SLorenzo Bianconi MCU_PHY_STATE_RSSI, 9575562d5f6SLorenzo Bianconi MCU_PHY_STATE_CONTENTION_RX_RATE, 9585562d5f6SLorenzo Bianconi MCU_PHY_STATE_OFDMLQ_CNINFO, 9595562d5f6SLorenzo Bianconi }; 9605562d5f6SLorenzo Bianconi 961d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 962d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 963d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 964d0e274afSLorenzo Bianconi 965d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 966d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 967d0e274afSLorenzo Bianconi 968e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_ID GENMASK(7, 0) 969e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8) 970e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_QUERY BIT(16) 97154722402SLorenzo Bianconi #define __MCU_CMD_FIELD_UNI BIT(17) 972680a2eadSLorenzo Bianconi #define __MCU_CMD_FIELD_CE BIT(18) 9735562d5f6SLorenzo Bianconi #define __MCU_CMD_FIELD_WA BIT(19) 974e6d2070dSLorenzo Bianconi 975e6d2070dSLorenzo Bianconi #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \ 976e6d2070dSLorenzo Bianconi MCU_CMD_##_t) 977e6d2070dSLorenzo Bianconi #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \ 978e6d2070dSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 979e6d2070dSLorenzo Bianconi MCU_EXT_CMD_##_t)) 980e6d2070dSLorenzo Bianconi #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY) 98154722402SLorenzo Bianconi #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \ 98254722402SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 98354722402SLorenzo Bianconi MCU_UNI_CMD_##_t)) 984680a2eadSLorenzo Bianconi #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \ 985680a2eadSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 986680a2eadSLorenzo Bianconi MCU_CE_CMD_##_t)) 987680a2eadSLorenzo Bianconi #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY) 988d0e274afSLorenzo Bianconi 9895562d5f6SLorenzo Bianconi #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA) 9905562d5f6SLorenzo Bianconi #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA) 9915562d5f6SLorenzo Bianconi #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \ 9925562d5f6SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 9935562d5f6SLorenzo Bianconi MCU_WA_PARAM_CMD_##_t)) 9945562d5f6SLorenzo Bianconi 995d0e274afSLorenzo Bianconi enum { 996d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 997d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 9989d8d136cSLorenzo Bianconi MCU_EXT_CMD_RF_TEST = 0x04, 999d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 1000d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 1001d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 1002d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 10039d8d136cSLorenzo Bianconi MCU_EXT_CMD_TXBF_ACTION = 0x1e, 1004d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 10059d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_PROT = 0x23, 1006d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 1007d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 1008d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 1009d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 10109d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_CTRL = 0x2c, 1011d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 10129d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_DRR_CTRL = 0x36, 1013d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 1014d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 1015d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 1016d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 1017d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 1018d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 1019d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 1020d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 10219d8d136cSLorenzo Bianconi MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, 1022d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 10239d8d136cSLorenzo Bianconi MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, 1024d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 1025d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 10269d8d136cSLorenzo Bianconi MCU_EXT_CMD_GET_MIB_INFO = 0x5a, 1027d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 102803a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 10299d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RADAR_TH = 0x7c, 1030d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 10319d8d136cSLorenzo Bianconi MCU_EXT_CMD_MWDS_SUPPORT = 0x80, 10329d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, 10339d8d136cSLorenzo Bianconi MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, 10349d8d136cSLorenzo Bianconi MCU_EXT_CMD_FW_DBG_CTRL = 0x95, 103539cdf080SLorenzo Bianconi MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, 10369d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x9d, 10379d8d136cSLorenzo Bianconi MCU_EXT_CMD_MURU_CTRL = 0x9f, 10389d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SPR = 0xa8, 10399d8d136cSLorenzo Bianconi MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, 10409d8d136cSLorenzo Bianconi MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, 10419d8d136cSLorenzo Bianconi MCU_EXT_CMD_PHY_STAT_INFO = 0xad, 1042d0e274afSLorenzo Bianconi }; 1043d0e274afSLorenzo Bianconi 1044d0e274afSLorenzo Bianconi enum { 104554722402SLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01, 104654722402SLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02, 104754722402SLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = 0x03, 104854722402SLorenzo Bianconi MCU_UNI_CMD_SUSPEND = 0x05, 104954722402SLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = 0x06, 105054722402SLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = 0x07, 1051cbaa0a40SSean Wang MCU_UNI_CMD_SNIFFER = 0x24, 1052d0e274afSLorenzo Bianconi }; 1053d0e274afSLorenzo Bianconi 1054d0e274afSLorenzo Bianconi enum { 10557159eb82SLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 10567159eb82SLorenzo Bianconi MCU_CMD_FW_START_REQ = 0x02, 1057d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 10587159eb82SLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = 0x4, 10597159eb82SLorenzo Bianconi MCU_CMD_PATCH_START_REQ = 0x05, 10607159eb82SLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = 0x07, 10617159eb82SLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = 0x10, 10629d8d136cSLorenzo Bianconi MCU_CMD_WA_PARAM = 0xc4, 1063d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 10647159eb82SLorenzo Bianconi MCU_CMD_FW_SCATTER = 0xee, 10657159eb82SLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = 0xef, 1066d0e274afSLorenzo Bianconi }; 1067d0e274afSLorenzo Bianconi 1068d0e274afSLorenzo Bianconi /* offload mcu commands */ 1069d0e274afSLorenzo Bianconi enum { 1070680a2eadSLorenzo Bianconi MCU_CE_CMD_TEST_CTRL = 0x01, 1071680a2eadSLorenzo Bianconi MCU_CE_CMD_START_HW_SCAN = 0x03, 1072680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_PS_PROFILE = 0x05, 1073680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f, 1074680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, 1075680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_ABORT = 0x17, 1076680a2eadSLorenzo Bianconi MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, 1077bf9727a2SSean Wang MCU_CE_CMD_SET_ROC = 0x1c, 107866ca1a7bSSean Wang MCU_CE_CMD_SET_EDCA_PARMS = 0x1d, 1079680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_P2P_OPPPS = 0x33, 1080680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, 1081680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, 1082680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_REQ = 0x62, 1083680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_NIC_CAPAB = 0x8a, 1084680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0, 1085680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_WRITE = 0xc0, 1086680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_READ = 0xc0, 1087680a2eadSLorenzo Bianconi MCU_CE_CMD_CHIP_CONFIG = 0xca, 1088680a2eadSLorenzo Bianconi MCU_CE_CMD_FWLOG_2_HOST = 0xc5, 1089680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_WTBL = 0xcd, 1090680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_TXPWR = 0xd0, 1091d0e274afSLorenzo Bianconi }; 1092d0e274afSLorenzo Bianconi 1093d0e274afSLorenzo Bianconi enum { 1094d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 1095d0e274afSLorenzo Bianconi PATCH_SEM_GET 1096d0e274afSLorenzo Bianconi }; 1097d0e274afSLorenzo Bianconi 1098d0e274afSLorenzo Bianconi enum { 1099d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 1100d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 1101b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 1102d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 1103d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 1104d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 1105d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 110667aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 110767aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 1108d0e274afSLorenzo Bianconi }; 1109d0e274afSLorenzo Bianconi 111055d4c19cSLorenzo Bianconi enum { 111155d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 111255d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 111355d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 111455d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 111555d4c19cSLorenzo Bianconi }; 111655d4c19cSLorenzo Bianconi 1117f7d2958cSLorenzo Bianconi enum { 1118f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 1119f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 1120f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 1121f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 1122f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 1123f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 1124f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 1125f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 1126f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 1127f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 1128f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 1129f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 1130f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 1131f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 1132f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 1133f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 1134f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 1135f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 1136f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 1137f7d2958cSLorenzo Bianconi }; 1138f7d2958cSLorenzo Bianconi 1139193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 1140193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 1141193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 1142193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 1143193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 1144193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 1145193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 1146193e5f22SYN Chen 114755d4c19cSLorenzo Bianconi enum { 114855d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 114955d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 115055d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 115155d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 115255d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 115355d4c19cSLorenzo Bianconi }; 115455d4c19cSLorenzo Bianconi 115555d4c19cSLorenzo Bianconi enum { 115655d4c19cSLorenzo Bianconi WOW_USB = 1, 115755d4c19cSLorenzo Bianconi WOW_PCIE = 2, 115855d4c19cSLorenzo Bianconi WOW_GPIO = 3, 115955d4c19cSLorenzo Bianconi }; 116055d4c19cSLorenzo Bianconi 1161d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 1162d0e274afSLorenzo Bianconi __le16 tag; 1163d0e274afSLorenzo Bianconi __le16 len; 1164d0e274afSLorenzo Bianconi u8 active; 1165d0e274afSLorenzo Bianconi u8 omac_idx; 1166d0e274afSLorenzo Bianconi u8 hw_bss_idx; 1167d0e274afSLorenzo Bianconi u8 band_idx; 1168d0e274afSLorenzo Bianconi __le32 conn_type; 1169d0e274afSLorenzo Bianconi u8 conn_state; 1170d0e274afSLorenzo Bianconi u8 wmm_idx; 1171d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1172d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 1173d0e274afSLorenzo Bianconi __le16 bcn_interval; 1174d0e274afSLorenzo Bianconi u8 dtim_period; 1175d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 1176d0e274afSLorenzo Bianconi * bit(1): B 1177d0e274afSLorenzo Bianconi * bit(2): G 1178d0e274afSLorenzo Bianconi * bit(3): GN 1179d0e274afSLorenzo Bianconi * bit(4): AN 1180d0e274afSLorenzo Bianconi * bit(5): AC 11813cf3e01bSLorenzo Bianconi * bit(6): AX2 11823cf3e01bSLorenzo Bianconi * bit(7): AX5 11833cf3e01bSLorenzo Bianconi * bit(8): AX6 1184d0e274afSLorenzo Bianconi */ 1185d0e274afSLorenzo Bianconi __le16 sta_idx; 11863cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 11873cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 11883cf3e01bSLorenzo Bianconi u8 pad[1]; 1189d0e274afSLorenzo Bianconi } __packed; 1190d0e274afSLorenzo Bianconi 1191d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 1192d0e274afSLorenzo Bianconi __le16 tag; 1193d0e274afSLorenzo Bianconi __le16 len; 1194d0e274afSLorenzo Bianconi u8 qos; 1195d0e274afSLorenzo Bianconi u8 pad[3]; 1196d0e274afSLorenzo Bianconi } __packed; 1197d0e274afSLorenzo Bianconi 1198d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 1199d0e274afSLorenzo Bianconi u8 bss_idx; 1200d0e274afSLorenzo Bianconi u8 reason; 1201d0e274afSLorenzo Bianconi u8 pad[2]; 1202d0e274afSLorenzo Bianconi } __packed; 1203d0e274afSLorenzo Bianconi 1204d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 1205d0e274afSLorenzo Bianconi u8 bss_idx; 1206d0e274afSLorenzo Bianconi u8 is_absent; 1207d0e274afSLorenzo Bianconi u8 free_quota; 1208d0e274afSLorenzo Bianconi u8 pad; 1209d0e274afSLorenzo Bianconi } __packed; 1210d0e274afSLorenzo Bianconi 1211399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 1212399090efSLorenzo Bianconi __le32 ssid_len; 1213399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1214399090efSLorenzo Bianconi } __packed; 1215399090efSLorenzo Bianconi 1216399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 1217399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 1218399090efSLorenzo Bianconi * 2: 5.0GHz 1219399090efSLorenzo Bianconi * Others: Reserved 1220399090efSLorenzo Bianconi */ 1221399090efSLorenzo Bianconi u8 channel_num; 1222399090efSLorenzo Bianconi } __packed; 1223399090efSLorenzo Bianconi 1224399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 1225399090efSLorenzo Bianconi __le32 rssi_th; 1226399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1227399090efSLorenzo Bianconi u8 ssid_len; 1228399090efSLorenzo Bianconi u8 rsv[3]; 1229399090efSLorenzo Bianconi } __packed; 1230399090efSLorenzo Bianconi 1231399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 1232399090efSLorenzo Bianconi u8 seq_num; 1233399090efSLorenzo Bianconi u8 bss_idx; 1234399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 1235399090efSLorenzo Bianconi * 1: ACTIVE SCAN 1236399090efSLorenzo Bianconi */ 1237399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 1238399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 1239399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 1240399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 1241399090efSLorenzo Bianconi */ 1242399090efSLorenzo Bianconi u8 ssids_num; 1243399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 1244399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 1245399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 1246399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 1247399090efSLorenzo Bianconi */ 1248399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 1249399090efSLorenzo Bianconi * 1: Support fields after ies. 1250399090efSLorenzo Bianconi */ 1251399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 1252399090efSLorenzo Bianconi __le16 probe_delay_time; 1253399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 1254399090efSLorenzo Bianconi __le16 timeout_value; 1255399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 1256399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 1257399090efSLorenzo Bianconi * 2: Only 5GHz channels 1258399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 1259399090efSLorenzo Bianconi * 4: Specified channels 1260399090efSLorenzo Bianconi * Others: Reserved 1261399090efSLorenzo Bianconi */ 1262399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 1263399090efSLorenzo Bianconi /* valid when channels_num is set */ 1264399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 1265399090efSLorenzo Bianconi __le16 ies_len; 1266399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 1267399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 1268399090efSLorenzo Bianconi u8 ext_channels_num; 1269399090efSLorenzo Bianconi u8 ext_ssids_num; 1270399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 1271399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 1272399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 1273399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1274399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 1275399090efSLorenzo Bianconi u8 pad[63]; 1276399090efSLorenzo Bianconi u8 ssid_type_ext; 1277399090efSLorenzo Bianconi } __packed; 1278399090efSLorenzo Bianconi 1279399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 1280399090efSLorenzo Bianconi 1281399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 1282399090efSLorenzo Bianconi u8 seq_num; 1283399090efSLorenzo Bianconi u8 sparse_channel_num; 1284399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 1285399090efSLorenzo Bianconi u8 complete_channel_num; 1286399090efSLorenzo Bianconi u8 current_state; 1287399090efSLorenzo Bianconi u8 version; 1288399090efSLorenzo Bianconi u8 pad; 1289399090efSLorenzo Bianconi __le32 beacon_scan_num; 1290399090efSLorenzo Bianconi u8 pno_enabled; 1291399090efSLorenzo Bianconi u8 pad2[3]; 1292399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 1293399090efSLorenzo Bianconi u8 pad3[3]; 1294399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1295399090efSLorenzo Bianconi /* idle format for channel_idle_time 1296399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 1297399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 1298399090efSLorenzo Bianconi * 2: dwell time (16us) 1299399090efSLorenzo Bianconi */ 1300399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1301399090efSLorenzo Bianconi /* beacon and probe response count */ 1302399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1303399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1304399090efSLorenzo Bianconi __le32 beacon_2g_num; 1305399090efSLorenzo Bianconi __le32 beacon_5g_num; 1306399090efSLorenzo Bianconi } __packed; 1307399090efSLorenzo Bianconi 1308399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 1309399090efSLorenzo Bianconi u8 version; 1310399090efSLorenzo Bianconi u8 seq_num; 1311399090efSLorenzo Bianconi u8 stop_on_match; 1312399090efSLorenzo Bianconi u8 ssids_num; 1313399090efSLorenzo Bianconi u8 match_num; 1314399090efSLorenzo Bianconi u8 pad; 1315399090efSLorenzo Bianconi __le16 ie_len; 1316399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 1317399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 1318399090efSLorenzo Bianconi u8 channel_type; 1319399090efSLorenzo Bianconi u8 channels_num; 1320399090efSLorenzo Bianconi u8 intervals_num; 13217139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 1322399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 1323abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 13247139b5c0SSean Wang union { 13257139b5c0SSean Wang struct { 13267139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 1327399090efSLorenzo Bianconi u8 pad2[58]; 13287139b5c0SSean Wang } mt7663; 13297139b5c0SSean Wang struct { 13307139b5c0SSean Wang u8 bss_idx; 1331b94c0ed6SDeren Wu u8 pad1[3]; 1332b94c0ed6SDeren Wu __le32 delay; 1333b94c0ed6SDeren Wu u8 pad2[12]; 13349f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 13359f367c81SDeren Wu u8 pad3[38]; 13367139b5c0SSean Wang } mt7921; 13377139b5c0SSean Wang }; 1338399090efSLorenzo Bianconi } __packed; 1339399090efSLorenzo Bianconi 1340399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 1341399090efSLorenzo Bianconi u8 seq_num; 1342399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 1343399090efSLorenzo Bianconi __le16 pad; 1344399090efSLorenzo Bianconi } __packed; 1345399090efSLorenzo Bianconi 1346b4b880b9SYN Chen struct bss_info_uni_bss_color { 1347b4b880b9SYN Chen __le16 tag; 1348b4b880b9SYN Chen __le16 len; 1349b4b880b9SYN Chen u8 enable; 1350b4b880b9SYN Chen u8 bss_color; 1351b4b880b9SYN Chen u8 rsv[2]; 1352b4b880b9SYN Chen } __packed; 1353b4b880b9SYN Chen 1354d0e274afSLorenzo Bianconi struct bss_info_uni_he { 1355d0e274afSLorenzo Bianconi __le16 tag; 1356d0e274afSLorenzo Bianconi __le16 len; 1357d0e274afSLorenzo Bianconi __le16 he_rts_thres; 1358d0e274afSLorenzo Bianconi u8 he_pe_duration; 1359d0e274afSLorenzo Bianconi u8 su_disable; 1360d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 1361d0e274afSLorenzo Bianconi u8 rsv[2]; 1362d0e274afSLorenzo Bianconi } __packed; 1363d0e274afSLorenzo Bianconi 136455d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 136555d4c19cSLorenzo Bianconi __le16 tag; 136655d4c19cSLorenzo Bianconi __le16 len; 136755d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 136855d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 136955d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 137055d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 137155d4c19cSLorenzo Bianconi * 1: rekey offload disable 137255d4c19cSLorenzo Bianconi * 2: rekey update 137355d4c19cSLorenzo Bianconi */ 137455d4c19cSLorenzo Bianconi u8 keyid; 1375d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 1376d741abeaSLeon Yen u8 pad[1]; 137755d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 137855d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 137955d4c19cSLorenzo Bianconi __le32 group_cipher; 138055d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 138155d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 1382d741abeaSLeon Yen u8 reserverd[4]; 138355d4c19cSLorenzo Bianconi } __packed; 138455d4c19cSLorenzo Bianconi 138555d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 138655d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 138755d4c19cSLorenzo Bianconi 138855d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 138955d4c19cSLorenzo Bianconi __le16 tag; 139055d4c19cSLorenzo Bianconi __le16 len; 139155d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 139255d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 139355d4c19cSLorenzo Bianconi * 1: enable 139455d4c19cSLorenzo Bianconi */ 139555d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 139655d4c19cSLorenzo Bianconi u8 pad; 139755d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 139855d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 139955d4c19cSLorenzo Bianconi u8 rsv[4]; 140055d4c19cSLorenzo Bianconi } __packed; 140155d4c19cSLorenzo Bianconi 140255d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 140355d4c19cSLorenzo Bianconi __le16 tag; 140455d4c19cSLorenzo Bianconi __le16 len; 140555d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 140655d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 140755d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 140855d4c19cSLorenzo Bianconi */ 140955d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 141055d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 141155d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 141255d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 141355d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 141455d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 141555d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 141655d4c19cSLorenzo Bianconi */ 141755d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 141855d4c19cSLorenzo Bianconi * 0x1: HIF_USB 141955d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 142055d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 142155d4c19cSLorenzo Bianconi */ 142255d4c19cSLorenzo Bianconi u8 pad; 142355d4c19cSLorenzo Bianconi u8 rsv[4]; 142455d4c19cSLorenzo Bianconi } __packed; 142555d4c19cSLorenzo Bianconi 142655d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 142755d4c19cSLorenzo Bianconi __le16 tag; 142855d4c19cSLorenzo Bianconi __le16 len; 142955d4c19cSLorenzo Bianconi u8 gpio_pin; 143055d4c19cSLorenzo Bianconi u8 trigger_lvl; 143155d4c19cSLorenzo Bianconi u8 pad[2]; 143255d4c19cSLorenzo Bianconi __le32 gpio_interval; 143355d4c19cSLorenzo Bianconi u8 rsv[4]; 143455d4c19cSLorenzo Bianconi } __packed; 143555d4c19cSLorenzo Bianconi 143655d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 143755d4c19cSLorenzo Bianconi __le16 tag; 143855d4c19cSLorenzo Bianconi __le16 len; 143955d4c19cSLorenzo Bianconi u8 mode; 144055d4c19cSLorenzo Bianconi u8 ips_num; 144155d4c19cSLorenzo Bianconi u8 option; 144255d4c19cSLorenzo Bianconi u8 pad[1]; 144355d4c19cSLorenzo Bianconi } __packed; 144455d4c19cSLorenzo Bianconi 144555d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 144655d4c19cSLorenzo Bianconi __le16 tag; 144755d4c19cSLorenzo Bianconi __le16 len; 144855d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 144955d4c19cSLorenzo Bianconi * 1: suspend mode enabled 145055d4c19cSLorenzo Bianconi */ 145155d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 145255d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 145355d4c19cSLorenzo Bianconi * 1: update by wow dtim 145455d4c19cSLorenzo Bianconi */ 145555d4c19cSLorenzo Bianconi u8 pad[5]; 145655d4c19cSLorenzo Bianconi } __packed; 145755d4c19cSLorenzo Bianconi 1458f5056657SSean Wang enum mt76_sta_info_state { 1459f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 1460f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 1461f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 1462f5056657SSean Wang }; 1463f5056657SSean Wang 14645802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 14655802106fSLorenzo Bianconi struct ieee80211_sta *sta; 14665802106fSLorenzo Bianconi struct mt76_wcid *wcid; 14675802106fSLorenzo Bianconi 14685802106fSLorenzo Bianconi struct ieee80211_vif *vif; 14695802106fSLorenzo Bianconi 147082453b1cSLorenzo Bianconi bool offload_fw; 14715802106fSLorenzo Bianconi bool enable; 1472f5056657SSean Wang bool newly; 14735802106fSLorenzo Bianconi int cmd; 14745802106fSLorenzo Bianconi u8 rcpi; 1475f5056657SSean Wang u8 state; 14765802106fSLorenzo Bianconi }; 14775802106fSLorenzo Bianconi 147818369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 147918369a4fSLorenzo Bianconi 148018369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 148118369a4fSLorenzo Bianconi u8 channel; 148218369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 148318369a4fSLorenzo Bianconi } __packed; 148418369a4fSLorenzo Bianconi 148518369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 148618369a4fSLorenzo Bianconi /* DW0 - common info*/ 148718369a4fSLorenzo Bianconi u8 ver; 148818369a4fSLorenzo Bianconi u8 pad0; 148918369a4fSLorenzo Bianconi __le16 len; 149018369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 149118369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 14929b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 149318369a4fSLorenzo Bianconi u8 last_msg; 149418369a4fSLorenzo Bianconi u8 pad1; 149518369a4fSLorenzo Bianconi /* DW3 */ 149618369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 149718369a4fSLorenzo Bianconi u8 pad2[32]; 149818369a4fSLorenzo Bianconi } __packed; 149918369a4fSLorenzo Bianconi 1500c0b21255SSean Wang struct mt76_connac_config { 1501c0b21255SSean Wang __le16 id; 1502c0b21255SSean Wang u8 type; 1503c0b21255SSean Wang u8 resp_type; 1504c0b21255SSean Wang __le16 data_size; 1505c0b21255SSean Wang __le16 resv; 1506c0b21255SSean Wang u8 data[320]; 1507c0b21255SSean Wang } __packed; 1508c0b21255SSean Wang 150909c874a1SLorenzo Bianconi static inline enum mcu_cipher_type 151009c874a1SLorenzo Bianconi mt76_connac_mcu_get_cipher(int cipher) 151109c874a1SLorenzo Bianconi { 151209c874a1SLorenzo Bianconi switch (cipher) { 151309c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP40: 151409c874a1SLorenzo Bianconi return MCU_CIPHER_WEP40; 151509c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP104: 151609c874a1SLorenzo Bianconi return MCU_CIPHER_WEP104; 151709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_TKIP: 151809c874a1SLorenzo Bianconi return MCU_CIPHER_TKIP; 151909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_AES_CMAC: 152009c874a1SLorenzo Bianconi return MCU_CIPHER_BIP_CMAC_128; 152109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP: 152209c874a1SLorenzo Bianconi return MCU_CIPHER_AES_CCMP; 152309c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP_256: 152409c874a1SLorenzo Bianconi return MCU_CIPHER_CCMP_256; 152509c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP: 152609c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP; 152709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP_256: 152809c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP_256; 152909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_SMS4: 153009c874a1SLorenzo Bianconi return MCU_CIPHER_WAPI; 153109c874a1SLorenzo Bianconi default: 153209c874a1SLorenzo Bianconi return MCU_CIPHER_NONE; 153309c874a1SLorenzo Bianconi } 153409c874a1SLorenzo Bianconi } 153509c874a1SLorenzo Bianconi 15369e90c351SLorenzo Bianconi static inline u32 15379e90c351SLorenzo Bianconi mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa) 15389e90c351SLorenzo Bianconi { 15399e90c351SLorenzo Bianconi u32 ret = 0; 15409e90c351SLorenzo Bianconi 15419e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_SET_ENCRYPT ? 15429e90c351SLorenzo Bianconi DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0; 15439e90c351SLorenzo Bianconi if (is_mt7921(dev)) 15449e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_ENCRY_MODE ? 15459e90c351SLorenzo Bianconi DL_CONFIG_ENCRY_MODE_SEL : 0; 15469e90c351SLorenzo Bianconi ret |= FIELD_PREP(DL_MODE_KEY_IDX, 15479e90c351SLorenzo Bianconi FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 15489e90c351SLorenzo Bianconi ret |= DL_MODE_NEED_RSP; 15499e90c351SLorenzo Bianconi ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; 15509e90c351SLorenzo Bianconi 15519e90c351SLorenzo Bianconi return ret; 15529e90c351SLorenzo Bianconi } 15539e90c351SLorenzo Bianconi 155467aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 155567aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 155667aa2743SLorenzo Bianconi 155767aa2743SLorenzo Bianconi static inline void 155867aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 155967aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 156067aa2743SLorenzo Bianconi { 156167aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 156267aa2743SLorenzo Bianconi 15632fec2ea6SLorenzo Bianconi if (!is_connac_v1(dev)) { 156467aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 156567aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 156667aa2743SLorenzo Bianconi } else { 156767aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 156867aa2743SLorenzo Bianconi } 156967aa2743SLorenzo Bianconi } 157067aa2743SLorenzo Bianconi 1571d0e274afSLorenzo Bianconi struct sk_buff * 1572e2c93b68SLorenzo Bianconi __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1573e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid, int len); 1574e2c93b68SLorenzo Bianconi static inline struct sk_buff * 1575d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1576e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid) 1577e2c93b68SLorenzo Bianconi { 1578e2c93b68SLorenzo Bianconi return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 1579e2c93b68SLorenzo Bianconi MT76_CONNAC_STA_UPDATE_MAX_SIZE); 1580e2c93b68SLorenzo Bianconi } 1581e2c93b68SLorenzo Bianconi 1582d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1583d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1584d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1585d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1586d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1587d0e274afSLorenzo Bianconi void *sta_wtbl); 1588d0e274afSLorenzo Bianconi static inline struct tlv * 1589d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1590d0e274afSLorenzo Bianconi { 1591d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1592d0e274afSLorenzo Bianconi } 1593d0e274afSLorenzo Bianconi 1594d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1595d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1596d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1597d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1598f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1599f5056657SSean Wang bool newly); 1600d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1601d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1602d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1603d0e274afSLorenzo Bianconi void *wtbl_tlv); 1604d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1605868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 160666978204SFelix Fietkau struct mt76_wcid *wcid, 1607d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 160824299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 160924299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 161024299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 16115a521c0fSLorenzo Bianconi int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 16125a521c0fSLorenzo Bianconi struct ieee80211_vif *vif, 16135a521c0fSLorenzo Bianconi struct ieee80211_sta *sta); 1614d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1615d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 16165802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1617f5056657SSean Wang u8 rcpi, u8 state); 1618d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1619d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1620499da720SMeiChia Chiu void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc); 1621d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1622d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1623d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1624d0e274afSLorenzo Bianconi void *wtbl_tlv); 1625d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1626d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1627d0e274afSLorenzo Bianconi bool enable, bool tx); 1628d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1629d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1630d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1631d0e274afSLorenzo Bianconi bool enable); 1632d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1633d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1634b5322e44SLorenzo Bianconi int cmd, bool enable, bool tx); 1635d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1636d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1637d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1638d0e274afSLorenzo Bianconi bool enable); 1639f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 16405802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1641d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1642d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1643d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1644d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1645d0e274afSLorenzo Bianconi bool hdr_trans); 1646d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1647d0e274afSLorenzo Bianconi u32 mode); 1648d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1649d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1650d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1651f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1652d0e274afSLorenzo Bianconi 1653399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1654399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1655399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1656399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1657399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1658399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1659399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1660399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1661399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1662399090efSLorenzo Bianconi bool enable); 1663f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1664f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1665f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 166655d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 166755d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 166855d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 166955d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 167055d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 167155d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1672f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1673f5056657SSean Wang enum ieee80211_sta_state old_state, 1674f5056657SSean Wang enum ieee80211_sta_state new_state); 16750da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1676c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 16770da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 16780da3c795SSean Wang struct mt76_connac_coredump *coredump); 167918369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 16801f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 16811f832887SLorenzo Bianconi struct ieee80211_vif *vif); 168287f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 168387f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1684e6d557a7SLorenzo Bianconi 1685e6d557a7SLorenzo Bianconi const struct ieee80211_sta_he_cap * 1686e6d557a7SLorenzo Bianconi mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); 1687e6d557a7SLorenzo Bianconi u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1688e6d557a7SLorenzo Bianconi enum nl80211_band band, struct ieee80211_sta *sta); 16896683d988SLorenzo Bianconi 16906683d988SLorenzo Bianconi int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 16916683d988SLorenzo Bianconi struct mt76_connac_sta_key_conf *sta_key_conf, 16926683d988SLorenzo Bianconi struct ieee80211_key_conf *key, int mcu_cmd, 16936683d988SLorenzo Bianconi struct mt76_wcid *wcid, enum set_key_cmd cmd); 169454735e11SLorenzo Bianconi 169564f4e823SLorenzo Bianconi void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif); 169654735e11SLorenzo Bianconi void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 169754735e11SLorenzo Bianconi struct ieee80211_vif *vif); 169849126ac1SLorenzo Bianconi int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 169949126ac1SLorenzo Bianconi struct ieee80211_vif *vif, 170049126ac1SLorenzo Bianconi struct ieee80211_sta *sta, 170195b5946eSChad Monroe struct mt76_phy *phy, u16 wlan_idx, 170249126ac1SLorenzo Bianconi bool enable); 1703836c0c98SLorenzo Bianconi void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 1704836c0c98SLorenzo Bianconi struct ieee80211_sta *sta); 17052557e568SLorenzo Bianconi void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 17062557e568SLorenzo Bianconi struct ieee80211_sta *sta, 17072557e568SLorenzo Bianconi void *sta_wtbl, void *wtbl_tlv); 170848d743d1SLorenzo Bianconi int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); 1709ae90bdd6SLorenzo Bianconi int mt76_connac_mcu_restart(struct mt76_dev *dev); 171097cef84dSLorenzo Bianconi int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 171197cef84dSLorenzo Bianconi u8 rx_sel, u8 val); 1712*b9ec2710SLorenzo Bianconi int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 1713*b9ec2710SLorenzo Bianconi const char *fw_wa); 1714d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1715