1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 99e90c351SLorenzo Bianconi #define FW_FEATURE_SET_ENCRYPT BIT(0) 109e90c351SLorenzo Bianconi #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 119e90c351SLorenzo Bianconi #define FW_FEATURE_ENCRY_MODE BIT(4) 129e90c351SLorenzo Bianconi #define FW_FEATURE_OVERRIDE_ADDR BIT(5) 1323bdc5d8SMing Yen Hsieh #define FW_FEATURE_NON_DL BIT(6) 149e90c351SLorenzo Bianconi 159e90c351SLorenzo Bianconi #define DL_MODE_ENCRYPT BIT(0) 169e90c351SLorenzo Bianconi #define DL_MODE_KEY_IDX GENMASK(2, 1) 179e90c351SLorenzo Bianconi #define DL_MODE_RESET_SEC_IV BIT(3) 189e90c351SLorenzo Bianconi #define DL_MODE_WORKING_PDA_CR4 BIT(4) 199e90c351SLorenzo Bianconi #define DL_MODE_VALID_RAM_ENTRY BIT(5) 209e90c351SLorenzo Bianconi #define DL_CONFIG_ENCRY_MODE_SEL BIT(6) 219e90c351SLorenzo Bianconi #define DL_MODE_NEED_RSP BIT(31) 229e90c351SLorenzo Bianconi 239e90c351SLorenzo Bianconi #define FW_START_OVERRIDE BIT(0) 249e90c351SLorenzo Bianconi #define FW_START_WORKING_PDA_CR4 BIT(2) 25*a32f063dSPeter Chiu #define FW_START_WORKING_PDA_DSP BIT(3) 269e90c351SLorenzo Bianconi 279e90c351SLorenzo Bianconi #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) 289e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) 299e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_INFO 0x2 309e90c351SLorenzo Bianconi 3128fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24) 3228fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_PLAIN 0x00 3328fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_AES 0x01 3428fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_SCRAMBLE 0x02 3528fec923SLorenzo Bianconi #define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0) 3628fec923SLorenzo Bianconi #define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0) 3728fec923SLorenzo Bianconi 3823bdc5d8SMing Yen Hsieh enum { 3923bdc5d8SMing Yen Hsieh FW_TYPE_DEFAULT = 0, 4023bdc5d8SMing Yen Hsieh FW_TYPE_CLC = 2, 4123bdc5d8SMing Yen Hsieh FW_TYPE_MAX_NUM = 255 4223bdc5d8SMing Yen Hsieh }; 4323bdc5d8SMing Yen Hsieh 44d2f5c8edSLorenzo Bianconi #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10)) 45d2f5c8edSLorenzo Bianconi #define MCU_PKT_ID 0xa0 46d2f5c8edSLorenzo Bianconi 47fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_txd { 48fc6ee71aSLorenzo Bianconi __le32 txd[8]; 49fc6ee71aSLorenzo Bianconi 50fc6ee71aSLorenzo Bianconi __le16 len; 51fc6ee71aSLorenzo Bianconi __le16 pq_id; 52fc6ee71aSLorenzo Bianconi 53fc6ee71aSLorenzo Bianconi u8 cid; 54fc6ee71aSLorenzo Bianconi u8 pkt_type; 55fc6ee71aSLorenzo Bianconi u8 set_query; /* FW don't care */ 56fc6ee71aSLorenzo Bianconi u8 seq; 57fc6ee71aSLorenzo Bianconi 58fc6ee71aSLorenzo Bianconi u8 uc_d2b0_rev; 59fc6ee71aSLorenzo Bianconi u8 ext_cid; 60fc6ee71aSLorenzo Bianconi u8 s2d_index; 61fc6ee71aSLorenzo Bianconi u8 ext_cid_ack; 62fc6ee71aSLorenzo Bianconi 63fc6ee71aSLorenzo Bianconi u32 rsv[5]; 64fc6ee71aSLorenzo Bianconi } __packed __aligned(4); 65fc6ee71aSLorenzo Bianconi 66fc6ee71aSLorenzo Bianconi /** 674c07129bSShayne Chen * struct mt76_connac2_mcu_uni_txd - mcu command descriptor for connac2 and connac3 68fc6ee71aSLorenzo Bianconi * @txd: hardware descriptor 69fc6ee71aSLorenzo Bianconi * @len: total length not including txd 70fc6ee71aSLorenzo Bianconi * @cid: command identifier 71fc6ee71aSLorenzo Bianconi * @pkt_type: must be 0xa0 (cmd packet by long format) 72fc6ee71aSLorenzo Bianconi * @frag_n: fragment number 73fc6ee71aSLorenzo Bianconi * @seq: sequence number 74fc6ee71aSLorenzo Bianconi * @checksum: 0 mean there is no checksum 75fc6ee71aSLorenzo Bianconi * @s2d_index: index for command source and destination 76fc6ee71aSLorenzo Bianconi * Definition | value | note 77fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM 78fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM 79fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA 80fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM 81fc6ee71aSLorenzo Bianconi * 82fc6ee71aSLorenzo Bianconi * @option: command option 83fc6ee71aSLorenzo Bianconi * BIT[0]: UNI_CMD_OPT_BIT_ACK 84fc6ee71aSLorenzo Bianconi * set to 1 to request a fw reply 85fc6ee71aSLorenzo Bianconi * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY 86fc6ee71aSLorenzo Bianconi * is set, mcu firmware will send response event EID = 0x01 87fc6ee71aSLorenzo Bianconi * (UNI_EVENT_ID_CMD_RESULT) to the host. 88fc6ee71aSLorenzo Bianconi * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD 89fc6ee71aSLorenzo Bianconi * 0: original command 90fc6ee71aSLorenzo Bianconi * 1: unified command 91fc6ee71aSLorenzo Bianconi * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY 92fc6ee71aSLorenzo Bianconi * 0: QUERY command 93fc6ee71aSLorenzo Bianconi * 1: SET command 94fc6ee71aSLorenzo Bianconi */ 95fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_uni_txd { 96fc6ee71aSLorenzo Bianconi __le32 txd[8]; 97fc6ee71aSLorenzo Bianconi 98fc6ee71aSLorenzo Bianconi /* DW1 */ 99fc6ee71aSLorenzo Bianconi __le16 len; 100fc6ee71aSLorenzo Bianconi __le16 cid; 101fc6ee71aSLorenzo Bianconi 102fc6ee71aSLorenzo Bianconi /* DW2 */ 103fc6ee71aSLorenzo Bianconi u8 rsv; 104fc6ee71aSLorenzo Bianconi u8 pkt_type; 105fc6ee71aSLorenzo Bianconi u8 frag_n; 106fc6ee71aSLorenzo Bianconi u8 seq; 107fc6ee71aSLorenzo Bianconi 108fc6ee71aSLorenzo Bianconi /* DW3 */ 109fc6ee71aSLorenzo Bianconi __le16 checksum; 110fc6ee71aSLorenzo Bianconi u8 s2d_index; 111fc6ee71aSLorenzo Bianconi u8 option; 112fc6ee71aSLorenzo Bianconi 113fc6ee71aSLorenzo Bianconi /* DW4 */ 114fc6ee71aSLorenzo Bianconi u8 rsv1[4]; 115fc6ee71aSLorenzo Bianconi } __packed __aligned(4); 116fc6ee71aSLorenzo Bianconi 117fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_rxd { 118fc6ee71aSLorenzo Bianconi __le32 rxd[6]; 119fc6ee71aSLorenzo Bianconi 120fc6ee71aSLorenzo Bianconi __le16 len; 121fc6ee71aSLorenzo Bianconi __le16 pkt_type_id; 122fc6ee71aSLorenzo Bianconi 123fc6ee71aSLorenzo Bianconi u8 eid; 124fc6ee71aSLorenzo Bianconi u8 seq; 1255b55b6daSQuan Zhou u8 option; 1265b55b6daSQuan Zhou u8 rsv; 127fc6ee71aSLorenzo Bianconi u8 ext_eid; 128fc6ee71aSLorenzo Bianconi u8 rsv1[2]; 129fc6ee71aSLorenzo Bianconi u8 s2d_index; 1305b55b6daSQuan Zhou 1312631c5b6SGustavo A. R. Silva u8 tlv[]; 132fc6ee71aSLorenzo Bianconi }; 133fc6ee71aSLorenzo Bianconi 1343d8c636cSLorenzo Bianconi struct mt76_connac2_patch_hdr { 1353d8c636cSLorenzo Bianconi char build_date[16]; 1363d8c636cSLorenzo Bianconi char platform[4]; 1373d8c636cSLorenzo Bianconi __be32 hw_sw_ver; 1383d8c636cSLorenzo Bianconi __be32 patch_ver; 1393d8c636cSLorenzo Bianconi __be16 checksum; 1403d8c636cSLorenzo Bianconi u16 rsv; 1413d8c636cSLorenzo Bianconi struct { 1423d8c636cSLorenzo Bianconi __be32 patch_ver; 1433d8c636cSLorenzo Bianconi __be32 subsys; 1443d8c636cSLorenzo Bianconi __be32 feature; 1453d8c636cSLorenzo Bianconi __be32 n_region; 1463d8c636cSLorenzo Bianconi __be32 crc; 1473d8c636cSLorenzo Bianconi u32 rsv[11]; 1483d8c636cSLorenzo Bianconi } desc; 1493d8c636cSLorenzo Bianconi } __packed; 1503d8c636cSLorenzo Bianconi 1513d8c636cSLorenzo Bianconi struct mt76_connac2_patch_sec { 1523d8c636cSLorenzo Bianconi __be32 type; 1533d8c636cSLorenzo Bianconi __be32 offs; 1543d8c636cSLorenzo Bianconi __be32 size; 1553d8c636cSLorenzo Bianconi union { 1563d8c636cSLorenzo Bianconi __be32 spec[13]; 1573d8c636cSLorenzo Bianconi struct { 1583d8c636cSLorenzo Bianconi __be32 addr; 1593d8c636cSLorenzo Bianconi __be32 len; 1603d8c636cSLorenzo Bianconi __be32 sec_key_idx; 1613d8c636cSLorenzo Bianconi __be32 align_len; 1623d8c636cSLorenzo Bianconi u32 rsv[9]; 1633d8c636cSLorenzo Bianconi } info; 1643d8c636cSLorenzo Bianconi }; 1653d8c636cSLorenzo Bianconi } __packed; 1663d8c636cSLorenzo Bianconi 1673d8c636cSLorenzo Bianconi struct mt76_connac2_fw_trailer { 1683d8c636cSLorenzo Bianconi u8 chip_id; 1693d8c636cSLorenzo Bianconi u8 eco_code; 1703d8c636cSLorenzo Bianconi u8 n_region; 1713d8c636cSLorenzo Bianconi u8 format_ver; 1723d8c636cSLorenzo Bianconi u8 format_flag; 1733d8c636cSLorenzo Bianconi u8 rsv[2]; 1743d8c636cSLorenzo Bianconi char fw_ver[10]; 1753d8c636cSLorenzo Bianconi char build_date[15]; 1763d8c636cSLorenzo Bianconi __le32 crc; 1773d8c636cSLorenzo Bianconi } __packed; 1783d8c636cSLorenzo Bianconi 1793d8c636cSLorenzo Bianconi struct mt76_connac2_fw_region { 1803d8c636cSLorenzo Bianconi __le32 decomp_crc; 1813d8c636cSLorenzo Bianconi __le32 decomp_len; 1823d8c636cSLorenzo Bianconi __le32 decomp_blk_sz; 1833d8c636cSLorenzo Bianconi u8 rsv[4]; 1843d8c636cSLorenzo Bianconi __le32 addr; 1853d8c636cSLorenzo Bianconi __le32 len; 1863d8c636cSLorenzo Bianconi u8 feature_set; 18723bdc5d8SMing Yen Hsieh u8 type; 18823bdc5d8SMing Yen Hsieh u8 rsv1[14]; 1893d8c636cSLorenzo Bianconi } __packed; 1903d8c636cSLorenzo Bianconi 191d0e274afSLorenzo Bianconi struct tlv { 192d0e274afSLorenzo Bianconi __le16 tag; 193d0e274afSLorenzo Bianconi __le16 len; 194d0e274afSLorenzo Bianconi } __packed; 195d0e274afSLorenzo Bianconi 1965562d5f6SLorenzo Bianconi struct bss_info_omac { 1975562d5f6SLorenzo Bianconi __le16 tag; 1985562d5f6SLorenzo Bianconi __le16 len; 1995562d5f6SLorenzo Bianconi u8 hw_bss_idx; 2005562d5f6SLorenzo Bianconi u8 omac_idx; 2015562d5f6SLorenzo Bianconi u8 band_idx; 2025562d5f6SLorenzo Bianconi u8 rsv0; 2035562d5f6SLorenzo Bianconi __le32 conn_type; 2045562d5f6SLorenzo Bianconi u32 rsv1; 2055562d5f6SLorenzo Bianconi } __packed; 2065562d5f6SLorenzo Bianconi 2075562d5f6SLorenzo Bianconi struct bss_info_basic { 2085562d5f6SLorenzo Bianconi __le16 tag; 2095562d5f6SLorenzo Bianconi __le16 len; 2105562d5f6SLorenzo Bianconi __le32 network_type; 2115562d5f6SLorenzo Bianconi u8 active; 2125562d5f6SLorenzo Bianconi u8 rsv0; 2135562d5f6SLorenzo Bianconi __le16 bcn_interval; 2145562d5f6SLorenzo Bianconi u8 bssid[ETH_ALEN]; 2155562d5f6SLorenzo Bianconi u8 wmm_idx; 2165562d5f6SLorenzo Bianconi u8 dtim_period; 2175562d5f6SLorenzo Bianconi u8 bmc_wcid_lo; 2185562d5f6SLorenzo Bianconi u8 cipher; 2195562d5f6SLorenzo Bianconi u8 phy_mode; 2205562d5f6SLorenzo Bianconi u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */ 2215562d5f6SLorenzo Bianconi u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */ 2225562d5f6SLorenzo Bianconi u8 bmc_wcid_hi; /* high Byte and version */ 2235562d5f6SLorenzo Bianconi u8 rsv[2]; 2245562d5f6SLorenzo Bianconi } __packed; 2255562d5f6SLorenzo Bianconi 2265562d5f6SLorenzo Bianconi struct bss_info_rf_ch { 2275562d5f6SLorenzo Bianconi __le16 tag; 2285562d5f6SLorenzo Bianconi __le16 len; 2295562d5f6SLorenzo Bianconi u8 pri_ch; 2305562d5f6SLorenzo Bianconi u8 center_ch0; 2315562d5f6SLorenzo Bianconi u8 center_ch1; 2325562d5f6SLorenzo Bianconi u8 bw; 2335562d5f6SLorenzo Bianconi u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */ 2345562d5f6SLorenzo Bianconi u8 he_all_disable; /* 1: disallow all HETB, 0: allow */ 2355562d5f6SLorenzo Bianconi u8 rsv[2]; 2365562d5f6SLorenzo Bianconi } __packed; 2375562d5f6SLorenzo Bianconi 2385562d5f6SLorenzo Bianconi struct bss_info_ext_bss { 2395562d5f6SLorenzo Bianconi __le16 tag; 2405562d5f6SLorenzo Bianconi __le16 len; 2415562d5f6SLorenzo Bianconi __le32 mbss_tsf_offset; /* in unit of us */ 2425562d5f6SLorenzo Bianconi u8 rsv[8]; 2435562d5f6SLorenzo Bianconi } __packed; 2445562d5f6SLorenzo Bianconi 2455562d5f6SLorenzo Bianconi enum { 2465562d5f6SLorenzo Bianconi BSS_INFO_OMAC, 2475562d5f6SLorenzo Bianconi BSS_INFO_BASIC, 2485562d5f6SLorenzo Bianconi BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 2495562d5f6SLorenzo Bianconi BSS_INFO_PM, /* sta only */ 2505562d5f6SLorenzo Bianconi BSS_INFO_UAPSD, /* sta only */ 2515562d5f6SLorenzo Bianconi BSS_INFO_ROAM_DETECT, /* obsoleted */ 2525562d5f6SLorenzo Bianconi BSS_INFO_LQ_RM, /* obsoleted */ 2535562d5f6SLorenzo Bianconi BSS_INFO_EXT_BSS, 2545562d5f6SLorenzo Bianconi BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */ 2555562d5f6SLorenzo Bianconi BSS_INFO_SYNC_MODE, /* obsoleted */ 2565562d5f6SLorenzo Bianconi BSS_INFO_RA, 2575562d5f6SLorenzo Bianconi BSS_INFO_HW_AMSDU, 2585562d5f6SLorenzo Bianconi BSS_INFO_BSS_COLOR, 2595562d5f6SLorenzo Bianconi BSS_INFO_HE_BASIC, 2605562d5f6SLorenzo Bianconi BSS_INFO_PROTECT_INFO, 2615562d5f6SLorenzo Bianconi BSS_INFO_OFFLOAD, 2625562d5f6SLorenzo Bianconi BSS_INFO_11V_MBSSID, 2635562d5f6SLorenzo Bianconi BSS_INFO_MAX_NUM 2645562d5f6SLorenzo Bianconi }; 2655562d5f6SLorenzo Bianconi 266d0e274afSLorenzo Bianconi /* sta_rec */ 267d0e274afSLorenzo Bianconi 268d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 269d0e274afSLorenzo Bianconi u8 rsv[2]; 270d0e274afSLorenzo Bianconi __le16 tlv_num; 271d0e274afSLorenzo Bianconi } __packed; 272d0e274afSLorenzo Bianconi 273d0e274afSLorenzo Bianconi struct sta_req_hdr { 274d0e274afSLorenzo Bianconi u8 bss_idx; 275d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 276d0e274afSLorenzo Bianconi __le16 tlv_num; 277d0e274afSLorenzo Bianconi u8 is_tlv_append; 278d0e274afSLorenzo Bianconi u8 muar_idx; 279d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 280d0e274afSLorenzo Bianconi u8 rsv; 281d0e274afSLorenzo Bianconi } __packed; 282d0e274afSLorenzo Bianconi 283d0e274afSLorenzo Bianconi struct sta_rec_basic { 284d0e274afSLorenzo Bianconi __le16 tag; 285d0e274afSLorenzo Bianconi __le16 len; 286d0e274afSLorenzo Bianconi __le32 conn_type; 287d0e274afSLorenzo Bianconi u8 conn_state; 288d0e274afSLorenzo Bianconi u8 qos; 289d0e274afSLorenzo Bianconi __le16 aid; 290d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 291d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 292d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 293d0e274afSLorenzo Bianconi __le16 extra_info; 294d0e274afSLorenzo Bianconi } __packed; 295d0e274afSLorenzo Bianconi 296d0e274afSLorenzo Bianconi struct sta_rec_ht { 297d0e274afSLorenzo Bianconi __le16 tag; 298d0e274afSLorenzo Bianconi __le16 len; 299d0e274afSLorenzo Bianconi __le16 ht_cap; 300d0e274afSLorenzo Bianconi u16 rsv; 301d0e274afSLorenzo Bianconi } __packed; 302d0e274afSLorenzo Bianconi 303d0e274afSLorenzo Bianconi struct sta_rec_vht { 304d0e274afSLorenzo Bianconi __le16 tag; 305d0e274afSLorenzo Bianconi __le16 len; 306d0e274afSLorenzo Bianconi __le32 vht_cap; 307d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 308d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 3095562d5f6SLorenzo Bianconi /* mt7915 - mt7921 */ 310d0e274afSLorenzo Bianconi u8 rts_bw_sig; 311d0e274afSLorenzo Bianconi u8 rsv[3]; 312d0e274afSLorenzo Bianconi } __packed; 313d0e274afSLorenzo Bianconi 314d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 315d0e274afSLorenzo Bianconi __le16 tag; 316d0e274afSLorenzo Bianconi __le16 len; 317d0e274afSLorenzo Bianconi u8 dac_map; 318d0e274afSLorenzo Bianconi u8 tac_map; 319d0e274afSLorenzo Bianconi u8 max_sp; 320d0e274afSLorenzo Bianconi u8 rsv0; 321d0e274afSLorenzo Bianconi __le16 listen_interval; 322d0e274afSLorenzo Bianconi u8 rsv1[2]; 323d0e274afSLorenzo Bianconi } __packed; 324d0e274afSLorenzo Bianconi 325d0e274afSLorenzo Bianconi struct sta_rec_ba { 326d0e274afSLorenzo Bianconi __le16 tag; 327d0e274afSLorenzo Bianconi __le16 len; 328d0e274afSLorenzo Bianconi u8 tid; 329d0e274afSLorenzo Bianconi u8 ba_type; 330d0e274afSLorenzo Bianconi u8 amsdu; 331d0e274afSLorenzo Bianconi u8 ba_en; 332d0e274afSLorenzo Bianconi __le16 ssn; 333d0e274afSLorenzo Bianconi __le16 winsize; 334d0e274afSLorenzo Bianconi } __packed; 335d0e274afSLorenzo Bianconi 336d0e274afSLorenzo Bianconi struct sta_rec_he { 337d0e274afSLorenzo Bianconi __le16 tag; 338d0e274afSLorenzo Bianconi __le16 len; 339d0e274afSLorenzo Bianconi 340d0e274afSLorenzo Bianconi __le32 he_cap; 341d0e274afSLorenzo Bianconi 342d0e274afSLorenzo Bianconi u8 t_frame_dur; 343d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 344d0e274afSLorenzo Bianconi u8 bw_set; 345d0e274afSLorenzo Bianconi u8 device_class; 346d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 347d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 348d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 349d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 350d0e274afSLorenzo Bianconi u8 dcm_max_ru; 351d0e274afSLorenzo Bianconi u8 punc_pream_rx; 352d0e274afSLorenzo Bianconi u8 pkt_ext; 353d0e274afSLorenzo Bianconi u8 rsv1; 354d0e274afSLorenzo Bianconi 355d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 356d0e274afSLorenzo Bianconi 357d0e274afSLorenzo Bianconi u8 rsv2[2]; 358d0e274afSLorenzo Bianconi } __packed; 359d0e274afSLorenzo Bianconi 360df2632b3SMing Yen Hsieh struct sta_rec_he_v2 { 361df2632b3SMing Yen Hsieh __le16 tag; 362df2632b3SMing Yen Hsieh __le16 len; 363df2632b3SMing Yen Hsieh u8 he_mac_cap[6]; 364df2632b3SMing Yen Hsieh u8 he_phy_cap[11]; 365df2632b3SMing Yen Hsieh u8 pkt_ext; 366df2632b3SMing Yen Hsieh /* 0: BW80, 1: BW160, 2: BW8080 */ 367df2632b3SMing Yen Hsieh __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 368df2632b3SMing Yen Hsieh } __packed; 369df2632b3SMing Yen Hsieh 370d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 371d0e274afSLorenzo Bianconi __le16 tag; 372d0e274afSLorenzo Bianconi __le16 len; 373d0e274afSLorenzo Bianconi u8 max_amsdu_num; 374d0e274afSLorenzo Bianconi u8 max_mpdu_size; 375d0e274afSLorenzo Bianconi u8 amsdu_en; 376d0e274afSLorenzo Bianconi u8 rsv; 377d0e274afSLorenzo Bianconi } __packed; 378d0e274afSLorenzo Bianconi 379d0e274afSLorenzo Bianconi struct sta_rec_state { 380d0e274afSLorenzo Bianconi __le16 tag; 381d0e274afSLorenzo Bianconi __le16 len; 382d0e274afSLorenzo Bianconi __le32 flags; 383d0e274afSLorenzo Bianconi u8 state; 384d0e274afSLorenzo Bianconi u8 vht_opmode; 385d0e274afSLorenzo Bianconi u8 action; 386d0e274afSLorenzo Bianconi u8 rsv[1]; 387d0e274afSLorenzo Bianconi } __packed; 388d0e274afSLorenzo Bianconi 38999b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 39099b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 391d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 392d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 393d0e274afSLorenzo Bianconi __le16 tag; 394d0e274afSLorenzo Bianconi __le16 len; 395d0e274afSLorenzo Bianconi __le16 legacy; 396d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 397d0e274afSLorenzo Bianconi } __packed; 398d0e274afSLorenzo Bianconi 399d0e274afSLorenzo Bianconi struct sta_rec_phy { 400d0e274afSLorenzo Bianconi __le16 tag; 401d0e274afSLorenzo Bianconi __le16 len; 402d0e274afSLorenzo Bianconi __le16 basic_rate; 403d0e274afSLorenzo Bianconi u8 phy_type; 404d0e274afSLorenzo Bianconi u8 ampdu; 405d0e274afSLorenzo Bianconi u8 rts_policy; 406d0e274afSLorenzo Bianconi u8 rcpi; 4076deaf96dSShayne Chen u8 max_ampdu_len; /* connac3 */ 4086deaf96dSShayne Chen u8 rsv[1]; 409d0e274afSLorenzo Bianconi } __packed; 410d0e274afSLorenzo Bianconi 4115883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 4125883892bSLorenzo Bianconi __le16 tag; 4135883892bSLorenzo Bianconi __le16 len; 4145883892bSLorenzo Bianconi __le16 capa; 4155883892bSLorenzo Bianconi u8 rsv[2]; 4165883892bSLorenzo Bianconi } __packed; 4175883892bSLorenzo Bianconi 4185562d5f6SLorenzo Bianconi struct sec_key { 4195562d5f6SLorenzo Bianconi u8 cipher_id; 4205562d5f6SLorenzo Bianconi u8 cipher_len; 4215562d5f6SLorenzo Bianconi u8 key_id; 4225562d5f6SLorenzo Bianconi u8 key_len; 4235562d5f6SLorenzo Bianconi u8 key[32]; 4245562d5f6SLorenzo Bianconi } __packed; 4255562d5f6SLorenzo Bianconi 4265562d5f6SLorenzo Bianconi struct sta_rec_sec { 4275562d5f6SLorenzo Bianconi __le16 tag; 4285562d5f6SLorenzo Bianconi __le16 len; 4295562d5f6SLorenzo Bianconi u8 add; 4305562d5f6SLorenzo Bianconi u8 n_cipher; 4315562d5f6SLorenzo Bianconi u8 rsv[2]; 4325562d5f6SLorenzo Bianconi 4335562d5f6SLorenzo Bianconi struct sec_key key[2]; 4345562d5f6SLorenzo Bianconi } __packed; 4355562d5f6SLorenzo Bianconi 4365562d5f6SLorenzo Bianconi struct sta_rec_bf { 4375562d5f6SLorenzo Bianconi __le16 tag; 4385562d5f6SLorenzo Bianconi __le16 len; 4395562d5f6SLorenzo Bianconi 4405562d5f6SLorenzo Bianconi __le16 pfmu; /* 0xffff: no access right for PFMU */ 4415562d5f6SLorenzo Bianconi bool su_mu; /* 0: SU, 1: MU */ 4425562d5f6SLorenzo Bianconi u8 bf_cap; /* 0: iBF, 1: eBF */ 4435562d5f6SLorenzo Bianconi u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */ 4445562d5f6SLorenzo Bianconi u8 ndpa_rate; 4455562d5f6SLorenzo Bianconi u8 ndp_rate; 4465562d5f6SLorenzo Bianconi u8 rept_poll_rate; 4475562d5f6SLorenzo Bianconi u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */ 4485562d5f6SLorenzo Bianconi u8 ncol; 4495562d5f6SLorenzo Bianconi u8 nrow; 4505562d5f6SLorenzo Bianconi u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */ 4515562d5f6SLorenzo Bianconi 4525562d5f6SLorenzo Bianconi u8 mem_total; 4535562d5f6SLorenzo Bianconi u8 mem_20m; 4545562d5f6SLorenzo Bianconi struct { 4555562d5f6SLorenzo Bianconi u8 row; 4565562d5f6SLorenzo Bianconi u8 col: 6, row_msb: 2; 4575562d5f6SLorenzo Bianconi } mem[4]; 4585562d5f6SLorenzo Bianconi 4595562d5f6SLorenzo Bianconi __le16 smart_ant; 4605562d5f6SLorenzo Bianconi u8 se_idx; 4615562d5f6SLorenzo Bianconi u8 auto_sounding; /* b7: low traffic indicator 4625562d5f6SLorenzo Bianconi * b6: Stop sounding for this entry 4635562d5f6SLorenzo Bianconi * b5 ~ b0: postpone sounding 4645562d5f6SLorenzo Bianconi */ 4655562d5f6SLorenzo Bianconi u8 ibf_timeout; 4665562d5f6SLorenzo Bianconi u8 ibf_dbw; 4675562d5f6SLorenzo Bianconi u8 ibf_ncol; 4685562d5f6SLorenzo Bianconi u8 ibf_nrow; 469cade6939SShayne Chen u8 nrow_gt_bw80; 470cade6939SShayne Chen u8 ncol_gt_bw80; 4715562d5f6SLorenzo Bianconi u8 ru_start_idx; 4725562d5f6SLorenzo Bianconi u8 ru_end_idx; 4735562d5f6SLorenzo Bianconi 4745562d5f6SLorenzo Bianconi bool trigger_su; 4755562d5f6SLorenzo Bianconi bool trigger_mu; 4765562d5f6SLorenzo Bianconi bool ng16_su; 4775562d5f6SLorenzo Bianconi bool ng16_mu; 4785562d5f6SLorenzo Bianconi bool codebook42_su; 4795562d5f6SLorenzo Bianconi bool codebook75_mu; 4805562d5f6SLorenzo Bianconi 4815562d5f6SLorenzo Bianconi u8 he_ltf; 4825562d5f6SLorenzo Bianconi u8 rsv[3]; 4835562d5f6SLorenzo Bianconi } __packed; 4845562d5f6SLorenzo Bianconi 4855562d5f6SLorenzo Bianconi struct sta_rec_bfee { 4865562d5f6SLorenzo Bianconi __le16 tag; 4875562d5f6SLorenzo Bianconi __le16 len; 4885562d5f6SLorenzo Bianconi bool fb_identity_matrix; /* 1: feedback identity matrix */ 4895562d5f6SLorenzo Bianconi bool ignore_feedback; /* 1: ignore */ 4905562d5f6SLorenzo Bianconi u8 rsv[2]; 4915562d5f6SLorenzo Bianconi } __packed; 4925562d5f6SLorenzo Bianconi 4935562d5f6SLorenzo Bianconi struct sta_rec_muru { 4945562d5f6SLorenzo Bianconi __le16 tag; 4955562d5f6SLorenzo Bianconi __le16 len; 4965562d5f6SLorenzo Bianconi 4975562d5f6SLorenzo Bianconi struct { 4985562d5f6SLorenzo Bianconi bool ofdma_dl_en; 4995562d5f6SLorenzo Bianconi bool ofdma_ul_en; 5005562d5f6SLorenzo Bianconi bool mimo_dl_en; 5015562d5f6SLorenzo Bianconi bool mimo_ul_en; 5025562d5f6SLorenzo Bianconi u8 rsv[4]; 5035562d5f6SLorenzo Bianconi } cfg; 5045562d5f6SLorenzo Bianconi 5055562d5f6SLorenzo Bianconi struct { 5065562d5f6SLorenzo Bianconi u8 punc_pream_rx; 5075562d5f6SLorenzo Bianconi bool he_20m_in_40m_2g; 5085562d5f6SLorenzo Bianconi bool he_20m_in_160m; 5095562d5f6SLorenzo Bianconi bool he_80m_in_160m; 5105562d5f6SLorenzo Bianconi bool lt16_sigb; 5115562d5f6SLorenzo Bianconi bool rx_su_comp_sigb; 5125562d5f6SLorenzo Bianconi bool rx_su_non_comp_sigb; 5135562d5f6SLorenzo Bianconi u8 rsv; 5145562d5f6SLorenzo Bianconi } ofdma_dl; 5155562d5f6SLorenzo Bianconi 5165562d5f6SLorenzo Bianconi struct { 5175562d5f6SLorenzo Bianconi u8 t_frame_dur; 5185562d5f6SLorenzo Bianconi u8 mu_cascading; 5195562d5f6SLorenzo Bianconi u8 uo_ra; 5205562d5f6SLorenzo Bianconi u8 he_2x996_tone; 5215562d5f6SLorenzo Bianconi u8 rx_t_frame_11ac; 5225562d5f6SLorenzo Bianconi u8 rsv[3]; 5235562d5f6SLorenzo Bianconi } ofdma_ul; 5245562d5f6SLorenzo Bianconi 5255562d5f6SLorenzo Bianconi struct { 5265562d5f6SLorenzo Bianconi bool vht_mu_bfee; 5275562d5f6SLorenzo Bianconi bool partial_bw_dl_mimo; 5285562d5f6SLorenzo Bianconi u8 rsv[2]; 5295562d5f6SLorenzo Bianconi } mimo_dl; 5305562d5f6SLorenzo Bianconi 5315562d5f6SLorenzo Bianconi struct { 5325562d5f6SLorenzo Bianconi bool full_ul_mimo; 5335562d5f6SLorenzo Bianconi bool partial_ul_mimo; 5345562d5f6SLorenzo Bianconi u8 rsv[2]; 5355562d5f6SLorenzo Bianconi } mimo_ul; 5365562d5f6SLorenzo Bianconi } __packed; 5375562d5f6SLorenzo Bianconi 5385562d5f6SLorenzo Bianconi struct sta_phy { 5395562d5f6SLorenzo Bianconi u8 type; 5405562d5f6SLorenzo Bianconi u8 flag; 5415562d5f6SLorenzo Bianconi u8 stbc; 5425562d5f6SLorenzo Bianconi u8 sgi; 5435562d5f6SLorenzo Bianconi u8 bw; 5445562d5f6SLorenzo Bianconi u8 ldpc; 5455562d5f6SLorenzo Bianconi u8 mcs; 5465562d5f6SLorenzo Bianconi u8 nss; 5475562d5f6SLorenzo Bianconi u8 he_ltf; 5485562d5f6SLorenzo Bianconi }; 5495562d5f6SLorenzo Bianconi 5505562d5f6SLorenzo Bianconi struct sta_rec_ra { 5515562d5f6SLorenzo Bianconi __le16 tag; 5525562d5f6SLorenzo Bianconi __le16 len; 5535562d5f6SLorenzo Bianconi 5545562d5f6SLorenzo Bianconi u8 valid; 5555562d5f6SLorenzo Bianconi u8 auto_rate; 5565562d5f6SLorenzo Bianconi u8 phy_mode; 5575562d5f6SLorenzo Bianconi u8 channel; 5585562d5f6SLorenzo Bianconi u8 bw; 5595562d5f6SLorenzo Bianconi u8 disable_cck; 5605562d5f6SLorenzo Bianconi u8 ht_mcs32; 5615562d5f6SLorenzo Bianconi u8 ht_gf; 5625562d5f6SLorenzo Bianconi u8 ht_mcs[4]; 5635562d5f6SLorenzo Bianconi u8 mmps_mode; 5645562d5f6SLorenzo Bianconi u8 gband_256; 5655562d5f6SLorenzo Bianconi u8 af; 5665562d5f6SLorenzo Bianconi u8 auth_wapi_mode; 5675562d5f6SLorenzo Bianconi u8 rate_len; 5685562d5f6SLorenzo Bianconi 5695562d5f6SLorenzo Bianconi u8 supp_mode; 5705562d5f6SLorenzo Bianconi u8 supp_cck_rate; 5715562d5f6SLorenzo Bianconi u8 supp_ofdm_rate; 5725562d5f6SLorenzo Bianconi __le32 supp_ht_mcs; 5735562d5f6SLorenzo Bianconi __le16 supp_vht_mcs[4]; 5745562d5f6SLorenzo Bianconi 5755562d5f6SLorenzo Bianconi u8 op_mode; 5765562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 5775562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 5785562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 5795562d5f6SLorenzo Bianconi 5805562d5f6SLorenzo Bianconi __le32 sta_cap; 5815562d5f6SLorenzo Bianconi 5825562d5f6SLorenzo Bianconi struct sta_phy phy; 5835562d5f6SLorenzo Bianconi } __packed; 5845562d5f6SLorenzo Bianconi 5855562d5f6SLorenzo Bianconi struct sta_rec_ra_fixed { 5865562d5f6SLorenzo Bianconi __le16 tag; 5875562d5f6SLorenzo Bianconi __le16 len; 5885562d5f6SLorenzo Bianconi 5895562d5f6SLorenzo Bianconi __le32 field; 5905562d5f6SLorenzo Bianconi u8 op_mode; 5915562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 5925562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 5935562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 5945562d5f6SLorenzo Bianconi 5955562d5f6SLorenzo Bianconi struct sta_phy phy; 5965562d5f6SLorenzo Bianconi 597faf2e7b5SShayne Chen u8 spe_idx; 5985562d5f6SLorenzo Bianconi u8 short_preamble; 5995562d5f6SLorenzo Bianconi u8 is_5g; 6005562d5f6SLorenzo Bianconi u8 mmps_mode; 6015562d5f6SLorenzo Bianconi } __packed; 6025562d5f6SLorenzo Bianconi 603d0e274afSLorenzo Bianconi /* wtbl_rec */ 604d0e274afSLorenzo Bianconi 605d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 606d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 607d0e274afSLorenzo Bianconi u8 operation; 608d0e274afSLorenzo Bianconi __le16 tlv_num; 609d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 610d0e274afSLorenzo Bianconi u8 rsv[3]; 611d0e274afSLorenzo Bianconi } __packed; 612d0e274afSLorenzo Bianconi 613d0e274afSLorenzo Bianconi struct wtbl_generic { 614d0e274afSLorenzo Bianconi __le16 tag; 615d0e274afSLorenzo Bianconi __le16 len; 616d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 617d0e274afSLorenzo Bianconi u8 muar_idx; 618d0e274afSLorenzo Bianconi u8 skip_tx; 619d0e274afSLorenzo Bianconi u8 cf_ack; 620d0e274afSLorenzo Bianconi u8 qos; 621d0e274afSLorenzo Bianconi u8 mesh; 622d0e274afSLorenzo Bianconi u8 adm; 623d0e274afSLorenzo Bianconi __le16 partial_aid; 624d0e274afSLorenzo Bianconi u8 baf_en; 625d0e274afSLorenzo Bianconi u8 aad_om; 626d0e274afSLorenzo Bianconi } __packed; 627d0e274afSLorenzo Bianconi 628d0e274afSLorenzo Bianconi struct wtbl_rx { 629d0e274afSLorenzo Bianconi __le16 tag; 630d0e274afSLorenzo Bianconi __le16 len; 631d0e274afSLorenzo Bianconi u8 rcid; 632d0e274afSLorenzo Bianconi u8 rca1; 633d0e274afSLorenzo Bianconi u8 rca2; 634d0e274afSLorenzo Bianconi u8 rv; 635d0e274afSLorenzo Bianconi u8 rsv[4]; 636d0e274afSLorenzo Bianconi } __packed; 637d0e274afSLorenzo Bianconi 638d0e274afSLorenzo Bianconi struct wtbl_ht { 639d0e274afSLorenzo Bianconi __le16 tag; 640d0e274afSLorenzo Bianconi __le16 len; 641d0e274afSLorenzo Bianconi u8 ht; 642d0e274afSLorenzo Bianconi u8 ldpc; 643d0e274afSLorenzo Bianconi u8 af; 644d0e274afSLorenzo Bianconi u8 mm; 645d0e274afSLorenzo Bianconi u8 rsv[4]; 646d0e274afSLorenzo Bianconi } __packed; 647d0e274afSLorenzo Bianconi 648d0e274afSLorenzo Bianconi struct wtbl_vht { 649d0e274afSLorenzo Bianconi __le16 tag; 650d0e274afSLorenzo Bianconi __le16 len; 651d0e274afSLorenzo Bianconi u8 ldpc; 652d0e274afSLorenzo Bianconi u8 dyn_bw; 653d0e274afSLorenzo Bianconi u8 vht; 654d0e274afSLorenzo Bianconi u8 txop_ps; 655d0e274afSLorenzo Bianconi u8 rsv[4]; 656d0e274afSLorenzo Bianconi } __packed; 657d0e274afSLorenzo Bianconi 658d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 659d0e274afSLorenzo Bianconi __le16 tag; 660d0e274afSLorenzo Bianconi __le16 len; 661d0e274afSLorenzo Bianconi u8 txps; 662d0e274afSLorenzo Bianconi u8 rsv[3]; 663d0e274afSLorenzo Bianconi } __packed; 664d0e274afSLorenzo Bianconi 665d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 666d0e274afSLorenzo Bianconi __le16 tag; 667d0e274afSLorenzo Bianconi __le16 len; 668d0e274afSLorenzo Bianconi u8 to_ds; 669d0e274afSLorenzo Bianconi u8 from_ds; 670d4b98c63SRyder Lee u8 no_rx_trans; 671d0e274afSLorenzo Bianconi u8 rsv; 672d0e274afSLorenzo Bianconi } __packed; 673d0e274afSLorenzo Bianconi 674d0e274afSLorenzo Bianconi struct wtbl_ba { 675d0e274afSLorenzo Bianconi __le16 tag; 676d0e274afSLorenzo Bianconi __le16 len; 677d0e274afSLorenzo Bianconi /* common */ 678d0e274afSLorenzo Bianconi u8 tid; 679d0e274afSLorenzo Bianconi u8 ba_type; 680d0e274afSLorenzo Bianconi u8 rsv0[2]; 681d0e274afSLorenzo Bianconi /* originator only */ 682d0e274afSLorenzo Bianconi __le16 sn; 683d0e274afSLorenzo Bianconi u8 ba_en; 684d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 6855562d5f6SLorenzo Bianconi /* originator & recipient */ 686d0e274afSLorenzo Bianconi __le16 ba_winsize; 687d0e274afSLorenzo Bianconi /* recipient only */ 688d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 689d0e274afSLorenzo Bianconi u8 rst_ba_tid; 690d0e274afSLorenzo Bianconi u8 rst_ba_sel; 691d0e274afSLorenzo Bianconi u8 rst_ba_sb; 692d0e274afSLorenzo Bianconi u8 band_idx; 693d0e274afSLorenzo Bianconi u8 rsv1[4]; 694d0e274afSLorenzo Bianconi } __packed; 695d0e274afSLorenzo Bianconi 696d0e274afSLorenzo Bianconi struct wtbl_smps { 697d0e274afSLorenzo Bianconi __le16 tag; 698d0e274afSLorenzo Bianconi __le16 len; 699d0e274afSLorenzo Bianconi u8 smps; 700d0e274afSLorenzo Bianconi u8 rsv[3]; 701d0e274afSLorenzo Bianconi } __packed; 702d0e274afSLorenzo Bianconi 703d0e274afSLorenzo Bianconi /* mt7615 only */ 704d0e274afSLorenzo Bianconi 705d0e274afSLorenzo Bianconi struct wtbl_bf { 706d0e274afSLorenzo Bianconi __le16 tag; 707d0e274afSLorenzo Bianconi __le16 len; 708d0e274afSLorenzo Bianconi u8 ibf; 709d0e274afSLorenzo Bianconi u8 ebf; 710d0e274afSLorenzo Bianconi u8 ibf_vht; 711d0e274afSLorenzo Bianconi u8 ebf_vht; 712d0e274afSLorenzo Bianconi u8 gid; 713d0e274afSLorenzo Bianconi u8 pfmu_idx; 714d0e274afSLorenzo Bianconi u8 rsv[2]; 715d0e274afSLorenzo Bianconi } __packed; 716d0e274afSLorenzo Bianconi 717d0e274afSLorenzo Bianconi struct wtbl_pn { 718d0e274afSLorenzo Bianconi __le16 tag; 719d0e274afSLorenzo Bianconi __le16 len; 720d0e274afSLorenzo Bianconi u8 pn[6]; 721d0e274afSLorenzo Bianconi u8 rsv[2]; 722d0e274afSLorenzo Bianconi } __packed; 723d0e274afSLorenzo Bianconi 724d0e274afSLorenzo Bianconi struct wtbl_spe { 725d0e274afSLorenzo Bianconi __le16 tag; 726d0e274afSLorenzo Bianconi __le16 len; 727d0e274afSLorenzo Bianconi u8 spe_idx; 728d0e274afSLorenzo Bianconi u8 rsv[3]; 729d0e274afSLorenzo Bianconi } __packed; 730d0e274afSLorenzo Bianconi 731d0e274afSLorenzo Bianconi struct wtbl_raw { 732d0e274afSLorenzo Bianconi __le16 tag; 733d0e274afSLorenzo Bianconi __le16 len; 734d0e274afSLorenzo Bianconi u8 wtbl_idx; 735d0e274afSLorenzo Bianconi u8 dw; 736d0e274afSLorenzo Bianconi u8 rsv[2]; 737d0e274afSLorenzo Bianconi __le32 msk; 738d0e274afSLorenzo Bianconi __le32 val; 739d0e274afSLorenzo Bianconi } __packed; 740d0e274afSLorenzo Bianconi 741d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 742d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 743d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 744d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 745d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 746d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 747d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 748d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 749d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 750d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 751d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 752d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 753d0e274afSLorenzo Bianconi 754d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 755d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 7565562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bf) + \ 757d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 758d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 759d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 760d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 761d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 762d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 7635562d5f6SLorenzo Bianconi sizeof(struct sta_rec_muru) + \ 7645562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bfee) + \ 7655562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra) + \ 766e2c93b68SLorenzo Bianconi sizeof(struct sta_rec_sec) + \ 7675562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra_fixed) + \ 7685883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 769d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 770d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 771d0e274afSLorenzo Bianconi 772d0e274afSLorenzo Bianconi enum { 773d0e274afSLorenzo Bianconi STA_REC_BASIC, 774d0e274afSLorenzo Bianconi STA_REC_RA, 775d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 776d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 777d0e274afSLorenzo Bianconi STA_REC_BF, 778d0e274afSLorenzo Bianconi STA_REC_AMSDU, 779d0e274afSLorenzo Bianconi STA_REC_BA, 780d0e274afSLorenzo Bianconi STA_REC_STATE, 781d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 782d0e274afSLorenzo Bianconi STA_REC_HT, 783d0e274afSLorenzo Bianconi STA_REC_VHT, 784d0e274afSLorenzo Bianconi STA_REC_APPS, 785d0e274afSLorenzo Bianconi STA_REC_KEY, 786d0e274afSLorenzo Bianconi STA_REC_WTBL, 787d0e274afSLorenzo Bianconi STA_REC_HE, 788d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 789d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 790d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 791d0e274afSLorenzo Bianconi STA_REC_MURU, 792d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 793d0e274afSLorenzo Bianconi STA_REC_BFEE, 794d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 7955883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 796df2632b3SMing Yen Hsieh STA_REC_HE_V2 = 0x19, 7976aa57e26SShayne Chen STA_REC_EHT = 0x22, 79898f191b1SShayne Chen STA_REC_HDRT = 0x28, 79998f191b1SShayne Chen STA_REC_HDR_TRANS = 0x2B, 800d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 801d0e274afSLorenzo Bianconi }; 802d0e274afSLorenzo Bianconi 803d0e274afSLorenzo Bianconi enum { 804d0e274afSLorenzo Bianconi WTBL_GENERIC, 805d0e274afSLorenzo Bianconi WTBL_RX, 806d0e274afSLorenzo Bianconi WTBL_HT, 807d0e274afSLorenzo Bianconi WTBL_VHT, 808d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 809d0e274afSLorenzo Bianconi WTBL_TX_PS, 810d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 811d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 812d0e274afSLorenzo Bianconi WTBL_BA, 813d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 814d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 815d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 816d0e274afSLorenzo Bianconi WTBL_BF, 817d0e274afSLorenzo Bianconi WTBL_SMPS, 818d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 819d0e274afSLorenzo Bianconi WTBL_PN, 820d0e274afSLorenzo Bianconi WTBL_SPE, 821d0e274afSLorenzo Bianconi WTBL_MAX_NUM 822d0e274afSLorenzo Bianconi }; 823d0e274afSLorenzo Bianconi 824d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 825d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 826d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 827d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 828d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 829d0e274afSLorenzo Bianconi 830d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 831d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 832d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 833d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 834d0e274afSLorenzo Bianconi 8354da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 8364da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 8374da64fe0SSean Wang 838d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 839d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 840d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 841d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 842d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 843d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 844d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 845d0e274afSLorenzo Bianconi 846d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 847d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 848d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 849d0e274afSLorenzo Bianconi 850d0e274afSLorenzo Bianconi /* HE MAC */ 851d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 852d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 853d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 854d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 855d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 856d0e274afSLorenzo Bianconi /* HE PHY */ 857d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 858d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 859d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 860d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 861d0e274afSLorenzo Bianconi /* STBC */ 862d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 863d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 864d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 865d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 866d0e274afSLorenzo Bianconi /* GI */ 867d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 868d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 869d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 870d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 871d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 872d0e274afSLorenzo Bianconi /* 242 TONE */ 873d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 874d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 875d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 876d0e274afSLorenzo Bianconi 877d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 878d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 879d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 880d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 881d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 882d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 883d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 884d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 885dfdf6725SLorenzo Bianconi 886dfdf6725SLorenzo Bianconi #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ 887c2eccffdSShayne Chen #define PHY_MODE_BE_24G BIT(1) 888c2eccffdSShayne Chen #define PHY_MODE_BE_5G BIT(2) 889c2eccffdSShayne Chen #define PHY_MODE_BE_6G BIT(3) 890d0e274afSLorenzo Bianconi 891d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 892d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 893d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 894d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 895d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 896c2eccffdSShayne Chen #define MODE_EHT BIT(5) 897d0e274afSLorenzo Bianconi 8985562d5f6SLorenzo Bianconi #define STA_CAP_WMM BIT(0) 8995562d5f6SLorenzo Bianconi #define STA_CAP_SGI_20 BIT(4) 9005562d5f6SLorenzo Bianconi #define STA_CAP_SGI_40 BIT(5) 9015562d5f6SLorenzo Bianconi #define STA_CAP_TX_STBC BIT(6) 9025562d5f6SLorenzo Bianconi #define STA_CAP_RX_STBC BIT(7) 9035562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_80 BIT(16) 9045562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_160 BIT(17) 9055562d5f6SLorenzo Bianconi #define STA_CAP_VHT_TX_STBC BIT(18) 9065562d5f6SLorenzo Bianconi #define STA_CAP_VHT_RX_STBC BIT(19) 9075562d5f6SLorenzo Bianconi #define STA_CAP_VHT_LDPC BIT(23) 9085562d5f6SLorenzo Bianconi #define STA_CAP_LDPC BIT(24) 9095562d5f6SLorenzo Bianconi #define STA_CAP_HT BIT(26) 9105562d5f6SLorenzo Bianconi #define STA_CAP_VHT BIT(27) 9115562d5f6SLorenzo Bianconi #define STA_CAP_HE BIT(28) 9125562d5f6SLorenzo Bianconi 913d0e274afSLorenzo Bianconi enum { 914d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 915d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 916d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 917d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 918d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 919d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 920d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 921d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 922d0e274afSLorenzo Bianconi }; 923d0e274afSLorenzo Bianconi 924d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 925d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 926d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 927d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 928d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 929d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 930d0e274afSLorenzo Bianconi 931d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 932d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 933d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 934d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 935d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 936d0e274afSLorenzo Bianconi 937d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 938d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 939d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 940d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 941d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 942d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 943d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 944d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 945d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 946d0e274afSLorenzo Bianconi 947d0e274afSLorenzo Bianconi enum { 948d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 949d0e274afSLorenzo Bianconi WTBL_SET, 950d0e274afSLorenzo Bianconi WTBL_QUERY, 951d0e274afSLorenzo Bianconi WTBL_RESET_ALL 952d0e274afSLorenzo Bianconi }; 953d0e274afSLorenzo Bianconi 954d0e274afSLorenzo Bianconi enum { 955d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 956d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 957d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 958d0e274afSLorenzo Bianconi }; 959d0e274afSLorenzo Bianconi 960d0e274afSLorenzo Bianconi enum { 961d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 962d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 963d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 964d0e274afSLorenzo Bianconi }; 965d0e274afSLorenzo Bianconi 966d0e274afSLorenzo Bianconi enum { 967d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 968d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 969d0e274afSLorenzo Bianconi }; 970d0e274afSLorenzo Bianconi 9715562d5f6SLorenzo Bianconi /* event table */ 9725562d5f6SLorenzo Bianconi enum { 9735562d5f6SLorenzo Bianconi MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, 9745562d5f6SLorenzo Bianconi MCU_EVENT_FW_START = 0x01, 9755562d5f6SLorenzo Bianconi MCU_EVENT_GENERIC = 0x01, 9765562d5f6SLorenzo Bianconi MCU_EVENT_ACCESS_REG = 0x02, 9775562d5f6SLorenzo Bianconi MCU_EVENT_MT_PATCH_SEM = 0x04, 9785562d5f6SLorenzo Bianconi MCU_EVENT_REG_ACCESS = 0x05, 9795562d5f6SLorenzo Bianconi MCU_EVENT_LP_INFO = 0x07, 9805562d5f6SLorenzo Bianconi MCU_EVENT_SCAN_DONE = 0x0d, 9815562d5f6SLorenzo Bianconi MCU_EVENT_TX_DONE = 0x0f, 9825562d5f6SLorenzo Bianconi MCU_EVENT_ROC = 0x10, 9835562d5f6SLorenzo Bianconi MCU_EVENT_BSS_ABSENCE = 0x11, 9845562d5f6SLorenzo Bianconi MCU_EVENT_BSS_BEACON_LOSS = 0x13, 9855562d5f6SLorenzo Bianconi MCU_EVENT_CH_PRIVILEGE = 0x18, 9865562d5f6SLorenzo Bianconi MCU_EVENT_SCHED_SCAN_DONE = 0x23, 9875562d5f6SLorenzo Bianconi MCU_EVENT_DBG_MSG = 0x27, 9885562d5f6SLorenzo Bianconi MCU_EVENT_TXPWR = 0xd0, 9895562d5f6SLorenzo Bianconi MCU_EVENT_EXT = 0xed, 9905562d5f6SLorenzo Bianconi MCU_EVENT_RESTART_DL = 0xef, 9915562d5f6SLorenzo Bianconi MCU_EVENT_COREDUMP = 0xf0, 9925562d5f6SLorenzo Bianconi }; 9935562d5f6SLorenzo Bianconi 9945562d5f6SLorenzo Bianconi /* ext event table */ 9955562d5f6SLorenzo Bianconi enum { 9965562d5f6SLorenzo Bianconi MCU_EXT_EVENT_PS_SYNC = 0x5, 9975562d5f6SLorenzo Bianconi MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, 9985562d5f6SLorenzo Bianconi MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, 9995562d5f6SLorenzo Bianconi MCU_EXT_EVENT_ASSERT_DUMP = 0x23, 10005562d5f6SLorenzo Bianconi MCU_EXT_EVENT_RDD_REPORT = 0x3a, 10015562d5f6SLorenzo Bianconi MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, 1002161a7528SPeter Chiu MCU_EXT_EVENT_WA_TX_STAT = 0x74, 10035562d5f6SLorenzo Bianconi MCU_EXT_EVENT_BCC_NOTIFY = 0x75, 10041966a507SMeiChia Chiu MCU_EXT_EVENT_MURU_CTRL = 0x9f, 10055562d5f6SLorenzo Bianconi }; 10065562d5f6SLorenzo Bianconi 1007ec361f7eSShayne Chen /* unified event table */ 1008ec361f7eSShayne Chen enum { 1009ec361f7eSShayne Chen MCU_UNI_EVENT_RESULT = 0x01, 1010ec361f7eSShayne Chen MCU_UNI_EVENT_FW_LOG_2_HOST = 0x04, 1011ec361f7eSShayne Chen MCU_UNI_EVENT_IE_COUNTDOWN = 0x09, 1012ec361f7eSShayne Chen MCU_UNI_EVENT_RDD_REPORT = 0x11, 1013ec361f7eSShayne Chen }; 1014ec361f7eSShayne Chen 1015ec361f7eSShayne Chen #define MCU_UNI_CMD_EVENT BIT(1) 1016ec361f7eSShayne Chen #define MCU_UNI_CMD_UNSOLICITED_EVENT BIT(2) 1017ec361f7eSShayne Chen 10185562d5f6SLorenzo Bianconi enum { 10195562d5f6SLorenzo Bianconi MCU_Q_QUERY, 10205562d5f6SLorenzo Bianconi MCU_Q_SET, 10215562d5f6SLorenzo Bianconi MCU_Q_RESERVED, 10225562d5f6SLorenzo Bianconi MCU_Q_NA 10235562d5f6SLorenzo Bianconi }; 10245562d5f6SLorenzo Bianconi 10255562d5f6SLorenzo Bianconi enum { 10265562d5f6SLorenzo Bianconi MCU_S2D_H2N, 10275562d5f6SLorenzo Bianconi MCU_S2D_C2N, 10285562d5f6SLorenzo Bianconi MCU_S2D_H2C, 10295562d5f6SLorenzo Bianconi MCU_S2D_H2CN 10305562d5f6SLorenzo Bianconi }; 10315562d5f6SLorenzo Bianconi 10325562d5f6SLorenzo Bianconi enum { 10335562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_FAIL, 10345562d5f6SLorenzo Bianconi PATCH_IS_DL, 10355562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_SUCCESS, 10365562d5f6SLorenzo Bianconi PATCH_REL_SEM_SUCCESS 10375562d5f6SLorenzo Bianconi }; 10385562d5f6SLorenzo Bianconi 10395562d5f6SLorenzo Bianconi enum { 10405562d5f6SLorenzo Bianconi FW_STATE_INITIAL, 10415562d5f6SLorenzo Bianconi FW_STATE_FW_DOWNLOAD, 10425562d5f6SLorenzo Bianconi FW_STATE_NORMAL_OPERATION, 10435562d5f6SLorenzo Bianconi FW_STATE_NORMAL_TRX, 10445562d5f6SLorenzo Bianconi FW_STATE_RDY = 7 10455562d5f6SLorenzo Bianconi }; 10465562d5f6SLorenzo Bianconi 10475562d5f6SLorenzo Bianconi enum { 10485562d5f6SLorenzo Bianconi CH_SWITCH_NORMAL = 0, 10495562d5f6SLorenzo Bianconi CH_SWITCH_SCAN = 3, 10505562d5f6SLorenzo Bianconi CH_SWITCH_MCC = 4, 10515562d5f6SLorenzo Bianconi CH_SWITCH_DFS = 5, 10525562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_START = 6, 10535562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 10545562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 10555562d5f6SLorenzo Bianconi CH_SWITCH_SCAN_BYPASS_DPD = 9 10565562d5f6SLorenzo Bianconi }; 10575562d5f6SLorenzo Bianconi 10585562d5f6SLorenzo Bianconi enum { 10595562d5f6SLorenzo Bianconi THERMAL_SENSOR_TEMP_QUERY, 10605562d5f6SLorenzo Bianconi THERMAL_SENSOR_MANUAL_CTRL, 10615562d5f6SLorenzo Bianconi THERMAL_SENSOR_INFO_QUERY, 10625562d5f6SLorenzo Bianconi THERMAL_SENSOR_TASK_CTRL, 10635562d5f6SLorenzo Bianconi }; 10645562d5f6SLorenzo Bianconi 10655562d5f6SLorenzo Bianconi enum mcu_cipher_type { 10665562d5f6SLorenzo Bianconi MCU_CIPHER_NONE = 0, 10675562d5f6SLorenzo Bianconi MCU_CIPHER_WEP40, 10685562d5f6SLorenzo Bianconi MCU_CIPHER_WEP104, 10695562d5f6SLorenzo Bianconi MCU_CIPHER_WEP128, 10705562d5f6SLorenzo Bianconi MCU_CIPHER_TKIP, 10715562d5f6SLorenzo Bianconi MCU_CIPHER_AES_CCMP, 10725562d5f6SLorenzo Bianconi MCU_CIPHER_CCMP_256, 10735562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP, 10745562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP_256, 10755562d5f6SLorenzo Bianconi MCU_CIPHER_WAPI, 10765562d5f6SLorenzo Bianconi MCU_CIPHER_BIP_CMAC_128, 10775562d5f6SLorenzo Bianconi }; 10785562d5f6SLorenzo Bianconi 10795562d5f6SLorenzo Bianconi enum { 10805562d5f6SLorenzo Bianconi EE_MODE_EFUSE, 10815562d5f6SLorenzo Bianconi EE_MODE_BUFFER, 10825562d5f6SLorenzo Bianconi }; 10835562d5f6SLorenzo Bianconi 10845562d5f6SLorenzo Bianconi enum { 10855562d5f6SLorenzo Bianconi EE_FORMAT_BIN, 10865562d5f6SLorenzo Bianconi EE_FORMAT_WHOLE, 10875562d5f6SLorenzo Bianconi EE_FORMAT_MULTIPLE, 10885562d5f6SLorenzo Bianconi }; 10895562d5f6SLorenzo Bianconi 10905562d5f6SLorenzo Bianconi enum { 10915562d5f6SLorenzo Bianconi MCU_PHY_STATE_TX_RATE, 10925562d5f6SLorenzo Bianconi MCU_PHY_STATE_RX_RATE, 10935562d5f6SLorenzo Bianconi MCU_PHY_STATE_RSSI, 10945562d5f6SLorenzo Bianconi MCU_PHY_STATE_CONTENTION_RX_RATE, 10955562d5f6SLorenzo Bianconi MCU_PHY_STATE_OFDMLQ_CNINFO, 10965562d5f6SLorenzo Bianconi }; 10975562d5f6SLorenzo Bianconi 1098d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 1099d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 11004c07129bSShayne Chen #define MCU_CMD_SET BIT(2) 1101d0e274afSLorenzo Bianconi 1102d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 11034c07129bSShayne Chen MCU_CMD_SET) 11044c07129bSShayne Chen #define MCU_CMD_UNI_QUERY_ACK (MCU_CMD_ACK | MCU_CMD_UNI) 1105d0e274afSLorenzo Bianconi 1106e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_ID GENMASK(7, 0) 1107e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8) 1108e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_QUERY BIT(16) 110954722402SLorenzo Bianconi #define __MCU_CMD_FIELD_UNI BIT(17) 1110680a2eadSLorenzo Bianconi #define __MCU_CMD_FIELD_CE BIT(18) 11115562d5f6SLorenzo Bianconi #define __MCU_CMD_FIELD_WA BIT(19) 11124c07129bSShayne Chen #define __MCU_CMD_FIELD_WM BIT(20) 1113e6d2070dSLorenzo Bianconi 1114e6d2070dSLorenzo Bianconi #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \ 1115e6d2070dSLorenzo Bianconi MCU_CMD_##_t) 1116e6d2070dSLorenzo Bianconi #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \ 1117e6d2070dSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 1118e6d2070dSLorenzo Bianconi MCU_EXT_CMD_##_t)) 1119e6d2070dSLorenzo Bianconi #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY) 112054722402SLorenzo Bianconi #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \ 112154722402SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 112254722402SLorenzo Bianconi MCU_UNI_CMD_##_t)) 1123680a2eadSLorenzo Bianconi #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \ 1124680a2eadSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 1125680a2eadSLorenzo Bianconi MCU_CE_CMD_##_t)) 1126680a2eadSLorenzo Bianconi #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY) 1127d0e274afSLorenzo Bianconi 11285562d5f6SLorenzo Bianconi #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA) 11295562d5f6SLorenzo Bianconi #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA) 11305562d5f6SLorenzo Bianconi #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \ 11315562d5f6SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 11325562d5f6SLorenzo Bianconi MCU_WA_PARAM_CMD_##_t)) 11335562d5f6SLorenzo Bianconi 11344c07129bSShayne Chen #define MCU_WM_UNI_CMD(_t) (MCU_UNI_CMD(_t) | \ 11354c07129bSShayne Chen __MCU_CMD_FIELD_WM) 11364c07129bSShayne Chen #define MCU_WM_UNI_CMD_QUERY(_t) (MCU_UNI_CMD(_t) | \ 11374c07129bSShayne Chen __MCU_CMD_FIELD_QUERY | \ 11384c07129bSShayne Chen __MCU_CMD_FIELD_WM) 11394c07129bSShayne Chen #define MCU_WA_UNI_CMD(_t) (MCU_UNI_CMD(_t) | \ 11404c07129bSShayne Chen __MCU_CMD_FIELD_WA) 11414c07129bSShayne Chen #define MCU_WMWA_UNI_CMD(_t) (MCU_WM_UNI_CMD(_t) | \ 11424c07129bSShayne Chen __MCU_CMD_FIELD_WA) 11434c07129bSShayne Chen 1144d0e274afSLorenzo Bianconi enum { 1145d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 1146d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 11479d8d136cSLorenzo Bianconi MCU_EXT_CMD_RF_TEST = 0x04, 1148d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 1149d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 1150d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 1151d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 11529d8d136cSLorenzo Bianconi MCU_EXT_CMD_TXBF_ACTION = 0x1e, 1153d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 11549d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_PROT = 0x23, 1155d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 1156d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 1157d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 1158d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 11599d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_CTRL = 0x2c, 1160d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 11619d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_DRR_CTRL = 0x36, 1162d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 1163d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 1164d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 1165d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 1166d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 1167d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 1168d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 1169d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 11709d8d136cSLorenzo Bianconi MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, 1171d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 11729d8d136cSLorenzo Bianconi MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, 1173d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 1174d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 11759d8d136cSLorenzo Bianconi MCU_EXT_CMD_GET_MIB_INFO = 0x5a, 1176d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 117703a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 11787576a1c4SPeter Chiu MCU_EXT_CMD_RED_ENABLE = 0x68, 11799d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RADAR_TH = 0x7c, 1180d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 11819d8d136cSLorenzo Bianconi MCU_EXT_CMD_MWDS_SUPPORT = 0x80, 11829d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, 11839d8d136cSLorenzo Bianconi MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, 11849d8d136cSLorenzo Bianconi MCU_EXT_CMD_FW_DBG_CTRL = 0x95, 118539cdf080SLorenzo Bianconi MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, 11869d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x9d, 11879d8d136cSLorenzo Bianconi MCU_EXT_CMD_MURU_CTRL = 0x9f, 11889d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SPR = 0xa8, 11899d8d136cSLorenzo Bianconi MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, 11909d8d136cSLorenzo Bianconi MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, 11919d8d136cSLorenzo Bianconi MCU_EXT_CMD_PHY_STAT_INFO = 0xad, 1192d0e274afSLorenzo Bianconi }; 1193d0e274afSLorenzo Bianconi 1194d0e274afSLorenzo Bianconi enum { 119554722402SLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01, 119654722402SLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02, 119754722402SLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = 0x03, 1198779d34deSShayne Chen MCU_UNI_CMD_EDCA_UPDATE = 0x04, 119954722402SLorenzo Bianconi MCU_UNI_CMD_SUSPEND = 0x05, 120054722402SLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = 0x06, 120154722402SLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = 0x07, 1202779d34deSShayne Chen MCU_UNI_CMD_BAND_CONFIG = 0x08, 1203779d34deSShayne Chen MCU_UNI_CMD_REPT_MUAR = 0x09, 1204779d34deSShayne Chen MCU_UNI_CMD_WSYS_CONFIG = 0x0b, 1205779d34deSShayne Chen MCU_UNI_CMD_REG_ACCESS = 0x0d, 12066aa57e26SShayne Chen MCU_UNI_CMD_CHIP_CONFIG = 0x0e, 12070d82fc95SShayne Chen MCU_UNI_CMD_POWER_CTRL = 0x0f, 1208779d34deSShayne Chen MCU_UNI_CMD_RX_HDR_TRANS = 0x12, 1209779d34deSShayne Chen MCU_UNI_CMD_SER = 0x13, 1210779d34deSShayne Chen MCU_UNI_CMD_TWT = 0x14, 1211779d34deSShayne Chen MCU_UNI_CMD_RDD_CTRL = 0x19, 1212779d34deSShayne Chen MCU_UNI_CMD_GET_MIB_INFO = 0x22, 1213cbaa0a40SSean Wang MCU_UNI_CMD_SNIFFER = 0x24, 1214779d34deSShayne Chen MCU_UNI_CMD_SR = 0x25, 12155b55b6daSQuan Zhou MCU_UNI_CMD_ROC = 0x27, 1216779d34deSShayne Chen MCU_UNI_CMD_TXPOWER = 0x2b, 1217779d34deSShayne Chen MCU_UNI_CMD_EFUSE_CTRL = 0x2d, 1218779d34deSShayne Chen MCU_UNI_CMD_RA = 0x2f, 1219779d34deSShayne Chen MCU_UNI_CMD_MURU = 0x31, 1220779d34deSShayne Chen MCU_UNI_CMD_BF = 0x33, 1221779d34deSShayne Chen MCU_UNI_CMD_CHANNEL_SWITCH = 0x34, 1222779d34deSShayne Chen MCU_UNI_CMD_THERMAL = 0x35, 1223779d34deSShayne Chen MCU_UNI_CMD_VOW = 0x37, 1224779d34deSShayne Chen MCU_UNI_CMD_RRO = 0x57, 1225779d34deSShayne Chen MCU_UNI_CMD_OFFCH_SCAN_CTRL = 0x58, 1226672662f0SRyder Lee MCU_UNI_CMD_ASSERT_DUMP = 0x6f, 1227d0e274afSLorenzo Bianconi }; 1228d0e274afSLorenzo Bianconi 1229d0e274afSLorenzo Bianconi enum { 12307159eb82SLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 12317159eb82SLorenzo Bianconi MCU_CMD_FW_START_REQ = 0x02, 1232d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 12337159eb82SLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = 0x4, 12347159eb82SLorenzo Bianconi MCU_CMD_PATCH_START_REQ = 0x05, 12357159eb82SLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = 0x07, 12367159eb82SLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = 0x10, 12379d8d136cSLorenzo Bianconi MCU_CMD_WA_PARAM = 0xc4, 1238d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 12397159eb82SLorenzo Bianconi MCU_CMD_FW_SCATTER = 0xee, 12407159eb82SLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = 0xef, 1241d0e274afSLorenzo Bianconi }; 1242d0e274afSLorenzo Bianconi 1243d0e274afSLorenzo Bianconi /* offload mcu commands */ 1244d0e274afSLorenzo Bianconi enum { 1245680a2eadSLorenzo Bianconi MCU_CE_CMD_TEST_CTRL = 0x01, 1246680a2eadSLorenzo Bianconi MCU_CE_CMD_START_HW_SCAN = 0x03, 1247680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_PS_PROFILE = 0x05, 1248c222f77fSNeil Chen MCU_CE_CMD_SET_RX_FILTER = 0x0a, 1249680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f, 1250680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, 1251680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_ABORT = 0x17, 1252680a2eadSLorenzo Bianconi MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, 1253bf9727a2SSean Wang MCU_CE_CMD_SET_ROC = 0x1c, 125466ca1a7bSSean Wang MCU_CE_CMD_SET_EDCA_PARMS = 0x1d, 1255680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_P2P_OPPPS = 0x33, 125623bdc5d8SMing Yen Hsieh MCU_CE_CMD_SET_CLC = 0x5c, 1257680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, 1258680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, 1259680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_REQ = 0x62, 1260680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_NIC_CAPAB = 0x8a, 1261680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0, 1262680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_WRITE = 0xc0, 1263680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_READ = 0xc0, 1264680a2eadSLorenzo Bianconi MCU_CE_CMD_CHIP_CONFIG = 0xca, 1265680a2eadSLorenzo Bianconi MCU_CE_CMD_FWLOG_2_HOST = 0xc5, 1266680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_WTBL = 0xcd, 1267680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_TXPWR = 0xd0, 1268d0e274afSLorenzo Bianconi }; 1269d0e274afSLorenzo Bianconi 1270d0e274afSLorenzo Bianconi enum { 1271d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 1272d0e274afSLorenzo Bianconi PATCH_SEM_GET 1273d0e274afSLorenzo Bianconi }; 1274d0e274afSLorenzo Bianconi 1275d0e274afSLorenzo Bianconi enum { 1276d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 12779c402ac1SShayne Chen UNI_BSS_INFO_RA = 1, 1278d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 1279b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 1280d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 1281d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 12829c402ac1SShayne Chen UNI_BSS_INFO_BCN_CSA = 8, 12839c402ac1SShayne Chen UNI_BSS_INFO_BCN_BCC = 9, 12849c402ac1SShayne Chen UNI_BSS_INFO_BCN_MBSSID = 10, 12859c402ac1SShayne Chen UNI_BSS_INFO_RATE = 11, 1286d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 12879c402ac1SShayne Chen UNI_BSS_INFO_SEC = 16, 12889c402ac1SShayne Chen UNI_BSS_INFO_TXCMD = 18, 1289d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 129067aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 129167aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 12929c402ac1SShayne Chen UNI_BSS_INFO_OFFLOAD = 25, 12939c402ac1SShayne Chen UNI_BSS_INFO_MLD = 26, 1294d0e274afSLorenzo Bianconi }; 1295d0e274afSLorenzo Bianconi 129655d4c19cSLorenzo Bianconi enum { 129755d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 129855d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 129955d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 130055d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 130155d4c19cSLorenzo Bianconi }; 130255d4c19cSLorenzo Bianconi 1303f7d2958cSLorenzo Bianconi enum { 1304f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 1305f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 1306f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 1307f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 1308f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 1309f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 1310f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 1311f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 1312f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 1313f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 1314f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 1315f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 1316f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 1317f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 1318f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 1319f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 1320f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 1321f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 1322f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 1323f7d2958cSLorenzo Bianconi }; 1324f7d2958cSLorenzo Bianconi 1325193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 1326193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 1327193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 1328193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 1329193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 1330193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 1331193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 1332193e5f22SYN Chen 133355d4c19cSLorenzo Bianconi enum { 133455d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 133555d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 133655d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 133755d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 133855d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 133955d4c19cSLorenzo Bianconi }; 134055d4c19cSLorenzo Bianconi 134155d4c19cSLorenzo Bianconi enum { 134255d4c19cSLorenzo Bianconi WOW_USB = 1, 134355d4c19cSLorenzo Bianconi WOW_PCIE = 2, 134455d4c19cSLorenzo Bianconi WOW_GPIO = 3, 134555d4c19cSLorenzo Bianconi }; 134655d4c19cSLorenzo Bianconi 1347d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 1348d0e274afSLorenzo Bianconi __le16 tag; 1349d0e274afSLorenzo Bianconi __le16 len; 1350d0e274afSLorenzo Bianconi u8 active; 1351d0e274afSLorenzo Bianconi u8 omac_idx; 1352d0e274afSLorenzo Bianconi u8 hw_bss_idx; 1353d0e274afSLorenzo Bianconi u8 band_idx; 1354d0e274afSLorenzo Bianconi __le32 conn_type; 1355d0e274afSLorenzo Bianconi u8 conn_state; 1356d0e274afSLorenzo Bianconi u8 wmm_idx; 1357d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1358d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 1359d0e274afSLorenzo Bianconi __le16 bcn_interval; 1360d0e274afSLorenzo Bianconi u8 dtim_period; 1361d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 1362d0e274afSLorenzo Bianconi * bit(1): B 1363d0e274afSLorenzo Bianconi * bit(2): G 1364d0e274afSLorenzo Bianconi * bit(3): GN 1365d0e274afSLorenzo Bianconi * bit(4): AN 1366d0e274afSLorenzo Bianconi * bit(5): AC 13673cf3e01bSLorenzo Bianconi * bit(6): AX2 13683cf3e01bSLorenzo Bianconi * bit(7): AX5 13693cf3e01bSLorenzo Bianconi * bit(8): AX6 1370d0e274afSLorenzo Bianconi */ 1371d0e274afSLorenzo Bianconi __le16 sta_idx; 13723cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 13733cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 13743cf3e01bSLorenzo Bianconi u8 pad[1]; 1375d0e274afSLorenzo Bianconi } __packed; 1376d0e274afSLorenzo Bianconi 1377d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 1378d0e274afSLorenzo Bianconi __le16 tag; 1379d0e274afSLorenzo Bianconi __le16 len; 1380d0e274afSLorenzo Bianconi u8 qos; 1381d0e274afSLorenzo Bianconi u8 pad[3]; 1382d0e274afSLorenzo Bianconi } __packed; 1383d0e274afSLorenzo Bianconi 1384d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 1385d0e274afSLorenzo Bianconi u8 bss_idx; 1386d0e274afSLorenzo Bianconi u8 reason; 1387d0e274afSLorenzo Bianconi u8 pad[2]; 1388d0e274afSLorenzo Bianconi } __packed; 1389d0e274afSLorenzo Bianconi 1390d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 1391d0e274afSLorenzo Bianconi u8 bss_idx; 1392d0e274afSLorenzo Bianconi u8 is_absent; 1393d0e274afSLorenzo Bianconi u8 free_quota; 1394d0e274afSLorenzo Bianconi u8 pad; 1395d0e274afSLorenzo Bianconi } __packed; 1396d0e274afSLorenzo Bianconi 1397399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 1398399090efSLorenzo Bianconi __le32 ssid_len; 1399399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1400399090efSLorenzo Bianconi } __packed; 1401399090efSLorenzo Bianconi 1402399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 1403399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 1404399090efSLorenzo Bianconi * 2: 5.0GHz 1405399090efSLorenzo Bianconi * Others: Reserved 1406399090efSLorenzo Bianconi */ 1407399090efSLorenzo Bianconi u8 channel_num; 1408399090efSLorenzo Bianconi } __packed; 1409399090efSLorenzo Bianconi 1410399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 1411399090efSLorenzo Bianconi __le32 rssi_th; 1412399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1413399090efSLorenzo Bianconi u8 ssid_len; 1414399090efSLorenzo Bianconi u8 rsv[3]; 1415399090efSLorenzo Bianconi } __packed; 1416399090efSLorenzo Bianconi 1417399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 1418399090efSLorenzo Bianconi u8 seq_num; 1419399090efSLorenzo Bianconi u8 bss_idx; 1420399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 1421399090efSLorenzo Bianconi * 1: ACTIVE SCAN 1422399090efSLorenzo Bianconi */ 1423399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 1424399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 1425399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 1426399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 1427399090efSLorenzo Bianconi */ 1428399090efSLorenzo Bianconi u8 ssids_num; 1429399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 1430399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 1431399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 1432399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 1433399090efSLorenzo Bianconi */ 1434399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 1435399090efSLorenzo Bianconi * 1: Support fields after ies. 1436399090efSLorenzo Bianconi */ 1437399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 1438399090efSLorenzo Bianconi __le16 probe_delay_time; 1439399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 1440399090efSLorenzo Bianconi __le16 timeout_value; 1441399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 1442399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 1443399090efSLorenzo Bianconi * 2: Only 5GHz channels 1444399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 1445399090efSLorenzo Bianconi * 4: Specified channels 1446399090efSLorenzo Bianconi * Others: Reserved 1447399090efSLorenzo Bianconi */ 1448399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 1449399090efSLorenzo Bianconi /* valid when channels_num is set */ 1450399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 1451399090efSLorenzo Bianconi __le16 ies_len; 1452399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 1453399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 1454399090efSLorenzo Bianconi u8 ext_channels_num; 1455399090efSLorenzo Bianconi u8 ext_ssids_num; 1456399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 1457399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 1458399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 1459399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1460399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 1461399090efSLorenzo Bianconi u8 pad[63]; 1462399090efSLorenzo Bianconi u8 ssid_type_ext; 1463399090efSLorenzo Bianconi } __packed; 1464399090efSLorenzo Bianconi 1465399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 1466399090efSLorenzo Bianconi 1467399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 1468399090efSLorenzo Bianconi u8 seq_num; 1469399090efSLorenzo Bianconi u8 sparse_channel_num; 1470399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 1471399090efSLorenzo Bianconi u8 complete_channel_num; 1472399090efSLorenzo Bianconi u8 current_state; 1473399090efSLorenzo Bianconi u8 version; 1474399090efSLorenzo Bianconi u8 pad; 1475399090efSLorenzo Bianconi __le32 beacon_scan_num; 1476399090efSLorenzo Bianconi u8 pno_enabled; 1477399090efSLorenzo Bianconi u8 pad2[3]; 1478399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 1479399090efSLorenzo Bianconi u8 pad3[3]; 1480399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1481399090efSLorenzo Bianconi /* idle format for channel_idle_time 1482399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 1483399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 1484399090efSLorenzo Bianconi * 2: dwell time (16us) 1485399090efSLorenzo Bianconi */ 1486399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1487399090efSLorenzo Bianconi /* beacon and probe response count */ 1488399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1489399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1490399090efSLorenzo Bianconi __le32 beacon_2g_num; 1491399090efSLorenzo Bianconi __le32 beacon_5g_num; 1492399090efSLorenzo Bianconi } __packed; 1493399090efSLorenzo Bianconi 1494399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 1495399090efSLorenzo Bianconi u8 version; 1496399090efSLorenzo Bianconi u8 seq_num; 1497399090efSLorenzo Bianconi u8 stop_on_match; 1498399090efSLorenzo Bianconi u8 ssids_num; 1499399090efSLorenzo Bianconi u8 match_num; 1500399090efSLorenzo Bianconi u8 pad; 1501399090efSLorenzo Bianconi __le16 ie_len; 1502399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 1503399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 1504399090efSLorenzo Bianconi u8 channel_type; 1505399090efSLorenzo Bianconi u8 channels_num; 1506399090efSLorenzo Bianconi u8 intervals_num; 15077139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 1508399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 1509abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 15107139b5c0SSean Wang union { 15117139b5c0SSean Wang struct { 15127139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 1513399090efSLorenzo Bianconi u8 pad2[58]; 15147139b5c0SSean Wang } mt7663; 15157139b5c0SSean Wang struct { 15167139b5c0SSean Wang u8 bss_idx; 1517b94c0ed6SDeren Wu u8 pad1[3]; 1518b94c0ed6SDeren Wu __le32 delay; 1519b94c0ed6SDeren Wu u8 pad2[12]; 15209f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 15219f367c81SDeren Wu u8 pad3[38]; 15227139b5c0SSean Wang } mt7921; 15237139b5c0SSean Wang }; 1524399090efSLorenzo Bianconi } __packed; 1525399090efSLorenzo Bianconi 1526399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 1527399090efSLorenzo Bianconi u8 seq_num; 1528399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 1529399090efSLorenzo Bianconi __le16 pad; 1530399090efSLorenzo Bianconi } __packed; 1531399090efSLorenzo Bianconi 1532b4b880b9SYN Chen struct bss_info_uni_bss_color { 1533b4b880b9SYN Chen __le16 tag; 1534b4b880b9SYN Chen __le16 len; 1535b4b880b9SYN Chen u8 enable; 1536b4b880b9SYN Chen u8 bss_color; 1537b4b880b9SYN Chen u8 rsv[2]; 1538b4b880b9SYN Chen } __packed; 1539b4b880b9SYN Chen 1540d0e274afSLorenzo Bianconi struct bss_info_uni_he { 1541d0e274afSLorenzo Bianconi __le16 tag; 1542d0e274afSLorenzo Bianconi __le16 len; 1543d0e274afSLorenzo Bianconi __le16 he_rts_thres; 1544d0e274afSLorenzo Bianconi u8 he_pe_duration; 1545d0e274afSLorenzo Bianconi u8 su_disable; 1546d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 1547d0e274afSLorenzo Bianconi u8 rsv[2]; 1548d0e274afSLorenzo Bianconi } __packed; 1549d0e274afSLorenzo Bianconi 155055d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 155155d4c19cSLorenzo Bianconi __le16 tag; 155255d4c19cSLorenzo Bianconi __le16 len; 155355d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 155455d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 155555d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 155655d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 155755d4c19cSLorenzo Bianconi * 1: rekey offload disable 155855d4c19cSLorenzo Bianconi * 2: rekey update 155955d4c19cSLorenzo Bianconi */ 156055d4c19cSLorenzo Bianconi u8 keyid; 1561d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 1562d741abeaSLeon Yen u8 pad[1]; 156355d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 156455d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 156555d4c19cSLorenzo Bianconi __le32 group_cipher; 156655d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 156755d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 1568d741abeaSLeon Yen u8 reserverd[4]; 156955d4c19cSLorenzo Bianconi } __packed; 157055d4c19cSLorenzo Bianconi 157155d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 157255d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 157355d4c19cSLorenzo Bianconi 157455d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 157555d4c19cSLorenzo Bianconi __le16 tag; 157655d4c19cSLorenzo Bianconi __le16 len; 157755d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 157855d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 157955d4c19cSLorenzo Bianconi * 1: enable 158055d4c19cSLorenzo Bianconi */ 158155d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 158255d4c19cSLorenzo Bianconi u8 pad; 158355d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 158455d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 158555d4c19cSLorenzo Bianconi u8 rsv[4]; 158655d4c19cSLorenzo Bianconi } __packed; 158755d4c19cSLorenzo Bianconi 158855d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 158955d4c19cSLorenzo Bianconi __le16 tag; 159055d4c19cSLorenzo Bianconi __le16 len; 159155d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 159255d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 159355d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 159455d4c19cSLorenzo Bianconi */ 159555d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 159655d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 159755d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 159855d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 159955d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 160055d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 160155d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 160255d4c19cSLorenzo Bianconi */ 160355d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 160455d4c19cSLorenzo Bianconi * 0x1: HIF_USB 160555d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 160655d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 160755d4c19cSLorenzo Bianconi */ 160855d4c19cSLorenzo Bianconi u8 pad; 160955d4c19cSLorenzo Bianconi u8 rsv[4]; 161055d4c19cSLorenzo Bianconi } __packed; 161155d4c19cSLorenzo Bianconi 161255d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 161355d4c19cSLorenzo Bianconi __le16 tag; 161455d4c19cSLorenzo Bianconi __le16 len; 161555d4c19cSLorenzo Bianconi u8 gpio_pin; 161655d4c19cSLorenzo Bianconi u8 trigger_lvl; 161755d4c19cSLorenzo Bianconi u8 pad[2]; 161855d4c19cSLorenzo Bianconi __le32 gpio_interval; 161955d4c19cSLorenzo Bianconi u8 rsv[4]; 162055d4c19cSLorenzo Bianconi } __packed; 162155d4c19cSLorenzo Bianconi 162255d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 162355d4c19cSLorenzo Bianconi __le16 tag; 162455d4c19cSLorenzo Bianconi __le16 len; 162555d4c19cSLorenzo Bianconi u8 mode; 162655d4c19cSLorenzo Bianconi u8 ips_num; 162755d4c19cSLorenzo Bianconi u8 option; 162855d4c19cSLorenzo Bianconi u8 pad[1]; 162955d4c19cSLorenzo Bianconi } __packed; 163055d4c19cSLorenzo Bianconi 163155d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 163255d4c19cSLorenzo Bianconi __le16 tag; 163355d4c19cSLorenzo Bianconi __le16 len; 163455d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 163555d4c19cSLorenzo Bianconi * 1: suspend mode enabled 163655d4c19cSLorenzo Bianconi */ 163755d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 163855d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 163955d4c19cSLorenzo Bianconi * 1: update by wow dtim 164055d4c19cSLorenzo Bianconi */ 164155d4c19cSLorenzo Bianconi u8 pad[5]; 164255d4c19cSLorenzo Bianconi } __packed; 164355d4c19cSLorenzo Bianconi 1644f5056657SSean Wang enum mt76_sta_info_state { 1645f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 1646f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 1647f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 1648f5056657SSean Wang }; 1649f5056657SSean Wang 16505802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 16515802106fSLorenzo Bianconi struct ieee80211_sta *sta; 16525802106fSLorenzo Bianconi struct mt76_wcid *wcid; 16535802106fSLorenzo Bianconi 16545802106fSLorenzo Bianconi struct ieee80211_vif *vif; 16555802106fSLorenzo Bianconi 165682453b1cSLorenzo Bianconi bool offload_fw; 16575802106fSLorenzo Bianconi bool enable; 1658f5056657SSean Wang bool newly; 16595802106fSLorenzo Bianconi int cmd; 16605802106fSLorenzo Bianconi u8 rcpi; 1661f5056657SSean Wang u8 state; 16625802106fSLorenzo Bianconi }; 16635802106fSLorenzo Bianconi 166418369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 166518369a4fSLorenzo Bianconi 166618369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 166718369a4fSLorenzo Bianconi u8 channel; 166818369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 166918369a4fSLorenzo Bianconi } __packed; 167018369a4fSLorenzo Bianconi 167118369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 167218369a4fSLorenzo Bianconi /* DW0 - common info*/ 167318369a4fSLorenzo Bianconi u8 ver; 167418369a4fSLorenzo Bianconi u8 pad0; 167518369a4fSLorenzo Bianconi __le16 len; 167618369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 167718369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 16789b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 167918369a4fSLorenzo Bianconi u8 last_msg; 168018369a4fSLorenzo Bianconi u8 pad1; 168118369a4fSLorenzo Bianconi /* DW3 */ 168218369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 168318369a4fSLorenzo Bianconi u8 pad2[32]; 168418369a4fSLorenzo Bianconi } __packed; 168518369a4fSLorenzo Bianconi 1686c0b21255SSean Wang struct mt76_connac_config { 1687c0b21255SSean Wang __le16 id; 1688c0b21255SSean Wang u8 type; 1689c0b21255SSean Wang u8 resp_type; 1690c0b21255SSean Wang __le16 data_size; 1691c0b21255SSean Wang __le16 resv; 1692c0b21255SSean Wang u8 data[320]; 1693c0b21255SSean Wang } __packed; 1694c0b21255SSean Wang 169561d1f545SLorenzo Bianconi struct mt76_connac_mcu_uni_event { 169661d1f545SLorenzo Bianconi u8 cid; 169761d1f545SLorenzo Bianconi u8 pad[3]; 169861d1f545SLorenzo Bianconi __le32 status; /* 0: success, others: fail */ 169961d1f545SLorenzo Bianconi } __packed; 170061d1f545SLorenzo Bianconi 170161d1f545SLorenzo Bianconi struct mt76_connac_mcu_reg_event { 170261d1f545SLorenzo Bianconi __le32 reg; 170361d1f545SLorenzo Bianconi __le32 val; 170461d1f545SLorenzo Bianconi } __packed; 170561d1f545SLorenzo Bianconi 170609c874a1SLorenzo Bianconi static inline enum mcu_cipher_type 170709c874a1SLorenzo Bianconi mt76_connac_mcu_get_cipher(int cipher) 170809c874a1SLorenzo Bianconi { 170909c874a1SLorenzo Bianconi switch (cipher) { 171009c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP40: 171109c874a1SLorenzo Bianconi return MCU_CIPHER_WEP40; 171209c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP104: 171309c874a1SLorenzo Bianconi return MCU_CIPHER_WEP104; 171409c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_TKIP: 171509c874a1SLorenzo Bianconi return MCU_CIPHER_TKIP; 171609c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_AES_CMAC: 171709c874a1SLorenzo Bianconi return MCU_CIPHER_BIP_CMAC_128; 171809c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP: 171909c874a1SLorenzo Bianconi return MCU_CIPHER_AES_CCMP; 172009c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP_256: 172109c874a1SLorenzo Bianconi return MCU_CIPHER_CCMP_256; 172209c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP: 172309c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP; 172409c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP_256: 172509c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP_256; 172609c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_SMS4: 172709c874a1SLorenzo Bianconi return MCU_CIPHER_WAPI; 172809c874a1SLorenzo Bianconi default: 172909c874a1SLorenzo Bianconi return MCU_CIPHER_NONE; 173009c874a1SLorenzo Bianconi } 173109c874a1SLorenzo Bianconi } 173209c874a1SLorenzo Bianconi 17339e90c351SLorenzo Bianconi static inline u32 17349e90c351SLorenzo Bianconi mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa) 17359e90c351SLorenzo Bianconi { 17369e90c351SLorenzo Bianconi u32 ret = 0; 17379e90c351SLorenzo Bianconi 17389e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_SET_ENCRYPT ? 17399e90c351SLorenzo Bianconi DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0; 17409e90c351SLorenzo Bianconi if (is_mt7921(dev)) 17419e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_ENCRY_MODE ? 17429e90c351SLorenzo Bianconi DL_CONFIG_ENCRY_MODE_SEL : 0; 17439e90c351SLorenzo Bianconi ret |= FIELD_PREP(DL_MODE_KEY_IDX, 17449e90c351SLorenzo Bianconi FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 17459e90c351SLorenzo Bianconi ret |= DL_MODE_NEED_RSP; 17469e90c351SLorenzo Bianconi ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; 17479e90c351SLorenzo Bianconi 17489e90c351SLorenzo Bianconi return ret; 17499e90c351SLorenzo Bianconi } 17509e90c351SLorenzo Bianconi 175167aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 17526b733f7cSShayne Chen #define to_wcid_hi(id) FIELD_GET(GENMASK(10, 8), (u16)id) 175367aa2743SLorenzo Bianconi 175467aa2743SLorenzo Bianconi static inline void 175567aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 175667aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 175767aa2743SLorenzo Bianconi { 175867aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 175967aa2743SLorenzo Bianconi 17602fec2ea6SLorenzo Bianconi if (!is_connac_v1(dev)) { 176167aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 176267aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 176367aa2743SLorenzo Bianconi } else { 176467aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 176567aa2743SLorenzo Bianconi } 176667aa2743SLorenzo Bianconi } 176767aa2743SLorenzo Bianconi 1768d0e274afSLorenzo Bianconi struct sk_buff * 1769e2c93b68SLorenzo Bianconi __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1770e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid, int len); 1771e2c93b68SLorenzo Bianconi static inline struct sk_buff * 1772d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1773e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid) 1774e2c93b68SLorenzo Bianconi { 1775e2c93b68SLorenzo Bianconi return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 1776e2c93b68SLorenzo Bianconi MT76_CONNAC_STA_UPDATE_MAX_SIZE); 1777e2c93b68SLorenzo Bianconi } 1778e2c93b68SLorenzo Bianconi 1779d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1780d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1781d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1782d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1783d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1784d0e274afSLorenzo Bianconi void *sta_wtbl); 1785d0e274afSLorenzo Bianconi static inline struct tlv * 1786d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1787d0e274afSLorenzo Bianconi { 1788d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1789d0e274afSLorenzo Bianconi } 1790d0e274afSLorenzo Bianconi 1791d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1792d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 17931b83d17cSSean Wang void mt76_connac_mcu_sta_basic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1794d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1795f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1796f5056657SSean Wang bool newly); 1797d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1798d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1799d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1800d0e274afSLorenzo Bianconi void *wtbl_tlv); 1801d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1802868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 180366978204SFelix Fietkau struct mt76_wcid *wcid, 1804d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 180524299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 180624299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 180724299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 18085a521c0fSLorenzo Bianconi int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 18095a521c0fSLorenzo Bianconi struct ieee80211_vif *vif, 18105a521c0fSLorenzo Bianconi struct ieee80211_sta *sta); 1811d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1812d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 18135802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1814f5056657SSean Wang u8 rcpi, u8 state); 1815d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1816d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1817499da720SMeiChia Chiu void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc); 1818d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1819d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1820d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1821d0e274afSLorenzo Bianconi void *wtbl_tlv); 1822d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1823d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1824d0e274afSLorenzo Bianconi bool enable, bool tx); 1825d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1826d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1827d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1828d0e274afSLorenzo Bianconi bool enable); 1829d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1830d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1831b5322e44SLorenzo Bianconi int cmd, bool enable, bool tx); 1832c1eab241SSean Wang int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy, 1833c1eab241SSean Wang struct mt76_vif *vif, 1834c1eab241SSean Wang struct ieee80211_chanctx_conf *ctx); 1835d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1836d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1837d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1838a0ab9c31SSean Wang bool enable, 1839a0ab9c31SSean Wang struct ieee80211_chanctx_conf *ctx); 1840f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 18415802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1842d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1843d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1844d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1845d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1846d0e274afSLorenzo Bianconi bool hdr_trans); 1847d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1848d0e274afSLorenzo Bianconi u32 mode); 1849d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1850d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1851d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1852f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1853d0e274afSLorenzo Bianconi 1854399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1855399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1856399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1857399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1858399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1859399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1860399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1861399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1862399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1863399090efSLorenzo Bianconi bool enable); 1864f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1865f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1866f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 186755d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 186855d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 186955d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 187055d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 187155d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 187255d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1873f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1874f5056657SSean Wang enum ieee80211_sta_state old_state, 1875f5056657SSean Wang enum ieee80211_sta_state new_state); 18760da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1877c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 18780da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 18790da3c795SSean Wang struct mt76_connac_coredump *coredump); 188018369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 18811f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 18821f832887SLorenzo Bianconi struct ieee80211_vif *vif); 188387f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 188487f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1885e6d557a7SLorenzo Bianconi 1886e6d557a7SLorenzo Bianconi const struct ieee80211_sta_he_cap * 1887e6d557a7SLorenzo Bianconi mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); 1888019039afSShayne Chen const struct ieee80211_sta_eht_cap * 1889019039afSShayne Chen mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); 1890e6d557a7SLorenzo Bianconi u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1891e6d557a7SLorenzo Bianconi enum nl80211_band band, struct ieee80211_sta *sta); 1892019039afSShayne Chen u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif, 1893019039afSShayne Chen enum nl80211_band band); 18946683d988SLorenzo Bianconi 18956683d988SLorenzo Bianconi int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 18966683d988SLorenzo Bianconi struct mt76_connac_sta_key_conf *sta_key_conf, 18976683d988SLorenzo Bianconi struct ieee80211_key_conf *key, int mcu_cmd, 18986683d988SLorenzo Bianconi struct mt76_wcid *wcid, enum set_key_cmd cmd); 189954735e11SLorenzo Bianconi 190064f4e823SLorenzo Bianconi void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif); 190154735e11SLorenzo Bianconi void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 190254735e11SLorenzo Bianconi struct ieee80211_vif *vif); 190349126ac1SLorenzo Bianconi int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 190449126ac1SLorenzo Bianconi struct ieee80211_vif *vif, 190549126ac1SLorenzo Bianconi struct ieee80211_sta *sta, 190695b5946eSChad Monroe struct mt76_phy *phy, u16 wlan_idx, 190749126ac1SLorenzo Bianconi bool enable); 1908836c0c98SLorenzo Bianconi void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 1909836c0c98SLorenzo Bianconi struct ieee80211_sta *sta); 19102557e568SLorenzo Bianconi void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 19112557e568SLorenzo Bianconi struct ieee80211_sta *sta, 19122557e568SLorenzo Bianconi void *sta_wtbl, void *wtbl_tlv); 191348d743d1SLorenzo Bianconi int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); 1914ae90bdd6SLorenzo Bianconi int mt76_connac_mcu_restart(struct mt76_dev *dev); 191597cef84dSLorenzo Bianconi int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 191697cef84dSLorenzo Bianconi u8 rx_sel, u8 val); 1917d1369e51SSujuan Chen int mt76_connac_mcu_sta_wed_update(struct mt76_dev *dev, struct sk_buff *skb); 1918b9ec2710SLorenzo Bianconi int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 1919b9ec2710SLorenzo Bianconi const char *fw_wa); 192028fec923SLorenzo Bianconi int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name); 1921d2f5c8edSLorenzo Bianconi int mt76_connac2_mcu_fill_message(struct mt76_dev *mdev, struct sk_buff *skb, 1922d2f5c8edSLorenzo Bianconi int cmd, int *wait_seq); 1923d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1924