1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 99e90c351SLorenzo Bianconi #define FW_FEATURE_SET_ENCRYPT BIT(0) 109e90c351SLorenzo Bianconi #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 119e90c351SLorenzo Bianconi #define FW_FEATURE_ENCRY_MODE BIT(4) 129e90c351SLorenzo Bianconi #define FW_FEATURE_OVERRIDE_ADDR BIT(5) 1323bdc5d8SMing Yen Hsieh #define FW_FEATURE_NON_DL BIT(6) 149e90c351SLorenzo Bianconi 159e90c351SLorenzo Bianconi #define DL_MODE_ENCRYPT BIT(0) 169e90c351SLorenzo Bianconi #define DL_MODE_KEY_IDX GENMASK(2, 1) 179e90c351SLorenzo Bianconi #define DL_MODE_RESET_SEC_IV BIT(3) 189e90c351SLorenzo Bianconi #define DL_MODE_WORKING_PDA_CR4 BIT(4) 199e90c351SLorenzo Bianconi #define DL_MODE_VALID_RAM_ENTRY BIT(5) 209e90c351SLorenzo Bianconi #define DL_CONFIG_ENCRY_MODE_SEL BIT(6) 219e90c351SLorenzo Bianconi #define DL_MODE_NEED_RSP BIT(31) 229e90c351SLorenzo Bianconi 239e90c351SLorenzo Bianconi #define FW_START_OVERRIDE BIT(0) 249e90c351SLorenzo Bianconi #define FW_START_WORKING_PDA_CR4 BIT(2) 259e90c351SLorenzo Bianconi 269e90c351SLorenzo Bianconi #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) 279e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) 289e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_INFO 0x2 299e90c351SLorenzo Bianconi 3028fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24) 3128fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_PLAIN 0x00 3228fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_AES 0x01 3328fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_SCRAMBLE 0x02 3428fec923SLorenzo Bianconi #define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0) 3528fec923SLorenzo Bianconi #define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0) 3628fec923SLorenzo Bianconi 3723bdc5d8SMing Yen Hsieh enum { 3823bdc5d8SMing Yen Hsieh FW_TYPE_DEFAULT = 0, 3923bdc5d8SMing Yen Hsieh FW_TYPE_CLC = 2, 4023bdc5d8SMing Yen Hsieh FW_TYPE_MAX_NUM = 255 4123bdc5d8SMing Yen Hsieh }; 4223bdc5d8SMing Yen Hsieh 43d2f5c8edSLorenzo Bianconi #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10)) 44d2f5c8edSLorenzo Bianconi #define MCU_PKT_ID 0xa0 45d2f5c8edSLorenzo Bianconi 46fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_txd { 47fc6ee71aSLorenzo Bianconi __le32 txd[8]; 48fc6ee71aSLorenzo Bianconi 49fc6ee71aSLorenzo Bianconi __le16 len; 50fc6ee71aSLorenzo Bianconi __le16 pq_id; 51fc6ee71aSLorenzo Bianconi 52fc6ee71aSLorenzo Bianconi u8 cid; 53fc6ee71aSLorenzo Bianconi u8 pkt_type; 54fc6ee71aSLorenzo Bianconi u8 set_query; /* FW don't care */ 55fc6ee71aSLorenzo Bianconi u8 seq; 56fc6ee71aSLorenzo Bianconi 57fc6ee71aSLorenzo Bianconi u8 uc_d2b0_rev; 58fc6ee71aSLorenzo Bianconi u8 ext_cid; 59fc6ee71aSLorenzo Bianconi u8 s2d_index; 60fc6ee71aSLorenzo Bianconi u8 ext_cid_ack; 61fc6ee71aSLorenzo Bianconi 62fc6ee71aSLorenzo Bianconi u32 rsv[5]; 63fc6ee71aSLorenzo Bianconi } __packed __aligned(4); 64fc6ee71aSLorenzo Bianconi 65fc6ee71aSLorenzo Bianconi /** 664c07129bSShayne Chen * struct mt76_connac2_mcu_uni_txd - mcu command descriptor for connac2 and connac3 67fc6ee71aSLorenzo Bianconi * @txd: hardware descriptor 68fc6ee71aSLorenzo Bianconi * @len: total length not including txd 69fc6ee71aSLorenzo Bianconi * @cid: command identifier 70fc6ee71aSLorenzo Bianconi * @pkt_type: must be 0xa0 (cmd packet by long format) 71fc6ee71aSLorenzo Bianconi * @frag_n: fragment number 72fc6ee71aSLorenzo Bianconi * @seq: sequence number 73fc6ee71aSLorenzo Bianconi * @checksum: 0 mean there is no checksum 74fc6ee71aSLorenzo Bianconi * @s2d_index: index for command source and destination 75fc6ee71aSLorenzo Bianconi * Definition | value | note 76fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM 77fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM 78fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA 79fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM 80fc6ee71aSLorenzo Bianconi * 81fc6ee71aSLorenzo Bianconi * @option: command option 82fc6ee71aSLorenzo Bianconi * BIT[0]: UNI_CMD_OPT_BIT_ACK 83fc6ee71aSLorenzo Bianconi * set to 1 to request a fw reply 84fc6ee71aSLorenzo Bianconi * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY 85fc6ee71aSLorenzo Bianconi * is set, mcu firmware will send response event EID = 0x01 86fc6ee71aSLorenzo Bianconi * (UNI_EVENT_ID_CMD_RESULT) to the host. 87fc6ee71aSLorenzo Bianconi * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD 88fc6ee71aSLorenzo Bianconi * 0: original command 89fc6ee71aSLorenzo Bianconi * 1: unified command 90fc6ee71aSLorenzo Bianconi * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY 91fc6ee71aSLorenzo Bianconi * 0: QUERY command 92fc6ee71aSLorenzo Bianconi * 1: SET command 93fc6ee71aSLorenzo Bianconi */ 94fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_uni_txd { 95fc6ee71aSLorenzo Bianconi __le32 txd[8]; 96fc6ee71aSLorenzo Bianconi 97fc6ee71aSLorenzo Bianconi /* DW1 */ 98fc6ee71aSLorenzo Bianconi __le16 len; 99fc6ee71aSLorenzo Bianconi __le16 cid; 100fc6ee71aSLorenzo Bianconi 101fc6ee71aSLorenzo Bianconi /* DW2 */ 102fc6ee71aSLorenzo Bianconi u8 rsv; 103fc6ee71aSLorenzo Bianconi u8 pkt_type; 104fc6ee71aSLorenzo Bianconi u8 frag_n; 105fc6ee71aSLorenzo Bianconi u8 seq; 106fc6ee71aSLorenzo Bianconi 107fc6ee71aSLorenzo Bianconi /* DW3 */ 108fc6ee71aSLorenzo Bianconi __le16 checksum; 109fc6ee71aSLorenzo Bianconi u8 s2d_index; 110fc6ee71aSLorenzo Bianconi u8 option; 111fc6ee71aSLorenzo Bianconi 112fc6ee71aSLorenzo Bianconi /* DW4 */ 113fc6ee71aSLorenzo Bianconi u8 rsv1[4]; 114fc6ee71aSLorenzo Bianconi } __packed __aligned(4); 115fc6ee71aSLorenzo Bianconi 116fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_rxd { 117fc6ee71aSLorenzo Bianconi __le32 rxd[6]; 118fc6ee71aSLorenzo Bianconi 119fc6ee71aSLorenzo Bianconi __le16 len; 120fc6ee71aSLorenzo Bianconi __le16 pkt_type_id; 121fc6ee71aSLorenzo Bianconi 122fc6ee71aSLorenzo Bianconi u8 eid; 123fc6ee71aSLorenzo Bianconi u8 seq; 1245b55b6daSQuan Zhou u8 option; 1255b55b6daSQuan Zhou u8 rsv; 126fc6ee71aSLorenzo Bianconi u8 ext_eid; 127fc6ee71aSLorenzo Bianconi u8 rsv1[2]; 128fc6ee71aSLorenzo Bianconi u8 s2d_index; 1295b55b6daSQuan Zhou 1305b55b6daSQuan Zhou u8 tlv[0]; 131fc6ee71aSLorenzo Bianconi }; 132fc6ee71aSLorenzo Bianconi 1333d8c636cSLorenzo Bianconi struct mt76_connac2_patch_hdr { 1343d8c636cSLorenzo Bianconi char build_date[16]; 1353d8c636cSLorenzo Bianconi char platform[4]; 1363d8c636cSLorenzo Bianconi __be32 hw_sw_ver; 1373d8c636cSLorenzo Bianconi __be32 patch_ver; 1383d8c636cSLorenzo Bianconi __be16 checksum; 1393d8c636cSLorenzo Bianconi u16 rsv; 1403d8c636cSLorenzo Bianconi struct { 1413d8c636cSLorenzo Bianconi __be32 patch_ver; 1423d8c636cSLorenzo Bianconi __be32 subsys; 1433d8c636cSLorenzo Bianconi __be32 feature; 1443d8c636cSLorenzo Bianconi __be32 n_region; 1453d8c636cSLorenzo Bianconi __be32 crc; 1463d8c636cSLorenzo Bianconi u32 rsv[11]; 1473d8c636cSLorenzo Bianconi } desc; 1483d8c636cSLorenzo Bianconi } __packed; 1493d8c636cSLorenzo Bianconi 1503d8c636cSLorenzo Bianconi struct mt76_connac2_patch_sec { 1513d8c636cSLorenzo Bianconi __be32 type; 1523d8c636cSLorenzo Bianconi __be32 offs; 1533d8c636cSLorenzo Bianconi __be32 size; 1543d8c636cSLorenzo Bianconi union { 1553d8c636cSLorenzo Bianconi __be32 spec[13]; 1563d8c636cSLorenzo Bianconi struct { 1573d8c636cSLorenzo Bianconi __be32 addr; 1583d8c636cSLorenzo Bianconi __be32 len; 1593d8c636cSLorenzo Bianconi __be32 sec_key_idx; 1603d8c636cSLorenzo Bianconi __be32 align_len; 1613d8c636cSLorenzo Bianconi u32 rsv[9]; 1623d8c636cSLorenzo Bianconi } info; 1633d8c636cSLorenzo Bianconi }; 1643d8c636cSLorenzo Bianconi } __packed; 1653d8c636cSLorenzo Bianconi 1663d8c636cSLorenzo Bianconi struct mt76_connac2_fw_trailer { 1673d8c636cSLorenzo Bianconi u8 chip_id; 1683d8c636cSLorenzo Bianconi u8 eco_code; 1693d8c636cSLorenzo Bianconi u8 n_region; 1703d8c636cSLorenzo Bianconi u8 format_ver; 1713d8c636cSLorenzo Bianconi u8 format_flag; 1723d8c636cSLorenzo Bianconi u8 rsv[2]; 1733d8c636cSLorenzo Bianconi char fw_ver[10]; 1743d8c636cSLorenzo Bianconi char build_date[15]; 1753d8c636cSLorenzo Bianconi __le32 crc; 1763d8c636cSLorenzo Bianconi } __packed; 1773d8c636cSLorenzo Bianconi 1783d8c636cSLorenzo Bianconi struct mt76_connac2_fw_region { 1793d8c636cSLorenzo Bianconi __le32 decomp_crc; 1803d8c636cSLorenzo Bianconi __le32 decomp_len; 1813d8c636cSLorenzo Bianconi __le32 decomp_blk_sz; 1823d8c636cSLorenzo Bianconi u8 rsv[4]; 1833d8c636cSLorenzo Bianconi __le32 addr; 1843d8c636cSLorenzo Bianconi __le32 len; 1853d8c636cSLorenzo Bianconi u8 feature_set; 18623bdc5d8SMing Yen Hsieh u8 type; 18723bdc5d8SMing Yen Hsieh u8 rsv1[14]; 1883d8c636cSLorenzo Bianconi } __packed; 1893d8c636cSLorenzo Bianconi 190d0e274afSLorenzo Bianconi struct tlv { 191d0e274afSLorenzo Bianconi __le16 tag; 192d0e274afSLorenzo Bianconi __le16 len; 193d0e274afSLorenzo Bianconi } __packed; 194d0e274afSLorenzo Bianconi 1955562d5f6SLorenzo Bianconi struct bss_info_omac { 1965562d5f6SLorenzo Bianconi __le16 tag; 1975562d5f6SLorenzo Bianconi __le16 len; 1985562d5f6SLorenzo Bianconi u8 hw_bss_idx; 1995562d5f6SLorenzo Bianconi u8 omac_idx; 2005562d5f6SLorenzo Bianconi u8 band_idx; 2015562d5f6SLorenzo Bianconi u8 rsv0; 2025562d5f6SLorenzo Bianconi __le32 conn_type; 2035562d5f6SLorenzo Bianconi u32 rsv1; 2045562d5f6SLorenzo Bianconi } __packed; 2055562d5f6SLorenzo Bianconi 2065562d5f6SLorenzo Bianconi struct bss_info_basic { 2075562d5f6SLorenzo Bianconi __le16 tag; 2085562d5f6SLorenzo Bianconi __le16 len; 2095562d5f6SLorenzo Bianconi __le32 network_type; 2105562d5f6SLorenzo Bianconi u8 active; 2115562d5f6SLorenzo Bianconi u8 rsv0; 2125562d5f6SLorenzo Bianconi __le16 bcn_interval; 2135562d5f6SLorenzo Bianconi u8 bssid[ETH_ALEN]; 2145562d5f6SLorenzo Bianconi u8 wmm_idx; 2155562d5f6SLorenzo Bianconi u8 dtim_period; 2165562d5f6SLorenzo Bianconi u8 bmc_wcid_lo; 2175562d5f6SLorenzo Bianconi u8 cipher; 2185562d5f6SLorenzo Bianconi u8 phy_mode; 2195562d5f6SLorenzo Bianconi u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */ 2205562d5f6SLorenzo Bianconi u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */ 2215562d5f6SLorenzo Bianconi u8 bmc_wcid_hi; /* high Byte and version */ 2225562d5f6SLorenzo Bianconi u8 rsv[2]; 2235562d5f6SLorenzo Bianconi } __packed; 2245562d5f6SLorenzo Bianconi 2255562d5f6SLorenzo Bianconi struct bss_info_rf_ch { 2265562d5f6SLorenzo Bianconi __le16 tag; 2275562d5f6SLorenzo Bianconi __le16 len; 2285562d5f6SLorenzo Bianconi u8 pri_ch; 2295562d5f6SLorenzo Bianconi u8 center_ch0; 2305562d5f6SLorenzo Bianconi u8 center_ch1; 2315562d5f6SLorenzo Bianconi u8 bw; 2325562d5f6SLorenzo Bianconi u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */ 2335562d5f6SLorenzo Bianconi u8 he_all_disable; /* 1: disallow all HETB, 0: allow */ 2345562d5f6SLorenzo Bianconi u8 rsv[2]; 2355562d5f6SLorenzo Bianconi } __packed; 2365562d5f6SLorenzo Bianconi 2375562d5f6SLorenzo Bianconi struct bss_info_ext_bss { 2385562d5f6SLorenzo Bianconi __le16 tag; 2395562d5f6SLorenzo Bianconi __le16 len; 2405562d5f6SLorenzo Bianconi __le32 mbss_tsf_offset; /* in unit of us */ 2415562d5f6SLorenzo Bianconi u8 rsv[8]; 2425562d5f6SLorenzo Bianconi } __packed; 2435562d5f6SLorenzo Bianconi 2445562d5f6SLorenzo Bianconi enum { 2455562d5f6SLorenzo Bianconi BSS_INFO_OMAC, 2465562d5f6SLorenzo Bianconi BSS_INFO_BASIC, 2475562d5f6SLorenzo Bianconi BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 2485562d5f6SLorenzo Bianconi BSS_INFO_PM, /* sta only */ 2495562d5f6SLorenzo Bianconi BSS_INFO_UAPSD, /* sta only */ 2505562d5f6SLorenzo Bianconi BSS_INFO_ROAM_DETECT, /* obsoleted */ 2515562d5f6SLorenzo Bianconi BSS_INFO_LQ_RM, /* obsoleted */ 2525562d5f6SLorenzo Bianconi BSS_INFO_EXT_BSS, 2535562d5f6SLorenzo Bianconi BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */ 2545562d5f6SLorenzo Bianconi BSS_INFO_SYNC_MODE, /* obsoleted */ 2555562d5f6SLorenzo Bianconi BSS_INFO_RA, 2565562d5f6SLorenzo Bianconi BSS_INFO_HW_AMSDU, 2575562d5f6SLorenzo Bianconi BSS_INFO_BSS_COLOR, 2585562d5f6SLorenzo Bianconi BSS_INFO_HE_BASIC, 2595562d5f6SLorenzo Bianconi BSS_INFO_PROTECT_INFO, 2605562d5f6SLorenzo Bianconi BSS_INFO_OFFLOAD, 2615562d5f6SLorenzo Bianconi BSS_INFO_11V_MBSSID, 2625562d5f6SLorenzo Bianconi BSS_INFO_MAX_NUM 2635562d5f6SLorenzo Bianconi }; 2645562d5f6SLorenzo Bianconi 265d0e274afSLorenzo Bianconi /* sta_rec */ 266d0e274afSLorenzo Bianconi 267d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 268d0e274afSLorenzo Bianconi u8 rsv[2]; 269d0e274afSLorenzo Bianconi __le16 tlv_num; 270d0e274afSLorenzo Bianconi } __packed; 271d0e274afSLorenzo Bianconi 272d0e274afSLorenzo Bianconi struct sta_req_hdr { 273d0e274afSLorenzo Bianconi u8 bss_idx; 274d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 275d0e274afSLorenzo Bianconi __le16 tlv_num; 276d0e274afSLorenzo Bianconi u8 is_tlv_append; 277d0e274afSLorenzo Bianconi u8 muar_idx; 278d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 279d0e274afSLorenzo Bianconi u8 rsv; 280d0e274afSLorenzo Bianconi } __packed; 281d0e274afSLorenzo Bianconi 282d0e274afSLorenzo Bianconi struct sta_rec_basic { 283d0e274afSLorenzo Bianconi __le16 tag; 284d0e274afSLorenzo Bianconi __le16 len; 285d0e274afSLorenzo Bianconi __le32 conn_type; 286d0e274afSLorenzo Bianconi u8 conn_state; 287d0e274afSLorenzo Bianconi u8 qos; 288d0e274afSLorenzo Bianconi __le16 aid; 289d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 290d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 291d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 292d0e274afSLorenzo Bianconi __le16 extra_info; 293d0e274afSLorenzo Bianconi } __packed; 294d0e274afSLorenzo Bianconi 295d0e274afSLorenzo Bianconi struct sta_rec_ht { 296d0e274afSLorenzo Bianconi __le16 tag; 297d0e274afSLorenzo Bianconi __le16 len; 298d0e274afSLorenzo Bianconi __le16 ht_cap; 299d0e274afSLorenzo Bianconi u16 rsv; 300d0e274afSLorenzo Bianconi } __packed; 301d0e274afSLorenzo Bianconi 302d0e274afSLorenzo Bianconi struct sta_rec_vht { 303d0e274afSLorenzo Bianconi __le16 tag; 304d0e274afSLorenzo Bianconi __le16 len; 305d0e274afSLorenzo Bianconi __le32 vht_cap; 306d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 307d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 3085562d5f6SLorenzo Bianconi /* mt7915 - mt7921 */ 309d0e274afSLorenzo Bianconi u8 rts_bw_sig; 310d0e274afSLorenzo Bianconi u8 rsv[3]; 311d0e274afSLorenzo Bianconi } __packed; 312d0e274afSLorenzo Bianconi 313d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 314d0e274afSLorenzo Bianconi __le16 tag; 315d0e274afSLorenzo Bianconi __le16 len; 316d0e274afSLorenzo Bianconi u8 dac_map; 317d0e274afSLorenzo Bianconi u8 tac_map; 318d0e274afSLorenzo Bianconi u8 max_sp; 319d0e274afSLorenzo Bianconi u8 rsv0; 320d0e274afSLorenzo Bianconi __le16 listen_interval; 321d0e274afSLorenzo Bianconi u8 rsv1[2]; 322d0e274afSLorenzo Bianconi } __packed; 323d0e274afSLorenzo Bianconi 324d0e274afSLorenzo Bianconi struct sta_rec_ba { 325d0e274afSLorenzo Bianconi __le16 tag; 326d0e274afSLorenzo Bianconi __le16 len; 327d0e274afSLorenzo Bianconi u8 tid; 328d0e274afSLorenzo Bianconi u8 ba_type; 329d0e274afSLorenzo Bianconi u8 amsdu; 330d0e274afSLorenzo Bianconi u8 ba_en; 331d0e274afSLorenzo Bianconi __le16 ssn; 332d0e274afSLorenzo Bianconi __le16 winsize; 333d0e274afSLorenzo Bianconi } __packed; 334d0e274afSLorenzo Bianconi 335d0e274afSLorenzo Bianconi struct sta_rec_he { 336d0e274afSLorenzo Bianconi __le16 tag; 337d0e274afSLorenzo Bianconi __le16 len; 338d0e274afSLorenzo Bianconi 339d0e274afSLorenzo Bianconi __le32 he_cap; 340d0e274afSLorenzo Bianconi 341d0e274afSLorenzo Bianconi u8 t_frame_dur; 342d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 343d0e274afSLorenzo Bianconi u8 bw_set; 344d0e274afSLorenzo Bianconi u8 device_class; 345d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 346d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 347d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 348d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 349d0e274afSLorenzo Bianconi u8 dcm_max_ru; 350d0e274afSLorenzo Bianconi u8 punc_pream_rx; 351d0e274afSLorenzo Bianconi u8 pkt_ext; 352d0e274afSLorenzo Bianconi u8 rsv1; 353d0e274afSLorenzo Bianconi 354d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 355d0e274afSLorenzo Bianconi 356d0e274afSLorenzo Bianconi u8 rsv2[2]; 357d0e274afSLorenzo Bianconi } __packed; 358d0e274afSLorenzo Bianconi 359df2632b3SMing Yen Hsieh struct sta_rec_he_v2 { 360df2632b3SMing Yen Hsieh __le16 tag; 361df2632b3SMing Yen Hsieh __le16 len; 362df2632b3SMing Yen Hsieh u8 he_mac_cap[6]; 363df2632b3SMing Yen Hsieh u8 he_phy_cap[11]; 364df2632b3SMing Yen Hsieh u8 pkt_ext; 365df2632b3SMing Yen Hsieh /* 0: BW80, 1: BW160, 2: BW8080 */ 366df2632b3SMing Yen Hsieh __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 367df2632b3SMing Yen Hsieh } __packed; 368df2632b3SMing Yen Hsieh 369d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 370d0e274afSLorenzo Bianconi __le16 tag; 371d0e274afSLorenzo Bianconi __le16 len; 372d0e274afSLorenzo Bianconi u8 max_amsdu_num; 373d0e274afSLorenzo Bianconi u8 max_mpdu_size; 374d0e274afSLorenzo Bianconi u8 amsdu_en; 375d0e274afSLorenzo Bianconi u8 rsv; 376d0e274afSLorenzo Bianconi } __packed; 377d0e274afSLorenzo Bianconi 378d0e274afSLorenzo Bianconi struct sta_rec_state { 379d0e274afSLorenzo Bianconi __le16 tag; 380d0e274afSLorenzo Bianconi __le16 len; 381d0e274afSLorenzo Bianconi __le32 flags; 382d0e274afSLorenzo Bianconi u8 state; 383d0e274afSLorenzo Bianconi u8 vht_opmode; 384d0e274afSLorenzo Bianconi u8 action; 385d0e274afSLorenzo Bianconi u8 rsv[1]; 386d0e274afSLorenzo Bianconi } __packed; 387d0e274afSLorenzo Bianconi 38899b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 38999b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 390d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 391d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 392d0e274afSLorenzo Bianconi __le16 tag; 393d0e274afSLorenzo Bianconi __le16 len; 394d0e274afSLorenzo Bianconi __le16 legacy; 395d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 396d0e274afSLorenzo Bianconi } __packed; 397d0e274afSLorenzo Bianconi 398d0e274afSLorenzo Bianconi struct sta_rec_phy { 399d0e274afSLorenzo Bianconi __le16 tag; 400d0e274afSLorenzo Bianconi __le16 len; 401d0e274afSLorenzo Bianconi __le16 basic_rate; 402d0e274afSLorenzo Bianconi u8 phy_type; 403d0e274afSLorenzo Bianconi u8 ampdu; 404d0e274afSLorenzo Bianconi u8 rts_policy; 405d0e274afSLorenzo Bianconi u8 rcpi; 406*6deaf96dSShayne Chen u8 max_ampdu_len; /* connac3 */ 407*6deaf96dSShayne Chen u8 rsv[1]; 408d0e274afSLorenzo Bianconi } __packed; 409d0e274afSLorenzo Bianconi 4105883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 4115883892bSLorenzo Bianconi __le16 tag; 4125883892bSLorenzo Bianconi __le16 len; 4135883892bSLorenzo Bianconi __le16 capa; 4145883892bSLorenzo Bianconi u8 rsv[2]; 4155883892bSLorenzo Bianconi } __packed; 4165883892bSLorenzo Bianconi 4175562d5f6SLorenzo Bianconi struct sec_key { 4185562d5f6SLorenzo Bianconi u8 cipher_id; 4195562d5f6SLorenzo Bianconi u8 cipher_len; 4205562d5f6SLorenzo Bianconi u8 key_id; 4215562d5f6SLorenzo Bianconi u8 key_len; 4225562d5f6SLorenzo Bianconi u8 key[32]; 4235562d5f6SLorenzo Bianconi } __packed; 4245562d5f6SLorenzo Bianconi 4255562d5f6SLorenzo Bianconi struct sta_rec_sec { 4265562d5f6SLorenzo Bianconi __le16 tag; 4275562d5f6SLorenzo Bianconi __le16 len; 4285562d5f6SLorenzo Bianconi u8 add; 4295562d5f6SLorenzo Bianconi u8 n_cipher; 4305562d5f6SLorenzo Bianconi u8 rsv[2]; 4315562d5f6SLorenzo Bianconi 4325562d5f6SLorenzo Bianconi struct sec_key key[2]; 4335562d5f6SLorenzo Bianconi } __packed; 4345562d5f6SLorenzo Bianconi 4355562d5f6SLorenzo Bianconi struct sta_rec_bf { 4365562d5f6SLorenzo Bianconi __le16 tag; 4375562d5f6SLorenzo Bianconi __le16 len; 4385562d5f6SLorenzo Bianconi 4395562d5f6SLorenzo Bianconi __le16 pfmu; /* 0xffff: no access right for PFMU */ 4405562d5f6SLorenzo Bianconi bool su_mu; /* 0: SU, 1: MU */ 4415562d5f6SLorenzo Bianconi u8 bf_cap; /* 0: iBF, 1: eBF */ 4425562d5f6SLorenzo Bianconi u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */ 4435562d5f6SLorenzo Bianconi u8 ndpa_rate; 4445562d5f6SLorenzo Bianconi u8 ndp_rate; 4455562d5f6SLorenzo Bianconi u8 rept_poll_rate; 4465562d5f6SLorenzo Bianconi u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */ 4475562d5f6SLorenzo Bianconi u8 ncol; 4485562d5f6SLorenzo Bianconi u8 nrow; 4495562d5f6SLorenzo Bianconi u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */ 4505562d5f6SLorenzo Bianconi 4515562d5f6SLorenzo Bianconi u8 mem_total; 4525562d5f6SLorenzo Bianconi u8 mem_20m; 4535562d5f6SLorenzo Bianconi struct { 4545562d5f6SLorenzo Bianconi u8 row; 4555562d5f6SLorenzo Bianconi u8 col: 6, row_msb: 2; 4565562d5f6SLorenzo Bianconi } mem[4]; 4575562d5f6SLorenzo Bianconi 4585562d5f6SLorenzo Bianconi __le16 smart_ant; 4595562d5f6SLorenzo Bianconi u8 se_idx; 4605562d5f6SLorenzo Bianconi u8 auto_sounding; /* b7: low traffic indicator 4615562d5f6SLorenzo Bianconi * b6: Stop sounding for this entry 4625562d5f6SLorenzo Bianconi * b5 ~ b0: postpone sounding 4635562d5f6SLorenzo Bianconi */ 4645562d5f6SLorenzo Bianconi u8 ibf_timeout; 4655562d5f6SLorenzo Bianconi u8 ibf_dbw; 4665562d5f6SLorenzo Bianconi u8 ibf_ncol; 4675562d5f6SLorenzo Bianconi u8 ibf_nrow; 4685562d5f6SLorenzo Bianconi u8 nrow_bw160; 4695562d5f6SLorenzo Bianconi u8 ncol_bw160; 4705562d5f6SLorenzo Bianconi u8 ru_start_idx; 4715562d5f6SLorenzo Bianconi u8 ru_end_idx; 4725562d5f6SLorenzo Bianconi 4735562d5f6SLorenzo Bianconi bool trigger_su; 4745562d5f6SLorenzo Bianconi bool trigger_mu; 4755562d5f6SLorenzo Bianconi bool ng16_su; 4765562d5f6SLorenzo Bianconi bool ng16_mu; 4775562d5f6SLorenzo Bianconi bool codebook42_su; 4785562d5f6SLorenzo Bianconi bool codebook75_mu; 4795562d5f6SLorenzo Bianconi 4805562d5f6SLorenzo Bianconi u8 he_ltf; 4815562d5f6SLorenzo Bianconi u8 rsv[3]; 4825562d5f6SLorenzo Bianconi } __packed; 4835562d5f6SLorenzo Bianconi 4845562d5f6SLorenzo Bianconi struct sta_rec_bfee { 4855562d5f6SLorenzo Bianconi __le16 tag; 4865562d5f6SLorenzo Bianconi __le16 len; 4875562d5f6SLorenzo Bianconi bool fb_identity_matrix; /* 1: feedback identity matrix */ 4885562d5f6SLorenzo Bianconi bool ignore_feedback; /* 1: ignore */ 4895562d5f6SLorenzo Bianconi u8 rsv[2]; 4905562d5f6SLorenzo Bianconi } __packed; 4915562d5f6SLorenzo Bianconi 4925562d5f6SLorenzo Bianconi struct sta_rec_muru { 4935562d5f6SLorenzo Bianconi __le16 tag; 4945562d5f6SLorenzo Bianconi __le16 len; 4955562d5f6SLorenzo Bianconi 4965562d5f6SLorenzo Bianconi struct { 4975562d5f6SLorenzo Bianconi bool ofdma_dl_en; 4985562d5f6SLorenzo Bianconi bool ofdma_ul_en; 4995562d5f6SLorenzo Bianconi bool mimo_dl_en; 5005562d5f6SLorenzo Bianconi bool mimo_ul_en; 5015562d5f6SLorenzo Bianconi u8 rsv[4]; 5025562d5f6SLorenzo Bianconi } cfg; 5035562d5f6SLorenzo Bianconi 5045562d5f6SLorenzo Bianconi struct { 5055562d5f6SLorenzo Bianconi u8 punc_pream_rx; 5065562d5f6SLorenzo Bianconi bool he_20m_in_40m_2g; 5075562d5f6SLorenzo Bianconi bool he_20m_in_160m; 5085562d5f6SLorenzo Bianconi bool he_80m_in_160m; 5095562d5f6SLorenzo Bianconi bool lt16_sigb; 5105562d5f6SLorenzo Bianconi bool rx_su_comp_sigb; 5115562d5f6SLorenzo Bianconi bool rx_su_non_comp_sigb; 5125562d5f6SLorenzo Bianconi u8 rsv; 5135562d5f6SLorenzo Bianconi } ofdma_dl; 5145562d5f6SLorenzo Bianconi 5155562d5f6SLorenzo Bianconi struct { 5165562d5f6SLorenzo Bianconi u8 t_frame_dur; 5175562d5f6SLorenzo Bianconi u8 mu_cascading; 5185562d5f6SLorenzo Bianconi u8 uo_ra; 5195562d5f6SLorenzo Bianconi u8 he_2x996_tone; 5205562d5f6SLorenzo Bianconi u8 rx_t_frame_11ac; 5215562d5f6SLorenzo Bianconi u8 rsv[3]; 5225562d5f6SLorenzo Bianconi } ofdma_ul; 5235562d5f6SLorenzo Bianconi 5245562d5f6SLorenzo Bianconi struct { 5255562d5f6SLorenzo Bianconi bool vht_mu_bfee; 5265562d5f6SLorenzo Bianconi bool partial_bw_dl_mimo; 5275562d5f6SLorenzo Bianconi u8 rsv[2]; 5285562d5f6SLorenzo Bianconi } mimo_dl; 5295562d5f6SLorenzo Bianconi 5305562d5f6SLorenzo Bianconi struct { 5315562d5f6SLorenzo Bianconi bool full_ul_mimo; 5325562d5f6SLorenzo Bianconi bool partial_ul_mimo; 5335562d5f6SLorenzo Bianconi u8 rsv[2]; 5345562d5f6SLorenzo Bianconi } mimo_ul; 5355562d5f6SLorenzo Bianconi } __packed; 5365562d5f6SLorenzo Bianconi 5375562d5f6SLorenzo Bianconi struct sta_phy { 5385562d5f6SLorenzo Bianconi u8 type; 5395562d5f6SLorenzo Bianconi u8 flag; 5405562d5f6SLorenzo Bianconi u8 stbc; 5415562d5f6SLorenzo Bianconi u8 sgi; 5425562d5f6SLorenzo Bianconi u8 bw; 5435562d5f6SLorenzo Bianconi u8 ldpc; 5445562d5f6SLorenzo Bianconi u8 mcs; 5455562d5f6SLorenzo Bianconi u8 nss; 5465562d5f6SLorenzo Bianconi u8 he_ltf; 5475562d5f6SLorenzo Bianconi }; 5485562d5f6SLorenzo Bianconi 5495562d5f6SLorenzo Bianconi struct sta_rec_ra { 5505562d5f6SLorenzo Bianconi __le16 tag; 5515562d5f6SLorenzo Bianconi __le16 len; 5525562d5f6SLorenzo Bianconi 5535562d5f6SLorenzo Bianconi u8 valid; 5545562d5f6SLorenzo Bianconi u8 auto_rate; 5555562d5f6SLorenzo Bianconi u8 phy_mode; 5565562d5f6SLorenzo Bianconi u8 channel; 5575562d5f6SLorenzo Bianconi u8 bw; 5585562d5f6SLorenzo Bianconi u8 disable_cck; 5595562d5f6SLorenzo Bianconi u8 ht_mcs32; 5605562d5f6SLorenzo Bianconi u8 ht_gf; 5615562d5f6SLorenzo Bianconi u8 ht_mcs[4]; 5625562d5f6SLorenzo Bianconi u8 mmps_mode; 5635562d5f6SLorenzo Bianconi u8 gband_256; 5645562d5f6SLorenzo Bianconi u8 af; 5655562d5f6SLorenzo Bianconi u8 auth_wapi_mode; 5665562d5f6SLorenzo Bianconi u8 rate_len; 5675562d5f6SLorenzo Bianconi 5685562d5f6SLorenzo Bianconi u8 supp_mode; 5695562d5f6SLorenzo Bianconi u8 supp_cck_rate; 5705562d5f6SLorenzo Bianconi u8 supp_ofdm_rate; 5715562d5f6SLorenzo Bianconi __le32 supp_ht_mcs; 5725562d5f6SLorenzo Bianconi __le16 supp_vht_mcs[4]; 5735562d5f6SLorenzo Bianconi 5745562d5f6SLorenzo Bianconi u8 op_mode; 5755562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 5765562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 5775562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 5785562d5f6SLorenzo Bianconi 5795562d5f6SLorenzo Bianconi __le32 sta_cap; 5805562d5f6SLorenzo Bianconi 5815562d5f6SLorenzo Bianconi struct sta_phy phy; 5825562d5f6SLorenzo Bianconi } __packed; 5835562d5f6SLorenzo Bianconi 5845562d5f6SLorenzo Bianconi struct sta_rec_ra_fixed { 5855562d5f6SLorenzo Bianconi __le16 tag; 5865562d5f6SLorenzo Bianconi __le16 len; 5875562d5f6SLorenzo Bianconi 5885562d5f6SLorenzo Bianconi __le32 field; 5895562d5f6SLorenzo Bianconi u8 op_mode; 5905562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 5915562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 5925562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 5935562d5f6SLorenzo Bianconi 5945562d5f6SLorenzo Bianconi struct sta_phy phy; 5955562d5f6SLorenzo Bianconi 596faf2e7b5SShayne Chen u8 spe_idx; 5975562d5f6SLorenzo Bianconi u8 short_preamble; 5985562d5f6SLorenzo Bianconi u8 is_5g; 5995562d5f6SLorenzo Bianconi u8 mmps_mode; 6005562d5f6SLorenzo Bianconi } __packed; 6015562d5f6SLorenzo Bianconi 602d0e274afSLorenzo Bianconi /* wtbl_rec */ 603d0e274afSLorenzo Bianconi 604d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 605d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 606d0e274afSLorenzo Bianconi u8 operation; 607d0e274afSLorenzo Bianconi __le16 tlv_num; 608d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 609d0e274afSLorenzo Bianconi u8 rsv[3]; 610d0e274afSLorenzo Bianconi } __packed; 611d0e274afSLorenzo Bianconi 612d0e274afSLorenzo Bianconi struct wtbl_generic { 613d0e274afSLorenzo Bianconi __le16 tag; 614d0e274afSLorenzo Bianconi __le16 len; 615d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 616d0e274afSLorenzo Bianconi u8 muar_idx; 617d0e274afSLorenzo Bianconi u8 skip_tx; 618d0e274afSLorenzo Bianconi u8 cf_ack; 619d0e274afSLorenzo Bianconi u8 qos; 620d0e274afSLorenzo Bianconi u8 mesh; 621d0e274afSLorenzo Bianconi u8 adm; 622d0e274afSLorenzo Bianconi __le16 partial_aid; 623d0e274afSLorenzo Bianconi u8 baf_en; 624d0e274afSLorenzo Bianconi u8 aad_om; 625d0e274afSLorenzo Bianconi } __packed; 626d0e274afSLorenzo Bianconi 627d0e274afSLorenzo Bianconi struct wtbl_rx { 628d0e274afSLorenzo Bianconi __le16 tag; 629d0e274afSLorenzo Bianconi __le16 len; 630d0e274afSLorenzo Bianconi u8 rcid; 631d0e274afSLorenzo Bianconi u8 rca1; 632d0e274afSLorenzo Bianconi u8 rca2; 633d0e274afSLorenzo Bianconi u8 rv; 634d0e274afSLorenzo Bianconi u8 rsv[4]; 635d0e274afSLorenzo Bianconi } __packed; 636d0e274afSLorenzo Bianconi 637d0e274afSLorenzo Bianconi struct wtbl_ht { 638d0e274afSLorenzo Bianconi __le16 tag; 639d0e274afSLorenzo Bianconi __le16 len; 640d0e274afSLorenzo Bianconi u8 ht; 641d0e274afSLorenzo Bianconi u8 ldpc; 642d0e274afSLorenzo Bianconi u8 af; 643d0e274afSLorenzo Bianconi u8 mm; 644d0e274afSLorenzo Bianconi u8 rsv[4]; 645d0e274afSLorenzo Bianconi } __packed; 646d0e274afSLorenzo Bianconi 647d0e274afSLorenzo Bianconi struct wtbl_vht { 648d0e274afSLorenzo Bianconi __le16 tag; 649d0e274afSLorenzo Bianconi __le16 len; 650d0e274afSLorenzo Bianconi u8 ldpc; 651d0e274afSLorenzo Bianconi u8 dyn_bw; 652d0e274afSLorenzo Bianconi u8 vht; 653d0e274afSLorenzo Bianconi u8 txop_ps; 654d0e274afSLorenzo Bianconi u8 rsv[4]; 655d0e274afSLorenzo Bianconi } __packed; 656d0e274afSLorenzo Bianconi 657d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 658d0e274afSLorenzo Bianconi __le16 tag; 659d0e274afSLorenzo Bianconi __le16 len; 660d0e274afSLorenzo Bianconi u8 txps; 661d0e274afSLorenzo Bianconi u8 rsv[3]; 662d0e274afSLorenzo Bianconi } __packed; 663d0e274afSLorenzo Bianconi 664d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 665d0e274afSLorenzo Bianconi __le16 tag; 666d0e274afSLorenzo Bianconi __le16 len; 667d0e274afSLorenzo Bianconi u8 to_ds; 668d0e274afSLorenzo Bianconi u8 from_ds; 669d4b98c63SRyder Lee u8 no_rx_trans; 670d0e274afSLorenzo Bianconi u8 rsv; 671d0e274afSLorenzo Bianconi } __packed; 672d0e274afSLorenzo Bianconi 673d0e274afSLorenzo Bianconi struct wtbl_ba { 674d0e274afSLorenzo Bianconi __le16 tag; 675d0e274afSLorenzo Bianconi __le16 len; 676d0e274afSLorenzo Bianconi /* common */ 677d0e274afSLorenzo Bianconi u8 tid; 678d0e274afSLorenzo Bianconi u8 ba_type; 679d0e274afSLorenzo Bianconi u8 rsv0[2]; 680d0e274afSLorenzo Bianconi /* originator only */ 681d0e274afSLorenzo Bianconi __le16 sn; 682d0e274afSLorenzo Bianconi u8 ba_en; 683d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 6845562d5f6SLorenzo Bianconi /* originator & recipient */ 685d0e274afSLorenzo Bianconi __le16 ba_winsize; 686d0e274afSLorenzo Bianconi /* recipient only */ 687d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 688d0e274afSLorenzo Bianconi u8 rst_ba_tid; 689d0e274afSLorenzo Bianconi u8 rst_ba_sel; 690d0e274afSLorenzo Bianconi u8 rst_ba_sb; 691d0e274afSLorenzo Bianconi u8 band_idx; 692d0e274afSLorenzo Bianconi u8 rsv1[4]; 693d0e274afSLorenzo Bianconi } __packed; 694d0e274afSLorenzo Bianconi 695d0e274afSLorenzo Bianconi struct wtbl_smps { 696d0e274afSLorenzo Bianconi __le16 tag; 697d0e274afSLorenzo Bianconi __le16 len; 698d0e274afSLorenzo Bianconi u8 smps; 699d0e274afSLorenzo Bianconi u8 rsv[3]; 700d0e274afSLorenzo Bianconi } __packed; 701d0e274afSLorenzo Bianconi 702d0e274afSLorenzo Bianconi /* mt7615 only */ 703d0e274afSLorenzo Bianconi 704d0e274afSLorenzo Bianconi struct wtbl_bf { 705d0e274afSLorenzo Bianconi __le16 tag; 706d0e274afSLorenzo Bianconi __le16 len; 707d0e274afSLorenzo Bianconi u8 ibf; 708d0e274afSLorenzo Bianconi u8 ebf; 709d0e274afSLorenzo Bianconi u8 ibf_vht; 710d0e274afSLorenzo Bianconi u8 ebf_vht; 711d0e274afSLorenzo Bianconi u8 gid; 712d0e274afSLorenzo Bianconi u8 pfmu_idx; 713d0e274afSLorenzo Bianconi u8 rsv[2]; 714d0e274afSLorenzo Bianconi } __packed; 715d0e274afSLorenzo Bianconi 716d0e274afSLorenzo Bianconi struct wtbl_pn { 717d0e274afSLorenzo Bianconi __le16 tag; 718d0e274afSLorenzo Bianconi __le16 len; 719d0e274afSLorenzo Bianconi u8 pn[6]; 720d0e274afSLorenzo Bianconi u8 rsv[2]; 721d0e274afSLorenzo Bianconi } __packed; 722d0e274afSLorenzo Bianconi 723d0e274afSLorenzo Bianconi struct wtbl_spe { 724d0e274afSLorenzo Bianconi __le16 tag; 725d0e274afSLorenzo Bianconi __le16 len; 726d0e274afSLorenzo Bianconi u8 spe_idx; 727d0e274afSLorenzo Bianconi u8 rsv[3]; 728d0e274afSLorenzo Bianconi } __packed; 729d0e274afSLorenzo Bianconi 730d0e274afSLorenzo Bianconi struct wtbl_raw { 731d0e274afSLorenzo Bianconi __le16 tag; 732d0e274afSLorenzo Bianconi __le16 len; 733d0e274afSLorenzo Bianconi u8 wtbl_idx; 734d0e274afSLorenzo Bianconi u8 dw; 735d0e274afSLorenzo Bianconi u8 rsv[2]; 736d0e274afSLorenzo Bianconi __le32 msk; 737d0e274afSLorenzo Bianconi __le32 val; 738d0e274afSLorenzo Bianconi } __packed; 739d0e274afSLorenzo Bianconi 740d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 741d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 742d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 743d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 744d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 745d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 746d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 747d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 748d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 749d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 750d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 751d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 752d0e274afSLorenzo Bianconi 753d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 754d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 7555562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bf) + \ 756d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 757d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 758d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 759d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 760d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 761d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 7625562d5f6SLorenzo Bianconi sizeof(struct sta_rec_muru) + \ 7635562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bfee) + \ 7645562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra) + \ 765e2c93b68SLorenzo Bianconi sizeof(struct sta_rec_sec) + \ 7665562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra_fixed) + \ 7675883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 768d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 769d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 770d0e274afSLorenzo Bianconi 771d0e274afSLorenzo Bianconi enum { 772d0e274afSLorenzo Bianconi STA_REC_BASIC, 773d0e274afSLorenzo Bianconi STA_REC_RA, 774d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 775d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 776d0e274afSLorenzo Bianconi STA_REC_BF, 777d0e274afSLorenzo Bianconi STA_REC_AMSDU, 778d0e274afSLorenzo Bianconi STA_REC_BA, 779d0e274afSLorenzo Bianconi STA_REC_STATE, 780d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 781d0e274afSLorenzo Bianconi STA_REC_HT, 782d0e274afSLorenzo Bianconi STA_REC_VHT, 783d0e274afSLorenzo Bianconi STA_REC_APPS, 784d0e274afSLorenzo Bianconi STA_REC_KEY, 785d0e274afSLorenzo Bianconi STA_REC_WTBL, 786d0e274afSLorenzo Bianconi STA_REC_HE, 787d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 788d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 789d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 790d0e274afSLorenzo Bianconi STA_REC_MURU, 791d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 792d0e274afSLorenzo Bianconi STA_REC_BFEE, 793d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 7945883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 795df2632b3SMing Yen Hsieh STA_REC_HE_V2 = 0x19, 796d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 797d0e274afSLorenzo Bianconi }; 798d0e274afSLorenzo Bianconi 799d0e274afSLorenzo Bianconi enum { 800d0e274afSLorenzo Bianconi WTBL_GENERIC, 801d0e274afSLorenzo Bianconi WTBL_RX, 802d0e274afSLorenzo Bianconi WTBL_HT, 803d0e274afSLorenzo Bianconi WTBL_VHT, 804d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 805d0e274afSLorenzo Bianconi WTBL_TX_PS, 806d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 807d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 808d0e274afSLorenzo Bianconi WTBL_BA, 809d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 810d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 811d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 812d0e274afSLorenzo Bianconi WTBL_BF, 813d0e274afSLorenzo Bianconi WTBL_SMPS, 814d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 815d0e274afSLorenzo Bianconi WTBL_PN, 816d0e274afSLorenzo Bianconi WTBL_SPE, 817d0e274afSLorenzo Bianconi WTBL_MAX_NUM 818d0e274afSLorenzo Bianconi }; 819d0e274afSLorenzo Bianconi 820d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 821d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 822d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 823d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 824d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 825d0e274afSLorenzo Bianconi 826d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 827d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 828d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 829d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 830d0e274afSLorenzo Bianconi 8314da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 8324da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 8334da64fe0SSean Wang 834d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 835d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 836d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 837d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 838d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 839d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 840d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 841d0e274afSLorenzo Bianconi 842d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 843d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 844d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 845d0e274afSLorenzo Bianconi 846d0e274afSLorenzo Bianconi /* HE MAC */ 847d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 848d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 849d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 850d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 851d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 852d0e274afSLorenzo Bianconi /* HE PHY */ 853d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 854d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 855d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 856d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 857d0e274afSLorenzo Bianconi /* STBC */ 858d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 859d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 860d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 861d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 862d0e274afSLorenzo Bianconi /* GI */ 863d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 864d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 865d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 866d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 867d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 868d0e274afSLorenzo Bianconi /* 242 TONE */ 869d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 870d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 871d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 872d0e274afSLorenzo Bianconi 873d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 874d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 875d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 876d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 877d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 878d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 879d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 880d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 881dfdf6725SLorenzo Bianconi 882dfdf6725SLorenzo Bianconi #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ 883d0e274afSLorenzo Bianconi 884d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 885d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 886d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 887d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 888d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 889d0e274afSLorenzo Bianconi 8905562d5f6SLorenzo Bianconi #define STA_CAP_WMM BIT(0) 8915562d5f6SLorenzo Bianconi #define STA_CAP_SGI_20 BIT(4) 8925562d5f6SLorenzo Bianconi #define STA_CAP_SGI_40 BIT(5) 8935562d5f6SLorenzo Bianconi #define STA_CAP_TX_STBC BIT(6) 8945562d5f6SLorenzo Bianconi #define STA_CAP_RX_STBC BIT(7) 8955562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_80 BIT(16) 8965562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_160 BIT(17) 8975562d5f6SLorenzo Bianconi #define STA_CAP_VHT_TX_STBC BIT(18) 8985562d5f6SLorenzo Bianconi #define STA_CAP_VHT_RX_STBC BIT(19) 8995562d5f6SLorenzo Bianconi #define STA_CAP_VHT_LDPC BIT(23) 9005562d5f6SLorenzo Bianconi #define STA_CAP_LDPC BIT(24) 9015562d5f6SLorenzo Bianconi #define STA_CAP_HT BIT(26) 9025562d5f6SLorenzo Bianconi #define STA_CAP_VHT BIT(27) 9035562d5f6SLorenzo Bianconi #define STA_CAP_HE BIT(28) 9045562d5f6SLorenzo Bianconi 905d0e274afSLorenzo Bianconi enum { 906d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 907d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 908d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 909d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 910d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 911d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 912d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 913d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 914d0e274afSLorenzo Bianconi }; 915d0e274afSLorenzo Bianconi 916d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 917d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 918d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 919d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 920d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 921d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 922d0e274afSLorenzo Bianconi 923d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 924d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 925d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 926d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 927d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 928d0e274afSLorenzo Bianconi 929d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 930d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 931d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 932d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 933d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 934d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 935d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 936d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 937d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 938d0e274afSLorenzo Bianconi 939d0e274afSLorenzo Bianconi enum { 940d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 941d0e274afSLorenzo Bianconi WTBL_SET, 942d0e274afSLorenzo Bianconi WTBL_QUERY, 943d0e274afSLorenzo Bianconi WTBL_RESET_ALL 944d0e274afSLorenzo Bianconi }; 945d0e274afSLorenzo Bianconi 946d0e274afSLorenzo Bianconi enum { 947d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 948d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 949d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 950d0e274afSLorenzo Bianconi }; 951d0e274afSLorenzo Bianconi 952d0e274afSLorenzo Bianconi enum { 953d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 954d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 955d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 956d0e274afSLorenzo Bianconi }; 957d0e274afSLorenzo Bianconi 958d0e274afSLorenzo Bianconi enum { 959d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 960d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 961d0e274afSLorenzo Bianconi }; 962d0e274afSLorenzo Bianconi 9635b55b6daSQuan Zhou #define MCU_UNI_CMD_EVENT BIT(1) 9645b55b6daSQuan Zhou #define MCU_UNI_CMD_UNSOLICITED_EVENT BIT(2) 9655b55b6daSQuan Zhou 9665562d5f6SLorenzo Bianconi /* event table */ 9675562d5f6SLorenzo Bianconi enum { 9685562d5f6SLorenzo Bianconi MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, 9695562d5f6SLorenzo Bianconi MCU_EVENT_FW_START = 0x01, 9705562d5f6SLorenzo Bianconi MCU_EVENT_GENERIC = 0x01, 9715562d5f6SLorenzo Bianconi MCU_EVENT_ACCESS_REG = 0x02, 9725562d5f6SLorenzo Bianconi MCU_EVENT_MT_PATCH_SEM = 0x04, 9735562d5f6SLorenzo Bianconi MCU_EVENT_REG_ACCESS = 0x05, 9745562d5f6SLorenzo Bianconi MCU_EVENT_LP_INFO = 0x07, 9755562d5f6SLorenzo Bianconi MCU_EVENT_SCAN_DONE = 0x0d, 9765562d5f6SLorenzo Bianconi MCU_EVENT_TX_DONE = 0x0f, 9775562d5f6SLorenzo Bianconi MCU_EVENT_ROC = 0x10, 9785562d5f6SLorenzo Bianconi MCU_EVENT_BSS_ABSENCE = 0x11, 9795562d5f6SLorenzo Bianconi MCU_EVENT_BSS_BEACON_LOSS = 0x13, 9805562d5f6SLorenzo Bianconi MCU_EVENT_CH_PRIVILEGE = 0x18, 9815562d5f6SLorenzo Bianconi MCU_EVENT_SCHED_SCAN_DONE = 0x23, 9825562d5f6SLorenzo Bianconi MCU_EVENT_DBG_MSG = 0x27, 9835562d5f6SLorenzo Bianconi MCU_EVENT_TXPWR = 0xd0, 9845562d5f6SLorenzo Bianconi MCU_EVENT_EXT = 0xed, 9855562d5f6SLorenzo Bianconi MCU_EVENT_RESTART_DL = 0xef, 9865562d5f6SLorenzo Bianconi MCU_EVENT_COREDUMP = 0xf0, 9875562d5f6SLorenzo Bianconi }; 9885562d5f6SLorenzo Bianconi 9895562d5f6SLorenzo Bianconi /* ext event table */ 9905562d5f6SLorenzo Bianconi enum { 9915562d5f6SLorenzo Bianconi MCU_EXT_EVENT_PS_SYNC = 0x5, 9925562d5f6SLorenzo Bianconi MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, 9935562d5f6SLorenzo Bianconi MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, 9945562d5f6SLorenzo Bianconi MCU_EXT_EVENT_ASSERT_DUMP = 0x23, 9955562d5f6SLorenzo Bianconi MCU_EXT_EVENT_RDD_REPORT = 0x3a, 9965562d5f6SLorenzo Bianconi MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, 9975562d5f6SLorenzo Bianconi MCU_EXT_EVENT_BCC_NOTIFY = 0x75, 9981966a507SMeiChia Chiu MCU_EXT_EVENT_MURU_CTRL = 0x9f, 9995562d5f6SLorenzo Bianconi }; 10005562d5f6SLorenzo Bianconi 10015562d5f6SLorenzo Bianconi enum { 10025562d5f6SLorenzo Bianconi MCU_Q_QUERY, 10035562d5f6SLorenzo Bianconi MCU_Q_SET, 10045562d5f6SLorenzo Bianconi MCU_Q_RESERVED, 10055562d5f6SLorenzo Bianconi MCU_Q_NA 10065562d5f6SLorenzo Bianconi }; 10075562d5f6SLorenzo Bianconi 10085562d5f6SLorenzo Bianconi enum { 10095562d5f6SLorenzo Bianconi MCU_S2D_H2N, 10105562d5f6SLorenzo Bianconi MCU_S2D_C2N, 10115562d5f6SLorenzo Bianconi MCU_S2D_H2C, 10125562d5f6SLorenzo Bianconi MCU_S2D_H2CN 10135562d5f6SLorenzo Bianconi }; 10145562d5f6SLorenzo Bianconi 10155562d5f6SLorenzo Bianconi enum { 10165562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_FAIL, 10175562d5f6SLorenzo Bianconi PATCH_IS_DL, 10185562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_SUCCESS, 10195562d5f6SLorenzo Bianconi PATCH_REL_SEM_SUCCESS 10205562d5f6SLorenzo Bianconi }; 10215562d5f6SLorenzo Bianconi 10225562d5f6SLorenzo Bianconi enum { 10235562d5f6SLorenzo Bianconi FW_STATE_INITIAL, 10245562d5f6SLorenzo Bianconi FW_STATE_FW_DOWNLOAD, 10255562d5f6SLorenzo Bianconi FW_STATE_NORMAL_OPERATION, 10265562d5f6SLorenzo Bianconi FW_STATE_NORMAL_TRX, 10275562d5f6SLorenzo Bianconi FW_STATE_RDY = 7 10285562d5f6SLorenzo Bianconi }; 10295562d5f6SLorenzo Bianconi 10305562d5f6SLorenzo Bianconi enum { 10315562d5f6SLorenzo Bianconi CH_SWITCH_NORMAL = 0, 10325562d5f6SLorenzo Bianconi CH_SWITCH_SCAN = 3, 10335562d5f6SLorenzo Bianconi CH_SWITCH_MCC = 4, 10345562d5f6SLorenzo Bianconi CH_SWITCH_DFS = 5, 10355562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_START = 6, 10365562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 10375562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 10385562d5f6SLorenzo Bianconi CH_SWITCH_SCAN_BYPASS_DPD = 9 10395562d5f6SLorenzo Bianconi }; 10405562d5f6SLorenzo Bianconi 10415562d5f6SLorenzo Bianconi enum { 10425562d5f6SLorenzo Bianconi THERMAL_SENSOR_TEMP_QUERY, 10435562d5f6SLorenzo Bianconi THERMAL_SENSOR_MANUAL_CTRL, 10445562d5f6SLorenzo Bianconi THERMAL_SENSOR_INFO_QUERY, 10455562d5f6SLorenzo Bianconi THERMAL_SENSOR_TASK_CTRL, 10465562d5f6SLorenzo Bianconi }; 10475562d5f6SLorenzo Bianconi 10485562d5f6SLorenzo Bianconi enum mcu_cipher_type { 10495562d5f6SLorenzo Bianconi MCU_CIPHER_NONE = 0, 10505562d5f6SLorenzo Bianconi MCU_CIPHER_WEP40, 10515562d5f6SLorenzo Bianconi MCU_CIPHER_WEP104, 10525562d5f6SLorenzo Bianconi MCU_CIPHER_WEP128, 10535562d5f6SLorenzo Bianconi MCU_CIPHER_TKIP, 10545562d5f6SLorenzo Bianconi MCU_CIPHER_AES_CCMP, 10555562d5f6SLorenzo Bianconi MCU_CIPHER_CCMP_256, 10565562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP, 10575562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP_256, 10585562d5f6SLorenzo Bianconi MCU_CIPHER_WAPI, 10595562d5f6SLorenzo Bianconi MCU_CIPHER_BIP_CMAC_128, 10605562d5f6SLorenzo Bianconi }; 10615562d5f6SLorenzo Bianconi 10625562d5f6SLorenzo Bianconi enum { 10635562d5f6SLorenzo Bianconi EE_MODE_EFUSE, 10645562d5f6SLorenzo Bianconi EE_MODE_BUFFER, 10655562d5f6SLorenzo Bianconi }; 10665562d5f6SLorenzo Bianconi 10675562d5f6SLorenzo Bianconi enum { 10685562d5f6SLorenzo Bianconi EE_FORMAT_BIN, 10695562d5f6SLorenzo Bianconi EE_FORMAT_WHOLE, 10705562d5f6SLorenzo Bianconi EE_FORMAT_MULTIPLE, 10715562d5f6SLorenzo Bianconi }; 10725562d5f6SLorenzo Bianconi 10735562d5f6SLorenzo Bianconi enum { 10745562d5f6SLorenzo Bianconi MCU_PHY_STATE_TX_RATE, 10755562d5f6SLorenzo Bianconi MCU_PHY_STATE_RX_RATE, 10765562d5f6SLorenzo Bianconi MCU_PHY_STATE_RSSI, 10775562d5f6SLorenzo Bianconi MCU_PHY_STATE_CONTENTION_RX_RATE, 10785562d5f6SLorenzo Bianconi MCU_PHY_STATE_OFDMLQ_CNINFO, 10795562d5f6SLorenzo Bianconi }; 10805562d5f6SLorenzo Bianconi 1081d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 1082d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 10834c07129bSShayne Chen #define MCU_CMD_SET BIT(2) 1084d0e274afSLorenzo Bianconi 1085d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 10864c07129bSShayne Chen MCU_CMD_SET) 10874c07129bSShayne Chen #define MCU_CMD_UNI_QUERY_ACK (MCU_CMD_ACK | MCU_CMD_UNI) 1088d0e274afSLorenzo Bianconi 1089e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_ID GENMASK(7, 0) 1090e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8) 1091e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_QUERY BIT(16) 109254722402SLorenzo Bianconi #define __MCU_CMD_FIELD_UNI BIT(17) 1093680a2eadSLorenzo Bianconi #define __MCU_CMD_FIELD_CE BIT(18) 10945562d5f6SLorenzo Bianconi #define __MCU_CMD_FIELD_WA BIT(19) 10954c07129bSShayne Chen #define __MCU_CMD_FIELD_WM BIT(20) 1096e6d2070dSLorenzo Bianconi 1097e6d2070dSLorenzo Bianconi #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \ 1098e6d2070dSLorenzo Bianconi MCU_CMD_##_t) 1099e6d2070dSLorenzo Bianconi #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \ 1100e6d2070dSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 1101e6d2070dSLorenzo Bianconi MCU_EXT_CMD_##_t)) 1102e6d2070dSLorenzo Bianconi #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY) 110354722402SLorenzo Bianconi #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \ 110454722402SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 110554722402SLorenzo Bianconi MCU_UNI_CMD_##_t)) 1106680a2eadSLorenzo Bianconi #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \ 1107680a2eadSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 1108680a2eadSLorenzo Bianconi MCU_CE_CMD_##_t)) 1109680a2eadSLorenzo Bianconi #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY) 1110d0e274afSLorenzo Bianconi 11115562d5f6SLorenzo Bianconi #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA) 11125562d5f6SLorenzo Bianconi #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA) 11135562d5f6SLorenzo Bianconi #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \ 11145562d5f6SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 11155562d5f6SLorenzo Bianconi MCU_WA_PARAM_CMD_##_t)) 11165562d5f6SLorenzo Bianconi 11174c07129bSShayne Chen #define MCU_WM_UNI_CMD(_t) (MCU_UNI_CMD(_t) | \ 11184c07129bSShayne Chen __MCU_CMD_FIELD_WM) 11194c07129bSShayne Chen #define MCU_WM_UNI_CMD_QUERY(_t) (MCU_UNI_CMD(_t) | \ 11204c07129bSShayne Chen __MCU_CMD_FIELD_QUERY | \ 11214c07129bSShayne Chen __MCU_CMD_FIELD_WM) 11224c07129bSShayne Chen #define MCU_WA_UNI_CMD(_t) (MCU_UNI_CMD(_t) | \ 11234c07129bSShayne Chen __MCU_CMD_FIELD_WA) 11244c07129bSShayne Chen #define MCU_WMWA_UNI_CMD(_t) (MCU_WM_UNI_CMD(_t) | \ 11254c07129bSShayne Chen __MCU_CMD_FIELD_WA) 11264c07129bSShayne Chen 1127d0e274afSLorenzo Bianconi enum { 1128d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 1129d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 11309d8d136cSLorenzo Bianconi MCU_EXT_CMD_RF_TEST = 0x04, 1131d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 1132d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 1133d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 1134d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 11359d8d136cSLorenzo Bianconi MCU_EXT_CMD_TXBF_ACTION = 0x1e, 1136d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 11379d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_PROT = 0x23, 1138d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 1139d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 1140d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 1141d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 11429d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_CTRL = 0x2c, 1143d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 11449d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_DRR_CTRL = 0x36, 1145d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 1146d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 1147d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 1148d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 1149d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 1150d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 1151d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 1152d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 11539d8d136cSLorenzo Bianconi MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, 1154d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 11559d8d136cSLorenzo Bianconi MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, 1156d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 1157d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 11589d8d136cSLorenzo Bianconi MCU_EXT_CMD_GET_MIB_INFO = 0x5a, 1159d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 116003a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 11619d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RADAR_TH = 0x7c, 1162d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 11639d8d136cSLorenzo Bianconi MCU_EXT_CMD_MWDS_SUPPORT = 0x80, 11649d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, 11659d8d136cSLorenzo Bianconi MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, 11669d8d136cSLorenzo Bianconi MCU_EXT_CMD_FW_DBG_CTRL = 0x95, 116739cdf080SLorenzo Bianconi MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, 11689d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x9d, 11699d8d136cSLorenzo Bianconi MCU_EXT_CMD_MURU_CTRL = 0x9f, 11709d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SPR = 0xa8, 11719d8d136cSLorenzo Bianconi MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, 11729d8d136cSLorenzo Bianconi MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, 11739d8d136cSLorenzo Bianconi MCU_EXT_CMD_PHY_STAT_INFO = 0xad, 1174d0e274afSLorenzo Bianconi }; 1175d0e274afSLorenzo Bianconi 1176d0e274afSLorenzo Bianconi enum { 117754722402SLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01, 117854722402SLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02, 117954722402SLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = 0x03, 118054722402SLorenzo Bianconi MCU_UNI_CMD_SUSPEND = 0x05, 118154722402SLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = 0x06, 118254722402SLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = 0x07, 1183cbaa0a40SSean Wang MCU_UNI_CMD_SNIFFER = 0x24, 11845b55b6daSQuan Zhou MCU_UNI_CMD_ROC = 0x27, 1185d0e274afSLorenzo Bianconi }; 1186d0e274afSLorenzo Bianconi 1187d0e274afSLorenzo Bianconi enum { 11887159eb82SLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 11897159eb82SLorenzo Bianconi MCU_CMD_FW_START_REQ = 0x02, 1190d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 11917159eb82SLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = 0x4, 11927159eb82SLorenzo Bianconi MCU_CMD_PATCH_START_REQ = 0x05, 11937159eb82SLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = 0x07, 11947159eb82SLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = 0x10, 11959d8d136cSLorenzo Bianconi MCU_CMD_WA_PARAM = 0xc4, 1196d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 11977159eb82SLorenzo Bianconi MCU_CMD_FW_SCATTER = 0xee, 11987159eb82SLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = 0xef, 1199d0e274afSLorenzo Bianconi }; 1200d0e274afSLorenzo Bianconi 1201d0e274afSLorenzo Bianconi /* offload mcu commands */ 1202d0e274afSLorenzo Bianconi enum { 1203680a2eadSLorenzo Bianconi MCU_CE_CMD_TEST_CTRL = 0x01, 1204680a2eadSLorenzo Bianconi MCU_CE_CMD_START_HW_SCAN = 0x03, 1205680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_PS_PROFILE = 0x05, 1206680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f, 1207680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, 1208680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_ABORT = 0x17, 1209680a2eadSLorenzo Bianconi MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, 1210bf9727a2SSean Wang MCU_CE_CMD_SET_ROC = 0x1c, 121166ca1a7bSSean Wang MCU_CE_CMD_SET_EDCA_PARMS = 0x1d, 1212680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_P2P_OPPPS = 0x33, 121323bdc5d8SMing Yen Hsieh MCU_CE_CMD_SET_CLC = 0x5c, 1214680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, 1215680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, 1216680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_REQ = 0x62, 1217680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_NIC_CAPAB = 0x8a, 1218680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0, 1219680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_WRITE = 0xc0, 1220680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_READ = 0xc0, 1221680a2eadSLorenzo Bianconi MCU_CE_CMD_CHIP_CONFIG = 0xca, 1222680a2eadSLorenzo Bianconi MCU_CE_CMD_FWLOG_2_HOST = 0xc5, 1223680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_WTBL = 0xcd, 1224680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_TXPWR = 0xd0, 1225d0e274afSLorenzo Bianconi }; 1226d0e274afSLorenzo Bianconi 1227d0e274afSLorenzo Bianconi enum { 1228d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 1229d0e274afSLorenzo Bianconi PATCH_SEM_GET 1230d0e274afSLorenzo Bianconi }; 1231d0e274afSLorenzo Bianconi 1232d0e274afSLorenzo Bianconi enum { 1233d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 1234d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 1235b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 1236d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 1237d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 1238d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 1239d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 124067aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 124167aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 1242d0e274afSLorenzo Bianconi }; 1243d0e274afSLorenzo Bianconi 124455d4c19cSLorenzo Bianconi enum { 124555d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 124655d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 124755d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 124855d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 124955d4c19cSLorenzo Bianconi }; 125055d4c19cSLorenzo Bianconi 1251f7d2958cSLorenzo Bianconi enum { 1252f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 1253f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 1254f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 1255f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 1256f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 1257f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 1258f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 1259f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 1260f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 1261f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 1262f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 1263f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 1264f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 1265f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 1266f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 1267f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 1268f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 1269f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 1270f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 1271f7d2958cSLorenzo Bianconi }; 1272f7d2958cSLorenzo Bianconi 1273193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 1274193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 1275193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 1276193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 1277193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 1278193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 1279193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 1280193e5f22SYN Chen 128155d4c19cSLorenzo Bianconi enum { 128255d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 128355d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 128455d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 128555d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 128655d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 128755d4c19cSLorenzo Bianconi }; 128855d4c19cSLorenzo Bianconi 128955d4c19cSLorenzo Bianconi enum { 129055d4c19cSLorenzo Bianconi WOW_USB = 1, 129155d4c19cSLorenzo Bianconi WOW_PCIE = 2, 129255d4c19cSLorenzo Bianconi WOW_GPIO = 3, 129355d4c19cSLorenzo Bianconi }; 129455d4c19cSLorenzo Bianconi 1295d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 1296d0e274afSLorenzo Bianconi __le16 tag; 1297d0e274afSLorenzo Bianconi __le16 len; 1298d0e274afSLorenzo Bianconi u8 active; 1299d0e274afSLorenzo Bianconi u8 omac_idx; 1300d0e274afSLorenzo Bianconi u8 hw_bss_idx; 1301d0e274afSLorenzo Bianconi u8 band_idx; 1302d0e274afSLorenzo Bianconi __le32 conn_type; 1303d0e274afSLorenzo Bianconi u8 conn_state; 1304d0e274afSLorenzo Bianconi u8 wmm_idx; 1305d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1306d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 1307d0e274afSLorenzo Bianconi __le16 bcn_interval; 1308d0e274afSLorenzo Bianconi u8 dtim_period; 1309d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 1310d0e274afSLorenzo Bianconi * bit(1): B 1311d0e274afSLorenzo Bianconi * bit(2): G 1312d0e274afSLorenzo Bianconi * bit(3): GN 1313d0e274afSLorenzo Bianconi * bit(4): AN 1314d0e274afSLorenzo Bianconi * bit(5): AC 13153cf3e01bSLorenzo Bianconi * bit(6): AX2 13163cf3e01bSLorenzo Bianconi * bit(7): AX5 13173cf3e01bSLorenzo Bianconi * bit(8): AX6 1318d0e274afSLorenzo Bianconi */ 1319d0e274afSLorenzo Bianconi __le16 sta_idx; 13203cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 13213cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 13223cf3e01bSLorenzo Bianconi u8 pad[1]; 1323d0e274afSLorenzo Bianconi } __packed; 1324d0e274afSLorenzo Bianconi 1325d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 1326d0e274afSLorenzo Bianconi __le16 tag; 1327d0e274afSLorenzo Bianconi __le16 len; 1328d0e274afSLorenzo Bianconi u8 qos; 1329d0e274afSLorenzo Bianconi u8 pad[3]; 1330d0e274afSLorenzo Bianconi } __packed; 1331d0e274afSLorenzo Bianconi 1332d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 1333d0e274afSLorenzo Bianconi u8 bss_idx; 1334d0e274afSLorenzo Bianconi u8 reason; 1335d0e274afSLorenzo Bianconi u8 pad[2]; 1336d0e274afSLorenzo Bianconi } __packed; 1337d0e274afSLorenzo Bianconi 1338d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 1339d0e274afSLorenzo Bianconi u8 bss_idx; 1340d0e274afSLorenzo Bianconi u8 is_absent; 1341d0e274afSLorenzo Bianconi u8 free_quota; 1342d0e274afSLorenzo Bianconi u8 pad; 1343d0e274afSLorenzo Bianconi } __packed; 1344d0e274afSLorenzo Bianconi 1345399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 1346399090efSLorenzo Bianconi __le32 ssid_len; 1347399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1348399090efSLorenzo Bianconi } __packed; 1349399090efSLorenzo Bianconi 1350399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 1351399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 1352399090efSLorenzo Bianconi * 2: 5.0GHz 1353399090efSLorenzo Bianconi * Others: Reserved 1354399090efSLorenzo Bianconi */ 1355399090efSLorenzo Bianconi u8 channel_num; 1356399090efSLorenzo Bianconi } __packed; 1357399090efSLorenzo Bianconi 1358399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 1359399090efSLorenzo Bianconi __le32 rssi_th; 1360399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1361399090efSLorenzo Bianconi u8 ssid_len; 1362399090efSLorenzo Bianconi u8 rsv[3]; 1363399090efSLorenzo Bianconi } __packed; 1364399090efSLorenzo Bianconi 1365399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 1366399090efSLorenzo Bianconi u8 seq_num; 1367399090efSLorenzo Bianconi u8 bss_idx; 1368399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 1369399090efSLorenzo Bianconi * 1: ACTIVE SCAN 1370399090efSLorenzo Bianconi */ 1371399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 1372399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 1373399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 1374399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 1375399090efSLorenzo Bianconi */ 1376399090efSLorenzo Bianconi u8 ssids_num; 1377399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 1378399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 1379399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 1380399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 1381399090efSLorenzo Bianconi */ 1382399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 1383399090efSLorenzo Bianconi * 1: Support fields after ies. 1384399090efSLorenzo Bianconi */ 1385399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 1386399090efSLorenzo Bianconi __le16 probe_delay_time; 1387399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 1388399090efSLorenzo Bianconi __le16 timeout_value; 1389399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 1390399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 1391399090efSLorenzo Bianconi * 2: Only 5GHz channels 1392399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 1393399090efSLorenzo Bianconi * 4: Specified channels 1394399090efSLorenzo Bianconi * Others: Reserved 1395399090efSLorenzo Bianconi */ 1396399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 1397399090efSLorenzo Bianconi /* valid when channels_num is set */ 1398399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 1399399090efSLorenzo Bianconi __le16 ies_len; 1400399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 1401399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 1402399090efSLorenzo Bianconi u8 ext_channels_num; 1403399090efSLorenzo Bianconi u8 ext_ssids_num; 1404399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 1405399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 1406399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 1407399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1408399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 1409399090efSLorenzo Bianconi u8 pad[63]; 1410399090efSLorenzo Bianconi u8 ssid_type_ext; 1411399090efSLorenzo Bianconi } __packed; 1412399090efSLorenzo Bianconi 1413399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 1414399090efSLorenzo Bianconi 1415399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 1416399090efSLorenzo Bianconi u8 seq_num; 1417399090efSLorenzo Bianconi u8 sparse_channel_num; 1418399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 1419399090efSLorenzo Bianconi u8 complete_channel_num; 1420399090efSLorenzo Bianconi u8 current_state; 1421399090efSLorenzo Bianconi u8 version; 1422399090efSLorenzo Bianconi u8 pad; 1423399090efSLorenzo Bianconi __le32 beacon_scan_num; 1424399090efSLorenzo Bianconi u8 pno_enabled; 1425399090efSLorenzo Bianconi u8 pad2[3]; 1426399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 1427399090efSLorenzo Bianconi u8 pad3[3]; 1428399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1429399090efSLorenzo Bianconi /* idle format for channel_idle_time 1430399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 1431399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 1432399090efSLorenzo Bianconi * 2: dwell time (16us) 1433399090efSLorenzo Bianconi */ 1434399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1435399090efSLorenzo Bianconi /* beacon and probe response count */ 1436399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1437399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1438399090efSLorenzo Bianconi __le32 beacon_2g_num; 1439399090efSLorenzo Bianconi __le32 beacon_5g_num; 1440399090efSLorenzo Bianconi } __packed; 1441399090efSLorenzo Bianconi 1442399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 1443399090efSLorenzo Bianconi u8 version; 1444399090efSLorenzo Bianconi u8 seq_num; 1445399090efSLorenzo Bianconi u8 stop_on_match; 1446399090efSLorenzo Bianconi u8 ssids_num; 1447399090efSLorenzo Bianconi u8 match_num; 1448399090efSLorenzo Bianconi u8 pad; 1449399090efSLorenzo Bianconi __le16 ie_len; 1450399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 1451399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 1452399090efSLorenzo Bianconi u8 channel_type; 1453399090efSLorenzo Bianconi u8 channels_num; 1454399090efSLorenzo Bianconi u8 intervals_num; 14557139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 1456399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 1457abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 14587139b5c0SSean Wang union { 14597139b5c0SSean Wang struct { 14607139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 1461399090efSLorenzo Bianconi u8 pad2[58]; 14627139b5c0SSean Wang } mt7663; 14637139b5c0SSean Wang struct { 14647139b5c0SSean Wang u8 bss_idx; 1465b94c0ed6SDeren Wu u8 pad1[3]; 1466b94c0ed6SDeren Wu __le32 delay; 1467b94c0ed6SDeren Wu u8 pad2[12]; 14689f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 14699f367c81SDeren Wu u8 pad3[38]; 14707139b5c0SSean Wang } mt7921; 14717139b5c0SSean Wang }; 1472399090efSLorenzo Bianconi } __packed; 1473399090efSLorenzo Bianconi 1474399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 1475399090efSLorenzo Bianconi u8 seq_num; 1476399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 1477399090efSLorenzo Bianconi __le16 pad; 1478399090efSLorenzo Bianconi } __packed; 1479399090efSLorenzo Bianconi 1480b4b880b9SYN Chen struct bss_info_uni_bss_color { 1481b4b880b9SYN Chen __le16 tag; 1482b4b880b9SYN Chen __le16 len; 1483b4b880b9SYN Chen u8 enable; 1484b4b880b9SYN Chen u8 bss_color; 1485b4b880b9SYN Chen u8 rsv[2]; 1486b4b880b9SYN Chen } __packed; 1487b4b880b9SYN Chen 1488d0e274afSLorenzo Bianconi struct bss_info_uni_he { 1489d0e274afSLorenzo Bianconi __le16 tag; 1490d0e274afSLorenzo Bianconi __le16 len; 1491d0e274afSLorenzo Bianconi __le16 he_rts_thres; 1492d0e274afSLorenzo Bianconi u8 he_pe_duration; 1493d0e274afSLorenzo Bianconi u8 su_disable; 1494d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 1495d0e274afSLorenzo Bianconi u8 rsv[2]; 1496d0e274afSLorenzo Bianconi } __packed; 1497d0e274afSLorenzo Bianconi 149855d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 149955d4c19cSLorenzo Bianconi __le16 tag; 150055d4c19cSLorenzo Bianconi __le16 len; 150155d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 150255d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 150355d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 150455d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 150555d4c19cSLorenzo Bianconi * 1: rekey offload disable 150655d4c19cSLorenzo Bianconi * 2: rekey update 150755d4c19cSLorenzo Bianconi */ 150855d4c19cSLorenzo Bianconi u8 keyid; 1509d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 1510d741abeaSLeon Yen u8 pad[1]; 151155d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 151255d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 151355d4c19cSLorenzo Bianconi __le32 group_cipher; 151455d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 151555d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 1516d741abeaSLeon Yen u8 reserverd[4]; 151755d4c19cSLorenzo Bianconi } __packed; 151855d4c19cSLorenzo Bianconi 151955d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 152055d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 152155d4c19cSLorenzo Bianconi 152255d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 152355d4c19cSLorenzo Bianconi __le16 tag; 152455d4c19cSLorenzo Bianconi __le16 len; 152555d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 152655d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 152755d4c19cSLorenzo Bianconi * 1: enable 152855d4c19cSLorenzo Bianconi */ 152955d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 153055d4c19cSLorenzo Bianconi u8 pad; 153155d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 153255d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 153355d4c19cSLorenzo Bianconi u8 rsv[4]; 153455d4c19cSLorenzo Bianconi } __packed; 153555d4c19cSLorenzo Bianconi 153655d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 153755d4c19cSLorenzo Bianconi __le16 tag; 153855d4c19cSLorenzo Bianconi __le16 len; 153955d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 154055d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 154155d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 154255d4c19cSLorenzo Bianconi */ 154355d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 154455d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 154555d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 154655d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 154755d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 154855d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 154955d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 155055d4c19cSLorenzo Bianconi */ 155155d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 155255d4c19cSLorenzo Bianconi * 0x1: HIF_USB 155355d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 155455d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 155555d4c19cSLorenzo Bianconi */ 155655d4c19cSLorenzo Bianconi u8 pad; 155755d4c19cSLorenzo Bianconi u8 rsv[4]; 155855d4c19cSLorenzo Bianconi } __packed; 155955d4c19cSLorenzo Bianconi 156055d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 156155d4c19cSLorenzo Bianconi __le16 tag; 156255d4c19cSLorenzo Bianconi __le16 len; 156355d4c19cSLorenzo Bianconi u8 gpio_pin; 156455d4c19cSLorenzo Bianconi u8 trigger_lvl; 156555d4c19cSLorenzo Bianconi u8 pad[2]; 156655d4c19cSLorenzo Bianconi __le32 gpio_interval; 156755d4c19cSLorenzo Bianconi u8 rsv[4]; 156855d4c19cSLorenzo Bianconi } __packed; 156955d4c19cSLorenzo Bianconi 157055d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 157155d4c19cSLorenzo Bianconi __le16 tag; 157255d4c19cSLorenzo Bianconi __le16 len; 157355d4c19cSLorenzo Bianconi u8 mode; 157455d4c19cSLorenzo Bianconi u8 ips_num; 157555d4c19cSLorenzo Bianconi u8 option; 157655d4c19cSLorenzo Bianconi u8 pad[1]; 157755d4c19cSLorenzo Bianconi } __packed; 157855d4c19cSLorenzo Bianconi 157955d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 158055d4c19cSLorenzo Bianconi __le16 tag; 158155d4c19cSLorenzo Bianconi __le16 len; 158255d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 158355d4c19cSLorenzo Bianconi * 1: suspend mode enabled 158455d4c19cSLorenzo Bianconi */ 158555d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 158655d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 158755d4c19cSLorenzo Bianconi * 1: update by wow dtim 158855d4c19cSLorenzo Bianconi */ 158955d4c19cSLorenzo Bianconi u8 pad[5]; 159055d4c19cSLorenzo Bianconi } __packed; 159155d4c19cSLorenzo Bianconi 1592f5056657SSean Wang enum mt76_sta_info_state { 1593f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 1594f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 1595f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 1596f5056657SSean Wang }; 1597f5056657SSean Wang 15985802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 15995802106fSLorenzo Bianconi struct ieee80211_sta *sta; 16005802106fSLorenzo Bianconi struct mt76_wcid *wcid; 16015802106fSLorenzo Bianconi 16025802106fSLorenzo Bianconi struct ieee80211_vif *vif; 16035802106fSLorenzo Bianconi 160482453b1cSLorenzo Bianconi bool offload_fw; 16055802106fSLorenzo Bianconi bool enable; 1606f5056657SSean Wang bool newly; 16075802106fSLorenzo Bianconi int cmd; 16085802106fSLorenzo Bianconi u8 rcpi; 1609f5056657SSean Wang u8 state; 16105802106fSLorenzo Bianconi }; 16115802106fSLorenzo Bianconi 161218369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 161318369a4fSLorenzo Bianconi 161418369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 161518369a4fSLorenzo Bianconi u8 channel; 161618369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 161718369a4fSLorenzo Bianconi } __packed; 161818369a4fSLorenzo Bianconi 161918369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 162018369a4fSLorenzo Bianconi /* DW0 - common info*/ 162118369a4fSLorenzo Bianconi u8 ver; 162218369a4fSLorenzo Bianconi u8 pad0; 162318369a4fSLorenzo Bianconi __le16 len; 162418369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 162518369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 16269b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 162718369a4fSLorenzo Bianconi u8 last_msg; 162818369a4fSLorenzo Bianconi u8 pad1; 162918369a4fSLorenzo Bianconi /* DW3 */ 163018369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 163118369a4fSLorenzo Bianconi u8 pad2[32]; 163218369a4fSLorenzo Bianconi } __packed; 163318369a4fSLorenzo Bianconi 1634c0b21255SSean Wang struct mt76_connac_config { 1635c0b21255SSean Wang __le16 id; 1636c0b21255SSean Wang u8 type; 1637c0b21255SSean Wang u8 resp_type; 1638c0b21255SSean Wang __le16 data_size; 1639c0b21255SSean Wang __le16 resv; 1640c0b21255SSean Wang u8 data[320]; 1641c0b21255SSean Wang } __packed; 1642c0b21255SSean Wang 164309c874a1SLorenzo Bianconi static inline enum mcu_cipher_type 164409c874a1SLorenzo Bianconi mt76_connac_mcu_get_cipher(int cipher) 164509c874a1SLorenzo Bianconi { 164609c874a1SLorenzo Bianconi switch (cipher) { 164709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP40: 164809c874a1SLorenzo Bianconi return MCU_CIPHER_WEP40; 164909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP104: 165009c874a1SLorenzo Bianconi return MCU_CIPHER_WEP104; 165109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_TKIP: 165209c874a1SLorenzo Bianconi return MCU_CIPHER_TKIP; 165309c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_AES_CMAC: 165409c874a1SLorenzo Bianconi return MCU_CIPHER_BIP_CMAC_128; 165509c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP: 165609c874a1SLorenzo Bianconi return MCU_CIPHER_AES_CCMP; 165709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP_256: 165809c874a1SLorenzo Bianconi return MCU_CIPHER_CCMP_256; 165909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP: 166009c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP; 166109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP_256: 166209c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP_256; 166309c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_SMS4: 166409c874a1SLorenzo Bianconi return MCU_CIPHER_WAPI; 166509c874a1SLorenzo Bianconi default: 166609c874a1SLorenzo Bianconi return MCU_CIPHER_NONE; 166709c874a1SLorenzo Bianconi } 166809c874a1SLorenzo Bianconi } 166909c874a1SLorenzo Bianconi 16709e90c351SLorenzo Bianconi static inline u32 16719e90c351SLorenzo Bianconi mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa) 16729e90c351SLorenzo Bianconi { 16739e90c351SLorenzo Bianconi u32 ret = 0; 16749e90c351SLorenzo Bianconi 16759e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_SET_ENCRYPT ? 16769e90c351SLorenzo Bianconi DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0; 16779e90c351SLorenzo Bianconi if (is_mt7921(dev)) 16789e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_ENCRY_MODE ? 16799e90c351SLorenzo Bianconi DL_CONFIG_ENCRY_MODE_SEL : 0; 16809e90c351SLorenzo Bianconi ret |= FIELD_PREP(DL_MODE_KEY_IDX, 16819e90c351SLorenzo Bianconi FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 16829e90c351SLorenzo Bianconi ret |= DL_MODE_NEED_RSP; 16839e90c351SLorenzo Bianconi ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; 16849e90c351SLorenzo Bianconi 16859e90c351SLorenzo Bianconi return ret; 16869e90c351SLorenzo Bianconi } 16879e90c351SLorenzo Bianconi 168867aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 168967aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 169067aa2743SLorenzo Bianconi 169167aa2743SLorenzo Bianconi static inline void 169267aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 169367aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 169467aa2743SLorenzo Bianconi { 169567aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 169667aa2743SLorenzo Bianconi 16972fec2ea6SLorenzo Bianconi if (!is_connac_v1(dev)) { 169867aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 169967aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 170067aa2743SLorenzo Bianconi } else { 170167aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 170267aa2743SLorenzo Bianconi } 170367aa2743SLorenzo Bianconi } 170467aa2743SLorenzo Bianconi 1705d0e274afSLorenzo Bianconi struct sk_buff * 1706e2c93b68SLorenzo Bianconi __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1707e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid, int len); 1708e2c93b68SLorenzo Bianconi static inline struct sk_buff * 1709d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1710e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid) 1711e2c93b68SLorenzo Bianconi { 1712e2c93b68SLorenzo Bianconi return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 1713e2c93b68SLorenzo Bianconi MT76_CONNAC_STA_UPDATE_MAX_SIZE); 1714e2c93b68SLorenzo Bianconi } 1715e2c93b68SLorenzo Bianconi 1716d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1717d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1718d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1719d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1720d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1721d0e274afSLorenzo Bianconi void *sta_wtbl); 1722d0e274afSLorenzo Bianconi static inline struct tlv * 1723d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1724d0e274afSLorenzo Bianconi { 1725d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1726d0e274afSLorenzo Bianconi } 1727d0e274afSLorenzo Bianconi 1728d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1729d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1730d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1731d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1732f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1733f5056657SSean Wang bool newly); 1734d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1735d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1736d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1737d0e274afSLorenzo Bianconi void *wtbl_tlv); 1738d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1739868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 174066978204SFelix Fietkau struct mt76_wcid *wcid, 1741d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 174224299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 174324299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 174424299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 17455a521c0fSLorenzo Bianconi int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 17465a521c0fSLorenzo Bianconi struct ieee80211_vif *vif, 17475a521c0fSLorenzo Bianconi struct ieee80211_sta *sta); 1748d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1749d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 17505802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1751f5056657SSean Wang u8 rcpi, u8 state); 1752d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1753d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1754499da720SMeiChia Chiu void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc); 1755d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1756d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1757d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1758d0e274afSLorenzo Bianconi void *wtbl_tlv); 1759d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1760d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1761d0e274afSLorenzo Bianconi bool enable, bool tx); 1762d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1763d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1764d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1765d0e274afSLorenzo Bianconi bool enable); 1766d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1767d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1768b5322e44SLorenzo Bianconi int cmd, bool enable, bool tx); 1769c1eab241SSean Wang int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy, 1770c1eab241SSean Wang struct mt76_vif *vif, 1771c1eab241SSean Wang struct ieee80211_chanctx_conf *ctx); 1772d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1773d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1774d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1775a0ab9c31SSean Wang bool enable, 1776a0ab9c31SSean Wang struct ieee80211_chanctx_conf *ctx); 1777f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 17785802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1779d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1780d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1781d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1782d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1783d0e274afSLorenzo Bianconi bool hdr_trans); 1784d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1785d0e274afSLorenzo Bianconi u32 mode); 1786d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1787d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1788d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1789f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1790d0e274afSLorenzo Bianconi 1791399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1792399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1793399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1794399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1795399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1796399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1797399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1798399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1799399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1800399090efSLorenzo Bianconi bool enable); 1801f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1802f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1803f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 180455d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 180555d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 180655d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 180755d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 180855d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 180955d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1810f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1811f5056657SSean Wang enum ieee80211_sta_state old_state, 1812f5056657SSean Wang enum ieee80211_sta_state new_state); 18130da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1814c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 18150da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 18160da3c795SSean Wang struct mt76_connac_coredump *coredump); 181718369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 18181f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 18191f832887SLorenzo Bianconi struct ieee80211_vif *vif); 182087f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 182187f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1822e6d557a7SLorenzo Bianconi 1823e6d557a7SLorenzo Bianconi const struct ieee80211_sta_he_cap * 1824e6d557a7SLorenzo Bianconi mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); 1825e6d557a7SLorenzo Bianconi u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1826e6d557a7SLorenzo Bianconi enum nl80211_band band, struct ieee80211_sta *sta); 18276683d988SLorenzo Bianconi 18286683d988SLorenzo Bianconi int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 18296683d988SLorenzo Bianconi struct mt76_connac_sta_key_conf *sta_key_conf, 18306683d988SLorenzo Bianconi struct ieee80211_key_conf *key, int mcu_cmd, 18316683d988SLorenzo Bianconi struct mt76_wcid *wcid, enum set_key_cmd cmd); 183254735e11SLorenzo Bianconi 183364f4e823SLorenzo Bianconi void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif); 183454735e11SLorenzo Bianconi void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 183554735e11SLorenzo Bianconi struct ieee80211_vif *vif); 183649126ac1SLorenzo Bianconi int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 183749126ac1SLorenzo Bianconi struct ieee80211_vif *vif, 183849126ac1SLorenzo Bianconi struct ieee80211_sta *sta, 183995b5946eSChad Monroe struct mt76_phy *phy, u16 wlan_idx, 184049126ac1SLorenzo Bianconi bool enable); 1841836c0c98SLorenzo Bianconi void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 1842836c0c98SLorenzo Bianconi struct ieee80211_sta *sta); 18432557e568SLorenzo Bianconi void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 18442557e568SLorenzo Bianconi struct ieee80211_sta *sta, 18452557e568SLorenzo Bianconi void *sta_wtbl, void *wtbl_tlv); 184648d743d1SLorenzo Bianconi int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); 1847ae90bdd6SLorenzo Bianconi int mt76_connac_mcu_restart(struct mt76_dev *dev); 184897cef84dSLorenzo Bianconi int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 184997cef84dSLorenzo Bianconi u8 rx_sel, u8 val); 1850b9ec2710SLorenzo Bianconi int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 1851b9ec2710SLorenzo Bianconi const char *fw_wa); 185228fec923SLorenzo Bianconi int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name); 1853d2f5c8edSLorenzo Bianconi int mt76_connac2_mcu_fill_message(struct mt76_dev *mdev, struct sk_buff *skb, 1854d2f5c8edSLorenzo Bianconi int cmd, int *wait_seq); 1855d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1856