1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7d0e274afSLorenzo Bianconi #include "mt76.h" 8d0e274afSLorenzo Bianconi 9399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_IE_LEN 600 10399090efSLorenzo Bianconi #define MT76_CONNAC_MAX_SCHED_SCAN_INTERVAL 10 11399090efSLorenzo Bianconi #define MT76_CONNAC_MAX_SCHED_SCAN_SSID 10 12399090efSLorenzo Bianconi #define MT76_CONNAC_MAX_SCAN_MATCH 16 13399090efSLorenzo Bianconi 14d0e274afSLorenzo Bianconi enum { 15d0e274afSLorenzo Bianconi CMD_CBW_20MHZ = IEEE80211_STA_RX_BW_20, 16d0e274afSLorenzo Bianconi CMD_CBW_40MHZ = IEEE80211_STA_RX_BW_40, 17d0e274afSLorenzo Bianconi CMD_CBW_80MHZ = IEEE80211_STA_RX_BW_80, 18d0e274afSLorenzo Bianconi CMD_CBW_160MHZ = IEEE80211_STA_RX_BW_160, 19d0e274afSLorenzo Bianconi CMD_CBW_10MHZ, 20d0e274afSLorenzo Bianconi CMD_CBW_5MHZ, 21d0e274afSLorenzo Bianconi CMD_CBW_8080MHZ, 22d0e274afSLorenzo Bianconi 23d0e274afSLorenzo Bianconi CMD_HE_MCS_BW80 = 0, 24d0e274afSLorenzo Bianconi CMD_HE_MCS_BW160, 25d0e274afSLorenzo Bianconi CMD_HE_MCS_BW8080, 26d0e274afSLorenzo Bianconi CMD_HE_MCS_BW_NUM 27d0e274afSLorenzo Bianconi }; 28d0e274afSLorenzo Bianconi 29d0e274afSLorenzo Bianconi enum { 30d0e274afSLorenzo Bianconi HW_BSSID_0 = 0x0, 31d0e274afSLorenzo Bianconi HW_BSSID_1, 32d0e274afSLorenzo Bianconi HW_BSSID_2, 33d0e274afSLorenzo Bianconi HW_BSSID_3, 34d0e274afSLorenzo Bianconi HW_BSSID_MAX = HW_BSSID_3, 35d0e274afSLorenzo Bianconi EXT_BSSID_START = 0x10, 36d0e274afSLorenzo Bianconi EXT_BSSID_1, 37d0e274afSLorenzo Bianconi EXT_BSSID_15 = 0x1f, 38d0e274afSLorenzo Bianconi EXT_BSSID_MAX = EXT_BSSID_15, 39d0e274afSLorenzo Bianconi REPEATER_BSSID_START = 0x20, 40d0e274afSLorenzo Bianconi REPEATER_BSSID_MAX = 0x3f, 41d0e274afSLorenzo Bianconi }; 42d0e274afSLorenzo Bianconi 43d0e274afSLorenzo Bianconi struct tlv { 44d0e274afSLorenzo Bianconi __le16 tag; 45d0e274afSLorenzo Bianconi __le16 len; 46d0e274afSLorenzo Bianconi } __packed; 47d0e274afSLorenzo Bianconi 48d0e274afSLorenzo Bianconi /* sta_rec */ 49d0e274afSLorenzo Bianconi 50d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 51d0e274afSLorenzo Bianconi u8 rsv[2]; 52d0e274afSLorenzo Bianconi __le16 tlv_num; 53d0e274afSLorenzo Bianconi } __packed; 54d0e274afSLorenzo Bianconi 55d0e274afSLorenzo Bianconi struct sta_req_hdr { 56d0e274afSLorenzo Bianconi u8 bss_idx; 57d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 58d0e274afSLorenzo Bianconi __le16 tlv_num; 59d0e274afSLorenzo Bianconi u8 is_tlv_append; 60d0e274afSLorenzo Bianconi u8 muar_idx; 61d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 62d0e274afSLorenzo Bianconi u8 rsv; 63d0e274afSLorenzo Bianconi } __packed; 64d0e274afSLorenzo Bianconi 65d0e274afSLorenzo Bianconi struct sta_rec_basic { 66d0e274afSLorenzo Bianconi __le16 tag; 67d0e274afSLorenzo Bianconi __le16 len; 68d0e274afSLorenzo Bianconi __le32 conn_type; 69d0e274afSLorenzo Bianconi u8 conn_state; 70d0e274afSLorenzo Bianconi u8 qos; 71d0e274afSLorenzo Bianconi __le16 aid; 72d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 73d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 74d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 75d0e274afSLorenzo Bianconi __le16 extra_info; 76d0e274afSLorenzo Bianconi } __packed; 77d0e274afSLorenzo Bianconi 78d0e274afSLorenzo Bianconi struct sta_rec_ht { 79d0e274afSLorenzo Bianconi __le16 tag; 80d0e274afSLorenzo Bianconi __le16 len; 81d0e274afSLorenzo Bianconi __le16 ht_cap; 82d0e274afSLorenzo Bianconi u16 rsv; 83d0e274afSLorenzo Bianconi } __packed; 84d0e274afSLorenzo Bianconi 85d0e274afSLorenzo Bianconi struct sta_rec_vht { 86d0e274afSLorenzo Bianconi __le16 tag; 87d0e274afSLorenzo Bianconi __le16 len; 88d0e274afSLorenzo Bianconi __le32 vht_cap; 89d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 90d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 91d0e274afSLorenzo Bianconi /* mt7921 */ 92d0e274afSLorenzo Bianconi u8 rts_bw_sig; 93d0e274afSLorenzo Bianconi u8 rsv[3]; 94d0e274afSLorenzo Bianconi } __packed; 95d0e274afSLorenzo Bianconi 96d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 97d0e274afSLorenzo Bianconi __le16 tag; 98d0e274afSLorenzo Bianconi __le16 len; 99d0e274afSLorenzo Bianconi u8 dac_map; 100d0e274afSLorenzo Bianconi u8 tac_map; 101d0e274afSLorenzo Bianconi u8 max_sp; 102d0e274afSLorenzo Bianconi u8 rsv0; 103d0e274afSLorenzo Bianconi __le16 listen_interval; 104d0e274afSLorenzo Bianconi u8 rsv1[2]; 105d0e274afSLorenzo Bianconi } __packed; 106d0e274afSLorenzo Bianconi 107d0e274afSLorenzo Bianconi struct sta_rec_ba { 108d0e274afSLorenzo Bianconi __le16 tag; 109d0e274afSLorenzo Bianconi __le16 len; 110d0e274afSLorenzo Bianconi u8 tid; 111d0e274afSLorenzo Bianconi u8 ba_type; 112d0e274afSLorenzo Bianconi u8 amsdu; 113d0e274afSLorenzo Bianconi u8 ba_en; 114d0e274afSLorenzo Bianconi __le16 ssn; 115d0e274afSLorenzo Bianconi __le16 winsize; 116d0e274afSLorenzo Bianconi } __packed; 117d0e274afSLorenzo Bianconi 118d0e274afSLorenzo Bianconi struct sta_rec_he { 119d0e274afSLorenzo Bianconi __le16 tag; 120d0e274afSLorenzo Bianconi __le16 len; 121d0e274afSLorenzo Bianconi 122d0e274afSLorenzo Bianconi __le32 he_cap; 123d0e274afSLorenzo Bianconi 124d0e274afSLorenzo Bianconi u8 t_frame_dur; 125d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 126d0e274afSLorenzo Bianconi u8 bw_set; 127d0e274afSLorenzo Bianconi u8 device_class; 128d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 129d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 130d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 131d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 132d0e274afSLorenzo Bianconi u8 dcm_max_ru; 133d0e274afSLorenzo Bianconi u8 punc_pream_rx; 134d0e274afSLorenzo Bianconi u8 pkt_ext; 135d0e274afSLorenzo Bianconi u8 rsv1; 136d0e274afSLorenzo Bianconi 137d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 138d0e274afSLorenzo Bianconi 139d0e274afSLorenzo Bianconi u8 rsv2[2]; 140d0e274afSLorenzo Bianconi } __packed; 141d0e274afSLorenzo Bianconi 142d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 143d0e274afSLorenzo Bianconi __le16 tag; 144d0e274afSLorenzo Bianconi __le16 len; 145d0e274afSLorenzo Bianconi u8 max_amsdu_num; 146d0e274afSLorenzo Bianconi u8 max_mpdu_size; 147d0e274afSLorenzo Bianconi u8 amsdu_en; 148d0e274afSLorenzo Bianconi u8 rsv; 149d0e274afSLorenzo Bianconi } __packed; 150d0e274afSLorenzo Bianconi 151d0e274afSLorenzo Bianconi struct sta_rec_state { 152d0e274afSLorenzo Bianconi __le16 tag; 153d0e274afSLorenzo Bianconi __le16 len; 154d0e274afSLorenzo Bianconi __le32 flags; 155d0e274afSLorenzo Bianconi u8 state; 156d0e274afSLorenzo Bianconi u8 vht_opmode; 157d0e274afSLorenzo Bianconi u8 action; 158d0e274afSLorenzo Bianconi u8 rsv[1]; 159d0e274afSLorenzo Bianconi } __packed; 160d0e274afSLorenzo Bianconi 161d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 162d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 163d0e274afSLorenzo Bianconi __le16 tag; 164d0e274afSLorenzo Bianconi __le16 len; 165d0e274afSLorenzo Bianconi __le16 legacy; 166d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 167d0e274afSLorenzo Bianconi } __packed; 168d0e274afSLorenzo Bianconi 169d0e274afSLorenzo Bianconi struct sta_rec_phy { 170d0e274afSLorenzo Bianconi __le16 tag; 171d0e274afSLorenzo Bianconi __le16 len; 172d0e274afSLorenzo Bianconi __le16 basic_rate; 173d0e274afSLorenzo Bianconi u8 phy_type; 174d0e274afSLorenzo Bianconi u8 ampdu; 175d0e274afSLorenzo Bianconi u8 rts_policy; 176d0e274afSLorenzo Bianconi u8 rcpi; 177d0e274afSLorenzo Bianconi u8 rsv[2]; 178d0e274afSLorenzo Bianconi } __packed; 179d0e274afSLorenzo Bianconi 180d0e274afSLorenzo Bianconi /* wtbl_rec */ 181d0e274afSLorenzo Bianconi 182d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 183d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 184d0e274afSLorenzo Bianconi u8 operation; 185d0e274afSLorenzo Bianconi __le16 tlv_num; 186d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 187d0e274afSLorenzo Bianconi u8 rsv[3]; 188d0e274afSLorenzo Bianconi } __packed; 189d0e274afSLorenzo Bianconi 190d0e274afSLorenzo Bianconi struct wtbl_generic { 191d0e274afSLorenzo Bianconi __le16 tag; 192d0e274afSLorenzo Bianconi __le16 len; 193d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 194d0e274afSLorenzo Bianconi u8 muar_idx; 195d0e274afSLorenzo Bianconi u8 skip_tx; 196d0e274afSLorenzo Bianconi u8 cf_ack; 197d0e274afSLorenzo Bianconi u8 qos; 198d0e274afSLorenzo Bianconi u8 mesh; 199d0e274afSLorenzo Bianconi u8 adm; 200d0e274afSLorenzo Bianconi __le16 partial_aid; 201d0e274afSLorenzo Bianconi u8 baf_en; 202d0e274afSLorenzo Bianconi u8 aad_om; 203d0e274afSLorenzo Bianconi } __packed; 204d0e274afSLorenzo Bianconi 205d0e274afSLorenzo Bianconi struct wtbl_rx { 206d0e274afSLorenzo Bianconi __le16 tag; 207d0e274afSLorenzo Bianconi __le16 len; 208d0e274afSLorenzo Bianconi u8 rcid; 209d0e274afSLorenzo Bianconi u8 rca1; 210d0e274afSLorenzo Bianconi u8 rca2; 211d0e274afSLorenzo Bianconi u8 rv; 212d0e274afSLorenzo Bianconi u8 rsv[4]; 213d0e274afSLorenzo Bianconi } __packed; 214d0e274afSLorenzo Bianconi 215d0e274afSLorenzo Bianconi struct wtbl_ht { 216d0e274afSLorenzo Bianconi __le16 tag; 217d0e274afSLorenzo Bianconi __le16 len; 218d0e274afSLorenzo Bianconi u8 ht; 219d0e274afSLorenzo Bianconi u8 ldpc; 220d0e274afSLorenzo Bianconi u8 af; 221d0e274afSLorenzo Bianconi u8 mm; 222d0e274afSLorenzo Bianconi u8 rsv[4]; 223d0e274afSLorenzo Bianconi } __packed; 224d0e274afSLorenzo Bianconi 225d0e274afSLorenzo Bianconi struct wtbl_vht { 226d0e274afSLorenzo Bianconi __le16 tag; 227d0e274afSLorenzo Bianconi __le16 len; 228d0e274afSLorenzo Bianconi u8 ldpc; 229d0e274afSLorenzo Bianconi u8 dyn_bw; 230d0e274afSLorenzo Bianconi u8 vht; 231d0e274afSLorenzo Bianconi u8 txop_ps; 232d0e274afSLorenzo Bianconi u8 rsv[4]; 233d0e274afSLorenzo Bianconi } __packed; 234d0e274afSLorenzo Bianconi 235d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 236d0e274afSLorenzo Bianconi __le16 tag; 237d0e274afSLorenzo Bianconi __le16 len; 238d0e274afSLorenzo Bianconi u8 txps; 239d0e274afSLorenzo Bianconi u8 rsv[3]; 240d0e274afSLorenzo Bianconi } __packed; 241d0e274afSLorenzo Bianconi 242d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 243d0e274afSLorenzo Bianconi __le16 tag; 244d0e274afSLorenzo Bianconi __le16 len; 245d0e274afSLorenzo Bianconi u8 to_ds; 246d0e274afSLorenzo Bianconi u8 from_ds; 247d0e274afSLorenzo Bianconi u8 disable_rx_trans; 248d0e274afSLorenzo Bianconi u8 rsv; 249d0e274afSLorenzo Bianconi } __packed; 250d0e274afSLorenzo Bianconi 251d0e274afSLorenzo Bianconi struct wtbl_ba { 252d0e274afSLorenzo Bianconi __le16 tag; 253d0e274afSLorenzo Bianconi __le16 len; 254d0e274afSLorenzo Bianconi /* common */ 255d0e274afSLorenzo Bianconi u8 tid; 256d0e274afSLorenzo Bianconi u8 ba_type; 257d0e274afSLorenzo Bianconi u8 rsv0[2]; 258d0e274afSLorenzo Bianconi /* originator only */ 259d0e274afSLorenzo Bianconi __le16 sn; 260d0e274afSLorenzo Bianconi u8 ba_en; 261d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 262d0e274afSLorenzo Bianconi __le16 ba_winsize; 263d0e274afSLorenzo Bianconi /* recipient only */ 264d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 265d0e274afSLorenzo Bianconi u8 rst_ba_tid; 266d0e274afSLorenzo Bianconi u8 rst_ba_sel; 267d0e274afSLorenzo Bianconi u8 rst_ba_sb; 268d0e274afSLorenzo Bianconi u8 band_idx; 269d0e274afSLorenzo Bianconi u8 rsv1[4]; 270d0e274afSLorenzo Bianconi } __packed; 271d0e274afSLorenzo Bianconi 272d0e274afSLorenzo Bianconi struct wtbl_smps { 273d0e274afSLorenzo Bianconi __le16 tag; 274d0e274afSLorenzo Bianconi __le16 len; 275d0e274afSLorenzo Bianconi u8 smps; 276d0e274afSLorenzo Bianconi u8 rsv[3]; 277d0e274afSLorenzo Bianconi } __packed; 278d0e274afSLorenzo Bianconi 279d0e274afSLorenzo Bianconi /* mt7615 only */ 280d0e274afSLorenzo Bianconi 281d0e274afSLorenzo Bianconi struct wtbl_bf { 282d0e274afSLorenzo Bianconi __le16 tag; 283d0e274afSLorenzo Bianconi __le16 len; 284d0e274afSLorenzo Bianconi u8 ibf; 285d0e274afSLorenzo Bianconi u8 ebf; 286d0e274afSLorenzo Bianconi u8 ibf_vht; 287d0e274afSLorenzo Bianconi u8 ebf_vht; 288d0e274afSLorenzo Bianconi u8 gid; 289d0e274afSLorenzo Bianconi u8 pfmu_idx; 290d0e274afSLorenzo Bianconi u8 rsv[2]; 291d0e274afSLorenzo Bianconi } __packed; 292d0e274afSLorenzo Bianconi 293d0e274afSLorenzo Bianconi struct wtbl_pn { 294d0e274afSLorenzo Bianconi __le16 tag; 295d0e274afSLorenzo Bianconi __le16 len; 296d0e274afSLorenzo Bianconi u8 pn[6]; 297d0e274afSLorenzo Bianconi u8 rsv[2]; 298d0e274afSLorenzo Bianconi } __packed; 299d0e274afSLorenzo Bianconi 300d0e274afSLorenzo Bianconi struct wtbl_spe { 301d0e274afSLorenzo Bianconi __le16 tag; 302d0e274afSLorenzo Bianconi __le16 len; 303d0e274afSLorenzo Bianconi u8 spe_idx; 304d0e274afSLorenzo Bianconi u8 rsv[3]; 305d0e274afSLorenzo Bianconi } __packed; 306d0e274afSLorenzo Bianconi 307d0e274afSLorenzo Bianconi struct wtbl_raw { 308d0e274afSLorenzo Bianconi __le16 tag; 309d0e274afSLorenzo Bianconi __le16 len; 310d0e274afSLorenzo Bianconi u8 wtbl_idx; 311d0e274afSLorenzo Bianconi u8 dw; 312d0e274afSLorenzo Bianconi u8 rsv[2]; 313d0e274afSLorenzo Bianconi __le32 msk; 314d0e274afSLorenzo Bianconi __le32 val; 315d0e274afSLorenzo Bianconi } __packed; 316d0e274afSLorenzo Bianconi 317d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 318d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 319d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 320d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 321d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 322d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 323d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 324d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 325d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 326d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 327d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 328d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 329d0e274afSLorenzo Bianconi 330d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 331d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 332d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 333d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 334d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 335d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 336d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 337d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 338d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 339d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 340d0e274afSLorenzo Bianconi 341d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_BA_SIZE (sizeof(struct wtbl_req_hdr) + \ 342d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba)) 343d0e274afSLorenzo Bianconi 344d0e274afSLorenzo Bianconi enum { 345d0e274afSLorenzo Bianconi STA_REC_BASIC, 346d0e274afSLorenzo Bianconi STA_REC_RA, 347d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 348d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 349d0e274afSLorenzo Bianconi STA_REC_BF, 350d0e274afSLorenzo Bianconi STA_REC_AMSDU, 351d0e274afSLorenzo Bianconi STA_REC_BA, 352d0e274afSLorenzo Bianconi STA_REC_STATE, 353d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 354d0e274afSLorenzo Bianconi STA_REC_HT, 355d0e274afSLorenzo Bianconi STA_REC_VHT, 356d0e274afSLorenzo Bianconi STA_REC_APPS, 357d0e274afSLorenzo Bianconi STA_REC_KEY, 358d0e274afSLorenzo Bianconi STA_REC_WTBL, 359d0e274afSLorenzo Bianconi STA_REC_HE, 360d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 361d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 362d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 363d0e274afSLorenzo Bianconi STA_REC_MURU, 364d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 365d0e274afSLorenzo Bianconi STA_REC_BFEE, 366d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 367d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 368d0e274afSLorenzo Bianconi }; 369d0e274afSLorenzo Bianconi 370d0e274afSLorenzo Bianconi enum { 371d0e274afSLorenzo Bianconi WTBL_GENERIC, 372d0e274afSLorenzo Bianconi WTBL_RX, 373d0e274afSLorenzo Bianconi WTBL_HT, 374d0e274afSLorenzo Bianconi WTBL_VHT, 375d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 376d0e274afSLorenzo Bianconi WTBL_TX_PS, 377d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 378d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 379d0e274afSLorenzo Bianconi WTBL_BA, 380d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 381d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 382d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 383d0e274afSLorenzo Bianconi WTBL_BF, 384d0e274afSLorenzo Bianconi WTBL_SMPS, 385d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 386d0e274afSLorenzo Bianconi WTBL_PN, 387d0e274afSLorenzo Bianconi WTBL_SPE, 388d0e274afSLorenzo Bianconi WTBL_MAX_NUM 389d0e274afSLorenzo Bianconi }; 390d0e274afSLorenzo Bianconi 391d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 392d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 393d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 394d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 395d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 396d0e274afSLorenzo Bianconi 397d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 398d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 399d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 400d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 401d0e274afSLorenzo Bianconi 402d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 403d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 404d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 405d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 406d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 407d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 408d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 409d0e274afSLorenzo Bianconi 410d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 411d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 412d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 413d0e274afSLorenzo Bianconi 414d0e274afSLorenzo Bianconi /* HE MAC */ 415d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 416d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 417d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 418d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 419d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 420d0e274afSLorenzo Bianconi /* HE PHY */ 421d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 422d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 423d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 424d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 425d0e274afSLorenzo Bianconi /* STBC */ 426d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 427d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 428d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 429d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 430d0e274afSLorenzo Bianconi /* GI */ 431d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 432d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 433d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 434d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 435d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 436d0e274afSLorenzo Bianconi /* 242 TONE */ 437d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 438d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 439d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 440d0e274afSLorenzo Bianconi 441d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 442d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 443d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 444d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 445d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 446d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 447d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 448d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 449d0e274afSLorenzo Bianconi #define PHY_MODE_AX_6G BIT(8) 450d0e274afSLorenzo Bianconi 451d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 452d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 453d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 454d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 455d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 456d0e274afSLorenzo Bianconi 457d0e274afSLorenzo Bianconi enum { 458d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 459d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 460d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 461d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 462d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 463d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 464d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 465d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 466d0e274afSLorenzo Bianconi }; 467d0e274afSLorenzo Bianconi 468d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 469d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 470d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 471d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 472d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 473d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 474d0e274afSLorenzo Bianconi 475d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 476d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 477d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 478d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 479d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 480d0e274afSLorenzo Bianconi 481d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 482d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 483d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 484d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 485d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 486d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 487d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 488d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 489d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 490d0e274afSLorenzo Bianconi 491d0e274afSLorenzo Bianconi enum { 492d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 493d0e274afSLorenzo Bianconi WTBL_SET, 494d0e274afSLorenzo Bianconi WTBL_QUERY, 495d0e274afSLorenzo Bianconi WTBL_RESET_ALL 496d0e274afSLorenzo Bianconi }; 497d0e274afSLorenzo Bianconi 498d0e274afSLorenzo Bianconi enum { 499d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 500d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 501d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 502d0e274afSLorenzo Bianconi }; 503d0e274afSLorenzo Bianconi 504d0e274afSLorenzo Bianconi enum { 505d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 506d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 507d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 508d0e274afSLorenzo Bianconi }; 509d0e274afSLorenzo Bianconi 510d0e274afSLorenzo Bianconi enum { 511d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 512d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 513d0e274afSLorenzo Bianconi }; 514d0e274afSLorenzo Bianconi 515d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 516d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 517d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 518d0e274afSLorenzo Bianconi 519d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 520d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 521d0e274afSLorenzo Bianconi 522d0e274afSLorenzo Bianconi #define MCU_FW_PREFIX BIT(31) 523d0e274afSLorenzo Bianconi #define MCU_UNI_PREFIX BIT(30) 524d0e274afSLorenzo Bianconi #define MCU_CE_PREFIX BIT(29) 525d0e274afSLorenzo Bianconi #define MCU_QUERY_PREFIX BIT(28) 526d0e274afSLorenzo Bianconi #define MCU_CMD_MASK ~(MCU_FW_PREFIX | MCU_UNI_PREFIX | \ 527d0e274afSLorenzo Bianconi MCU_CE_PREFIX | MCU_QUERY_PREFIX) 528d0e274afSLorenzo Bianconi 529d0e274afSLorenzo Bianconi #define MCU_QUERY_MASK BIT(16) 530d0e274afSLorenzo Bianconi 531d0e274afSLorenzo Bianconi enum { 532d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 533d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 534d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 535d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 536d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 537d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 538d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 539d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 540d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 541d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 542d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 543d0e274afSLorenzo Bianconi MCU_EXT_CMD_GET_TEMP = 0x2c, 544d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 545d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 546d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 547d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 548d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 549d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 550d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 551d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 552d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 553d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 554d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 555d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 556d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 557d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x7c, 558d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 559d0e274afSLorenzo Bianconi }; 560d0e274afSLorenzo Bianconi 561d0e274afSLorenzo Bianconi enum { 562d0e274afSLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = MCU_UNI_PREFIX | 0x01, 563d0e274afSLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = MCU_UNI_PREFIX | 0x02, 564d0e274afSLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = MCU_UNI_PREFIX | 0x03, 565d0e274afSLorenzo Bianconi MCU_UNI_CMD_SUSPEND = MCU_UNI_PREFIX | 0x05, 566d0e274afSLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = MCU_UNI_PREFIX | 0x06, 567d0e274afSLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = MCU_UNI_PREFIX | 0x07, 568d0e274afSLorenzo Bianconi }; 569d0e274afSLorenzo Bianconi 570d0e274afSLorenzo Bianconi enum { 571d0e274afSLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = MCU_FW_PREFIX | 0x01, 572d0e274afSLorenzo Bianconi MCU_CMD_FW_START_REQ = MCU_FW_PREFIX | 0x02, 573d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 574d0e274afSLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = MCU_FW_PREFIX | 0x4, 575d0e274afSLorenzo Bianconi MCU_CMD_PATCH_START_REQ = MCU_FW_PREFIX | 0x05, 576d0e274afSLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = MCU_FW_PREFIX | 0x07, 577d0e274afSLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = MCU_FW_PREFIX | 0x10, 578d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 579d0e274afSLorenzo Bianconi MCU_CMD_FW_SCATTER = MCU_FW_PREFIX | 0xee, 580d0e274afSLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = MCU_FW_PREFIX | 0xef, 581d0e274afSLorenzo Bianconi }; 582d0e274afSLorenzo Bianconi 583d0e274afSLorenzo Bianconi /* offload mcu commands */ 584d0e274afSLorenzo Bianconi enum { 585d0e274afSLorenzo Bianconi MCU_CMD_START_HW_SCAN = MCU_CE_PREFIX | 0x03, 586d0e274afSLorenzo Bianconi MCU_CMD_SET_PS_PROFILE = MCU_CE_PREFIX | 0x05, 587d0e274afSLorenzo Bianconi MCU_CMD_SET_CHAN_DOMAIN = MCU_CE_PREFIX | 0x0f, 588d0e274afSLorenzo Bianconi MCU_CMD_SET_BSS_CONNECTED = MCU_CE_PREFIX | 0x16, 589d0e274afSLorenzo Bianconi MCU_CMD_SET_BSS_ABORT = MCU_CE_PREFIX | 0x17, 590d0e274afSLorenzo Bianconi MCU_CMD_CANCEL_HW_SCAN = MCU_CE_PREFIX | 0x1b, 591d0e274afSLorenzo Bianconi MCU_CMD_SET_ROC = MCU_CE_PREFIX | 0x1d, 592d0e274afSLorenzo Bianconi MCU_CMD_SET_P2P_OPPPS = MCU_CE_PREFIX | 0x33, 593d0e274afSLorenzo Bianconi MCU_CMD_SET_RATE_TX_POWER = MCU_CE_PREFIX | 0x5d, 594d0e274afSLorenzo Bianconi MCU_CMD_SCHED_SCAN_ENABLE = MCU_CE_PREFIX | 0x61, 595d0e274afSLorenzo Bianconi MCU_CMD_SCHED_SCAN_REQ = MCU_CE_PREFIX | 0x62, 596d0e274afSLorenzo Bianconi MCU_CMD_REG_WRITE = MCU_CE_PREFIX | 0xc0, 597d0e274afSLorenzo Bianconi MCU_CMD_REG_READ = MCU_CE_PREFIX | MCU_QUERY_MASK | 0xc0, 598d0e274afSLorenzo Bianconi }; 599d0e274afSLorenzo Bianconi 600d0e274afSLorenzo Bianconi enum { 601d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 602d0e274afSLorenzo Bianconi PATCH_SEM_GET 603d0e274afSLorenzo Bianconi }; 604d0e274afSLorenzo Bianconi 605d0e274afSLorenzo Bianconi enum { 606d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 607d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 608d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 609d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 610d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 611d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 612d0e274afSLorenzo Bianconi }; 613d0e274afSLorenzo Bianconi 614*55d4c19cSLorenzo Bianconi enum { 615*55d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 616*55d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 617*55d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 618*55d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 619*55d4c19cSLorenzo Bianconi }; 620*55d4c19cSLorenzo Bianconi 621*55d4c19cSLorenzo Bianconi enum { 622*55d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 623*55d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 624*55d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 625*55d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 626*55d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 627*55d4c19cSLorenzo Bianconi }; 628*55d4c19cSLorenzo Bianconi 629*55d4c19cSLorenzo Bianconi enum { 630*55d4c19cSLorenzo Bianconi WOW_USB = 1, 631*55d4c19cSLorenzo Bianconi WOW_PCIE = 2, 632*55d4c19cSLorenzo Bianconi WOW_GPIO = 3, 633*55d4c19cSLorenzo Bianconi }; 634*55d4c19cSLorenzo Bianconi 635d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 636d0e274afSLorenzo Bianconi __le16 tag; 637d0e274afSLorenzo Bianconi __le16 len; 638d0e274afSLorenzo Bianconi u8 active; 639d0e274afSLorenzo Bianconi u8 omac_idx; 640d0e274afSLorenzo Bianconi u8 hw_bss_idx; 641d0e274afSLorenzo Bianconi u8 band_idx; 642d0e274afSLorenzo Bianconi __le32 conn_type; 643d0e274afSLorenzo Bianconi u8 conn_state; 644d0e274afSLorenzo Bianconi u8 wmm_idx; 645d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 646d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 647d0e274afSLorenzo Bianconi __le16 bcn_interval; 648d0e274afSLorenzo Bianconi u8 dtim_period; 649d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 650d0e274afSLorenzo Bianconi * bit(1): B 651d0e274afSLorenzo Bianconi * bit(2): G 652d0e274afSLorenzo Bianconi * bit(3): GN 653d0e274afSLorenzo Bianconi * bit(4): AN 654d0e274afSLorenzo Bianconi * bit(5): AC 655d0e274afSLorenzo Bianconi */ 656d0e274afSLorenzo Bianconi __le16 sta_idx; 657d0e274afSLorenzo Bianconi u8 nonht_basic_phy; 658d0e274afSLorenzo Bianconi u8 pad[3]; 659d0e274afSLorenzo Bianconi } __packed; 660d0e274afSLorenzo Bianconi 661d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 662d0e274afSLorenzo Bianconi __le16 tag; 663d0e274afSLorenzo Bianconi __le16 len; 664d0e274afSLorenzo Bianconi u8 qos; 665d0e274afSLorenzo Bianconi u8 pad[3]; 666d0e274afSLorenzo Bianconi } __packed; 667d0e274afSLorenzo Bianconi 668d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 669d0e274afSLorenzo Bianconi u8 bss_idx; 670d0e274afSLorenzo Bianconi u8 reason; 671d0e274afSLorenzo Bianconi u8 pad[2]; 672d0e274afSLorenzo Bianconi } __packed; 673d0e274afSLorenzo Bianconi 674d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 675d0e274afSLorenzo Bianconi u8 bss_idx; 676d0e274afSLorenzo Bianconi u8 is_absent; 677d0e274afSLorenzo Bianconi u8 free_quota; 678d0e274afSLorenzo Bianconi u8 pad; 679d0e274afSLorenzo Bianconi } __packed; 680d0e274afSLorenzo Bianconi 681399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 682399090efSLorenzo Bianconi __le32 ssid_len; 683399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 684399090efSLorenzo Bianconi } __packed; 685399090efSLorenzo Bianconi 686399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 687399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 688399090efSLorenzo Bianconi * 2: 5.0GHz 689399090efSLorenzo Bianconi * Others: Reserved 690399090efSLorenzo Bianconi */ 691399090efSLorenzo Bianconi u8 channel_num; 692399090efSLorenzo Bianconi } __packed; 693399090efSLorenzo Bianconi 694399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 695399090efSLorenzo Bianconi __le32 rssi_th; 696399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 697399090efSLorenzo Bianconi u8 ssid_len; 698399090efSLorenzo Bianconi u8 rsv[3]; 699399090efSLorenzo Bianconi } __packed; 700399090efSLorenzo Bianconi 701399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 702399090efSLorenzo Bianconi u8 seq_num; 703399090efSLorenzo Bianconi u8 bss_idx; 704399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 705399090efSLorenzo Bianconi * 1: ACTIVE SCAN 706399090efSLorenzo Bianconi */ 707399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 708399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 709399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 710399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 711399090efSLorenzo Bianconi */ 712399090efSLorenzo Bianconi u8 ssids_num; 713399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 714399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 715399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 716399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 717399090efSLorenzo Bianconi */ 718399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 719399090efSLorenzo Bianconi * 1: Support fields after ies. 720399090efSLorenzo Bianconi */ 721399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 722399090efSLorenzo Bianconi __le16 probe_delay_time; 723399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 724399090efSLorenzo Bianconi __le16 timeout_value; 725399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 726399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 727399090efSLorenzo Bianconi * 2: Only 5GHz channels 728399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 729399090efSLorenzo Bianconi * 4: Specified channels 730399090efSLorenzo Bianconi * Others: Reserved 731399090efSLorenzo Bianconi */ 732399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 733399090efSLorenzo Bianconi /* valid when channels_num is set */ 734399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 735399090efSLorenzo Bianconi __le16 ies_len; 736399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 737399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 738399090efSLorenzo Bianconi u8 ext_channels_num; 739399090efSLorenzo Bianconi u8 ext_ssids_num; 740399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 741399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 742399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 743399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 744399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 745399090efSLorenzo Bianconi u8 pad[63]; 746399090efSLorenzo Bianconi u8 ssid_type_ext; 747399090efSLorenzo Bianconi } __packed; 748399090efSLorenzo Bianconi 749399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 750399090efSLorenzo Bianconi 751399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 752399090efSLorenzo Bianconi u8 seq_num; 753399090efSLorenzo Bianconi u8 sparse_channel_num; 754399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 755399090efSLorenzo Bianconi u8 complete_channel_num; 756399090efSLorenzo Bianconi u8 current_state; 757399090efSLorenzo Bianconi u8 version; 758399090efSLorenzo Bianconi u8 pad; 759399090efSLorenzo Bianconi __le32 beacon_scan_num; 760399090efSLorenzo Bianconi u8 pno_enabled; 761399090efSLorenzo Bianconi u8 pad2[3]; 762399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 763399090efSLorenzo Bianconi u8 pad3[3]; 764399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 765399090efSLorenzo Bianconi /* idle format for channel_idle_time 766399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 767399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 768399090efSLorenzo Bianconi * 2: dwell time (16us) 769399090efSLorenzo Bianconi */ 770399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 771399090efSLorenzo Bianconi /* beacon and probe response count */ 772399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 773399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 774399090efSLorenzo Bianconi __le32 beacon_2g_num; 775399090efSLorenzo Bianconi __le32 beacon_5g_num; 776399090efSLorenzo Bianconi } __packed; 777399090efSLorenzo Bianconi 778399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 779399090efSLorenzo Bianconi u8 version; 780399090efSLorenzo Bianconi u8 seq_num; 781399090efSLorenzo Bianconi u8 stop_on_match; 782399090efSLorenzo Bianconi u8 ssids_num; 783399090efSLorenzo Bianconi u8 match_num; 784399090efSLorenzo Bianconi u8 pad; 785399090efSLorenzo Bianconi __le16 ie_len; 786399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 787399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 788399090efSLorenzo Bianconi u8 channel_type; 789399090efSLorenzo Bianconi u8 channels_num; 790399090efSLorenzo Bianconi u8 intervals_num; 791399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) eable random mac address */ 792399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 793399090efSLorenzo Bianconi __le16 intervals[MT76_CONNAC_MAX_SCHED_SCAN_INTERVAL]; 794399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(0) in scan_func is set */ 795399090efSLorenzo Bianconi u8 pad2[58]; 796399090efSLorenzo Bianconi } __packed; 797399090efSLorenzo Bianconi 798399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 799399090efSLorenzo Bianconi u8 seq_num; 800399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 801399090efSLorenzo Bianconi __le16 pad; 802399090efSLorenzo Bianconi } __packed; 803399090efSLorenzo Bianconi 804d0e274afSLorenzo Bianconi struct bss_info_uni_he { 805d0e274afSLorenzo Bianconi __le16 tag; 806d0e274afSLorenzo Bianconi __le16 len; 807d0e274afSLorenzo Bianconi __le16 he_rts_thres; 808d0e274afSLorenzo Bianconi u8 he_pe_duration; 809d0e274afSLorenzo Bianconi u8 su_disable; 810d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 811d0e274afSLorenzo Bianconi u8 rsv[2]; 812d0e274afSLorenzo Bianconi } __packed; 813d0e274afSLorenzo Bianconi 814*55d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 815*55d4c19cSLorenzo Bianconi __le16 tag; 816*55d4c19cSLorenzo Bianconi __le16 len; 817*55d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 818*55d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 819*55d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 820*55d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 821*55d4c19cSLorenzo Bianconi * 1: rekey offload disable 822*55d4c19cSLorenzo Bianconi * 2: rekey update 823*55d4c19cSLorenzo Bianconi */ 824*55d4c19cSLorenzo Bianconi u8 keyid; 825*55d4c19cSLorenzo Bianconi u8 pad[2]; 826*55d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 827*55d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 828*55d4c19cSLorenzo Bianconi __le32 group_cipher; 829*55d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 830*55d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 831*55d4c19cSLorenzo Bianconi u8 option; /* 1: rekey data update without enabling offload */ 832*55d4c19cSLorenzo Bianconi u8 reserverd[3]; 833*55d4c19cSLorenzo Bianconi } __packed; 834*55d4c19cSLorenzo Bianconi 835*55d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 836*55d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 837*55d4c19cSLorenzo Bianconi 838*55d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 839*55d4c19cSLorenzo Bianconi __le16 tag; 840*55d4c19cSLorenzo Bianconi __le16 len; 841*55d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 842*55d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 843*55d4c19cSLorenzo Bianconi * 1: enable 844*55d4c19cSLorenzo Bianconi */ 845*55d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 846*55d4c19cSLorenzo Bianconi u8 pad; 847*55d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 848*55d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 849*55d4c19cSLorenzo Bianconi u8 rsv[4]; 850*55d4c19cSLorenzo Bianconi } __packed; 851*55d4c19cSLorenzo Bianconi 852*55d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 853*55d4c19cSLorenzo Bianconi __le16 tag; 854*55d4c19cSLorenzo Bianconi __le16 len; 855*55d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 856*55d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 857*55d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 858*55d4c19cSLorenzo Bianconi */ 859*55d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 860*55d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 861*55d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 862*55d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 863*55d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 864*55d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 865*55d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 866*55d4c19cSLorenzo Bianconi */ 867*55d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 868*55d4c19cSLorenzo Bianconi * 0x1: HIF_USB 869*55d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 870*55d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 871*55d4c19cSLorenzo Bianconi */ 872*55d4c19cSLorenzo Bianconi u8 pad; 873*55d4c19cSLorenzo Bianconi u8 rsv[4]; 874*55d4c19cSLorenzo Bianconi } __packed; 875*55d4c19cSLorenzo Bianconi 876*55d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 877*55d4c19cSLorenzo Bianconi __le16 tag; 878*55d4c19cSLorenzo Bianconi __le16 len; 879*55d4c19cSLorenzo Bianconi u8 gpio_pin; 880*55d4c19cSLorenzo Bianconi u8 trigger_lvl; 881*55d4c19cSLorenzo Bianconi u8 pad[2]; 882*55d4c19cSLorenzo Bianconi __le32 gpio_interval; 883*55d4c19cSLorenzo Bianconi u8 rsv[4]; 884*55d4c19cSLorenzo Bianconi } __packed; 885*55d4c19cSLorenzo Bianconi 886*55d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 887*55d4c19cSLorenzo Bianconi __le16 tag; 888*55d4c19cSLorenzo Bianconi __le16 len; 889*55d4c19cSLorenzo Bianconi u8 mode; 890*55d4c19cSLorenzo Bianconi u8 ips_num; 891*55d4c19cSLorenzo Bianconi u8 option; 892*55d4c19cSLorenzo Bianconi u8 pad[1]; 893*55d4c19cSLorenzo Bianconi } __packed; 894*55d4c19cSLorenzo Bianconi 895*55d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 896*55d4c19cSLorenzo Bianconi __le16 tag; 897*55d4c19cSLorenzo Bianconi __le16 len; 898*55d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 899*55d4c19cSLorenzo Bianconi * 1: suspend mode enabled 900*55d4c19cSLorenzo Bianconi */ 901*55d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 902*55d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 903*55d4c19cSLorenzo Bianconi * 1: update by wow dtim 904*55d4c19cSLorenzo Bianconi */ 905*55d4c19cSLorenzo Bianconi u8 pad[5]; 906*55d4c19cSLorenzo Bianconi } __packed; 907*55d4c19cSLorenzo Bianconi 908*55d4c19cSLorenzo Bianconi extern const struct wiphy_wowlan_support mt76_connac_wowlan_support; 909*55d4c19cSLorenzo Bianconi 910d0e274afSLorenzo Bianconi struct sk_buff * 911d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 912d0e274afSLorenzo Bianconi struct mt76_wcid *wcid); 913d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 914d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 915d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 916d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 917d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 918d0e274afSLorenzo Bianconi void *sta_wtbl); 919d0e274afSLorenzo Bianconi static inline struct tlv * 920d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 921d0e274afSLorenzo Bianconi { 922d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 923d0e274afSLorenzo Bianconi } 924d0e274afSLorenzo Bianconi 925d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 926d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 927d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 928d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 929d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, bool enable); 930d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 931d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 932d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 933d0e274afSLorenzo Bianconi void *wtbl_tlv); 934d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 935d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 936d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 937d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 938d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 939d0e274afSLorenzo Bianconi void *wtbl_tlv); 940d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 941d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 942d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 943d0e274afSLorenzo Bianconi void *wtbl_tlv); 944d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 945d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 946d0e274afSLorenzo Bianconi bool enable, bool tx); 947d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 948d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 949d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 950d0e274afSLorenzo Bianconi bool enable); 951d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 952d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 953d0e274afSLorenzo Bianconi bool enable, bool tx); 954d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 955d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 956d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 957d0e274afSLorenzo Bianconi bool enable); 958d0e274afSLorenzo Bianconi int mt76_connac_mcu_add_sta_cmd(struct mt76_phy *phy, 959d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 960d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 961d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 962d0e274afSLorenzo Bianconi bool enable, int cmd); 963d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 964d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 965d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 966d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 967d0e274afSLorenzo Bianconi bool hdr_trans); 968d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 969d0e274afSLorenzo Bianconi u32 mode); 970d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 971d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 972d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 973d0e274afSLorenzo Bianconi 974399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 975399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 976399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 977399090efSLorenzo Bianconi struct ieee80211_vif *vif); 978399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 979399090efSLorenzo Bianconi struct ieee80211_vif *vif, 980399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 981399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 982399090efSLorenzo Bianconi struct ieee80211_vif *vif, 983399090efSLorenzo Bianconi bool enable); 984*55d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 985*55d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 986*55d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 987*55d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 988*55d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 989*55d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 990d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 991