1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 99e90c351SLorenzo Bianconi #define FW_FEATURE_SET_ENCRYPT BIT(0) 109e90c351SLorenzo Bianconi #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 119e90c351SLorenzo Bianconi #define FW_FEATURE_ENCRY_MODE BIT(4) 129e90c351SLorenzo Bianconi #define FW_FEATURE_OVERRIDE_ADDR BIT(5) 139e90c351SLorenzo Bianconi 149e90c351SLorenzo Bianconi #define DL_MODE_ENCRYPT BIT(0) 159e90c351SLorenzo Bianconi #define DL_MODE_KEY_IDX GENMASK(2, 1) 169e90c351SLorenzo Bianconi #define DL_MODE_RESET_SEC_IV BIT(3) 179e90c351SLorenzo Bianconi #define DL_MODE_WORKING_PDA_CR4 BIT(4) 189e90c351SLorenzo Bianconi #define DL_MODE_VALID_RAM_ENTRY BIT(5) 199e90c351SLorenzo Bianconi #define DL_CONFIG_ENCRY_MODE_SEL BIT(6) 209e90c351SLorenzo Bianconi #define DL_MODE_NEED_RSP BIT(31) 219e90c351SLorenzo Bianconi 229e90c351SLorenzo Bianconi #define FW_START_OVERRIDE BIT(0) 239e90c351SLorenzo Bianconi #define FW_START_WORKING_PDA_CR4 BIT(2) 249e90c351SLorenzo Bianconi 259e90c351SLorenzo Bianconi #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) 269e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) 279e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_INFO 0x2 289e90c351SLorenzo Bianconi 29*28fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24) 30*28fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_PLAIN 0x00 31*28fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_AES 0x01 32*28fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_SCRAMBLE 0x02 33*28fec923SLorenzo Bianconi #define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0) 34*28fec923SLorenzo Bianconi #define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0) 35*28fec923SLorenzo Bianconi 363d8c636cSLorenzo Bianconi struct mt76_connac2_patch_hdr { 373d8c636cSLorenzo Bianconi char build_date[16]; 383d8c636cSLorenzo Bianconi char platform[4]; 393d8c636cSLorenzo Bianconi __be32 hw_sw_ver; 403d8c636cSLorenzo Bianconi __be32 patch_ver; 413d8c636cSLorenzo Bianconi __be16 checksum; 423d8c636cSLorenzo Bianconi u16 rsv; 433d8c636cSLorenzo Bianconi struct { 443d8c636cSLorenzo Bianconi __be32 patch_ver; 453d8c636cSLorenzo Bianconi __be32 subsys; 463d8c636cSLorenzo Bianconi __be32 feature; 473d8c636cSLorenzo Bianconi __be32 n_region; 483d8c636cSLorenzo Bianconi __be32 crc; 493d8c636cSLorenzo Bianconi u32 rsv[11]; 503d8c636cSLorenzo Bianconi } desc; 513d8c636cSLorenzo Bianconi } __packed; 523d8c636cSLorenzo Bianconi 533d8c636cSLorenzo Bianconi struct mt76_connac2_patch_sec { 543d8c636cSLorenzo Bianconi __be32 type; 553d8c636cSLorenzo Bianconi __be32 offs; 563d8c636cSLorenzo Bianconi __be32 size; 573d8c636cSLorenzo Bianconi union { 583d8c636cSLorenzo Bianconi __be32 spec[13]; 593d8c636cSLorenzo Bianconi struct { 603d8c636cSLorenzo Bianconi __be32 addr; 613d8c636cSLorenzo Bianconi __be32 len; 623d8c636cSLorenzo Bianconi __be32 sec_key_idx; 633d8c636cSLorenzo Bianconi __be32 align_len; 643d8c636cSLorenzo Bianconi u32 rsv[9]; 653d8c636cSLorenzo Bianconi } info; 663d8c636cSLorenzo Bianconi }; 673d8c636cSLorenzo Bianconi } __packed; 683d8c636cSLorenzo Bianconi 693d8c636cSLorenzo Bianconi struct mt76_connac2_fw_trailer { 703d8c636cSLorenzo Bianconi u8 chip_id; 713d8c636cSLorenzo Bianconi u8 eco_code; 723d8c636cSLorenzo Bianconi u8 n_region; 733d8c636cSLorenzo Bianconi u8 format_ver; 743d8c636cSLorenzo Bianconi u8 format_flag; 753d8c636cSLorenzo Bianconi u8 rsv[2]; 763d8c636cSLorenzo Bianconi char fw_ver[10]; 773d8c636cSLorenzo Bianconi char build_date[15]; 783d8c636cSLorenzo Bianconi __le32 crc; 793d8c636cSLorenzo Bianconi } __packed; 803d8c636cSLorenzo Bianconi 813d8c636cSLorenzo Bianconi struct mt76_connac2_fw_region { 823d8c636cSLorenzo Bianconi __le32 decomp_crc; 833d8c636cSLorenzo Bianconi __le32 decomp_len; 843d8c636cSLorenzo Bianconi __le32 decomp_blk_sz; 853d8c636cSLorenzo Bianconi u8 rsv[4]; 863d8c636cSLorenzo Bianconi __le32 addr; 873d8c636cSLorenzo Bianconi __le32 len; 883d8c636cSLorenzo Bianconi u8 feature_set; 893d8c636cSLorenzo Bianconi u8 rsv1[15]; 903d8c636cSLorenzo Bianconi } __packed; 913d8c636cSLorenzo Bianconi 92d0e274afSLorenzo Bianconi struct tlv { 93d0e274afSLorenzo Bianconi __le16 tag; 94d0e274afSLorenzo Bianconi __le16 len; 95d0e274afSLorenzo Bianconi } __packed; 96d0e274afSLorenzo Bianconi 975562d5f6SLorenzo Bianconi struct bss_info_omac { 985562d5f6SLorenzo Bianconi __le16 tag; 995562d5f6SLorenzo Bianconi __le16 len; 1005562d5f6SLorenzo Bianconi u8 hw_bss_idx; 1015562d5f6SLorenzo Bianconi u8 omac_idx; 1025562d5f6SLorenzo Bianconi u8 band_idx; 1035562d5f6SLorenzo Bianconi u8 rsv0; 1045562d5f6SLorenzo Bianconi __le32 conn_type; 1055562d5f6SLorenzo Bianconi u32 rsv1; 1065562d5f6SLorenzo Bianconi } __packed; 1075562d5f6SLorenzo Bianconi 1085562d5f6SLorenzo Bianconi struct bss_info_basic { 1095562d5f6SLorenzo Bianconi __le16 tag; 1105562d5f6SLorenzo Bianconi __le16 len; 1115562d5f6SLorenzo Bianconi __le32 network_type; 1125562d5f6SLorenzo Bianconi u8 active; 1135562d5f6SLorenzo Bianconi u8 rsv0; 1145562d5f6SLorenzo Bianconi __le16 bcn_interval; 1155562d5f6SLorenzo Bianconi u8 bssid[ETH_ALEN]; 1165562d5f6SLorenzo Bianconi u8 wmm_idx; 1175562d5f6SLorenzo Bianconi u8 dtim_period; 1185562d5f6SLorenzo Bianconi u8 bmc_wcid_lo; 1195562d5f6SLorenzo Bianconi u8 cipher; 1205562d5f6SLorenzo Bianconi u8 phy_mode; 1215562d5f6SLorenzo Bianconi u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */ 1225562d5f6SLorenzo Bianconi u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */ 1235562d5f6SLorenzo Bianconi u8 bmc_wcid_hi; /* high Byte and version */ 1245562d5f6SLorenzo Bianconi u8 rsv[2]; 1255562d5f6SLorenzo Bianconi } __packed; 1265562d5f6SLorenzo Bianconi 1275562d5f6SLorenzo Bianconi struct bss_info_rf_ch { 1285562d5f6SLorenzo Bianconi __le16 tag; 1295562d5f6SLorenzo Bianconi __le16 len; 1305562d5f6SLorenzo Bianconi u8 pri_ch; 1315562d5f6SLorenzo Bianconi u8 center_ch0; 1325562d5f6SLorenzo Bianconi u8 center_ch1; 1335562d5f6SLorenzo Bianconi u8 bw; 1345562d5f6SLorenzo Bianconi u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */ 1355562d5f6SLorenzo Bianconi u8 he_all_disable; /* 1: disallow all HETB, 0: allow */ 1365562d5f6SLorenzo Bianconi u8 rsv[2]; 1375562d5f6SLorenzo Bianconi } __packed; 1385562d5f6SLorenzo Bianconi 1395562d5f6SLorenzo Bianconi struct bss_info_ext_bss { 1405562d5f6SLorenzo Bianconi __le16 tag; 1415562d5f6SLorenzo Bianconi __le16 len; 1425562d5f6SLorenzo Bianconi __le32 mbss_tsf_offset; /* in unit of us */ 1435562d5f6SLorenzo Bianconi u8 rsv[8]; 1445562d5f6SLorenzo Bianconi } __packed; 1455562d5f6SLorenzo Bianconi 1465562d5f6SLorenzo Bianconi enum { 1475562d5f6SLorenzo Bianconi BSS_INFO_OMAC, 1485562d5f6SLorenzo Bianconi BSS_INFO_BASIC, 1495562d5f6SLorenzo Bianconi BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 1505562d5f6SLorenzo Bianconi BSS_INFO_PM, /* sta only */ 1515562d5f6SLorenzo Bianconi BSS_INFO_UAPSD, /* sta only */ 1525562d5f6SLorenzo Bianconi BSS_INFO_ROAM_DETECT, /* obsoleted */ 1535562d5f6SLorenzo Bianconi BSS_INFO_LQ_RM, /* obsoleted */ 1545562d5f6SLorenzo Bianconi BSS_INFO_EXT_BSS, 1555562d5f6SLorenzo Bianconi BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */ 1565562d5f6SLorenzo Bianconi BSS_INFO_SYNC_MODE, /* obsoleted */ 1575562d5f6SLorenzo Bianconi BSS_INFO_RA, 1585562d5f6SLorenzo Bianconi BSS_INFO_HW_AMSDU, 1595562d5f6SLorenzo Bianconi BSS_INFO_BSS_COLOR, 1605562d5f6SLorenzo Bianconi BSS_INFO_HE_BASIC, 1615562d5f6SLorenzo Bianconi BSS_INFO_PROTECT_INFO, 1625562d5f6SLorenzo Bianconi BSS_INFO_OFFLOAD, 1635562d5f6SLorenzo Bianconi BSS_INFO_11V_MBSSID, 1645562d5f6SLorenzo Bianconi BSS_INFO_MAX_NUM 1655562d5f6SLorenzo Bianconi }; 1665562d5f6SLorenzo Bianconi 167d0e274afSLorenzo Bianconi /* sta_rec */ 168d0e274afSLorenzo Bianconi 169d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 170d0e274afSLorenzo Bianconi u8 rsv[2]; 171d0e274afSLorenzo Bianconi __le16 tlv_num; 172d0e274afSLorenzo Bianconi } __packed; 173d0e274afSLorenzo Bianconi 174d0e274afSLorenzo Bianconi struct sta_req_hdr { 175d0e274afSLorenzo Bianconi u8 bss_idx; 176d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 177d0e274afSLorenzo Bianconi __le16 tlv_num; 178d0e274afSLorenzo Bianconi u8 is_tlv_append; 179d0e274afSLorenzo Bianconi u8 muar_idx; 180d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 181d0e274afSLorenzo Bianconi u8 rsv; 182d0e274afSLorenzo Bianconi } __packed; 183d0e274afSLorenzo Bianconi 184d0e274afSLorenzo Bianconi struct sta_rec_basic { 185d0e274afSLorenzo Bianconi __le16 tag; 186d0e274afSLorenzo Bianconi __le16 len; 187d0e274afSLorenzo Bianconi __le32 conn_type; 188d0e274afSLorenzo Bianconi u8 conn_state; 189d0e274afSLorenzo Bianconi u8 qos; 190d0e274afSLorenzo Bianconi __le16 aid; 191d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 192d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 193d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 194d0e274afSLorenzo Bianconi __le16 extra_info; 195d0e274afSLorenzo Bianconi } __packed; 196d0e274afSLorenzo Bianconi 197d0e274afSLorenzo Bianconi struct sta_rec_ht { 198d0e274afSLorenzo Bianconi __le16 tag; 199d0e274afSLorenzo Bianconi __le16 len; 200d0e274afSLorenzo Bianconi __le16 ht_cap; 201d0e274afSLorenzo Bianconi u16 rsv; 202d0e274afSLorenzo Bianconi } __packed; 203d0e274afSLorenzo Bianconi 204d0e274afSLorenzo Bianconi struct sta_rec_vht { 205d0e274afSLorenzo Bianconi __le16 tag; 206d0e274afSLorenzo Bianconi __le16 len; 207d0e274afSLorenzo Bianconi __le32 vht_cap; 208d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 209d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 2105562d5f6SLorenzo Bianconi /* mt7915 - mt7921 */ 211d0e274afSLorenzo Bianconi u8 rts_bw_sig; 212d0e274afSLorenzo Bianconi u8 rsv[3]; 213d0e274afSLorenzo Bianconi } __packed; 214d0e274afSLorenzo Bianconi 215d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 216d0e274afSLorenzo Bianconi __le16 tag; 217d0e274afSLorenzo Bianconi __le16 len; 218d0e274afSLorenzo Bianconi u8 dac_map; 219d0e274afSLorenzo Bianconi u8 tac_map; 220d0e274afSLorenzo Bianconi u8 max_sp; 221d0e274afSLorenzo Bianconi u8 rsv0; 222d0e274afSLorenzo Bianconi __le16 listen_interval; 223d0e274afSLorenzo Bianconi u8 rsv1[2]; 224d0e274afSLorenzo Bianconi } __packed; 225d0e274afSLorenzo Bianconi 226d0e274afSLorenzo Bianconi struct sta_rec_ba { 227d0e274afSLorenzo Bianconi __le16 tag; 228d0e274afSLorenzo Bianconi __le16 len; 229d0e274afSLorenzo Bianconi u8 tid; 230d0e274afSLorenzo Bianconi u8 ba_type; 231d0e274afSLorenzo Bianconi u8 amsdu; 232d0e274afSLorenzo Bianconi u8 ba_en; 233d0e274afSLorenzo Bianconi __le16 ssn; 234d0e274afSLorenzo Bianconi __le16 winsize; 235d0e274afSLorenzo Bianconi } __packed; 236d0e274afSLorenzo Bianconi 237d0e274afSLorenzo Bianconi struct sta_rec_he { 238d0e274afSLorenzo Bianconi __le16 tag; 239d0e274afSLorenzo Bianconi __le16 len; 240d0e274afSLorenzo Bianconi 241d0e274afSLorenzo Bianconi __le32 he_cap; 242d0e274afSLorenzo Bianconi 243d0e274afSLorenzo Bianconi u8 t_frame_dur; 244d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 245d0e274afSLorenzo Bianconi u8 bw_set; 246d0e274afSLorenzo Bianconi u8 device_class; 247d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 248d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 249d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 250d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 251d0e274afSLorenzo Bianconi u8 dcm_max_ru; 252d0e274afSLorenzo Bianconi u8 punc_pream_rx; 253d0e274afSLorenzo Bianconi u8 pkt_ext; 254d0e274afSLorenzo Bianconi u8 rsv1; 255d0e274afSLorenzo Bianconi 256d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 257d0e274afSLorenzo Bianconi 258d0e274afSLorenzo Bianconi u8 rsv2[2]; 259d0e274afSLorenzo Bianconi } __packed; 260d0e274afSLorenzo Bianconi 261d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 262d0e274afSLorenzo Bianconi __le16 tag; 263d0e274afSLorenzo Bianconi __le16 len; 264d0e274afSLorenzo Bianconi u8 max_amsdu_num; 265d0e274afSLorenzo Bianconi u8 max_mpdu_size; 266d0e274afSLorenzo Bianconi u8 amsdu_en; 267d0e274afSLorenzo Bianconi u8 rsv; 268d0e274afSLorenzo Bianconi } __packed; 269d0e274afSLorenzo Bianconi 270d0e274afSLorenzo Bianconi struct sta_rec_state { 271d0e274afSLorenzo Bianconi __le16 tag; 272d0e274afSLorenzo Bianconi __le16 len; 273d0e274afSLorenzo Bianconi __le32 flags; 274d0e274afSLorenzo Bianconi u8 state; 275d0e274afSLorenzo Bianconi u8 vht_opmode; 276d0e274afSLorenzo Bianconi u8 action; 277d0e274afSLorenzo Bianconi u8 rsv[1]; 278d0e274afSLorenzo Bianconi } __packed; 279d0e274afSLorenzo Bianconi 28099b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 28199b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 282d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 283d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 284d0e274afSLorenzo Bianconi __le16 tag; 285d0e274afSLorenzo Bianconi __le16 len; 286d0e274afSLorenzo Bianconi __le16 legacy; 287d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 288d0e274afSLorenzo Bianconi } __packed; 289d0e274afSLorenzo Bianconi 290d0e274afSLorenzo Bianconi struct sta_rec_phy { 291d0e274afSLorenzo Bianconi __le16 tag; 292d0e274afSLorenzo Bianconi __le16 len; 293d0e274afSLorenzo Bianconi __le16 basic_rate; 294d0e274afSLorenzo Bianconi u8 phy_type; 295d0e274afSLorenzo Bianconi u8 ampdu; 296d0e274afSLorenzo Bianconi u8 rts_policy; 297d0e274afSLorenzo Bianconi u8 rcpi; 298d0e274afSLorenzo Bianconi u8 rsv[2]; 299d0e274afSLorenzo Bianconi } __packed; 300d0e274afSLorenzo Bianconi 3015883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 3025883892bSLorenzo Bianconi __le16 tag; 3035883892bSLorenzo Bianconi __le16 len; 3045883892bSLorenzo Bianconi __le16 capa; 3055883892bSLorenzo Bianconi u8 rsv[2]; 3065883892bSLorenzo Bianconi } __packed; 3075883892bSLorenzo Bianconi 3085562d5f6SLorenzo Bianconi struct sec_key { 3095562d5f6SLorenzo Bianconi u8 cipher_id; 3105562d5f6SLorenzo Bianconi u8 cipher_len; 3115562d5f6SLorenzo Bianconi u8 key_id; 3125562d5f6SLorenzo Bianconi u8 key_len; 3135562d5f6SLorenzo Bianconi u8 key[32]; 3145562d5f6SLorenzo Bianconi } __packed; 3155562d5f6SLorenzo Bianconi 3165562d5f6SLorenzo Bianconi struct sta_rec_sec { 3175562d5f6SLorenzo Bianconi __le16 tag; 3185562d5f6SLorenzo Bianconi __le16 len; 3195562d5f6SLorenzo Bianconi u8 add; 3205562d5f6SLorenzo Bianconi u8 n_cipher; 3215562d5f6SLorenzo Bianconi u8 rsv[2]; 3225562d5f6SLorenzo Bianconi 3235562d5f6SLorenzo Bianconi struct sec_key key[2]; 3245562d5f6SLorenzo Bianconi } __packed; 3255562d5f6SLorenzo Bianconi 3265562d5f6SLorenzo Bianconi struct sta_rec_bf { 3275562d5f6SLorenzo Bianconi __le16 tag; 3285562d5f6SLorenzo Bianconi __le16 len; 3295562d5f6SLorenzo Bianconi 3305562d5f6SLorenzo Bianconi __le16 pfmu; /* 0xffff: no access right for PFMU */ 3315562d5f6SLorenzo Bianconi bool su_mu; /* 0: SU, 1: MU */ 3325562d5f6SLorenzo Bianconi u8 bf_cap; /* 0: iBF, 1: eBF */ 3335562d5f6SLorenzo Bianconi u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */ 3345562d5f6SLorenzo Bianconi u8 ndpa_rate; 3355562d5f6SLorenzo Bianconi u8 ndp_rate; 3365562d5f6SLorenzo Bianconi u8 rept_poll_rate; 3375562d5f6SLorenzo Bianconi u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */ 3385562d5f6SLorenzo Bianconi u8 ncol; 3395562d5f6SLorenzo Bianconi u8 nrow; 3405562d5f6SLorenzo Bianconi u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */ 3415562d5f6SLorenzo Bianconi 3425562d5f6SLorenzo Bianconi u8 mem_total; 3435562d5f6SLorenzo Bianconi u8 mem_20m; 3445562d5f6SLorenzo Bianconi struct { 3455562d5f6SLorenzo Bianconi u8 row; 3465562d5f6SLorenzo Bianconi u8 col: 6, row_msb: 2; 3475562d5f6SLorenzo Bianconi } mem[4]; 3485562d5f6SLorenzo Bianconi 3495562d5f6SLorenzo Bianconi __le16 smart_ant; 3505562d5f6SLorenzo Bianconi u8 se_idx; 3515562d5f6SLorenzo Bianconi u8 auto_sounding; /* b7: low traffic indicator 3525562d5f6SLorenzo Bianconi * b6: Stop sounding for this entry 3535562d5f6SLorenzo Bianconi * b5 ~ b0: postpone sounding 3545562d5f6SLorenzo Bianconi */ 3555562d5f6SLorenzo Bianconi u8 ibf_timeout; 3565562d5f6SLorenzo Bianconi u8 ibf_dbw; 3575562d5f6SLorenzo Bianconi u8 ibf_ncol; 3585562d5f6SLorenzo Bianconi u8 ibf_nrow; 3595562d5f6SLorenzo Bianconi u8 nrow_bw160; 3605562d5f6SLorenzo Bianconi u8 ncol_bw160; 3615562d5f6SLorenzo Bianconi u8 ru_start_idx; 3625562d5f6SLorenzo Bianconi u8 ru_end_idx; 3635562d5f6SLorenzo Bianconi 3645562d5f6SLorenzo Bianconi bool trigger_su; 3655562d5f6SLorenzo Bianconi bool trigger_mu; 3665562d5f6SLorenzo Bianconi bool ng16_su; 3675562d5f6SLorenzo Bianconi bool ng16_mu; 3685562d5f6SLorenzo Bianconi bool codebook42_su; 3695562d5f6SLorenzo Bianconi bool codebook75_mu; 3705562d5f6SLorenzo Bianconi 3715562d5f6SLorenzo Bianconi u8 he_ltf; 3725562d5f6SLorenzo Bianconi u8 rsv[3]; 3735562d5f6SLorenzo Bianconi } __packed; 3745562d5f6SLorenzo Bianconi 3755562d5f6SLorenzo Bianconi struct sta_rec_bfee { 3765562d5f6SLorenzo Bianconi __le16 tag; 3775562d5f6SLorenzo Bianconi __le16 len; 3785562d5f6SLorenzo Bianconi bool fb_identity_matrix; /* 1: feedback identity matrix */ 3795562d5f6SLorenzo Bianconi bool ignore_feedback; /* 1: ignore */ 3805562d5f6SLorenzo Bianconi u8 rsv[2]; 3815562d5f6SLorenzo Bianconi } __packed; 3825562d5f6SLorenzo Bianconi 3835562d5f6SLorenzo Bianconi struct sta_rec_muru { 3845562d5f6SLorenzo Bianconi __le16 tag; 3855562d5f6SLorenzo Bianconi __le16 len; 3865562d5f6SLorenzo Bianconi 3875562d5f6SLorenzo Bianconi struct { 3885562d5f6SLorenzo Bianconi bool ofdma_dl_en; 3895562d5f6SLorenzo Bianconi bool ofdma_ul_en; 3905562d5f6SLorenzo Bianconi bool mimo_dl_en; 3915562d5f6SLorenzo Bianconi bool mimo_ul_en; 3925562d5f6SLorenzo Bianconi u8 rsv[4]; 3935562d5f6SLorenzo Bianconi } cfg; 3945562d5f6SLorenzo Bianconi 3955562d5f6SLorenzo Bianconi struct { 3965562d5f6SLorenzo Bianconi u8 punc_pream_rx; 3975562d5f6SLorenzo Bianconi bool he_20m_in_40m_2g; 3985562d5f6SLorenzo Bianconi bool he_20m_in_160m; 3995562d5f6SLorenzo Bianconi bool he_80m_in_160m; 4005562d5f6SLorenzo Bianconi bool lt16_sigb; 4015562d5f6SLorenzo Bianconi bool rx_su_comp_sigb; 4025562d5f6SLorenzo Bianconi bool rx_su_non_comp_sigb; 4035562d5f6SLorenzo Bianconi u8 rsv; 4045562d5f6SLorenzo Bianconi } ofdma_dl; 4055562d5f6SLorenzo Bianconi 4065562d5f6SLorenzo Bianconi struct { 4075562d5f6SLorenzo Bianconi u8 t_frame_dur; 4085562d5f6SLorenzo Bianconi u8 mu_cascading; 4095562d5f6SLorenzo Bianconi u8 uo_ra; 4105562d5f6SLorenzo Bianconi u8 he_2x996_tone; 4115562d5f6SLorenzo Bianconi u8 rx_t_frame_11ac; 4125562d5f6SLorenzo Bianconi u8 rsv[3]; 4135562d5f6SLorenzo Bianconi } ofdma_ul; 4145562d5f6SLorenzo Bianconi 4155562d5f6SLorenzo Bianconi struct { 4165562d5f6SLorenzo Bianconi bool vht_mu_bfee; 4175562d5f6SLorenzo Bianconi bool partial_bw_dl_mimo; 4185562d5f6SLorenzo Bianconi u8 rsv[2]; 4195562d5f6SLorenzo Bianconi } mimo_dl; 4205562d5f6SLorenzo Bianconi 4215562d5f6SLorenzo Bianconi struct { 4225562d5f6SLorenzo Bianconi bool full_ul_mimo; 4235562d5f6SLorenzo Bianconi bool partial_ul_mimo; 4245562d5f6SLorenzo Bianconi u8 rsv[2]; 4255562d5f6SLorenzo Bianconi } mimo_ul; 4265562d5f6SLorenzo Bianconi } __packed; 4275562d5f6SLorenzo Bianconi 4285562d5f6SLorenzo Bianconi struct sta_phy { 4295562d5f6SLorenzo Bianconi u8 type; 4305562d5f6SLorenzo Bianconi u8 flag; 4315562d5f6SLorenzo Bianconi u8 stbc; 4325562d5f6SLorenzo Bianconi u8 sgi; 4335562d5f6SLorenzo Bianconi u8 bw; 4345562d5f6SLorenzo Bianconi u8 ldpc; 4355562d5f6SLorenzo Bianconi u8 mcs; 4365562d5f6SLorenzo Bianconi u8 nss; 4375562d5f6SLorenzo Bianconi u8 he_ltf; 4385562d5f6SLorenzo Bianconi }; 4395562d5f6SLorenzo Bianconi 4405562d5f6SLorenzo Bianconi struct sta_rec_ra { 4415562d5f6SLorenzo Bianconi __le16 tag; 4425562d5f6SLorenzo Bianconi __le16 len; 4435562d5f6SLorenzo Bianconi 4445562d5f6SLorenzo Bianconi u8 valid; 4455562d5f6SLorenzo Bianconi u8 auto_rate; 4465562d5f6SLorenzo Bianconi u8 phy_mode; 4475562d5f6SLorenzo Bianconi u8 channel; 4485562d5f6SLorenzo Bianconi u8 bw; 4495562d5f6SLorenzo Bianconi u8 disable_cck; 4505562d5f6SLorenzo Bianconi u8 ht_mcs32; 4515562d5f6SLorenzo Bianconi u8 ht_gf; 4525562d5f6SLorenzo Bianconi u8 ht_mcs[4]; 4535562d5f6SLorenzo Bianconi u8 mmps_mode; 4545562d5f6SLorenzo Bianconi u8 gband_256; 4555562d5f6SLorenzo Bianconi u8 af; 4565562d5f6SLorenzo Bianconi u8 auth_wapi_mode; 4575562d5f6SLorenzo Bianconi u8 rate_len; 4585562d5f6SLorenzo Bianconi 4595562d5f6SLorenzo Bianconi u8 supp_mode; 4605562d5f6SLorenzo Bianconi u8 supp_cck_rate; 4615562d5f6SLorenzo Bianconi u8 supp_ofdm_rate; 4625562d5f6SLorenzo Bianconi __le32 supp_ht_mcs; 4635562d5f6SLorenzo Bianconi __le16 supp_vht_mcs[4]; 4645562d5f6SLorenzo Bianconi 4655562d5f6SLorenzo Bianconi u8 op_mode; 4665562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 4675562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 4685562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 4695562d5f6SLorenzo Bianconi 4705562d5f6SLorenzo Bianconi __le32 sta_cap; 4715562d5f6SLorenzo Bianconi 4725562d5f6SLorenzo Bianconi struct sta_phy phy; 4735562d5f6SLorenzo Bianconi } __packed; 4745562d5f6SLorenzo Bianconi 4755562d5f6SLorenzo Bianconi struct sta_rec_ra_fixed { 4765562d5f6SLorenzo Bianconi __le16 tag; 4775562d5f6SLorenzo Bianconi __le16 len; 4785562d5f6SLorenzo Bianconi 4795562d5f6SLorenzo Bianconi __le32 field; 4805562d5f6SLorenzo Bianconi u8 op_mode; 4815562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 4825562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 4835562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 4845562d5f6SLorenzo Bianconi 4855562d5f6SLorenzo Bianconi struct sta_phy phy; 4865562d5f6SLorenzo Bianconi 4875562d5f6SLorenzo Bianconi u8 spe_en; 4885562d5f6SLorenzo Bianconi u8 short_preamble; 4895562d5f6SLorenzo Bianconi u8 is_5g; 4905562d5f6SLorenzo Bianconi u8 mmps_mode; 4915562d5f6SLorenzo Bianconi } __packed; 4925562d5f6SLorenzo Bianconi 493d0e274afSLorenzo Bianconi /* wtbl_rec */ 494d0e274afSLorenzo Bianconi 495d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 496d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 497d0e274afSLorenzo Bianconi u8 operation; 498d0e274afSLorenzo Bianconi __le16 tlv_num; 499d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 500d0e274afSLorenzo Bianconi u8 rsv[3]; 501d0e274afSLorenzo Bianconi } __packed; 502d0e274afSLorenzo Bianconi 503d0e274afSLorenzo Bianconi struct wtbl_generic { 504d0e274afSLorenzo Bianconi __le16 tag; 505d0e274afSLorenzo Bianconi __le16 len; 506d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 507d0e274afSLorenzo Bianconi u8 muar_idx; 508d0e274afSLorenzo Bianconi u8 skip_tx; 509d0e274afSLorenzo Bianconi u8 cf_ack; 510d0e274afSLorenzo Bianconi u8 qos; 511d0e274afSLorenzo Bianconi u8 mesh; 512d0e274afSLorenzo Bianconi u8 adm; 513d0e274afSLorenzo Bianconi __le16 partial_aid; 514d0e274afSLorenzo Bianconi u8 baf_en; 515d0e274afSLorenzo Bianconi u8 aad_om; 516d0e274afSLorenzo Bianconi } __packed; 517d0e274afSLorenzo Bianconi 518d0e274afSLorenzo Bianconi struct wtbl_rx { 519d0e274afSLorenzo Bianconi __le16 tag; 520d0e274afSLorenzo Bianconi __le16 len; 521d0e274afSLorenzo Bianconi u8 rcid; 522d0e274afSLorenzo Bianconi u8 rca1; 523d0e274afSLorenzo Bianconi u8 rca2; 524d0e274afSLorenzo Bianconi u8 rv; 525d0e274afSLorenzo Bianconi u8 rsv[4]; 526d0e274afSLorenzo Bianconi } __packed; 527d0e274afSLorenzo Bianconi 528d0e274afSLorenzo Bianconi struct wtbl_ht { 529d0e274afSLorenzo Bianconi __le16 tag; 530d0e274afSLorenzo Bianconi __le16 len; 531d0e274afSLorenzo Bianconi u8 ht; 532d0e274afSLorenzo Bianconi u8 ldpc; 533d0e274afSLorenzo Bianconi u8 af; 534d0e274afSLorenzo Bianconi u8 mm; 535d0e274afSLorenzo Bianconi u8 rsv[4]; 536d0e274afSLorenzo Bianconi } __packed; 537d0e274afSLorenzo Bianconi 538d0e274afSLorenzo Bianconi struct wtbl_vht { 539d0e274afSLorenzo Bianconi __le16 tag; 540d0e274afSLorenzo Bianconi __le16 len; 541d0e274afSLorenzo Bianconi u8 ldpc; 542d0e274afSLorenzo Bianconi u8 dyn_bw; 543d0e274afSLorenzo Bianconi u8 vht; 544d0e274afSLorenzo Bianconi u8 txop_ps; 545d0e274afSLorenzo Bianconi u8 rsv[4]; 546d0e274afSLorenzo Bianconi } __packed; 547d0e274afSLorenzo Bianconi 548d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 549d0e274afSLorenzo Bianconi __le16 tag; 550d0e274afSLorenzo Bianconi __le16 len; 551d0e274afSLorenzo Bianconi u8 txps; 552d0e274afSLorenzo Bianconi u8 rsv[3]; 553d0e274afSLorenzo Bianconi } __packed; 554d0e274afSLorenzo Bianconi 555d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 556d0e274afSLorenzo Bianconi __le16 tag; 557d0e274afSLorenzo Bianconi __le16 len; 558d0e274afSLorenzo Bianconi u8 to_ds; 559d0e274afSLorenzo Bianconi u8 from_ds; 560d4b98c63SRyder Lee u8 no_rx_trans; 561d0e274afSLorenzo Bianconi u8 rsv; 562d0e274afSLorenzo Bianconi } __packed; 563d0e274afSLorenzo Bianconi 564d0e274afSLorenzo Bianconi struct wtbl_ba { 565d0e274afSLorenzo Bianconi __le16 tag; 566d0e274afSLorenzo Bianconi __le16 len; 567d0e274afSLorenzo Bianconi /* common */ 568d0e274afSLorenzo Bianconi u8 tid; 569d0e274afSLorenzo Bianconi u8 ba_type; 570d0e274afSLorenzo Bianconi u8 rsv0[2]; 571d0e274afSLorenzo Bianconi /* originator only */ 572d0e274afSLorenzo Bianconi __le16 sn; 573d0e274afSLorenzo Bianconi u8 ba_en; 574d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 5755562d5f6SLorenzo Bianconi /* originator & recipient */ 576d0e274afSLorenzo Bianconi __le16 ba_winsize; 577d0e274afSLorenzo Bianconi /* recipient only */ 578d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 579d0e274afSLorenzo Bianconi u8 rst_ba_tid; 580d0e274afSLorenzo Bianconi u8 rst_ba_sel; 581d0e274afSLorenzo Bianconi u8 rst_ba_sb; 582d0e274afSLorenzo Bianconi u8 band_idx; 583d0e274afSLorenzo Bianconi u8 rsv1[4]; 584d0e274afSLorenzo Bianconi } __packed; 585d0e274afSLorenzo Bianconi 586d0e274afSLorenzo Bianconi struct wtbl_smps { 587d0e274afSLorenzo Bianconi __le16 tag; 588d0e274afSLorenzo Bianconi __le16 len; 589d0e274afSLorenzo Bianconi u8 smps; 590d0e274afSLorenzo Bianconi u8 rsv[3]; 591d0e274afSLorenzo Bianconi } __packed; 592d0e274afSLorenzo Bianconi 593d0e274afSLorenzo Bianconi /* mt7615 only */ 594d0e274afSLorenzo Bianconi 595d0e274afSLorenzo Bianconi struct wtbl_bf { 596d0e274afSLorenzo Bianconi __le16 tag; 597d0e274afSLorenzo Bianconi __le16 len; 598d0e274afSLorenzo Bianconi u8 ibf; 599d0e274afSLorenzo Bianconi u8 ebf; 600d0e274afSLorenzo Bianconi u8 ibf_vht; 601d0e274afSLorenzo Bianconi u8 ebf_vht; 602d0e274afSLorenzo Bianconi u8 gid; 603d0e274afSLorenzo Bianconi u8 pfmu_idx; 604d0e274afSLorenzo Bianconi u8 rsv[2]; 605d0e274afSLorenzo Bianconi } __packed; 606d0e274afSLorenzo Bianconi 607d0e274afSLorenzo Bianconi struct wtbl_pn { 608d0e274afSLorenzo Bianconi __le16 tag; 609d0e274afSLorenzo Bianconi __le16 len; 610d0e274afSLorenzo Bianconi u8 pn[6]; 611d0e274afSLorenzo Bianconi u8 rsv[2]; 612d0e274afSLorenzo Bianconi } __packed; 613d0e274afSLorenzo Bianconi 614d0e274afSLorenzo Bianconi struct wtbl_spe { 615d0e274afSLorenzo Bianconi __le16 tag; 616d0e274afSLorenzo Bianconi __le16 len; 617d0e274afSLorenzo Bianconi u8 spe_idx; 618d0e274afSLorenzo Bianconi u8 rsv[3]; 619d0e274afSLorenzo Bianconi } __packed; 620d0e274afSLorenzo Bianconi 621d0e274afSLorenzo Bianconi struct wtbl_raw { 622d0e274afSLorenzo Bianconi __le16 tag; 623d0e274afSLorenzo Bianconi __le16 len; 624d0e274afSLorenzo Bianconi u8 wtbl_idx; 625d0e274afSLorenzo Bianconi u8 dw; 626d0e274afSLorenzo Bianconi u8 rsv[2]; 627d0e274afSLorenzo Bianconi __le32 msk; 628d0e274afSLorenzo Bianconi __le32 val; 629d0e274afSLorenzo Bianconi } __packed; 630d0e274afSLorenzo Bianconi 631d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 632d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 633d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 634d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 635d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 636d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 637d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 638d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 639d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 640d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 641d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 642d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 643d0e274afSLorenzo Bianconi 644d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 645d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 6465562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bf) + \ 647d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 648d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 649d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 650d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 651d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 652d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 6535562d5f6SLorenzo Bianconi sizeof(struct sta_rec_muru) + \ 6545562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bfee) + \ 6555562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra) + \ 656e2c93b68SLorenzo Bianconi sizeof(struct sta_rec_sec) + \ 6575562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra_fixed) + \ 6585883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 659d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 660d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 661d0e274afSLorenzo Bianconi 662d0e274afSLorenzo Bianconi enum { 663d0e274afSLorenzo Bianconi STA_REC_BASIC, 664d0e274afSLorenzo Bianconi STA_REC_RA, 665d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 666d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 667d0e274afSLorenzo Bianconi STA_REC_BF, 668d0e274afSLorenzo Bianconi STA_REC_AMSDU, 669d0e274afSLorenzo Bianconi STA_REC_BA, 670d0e274afSLorenzo Bianconi STA_REC_STATE, 671d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 672d0e274afSLorenzo Bianconi STA_REC_HT, 673d0e274afSLorenzo Bianconi STA_REC_VHT, 674d0e274afSLorenzo Bianconi STA_REC_APPS, 675d0e274afSLorenzo Bianconi STA_REC_KEY, 676d0e274afSLorenzo Bianconi STA_REC_WTBL, 677d0e274afSLorenzo Bianconi STA_REC_HE, 678d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 679d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 680d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 681d0e274afSLorenzo Bianconi STA_REC_MURU, 682d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 683d0e274afSLorenzo Bianconi STA_REC_BFEE, 684d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 6855883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 686d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 687d0e274afSLorenzo Bianconi }; 688d0e274afSLorenzo Bianconi 689d0e274afSLorenzo Bianconi enum { 690d0e274afSLorenzo Bianconi WTBL_GENERIC, 691d0e274afSLorenzo Bianconi WTBL_RX, 692d0e274afSLorenzo Bianconi WTBL_HT, 693d0e274afSLorenzo Bianconi WTBL_VHT, 694d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 695d0e274afSLorenzo Bianconi WTBL_TX_PS, 696d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 697d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 698d0e274afSLorenzo Bianconi WTBL_BA, 699d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 700d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 701d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 702d0e274afSLorenzo Bianconi WTBL_BF, 703d0e274afSLorenzo Bianconi WTBL_SMPS, 704d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 705d0e274afSLorenzo Bianconi WTBL_PN, 706d0e274afSLorenzo Bianconi WTBL_SPE, 707d0e274afSLorenzo Bianconi WTBL_MAX_NUM 708d0e274afSLorenzo Bianconi }; 709d0e274afSLorenzo Bianconi 710d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 711d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 712d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 713d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 714d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 715d0e274afSLorenzo Bianconi 716d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 717d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 718d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 719d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 720d0e274afSLorenzo Bianconi 7214da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 7224da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 7234da64fe0SSean Wang 724d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 725d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 726d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 727d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 728d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 729d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 730d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 731d0e274afSLorenzo Bianconi 732d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 733d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 734d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 735d0e274afSLorenzo Bianconi 736d0e274afSLorenzo Bianconi /* HE MAC */ 737d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 738d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 739d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 740d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 741d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 742d0e274afSLorenzo Bianconi /* HE PHY */ 743d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 744d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 745d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 746d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 747d0e274afSLorenzo Bianconi /* STBC */ 748d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 749d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 750d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 751d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 752d0e274afSLorenzo Bianconi /* GI */ 753d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 754d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 755d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 756d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 757d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 758d0e274afSLorenzo Bianconi /* 242 TONE */ 759d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 760d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 761d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 762d0e274afSLorenzo Bianconi 763d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 764d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 765d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 766d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 767d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 768d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 769d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 770d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 771dfdf6725SLorenzo Bianconi 772dfdf6725SLorenzo Bianconi #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ 773d0e274afSLorenzo Bianconi 774d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 775d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 776d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 777d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 778d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 779d0e274afSLorenzo Bianconi 7805562d5f6SLorenzo Bianconi #define STA_CAP_WMM BIT(0) 7815562d5f6SLorenzo Bianconi #define STA_CAP_SGI_20 BIT(4) 7825562d5f6SLorenzo Bianconi #define STA_CAP_SGI_40 BIT(5) 7835562d5f6SLorenzo Bianconi #define STA_CAP_TX_STBC BIT(6) 7845562d5f6SLorenzo Bianconi #define STA_CAP_RX_STBC BIT(7) 7855562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_80 BIT(16) 7865562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_160 BIT(17) 7875562d5f6SLorenzo Bianconi #define STA_CAP_VHT_TX_STBC BIT(18) 7885562d5f6SLorenzo Bianconi #define STA_CAP_VHT_RX_STBC BIT(19) 7895562d5f6SLorenzo Bianconi #define STA_CAP_VHT_LDPC BIT(23) 7905562d5f6SLorenzo Bianconi #define STA_CAP_LDPC BIT(24) 7915562d5f6SLorenzo Bianconi #define STA_CAP_HT BIT(26) 7925562d5f6SLorenzo Bianconi #define STA_CAP_VHT BIT(27) 7935562d5f6SLorenzo Bianconi #define STA_CAP_HE BIT(28) 7945562d5f6SLorenzo Bianconi 795d0e274afSLorenzo Bianconi enum { 796d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 797d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 798d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 799d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 800d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 801d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 802d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 803d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 804d0e274afSLorenzo Bianconi }; 805d0e274afSLorenzo Bianconi 806d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 807d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 808d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 809d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 810d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 811d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 812d0e274afSLorenzo Bianconi 813d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 814d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 815d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 816d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 817d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 818d0e274afSLorenzo Bianconi 819d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 820d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 821d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 822d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 823d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 824d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 825d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 826d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 827d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 828d0e274afSLorenzo Bianconi 829d0e274afSLorenzo Bianconi enum { 830d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 831d0e274afSLorenzo Bianconi WTBL_SET, 832d0e274afSLorenzo Bianconi WTBL_QUERY, 833d0e274afSLorenzo Bianconi WTBL_RESET_ALL 834d0e274afSLorenzo Bianconi }; 835d0e274afSLorenzo Bianconi 836d0e274afSLorenzo Bianconi enum { 837d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 838d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 839d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 840d0e274afSLorenzo Bianconi }; 841d0e274afSLorenzo Bianconi 842d0e274afSLorenzo Bianconi enum { 843d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 844d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 845d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 846d0e274afSLorenzo Bianconi }; 847d0e274afSLorenzo Bianconi 848d0e274afSLorenzo Bianconi enum { 849d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 850d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 851d0e274afSLorenzo Bianconi }; 852d0e274afSLorenzo Bianconi 8535562d5f6SLorenzo Bianconi /* event table */ 8545562d5f6SLorenzo Bianconi enum { 8555562d5f6SLorenzo Bianconi MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, 8565562d5f6SLorenzo Bianconi MCU_EVENT_FW_START = 0x01, 8575562d5f6SLorenzo Bianconi MCU_EVENT_GENERIC = 0x01, 8585562d5f6SLorenzo Bianconi MCU_EVENT_ACCESS_REG = 0x02, 8595562d5f6SLorenzo Bianconi MCU_EVENT_MT_PATCH_SEM = 0x04, 8605562d5f6SLorenzo Bianconi MCU_EVENT_REG_ACCESS = 0x05, 8615562d5f6SLorenzo Bianconi MCU_EVENT_LP_INFO = 0x07, 8625562d5f6SLorenzo Bianconi MCU_EVENT_SCAN_DONE = 0x0d, 8635562d5f6SLorenzo Bianconi MCU_EVENT_TX_DONE = 0x0f, 8645562d5f6SLorenzo Bianconi MCU_EVENT_ROC = 0x10, 8655562d5f6SLorenzo Bianconi MCU_EVENT_BSS_ABSENCE = 0x11, 8665562d5f6SLorenzo Bianconi MCU_EVENT_BSS_BEACON_LOSS = 0x13, 8675562d5f6SLorenzo Bianconi MCU_EVENT_CH_PRIVILEGE = 0x18, 8685562d5f6SLorenzo Bianconi MCU_EVENT_SCHED_SCAN_DONE = 0x23, 8695562d5f6SLorenzo Bianconi MCU_EVENT_DBG_MSG = 0x27, 8705562d5f6SLorenzo Bianconi MCU_EVENT_TXPWR = 0xd0, 8715562d5f6SLorenzo Bianconi MCU_EVENT_EXT = 0xed, 8725562d5f6SLorenzo Bianconi MCU_EVENT_RESTART_DL = 0xef, 8735562d5f6SLorenzo Bianconi MCU_EVENT_COREDUMP = 0xf0, 8745562d5f6SLorenzo Bianconi }; 8755562d5f6SLorenzo Bianconi 8765562d5f6SLorenzo Bianconi /* ext event table */ 8775562d5f6SLorenzo Bianconi enum { 8785562d5f6SLorenzo Bianconi MCU_EXT_EVENT_PS_SYNC = 0x5, 8795562d5f6SLorenzo Bianconi MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, 8805562d5f6SLorenzo Bianconi MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, 8815562d5f6SLorenzo Bianconi MCU_EXT_EVENT_ASSERT_DUMP = 0x23, 8825562d5f6SLorenzo Bianconi MCU_EXT_EVENT_RDD_REPORT = 0x3a, 8835562d5f6SLorenzo Bianconi MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, 8845562d5f6SLorenzo Bianconi MCU_EXT_EVENT_BCC_NOTIFY = 0x75, 8851966a507SMeiChia Chiu MCU_EXT_EVENT_MURU_CTRL = 0x9f, 8865562d5f6SLorenzo Bianconi }; 8875562d5f6SLorenzo Bianconi 8885562d5f6SLorenzo Bianconi enum { 8895562d5f6SLorenzo Bianconi MCU_Q_QUERY, 8905562d5f6SLorenzo Bianconi MCU_Q_SET, 8915562d5f6SLorenzo Bianconi MCU_Q_RESERVED, 8925562d5f6SLorenzo Bianconi MCU_Q_NA 8935562d5f6SLorenzo Bianconi }; 8945562d5f6SLorenzo Bianconi 8955562d5f6SLorenzo Bianconi enum { 8965562d5f6SLorenzo Bianconi MCU_S2D_H2N, 8975562d5f6SLorenzo Bianconi MCU_S2D_C2N, 8985562d5f6SLorenzo Bianconi MCU_S2D_H2C, 8995562d5f6SLorenzo Bianconi MCU_S2D_H2CN 9005562d5f6SLorenzo Bianconi }; 9015562d5f6SLorenzo Bianconi 9025562d5f6SLorenzo Bianconi enum { 9035562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_FAIL, 9045562d5f6SLorenzo Bianconi PATCH_IS_DL, 9055562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_SUCCESS, 9065562d5f6SLorenzo Bianconi PATCH_REL_SEM_SUCCESS 9075562d5f6SLorenzo Bianconi }; 9085562d5f6SLorenzo Bianconi 9095562d5f6SLorenzo Bianconi enum { 9105562d5f6SLorenzo Bianconi FW_STATE_INITIAL, 9115562d5f6SLorenzo Bianconi FW_STATE_FW_DOWNLOAD, 9125562d5f6SLorenzo Bianconi FW_STATE_NORMAL_OPERATION, 9135562d5f6SLorenzo Bianconi FW_STATE_NORMAL_TRX, 9145562d5f6SLorenzo Bianconi FW_STATE_RDY = 7 9155562d5f6SLorenzo Bianconi }; 9165562d5f6SLorenzo Bianconi 9175562d5f6SLorenzo Bianconi enum { 9185562d5f6SLorenzo Bianconi CH_SWITCH_NORMAL = 0, 9195562d5f6SLorenzo Bianconi CH_SWITCH_SCAN = 3, 9205562d5f6SLorenzo Bianconi CH_SWITCH_MCC = 4, 9215562d5f6SLorenzo Bianconi CH_SWITCH_DFS = 5, 9225562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_START = 6, 9235562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 9245562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 9255562d5f6SLorenzo Bianconi CH_SWITCH_SCAN_BYPASS_DPD = 9 9265562d5f6SLorenzo Bianconi }; 9275562d5f6SLorenzo Bianconi 9285562d5f6SLorenzo Bianconi enum { 9295562d5f6SLorenzo Bianconi THERMAL_SENSOR_TEMP_QUERY, 9305562d5f6SLorenzo Bianconi THERMAL_SENSOR_MANUAL_CTRL, 9315562d5f6SLorenzo Bianconi THERMAL_SENSOR_INFO_QUERY, 9325562d5f6SLorenzo Bianconi THERMAL_SENSOR_TASK_CTRL, 9335562d5f6SLorenzo Bianconi }; 9345562d5f6SLorenzo Bianconi 9355562d5f6SLorenzo Bianconi enum mcu_cipher_type { 9365562d5f6SLorenzo Bianconi MCU_CIPHER_NONE = 0, 9375562d5f6SLorenzo Bianconi MCU_CIPHER_WEP40, 9385562d5f6SLorenzo Bianconi MCU_CIPHER_WEP104, 9395562d5f6SLorenzo Bianconi MCU_CIPHER_WEP128, 9405562d5f6SLorenzo Bianconi MCU_CIPHER_TKIP, 9415562d5f6SLorenzo Bianconi MCU_CIPHER_AES_CCMP, 9425562d5f6SLorenzo Bianconi MCU_CIPHER_CCMP_256, 9435562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP, 9445562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP_256, 9455562d5f6SLorenzo Bianconi MCU_CIPHER_WAPI, 9465562d5f6SLorenzo Bianconi MCU_CIPHER_BIP_CMAC_128, 9475562d5f6SLorenzo Bianconi }; 9485562d5f6SLorenzo Bianconi 9495562d5f6SLorenzo Bianconi enum { 9505562d5f6SLorenzo Bianconi EE_MODE_EFUSE, 9515562d5f6SLorenzo Bianconi EE_MODE_BUFFER, 9525562d5f6SLorenzo Bianconi }; 9535562d5f6SLorenzo Bianconi 9545562d5f6SLorenzo Bianconi enum { 9555562d5f6SLorenzo Bianconi EE_FORMAT_BIN, 9565562d5f6SLorenzo Bianconi EE_FORMAT_WHOLE, 9575562d5f6SLorenzo Bianconi EE_FORMAT_MULTIPLE, 9585562d5f6SLorenzo Bianconi }; 9595562d5f6SLorenzo Bianconi 9605562d5f6SLorenzo Bianconi enum { 9615562d5f6SLorenzo Bianconi MCU_PHY_STATE_TX_RATE, 9625562d5f6SLorenzo Bianconi MCU_PHY_STATE_RX_RATE, 9635562d5f6SLorenzo Bianconi MCU_PHY_STATE_RSSI, 9645562d5f6SLorenzo Bianconi MCU_PHY_STATE_CONTENTION_RX_RATE, 9655562d5f6SLorenzo Bianconi MCU_PHY_STATE_OFDMLQ_CNINFO, 9665562d5f6SLorenzo Bianconi }; 9675562d5f6SLorenzo Bianconi 968d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 969d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 970d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 971d0e274afSLorenzo Bianconi 972d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 973d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 974d0e274afSLorenzo Bianconi 975e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_ID GENMASK(7, 0) 976e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8) 977e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_QUERY BIT(16) 97854722402SLorenzo Bianconi #define __MCU_CMD_FIELD_UNI BIT(17) 979680a2eadSLorenzo Bianconi #define __MCU_CMD_FIELD_CE BIT(18) 9805562d5f6SLorenzo Bianconi #define __MCU_CMD_FIELD_WA BIT(19) 981e6d2070dSLorenzo Bianconi 982e6d2070dSLorenzo Bianconi #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \ 983e6d2070dSLorenzo Bianconi MCU_CMD_##_t) 984e6d2070dSLorenzo Bianconi #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \ 985e6d2070dSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 986e6d2070dSLorenzo Bianconi MCU_EXT_CMD_##_t)) 987e6d2070dSLorenzo Bianconi #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY) 98854722402SLorenzo Bianconi #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \ 98954722402SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 99054722402SLorenzo Bianconi MCU_UNI_CMD_##_t)) 991680a2eadSLorenzo Bianconi #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \ 992680a2eadSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 993680a2eadSLorenzo Bianconi MCU_CE_CMD_##_t)) 994680a2eadSLorenzo Bianconi #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY) 995d0e274afSLorenzo Bianconi 9965562d5f6SLorenzo Bianconi #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA) 9975562d5f6SLorenzo Bianconi #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA) 9985562d5f6SLorenzo Bianconi #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \ 9995562d5f6SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 10005562d5f6SLorenzo Bianconi MCU_WA_PARAM_CMD_##_t)) 10015562d5f6SLorenzo Bianconi 1002d0e274afSLorenzo Bianconi enum { 1003d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 1004d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 10059d8d136cSLorenzo Bianconi MCU_EXT_CMD_RF_TEST = 0x04, 1006d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 1007d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 1008d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 1009d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 10109d8d136cSLorenzo Bianconi MCU_EXT_CMD_TXBF_ACTION = 0x1e, 1011d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 10129d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_PROT = 0x23, 1013d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 1014d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 1015d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 1016d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 10179d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_CTRL = 0x2c, 1018d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 10199d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_DRR_CTRL = 0x36, 1020d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 1021d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 1022d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 1023d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 1024d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 1025d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 1026d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 1027d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 10289d8d136cSLorenzo Bianconi MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, 1029d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 10309d8d136cSLorenzo Bianconi MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, 1031d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 1032d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 10339d8d136cSLorenzo Bianconi MCU_EXT_CMD_GET_MIB_INFO = 0x5a, 1034d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 103503a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 10369d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RADAR_TH = 0x7c, 1037d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 10389d8d136cSLorenzo Bianconi MCU_EXT_CMD_MWDS_SUPPORT = 0x80, 10399d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, 10409d8d136cSLorenzo Bianconi MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, 10419d8d136cSLorenzo Bianconi MCU_EXT_CMD_FW_DBG_CTRL = 0x95, 104239cdf080SLorenzo Bianconi MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, 10439d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x9d, 10449d8d136cSLorenzo Bianconi MCU_EXT_CMD_MURU_CTRL = 0x9f, 10459d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SPR = 0xa8, 10469d8d136cSLorenzo Bianconi MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, 10479d8d136cSLorenzo Bianconi MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, 10489d8d136cSLorenzo Bianconi MCU_EXT_CMD_PHY_STAT_INFO = 0xad, 1049d0e274afSLorenzo Bianconi }; 1050d0e274afSLorenzo Bianconi 1051d0e274afSLorenzo Bianconi enum { 105254722402SLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01, 105354722402SLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02, 105454722402SLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = 0x03, 105554722402SLorenzo Bianconi MCU_UNI_CMD_SUSPEND = 0x05, 105654722402SLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = 0x06, 105754722402SLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = 0x07, 1058cbaa0a40SSean Wang MCU_UNI_CMD_SNIFFER = 0x24, 1059d0e274afSLorenzo Bianconi }; 1060d0e274afSLorenzo Bianconi 1061d0e274afSLorenzo Bianconi enum { 10627159eb82SLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 10637159eb82SLorenzo Bianconi MCU_CMD_FW_START_REQ = 0x02, 1064d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 10657159eb82SLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = 0x4, 10667159eb82SLorenzo Bianconi MCU_CMD_PATCH_START_REQ = 0x05, 10677159eb82SLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = 0x07, 10687159eb82SLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = 0x10, 10699d8d136cSLorenzo Bianconi MCU_CMD_WA_PARAM = 0xc4, 1070d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 10717159eb82SLorenzo Bianconi MCU_CMD_FW_SCATTER = 0xee, 10727159eb82SLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = 0xef, 1073d0e274afSLorenzo Bianconi }; 1074d0e274afSLorenzo Bianconi 1075d0e274afSLorenzo Bianconi /* offload mcu commands */ 1076d0e274afSLorenzo Bianconi enum { 1077680a2eadSLorenzo Bianconi MCU_CE_CMD_TEST_CTRL = 0x01, 1078680a2eadSLorenzo Bianconi MCU_CE_CMD_START_HW_SCAN = 0x03, 1079680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_PS_PROFILE = 0x05, 1080680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f, 1081680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, 1082680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_ABORT = 0x17, 1083680a2eadSLorenzo Bianconi MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, 1084bf9727a2SSean Wang MCU_CE_CMD_SET_ROC = 0x1c, 108566ca1a7bSSean Wang MCU_CE_CMD_SET_EDCA_PARMS = 0x1d, 1086680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_P2P_OPPPS = 0x33, 1087680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, 1088680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, 1089680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_REQ = 0x62, 1090680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_NIC_CAPAB = 0x8a, 1091680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0, 1092680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_WRITE = 0xc0, 1093680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_READ = 0xc0, 1094680a2eadSLorenzo Bianconi MCU_CE_CMD_CHIP_CONFIG = 0xca, 1095680a2eadSLorenzo Bianconi MCU_CE_CMD_FWLOG_2_HOST = 0xc5, 1096680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_WTBL = 0xcd, 1097680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_TXPWR = 0xd0, 1098d0e274afSLorenzo Bianconi }; 1099d0e274afSLorenzo Bianconi 1100d0e274afSLorenzo Bianconi enum { 1101d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 1102d0e274afSLorenzo Bianconi PATCH_SEM_GET 1103d0e274afSLorenzo Bianconi }; 1104d0e274afSLorenzo Bianconi 1105d0e274afSLorenzo Bianconi enum { 1106d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 1107d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 1108b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 1109d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 1110d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 1111d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 1112d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 111367aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 111467aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 1115d0e274afSLorenzo Bianconi }; 1116d0e274afSLorenzo Bianconi 111755d4c19cSLorenzo Bianconi enum { 111855d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 111955d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 112055d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 112155d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 112255d4c19cSLorenzo Bianconi }; 112355d4c19cSLorenzo Bianconi 1124f7d2958cSLorenzo Bianconi enum { 1125f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 1126f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 1127f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 1128f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 1129f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 1130f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 1131f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 1132f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 1133f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 1134f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 1135f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 1136f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 1137f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 1138f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 1139f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 1140f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 1141f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 1142f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 1143f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 1144f7d2958cSLorenzo Bianconi }; 1145f7d2958cSLorenzo Bianconi 1146193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 1147193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 1148193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 1149193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 1150193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 1151193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 1152193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 1153193e5f22SYN Chen 115455d4c19cSLorenzo Bianconi enum { 115555d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 115655d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 115755d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 115855d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 115955d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 116055d4c19cSLorenzo Bianconi }; 116155d4c19cSLorenzo Bianconi 116255d4c19cSLorenzo Bianconi enum { 116355d4c19cSLorenzo Bianconi WOW_USB = 1, 116455d4c19cSLorenzo Bianconi WOW_PCIE = 2, 116555d4c19cSLorenzo Bianconi WOW_GPIO = 3, 116655d4c19cSLorenzo Bianconi }; 116755d4c19cSLorenzo Bianconi 1168d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 1169d0e274afSLorenzo Bianconi __le16 tag; 1170d0e274afSLorenzo Bianconi __le16 len; 1171d0e274afSLorenzo Bianconi u8 active; 1172d0e274afSLorenzo Bianconi u8 omac_idx; 1173d0e274afSLorenzo Bianconi u8 hw_bss_idx; 1174d0e274afSLorenzo Bianconi u8 band_idx; 1175d0e274afSLorenzo Bianconi __le32 conn_type; 1176d0e274afSLorenzo Bianconi u8 conn_state; 1177d0e274afSLorenzo Bianconi u8 wmm_idx; 1178d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1179d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 1180d0e274afSLorenzo Bianconi __le16 bcn_interval; 1181d0e274afSLorenzo Bianconi u8 dtim_period; 1182d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 1183d0e274afSLorenzo Bianconi * bit(1): B 1184d0e274afSLorenzo Bianconi * bit(2): G 1185d0e274afSLorenzo Bianconi * bit(3): GN 1186d0e274afSLorenzo Bianconi * bit(4): AN 1187d0e274afSLorenzo Bianconi * bit(5): AC 11883cf3e01bSLorenzo Bianconi * bit(6): AX2 11893cf3e01bSLorenzo Bianconi * bit(7): AX5 11903cf3e01bSLorenzo Bianconi * bit(8): AX6 1191d0e274afSLorenzo Bianconi */ 1192d0e274afSLorenzo Bianconi __le16 sta_idx; 11933cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 11943cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 11953cf3e01bSLorenzo Bianconi u8 pad[1]; 1196d0e274afSLorenzo Bianconi } __packed; 1197d0e274afSLorenzo Bianconi 1198d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 1199d0e274afSLorenzo Bianconi __le16 tag; 1200d0e274afSLorenzo Bianconi __le16 len; 1201d0e274afSLorenzo Bianconi u8 qos; 1202d0e274afSLorenzo Bianconi u8 pad[3]; 1203d0e274afSLorenzo Bianconi } __packed; 1204d0e274afSLorenzo Bianconi 1205d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 1206d0e274afSLorenzo Bianconi u8 bss_idx; 1207d0e274afSLorenzo Bianconi u8 reason; 1208d0e274afSLorenzo Bianconi u8 pad[2]; 1209d0e274afSLorenzo Bianconi } __packed; 1210d0e274afSLorenzo Bianconi 1211d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 1212d0e274afSLorenzo Bianconi u8 bss_idx; 1213d0e274afSLorenzo Bianconi u8 is_absent; 1214d0e274afSLorenzo Bianconi u8 free_quota; 1215d0e274afSLorenzo Bianconi u8 pad; 1216d0e274afSLorenzo Bianconi } __packed; 1217d0e274afSLorenzo Bianconi 1218399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 1219399090efSLorenzo Bianconi __le32 ssid_len; 1220399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1221399090efSLorenzo Bianconi } __packed; 1222399090efSLorenzo Bianconi 1223399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 1224399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 1225399090efSLorenzo Bianconi * 2: 5.0GHz 1226399090efSLorenzo Bianconi * Others: Reserved 1227399090efSLorenzo Bianconi */ 1228399090efSLorenzo Bianconi u8 channel_num; 1229399090efSLorenzo Bianconi } __packed; 1230399090efSLorenzo Bianconi 1231399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 1232399090efSLorenzo Bianconi __le32 rssi_th; 1233399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1234399090efSLorenzo Bianconi u8 ssid_len; 1235399090efSLorenzo Bianconi u8 rsv[3]; 1236399090efSLorenzo Bianconi } __packed; 1237399090efSLorenzo Bianconi 1238399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 1239399090efSLorenzo Bianconi u8 seq_num; 1240399090efSLorenzo Bianconi u8 bss_idx; 1241399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 1242399090efSLorenzo Bianconi * 1: ACTIVE SCAN 1243399090efSLorenzo Bianconi */ 1244399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 1245399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 1246399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 1247399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 1248399090efSLorenzo Bianconi */ 1249399090efSLorenzo Bianconi u8 ssids_num; 1250399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 1251399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 1252399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 1253399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 1254399090efSLorenzo Bianconi */ 1255399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 1256399090efSLorenzo Bianconi * 1: Support fields after ies. 1257399090efSLorenzo Bianconi */ 1258399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 1259399090efSLorenzo Bianconi __le16 probe_delay_time; 1260399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 1261399090efSLorenzo Bianconi __le16 timeout_value; 1262399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 1263399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 1264399090efSLorenzo Bianconi * 2: Only 5GHz channels 1265399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 1266399090efSLorenzo Bianconi * 4: Specified channels 1267399090efSLorenzo Bianconi * Others: Reserved 1268399090efSLorenzo Bianconi */ 1269399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 1270399090efSLorenzo Bianconi /* valid when channels_num is set */ 1271399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 1272399090efSLorenzo Bianconi __le16 ies_len; 1273399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 1274399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 1275399090efSLorenzo Bianconi u8 ext_channels_num; 1276399090efSLorenzo Bianconi u8 ext_ssids_num; 1277399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 1278399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 1279399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 1280399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1281399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 1282399090efSLorenzo Bianconi u8 pad[63]; 1283399090efSLorenzo Bianconi u8 ssid_type_ext; 1284399090efSLorenzo Bianconi } __packed; 1285399090efSLorenzo Bianconi 1286399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 1287399090efSLorenzo Bianconi 1288399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 1289399090efSLorenzo Bianconi u8 seq_num; 1290399090efSLorenzo Bianconi u8 sparse_channel_num; 1291399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 1292399090efSLorenzo Bianconi u8 complete_channel_num; 1293399090efSLorenzo Bianconi u8 current_state; 1294399090efSLorenzo Bianconi u8 version; 1295399090efSLorenzo Bianconi u8 pad; 1296399090efSLorenzo Bianconi __le32 beacon_scan_num; 1297399090efSLorenzo Bianconi u8 pno_enabled; 1298399090efSLorenzo Bianconi u8 pad2[3]; 1299399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 1300399090efSLorenzo Bianconi u8 pad3[3]; 1301399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1302399090efSLorenzo Bianconi /* idle format for channel_idle_time 1303399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 1304399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 1305399090efSLorenzo Bianconi * 2: dwell time (16us) 1306399090efSLorenzo Bianconi */ 1307399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1308399090efSLorenzo Bianconi /* beacon and probe response count */ 1309399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1310399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1311399090efSLorenzo Bianconi __le32 beacon_2g_num; 1312399090efSLorenzo Bianconi __le32 beacon_5g_num; 1313399090efSLorenzo Bianconi } __packed; 1314399090efSLorenzo Bianconi 1315399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 1316399090efSLorenzo Bianconi u8 version; 1317399090efSLorenzo Bianconi u8 seq_num; 1318399090efSLorenzo Bianconi u8 stop_on_match; 1319399090efSLorenzo Bianconi u8 ssids_num; 1320399090efSLorenzo Bianconi u8 match_num; 1321399090efSLorenzo Bianconi u8 pad; 1322399090efSLorenzo Bianconi __le16 ie_len; 1323399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 1324399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 1325399090efSLorenzo Bianconi u8 channel_type; 1326399090efSLorenzo Bianconi u8 channels_num; 1327399090efSLorenzo Bianconi u8 intervals_num; 13287139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 1329399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 1330abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 13317139b5c0SSean Wang union { 13327139b5c0SSean Wang struct { 13337139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 1334399090efSLorenzo Bianconi u8 pad2[58]; 13357139b5c0SSean Wang } mt7663; 13367139b5c0SSean Wang struct { 13377139b5c0SSean Wang u8 bss_idx; 1338b94c0ed6SDeren Wu u8 pad1[3]; 1339b94c0ed6SDeren Wu __le32 delay; 1340b94c0ed6SDeren Wu u8 pad2[12]; 13419f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 13429f367c81SDeren Wu u8 pad3[38]; 13437139b5c0SSean Wang } mt7921; 13447139b5c0SSean Wang }; 1345399090efSLorenzo Bianconi } __packed; 1346399090efSLorenzo Bianconi 1347399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 1348399090efSLorenzo Bianconi u8 seq_num; 1349399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 1350399090efSLorenzo Bianconi __le16 pad; 1351399090efSLorenzo Bianconi } __packed; 1352399090efSLorenzo Bianconi 1353b4b880b9SYN Chen struct bss_info_uni_bss_color { 1354b4b880b9SYN Chen __le16 tag; 1355b4b880b9SYN Chen __le16 len; 1356b4b880b9SYN Chen u8 enable; 1357b4b880b9SYN Chen u8 bss_color; 1358b4b880b9SYN Chen u8 rsv[2]; 1359b4b880b9SYN Chen } __packed; 1360b4b880b9SYN Chen 1361d0e274afSLorenzo Bianconi struct bss_info_uni_he { 1362d0e274afSLorenzo Bianconi __le16 tag; 1363d0e274afSLorenzo Bianconi __le16 len; 1364d0e274afSLorenzo Bianconi __le16 he_rts_thres; 1365d0e274afSLorenzo Bianconi u8 he_pe_duration; 1366d0e274afSLorenzo Bianconi u8 su_disable; 1367d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 1368d0e274afSLorenzo Bianconi u8 rsv[2]; 1369d0e274afSLorenzo Bianconi } __packed; 1370d0e274afSLorenzo Bianconi 137155d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 137255d4c19cSLorenzo Bianconi __le16 tag; 137355d4c19cSLorenzo Bianconi __le16 len; 137455d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 137555d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 137655d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 137755d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 137855d4c19cSLorenzo Bianconi * 1: rekey offload disable 137955d4c19cSLorenzo Bianconi * 2: rekey update 138055d4c19cSLorenzo Bianconi */ 138155d4c19cSLorenzo Bianconi u8 keyid; 1382d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 1383d741abeaSLeon Yen u8 pad[1]; 138455d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 138555d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 138655d4c19cSLorenzo Bianconi __le32 group_cipher; 138755d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 138855d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 1389d741abeaSLeon Yen u8 reserverd[4]; 139055d4c19cSLorenzo Bianconi } __packed; 139155d4c19cSLorenzo Bianconi 139255d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 139355d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 139455d4c19cSLorenzo Bianconi 139555d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 139655d4c19cSLorenzo Bianconi __le16 tag; 139755d4c19cSLorenzo Bianconi __le16 len; 139855d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 139955d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 140055d4c19cSLorenzo Bianconi * 1: enable 140155d4c19cSLorenzo Bianconi */ 140255d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 140355d4c19cSLorenzo Bianconi u8 pad; 140455d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 140555d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 140655d4c19cSLorenzo Bianconi u8 rsv[4]; 140755d4c19cSLorenzo Bianconi } __packed; 140855d4c19cSLorenzo Bianconi 140955d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 141055d4c19cSLorenzo Bianconi __le16 tag; 141155d4c19cSLorenzo Bianconi __le16 len; 141255d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 141355d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 141455d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 141555d4c19cSLorenzo Bianconi */ 141655d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 141755d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 141855d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 141955d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 142055d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 142155d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 142255d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 142355d4c19cSLorenzo Bianconi */ 142455d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 142555d4c19cSLorenzo Bianconi * 0x1: HIF_USB 142655d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 142755d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 142855d4c19cSLorenzo Bianconi */ 142955d4c19cSLorenzo Bianconi u8 pad; 143055d4c19cSLorenzo Bianconi u8 rsv[4]; 143155d4c19cSLorenzo Bianconi } __packed; 143255d4c19cSLorenzo Bianconi 143355d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 143455d4c19cSLorenzo Bianconi __le16 tag; 143555d4c19cSLorenzo Bianconi __le16 len; 143655d4c19cSLorenzo Bianconi u8 gpio_pin; 143755d4c19cSLorenzo Bianconi u8 trigger_lvl; 143855d4c19cSLorenzo Bianconi u8 pad[2]; 143955d4c19cSLorenzo Bianconi __le32 gpio_interval; 144055d4c19cSLorenzo Bianconi u8 rsv[4]; 144155d4c19cSLorenzo Bianconi } __packed; 144255d4c19cSLorenzo Bianconi 144355d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 144455d4c19cSLorenzo Bianconi __le16 tag; 144555d4c19cSLorenzo Bianconi __le16 len; 144655d4c19cSLorenzo Bianconi u8 mode; 144755d4c19cSLorenzo Bianconi u8 ips_num; 144855d4c19cSLorenzo Bianconi u8 option; 144955d4c19cSLorenzo Bianconi u8 pad[1]; 145055d4c19cSLorenzo Bianconi } __packed; 145155d4c19cSLorenzo Bianconi 145255d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 145355d4c19cSLorenzo Bianconi __le16 tag; 145455d4c19cSLorenzo Bianconi __le16 len; 145555d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 145655d4c19cSLorenzo Bianconi * 1: suspend mode enabled 145755d4c19cSLorenzo Bianconi */ 145855d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 145955d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 146055d4c19cSLorenzo Bianconi * 1: update by wow dtim 146155d4c19cSLorenzo Bianconi */ 146255d4c19cSLorenzo Bianconi u8 pad[5]; 146355d4c19cSLorenzo Bianconi } __packed; 146455d4c19cSLorenzo Bianconi 1465f5056657SSean Wang enum mt76_sta_info_state { 1466f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 1467f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 1468f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 1469f5056657SSean Wang }; 1470f5056657SSean Wang 14715802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 14725802106fSLorenzo Bianconi struct ieee80211_sta *sta; 14735802106fSLorenzo Bianconi struct mt76_wcid *wcid; 14745802106fSLorenzo Bianconi 14755802106fSLorenzo Bianconi struct ieee80211_vif *vif; 14765802106fSLorenzo Bianconi 147782453b1cSLorenzo Bianconi bool offload_fw; 14785802106fSLorenzo Bianconi bool enable; 1479f5056657SSean Wang bool newly; 14805802106fSLorenzo Bianconi int cmd; 14815802106fSLorenzo Bianconi u8 rcpi; 1482f5056657SSean Wang u8 state; 14835802106fSLorenzo Bianconi }; 14845802106fSLorenzo Bianconi 148518369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 148618369a4fSLorenzo Bianconi 148718369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 148818369a4fSLorenzo Bianconi u8 channel; 148918369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 149018369a4fSLorenzo Bianconi } __packed; 149118369a4fSLorenzo Bianconi 149218369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 149318369a4fSLorenzo Bianconi /* DW0 - common info*/ 149418369a4fSLorenzo Bianconi u8 ver; 149518369a4fSLorenzo Bianconi u8 pad0; 149618369a4fSLorenzo Bianconi __le16 len; 149718369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 149818369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 14999b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 150018369a4fSLorenzo Bianconi u8 last_msg; 150118369a4fSLorenzo Bianconi u8 pad1; 150218369a4fSLorenzo Bianconi /* DW3 */ 150318369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 150418369a4fSLorenzo Bianconi u8 pad2[32]; 150518369a4fSLorenzo Bianconi } __packed; 150618369a4fSLorenzo Bianconi 1507c0b21255SSean Wang struct mt76_connac_config { 1508c0b21255SSean Wang __le16 id; 1509c0b21255SSean Wang u8 type; 1510c0b21255SSean Wang u8 resp_type; 1511c0b21255SSean Wang __le16 data_size; 1512c0b21255SSean Wang __le16 resv; 1513c0b21255SSean Wang u8 data[320]; 1514c0b21255SSean Wang } __packed; 1515c0b21255SSean Wang 151609c874a1SLorenzo Bianconi static inline enum mcu_cipher_type 151709c874a1SLorenzo Bianconi mt76_connac_mcu_get_cipher(int cipher) 151809c874a1SLorenzo Bianconi { 151909c874a1SLorenzo Bianconi switch (cipher) { 152009c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP40: 152109c874a1SLorenzo Bianconi return MCU_CIPHER_WEP40; 152209c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP104: 152309c874a1SLorenzo Bianconi return MCU_CIPHER_WEP104; 152409c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_TKIP: 152509c874a1SLorenzo Bianconi return MCU_CIPHER_TKIP; 152609c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_AES_CMAC: 152709c874a1SLorenzo Bianconi return MCU_CIPHER_BIP_CMAC_128; 152809c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP: 152909c874a1SLorenzo Bianconi return MCU_CIPHER_AES_CCMP; 153009c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP_256: 153109c874a1SLorenzo Bianconi return MCU_CIPHER_CCMP_256; 153209c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP: 153309c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP; 153409c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP_256: 153509c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP_256; 153609c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_SMS4: 153709c874a1SLorenzo Bianconi return MCU_CIPHER_WAPI; 153809c874a1SLorenzo Bianconi default: 153909c874a1SLorenzo Bianconi return MCU_CIPHER_NONE; 154009c874a1SLorenzo Bianconi } 154109c874a1SLorenzo Bianconi } 154209c874a1SLorenzo Bianconi 15439e90c351SLorenzo Bianconi static inline u32 15449e90c351SLorenzo Bianconi mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa) 15459e90c351SLorenzo Bianconi { 15469e90c351SLorenzo Bianconi u32 ret = 0; 15479e90c351SLorenzo Bianconi 15489e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_SET_ENCRYPT ? 15499e90c351SLorenzo Bianconi DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0; 15509e90c351SLorenzo Bianconi if (is_mt7921(dev)) 15519e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_ENCRY_MODE ? 15529e90c351SLorenzo Bianconi DL_CONFIG_ENCRY_MODE_SEL : 0; 15539e90c351SLorenzo Bianconi ret |= FIELD_PREP(DL_MODE_KEY_IDX, 15549e90c351SLorenzo Bianconi FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 15559e90c351SLorenzo Bianconi ret |= DL_MODE_NEED_RSP; 15569e90c351SLorenzo Bianconi ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; 15579e90c351SLorenzo Bianconi 15589e90c351SLorenzo Bianconi return ret; 15599e90c351SLorenzo Bianconi } 15609e90c351SLorenzo Bianconi 156167aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 156267aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 156367aa2743SLorenzo Bianconi 156467aa2743SLorenzo Bianconi static inline void 156567aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 156667aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 156767aa2743SLorenzo Bianconi { 156867aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 156967aa2743SLorenzo Bianconi 15702fec2ea6SLorenzo Bianconi if (!is_connac_v1(dev)) { 157167aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 157267aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 157367aa2743SLorenzo Bianconi } else { 157467aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 157567aa2743SLorenzo Bianconi } 157667aa2743SLorenzo Bianconi } 157767aa2743SLorenzo Bianconi 1578d0e274afSLorenzo Bianconi struct sk_buff * 1579e2c93b68SLorenzo Bianconi __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1580e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid, int len); 1581e2c93b68SLorenzo Bianconi static inline struct sk_buff * 1582d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1583e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid) 1584e2c93b68SLorenzo Bianconi { 1585e2c93b68SLorenzo Bianconi return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 1586e2c93b68SLorenzo Bianconi MT76_CONNAC_STA_UPDATE_MAX_SIZE); 1587e2c93b68SLorenzo Bianconi } 1588e2c93b68SLorenzo Bianconi 1589d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1590d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1591d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1592d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1593d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1594d0e274afSLorenzo Bianconi void *sta_wtbl); 1595d0e274afSLorenzo Bianconi static inline struct tlv * 1596d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1597d0e274afSLorenzo Bianconi { 1598d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1599d0e274afSLorenzo Bianconi } 1600d0e274afSLorenzo Bianconi 1601d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1602d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1603d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1604d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1605f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1606f5056657SSean Wang bool newly); 1607d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1608d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1609d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1610d0e274afSLorenzo Bianconi void *wtbl_tlv); 1611d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1612868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 161366978204SFelix Fietkau struct mt76_wcid *wcid, 1614d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 161524299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 161624299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 161724299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 16185a521c0fSLorenzo Bianconi int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 16195a521c0fSLorenzo Bianconi struct ieee80211_vif *vif, 16205a521c0fSLorenzo Bianconi struct ieee80211_sta *sta); 1621d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1622d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 16235802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1624f5056657SSean Wang u8 rcpi, u8 state); 1625d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1626d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1627499da720SMeiChia Chiu void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc); 1628d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1629d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1630d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1631d0e274afSLorenzo Bianconi void *wtbl_tlv); 1632d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1633d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1634d0e274afSLorenzo Bianconi bool enable, bool tx); 1635d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1636d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1637d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1638d0e274afSLorenzo Bianconi bool enable); 1639d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1640d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1641b5322e44SLorenzo Bianconi int cmd, bool enable, bool tx); 1642d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1643d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1644d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1645d0e274afSLorenzo Bianconi bool enable); 1646f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 16475802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1648d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1649d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1650d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1651d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1652d0e274afSLorenzo Bianconi bool hdr_trans); 1653d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1654d0e274afSLorenzo Bianconi u32 mode); 1655d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1656d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1657d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1658f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1659d0e274afSLorenzo Bianconi 1660399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1661399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1662399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1663399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1664399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1665399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1666399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1667399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1668399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1669399090efSLorenzo Bianconi bool enable); 1670f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1671f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1672f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 167355d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 167455d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 167555d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 167655d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 167755d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 167855d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1679f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1680f5056657SSean Wang enum ieee80211_sta_state old_state, 1681f5056657SSean Wang enum ieee80211_sta_state new_state); 16820da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1683c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 16840da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 16850da3c795SSean Wang struct mt76_connac_coredump *coredump); 168618369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 16871f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 16881f832887SLorenzo Bianconi struct ieee80211_vif *vif); 168987f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 169087f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1691e6d557a7SLorenzo Bianconi 1692e6d557a7SLorenzo Bianconi const struct ieee80211_sta_he_cap * 1693e6d557a7SLorenzo Bianconi mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); 1694e6d557a7SLorenzo Bianconi u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1695e6d557a7SLorenzo Bianconi enum nl80211_band band, struct ieee80211_sta *sta); 16966683d988SLorenzo Bianconi 16976683d988SLorenzo Bianconi int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 16986683d988SLorenzo Bianconi struct mt76_connac_sta_key_conf *sta_key_conf, 16996683d988SLorenzo Bianconi struct ieee80211_key_conf *key, int mcu_cmd, 17006683d988SLorenzo Bianconi struct mt76_wcid *wcid, enum set_key_cmd cmd); 170154735e11SLorenzo Bianconi 170264f4e823SLorenzo Bianconi void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif); 170354735e11SLorenzo Bianconi void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 170454735e11SLorenzo Bianconi struct ieee80211_vif *vif); 170549126ac1SLorenzo Bianconi int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 170649126ac1SLorenzo Bianconi struct ieee80211_vif *vif, 170749126ac1SLorenzo Bianconi struct ieee80211_sta *sta, 170895b5946eSChad Monroe struct mt76_phy *phy, u16 wlan_idx, 170949126ac1SLorenzo Bianconi bool enable); 1710836c0c98SLorenzo Bianconi void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 1711836c0c98SLorenzo Bianconi struct ieee80211_sta *sta); 17122557e568SLorenzo Bianconi void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 17132557e568SLorenzo Bianconi struct ieee80211_sta *sta, 17142557e568SLorenzo Bianconi void *sta_wtbl, void *wtbl_tlv); 171548d743d1SLorenzo Bianconi int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); 1716ae90bdd6SLorenzo Bianconi int mt76_connac_mcu_restart(struct mt76_dev *dev); 171797cef84dSLorenzo Bianconi int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 171897cef84dSLorenzo Bianconi u8 rx_sel, u8 val); 1719b9ec2710SLorenzo Bianconi int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 1720b9ec2710SLorenzo Bianconi const char *fw_wa); 1721*28fec923SLorenzo Bianconi int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name); 1722d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1723