1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 99e90c351SLorenzo Bianconi #define FW_FEATURE_SET_ENCRYPT BIT(0) 109e90c351SLorenzo Bianconi #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 119e90c351SLorenzo Bianconi #define FW_FEATURE_ENCRY_MODE BIT(4) 129e90c351SLorenzo Bianconi #define FW_FEATURE_OVERRIDE_ADDR BIT(5) 13*23bdc5d8SMing Yen Hsieh #define FW_FEATURE_NON_DL BIT(6) 149e90c351SLorenzo Bianconi 159e90c351SLorenzo Bianconi #define DL_MODE_ENCRYPT BIT(0) 169e90c351SLorenzo Bianconi #define DL_MODE_KEY_IDX GENMASK(2, 1) 179e90c351SLorenzo Bianconi #define DL_MODE_RESET_SEC_IV BIT(3) 189e90c351SLorenzo Bianconi #define DL_MODE_WORKING_PDA_CR4 BIT(4) 199e90c351SLorenzo Bianconi #define DL_MODE_VALID_RAM_ENTRY BIT(5) 209e90c351SLorenzo Bianconi #define DL_CONFIG_ENCRY_MODE_SEL BIT(6) 219e90c351SLorenzo Bianconi #define DL_MODE_NEED_RSP BIT(31) 229e90c351SLorenzo Bianconi 239e90c351SLorenzo Bianconi #define FW_START_OVERRIDE BIT(0) 249e90c351SLorenzo Bianconi #define FW_START_WORKING_PDA_CR4 BIT(2) 259e90c351SLorenzo Bianconi 269e90c351SLorenzo Bianconi #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) 279e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) 289e90c351SLorenzo Bianconi #define PATCH_SEC_TYPE_INFO 0x2 299e90c351SLorenzo Bianconi 3028fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24) 3128fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_PLAIN 0x00 3228fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_AES 0x01 3328fec923SLorenzo Bianconi #define PATCH_SEC_ENC_TYPE_SCRAMBLE 0x02 3428fec923SLorenzo Bianconi #define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0) 3528fec923SLorenzo Bianconi #define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0) 3628fec923SLorenzo Bianconi 37*23bdc5d8SMing Yen Hsieh enum { 38*23bdc5d8SMing Yen Hsieh FW_TYPE_DEFAULT = 0, 39*23bdc5d8SMing Yen Hsieh FW_TYPE_CLC = 2, 40*23bdc5d8SMing Yen Hsieh FW_TYPE_MAX_NUM = 255 41*23bdc5d8SMing Yen Hsieh }; 42*23bdc5d8SMing Yen Hsieh 43d2f5c8edSLorenzo Bianconi #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10)) 44d2f5c8edSLorenzo Bianconi #define MCU_PKT_ID 0xa0 45d2f5c8edSLorenzo Bianconi 46fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_txd { 47fc6ee71aSLorenzo Bianconi __le32 txd[8]; 48fc6ee71aSLorenzo Bianconi 49fc6ee71aSLorenzo Bianconi __le16 len; 50fc6ee71aSLorenzo Bianconi __le16 pq_id; 51fc6ee71aSLorenzo Bianconi 52fc6ee71aSLorenzo Bianconi u8 cid; 53fc6ee71aSLorenzo Bianconi u8 pkt_type; 54fc6ee71aSLorenzo Bianconi u8 set_query; /* FW don't care */ 55fc6ee71aSLorenzo Bianconi u8 seq; 56fc6ee71aSLorenzo Bianconi 57fc6ee71aSLorenzo Bianconi u8 uc_d2b0_rev; 58fc6ee71aSLorenzo Bianconi u8 ext_cid; 59fc6ee71aSLorenzo Bianconi u8 s2d_index; 60fc6ee71aSLorenzo Bianconi u8 ext_cid_ack; 61fc6ee71aSLorenzo Bianconi 62fc6ee71aSLorenzo Bianconi u32 rsv[5]; 63fc6ee71aSLorenzo Bianconi } __packed __aligned(4); 64fc6ee71aSLorenzo Bianconi 65fc6ee71aSLorenzo Bianconi /** 66fc6ee71aSLorenzo Bianconi * struct mt76_connac2_mcu_uni_txd - mcu command descriptor for firmware v3 67fc6ee71aSLorenzo Bianconi * @txd: hardware descriptor 68fc6ee71aSLorenzo Bianconi * @len: total length not including txd 69fc6ee71aSLorenzo Bianconi * @cid: command identifier 70fc6ee71aSLorenzo Bianconi * @pkt_type: must be 0xa0 (cmd packet by long format) 71fc6ee71aSLorenzo Bianconi * @frag_n: fragment number 72fc6ee71aSLorenzo Bianconi * @seq: sequence number 73fc6ee71aSLorenzo Bianconi * @checksum: 0 mean there is no checksum 74fc6ee71aSLorenzo Bianconi * @s2d_index: index for command source and destination 75fc6ee71aSLorenzo Bianconi * Definition | value | note 76fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM 77fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM 78fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA 79fc6ee71aSLorenzo Bianconi * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM 80fc6ee71aSLorenzo Bianconi * 81fc6ee71aSLorenzo Bianconi * @option: command option 82fc6ee71aSLorenzo Bianconi * BIT[0]: UNI_CMD_OPT_BIT_ACK 83fc6ee71aSLorenzo Bianconi * set to 1 to request a fw reply 84fc6ee71aSLorenzo Bianconi * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY 85fc6ee71aSLorenzo Bianconi * is set, mcu firmware will send response event EID = 0x01 86fc6ee71aSLorenzo Bianconi * (UNI_EVENT_ID_CMD_RESULT) to the host. 87fc6ee71aSLorenzo Bianconi * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD 88fc6ee71aSLorenzo Bianconi * 0: original command 89fc6ee71aSLorenzo Bianconi * 1: unified command 90fc6ee71aSLorenzo Bianconi * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY 91fc6ee71aSLorenzo Bianconi * 0: QUERY command 92fc6ee71aSLorenzo Bianconi * 1: SET command 93fc6ee71aSLorenzo Bianconi */ 94fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_uni_txd { 95fc6ee71aSLorenzo Bianconi __le32 txd[8]; 96fc6ee71aSLorenzo Bianconi 97fc6ee71aSLorenzo Bianconi /* DW1 */ 98fc6ee71aSLorenzo Bianconi __le16 len; 99fc6ee71aSLorenzo Bianconi __le16 cid; 100fc6ee71aSLorenzo Bianconi 101fc6ee71aSLorenzo Bianconi /* DW2 */ 102fc6ee71aSLorenzo Bianconi u8 rsv; 103fc6ee71aSLorenzo Bianconi u8 pkt_type; 104fc6ee71aSLorenzo Bianconi u8 frag_n; 105fc6ee71aSLorenzo Bianconi u8 seq; 106fc6ee71aSLorenzo Bianconi 107fc6ee71aSLorenzo Bianconi /* DW3 */ 108fc6ee71aSLorenzo Bianconi __le16 checksum; 109fc6ee71aSLorenzo Bianconi u8 s2d_index; 110fc6ee71aSLorenzo Bianconi u8 option; 111fc6ee71aSLorenzo Bianconi 112fc6ee71aSLorenzo Bianconi /* DW4 */ 113fc6ee71aSLorenzo Bianconi u8 rsv1[4]; 114fc6ee71aSLorenzo Bianconi } __packed __aligned(4); 115fc6ee71aSLorenzo Bianconi 116fc6ee71aSLorenzo Bianconi struct mt76_connac2_mcu_rxd { 117fc6ee71aSLorenzo Bianconi __le32 rxd[6]; 118fc6ee71aSLorenzo Bianconi 119fc6ee71aSLorenzo Bianconi __le16 len; 120fc6ee71aSLorenzo Bianconi __le16 pkt_type_id; 121fc6ee71aSLorenzo Bianconi 122fc6ee71aSLorenzo Bianconi u8 eid; 123fc6ee71aSLorenzo Bianconi u8 seq; 124fc6ee71aSLorenzo Bianconi u8 rsv[2]; 125fc6ee71aSLorenzo Bianconi 126fc6ee71aSLorenzo Bianconi u8 ext_eid; 127fc6ee71aSLorenzo Bianconi u8 rsv1[2]; 128fc6ee71aSLorenzo Bianconi u8 s2d_index; 129fc6ee71aSLorenzo Bianconi }; 130fc6ee71aSLorenzo Bianconi 1313d8c636cSLorenzo Bianconi struct mt76_connac2_patch_hdr { 1323d8c636cSLorenzo Bianconi char build_date[16]; 1333d8c636cSLorenzo Bianconi char platform[4]; 1343d8c636cSLorenzo Bianconi __be32 hw_sw_ver; 1353d8c636cSLorenzo Bianconi __be32 patch_ver; 1363d8c636cSLorenzo Bianconi __be16 checksum; 1373d8c636cSLorenzo Bianconi u16 rsv; 1383d8c636cSLorenzo Bianconi struct { 1393d8c636cSLorenzo Bianconi __be32 patch_ver; 1403d8c636cSLorenzo Bianconi __be32 subsys; 1413d8c636cSLorenzo Bianconi __be32 feature; 1423d8c636cSLorenzo Bianconi __be32 n_region; 1433d8c636cSLorenzo Bianconi __be32 crc; 1443d8c636cSLorenzo Bianconi u32 rsv[11]; 1453d8c636cSLorenzo Bianconi } desc; 1463d8c636cSLorenzo Bianconi } __packed; 1473d8c636cSLorenzo Bianconi 1483d8c636cSLorenzo Bianconi struct mt76_connac2_patch_sec { 1493d8c636cSLorenzo Bianconi __be32 type; 1503d8c636cSLorenzo Bianconi __be32 offs; 1513d8c636cSLorenzo Bianconi __be32 size; 1523d8c636cSLorenzo Bianconi union { 1533d8c636cSLorenzo Bianconi __be32 spec[13]; 1543d8c636cSLorenzo Bianconi struct { 1553d8c636cSLorenzo Bianconi __be32 addr; 1563d8c636cSLorenzo Bianconi __be32 len; 1573d8c636cSLorenzo Bianconi __be32 sec_key_idx; 1583d8c636cSLorenzo Bianconi __be32 align_len; 1593d8c636cSLorenzo Bianconi u32 rsv[9]; 1603d8c636cSLorenzo Bianconi } info; 1613d8c636cSLorenzo Bianconi }; 1623d8c636cSLorenzo Bianconi } __packed; 1633d8c636cSLorenzo Bianconi 1643d8c636cSLorenzo Bianconi struct mt76_connac2_fw_trailer { 1653d8c636cSLorenzo Bianconi u8 chip_id; 1663d8c636cSLorenzo Bianconi u8 eco_code; 1673d8c636cSLorenzo Bianconi u8 n_region; 1683d8c636cSLorenzo Bianconi u8 format_ver; 1693d8c636cSLorenzo Bianconi u8 format_flag; 1703d8c636cSLorenzo Bianconi u8 rsv[2]; 1713d8c636cSLorenzo Bianconi char fw_ver[10]; 1723d8c636cSLorenzo Bianconi char build_date[15]; 1733d8c636cSLorenzo Bianconi __le32 crc; 1743d8c636cSLorenzo Bianconi } __packed; 1753d8c636cSLorenzo Bianconi 1763d8c636cSLorenzo Bianconi struct mt76_connac2_fw_region { 1773d8c636cSLorenzo Bianconi __le32 decomp_crc; 1783d8c636cSLorenzo Bianconi __le32 decomp_len; 1793d8c636cSLorenzo Bianconi __le32 decomp_blk_sz; 1803d8c636cSLorenzo Bianconi u8 rsv[4]; 1813d8c636cSLorenzo Bianconi __le32 addr; 1823d8c636cSLorenzo Bianconi __le32 len; 1833d8c636cSLorenzo Bianconi u8 feature_set; 184*23bdc5d8SMing Yen Hsieh u8 type; 185*23bdc5d8SMing Yen Hsieh u8 rsv1[14]; 1863d8c636cSLorenzo Bianconi } __packed; 1873d8c636cSLorenzo Bianconi 188d0e274afSLorenzo Bianconi struct tlv { 189d0e274afSLorenzo Bianconi __le16 tag; 190d0e274afSLorenzo Bianconi __le16 len; 191d0e274afSLorenzo Bianconi } __packed; 192d0e274afSLorenzo Bianconi 1935562d5f6SLorenzo Bianconi struct bss_info_omac { 1945562d5f6SLorenzo Bianconi __le16 tag; 1955562d5f6SLorenzo Bianconi __le16 len; 1965562d5f6SLorenzo Bianconi u8 hw_bss_idx; 1975562d5f6SLorenzo Bianconi u8 omac_idx; 1985562d5f6SLorenzo Bianconi u8 band_idx; 1995562d5f6SLorenzo Bianconi u8 rsv0; 2005562d5f6SLorenzo Bianconi __le32 conn_type; 2015562d5f6SLorenzo Bianconi u32 rsv1; 2025562d5f6SLorenzo Bianconi } __packed; 2035562d5f6SLorenzo Bianconi 2045562d5f6SLorenzo Bianconi struct bss_info_basic { 2055562d5f6SLorenzo Bianconi __le16 tag; 2065562d5f6SLorenzo Bianconi __le16 len; 2075562d5f6SLorenzo Bianconi __le32 network_type; 2085562d5f6SLorenzo Bianconi u8 active; 2095562d5f6SLorenzo Bianconi u8 rsv0; 2105562d5f6SLorenzo Bianconi __le16 bcn_interval; 2115562d5f6SLorenzo Bianconi u8 bssid[ETH_ALEN]; 2125562d5f6SLorenzo Bianconi u8 wmm_idx; 2135562d5f6SLorenzo Bianconi u8 dtim_period; 2145562d5f6SLorenzo Bianconi u8 bmc_wcid_lo; 2155562d5f6SLorenzo Bianconi u8 cipher; 2165562d5f6SLorenzo Bianconi u8 phy_mode; 2175562d5f6SLorenzo Bianconi u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */ 2185562d5f6SLorenzo Bianconi u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */ 2195562d5f6SLorenzo Bianconi u8 bmc_wcid_hi; /* high Byte and version */ 2205562d5f6SLorenzo Bianconi u8 rsv[2]; 2215562d5f6SLorenzo Bianconi } __packed; 2225562d5f6SLorenzo Bianconi 2235562d5f6SLorenzo Bianconi struct bss_info_rf_ch { 2245562d5f6SLorenzo Bianconi __le16 tag; 2255562d5f6SLorenzo Bianconi __le16 len; 2265562d5f6SLorenzo Bianconi u8 pri_ch; 2275562d5f6SLorenzo Bianconi u8 center_ch0; 2285562d5f6SLorenzo Bianconi u8 center_ch1; 2295562d5f6SLorenzo Bianconi u8 bw; 2305562d5f6SLorenzo Bianconi u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */ 2315562d5f6SLorenzo Bianconi u8 he_all_disable; /* 1: disallow all HETB, 0: allow */ 2325562d5f6SLorenzo Bianconi u8 rsv[2]; 2335562d5f6SLorenzo Bianconi } __packed; 2345562d5f6SLorenzo Bianconi 2355562d5f6SLorenzo Bianconi struct bss_info_ext_bss { 2365562d5f6SLorenzo Bianconi __le16 tag; 2375562d5f6SLorenzo Bianconi __le16 len; 2385562d5f6SLorenzo Bianconi __le32 mbss_tsf_offset; /* in unit of us */ 2395562d5f6SLorenzo Bianconi u8 rsv[8]; 2405562d5f6SLorenzo Bianconi } __packed; 2415562d5f6SLorenzo Bianconi 2425562d5f6SLorenzo Bianconi enum { 2435562d5f6SLorenzo Bianconi BSS_INFO_OMAC, 2445562d5f6SLorenzo Bianconi BSS_INFO_BASIC, 2455562d5f6SLorenzo Bianconi BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 2465562d5f6SLorenzo Bianconi BSS_INFO_PM, /* sta only */ 2475562d5f6SLorenzo Bianconi BSS_INFO_UAPSD, /* sta only */ 2485562d5f6SLorenzo Bianconi BSS_INFO_ROAM_DETECT, /* obsoleted */ 2495562d5f6SLorenzo Bianconi BSS_INFO_LQ_RM, /* obsoleted */ 2505562d5f6SLorenzo Bianconi BSS_INFO_EXT_BSS, 2515562d5f6SLorenzo Bianconi BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */ 2525562d5f6SLorenzo Bianconi BSS_INFO_SYNC_MODE, /* obsoleted */ 2535562d5f6SLorenzo Bianconi BSS_INFO_RA, 2545562d5f6SLorenzo Bianconi BSS_INFO_HW_AMSDU, 2555562d5f6SLorenzo Bianconi BSS_INFO_BSS_COLOR, 2565562d5f6SLorenzo Bianconi BSS_INFO_HE_BASIC, 2575562d5f6SLorenzo Bianconi BSS_INFO_PROTECT_INFO, 2585562d5f6SLorenzo Bianconi BSS_INFO_OFFLOAD, 2595562d5f6SLorenzo Bianconi BSS_INFO_11V_MBSSID, 2605562d5f6SLorenzo Bianconi BSS_INFO_MAX_NUM 2615562d5f6SLorenzo Bianconi }; 2625562d5f6SLorenzo Bianconi 263d0e274afSLorenzo Bianconi /* sta_rec */ 264d0e274afSLorenzo Bianconi 265d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 266d0e274afSLorenzo Bianconi u8 rsv[2]; 267d0e274afSLorenzo Bianconi __le16 tlv_num; 268d0e274afSLorenzo Bianconi } __packed; 269d0e274afSLorenzo Bianconi 270d0e274afSLorenzo Bianconi struct sta_req_hdr { 271d0e274afSLorenzo Bianconi u8 bss_idx; 272d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 273d0e274afSLorenzo Bianconi __le16 tlv_num; 274d0e274afSLorenzo Bianconi u8 is_tlv_append; 275d0e274afSLorenzo Bianconi u8 muar_idx; 276d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 277d0e274afSLorenzo Bianconi u8 rsv; 278d0e274afSLorenzo Bianconi } __packed; 279d0e274afSLorenzo Bianconi 280d0e274afSLorenzo Bianconi struct sta_rec_basic { 281d0e274afSLorenzo Bianconi __le16 tag; 282d0e274afSLorenzo Bianconi __le16 len; 283d0e274afSLorenzo Bianconi __le32 conn_type; 284d0e274afSLorenzo Bianconi u8 conn_state; 285d0e274afSLorenzo Bianconi u8 qos; 286d0e274afSLorenzo Bianconi __le16 aid; 287d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 288d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 289d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 290d0e274afSLorenzo Bianconi __le16 extra_info; 291d0e274afSLorenzo Bianconi } __packed; 292d0e274afSLorenzo Bianconi 293d0e274afSLorenzo Bianconi struct sta_rec_ht { 294d0e274afSLorenzo Bianconi __le16 tag; 295d0e274afSLorenzo Bianconi __le16 len; 296d0e274afSLorenzo Bianconi __le16 ht_cap; 297d0e274afSLorenzo Bianconi u16 rsv; 298d0e274afSLorenzo Bianconi } __packed; 299d0e274afSLorenzo Bianconi 300d0e274afSLorenzo Bianconi struct sta_rec_vht { 301d0e274afSLorenzo Bianconi __le16 tag; 302d0e274afSLorenzo Bianconi __le16 len; 303d0e274afSLorenzo Bianconi __le32 vht_cap; 304d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 305d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 3065562d5f6SLorenzo Bianconi /* mt7915 - mt7921 */ 307d0e274afSLorenzo Bianconi u8 rts_bw_sig; 308d0e274afSLorenzo Bianconi u8 rsv[3]; 309d0e274afSLorenzo Bianconi } __packed; 310d0e274afSLorenzo Bianconi 311d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 312d0e274afSLorenzo Bianconi __le16 tag; 313d0e274afSLorenzo Bianconi __le16 len; 314d0e274afSLorenzo Bianconi u8 dac_map; 315d0e274afSLorenzo Bianconi u8 tac_map; 316d0e274afSLorenzo Bianconi u8 max_sp; 317d0e274afSLorenzo Bianconi u8 rsv0; 318d0e274afSLorenzo Bianconi __le16 listen_interval; 319d0e274afSLorenzo Bianconi u8 rsv1[2]; 320d0e274afSLorenzo Bianconi } __packed; 321d0e274afSLorenzo Bianconi 322d0e274afSLorenzo Bianconi struct sta_rec_ba { 323d0e274afSLorenzo Bianconi __le16 tag; 324d0e274afSLorenzo Bianconi __le16 len; 325d0e274afSLorenzo Bianconi u8 tid; 326d0e274afSLorenzo Bianconi u8 ba_type; 327d0e274afSLorenzo Bianconi u8 amsdu; 328d0e274afSLorenzo Bianconi u8 ba_en; 329d0e274afSLorenzo Bianconi __le16 ssn; 330d0e274afSLorenzo Bianconi __le16 winsize; 331d0e274afSLorenzo Bianconi } __packed; 332d0e274afSLorenzo Bianconi 333d0e274afSLorenzo Bianconi struct sta_rec_he { 334d0e274afSLorenzo Bianconi __le16 tag; 335d0e274afSLorenzo Bianconi __le16 len; 336d0e274afSLorenzo Bianconi 337d0e274afSLorenzo Bianconi __le32 he_cap; 338d0e274afSLorenzo Bianconi 339d0e274afSLorenzo Bianconi u8 t_frame_dur; 340d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 341d0e274afSLorenzo Bianconi u8 bw_set; 342d0e274afSLorenzo Bianconi u8 device_class; 343d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 344d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 345d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 346d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 347d0e274afSLorenzo Bianconi u8 dcm_max_ru; 348d0e274afSLorenzo Bianconi u8 punc_pream_rx; 349d0e274afSLorenzo Bianconi u8 pkt_ext; 350d0e274afSLorenzo Bianconi u8 rsv1; 351d0e274afSLorenzo Bianconi 352d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 353d0e274afSLorenzo Bianconi 354d0e274afSLorenzo Bianconi u8 rsv2[2]; 355d0e274afSLorenzo Bianconi } __packed; 356d0e274afSLorenzo Bianconi 357d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 358d0e274afSLorenzo Bianconi __le16 tag; 359d0e274afSLorenzo Bianconi __le16 len; 360d0e274afSLorenzo Bianconi u8 max_amsdu_num; 361d0e274afSLorenzo Bianconi u8 max_mpdu_size; 362d0e274afSLorenzo Bianconi u8 amsdu_en; 363d0e274afSLorenzo Bianconi u8 rsv; 364d0e274afSLorenzo Bianconi } __packed; 365d0e274afSLorenzo Bianconi 366d0e274afSLorenzo Bianconi struct sta_rec_state { 367d0e274afSLorenzo Bianconi __le16 tag; 368d0e274afSLorenzo Bianconi __le16 len; 369d0e274afSLorenzo Bianconi __le32 flags; 370d0e274afSLorenzo Bianconi u8 state; 371d0e274afSLorenzo Bianconi u8 vht_opmode; 372d0e274afSLorenzo Bianconi u8 action; 373d0e274afSLorenzo Bianconi u8 rsv[1]; 374d0e274afSLorenzo Bianconi } __packed; 375d0e274afSLorenzo Bianconi 37699b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 37799b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 378d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 379d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 380d0e274afSLorenzo Bianconi __le16 tag; 381d0e274afSLorenzo Bianconi __le16 len; 382d0e274afSLorenzo Bianconi __le16 legacy; 383d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 384d0e274afSLorenzo Bianconi } __packed; 385d0e274afSLorenzo Bianconi 386d0e274afSLorenzo Bianconi struct sta_rec_phy { 387d0e274afSLorenzo Bianconi __le16 tag; 388d0e274afSLorenzo Bianconi __le16 len; 389d0e274afSLorenzo Bianconi __le16 basic_rate; 390d0e274afSLorenzo Bianconi u8 phy_type; 391d0e274afSLorenzo Bianconi u8 ampdu; 392d0e274afSLorenzo Bianconi u8 rts_policy; 393d0e274afSLorenzo Bianconi u8 rcpi; 394d0e274afSLorenzo Bianconi u8 rsv[2]; 395d0e274afSLorenzo Bianconi } __packed; 396d0e274afSLorenzo Bianconi 3975883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 3985883892bSLorenzo Bianconi __le16 tag; 3995883892bSLorenzo Bianconi __le16 len; 4005883892bSLorenzo Bianconi __le16 capa; 4015883892bSLorenzo Bianconi u8 rsv[2]; 4025883892bSLorenzo Bianconi } __packed; 4035883892bSLorenzo Bianconi 4045562d5f6SLorenzo Bianconi struct sec_key { 4055562d5f6SLorenzo Bianconi u8 cipher_id; 4065562d5f6SLorenzo Bianconi u8 cipher_len; 4075562d5f6SLorenzo Bianconi u8 key_id; 4085562d5f6SLorenzo Bianconi u8 key_len; 4095562d5f6SLorenzo Bianconi u8 key[32]; 4105562d5f6SLorenzo Bianconi } __packed; 4115562d5f6SLorenzo Bianconi 4125562d5f6SLorenzo Bianconi struct sta_rec_sec { 4135562d5f6SLorenzo Bianconi __le16 tag; 4145562d5f6SLorenzo Bianconi __le16 len; 4155562d5f6SLorenzo Bianconi u8 add; 4165562d5f6SLorenzo Bianconi u8 n_cipher; 4175562d5f6SLorenzo Bianconi u8 rsv[2]; 4185562d5f6SLorenzo Bianconi 4195562d5f6SLorenzo Bianconi struct sec_key key[2]; 4205562d5f6SLorenzo Bianconi } __packed; 4215562d5f6SLorenzo Bianconi 4225562d5f6SLorenzo Bianconi struct sta_rec_bf { 4235562d5f6SLorenzo Bianconi __le16 tag; 4245562d5f6SLorenzo Bianconi __le16 len; 4255562d5f6SLorenzo Bianconi 4265562d5f6SLorenzo Bianconi __le16 pfmu; /* 0xffff: no access right for PFMU */ 4275562d5f6SLorenzo Bianconi bool su_mu; /* 0: SU, 1: MU */ 4285562d5f6SLorenzo Bianconi u8 bf_cap; /* 0: iBF, 1: eBF */ 4295562d5f6SLorenzo Bianconi u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */ 4305562d5f6SLorenzo Bianconi u8 ndpa_rate; 4315562d5f6SLorenzo Bianconi u8 ndp_rate; 4325562d5f6SLorenzo Bianconi u8 rept_poll_rate; 4335562d5f6SLorenzo Bianconi u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */ 4345562d5f6SLorenzo Bianconi u8 ncol; 4355562d5f6SLorenzo Bianconi u8 nrow; 4365562d5f6SLorenzo Bianconi u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */ 4375562d5f6SLorenzo Bianconi 4385562d5f6SLorenzo Bianconi u8 mem_total; 4395562d5f6SLorenzo Bianconi u8 mem_20m; 4405562d5f6SLorenzo Bianconi struct { 4415562d5f6SLorenzo Bianconi u8 row; 4425562d5f6SLorenzo Bianconi u8 col: 6, row_msb: 2; 4435562d5f6SLorenzo Bianconi } mem[4]; 4445562d5f6SLorenzo Bianconi 4455562d5f6SLorenzo Bianconi __le16 smart_ant; 4465562d5f6SLorenzo Bianconi u8 se_idx; 4475562d5f6SLorenzo Bianconi u8 auto_sounding; /* b7: low traffic indicator 4485562d5f6SLorenzo Bianconi * b6: Stop sounding for this entry 4495562d5f6SLorenzo Bianconi * b5 ~ b0: postpone sounding 4505562d5f6SLorenzo Bianconi */ 4515562d5f6SLorenzo Bianconi u8 ibf_timeout; 4525562d5f6SLorenzo Bianconi u8 ibf_dbw; 4535562d5f6SLorenzo Bianconi u8 ibf_ncol; 4545562d5f6SLorenzo Bianconi u8 ibf_nrow; 4555562d5f6SLorenzo Bianconi u8 nrow_bw160; 4565562d5f6SLorenzo Bianconi u8 ncol_bw160; 4575562d5f6SLorenzo Bianconi u8 ru_start_idx; 4585562d5f6SLorenzo Bianconi u8 ru_end_idx; 4595562d5f6SLorenzo Bianconi 4605562d5f6SLorenzo Bianconi bool trigger_su; 4615562d5f6SLorenzo Bianconi bool trigger_mu; 4625562d5f6SLorenzo Bianconi bool ng16_su; 4635562d5f6SLorenzo Bianconi bool ng16_mu; 4645562d5f6SLorenzo Bianconi bool codebook42_su; 4655562d5f6SLorenzo Bianconi bool codebook75_mu; 4665562d5f6SLorenzo Bianconi 4675562d5f6SLorenzo Bianconi u8 he_ltf; 4685562d5f6SLorenzo Bianconi u8 rsv[3]; 4695562d5f6SLorenzo Bianconi } __packed; 4705562d5f6SLorenzo Bianconi 4715562d5f6SLorenzo Bianconi struct sta_rec_bfee { 4725562d5f6SLorenzo Bianconi __le16 tag; 4735562d5f6SLorenzo Bianconi __le16 len; 4745562d5f6SLorenzo Bianconi bool fb_identity_matrix; /* 1: feedback identity matrix */ 4755562d5f6SLorenzo Bianconi bool ignore_feedback; /* 1: ignore */ 4765562d5f6SLorenzo Bianconi u8 rsv[2]; 4775562d5f6SLorenzo Bianconi } __packed; 4785562d5f6SLorenzo Bianconi 4795562d5f6SLorenzo Bianconi struct sta_rec_muru { 4805562d5f6SLorenzo Bianconi __le16 tag; 4815562d5f6SLorenzo Bianconi __le16 len; 4825562d5f6SLorenzo Bianconi 4835562d5f6SLorenzo Bianconi struct { 4845562d5f6SLorenzo Bianconi bool ofdma_dl_en; 4855562d5f6SLorenzo Bianconi bool ofdma_ul_en; 4865562d5f6SLorenzo Bianconi bool mimo_dl_en; 4875562d5f6SLorenzo Bianconi bool mimo_ul_en; 4885562d5f6SLorenzo Bianconi u8 rsv[4]; 4895562d5f6SLorenzo Bianconi } cfg; 4905562d5f6SLorenzo Bianconi 4915562d5f6SLorenzo Bianconi struct { 4925562d5f6SLorenzo Bianconi u8 punc_pream_rx; 4935562d5f6SLorenzo Bianconi bool he_20m_in_40m_2g; 4945562d5f6SLorenzo Bianconi bool he_20m_in_160m; 4955562d5f6SLorenzo Bianconi bool he_80m_in_160m; 4965562d5f6SLorenzo Bianconi bool lt16_sigb; 4975562d5f6SLorenzo Bianconi bool rx_su_comp_sigb; 4985562d5f6SLorenzo Bianconi bool rx_su_non_comp_sigb; 4995562d5f6SLorenzo Bianconi u8 rsv; 5005562d5f6SLorenzo Bianconi } ofdma_dl; 5015562d5f6SLorenzo Bianconi 5025562d5f6SLorenzo Bianconi struct { 5035562d5f6SLorenzo Bianconi u8 t_frame_dur; 5045562d5f6SLorenzo Bianconi u8 mu_cascading; 5055562d5f6SLorenzo Bianconi u8 uo_ra; 5065562d5f6SLorenzo Bianconi u8 he_2x996_tone; 5075562d5f6SLorenzo Bianconi u8 rx_t_frame_11ac; 5085562d5f6SLorenzo Bianconi u8 rsv[3]; 5095562d5f6SLorenzo Bianconi } ofdma_ul; 5105562d5f6SLorenzo Bianconi 5115562d5f6SLorenzo Bianconi struct { 5125562d5f6SLorenzo Bianconi bool vht_mu_bfee; 5135562d5f6SLorenzo Bianconi bool partial_bw_dl_mimo; 5145562d5f6SLorenzo Bianconi u8 rsv[2]; 5155562d5f6SLorenzo Bianconi } mimo_dl; 5165562d5f6SLorenzo Bianconi 5175562d5f6SLorenzo Bianconi struct { 5185562d5f6SLorenzo Bianconi bool full_ul_mimo; 5195562d5f6SLorenzo Bianconi bool partial_ul_mimo; 5205562d5f6SLorenzo Bianconi u8 rsv[2]; 5215562d5f6SLorenzo Bianconi } mimo_ul; 5225562d5f6SLorenzo Bianconi } __packed; 5235562d5f6SLorenzo Bianconi 5245562d5f6SLorenzo Bianconi struct sta_phy { 5255562d5f6SLorenzo Bianconi u8 type; 5265562d5f6SLorenzo Bianconi u8 flag; 5275562d5f6SLorenzo Bianconi u8 stbc; 5285562d5f6SLorenzo Bianconi u8 sgi; 5295562d5f6SLorenzo Bianconi u8 bw; 5305562d5f6SLorenzo Bianconi u8 ldpc; 5315562d5f6SLorenzo Bianconi u8 mcs; 5325562d5f6SLorenzo Bianconi u8 nss; 5335562d5f6SLorenzo Bianconi u8 he_ltf; 5345562d5f6SLorenzo Bianconi }; 5355562d5f6SLorenzo Bianconi 5365562d5f6SLorenzo Bianconi struct sta_rec_ra { 5375562d5f6SLorenzo Bianconi __le16 tag; 5385562d5f6SLorenzo Bianconi __le16 len; 5395562d5f6SLorenzo Bianconi 5405562d5f6SLorenzo Bianconi u8 valid; 5415562d5f6SLorenzo Bianconi u8 auto_rate; 5425562d5f6SLorenzo Bianconi u8 phy_mode; 5435562d5f6SLorenzo Bianconi u8 channel; 5445562d5f6SLorenzo Bianconi u8 bw; 5455562d5f6SLorenzo Bianconi u8 disable_cck; 5465562d5f6SLorenzo Bianconi u8 ht_mcs32; 5475562d5f6SLorenzo Bianconi u8 ht_gf; 5485562d5f6SLorenzo Bianconi u8 ht_mcs[4]; 5495562d5f6SLorenzo Bianconi u8 mmps_mode; 5505562d5f6SLorenzo Bianconi u8 gband_256; 5515562d5f6SLorenzo Bianconi u8 af; 5525562d5f6SLorenzo Bianconi u8 auth_wapi_mode; 5535562d5f6SLorenzo Bianconi u8 rate_len; 5545562d5f6SLorenzo Bianconi 5555562d5f6SLorenzo Bianconi u8 supp_mode; 5565562d5f6SLorenzo Bianconi u8 supp_cck_rate; 5575562d5f6SLorenzo Bianconi u8 supp_ofdm_rate; 5585562d5f6SLorenzo Bianconi __le32 supp_ht_mcs; 5595562d5f6SLorenzo Bianconi __le16 supp_vht_mcs[4]; 5605562d5f6SLorenzo Bianconi 5615562d5f6SLorenzo Bianconi u8 op_mode; 5625562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 5635562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 5645562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 5655562d5f6SLorenzo Bianconi 5665562d5f6SLorenzo Bianconi __le32 sta_cap; 5675562d5f6SLorenzo Bianconi 5685562d5f6SLorenzo Bianconi struct sta_phy phy; 5695562d5f6SLorenzo Bianconi } __packed; 5705562d5f6SLorenzo Bianconi 5715562d5f6SLorenzo Bianconi struct sta_rec_ra_fixed { 5725562d5f6SLorenzo Bianconi __le16 tag; 5735562d5f6SLorenzo Bianconi __le16 len; 5745562d5f6SLorenzo Bianconi 5755562d5f6SLorenzo Bianconi __le32 field; 5765562d5f6SLorenzo Bianconi u8 op_mode; 5775562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 5785562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 5795562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 5805562d5f6SLorenzo Bianconi 5815562d5f6SLorenzo Bianconi struct sta_phy phy; 5825562d5f6SLorenzo Bianconi 5835562d5f6SLorenzo Bianconi u8 spe_en; 5845562d5f6SLorenzo Bianconi u8 short_preamble; 5855562d5f6SLorenzo Bianconi u8 is_5g; 5865562d5f6SLorenzo Bianconi u8 mmps_mode; 5875562d5f6SLorenzo Bianconi } __packed; 5885562d5f6SLorenzo Bianconi 589d0e274afSLorenzo Bianconi /* wtbl_rec */ 590d0e274afSLorenzo Bianconi 591d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 592d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 593d0e274afSLorenzo Bianconi u8 operation; 594d0e274afSLorenzo Bianconi __le16 tlv_num; 595d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 596d0e274afSLorenzo Bianconi u8 rsv[3]; 597d0e274afSLorenzo Bianconi } __packed; 598d0e274afSLorenzo Bianconi 599d0e274afSLorenzo Bianconi struct wtbl_generic { 600d0e274afSLorenzo Bianconi __le16 tag; 601d0e274afSLorenzo Bianconi __le16 len; 602d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 603d0e274afSLorenzo Bianconi u8 muar_idx; 604d0e274afSLorenzo Bianconi u8 skip_tx; 605d0e274afSLorenzo Bianconi u8 cf_ack; 606d0e274afSLorenzo Bianconi u8 qos; 607d0e274afSLorenzo Bianconi u8 mesh; 608d0e274afSLorenzo Bianconi u8 adm; 609d0e274afSLorenzo Bianconi __le16 partial_aid; 610d0e274afSLorenzo Bianconi u8 baf_en; 611d0e274afSLorenzo Bianconi u8 aad_om; 612d0e274afSLorenzo Bianconi } __packed; 613d0e274afSLorenzo Bianconi 614d0e274afSLorenzo Bianconi struct wtbl_rx { 615d0e274afSLorenzo Bianconi __le16 tag; 616d0e274afSLorenzo Bianconi __le16 len; 617d0e274afSLorenzo Bianconi u8 rcid; 618d0e274afSLorenzo Bianconi u8 rca1; 619d0e274afSLorenzo Bianconi u8 rca2; 620d0e274afSLorenzo Bianconi u8 rv; 621d0e274afSLorenzo Bianconi u8 rsv[4]; 622d0e274afSLorenzo Bianconi } __packed; 623d0e274afSLorenzo Bianconi 624d0e274afSLorenzo Bianconi struct wtbl_ht { 625d0e274afSLorenzo Bianconi __le16 tag; 626d0e274afSLorenzo Bianconi __le16 len; 627d0e274afSLorenzo Bianconi u8 ht; 628d0e274afSLorenzo Bianconi u8 ldpc; 629d0e274afSLorenzo Bianconi u8 af; 630d0e274afSLorenzo Bianconi u8 mm; 631d0e274afSLorenzo Bianconi u8 rsv[4]; 632d0e274afSLorenzo Bianconi } __packed; 633d0e274afSLorenzo Bianconi 634d0e274afSLorenzo Bianconi struct wtbl_vht { 635d0e274afSLorenzo Bianconi __le16 tag; 636d0e274afSLorenzo Bianconi __le16 len; 637d0e274afSLorenzo Bianconi u8 ldpc; 638d0e274afSLorenzo Bianconi u8 dyn_bw; 639d0e274afSLorenzo Bianconi u8 vht; 640d0e274afSLorenzo Bianconi u8 txop_ps; 641d0e274afSLorenzo Bianconi u8 rsv[4]; 642d0e274afSLorenzo Bianconi } __packed; 643d0e274afSLorenzo Bianconi 644d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 645d0e274afSLorenzo Bianconi __le16 tag; 646d0e274afSLorenzo Bianconi __le16 len; 647d0e274afSLorenzo Bianconi u8 txps; 648d0e274afSLorenzo Bianconi u8 rsv[3]; 649d0e274afSLorenzo Bianconi } __packed; 650d0e274afSLorenzo Bianconi 651d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 652d0e274afSLorenzo Bianconi __le16 tag; 653d0e274afSLorenzo Bianconi __le16 len; 654d0e274afSLorenzo Bianconi u8 to_ds; 655d0e274afSLorenzo Bianconi u8 from_ds; 656d4b98c63SRyder Lee u8 no_rx_trans; 657d0e274afSLorenzo Bianconi u8 rsv; 658d0e274afSLorenzo Bianconi } __packed; 659d0e274afSLorenzo Bianconi 660d0e274afSLorenzo Bianconi struct wtbl_ba { 661d0e274afSLorenzo Bianconi __le16 tag; 662d0e274afSLorenzo Bianconi __le16 len; 663d0e274afSLorenzo Bianconi /* common */ 664d0e274afSLorenzo Bianconi u8 tid; 665d0e274afSLorenzo Bianconi u8 ba_type; 666d0e274afSLorenzo Bianconi u8 rsv0[2]; 667d0e274afSLorenzo Bianconi /* originator only */ 668d0e274afSLorenzo Bianconi __le16 sn; 669d0e274afSLorenzo Bianconi u8 ba_en; 670d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 6715562d5f6SLorenzo Bianconi /* originator & recipient */ 672d0e274afSLorenzo Bianconi __le16 ba_winsize; 673d0e274afSLorenzo Bianconi /* recipient only */ 674d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 675d0e274afSLorenzo Bianconi u8 rst_ba_tid; 676d0e274afSLorenzo Bianconi u8 rst_ba_sel; 677d0e274afSLorenzo Bianconi u8 rst_ba_sb; 678d0e274afSLorenzo Bianconi u8 band_idx; 679d0e274afSLorenzo Bianconi u8 rsv1[4]; 680d0e274afSLorenzo Bianconi } __packed; 681d0e274afSLorenzo Bianconi 682d0e274afSLorenzo Bianconi struct wtbl_smps { 683d0e274afSLorenzo Bianconi __le16 tag; 684d0e274afSLorenzo Bianconi __le16 len; 685d0e274afSLorenzo Bianconi u8 smps; 686d0e274afSLorenzo Bianconi u8 rsv[3]; 687d0e274afSLorenzo Bianconi } __packed; 688d0e274afSLorenzo Bianconi 689d0e274afSLorenzo Bianconi /* mt7615 only */ 690d0e274afSLorenzo Bianconi 691d0e274afSLorenzo Bianconi struct wtbl_bf { 692d0e274afSLorenzo Bianconi __le16 tag; 693d0e274afSLorenzo Bianconi __le16 len; 694d0e274afSLorenzo Bianconi u8 ibf; 695d0e274afSLorenzo Bianconi u8 ebf; 696d0e274afSLorenzo Bianconi u8 ibf_vht; 697d0e274afSLorenzo Bianconi u8 ebf_vht; 698d0e274afSLorenzo Bianconi u8 gid; 699d0e274afSLorenzo Bianconi u8 pfmu_idx; 700d0e274afSLorenzo Bianconi u8 rsv[2]; 701d0e274afSLorenzo Bianconi } __packed; 702d0e274afSLorenzo Bianconi 703d0e274afSLorenzo Bianconi struct wtbl_pn { 704d0e274afSLorenzo Bianconi __le16 tag; 705d0e274afSLorenzo Bianconi __le16 len; 706d0e274afSLorenzo Bianconi u8 pn[6]; 707d0e274afSLorenzo Bianconi u8 rsv[2]; 708d0e274afSLorenzo Bianconi } __packed; 709d0e274afSLorenzo Bianconi 710d0e274afSLorenzo Bianconi struct wtbl_spe { 711d0e274afSLorenzo Bianconi __le16 tag; 712d0e274afSLorenzo Bianconi __le16 len; 713d0e274afSLorenzo Bianconi u8 spe_idx; 714d0e274afSLorenzo Bianconi u8 rsv[3]; 715d0e274afSLorenzo Bianconi } __packed; 716d0e274afSLorenzo Bianconi 717d0e274afSLorenzo Bianconi struct wtbl_raw { 718d0e274afSLorenzo Bianconi __le16 tag; 719d0e274afSLorenzo Bianconi __le16 len; 720d0e274afSLorenzo Bianconi u8 wtbl_idx; 721d0e274afSLorenzo Bianconi u8 dw; 722d0e274afSLorenzo Bianconi u8 rsv[2]; 723d0e274afSLorenzo Bianconi __le32 msk; 724d0e274afSLorenzo Bianconi __le32 val; 725d0e274afSLorenzo Bianconi } __packed; 726d0e274afSLorenzo Bianconi 727d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 728d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 729d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 730d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 731d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 732d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 733d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 734d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 735d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 736d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 737d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 738d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 739d0e274afSLorenzo Bianconi 740d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 741d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 7425562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bf) + \ 743d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 744d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 745d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 746d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 747d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 748d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 7495562d5f6SLorenzo Bianconi sizeof(struct sta_rec_muru) + \ 7505562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bfee) + \ 7515562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra) + \ 752e2c93b68SLorenzo Bianconi sizeof(struct sta_rec_sec) + \ 7535562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra_fixed) + \ 7545883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 755d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 756d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 757d0e274afSLorenzo Bianconi 758d0e274afSLorenzo Bianconi enum { 759d0e274afSLorenzo Bianconi STA_REC_BASIC, 760d0e274afSLorenzo Bianconi STA_REC_RA, 761d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 762d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 763d0e274afSLorenzo Bianconi STA_REC_BF, 764d0e274afSLorenzo Bianconi STA_REC_AMSDU, 765d0e274afSLorenzo Bianconi STA_REC_BA, 766d0e274afSLorenzo Bianconi STA_REC_STATE, 767d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 768d0e274afSLorenzo Bianconi STA_REC_HT, 769d0e274afSLorenzo Bianconi STA_REC_VHT, 770d0e274afSLorenzo Bianconi STA_REC_APPS, 771d0e274afSLorenzo Bianconi STA_REC_KEY, 772d0e274afSLorenzo Bianconi STA_REC_WTBL, 773d0e274afSLorenzo Bianconi STA_REC_HE, 774d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 775d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 776d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 777d0e274afSLorenzo Bianconi STA_REC_MURU, 778d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 779d0e274afSLorenzo Bianconi STA_REC_BFEE, 780d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 7815883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 782d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 783d0e274afSLorenzo Bianconi }; 784d0e274afSLorenzo Bianconi 785d0e274afSLorenzo Bianconi enum { 786d0e274afSLorenzo Bianconi WTBL_GENERIC, 787d0e274afSLorenzo Bianconi WTBL_RX, 788d0e274afSLorenzo Bianconi WTBL_HT, 789d0e274afSLorenzo Bianconi WTBL_VHT, 790d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 791d0e274afSLorenzo Bianconi WTBL_TX_PS, 792d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 793d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 794d0e274afSLorenzo Bianconi WTBL_BA, 795d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 796d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 797d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 798d0e274afSLorenzo Bianconi WTBL_BF, 799d0e274afSLorenzo Bianconi WTBL_SMPS, 800d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 801d0e274afSLorenzo Bianconi WTBL_PN, 802d0e274afSLorenzo Bianconi WTBL_SPE, 803d0e274afSLorenzo Bianconi WTBL_MAX_NUM 804d0e274afSLorenzo Bianconi }; 805d0e274afSLorenzo Bianconi 806d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 807d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 808d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 809d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 810d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 811d0e274afSLorenzo Bianconi 812d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 813d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 814d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 815d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 816d0e274afSLorenzo Bianconi 8174da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 8184da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 8194da64fe0SSean Wang 820d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 821d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 822d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 823d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 824d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 825d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 826d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 827d0e274afSLorenzo Bianconi 828d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 829d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 830d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 831d0e274afSLorenzo Bianconi 832d0e274afSLorenzo Bianconi /* HE MAC */ 833d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 834d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 835d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 836d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 837d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 838d0e274afSLorenzo Bianconi /* HE PHY */ 839d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 840d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 841d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 842d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 843d0e274afSLorenzo Bianconi /* STBC */ 844d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 845d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 846d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 847d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 848d0e274afSLorenzo Bianconi /* GI */ 849d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 850d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 851d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 852d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 853d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 854d0e274afSLorenzo Bianconi /* 242 TONE */ 855d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 856d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 857d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 858d0e274afSLorenzo Bianconi 859d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 860d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 861d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 862d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 863d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 864d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 865d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 866d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 867dfdf6725SLorenzo Bianconi 868dfdf6725SLorenzo Bianconi #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ 869d0e274afSLorenzo Bianconi 870d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 871d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 872d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 873d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 874d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 875d0e274afSLorenzo Bianconi 8765562d5f6SLorenzo Bianconi #define STA_CAP_WMM BIT(0) 8775562d5f6SLorenzo Bianconi #define STA_CAP_SGI_20 BIT(4) 8785562d5f6SLorenzo Bianconi #define STA_CAP_SGI_40 BIT(5) 8795562d5f6SLorenzo Bianconi #define STA_CAP_TX_STBC BIT(6) 8805562d5f6SLorenzo Bianconi #define STA_CAP_RX_STBC BIT(7) 8815562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_80 BIT(16) 8825562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_160 BIT(17) 8835562d5f6SLorenzo Bianconi #define STA_CAP_VHT_TX_STBC BIT(18) 8845562d5f6SLorenzo Bianconi #define STA_CAP_VHT_RX_STBC BIT(19) 8855562d5f6SLorenzo Bianconi #define STA_CAP_VHT_LDPC BIT(23) 8865562d5f6SLorenzo Bianconi #define STA_CAP_LDPC BIT(24) 8875562d5f6SLorenzo Bianconi #define STA_CAP_HT BIT(26) 8885562d5f6SLorenzo Bianconi #define STA_CAP_VHT BIT(27) 8895562d5f6SLorenzo Bianconi #define STA_CAP_HE BIT(28) 8905562d5f6SLorenzo Bianconi 891d0e274afSLorenzo Bianconi enum { 892d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 893d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 894d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 895d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 896d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 897d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 898d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 899d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 900d0e274afSLorenzo Bianconi }; 901d0e274afSLorenzo Bianconi 902d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 903d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 904d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 905d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 906d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 907d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 908d0e274afSLorenzo Bianconi 909d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 910d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 911d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 912d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 913d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 914d0e274afSLorenzo Bianconi 915d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 916d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 917d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 918d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 919d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 920d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 921d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 922d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 923d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 924d0e274afSLorenzo Bianconi 925d0e274afSLorenzo Bianconi enum { 926d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 927d0e274afSLorenzo Bianconi WTBL_SET, 928d0e274afSLorenzo Bianconi WTBL_QUERY, 929d0e274afSLorenzo Bianconi WTBL_RESET_ALL 930d0e274afSLorenzo Bianconi }; 931d0e274afSLorenzo Bianconi 932d0e274afSLorenzo Bianconi enum { 933d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 934d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 935d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 936d0e274afSLorenzo Bianconi }; 937d0e274afSLorenzo Bianconi 938d0e274afSLorenzo Bianconi enum { 939d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 940d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 941d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 942d0e274afSLorenzo Bianconi }; 943d0e274afSLorenzo Bianconi 944d0e274afSLorenzo Bianconi enum { 945d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 946d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 947d0e274afSLorenzo Bianconi }; 948d0e274afSLorenzo Bianconi 9495562d5f6SLorenzo Bianconi /* event table */ 9505562d5f6SLorenzo Bianconi enum { 9515562d5f6SLorenzo Bianconi MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, 9525562d5f6SLorenzo Bianconi MCU_EVENT_FW_START = 0x01, 9535562d5f6SLorenzo Bianconi MCU_EVENT_GENERIC = 0x01, 9545562d5f6SLorenzo Bianconi MCU_EVENT_ACCESS_REG = 0x02, 9555562d5f6SLorenzo Bianconi MCU_EVENT_MT_PATCH_SEM = 0x04, 9565562d5f6SLorenzo Bianconi MCU_EVENT_REG_ACCESS = 0x05, 9575562d5f6SLorenzo Bianconi MCU_EVENT_LP_INFO = 0x07, 9585562d5f6SLorenzo Bianconi MCU_EVENT_SCAN_DONE = 0x0d, 9595562d5f6SLorenzo Bianconi MCU_EVENT_TX_DONE = 0x0f, 9605562d5f6SLorenzo Bianconi MCU_EVENT_ROC = 0x10, 9615562d5f6SLorenzo Bianconi MCU_EVENT_BSS_ABSENCE = 0x11, 9625562d5f6SLorenzo Bianconi MCU_EVENT_BSS_BEACON_LOSS = 0x13, 9635562d5f6SLorenzo Bianconi MCU_EVENT_CH_PRIVILEGE = 0x18, 9645562d5f6SLorenzo Bianconi MCU_EVENT_SCHED_SCAN_DONE = 0x23, 9655562d5f6SLorenzo Bianconi MCU_EVENT_DBG_MSG = 0x27, 9665562d5f6SLorenzo Bianconi MCU_EVENT_TXPWR = 0xd0, 9675562d5f6SLorenzo Bianconi MCU_EVENT_EXT = 0xed, 9685562d5f6SLorenzo Bianconi MCU_EVENT_RESTART_DL = 0xef, 9695562d5f6SLorenzo Bianconi MCU_EVENT_COREDUMP = 0xf0, 9705562d5f6SLorenzo Bianconi }; 9715562d5f6SLorenzo Bianconi 9725562d5f6SLorenzo Bianconi /* ext event table */ 9735562d5f6SLorenzo Bianconi enum { 9745562d5f6SLorenzo Bianconi MCU_EXT_EVENT_PS_SYNC = 0x5, 9755562d5f6SLorenzo Bianconi MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, 9765562d5f6SLorenzo Bianconi MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, 9775562d5f6SLorenzo Bianconi MCU_EXT_EVENT_ASSERT_DUMP = 0x23, 9785562d5f6SLorenzo Bianconi MCU_EXT_EVENT_RDD_REPORT = 0x3a, 9795562d5f6SLorenzo Bianconi MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, 9805562d5f6SLorenzo Bianconi MCU_EXT_EVENT_BCC_NOTIFY = 0x75, 9811966a507SMeiChia Chiu MCU_EXT_EVENT_MURU_CTRL = 0x9f, 9825562d5f6SLorenzo Bianconi }; 9835562d5f6SLorenzo Bianconi 9845562d5f6SLorenzo Bianconi enum { 9855562d5f6SLorenzo Bianconi MCU_Q_QUERY, 9865562d5f6SLorenzo Bianconi MCU_Q_SET, 9875562d5f6SLorenzo Bianconi MCU_Q_RESERVED, 9885562d5f6SLorenzo Bianconi MCU_Q_NA 9895562d5f6SLorenzo Bianconi }; 9905562d5f6SLorenzo Bianconi 9915562d5f6SLorenzo Bianconi enum { 9925562d5f6SLorenzo Bianconi MCU_S2D_H2N, 9935562d5f6SLorenzo Bianconi MCU_S2D_C2N, 9945562d5f6SLorenzo Bianconi MCU_S2D_H2C, 9955562d5f6SLorenzo Bianconi MCU_S2D_H2CN 9965562d5f6SLorenzo Bianconi }; 9975562d5f6SLorenzo Bianconi 9985562d5f6SLorenzo Bianconi enum { 9995562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_FAIL, 10005562d5f6SLorenzo Bianconi PATCH_IS_DL, 10015562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_SUCCESS, 10025562d5f6SLorenzo Bianconi PATCH_REL_SEM_SUCCESS 10035562d5f6SLorenzo Bianconi }; 10045562d5f6SLorenzo Bianconi 10055562d5f6SLorenzo Bianconi enum { 10065562d5f6SLorenzo Bianconi FW_STATE_INITIAL, 10075562d5f6SLorenzo Bianconi FW_STATE_FW_DOWNLOAD, 10085562d5f6SLorenzo Bianconi FW_STATE_NORMAL_OPERATION, 10095562d5f6SLorenzo Bianconi FW_STATE_NORMAL_TRX, 10105562d5f6SLorenzo Bianconi FW_STATE_RDY = 7 10115562d5f6SLorenzo Bianconi }; 10125562d5f6SLorenzo Bianconi 10135562d5f6SLorenzo Bianconi enum { 10145562d5f6SLorenzo Bianconi CH_SWITCH_NORMAL = 0, 10155562d5f6SLorenzo Bianconi CH_SWITCH_SCAN = 3, 10165562d5f6SLorenzo Bianconi CH_SWITCH_MCC = 4, 10175562d5f6SLorenzo Bianconi CH_SWITCH_DFS = 5, 10185562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_START = 6, 10195562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 10205562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 10215562d5f6SLorenzo Bianconi CH_SWITCH_SCAN_BYPASS_DPD = 9 10225562d5f6SLorenzo Bianconi }; 10235562d5f6SLorenzo Bianconi 10245562d5f6SLorenzo Bianconi enum { 10255562d5f6SLorenzo Bianconi THERMAL_SENSOR_TEMP_QUERY, 10265562d5f6SLorenzo Bianconi THERMAL_SENSOR_MANUAL_CTRL, 10275562d5f6SLorenzo Bianconi THERMAL_SENSOR_INFO_QUERY, 10285562d5f6SLorenzo Bianconi THERMAL_SENSOR_TASK_CTRL, 10295562d5f6SLorenzo Bianconi }; 10305562d5f6SLorenzo Bianconi 10315562d5f6SLorenzo Bianconi enum mcu_cipher_type { 10325562d5f6SLorenzo Bianconi MCU_CIPHER_NONE = 0, 10335562d5f6SLorenzo Bianconi MCU_CIPHER_WEP40, 10345562d5f6SLorenzo Bianconi MCU_CIPHER_WEP104, 10355562d5f6SLorenzo Bianconi MCU_CIPHER_WEP128, 10365562d5f6SLorenzo Bianconi MCU_CIPHER_TKIP, 10375562d5f6SLorenzo Bianconi MCU_CIPHER_AES_CCMP, 10385562d5f6SLorenzo Bianconi MCU_CIPHER_CCMP_256, 10395562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP, 10405562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP_256, 10415562d5f6SLorenzo Bianconi MCU_CIPHER_WAPI, 10425562d5f6SLorenzo Bianconi MCU_CIPHER_BIP_CMAC_128, 10435562d5f6SLorenzo Bianconi }; 10445562d5f6SLorenzo Bianconi 10455562d5f6SLorenzo Bianconi enum { 10465562d5f6SLorenzo Bianconi EE_MODE_EFUSE, 10475562d5f6SLorenzo Bianconi EE_MODE_BUFFER, 10485562d5f6SLorenzo Bianconi }; 10495562d5f6SLorenzo Bianconi 10505562d5f6SLorenzo Bianconi enum { 10515562d5f6SLorenzo Bianconi EE_FORMAT_BIN, 10525562d5f6SLorenzo Bianconi EE_FORMAT_WHOLE, 10535562d5f6SLorenzo Bianconi EE_FORMAT_MULTIPLE, 10545562d5f6SLorenzo Bianconi }; 10555562d5f6SLorenzo Bianconi 10565562d5f6SLorenzo Bianconi enum { 10575562d5f6SLorenzo Bianconi MCU_PHY_STATE_TX_RATE, 10585562d5f6SLorenzo Bianconi MCU_PHY_STATE_RX_RATE, 10595562d5f6SLorenzo Bianconi MCU_PHY_STATE_RSSI, 10605562d5f6SLorenzo Bianconi MCU_PHY_STATE_CONTENTION_RX_RATE, 10615562d5f6SLorenzo Bianconi MCU_PHY_STATE_OFDMLQ_CNINFO, 10625562d5f6SLorenzo Bianconi }; 10635562d5f6SLorenzo Bianconi 1064d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 1065d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 1066d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 1067d0e274afSLorenzo Bianconi 1068d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 1069d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 1070d0e274afSLorenzo Bianconi 1071e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_ID GENMASK(7, 0) 1072e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8) 1073e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_QUERY BIT(16) 107454722402SLorenzo Bianconi #define __MCU_CMD_FIELD_UNI BIT(17) 1075680a2eadSLorenzo Bianconi #define __MCU_CMD_FIELD_CE BIT(18) 10765562d5f6SLorenzo Bianconi #define __MCU_CMD_FIELD_WA BIT(19) 1077e6d2070dSLorenzo Bianconi 1078e6d2070dSLorenzo Bianconi #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \ 1079e6d2070dSLorenzo Bianconi MCU_CMD_##_t) 1080e6d2070dSLorenzo Bianconi #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \ 1081e6d2070dSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 1082e6d2070dSLorenzo Bianconi MCU_EXT_CMD_##_t)) 1083e6d2070dSLorenzo Bianconi #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY) 108454722402SLorenzo Bianconi #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \ 108554722402SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 108654722402SLorenzo Bianconi MCU_UNI_CMD_##_t)) 1087680a2eadSLorenzo Bianconi #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \ 1088680a2eadSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 1089680a2eadSLorenzo Bianconi MCU_CE_CMD_##_t)) 1090680a2eadSLorenzo Bianconi #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY) 1091d0e274afSLorenzo Bianconi 10925562d5f6SLorenzo Bianconi #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA) 10935562d5f6SLorenzo Bianconi #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA) 10945562d5f6SLorenzo Bianconi #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \ 10955562d5f6SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 10965562d5f6SLorenzo Bianconi MCU_WA_PARAM_CMD_##_t)) 10975562d5f6SLorenzo Bianconi 1098d0e274afSLorenzo Bianconi enum { 1099d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 1100d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 11019d8d136cSLorenzo Bianconi MCU_EXT_CMD_RF_TEST = 0x04, 1102d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 1103d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 1104d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 1105d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 11069d8d136cSLorenzo Bianconi MCU_EXT_CMD_TXBF_ACTION = 0x1e, 1107d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 11089d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_PROT = 0x23, 1109d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 1110d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 1111d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 1112d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 11139d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_CTRL = 0x2c, 1114d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 11159d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_DRR_CTRL = 0x36, 1116d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 1117d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 1118d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 1119d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 1120d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 1121d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 1122d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 1123d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 11249d8d136cSLorenzo Bianconi MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, 1125d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 11269d8d136cSLorenzo Bianconi MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, 1127d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 1128d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 11299d8d136cSLorenzo Bianconi MCU_EXT_CMD_GET_MIB_INFO = 0x5a, 1130d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 113103a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 11329d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RADAR_TH = 0x7c, 1133d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 11349d8d136cSLorenzo Bianconi MCU_EXT_CMD_MWDS_SUPPORT = 0x80, 11359d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, 11369d8d136cSLorenzo Bianconi MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, 11379d8d136cSLorenzo Bianconi MCU_EXT_CMD_FW_DBG_CTRL = 0x95, 113839cdf080SLorenzo Bianconi MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, 11399d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x9d, 11409d8d136cSLorenzo Bianconi MCU_EXT_CMD_MURU_CTRL = 0x9f, 11419d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SPR = 0xa8, 11429d8d136cSLorenzo Bianconi MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, 11439d8d136cSLorenzo Bianconi MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, 11449d8d136cSLorenzo Bianconi MCU_EXT_CMD_PHY_STAT_INFO = 0xad, 1145d0e274afSLorenzo Bianconi }; 1146d0e274afSLorenzo Bianconi 1147d0e274afSLorenzo Bianconi enum { 114854722402SLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01, 114954722402SLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02, 115054722402SLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = 0x03, 115154722402SLorenzo Bianconi MCU_UNI_CMD_SUSPEND = 0x05, 115254722402SLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = 0x06, 115354722402SLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = 0x07, 1154cbaa0a40SSean Wang MCU_UNI_CMD_SNIFFER = 0x24, 1155d0e274afSLorenzo Bianconi }; 1156d0e274afSLorenzo Bianconi 1157d0e274afSLorenzo Bianconi enum { 11587159eb82SLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 11597159eb82SLorenzo Bianconi MCU_CMD_FW_START_REQ = 0x02, 1160d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 11617159eb82SLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = 0x4, 11627159eb82SLorenzo Bianconi MCU_CMD_PATCH_START_REQ = 0x05, 11637159eb82SLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = 0x07, 11647159eb82SLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = 0x10, 11659d8d136cSLorenzo Bianconi MCU_CMD_WA_PARAM = 0xc4, 1166d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 11677159eb82SLorenzo Bianconi MCU_CMD_FW_SCATTER = 0xee, 11687159eb82SLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = 0xef, 1169d0e274afSLorenzo Bianconi }; 1170d0e274afSLorenzo Bianconi 1171d0e274afSLorenzo Bianconi /* offload mcu commands */ 1172d0e274afSLorenzo Bianconi enum { 1173680a2eadSLorenzo Bianconi MCU_CE_CMD_TEST_CTRL = 0x01, 1174680a2eadSLorenzo Bianconi MCU_CE_CMD_START_HW_SCAN = 0x03, 1175680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_PS_PROFILE = 0x05, 1176680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f, 1177680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, 1178680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_ABORT = 0x17, 1179680a2eadSLorenzo Bianconi MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, 1180bf9727a2SSean Wang MCU_CE_CMD_SET_ROC = 0x1c, 118166ca1a7bSSean Wang MCU_CE_CMD_SET_EDCA_PARMS = 0x1d, 1182680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_P2P_OPPPS = 0x33, 1183*23bdc5d8SMing Yen Hsieh MCU_CE_CMD_SET_CLC = 0x5c, 1184680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, 1185680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, 1186680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_REQ = 0x62, 1187680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_NIC_CAPAB = 0x8a, 1188680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0, 1189680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_WRITE = 0xc0, 1190680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_READ = 0xc0, 1191680a2eadSLorenzo Bianconi MCU_CE_CMD_CHIP_CONFIG = 0xca, 1192680a2eadSLorenzo Bianconi MCU_CE_CMD_FWLOG_2_HOST = 0xc5, 1193680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_WTBL = 0xcd, 1194680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_TXPWR = 0xd0, 1195d0e274afSLorenzo Bianconi }; 1196d0e274afSLorenzo Bianconi 1197d0e274afSLorenzo Bianconi enum { 1198d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 1199d0e274afSLorenzo Bianconi PATCH_SEM_GET 1200d0e274afSLorenzo Bianconi }; 1201d0e274afSLorenzo Bianconi 1202d0e274afSLorenzo Bianconi enum { 1203d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 1204d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 1205b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 1206d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 1207d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 1208d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 1209d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 121067aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 121167aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 1212d0e274afSLorenzo Bianconi }; 1213d0e274afSLorenzo Bianconi 121455d4c19cSLorenzo Bianconi enum { 121555d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 121655d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 121755d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 121855d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 121955d4c19cSLorenzo Bianconi }; 122055d4c19cSLorenzo Bianconi 1221f7d2958cSLorenzo Bianconi enum { 1222f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 1223f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 1224f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 1225f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 1226f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 1227f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 1228f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 1229f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 1230f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 1231f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 1232f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 1233f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 1234f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 1235f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 1236f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 1237f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 1238f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 1239f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 1240f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 1241f7d2958cSLorenzo Bianconi }; 1242f7d2958cSLorenzo Bianconi 1243193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 1244193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 1245193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 1246193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 1247193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 1248193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 1249193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 1250193e5f22SYN Chen 125155d4c19cSLorenzo Bianconi enum { 125255d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 125355d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 125455d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 125555d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 125655d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 125755d4c19cSLorenzo Bianconi }; 125855d4c19cSLorenzo Bianconi 125955d4c19cSLorenzo Bianconi enum { 126055d4c19cSLorenzo Bianconi WOW_USB = 1, 126155d4c19cSLorenzo Bianconi WOW_PCIE = 2, 126255d4c19cSLorenzo Bianconi WOW_GPIO = 3, 126355d4c19cSLorenzo Bianconi }; 126455d4c19cSLorenzo Bianconi 1265d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 1266d0e274afSLorenzo Bianconi __le16 tag; 1267d0e274afSLorenzo Bianconi __le16 len; 1268d0e274afSLorenzo Bianconi u8 active; 1269d0e274afSLorenzo Bianconi u8 omac_idx; 1270d0e274afSLorenzo Bianconi u8 hw_bss_idx; 1271d0e274afSLorenzo Bianconi u8 band_idx; 1272d0e274afSLorenzo Bianconi __le32 conn_type; 1273d0e274afSLorenzo Bianconi u8 conn_state; 1274d0e274afSLorenzo Bianconi u8 wmm_idx; 1275d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1276d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 1277d0e274afSLorenzo Bianconi __le16 bcn_interval; 1278d0e274afSLorenzo Bianconi u8 dtim_period; 1279d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 1280d0e274afSLorenzo Bianconi * bit(1): B 1281d0e274afSLorenzo Bianconi * bit(2): G 1282d0e274afSLorenzo Bianconi * bit(3): GN 1283d0e274afSLorenzo Bianconi * bit(4): AN 1284d0e274afSLorenzo Bianconi * bit(5): AC 12853cf3e01bSLorenzo Bianconi * bit(6): AX2 12863cf3e01bSLorenzo Bianconi * bit(7): AX5 12873cf3e01bSLorenzo Bianconi * bit(8): AX6 1288d0e274afSLorenzo Bianconi */ 1289d0e274afSLorenzo Bianconi __le16 sta_idx; 12903cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 12913cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 12923cf3e01bSLorenzo Bianconi u8 pad[1]; 1293d0e274afSLorenzo Bianconi } __packed; 1294d0e274afSLorenzo Bianconi 1295d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 1296d0e274afSLorenzo Bianconi __le16 tag; 1297d0e274afSLorenzo Bianconi __le16 len; 1298d0e274afSLorenzo Bianconi u8 qos; 1299d0e274afSLorenzo Bianconi u8 pad[3]; 1300d0e274afSLorenzo Bianconi } __packed; 1301d0e274afSLorenzo Bianconi 1302d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 1303d0e274afSLorenzo Bianconi u8 bss_idx; 1304d0e274afSLorenzo Bianconi u8 reason; 1305d0e274afSLorenzo Bianconi u8 pad[2]; 1306d0e274afSLorenzo Bianconi } __packed; 1307d0e274afSLorenzo Bianconi 1308d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 1309d0e274afSLorenzo Bianconi u8 bss_idx; 1310d0e274afSLorenzo Bianconi u8 is_absent; 1311d0e274afSLorenzo Bianconi u8 free_quota; 1312d0e274afSLorenzo Bianconi u8 pad; 1313d0e274afSLorenzo Bianconi } __packed; 1314d0e274afSLorenzo Bianconi 1315399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 1316399090efSLorenzo Bianconi __le32 ssid_len; 1317399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1318399090efSLorenzo Bianconi } __packed; 1319399090efSLorenzo Bianconi 1320399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 1321399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 1322399090efSLorenzo Bianconi * 2: 5.0GHz 1323399090efSLorenzo Bianconi * Others: Reserved 1324399090efSLorenzo Bianconi */ 1325399090efSLorenzo Bianconi u8 channel_num; 1326399090efSLorenzo Bianconi } __packed; 1327399090efSLorenzo Bianconi 1328399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 1329399090efSLorenzo Bianconi __le32 rssi_th; 1330399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1331399090efSLorenzo Bianconi u8 ssid_len; 1332399090efSLorenzo Bianconi u8 rsv[3]; 1333399090efSLorenzo Bianconi } __packed; 1334399090efSLorenzo Bianconi 1335399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 1336399090efSLorenzo Bianconi u8 seq_num; 1337399090efSLorenzo Bianconi u8 bss_idx; 1338399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 1339399090efSLorenzo Bianconi * 1: ACTIVE SCAN 1340399090efSLorenzo Bianconi */ 1341399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 1342399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 1343399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 1344399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 1345399090efSLorenzo Bianconi */ 1346399090efSLorenzo Bianconi u8 ssids_num; 1347399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 1348399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 1349399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 1350399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 1351399090efSLorenzo Bianconi */ 1352399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 1353399090efSLorenzo Bianconi * 1: Support fields after ies. 1354399090efSLorenzo Bianconi */ 1355399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 1356399090efSLorenzo Bianconi __le16 probe_delay_time; 1357399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 1358399090efSLorenzo Bianconi __le16 timeout_value; 1359399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 1360399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 1361399090efSLorenzo Bianconi * 2: Only 5GHz channels 1362399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 1363399090efSLorenzo Bianconi * 4: Specified channels 1364399090efSLorenzo Bianconi * Others: Reserved 1365399090efSLorenzo Bianconi */ 1366399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 1367399090efSLorenzo Bianconi /* valid when channels_num is set */ 1368399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 1369399090efSLorenzo Bianconi __le16 ies_len; 1370399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 1371399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 1372399090efSLorenzo Bianconi u8 ext_channels_num; 1373399090efSLorenzo Bianconi u8 ext_ssids_num; 1374399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 1375399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 1376399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 1377399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1378399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 1379399090efSLorenzo Bianconi u8 pad[63]; 1380399090efSLorenzo Bianconi u8 ssid_type_ext; 1381399090efSLorenzo Bianconi } __packed; 1382399090efSLorenzo Bianconi 1383399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 1384399090efSLorenzo Bianconi 1385399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 1386399090efSLorenzo Bianconi u8 seq_num; 1387399090efSLorenzo Bianconi u8 sparse_channel_num; 1388399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 1389399090efSLorenzo Bianconi u8 complete_channel_num; 1390399090efSLorenzo Bianconi u8 current_state; 1391399090efSLorenzo Bianconi u8 version; 1392399090efSLorenzo Bianconi u8 pad; 1393399090efSLorenzo Bianconi __le32 beacon_scan_num; 1394399090efSLorenzo Bianconi u8 pno_enabled; 1395399090efSLorenzo Bianconi u8 pad2[3]; 1396399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 1397399090efSLorenzo Bianconi u8 pad3[3]; 1398399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1399399090efSLorenzo Bianconi /* idle format for channel_idle_time 1400399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 1401399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 1402399090efSLorenzo Bianconi * 2: dwell time (16us) 1403399090efSLorenzo Bianconi */ 1404399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1405399090efSLorenzo Bianconi /* beacon and probe response count */ 1406399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1407399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1408399090efSLorenzo Bianconi __le32 beacon_2g_num; 1409399090efSLorenzo Bianconi __le32 beacon_5g_num; 1410399090efSLorenzo Bianconi } __packed; 1411399090efSLorenzo Bianconi 1412399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 1413399090efSLorenzo Bianconi u8 version; 1414399090efSLorenzo Bianconi u8 seq_num; 1415399090efSLorenzo Bianconi u8 stop_on_match; 1416399090efSLorenzo Bianconi u8 ssids_num; 1417399090efSLorenzo Bianconi u8 match_num; 1418399090efSLorenzo Bianconi u8 pad; 1419399090efSLorenzo Bianconi __le16 ie_len; 1420399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 1421399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 1422399090efSLorenzo Bianconi u8 channel_type; 1423399090efSLorenzo Bianconi u8 channels_num; 1424399090efSLorenzo Bianconi u8 intervals_num; 14257139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 1426399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 1427abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 14287139b5c0SSean Wang union { 14297139b5c0SSean Wang struct { 14307139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 1431399090efSLorenzo Bianconi u8 pad2[58]; 14327139b5c0SSean Wang } mt7663; 14337139b5c0SSean Wang struct { 14347139b5c0SSean Wang u8 bss_idx; 1435b94c0ed6SDeren Wu u8 pad1[3]; 1436b94c0ed6SDeren Wu __le32 delay; 1437b94c0ed6SDeren Wu u8 pad2[12]; 14389f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 14399f367c81SDeren Wu u8 pad3[38]; 14407139b5c0SSean Wang } mt7921; 14417139b5c0SSean Wang }; 1442399090efSLorenzo Bianconi } __packed; 1443399090efSLorenzo Bianconi 1444399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 1445399090efSLorenzo Bianconi u8 seq_num; 1446399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 1447399090efSLorenzo Bianconi __le16 pad; 1448399090efSLorenzo Bianconi } __packed; 1449399090efSLorenzo Bianconi 1450b4b880b9SYN Chen struct bss_info_uni_bss_color { 1451b4b880b9SYN Chen __le16 tag; 1452b4b880b9SYN Chen __le16 len; 1453b4b880b9SYN Chen u8 enable; 1454b4b880b9SYN Chen u8 bss_color; 1455b4b880b9SYN Chen u8 rsv[2]; 1456b4b880b9SYN Chen } __packed; 1457b4b880b9SYN Chen 1458d0e274afSLorenzo Bianconi struct bss_info_uni_he { 1459d0e274afSLorenzo Bianconi __le16 tag; 1460d0e274afSLorenzo Bianconi __le16 len; 1461d0e274afSLorenzo Bianconi __le16 he_rts_thres; 1462d0e274afSLorenzo Bianconi u8 he_pe_duration; 1463d0e274afSLorenzo Bianconi u8 su_disable; 1464d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 1465d0e274afSLorenzo Bianconi u8 rsv[2]; 1466d0e274afSLorenzo Bianconi } __packed; 1467d0e274afSLorenzo Bianconi 146855d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 146955d4c19cSLorenzo Bianconi __le16 tag; 147055d4c19cSLorenzo Bianconi __le16 len; 147155d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 147255d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 147355d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 147455d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 147555d4c19cSLorenzo Bianconi * 1: rekey offload disable 147655d4c19cSLorenzo Bianconi * 2: rekey update 147755d4c19cSLorenzo Bianconi */ 147855d4c19cSLorenzo Bianconi u8 keyid; 1479d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 1480d741abeaSLeon Yen u8 pad[1]; 148155d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 148255d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 148355d4c19cSLorenzo Bianconi __le32 group_cipher; 148455d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 148555d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 1486d741abeaSLeon Yen u8 reserverd[4]; 148755d4c19cSLorenzo Bianconi } __packed; 148855d4c19cSLorenzo Bianconi 148955d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 149055d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 149155d4c19cSLorenzo Bianconi 149255d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 149355d4c19cSLorenzo Bianconi __le16 tag; 149455d4c19cSLorenzo Bianconi __le16 len; 149555d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 149655d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 149755d4c19cSLorenzo Bianconi * 1: enable 149855d4c19cSLorenzo Bianconi */ 149955d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 150055d4c19cSLorenzo Bianconi u8 pad; 150155d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 150255d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 150355d4c19cSLorenzo Bianconi u8 rsv[4]; 150455d4c19cSLorenzo Bianconi } __packed; 150555d4c19cSLorenzo Bianconi 150655d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 150755d4c19cSLorenzo Bianconi __le16 tag; 150855d4c19cSLorenzo Bianconi __le16 len; 150955d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 151055d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 151155d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 151255d4c19cSLorenzo Bianconi */ 151355d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 151455d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 151555d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 151655d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 151755d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 151855d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 151955d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 152055d4c19cSLorenzo Bianconi */ 152155d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 152255d4c19cSLorenzo Bianconi * 0x1: HIF_USB 152355d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 152455d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 152555d4c19cSLorenzo Bianconi */ 152655d4c19cSLorenzo Bianconi u8 pad; 152755d4c19cSLorenzo Bianconi u8 rsv[4]; 152855d4c19cSLorenzo Bianconi } __packed; 152955d4c19cSLorenzo Bianconi 153055d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 153155d4c19cSLorenzo Bianconi __le16 tag; 153255d4c19cSLorenzo Bianconi __le16 len; 153355d4c19cSLorenzo Bianconi u8 gpio_pin; 153455d4c19cSLorenzo Bianconi u8 trigger_lvl; 153555d4c19cSLorenzo Bianconi u8 pad[2]; 153655d4c19cSLorenzo Bianconi __le32 gpio_interval; 153755d4c19cSLorenzo Bianconi u8 rsv[4]; 153855d4c19cSLorenzo Bianconi } __packed; 153955d4c19cSLorenzo Bianconi 154055d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 154155d4c19cSLorenzo Bianconi __le16 tag; 154255d4c19cSLorenzo Bianconi __le16 len; 154355d4c19cSLorenzo Bianconi u8 mode; 154455d4c19cSLorenzo Bianconi u8 ips_num; 154555d4c19cSLorenzo Bianconi u8 option; 154655d4c19cSLorenzo Bianconi u8 pad[1]; 154755d4c19cSLorenzo Bianconi } __packed; 154855d4c19cSLorenzo Bianconi 154955d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 155055d4c19cSLorenzo Bianconi __le16 tag; 155155d4c19cSLorenzo Bianconi __le16 len; 155255d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 155355d4c19cSLorenzo Bianconi * 1: suspend mode enabled 155455d4c19cSLorenzo Bianconi */ 155555d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 155655d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 155755d4c19cSLorenzo Bianconi * 1: update by wow dtim 155855d4c19cSLorenzo Bianconi */ 155955d4c19cSLorenzo Bianconi u8 pad[5]; 156055d4c19cSLorenzo Bianconi } __packed; 156155d4c19cSLorenzo Bianconi 1562f5056657SSean Wang enum mt76_sta_info_state { 1563f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 1564f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 1565f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 1566f5056657SSean Wang }; 1567f5056657SSean Wang 15685802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 15695802106fSLorenzo Bianconi struct ieee80211_sta *sta; 15705802106fSLorenzo Bianconi struct mt76_wcid *wcid; 15715802106fSLorenzo Bianconi 15725802106fSLorenzo Bianconi struct ieee80211_vif *vif; 15735802106fSLorenzo Bianconi 157482453b1cSLorenzo Bianconi bool offload_fw; 15755802106fSLorenzo Bianconi bool enable; 1576f5056657SSean Wang bool newly; 15775802106fSLorenzo Bianconi int cmd; 15785802106fSLorenzo Bianconi u8 rcpi; 1579f5056657SSean Wang u8 state; 15805802106fSLorenzo Bianconi }; 15815802106fSLorenzo Bianconi 158218369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 158318369a4fSLorenzo Bianconi 158418369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 158518369a4fSLorenzo Bianconi u8 channel; 158618369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 158718369a4fSLorenzo Bianconi } __packed; 158818369a4fSLorenzo Bianconi 158918369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 159018369a4fSLorenzo Bianconi /* DW0 - common info*/ 159118369a4fSLorenzo Bianconi u8 ver; 159218369a4fSLorenzo Bianconi u8 pad0; 159318369a4fSLorenzo Bianconi __le16 len; 159418369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 159518369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 15969b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 159718369a4fSLorenzo Bianconi u8 last_msg; 159818369a4fSLorenzo Bianconi u8 pad1; 159918369a4fSLorenzo Bianconi /* DW3 */ 160018369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 160118369a4fSLorenzo Bianconi u8 pad2[32]; 160218369a4fSLorenzo Bianconi } __packed; 160318369a4fSLorenzo Bianconi 1604c0b21255SSean Wang struct mt76_connac_config { 1605c0b21255SSean Wang __le16 id; 1606c0b21255SSean Wang u8 type; 1607c0b21255SSean Wang u8 resp_type; 1608c0b21255SSean Wang __le16 data_size; 1609c0b21255SSean Wang __le16 resv; 1610c0b21255SSean Wang u8 data[320]; 1611c0b21255SSean Wang } __packed; 1612c0b21255SSean Wang 161309c874a1SLorenzo Bianconi static inline enum mcu_cipher_type 161409c874a1SLorenzo Bianconi mt76_connac_mcu_get_cipher(int cipher) 161509c874a1SLorenzo Bianconi { 161609c874a1SLorenzo Bianconi switch (cipher) { 161709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP40: 161809c874a1SLorenzo Bianconi return MCU_CIPHER_WEP40; 161909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_WEP104: 162009c874a1SLorenzo Bianconi return MCU_CIPHER_WEP104; 162109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_TKIP: 162209c874a1SLorenzo Bianconi return MCU_CIPHER_TKIP; 162309c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_AES_CMAC: 162409c874a1SLorenzo Bianconi return MCU_CIPHER_BIP_CMAC_128; 162509c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP: 162609c874a1SLorenzo Bianconi return MCU_CIPHER_AES_CCMP; 162709c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_CCMP_256: 162809c874a1SLorenzo Bianconi return MCU_CIPHER_CCMP_256; 162909c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP: 163009c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP; 163109c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_GCMP_256: 163209c874a1SLorenzo Bianconi return MCU_CIPHER_GCMP_256; 163309c874a1SLorenzo Bianconi case WLAN_CIPHER_SUITE_SMS4: 163409c874a1SLorenzo Bianconi return MCU_CIPHER_WAPI; 163509c874a1SLorenzo Bianconi default: 163609c874a1SLorenzo Bianconi return MCU_CIPHER_NONE; 163709c874a1SLorenzo Bianconi } 163809c874a1SLorenzo Bianconi } 163909c874a1SLorenzo Bianconi 16409e90c351SLorenzo Bianconi static inline u32 16419e90c351SLorenzo Bianconi mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa) 16429e90c351SLorenzo Bianconi { 16439e90c351SLorenzo Bianconi u32 ret = 0; 16449e90c351SLorenzo Bianconi 16459e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_SET_ENCRYPT ? 16469e90c351SLorenzo Bianconi DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0; 16479e90c351SLorenzo Bianconi if (is_mt7921(dev)) 16489e90c351SLorenzo Bianconi ret |= feature_set & FW_FEATURE_ENCRY_MODE ? 16499e90c351SLorenzo Bianconi DL_CONFIG_ENCRY_MODE_SEL : 0; 16509e90c351SLorenzo Bianconi ret |= FIELD_PREP(DL_MODE_KEY_IDX, 16519e90c351SLorenzo Bianconi FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 16529e90c351SLorenzo Bianconi ret |= DL_MODE_NEED_RSP; 16539e90c351SLorenzo Bianconi ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; 16549e90c351SLorenzo Bianconi 16559e90c351SLorenzo Bianconi return ret; 16569e90c351SLorenzo Bianconi } 16579e90c351SLorenzo Bianconi 165867aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 165967aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 166067aa2743SLorenzo Bianconi 166167aa2743SLorenzo Bianconi static inline void 166267aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 166367aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 166467aa2743SLorenzo Bianconi { 166567aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 166667aa2743SLorenzo Bianconi 16672fec2ea6SLorenzo Bianconi if (!is_connac_v1(dev)) { 166867aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 166967aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 167067aa2743SLorenzo Bianconi } else { 167167aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 167267aa2743SLorenzo Bianconi } 167367aa2743SLorenzo Bianconi } 167467aa2743SLorenzo Bianconi 1675d0e274afSLorenzo Bianconi struct sk_buff * 1676e2c93b68SLorenzo Bianconi __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1677e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid, int len); 1678e2c93b68SLorenzo Bianconi static inline struct sk_buff * 1679d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1680e2c93b68SLorenzo Bianconi struct mt76_wcid *wcid) 1681e2c93b68SLorenzo Bianconi { 1682e2c93b68SLorenzo Bianconi return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 1683e2c93b68SLorenzo Bianconi MT76_CONNAC_STA_UPDATE_MAX_SIZE); 1684e2c93b68SLorenzo Bianconi } 1685e2c93b68SLorenzo Bianconi 1686d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1687d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1688d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1689d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1690d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1691d0e274afSLorenzo Bianconi void *sta_wtbl); 1692d0e274afSLorenzo Bianconi static inline struct tlv * 1693d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1694d0e274afSLorenzo Bianconi { 1695d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1696d0e274afSLorenzo Bianconi } 1697d0e274afSLorenzo Bianconi 1698d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1699d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1700d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1701d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1702f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1703f5056657SSean Wang bool newly); 1704d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1705d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1706d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1707d0e274afSLorenzo Bianconi void *wtbl_tlv); 1708d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1709868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 171066978204SFelix Fietkau struct mt76_wcid *wcid, 1711d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 171224299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 171324299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 171424299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 17155a521c0fSLorenzo Bianconi int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 17165a521c0fSLorenzo Bianconi struct ieee80211_vif *vif, 17175a521c0fSLorenzo Bianconi struct ieee80211_sta *sta); 1718d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1719d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 17205802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1721f5056657SSean Wang u8 rcpi, u8 state); 1722d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1723d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1724499da720SMeiChia Chiu void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc); 1725d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1726d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1727d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1728d0e274afSLorenzo Bianconi void *wtbl_tlv); 1729d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1730d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1731d0e274afSLorenzo Bianconi bool enable, bool tx); 1732d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1733d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1734d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1735d0e274afSLorenzo Bianconi bool enable); 1736d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1737d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1738b5322e44SLorenzo Bianconi int cmd, bool enable, bool tx); 1739d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1740d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1741d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1742d0e274afSLorenzo Bianconi bool enable); 1743f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 17445802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1745d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1746d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1747d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1748d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1749d0e274afSLorenzo Bianconi bool hdr_trans); 1750d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1751d0e274afSLorenzo Bianconi u32 mode); 1752d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1753d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1754d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1755f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1756d0e274afSLorenzo Bianconi 1757399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1758399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1759399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1760399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1761399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1762399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1763399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1764399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1765399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1766399090efSLorenzo Bianconi bool enable); 1767f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1768f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1769f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 177055d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 177155d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 177255d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 177355d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 177455d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 177555d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1776f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1777f5056657SSean Wang enum ieee80211_sta_state old_state, 1778f5056657SSean Wang enum ieee80211_sta_state new_state); 17790da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1780c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 17810da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 17820da3c795SSean Wang struct mt76_connac_coredump *coredump); 178318369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 17841f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 17851f832887SLorenzo Bianconi struct ieee80211_vif *vif); 178687f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 178787f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1788e6d557a7SLorenzo Bianconi 1789e6d557a7SLorenzo Bianconi const struct ieee80211_sta_he_cap * 1790e6d557a7SLorenzo Bianconi mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); 1791e6d557a7SLorenzo Bianconi u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1792e6d557a7SLorenzo Bianconi enum nl80211_band band, struct ieee80211_sta *sta); 17936683d988SLorenzo Bianconi 17946683d988SLorenzo Bianconi int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 17956683d988SLorenzo Bianconi struct mt76_connac_sta_key_conf *sta_key_conf, 17966683d988SLorenzo Bianconi struct ieee80211_key_conf *key, int mcu_cmd, 17976683d988SLorenzo Bianconi struct mt76_wcid *wcid, enum set_key_cmd cmd); 179854735e11SLorenzo Bianconi 179964f4e823SLorenzo Bianconi void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif); 180054735e11SLorenzo Bianconi void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 180154735e11SLorenzo Bianconi struct ieee80211_vif *vif); 180249126ac1SLorenzo Bianconi int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 180349126ac1SLorenzo Bianconi struct ieee80211_vif *vif, 180449126ac1SLorenzo Bianconi struct ieee80211_sta *sta, 180595b5946eSChad Monroe struct mt76_phy *phy, u16 wlan_idx, 180649126ac1SLorenzo Bianconi bool enable); 1807836c0c98SLorenzo Bianconi void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 1808836c0c98SLorenzo Bianconi struct ieee80211_sta *sta); 18092557e568SLorenzo Bianconi void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 18102557e568SLorenzo Bianconi struct ieee80211_sta *sta, 18112557e568SLorenzo Bianconi void *sta_wtbl, void *wtbl_tlv); 181248d743d1SLorenzo Bianconi int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); 1813ae90bdd6SLorenzo Bianconi int mt76_connac_mcu_restart(struct mt76_dev *dev); 181497cef84dSLorenzo Bianconi int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 181597cef84dSLorenzo Bianconi u8 rx_sel, u8 val); 1816b9ec2710SLorenzo Bianconi int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 1817b9ec2710SLorenzo Bianconi const char *fw_wa); 181828fec923SLorenzo Bianconi int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name); 1819d2f5c8edSLorenzo Bianconi int mt76_connac2_mcu_fill_message(struct mt76_dev *mdev, struct sk_buff *skb, 1820d2f5c8edSLorenzo Bianconi int cmd, int *wait_seq); 1821d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1822