1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 9d0e274afSLorenzo Bianconi struct tlv { 10d0e274afSLorenzo Bianconi __le16 tag; 11d0e274afSLorenzo Bianconi __le16 len; 12d0e274afSLorenzo Bianconi } __packed; 13d0e274afSLorenzo Bianconi 145562d5f6SLorenzo Bianconi struct bss_info_omac { 155562d5f6SLorenzo Bianconi __le16 tag; 165562d5f6SLorenzo Bianconi __le16 len; 175562d5f6SLorenzo Bianconi u8 hw_bss_idx; 185562d5f6SLorenzo Bianconi u8 omac_idx; 195562d5f6SLorenzo Bianconi u8 band_idx; 205562d5f6SLorenzo Bianconi u8 rsv0; 215562d5f6SLorenzo Bianconi __le32 conn_type; 225562d5f6SLorenzo Bianconi u32 rsv1; 235562d5f6SLorenzo Bianconi } __packed; 245562d5f6SLorenzo Bianconi 255562d5f6SLorenzo Bianconi struct bss_info_basic { 265562d5f6SLorenzo Bianconi __le16 tag; 275562d5f6SLorenzo Bianconi __le16 len; 285562d5f6SLorenzo Bianconi __le32 network_type; 295562d5f6SLorenzo Bianconi u8 active; 305562d5f6SLorenzo Bianconi u8 rsv0; 315562d5f6SLorenzo Bianconi __le16 bcn_interval; 325562d5f6SLorenzo Bianconi u8 bssid[ETH_ALEN]; 335562d5f6SLorenzo Bianconi u8 wmm_idx; 345562d5f6SLorenzo Bianconi u8 dtim_period; 355562d5f6SLorenzo Bianconi u8 bmc_wcid_lo; 365562d5f6SLorenzo Bianconi u8 cipher; 375562d5f6SLorenzo Bianconi u8 phy_mode; 385562d5f6SLorenzo Bianconi u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */ 395562d5f6SLorenzo Bianconi u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */ 405562d5f6SLorenzo Bianconi u8 bmc_wcid_hi; /* high Byte and version */ 415562d5f6SLorenzo Bianconi u8 rsv[2]; 425562d5f6SLorenzo Bianconi } __packed; 435562d5f6SLorenzo Bianconi 445562d5f6SLorenzo Bianconi struct bss_info_rf_ch { 455562d5f6SLorenzo Bianconi __le16 tag; 465562d5f6SLorenzo Bianconi __le16 len; 475562d5f6SLorenzo Bianconi u8 pri_ch; 485562d5f6SLorenzo Bianconi u8 center_ch0; 495562d5f6SLorenzo Bianconi u8 center_ch1; 505562d5f6SLorenzo Bianconi u8 bw; 515562d5f6SLorenzo Bianconi u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */ 525562d5f6SLorenzo Bianconi u8 he_all_disable; /* 1: disallow all HETB, 0: allow */ 535562d5f6SLorenzo Bianconi u8 rsv[2]; 545562d5f6SLorenzo Bianconi } __packed; 555562d5f6SLorenzo Bianconi 565562d5f6SLorenzo Bianconi struct bss_info_ext_bss { 575562d5f6SLorenzo Bianconi __le16 tag; 585562d5f6SLorenzo Bianconi __le16 len; 595562d5f6SLorenzo Bianconi __le32 mbss_tsf_offset; /* in unit of us */ 605562d5f6SLorenzo Bianconi u8 rsv[8]; 615562d5f6SLorenzo Bianconi } __packed; 625562d5f6SLorenzo Bianconi 635562d5f6SLorenzo Bianconi enum { 645562d5f6SLorenzo Bianconi BSS_INFO_OMAC, 655562d5f6SLorenzo Bianconi BSS_INFO_BASIC, 665562d5f6SLorenzo Bianconi BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 675562d5f6SLorenzo Bianconi BSS_INFO_PM, /* sta only */ 685562d5f6SLorenzo Bianconi BSS_INFO_UAPSD, /* sta only */ 695562d5f6SLorenzo Bianconi BSS_INFO_ROAM_DETECT, /* obsoleted */ 705562d5f6SLorenzo Bianconi BSS_INFO_LQ_RM, /* obsoleted */ 715562d5f6SLorenzo Bianconi BSS_INFO_EXT_BSS, 725562d5f6SLorenzo Bianconi BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */ 735562d5f6SLorenzo Bianconi BSS_INFO_SYNC_MODE, /* obsoleted */ 745562d5f6SLorenzo Bianconi BSS_INFO_RA, 755562d5f6SLorenzo Bianconi BSS_INFO_HW_AMSDU, 765562d5f6SLorenzo Bianconi BSS_INFO_BSS_COLOR, 775562d5f6SLorenzo Bianconi BSS_INFO_HE_BASIC, 785562d5f6SLorenzo Bianconi BSS_INFO_PROTECT_INFO, 795562d5f6SLorenzo Bianconi BSS_INFO_OFFLOAD, 805562d5f6SLorenzo Bianconi BSS_INFO_11V_MBSSID, 815562d5f6SLorenzo Bianconi BSS_INFO_MAX_NUM 825562d5f6SLorenzo Bianconi }; 835562d5f6SLorenzo Bianconi 84d0e274afSLorenzo Bianconi /* sta_rec */ 85d0e274afSLorenzo Bianconi 86d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 87d0e274afSLorenzo Bianconi u8 rsv[2]; 88d0e274afSLorenzo Bianconi __le16 tlv_num; 89d0e274afSLorenzo Bianconi } __packed; 90d0e274afSLorenzo Bianconi 91d0e274afSLorenzo Bianconi struct sta_req_hdr { 92d0e274afSLorenzo Bianconi u8 bss_idx; 93d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 94d0e274afSLorenzo Bianconi __le16 tlv_num; 95d0e274afSLorenzo Bianconi u8 is_tlv_append; 96d0e274afSLorenzo Bianconi u8 muar_idx; 97d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 98d0e274afSLorenzo Bianconi u8 rsv; 99d0e274afSLorenzo Bianconi } __packed; 100d0e274afSLorenzo Bianconi 101d0e274afSLorenzo Bianconi struct sta_rec_basic { 102d0e274afSLorenzo Bianconi __le16 tag; 103d0e274afSLorenzo Bianconi __le16 len; 104d0e274afSLorenzo Bianconi __le32 conn_type; 105d0e274afSLorenzo Bianconi u8 conn_state; 106d0e274afSLorenzo Bianconi u8 qos; 107d0e274afSLorenzo Bianconi __le16 aid; 108d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 109d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 110d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 111d0e274afSLorenzo Bianconi __le16 extra_info; 112d0e274afSLorenzo Bianconi } __packed; 113d0e274afSLorenzo Bianconi 114d0e274afSLorenzo Bianconi struct sta_rec_ht { 115d0e274afSLorenzo Bianconi __le16 tag; 116d0e274afSLorenzo Bianconi __le16 len; 117d0e274afSLorenzo Bianconi __le16 ht_cap; 118d0e274afSLorenzo Bianconi u16 rsv; 119d0e274afSLorenzo Bianconi } __packed; 120d0e274afSLorenzo Bianconi 121d0e274afSLorenzo Bianconi struct sta_rec_vht { 122d0e274afSLorenzo Bianconi __le16 tag; 123d0e274afSLorenzo Bianconi __le16 len; 124d0e274afSLorenzo Bianconi __le32 vht_cap; 125d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 126d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 1275562d5f6SLorenzo Bianconi /* mt7915 - mt7921 */ 128d0e274afSLorenzo Bianconi u8 rts_bw_sig; 129d0e274afSLorenzo Bianconi u8 rsv[3]; 130d0e274afSLorenzo Bianconi } __packed; 131d0e274afSLorenzo Bianconi 132d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 133d0e274afSLorenzo Bianconi __le16 tag; 134d0e274afSLorenzo Bianconi __le16 len; 135d0e274afSLorenzo Bianconi u8 dac_map; 136d0e274afSLorenzo Bianconi u8 tac_map; 137d0e274afSLorenzo Bianconi u8 max_sp; 138d0e274afSLorenzo Bianconi u8 rsv0; 139d0e274afSLorenzo Bianconi __le16 listen_interval; 140d0e274afSLorenzo Bianconi u8 rsv1[2]; 141d0e274afSLorenzo Bianconi } __packed; 142d0e274afSLorenzo Bianconi 143d0e274afSLorenzo Bianconi struct sta_rec_ba { 144d0e274afSLorenzo Bianconi __le16 tag; 145d0e274afSLorenzo Bianconi __le16 len; 146d0e274afSLorenzo Bianconi u8 tid; 147d0e274afSLorenzo Bianconi u8 ba_type; 148d0e274afSLorenzo Bianconi u8 amsdu; 149d0e274afSLorenzo Bianconi u8 ba_en; 150d0e274afSLorenzo Bianconi __le16 ssn; 151d0e274afSLorenzo Bianconi __le16 winsize; 152d0e274afSLorenzo Bianconi } __packed; 153d0e274afSLorenzo Bianconi 154d0e274afSLorenzo Bianconi struct sta_rec_he { 155d0e274afSLorenzo Bianconi __le16 tag; 156d0e274afSLorenzo Bianconi __le16 len; 157d0e274afSLorenzo Bianconi 158d0e274afSLorenzo Bianconi __le32 he_cap; 159d0e274afSLorenzo Bianconi 160d0e274afSLorenzo Bianconi u8 t_frame_dur; 161d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 162d0e274afSLorenzo Bianconi u8 bw_set; 163d0e274afSLorenzo Bianconi u8 device_class; 164d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 165d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 166d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 167d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 168d0e274afSLorenzo Bianconi u8 dcm_max_ru; 169d0e274afSLorenzo Bianconi u8 punc_pream_rx; 170d0e274afSLorenzo Bianconi u8 pkt_ext; 171d0e274afSLorenzo Bianconi u8 rsv1; 172d0e274afSLorenzo Bianconi 173d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 174d0e274afSLorenzo Bianconi 175d0e274afSLorenzo Bianconi u8 rsv2[2]; 176d0e274afSLorenzo Bianconi } __packed; 177d0e274afSLorenzo Bianconi 178d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 179d0e274afSLorenzo Bianconi __le16 tag; 180d0e274afSLorenzo Bianconi __le16 len; 181d0e274afSLorenzo Bianconi u8 max_amsdu_num; 182d0e274afSLorenzo Bianconi u8 max_mpdu_size; 183d0e274afSLorenzo Bianconi u8 amsdu_en; 184d0e274afSLorenzo Bianconi u8 rsv; 185d0e274afSLorenzo Bianconi } __packed; 186d0e274afSLorenzo Bianconi 187d0e274afSLorenzo Bianconi struct sta_rec_state { 188d0e274afSLorenzo Bianconi __le16 tag; 189d0e274afSLorenzo Bianconi __le16 len; 190d0e274afSLorenzo Bianconi __le32 flags; 191d0e274afSLorenzo Bianconi u8 state; 192d0e274afSLorenzo Bianconi u8 vht_opmode; 193d0e274afSLorenzo Bianconi u8 action; 194d0e274afSLorenzo Bianconi u8 rsv[1]; 195d0e274afSLorenzo Bianconi } __packed; 196d0e274afSLorenzo Bianconi 19799b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 19899b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 199d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 200d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 201d0e274afSLorenzo Bianconi __le16 tag; 202d0e274afSLorenzo Bianconi __le16 len; 203d0e274afSLorenzo Bianconi __le16 legacy; 204d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 205d0e274afSLorenzo Bianconi } __packed; 206d0e274afSLorenzo Bianconi 207d0e274afSLorenzo Bianconi struct sta_rec_phy { 208d0e274afSLorenzo Bianconi __le16 tag; 209d0e274afSLorenzo Bianconi __le16 len; 210d0e274afSLorenzo Bianconi __le16 basic_rate; 211d0e274afSLorenzo Bianconi u8 phy_type; 212d0e274afSLorenzo Bianconi u8 ampdu; 213d0e274afSLorenzo Bianconi u8 rts_policy; 214d0e274afSLorenzo Bianconi u8 rcpi; 215d0e274afSLorenzo Bianconi u8 rsv[2]; 216d0e274afSLorenzo Bianconi } __packed; 217d0e274afSLorenzo Bianconi 2185883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 2195883892bSLorenzo Bianconi __le16 tag; 2205883892bSLorenzo Bianconi __le16 len; 2215883892bSLorenzo Bianconi __le16 capa; 2225883892bSLorenzo Bianconi u8 rsv[2]; 2235883892bSLorenzo Bianconi } __packed; 2245883892bSLorenzo Bianconi 2255562d5f6SLorenzo Bianconi struct sec_key { 2265562d5f6SLorenzo Bianconi u8 cipher_id; 2275562d5f6SLorenzo Bianconi u8 cipher_len; 2285562d5f6SLorenzo Bianconi u8 key_id; 2295562d5f6SLorenzo Bianconi u8 key_len; 2305562d5f6SLorenzo Bianconi u8 key[32]; 2315562d5f6SLorenzo Bianconi } __packed; 2325562d5f6SLorenzo Bianconi 2335562d5f6SLorenzo Bianconi struct sta_rec_sec { 2345562d5f6SLorenzo Bianconi __le16 tag; 2355562d5f6SLorenzo Bianconi __le16 len; 2365562d5f6SLorenzo Bianconi u8 add; 2375562d5f6SLorenzo Bianconi u8 n_cipher; 2385562d5f6SLorenzo Bianconi u8 rsv[2]; 2395562d5f6SLorenzo Bianconi 2405562d5f6SLorenzo Bianconi struct sec_key key[2]; 2415562d5f6SLorenzo Bianconi } __packed; 2425562d5f6SLorenzo Bianconi 2435562d5f6SLorenzo Bianconi struct sta_rec_bf { 2445562d5f6SLorenzo Bianconi __le16 tag; 2455562d5f6SLorenzo Bianconi __le16 len; 2465562d5f6SLorenzo Bianconi 2475562d5f6SLorenzo Bianconi __le16 pfmu; /* 0xffff: no access right for PFMU */ 2485562d5f6SLorenzo Bianconi bool su_mu; /* 0: SU, 1: MU */ 2495562d5f6SLorenzo Bianconi u8 bf_cap; /* 0: iBF, 1: eBF */ 2505562d5f6SLorenzo Bianconi u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */ 2515562d5f6SLorenzo Bianconi u8 ndpa_rate; 2525562d5f6SLorenzo Bianconi u8 ndp_rate; 2535562d5f6SLorenzo Bianconi u8 rept_poll_rate; 2545562d5f6SLorenzo Bianconi u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */ 2555562d5f6SLorenzo Bianconi u8 ncol; 2565562d5f6SLorenzo Bianconi u8 nrow; 2575562d5f6SLorenzo Bianconi u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */ 2585562d5f6SLorenzo Bianconi 2595562d5f6SLorenzo Bianconi u8 mem_total; 2605562d5f6SLorenzo Bianconi u8 mem_20m; 2615562d5f6SLorenzo Bianconi struct { 2625562d5f6SLorenzo Bianconi u8 row; 2635562d5f6SLorenzo Bianconi u8 col: 6, row_msb: 2; 2645562d5f6SLorenzo Bianconi } mem[4]; 2655562d5f6SLorenzo Bianconi 2665562d5f6SLorenzo Bianconi __le16 smart_ant; 2675562d5f6SLorenzo Bianconi u8 se_idx; 2685562d5f6SLorenzo Bianconi u8 auto_sounding; /* b7: low traffic indicator 2695562d5f6SLorenzo Bianconi * b6: Stop sounding for this entry 2705562d5f6SLorenzo Bianconi * b5 ~ b0: postpone sounding 2715562d5f6SLorenzo Bianconi */ 2725562d5f6SLorenzo Bianconi u8 ibf_timeout; 2735562d5f6SLorenzo Bianconi u8 ibf_dbw; 2745562d5f6SLorenzo Bianconi u8 ibf_ncol; 2755562d5f6SLorenzo Bianconi u8 ibf_nrow; 2765562d5f6SLorenzo Bianconi u8 nrow_bw160; 2775562d5f6SLorenzo Bianconi u8 ncol_bw160; 2785562d5f6SLorenzo Bianconi u8 ru_start_idx; 2795562d5f6SLorenzo Bianconi u8 ru_end_idx; 2805562d5f6SLorenzo Bianconi 2815562d5f6SLorenzo Bianconi bool trigger_su; 2825562d5f6SLorenzo Bianconi bool trigger_mu; 2835562d5f6SLorenzo Bianconi bool ng16_su; 2845562d5f6SLorenzo Bianconi bool ng16_mu; 2855562d5f6SLorenzo Bianconi bool codebook42_su; 2865562d5f6SLorenzo Bianconi bool codebook75_mu; 2875562d5f6SLorenzo Bianconi 2885562d5f6SLorenzo Bianconi u8 he_ltf; 2895562d5f6SLorenzo Bianconi u8 rsv[3]; 2905562d5f6SLorenzo Bianconi } __packed; 2915562d5f6SLorenzo Bianconi 2925562d5f6SLorenzo Bianconi struct sta_rec_bfee { 2935562d5f6SLorenzo Bianconi __le16 tag; 2945562d5f6SLorenzo Bianconi __le16 len; 2955562d5f6SLorenzo Bianconi bool fb_identity_matrix; /* 1: feedback identity matrix */ 2965562d5f6SLorenzo Bianconi bool ignore_feedback; /* 1: ignore */ 2975562d5f6SLorenzo Bianconi u8 rsv[2]; 2985562d5f6SLorenzo Bianconi } __packed; 2995562d5f6SLorenzo Bianconi 3005562d5f6SLorenzo Bianconi struct sta_rec_muru { 3015562d5f6SLorenzo Bianconi __le16 tag; 3025562d5f6SLorenzo Bianconi __le16 len; 3035562d5f6SLorenzo Bianconi 3045562d5f6SLorenzo Bianconi struct { 3055562d5f6SLorenzo Bianconi bool ofdma_dl_en; 3065562d5f6SLorenzo Bianconi bool ofdma_ul_en; 3075562d5f6SLorenzo Bianconi bool mimo_dl_en; 3085562d5f6SLorenzo Bianconi bool mimo_ul_en; 3095562d5f6SLorenzo Bianconi u8 rsv[4]; 3105562d5f6SLorenzo Bianconi } cfg; 3115562d5f6SLorenzo Bianconi 3125562d5f6SLorenzo Bianconi struct { 3135562d5f6SLorenzo Bianconi u8 punc_pream_rx; 3145562d5f6SLorenzo Bianconi bool he_20m_in_40m_2g; 3155562d5f6SLorenzo Bianconi bool he_20m_in_160m; 3165562d5f6SLorenzo Bianconi bool he_80m_in_160m; 3175562d5f6SLorenzo Bianconi bool lt16_sigb; 3185562d5f6SLorenzo Bianconi bool rx_su_comp_sigb; 3195562d5f6SLorenzo Bianconi bool rx_su_non_comp_sigb; 3205562d5f6SLorenzo Bianconi u8 rsv; 3215562d5f6SLorenzo Bianconi } ofdma_dl; 3225562d5f6SLorenzo Bianconi 3235562d5f6SLorenzo Bianconi struct { 3245562d5f6SLorenzo Bianconi u8 t_frame_dur; 3255562d5f6SLorenzo Bianconi u8 mu_cascading; 3265562d5f6SLorenzo Bianconi u8 uo_ra; 3275562d5f6SLorenzo Bianconi u8 he_2x996_tone; 3285562d5f6SLorenzo Bianconi u8 rx_t_frame_11ac; 3295562d5f6SLorenzo Bianconi u8 rsv[3]; 3305562d5f6SLorenzo Bianconi } ofdma_ul; 3315562d5f6SLorenzo Bianconi 3325562d5f6SLorenzo Bianconi struct { 3335562d5f6SLorenzo Bianconi bool vht_mu_bfee; 3345562d5f6SLorenzo Bianconi bool partial_bw_dl_mimo; 3355562d5f6SLorenzo Bianconi u8 rsv[2]; 3365562d5f6SLorenzo Bianconi } mimo_dl; 3375562d5f6SLorenzo Bianconi 3385562d5f6SLorenzo Bianconi struct { 3395562d5f6SLorenzo Bianconi bool full_ul_mimo; 3405562d5f6SLorenzo Bianconi bool partial_ul_mimo; 3415562d5f6SLorenzo Bianconi u8 rsv[2]; 3425562d5f6SLorenzo Bianconi } mimo_ul; 3435562d5f6SLorenzo Bianconi } __packed; 3445562d5f6SLorenzo Bianconi 3455562d5f6SLorenzo Bianconi struct sta_phy { 3465562d5f6SLorenzo Bianconi u8 type; 3475562d5f6SLorenzo Bianconi u8 flag; 3485562d5f6SLorenzo Bianconi u8 stbc; 3495562d5f6SLorenzo Bianconi u8 sgi; 3505562d5f6SLorenzo Bianconi u8 bw; 3515562d5f6SLorenzo Bianconi u8 ldpc; 3525562d5f6SLorenzo Bianconi u8 mcs; 3535562d5f6SLorenzo Bianconi u8 nss; 3545562d5f6SLorenzo Bianconi u8 he_ltf; 3555562d5f6SLorenzo Bianconi }; 3565562d5f6SLorenzo Bianconi 3575562d5f6SLorenzo Bianconi struct sta_rec_ra { 3585562d5f6SLorenzo Bianconi __le16 tag; 3595562d5f6SLorenzo Bianconi __le16 len; 3605562d5f6SLorenzo Bianconi 3615562d5f6SLorenzo Bianconi u8 valid; 3625562d5f6SLorenzo Bianconi u8 auto_rate; 3635562d5f6SLorenzo Bianconi u8 phy_mode; 3645562d5f6SLorenzo Bianconi u8 channel; 3655562d5f6SLorenzo Bianconi u8 bw; 3665562d5f6SLorenzo Bianconi u8 disable_cck; 3675562d5f6SLorenzo Bianconi u8 ht_mcs32; 3685562d5f6SLorenzo Bianconi u8 ht_gf; 3695562d5f6SLorenzo Bianconi u8 ht_mcs[4]; 3705562d5f6SLorenzo Bianconi u8 mmps_mode; 3715562d5f6SLorenzo Bianconi u8 gband_256; 3725562d5f6SLorenzo Bianconi u8 af; 3735562d5f6SLorenzo Bianconi u8 auth_wapi_mode; 3745562d5f6SLorenzo Bianconi u8 rate_len; 3755562d5f6SLorenzo Bianconi 3765562d5f6SLorenzo Bianconi u8 supp_mode; 3775562d5f6SLorenzo Bianconi u8 supp_cck_rate; 3785562d5f6SLorenzo Bianconi u8 supp_ofdm_rate; 3795562d5f6SLorenzo Bianconi __le32 supp_ht_mcs; 3805562d5f6SLorenzo Bianconi __le16 supp_vht_mcs[4]; 3815562d5f6SLorenzo Bianconi 3825562d5f6SLorenzo Bianconi u8 op_mode; 3835562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 3845562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 3855562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 3865562d5f6SLorenzo Bianconi 3875562d5f6SLorenzo Bianconi __le32 sta_cap; 3885562d5f6SLorenzo Bianconi 3895562d5f6SLorenzo Bianconi struct sta_phy phy; 3905562d5f6SLorenzo Bianconi } __packed; 3915562d5f6SLorenzo Bianconi 3925562d5f6SLorenzo Bianconi struct sta_rec_ra_fixed { 3935562d5f6SLorenzo Bianconi __le16 tag; 3945562d5f6SLorenzo Bianconi __le16 len; 3955562d5f6SLorenzo Bianconi 3965562d5f6SLorenzo Bianconi __le32 field; 3975562d5f6SLorenzo Bianconi u8 op_mode; 3985562d5f6SLorenzo Bianconi u8 op_vht_chan_width; 3995562d5f6SLorenzo Bianconi u8 op_vht_rx_nss; 4005562d5f6SLorenzo Bianconi u8 op_vht_rx_nss_type; 4015562d5f6SLorenzo Bianconi 4025562d5f6SLorenzo Bianconi struct sta_phy phy; 4035562d5f6SLorenzo Bianconi 4045562d5f6SLorenzo Bianconi u8 spe_en; 4055562d5f6SLorenzo Bianconi u8 short_preamble; 4065562d5f6SLorenzo Bianconi u8 is_5g; 4075562d5f6SLorenzo Bianconi u8 mmps_mode; 4085562d5f6SLorenzo Bianconi } __packed; 4095562d5f6SLorenzo Bianconi 410d0e274afSLorenzo Bianconi /* wtbl_rec */ 411d0e274afSLorenzo Bianconi 412d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 413d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 414d0e274afSLorenzo Bianconi u8 operation; 415d0e274afSLorenzo Bianconi __le16 tlv_num; 416d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 417d0e274afSLorenzo Bianconi u8 rsv[3]; 418d0e274afSLorenzo Bianconi } __packed; 419d0e274afSLorenzo Bianconi 420d0e274afSLorenzo Bianconi struct wtbl_generic { 421d0e274afSLorenzo Bianconi __le16 tag; 422d0e274afSLorenzo Bianconi __le16 len; 423d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 424d0e274afSLorenzo Bianconi u8 muar_idx; 425d0e274afSLorenzo Bianconi u8 skip_tx; 426d0e274afSLorenzo Bianconi u8 cf_ack; 427d0e274afSLorenzo Bianconi u8 qos; 428d0e274afSLorenzo Bianconi u8 mesh; 429d0e274afSLorenzo Bianconi u8 adm; 430d0e274afSLorenzo Bianconi __le16 partial_aid; 431d0e274afSLorenzo Bianconi u8 baf_en; 432d0e274afSLorenzo Bianconi u8 aad_om; 433d0e274afSLorenzo Bianconi } __packed; 434d0e274afSLorenzo Bianconi 435d0e274afSLorenzo Bianconi struct wtbl_rx { 436d0e274afSLorenzo Bianconi __le16 tag; 437d0e274afSLorenzo Bianconi __le16 len; 438d0e274afSLorenzo Bianconi u8 rcid; 439d0e274afSLorenzo Bianconi u8 rca1; 440d0e274afSLorenzo Bianconi u8 rca2; 441d0e274afSLorenzo Bianconi u8 rv; 442d0e274afSLorenzo Bianconi u8 rsv[4]; 443d0e274afSLorenzo Bianconi } __packed; 444d0e274afSLorenzo Bianconi 445d0e274afSLorenzo Bianconi struct wtbl_ht { 446d0e274afSLorenzo Bianconi __le16 tag; 447d0e274afSLorenzo Bianconi __le16 len; 448d0e274afSLorenzo Bianconi u8 ht; 449d0e274afSLorenzo Bianconi u8 ldpc; 450d0e274afSLorenzo Bianconi u8 af; 451d0e274afSLorenzo Bianconi u8 mm; 452d0e274afSLorenzo Bianconi u8 rsv[4]; 453d0e274afSLorenzo Bianconi } __packed; 454d0e274afSLorenzo Bianconi 455d0e274afSLorenzo Bianconi struct wtbl_vht { 456d0e274afSLorenzo Bianconi __le16 tag; 457d0e274afSLorenzo Bianconi __le16 len; 458d0e274afSLorenzo Bianconi u8 ldpc; 459d0e274afSLorenzo Bianconi u8 dyn_bw; 460d0e274afSLorenzo Bianconi u8 vht; 461d0e274afSLorenzo Bianconi u8 txop_ps; 462d0e274afSLorenzo Bianconi u8 rsv[4]; 463d0e274afSLorenzo Bianconi } __packed; 464d0e274afSLorenzo Bianconi 465d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 466d0e274afSLorenzo Bianconi __le16 tag; 467d0e274afSLorenzo Bianconi __le16 len; 468d0e274afSLorenzo Bianconi u8 txps; 469d0e274afSLorenzo Bianconi u8 rsv[3]; 470d0e274afSLorenzo Bianconi } __packed; 471d0e274afSLorenzo Bianconi 472d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 473d0e274afSLorenzo Bianconi __le16 tag; 474d0e274afSLorenzo Bianconi __le16 len; 475d0e274afSLorenzo Bianconi u8 to_ds; 476d0e274afSLorenzo Bianconi u8 from_ds; 477d4b98c63SRyder Lee u8 no_rx_trans; 478d0e274afSLorenzo Bianconi u8 rsv; 479d0e274afSLorenzo Bianconi } __packed; 480d0e274afSLorenzo Bianconi 481d0e274afSLorenzo Bianconi struct wtbl_ba { 482d0e274afSLorenzo Bianconi __le16 tag; 483d0e274afSLorenzo Bianconi __le16 len; 484d0e274afSLorenzo Bianconi /* common */ 485d0e274afSLorenzo Bianconi u8 tid; 486d0e274afSLorenzo Bianconi u8 ba_type; 487d0e274afSLorenzo Bianconi u8 rsv0[2]; 488d0e274afSLorenzo Bianconi /* originator only */ 489d0e274afSLorenzo Bianconi __le16 sn; 490d0e274afSLorenzo Bianconi u8 ba_en; 491d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 4925562d5f6SLorenzo Bianconi /* originator & recipient */ 493d0e274afSLorenzo Bianconi __le16 ba_winsize; 494d0e274afSLorenzo Bianconi /* recipient only */ 495d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 496d0e274afSLorenzo Bianconi u8 rst_ba_tid; 497d0e274afSLorenzo Bianconi u8 rst_ba_sel; 498d0e274afSLorenzo Bianconi u8 rst_ba_sb; 499d0e274afSLorenzo Bianconi u8 band_idx; 500d0e274afSLorenzo Bianconi u8 rsv1[4]; 501d0e274afSLorenzo Bianconi } __packed; 502d0e274afSLorenzo Bianconi 503d0e274afSLorenzo Bianconi struct wtbl_smps { 504d0e274afSLorenzo Bianconi __le16 tag; 505d0e274afSLorenzo Bianconi __le16 len; 506d0e274afSLorenzo Bianconi u8 smps; 507d0e274afSLorenzo Bianconi u8 rsv[3]; 508d0e274afSLorenzo Bianconi } __packed; 509d0e274afSLorenzo Bianconi 510d0e274afSLorenzo Bianconi /* mt7615 only */ 511d0e274afSLorenzo Bianconi 512d0e274afSLorenzo Bianconi struct wtbl_bf { 513d0e274afSLorenzo Bianconi __le16 tag; 514d0e274afSLorenzo Bianconi __le16 len; 515d0e274afSLorenzo Bianconi u8 ibf; 516d0e274afSLorenzo Bianconi u8 ebf; 517d0e274afSLorenzo Bianconi u8 ibf_vht; 518d0e274afSLorenzo Bianconi u8 ebf_vht; 519d0e274afSLorenzo Bianconi u8 gid; 520d0e274afSLorenzo Bianconi u8 pfmu_idx; 521d0e274afSLorenzo Bianconi u8 rsv[2]; 522d0e274afSLorenzo Bianconi } __packed; 523d0e274afSLorenzo Bianconi 524d0e274afSLorenzo Bianconi struct wtbl_pn { 525d0e274afSLorenzo Bianconi __le16 tag; 526d0e274afSLorenzo Bianconi __le16 len; 527d0e274afSLorenzo Bianconi u8 pn[6]; 528d0e274afSLorenzo Bianconi u8 rsv[2]; 529d0e274afSLorenzo Bianconi } __packed; 530d0e274afSLorenzo Bianconi 531d0e274afSLorenzo Bianconi struct wtbl_spe { 532d0e274afSLorenzo Bianconi __le16 tag; 533d0e274afSLorenzo Bianconi __le16 len; 534d0e274afSLorenzo Bianconi u8 spe_idx; 535d0e274afSLorenzo Bianconi u8 rsv[3]; 536d0e274afSLorenzo Bianconi } __packed; 537d0e274afSLorenzo Bianconi 538d0e274afSLorenzo Bianconi struct wtbl_raw { 539d0e274afSLorenzo Bianconi __le16 tag; 540d0e274afSLorenzo Bianconi __le16 len; 541d0e274afSLorenzo Bianconi u8 wtbl_idx; 542d0e274afSLorenzo Bianconi u8 dw; 543d0e274afSLorenzo Bianconi u8 rsv[2]; 544d0e274afSLorenzo Bianconi __le32 msk; 545d0e274afSLorenzo Bianconi __le32 val; 546d0e274afSLorenzo Bianconi } __packed; 547d0e274afSLorenzo Bianconi 548d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 549d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 550d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 551d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 552d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 553d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 554d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 555d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 556d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 557d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 558d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 559d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 560d0e274afSLorenzo Bianconi 561d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 562d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 5635562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bf) + \ 564d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 565d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 566d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 567d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 568d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 569d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 5705562d5f6SLorenzo Bianconi sizeof(struct sta_rec_muru) + \ 5715562d5f6SLorenzo Bianconi sizeof(struct sta_rec_bfee) + \ 5725562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra) + \ 5735562d5f6SLorenzo Bianconi sizeof(struct sta_rec_ra_fixed) + \ 5745883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 575d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 576d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 577d0e274afSLorenzo Bianconi 578d0e274afSLorenzo Bianconi enum { 579d0e274afSLorenzo Bianconi STA_REC_BASIC, 580d0e274afSLorenzo Bianconi STA_REC_RA, 581d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 582d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 583d0e274afSLorenzo Bianconi STA_REC_BF, 584d0e274afSLorenzo Bianconi STA_REC_AMSDU, 585d0e274afSLorenzo Bianconi STA_REC_BA, 586d0e274afSLorenzo Bianconi STA_REC_STATE, 587d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 588d0e274afSLorenzo Bianconi STA_REC_HT, 589d0e274afSLorenzo Bianconi STA_REC_VHT, 590d0e274afSLorenzo Bianconi STA_REC_APPS, 591d0e274afSLorenzo Bianconi STA_REC_KEY, 592d0e274afSLorenzo Bianconi STA_REC_WTBL, 593d0e274afSLorenzo Bianconi STA_REC_HE, 594d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 595d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 596d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 597d0e274afSLorenzo Bianconi STA_REC_MURU, 598d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 599d0e274afSLorenzo Bianconi STA_REC_BFEE, 600d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 6015883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 602d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 603d0e274afSLorenzo Bianconi }; 604d0e274afSLorenzo Bianconi 605d0e274afSLorenzo Bianconi enum { 606d0e274afSLorenzo Bianconi WTBL_GENERIC, 607d0e274afSLorenzo Bianconi WTBL_RX, 608d0e274afSLorenzo Bianconi WTBL_HT, 609d0e274afSLorenzo Bianconi WTBL_VHT, 610d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 611d0e274afSLorenzo Bianconi WTBL_TX_PS, 612d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 613d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 614d0e274afSLorenzo Bianconi WTBL_BA, 615d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 616d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 617d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 618d0e274afSLorenzo Bianconi WTBL_BF, 619d0e274afSLorenzo Bianconi WTBL_SMPS, 620d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 621d0e274afSLorenzo Bianconi WTBL_PN, 622d0e274afSLorenzo Bianconi WTBL_SPE, 623d0e274afSLorenzo Bianconi WTBL_MAX_NUM 624d0e274afSLorenzo Bianconi }; 625d0e274afSLorenzo Bianconi 626d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 627d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 628d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 629d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 630d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 631d0e274afSLorenzo Bianconi 632d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 633d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 634d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 635d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 636d0e274afSLorenzo Bianconi 6374da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 6384da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 6394da64fe0SSean Wang 640d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 641d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 642d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 643d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 644d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 645d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 646d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 647d0e274afSLorenzo Bianconi 648d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 649d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 650d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 651d0e274afSLorenzo Bianconi 652d0e274afSLorenzo Bianconi /* HE MAC */ 653d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 654d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 655d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 656d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 657d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 658d0e274afSLorenzo Bianconi /* HE PHY */ 659d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 660d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 661d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 662d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 663d0e274afSLorenzo Bianconi /* STBC */ 664d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 665d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 666d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 667d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 668d0e274afSLorenzo Bianconi /* GI */ 669d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 670d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 671d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 672d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 673d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 674d0e274afSLorenzo Bianconi /* 242 TONE */ 675d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 676d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 677d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 678d0e274afSLorenzo Bianconi 679d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 680d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 681d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 682d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 683d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 684d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 685d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 686d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 687dfdf6725SLorenzo Bianconi 688dfdf6725SLorenzo Bianconi #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ 689d0e274afSLorenzo Bianconi 690d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 691d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 692d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 693d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 694d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 695d0e274afSLorenzo Bianconi 6965562d5f6SLorenzo Bianconi #define STA_CAP_WMM BIT(0) 6975562d5f6SLorenzo Bianconi #define STA_CAP_SGI_20 BIT(4) 6985562d5f6SLorenzo Bianconi #define STA_CAP_SGI_40 BIT(5) 6995562d5f6SLorenzo Bianconi #define STA_CAP_TX_STBC BIT(6) 7005562d5f6SLorenzo Bianconi #define STA_CAP_RX_STBC BIT(7) 7015562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_80 BIT(16) 7025562d5f6SLorenzo Bianconi #define STA_CAP_VHT_SGI_160 BIT(17) 7035562d5f6SLorenzo Bianconi #define STA_CAP_VHT_TX_STBC BIT(18) 7045562d5f6SLorenzo Bianconi #define STA_CAP_VHT_RX_STBC BIT(19) 7055562d5f6SLorenzo Bianconi #define STA_CAP_VHT_LDPC BIT(23) 7065562d5f6SLorenzo Bianconi #define STA_CAP_LDPC BIT(24) 7075562d5f6SLorenzo Bianconi #define STA_CAP_HT BIT(26) 7085562d5f6SLorenzo Bianconi #define STA_CAP_VHT BIT(27) 7095562d5f6SLorenzo Bianconi #define STA_CAP_HE BIT(28) 7105562d5f6SLorenzo Bianconi 711d0e274afSLorenzo Bianconi enum { 712d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 713d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 714d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 715d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 716d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 717d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 718d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 719d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 720d0e274afSLorenzo Bianconi }; 721d0e274afSLorenzo Bianconi 722d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 723d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 724d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 725d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 726d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 727d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 728d0e274afSLorenzo Bianconi 729d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 730d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 731d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 732d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 733d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 734d0e274afSLorenzo Bianconi 735d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 736d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 737d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 738d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 739d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 740d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 741d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 742d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 743d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 744d0e274afSLorenzo Bianconi 745d0e274afSLorenzo Bianconi enum { 746d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 747d0e274afSLorenzo Bianconi WTBL_SET, 748d0e274afSLorenzo Bianconi WTBL_QUERY, 749d0e274afSLorenzo Bianconi WTBL_RESET_ALL 750d0e274afSLorenzo Bianconi }; 751d0e274afSLorenzo Bianconi 752d0e274afSLorenzo Bianconi enum { 753d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 754d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 755d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 756d0e274afSLorenzo Bianconi }; 757d0e274afSLorenzo Bianconi 758d0e274afSLorenzo Bianconi enum { 759d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 760d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 761d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 762d0e274afSLorenzo Bianconi }; 763d0e274afSLorenzo Bianconi 764d0e274afSLorenzo Bianconi enum { 765d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 766d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 767d0e274afSLorenzo Bianconi }; 768d0e274afSLorenzo Bianconi 7695562d5f6SLorenzo Bianconi /* event table */ 7705562d5f6SLorenzo Bianconi enum { 7715562d5f6SLorenzo Bianconi MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, 7725562d5f6SLorenzo Bianconi MCU_EVENT_FW_START = 0x01, 7735562d5f6SLorenzo Bianconi MCU_EVENT_GENERIC = 0x01, 7745562d5f6SLorenzo Bianconi MCU_EVENT_ACCESS_REG = 0x02, 7755562d5f6SLorenzo Bianconi MCU_EVENT_MT_PATCH_SEM = 0x04, 7765562d5f6SLorenzo Bianconi MCU_EVENT_REG_ACCESS = 0x05, 7775562d5f6SLorenzo Bianconi MCU_EVENT_LP_INFO = 0x07, 7785562d5f6SLorenzo Bianconi MCU_EVENT_SCAN_DONE = 0x0d, 7795562d5f6SLorenzo Bianconi MCU_EVENT_TX_DONE = 0x0f, 7805562d5f6SLorenzo Bianconi MCU_EVENT_ROC = 0x10, 7815562d5f6SLorenzo Bianconi MCU_EVENT_BSS_ABSENCE = 0x11, 7825562d5f6SLorenzo Bianconi MCU_EVENT_BSS_BEACON_LOSS = 0x13, 7835562d5f6SLorenzo Bianconi MCU_EVENT_CH_PRIVILEGE = 0x18, 7845562d5f6SLorenzo Bianconi MCU_EVENT_SCHED_SCAN_DONE = 0x23, 7855562d5f6SLorenzo Bianconi MCU_EVENT_DBG_MSG = 0x27, 7865562d5f6SLorenzo Bianconi MCU_EVENT_TXPWR = 0xd0, 7875562d5f6SLorenzo Bianconi MCU_EVENT_EXT = 0xed, 7885562d5f6SLorenzo Bianconi MCU_EVENT_RESTART_DL = 0xef, 7895562d5f6SLorenzo Bianconi MCU_EVENT_COREDUMP = 0xf0, 7905562d5f6SLorenzo Bianconi }; 7915562d5f6SLorenzo Bianconi 7925562d5f6SLorenzo Bianconi /* ext event table */ 7935562d5f6SLorenzo Bianconi enum { 7945562d5f6SLorenzo Bianconi MCU_EXT_EVENT_PS_SYNC = 0x5, 7955562d5f6SLorenzo Bianconi MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, 7965562d5f6SLorenzo Bianconi MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, 7975562d5f6SLorenzo Bianconi MCU_EXT_EVENT_ASSERT_DUMP = 0x23, 7985562d5f6SLorenzo Bianconi MCU_EXT_EVENT_RDD_REPORT = 0x3a, 7995562d5f6SLorenzo Bianconi MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, 8005562d5f6SLorenzo Bianconi MCU_EXT_EVENT_BCC_NOTIFY = 0x75, 801*1966a507SMeiChia Chiu MCU_EXT_EVENT_MURU_CTRL = 0x9f, 8025562d5f6SLorenzo Bianconi }; 8035562d5f6SLorenzo Bianconi 8045562d5f6SLorenzo Bianconi enum { 8055562d5f6SLorenzo Bianconi MCU_Q_QUERY, 8065562d5f6SLorenzo Bianconi MCU_Q_SET, 8075562d5f6SLorenzo Bianconi MCU_Q_RESERVED, 8085562d5f6SLorenzo Bianconi MCU_Q_NA 8095562d5f6SLorenzo Bianconi }; 8105562d5f6SLorenzo Bianconi 8115562d5f6SLorenzo Bianconi enum { 8125562d5f6SLorenzo Bianconi MCU_S2D_H2N, 8135562d5f6SLorenzo Bianconi MCU_S2D_C2N, 8145562d5f6SLorenzo Bianconi MCU_S2D_H2C, 8155562d5f6SLorenzo Bianconi MCU_S2D_H2CN 8165562d5f6SLorenzo Bianconi }; 8175562d5f6SLorenzo Bianconi 8185562d5f6SLorenzo Bianconi enum { 8195562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_FAIL, 8205562d5f6SLorenzo Bianconi PATCH_IS_DL, 8215562d5f6SLorenzo Bianconi PATCH_NOT_DL_SEM_SUCCESS, 8225562d5f6SLorenzo Bianconi PATCH_REL_SEM_SUCCESS 8235562d5f6SLorenzo Bianconi }; 8245562d5f6SLorenzo Bianconi 8255562d5f6SLorenzo Bianconi enum { 8265562d5f6SLorenzo Bianconi FW_STATE_INITIAL, 8275562d5f6SLorenzo Bianconi FW_STATE_FW_DOWNLOAD, 8285562d5f6SLorenzo Bianconi FW_STATE_NORMAL_OPERATION, 8295562d5f6SLorenzo Bianconi FW_STATE_NORMAL_TRX, 8305562d5f6SLorenzo Bianconi FW_STATE_RDY = 7 8315562d5f6SLorenzo Bianconi }; 8325562d5f6SLorenzo Bianconi 8335562d5f6SLorenzo Bianconi enum { 8345562d5f6SLorenzo Bianconi CH_SWITCH_NORMAL = 0, 8355562d5f6SLorenzo Bianconi CH_SWITCH_SCAN = 3, 8365562d5f6SLorenzo Bianconi CH_SWITCH_MCC = 4, 8375562d5f6SLorenzo Bianconi CH_SWITCH_DFS = 5, 8385562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_START = 6, 8395562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 8405562d5f6SLorenzo Bianconi CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 8415562d5f6SLorenzo Bianconi CH_SWITCH_SCAN_BYPASS_DPD = 9 8425562d5f6SLorenzo Bianconi }; 8435562d5f6SLorenzo Bianconi 8445562d5f6SLorenzo Bianconi enum { 8455562d5f6SLorenzo Bianconi THERMAL_SENSOR_TEMP_QUERY, 8465562d5f6SLorenzo Bianconi THERMAL_SENSOR_MANUAL_CTRL, 8475562d5f6SLorenzo Bianconi THERMAL_SENSOR_INFO_QUERY, 8485562d5f6SLorenzo Bianconi THERMAL_SENSOR_TASK_CTRL, 8495562d5f6SLorenzo Bianconi }; 8505562d5f6SLorenzo Bianconi 8515562d5f6SLorenzo Bianconi enum mcu_cipher_type { 8525562d5f6SLorenzo Bianconi MCU_CIPHER_NONE = 0, 8535562d5f6SLorenzo Bianconi MCU_CIPHER_WEP40, 8545562d5f6SLorenzo Bianconi MCU_CIPHER_WEP104, 8555562d5f6SLorenzo Bianconi MCU_CIPHER_WEP128, 8565562d5f6SLorenzo Bianconi MCU_CIPHER_TKIP, 8575562d5f6SLorenzo Bianconi MCU_CIPHER_AES_CCMP, 8585562d5f6SLorenzo Bianconi MCU_CIPHER_CCMP_256, 8595562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP, 8605562d5f6SLorenzo Bianconi MCU_CIPHER_GCMP_256, 8615562d5f6SLorenzo Bianconi MCU_CIPHER_WAPI, 8625562d5f6SLorenzo Bianconi MCU_CIPHER_BIP_CMAC_128, 8635562d5f6SLorenzo Bianconi }; 8645562d5f6SLorenzo Bianconi 8655562d5f6SLorenzo Bianconi enum { 8665562d5f6SLorenzo Bianconi EE_MODE_EFUSE, 8675562d5f6SLorenzo Bianconi EE_MODE_BUFFER, 8685562d5f6SLorenzo Bianconi }; 8695562d5f6SLorenzo Bianconi 8705562d5f6SLorenzo Bianconi enum { 8715562d5f6SLorenzo Bianconi EE_FORMAT_BIN, 8725562d5f6SLorenzo Bianconi EE_FORMAT_WHOLE, 8735562d5f6SLorenzo Bianconi EE_FORMAT_MULTIPLE, 8745562d5f6SLorenzo Bianconi }; 8755562d5f6SLorenzo Bianconi 8765562d5f6SLorenzo Bianconi enum { 8775562d5f6SLorenzo Bianconi MCU_PHY_STATE_TX_RATE, 8785562d5f6SLorenzo Bianconi MCU_PHY_STATE_RX_RATE, 8795562d5f6SLorenzo Bianconi MCU_PHY_STATE_RSSI, 8805562d5f6SLorenzo Bianconi MCU_PHY_STATE_CONTENTION_RX_RATE, 8815562d5f6SLorenzo Bianconi MCU_PHY_STATE_OFDMLQ_CNINFO, 8825562d5f6SLorenzo Bianconi }; 8835562d5f6SLorenzo Bianconi 884d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 885d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 886d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 887d0e274afSLorenzo Bianconi 888d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 889d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 890d0e274afSLorenzo Bianconi 891e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_ID GENMASK(7, 0) 892e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8) 893e6d2070dSLorenzo Bianconi #define __MCU_CMD_FIELD_QUERY BIT(16) 89454722402SLorenzo Bianconi #define __MCU_CMD_FIELD_UNI BIT(17) 895680a2eadSLorenzo Bianconi #define __MCU_CMD_FIELD_CE BIT(18) 8965562d5f6SLorenzo Bianconi #define __MCU_CMD_FIELD_WA BIT(19) 897e6d2070dSLorenzo Bianconi 898e6d2070dSLorenzo Bianconi #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \ 899e6d2070dSLorenzo Bianconi MCU_CMD_##_t) 900e6d2070dSLorenzo Bianconi #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \ 901e6d2070dSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 902e6d2070dSLorenzo Bianconi MCU_EXT_CMD_##_t)) 903e6d2070dSLorenzo Bianconi #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY) 90454722402SLorenzo Bianconi #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \ 90554722402SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 90654722402SLorenzo Bianconi MCU_UNI_CMD_##_t)) 907680a2eadSLorenzo Bianconi #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \ 908680a2eadSLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_ID, \ 909680a2eadSLorenzo Bianconi MCU_CE_CMD_##_t)) 910680a2eadSLorenzo Bianconi #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY) 911d0e274afSLorenzo Bianconi 9125562d5f6SLorenzo Bianconi #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA) 9135562d5f6SLorenzo Bianconi #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA) 9145562d5f6SLorenzo Bianconi #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \ 9155562d5f6SLorenzo Bianconi FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \ 9165562d5f6SLorenzo Bianconi MCU_WA_PARAM_CMD_##_t)) 9175562d5f6SLorenzo Bianconi 918d0e274afSLorenzo Bianconi enum { 919d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 920d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 9219d8d136cSLorenzo Bianconi MCU_EXT_CMD_RF_TEST = 0x04, 922d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 923d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 924d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 925d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 9269d8d136cSLorenzo Bianconi MCU_EXT_CMD_TXBF_ACTION = 0x1e, 927d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 9289d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_PROT = 0x23, 929d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 930d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 931d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 932d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 9339d8d136cSLorenzo Bianconi MCU_EXT_CMD_THERMAL_CTRL = 0x2c, 934d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 9359d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_DRR_CTRL = 0x36, 936d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 937d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 938d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 939d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 940d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 941d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 942d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 943d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 9449d8d136cSLorenzo Bianconi MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, 945d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 9469d8d136cSLorenzo Bianconi MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, 947d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 948d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 9499d8d136cSLorenzo Bianconi MCU_EXT_CMD_GET_MIB_INFO = 0x5a, 950d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 95103a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 9529d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RADAR_TH = 0x7c, 953d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 9549d8d136cSLorenzo Bianconi MCU_EXT_CMD_MWDS_SUPPORT = 0x80, 9559d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, 9569d8d136cSLorenzo Bianconi MCU_EXT_CMD_SCS_CTRL = 0x82, 9579d8d136cSLorenzo Bianconi MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, 9589d8d136cSLorenzo Bianconi MCU_EXT_CMD_FW_DBG_CTRL = 0x95, 9599d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x9d, 9609d8d136cSLorenzo Bianconi MCU_EXT_CMD_MURU_CTRL = 0x9f, 9619d8d136cSLorenzo Bianconi MCU_EXT_CMD_SET_SPR = 0xa8, 9629d8d136cSLorenzo Bianconi MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, 9639d8d136cSLorenzo Bianconi MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, 9649d8d136cSLorenzo Bianconi MCU_EXT_CMD_PHY_STAT_INFO = 0xad, 965d0e274afSLorenzo Bianconi }; 966d0e274afSLorenzo Bianconi 967d0e274afSLorenzo Bianconi enum { 96854722402SLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01, 96954722402SLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02, 97054722402SLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = 0x03, 97154722402SLorenzo Bianconi MCU_UNI_CMD_SUSPEND = 0x05, 97254722402SLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = 0x06, 97354722402SLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = 0x07, 974d0e274afSLorenzo Bianconi }; 975d0e274afSLorenzo Bianconi 976d0e274afSLorenzo Bianconi enum { 9777159eb82SLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 9787159eb82SLorenzo Bianconi MCU_CMD_FW_START_REQ = 0x02, 979d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 9807159eb82SLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = 0x4, 9817159eb82SLorenzo Bianconi MCU_CMD_PATCH_START_REQ = 0x05, 9827159eb82SLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = 0x07, 9837159eb82SLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = 0x10, 9849d8d136cSLorenzo Bianconi MCU_CMD_WA_PARAM = 0xc4, 985d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 9867159eb82SLorenzo Bianconi MCU_CMD_FW_SCATTER = 0xee, 9877159eb82SLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = 0xef, 988d0e274afSLorenzo Bianconi }; 989d0e274afSLorenzo Bianconi 990d0e274afSLorenzo Bianconi /* offload mcu commands */ 991d0e274afSLorenzo Bianconi enum { 992680a2eadSLorenzo Bianconi MCU_CE_CMD_TEST_CTRL = 0x01, 993680a2eadSLorenzo Bianconi MCU_CE_CMD_START_HW_SCAN = 0x03, 994680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_PS_PROFILE = 0x05, 995680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f, 996680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, 997680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_BSS_ABORT = 0x17, 998680a2eadSLorenzo Bianconi MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, 999680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_ROC = 0x1d, 1000680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_P2P_OPPPS = 0x33, 1001680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, 1002680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, 1003680a2eadSLorenzo Bianconi MCU_CE_CMD_SCHED_SCAN_REQ = 0x62, 1004680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_NIC_CAPAB = 0x8a, 1005680a2eadSLorenzo Bianconi MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0, 1006680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_WRITE = 0xc0, 1007680a2eadSLorenzo Bianconi MCU_CE_CMD_REG_READ = 0xc0, 1008680a2eadSLorenzo Bianconi MCU_CE_CMD_CHIP_CONFIG = 0xca, 1009680a2eadSLorenzo Bianconi MCU_CE_CMD_FWLOG_2_HOST = 0xc5, 1010680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_WTBL = 0xcd, 1011680a2eadSLorenzo Bianconi MCU_CE_CMD_GET_TXPWR = 0xd0, 1012d0e274afSLorenzo Bianconi }; 1013d0e274afSLorenzo Bianconi 1014d0e274afSLorenzo Bianconi enum { 1015d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 1016d0e274afSLorenzo Bianconi PATCH_SEM_GET 1017d0e274afSLorenzo Bianconi }; 1018d0e274afSLorenzo Bianconi 1019d0e274afSLorenzo Bianconi enum { 1020d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 1021d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 1022b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 1023d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 1024d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 1025d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 1026d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 102767aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 102867aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 1029d0e274afSLorenzo Bianconi }; 1030d0e274afSLorenzo Bianconi 103155d4c19cSLorenzo Bianconi enum { 103255d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 103355d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 103455d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 103555d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 103655d4c19cSLorenzo Bianconi }; 103755d4c19cSLorenzo Bianconi 1038f7d2958cSLorenzo Bianconi enum { 1039f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 1040f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 1041f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 1042f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 1043f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 1044f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 1045f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 1046f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 1047f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 1048f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 1049f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 1050f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 1051f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 1052f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 1053f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 1054f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 1055f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 1056f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 1057f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 1058f7d2958cSLorenzo Bianconi }; 1059f7d2958cSLorenzo Bianconi 1060193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 1061193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 1062193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 1063193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 1064193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 1065193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 1066193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 1067193e5f22SYN Chen 106855d4c19cSLorenzo Bianconi enum { 106955d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 107055d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 107155d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 107255d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 107355d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 107455d4c19cSLorenzo Bianconi }; 107555d4c19cSLorenzo Bianconi 107655d4c19cSLorenzo Bianconi enum { 107755d4c19cSLorenzo Bianconi WOW_USB = 1, 107855d4c19cSLorenzo Bianconi WOW_PCIE = 2, 107955d4c19cSLorenzo Bianconi WOW_GPIO = 3, 108055d4c19cSLorenzo Bianconi }; 108155d4c19cSLorenzo Bianconi 1082d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 1083d0e274afSLorenzo Bianconi __le16 tag; 1084d0e274afSLorenzo Bianconi __le16 len; 1085d0e274afSLorenzo Bianconi u8 active; 1086d0e274afSLorenzo Bianconi u8 omac_idx; 1087d0e274afSLorenzo Bianconi u8 hw_bss_idx; 1088d0e274afSLorenzo Bianconi u8 band_idx; 1089d0e274afSLorenzo Bianconi __le32 conn_type; 1090d0e274afSLorenzo Bianconi u8 conn_state; 1091d0e274afSLorenzo Bianconi u8 wmm_idx; 1092d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1093d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 1094d0e274afSLorenzo Bianconi __le16 bcn_interval; 1095d0e274afSLorenzo Bianconi u8 dtim_period; 1096d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 1097d0e274afSLorenzo Bianconi * bit(1): B 1098d0e274afSLorenzo Bianconi * bit(2): G 1099d0e274afSLorenzo Bianconi * bit(3): GN 1100d0e274afSLorenzo Bianconi * bit(4): AN 1101d0e274afSLorenzo Bianconi * bit(5): AC 11023cf3e01bSLorenzo Bianconi * bit(6): AX2 11033cf3e01bSLorenzo Bianconi * bit(7): AX5 11043cf3e01bSLorenzo Bianconi * bit(8): AX6 1105d0e274afSLorenzo Bianconi */ 1106d0e274afSLorenzo Bianconi __le16 sta_idx; 11073cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 11083cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 11093cf3e01bSLorenzo Bianconi u8 pad[1]; 1110d0e274afSLorenzo Bianconi } __packed; 1111d0e274afSLorenzo Bianconi 1112d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 1113d0e274afSLorenzo Bianconi __le16 tag; 1114d0e274afSLorenzo Bianconi __le16 len; 1115d0e274afSLorenzo Bianconi u8 qos; 1116d0e274afSLorenzo Bianconi u8 pad[3]; 1117d0e274afSLorenzo Bianconi } __packed; 1118d0e274afSLorenzo Bianconi 1119d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 1120d0e274afSLorenzo Bianconi u8 bss_idx; 1121d0e274afSLorenzo Bianconi u8 reason; 1122d0e274afSLorenzo Bianconi u8 pad[2]; 1123d0e274afSLorenzo Bianconi } __packed; 1124d0e274afSLorenzo Bianconi 1125d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 1126d0e274afSLorenzo Bianconi u8 bss_idx; 1127d0e274afSLorenzo Bianconi u8 is_absent; 1128d0e274afSLorenzo Bianconi u8 free_quota; 1129d0e274afSLorenzo Bianconi u8 pad; 1130d0e274afSLorenzo Bianconi } __packed; 1131d0e274afSLorenzo Bianconi 1132399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 1133399090efSLorenzo Bianconi __le32 ssid_len; 1134399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1135399090efSLorenzo Bianconi } __packed; 1136399090efSLorenzo Bianconi 1137399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 1138399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 1139399090efSLorenzo Bianconi * 2: 5.0GHz 1140399090efSLorenzo Bianconi * Others: Reserved 1141399090efSLorenzo Bianconi */ 1142399090efSLorenzo Bianconi u8 channel_num; 1143399090efSLorenzo Bianconi } __packed; 1144399090efSLorenzo Bianconi 1145399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 1146399090efSLorenzo Bianconi __le32 rssi_th; 1147399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 1148399090efSLorenzo Bianconi u8 ssid_len; 1149399090efSLorenzo Bianconi u8 rsv[3]; 1150399090efSLorenzo Bianconi } __packed; 1151399090efSLorenzo Bianconi 1152399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 1153399090efSLorenzo Bianconi u8 seq_num; 1154399090efSLorenzo Bianconi u8 bss_idx; 1155399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 1156399090efSLorenzo Bianconi * 1: ACTIVE SCAN 1157399090efSLorenzo Bianconi */ 1158399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 1159399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 1160399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 1161399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 1162399090efSLorenzo Bianconi */ 1163399090efSLorenzo Bianconi u8 ssids_num; 1164399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 1165399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 1166399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 1167399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 1168399090efSLorenzo Bianconi */ 1169399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 1170399090efSLorenzo Bianconi * 1: Support fields after ies. 1171399090efSLorenzo Bianconi */ 1172399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 1173399090efSLorenzo Bianconi __le16 probe_delay_time; 1174399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 1175399090efSLorenzo Bianconi __le16 timeout_value; 1176399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 1177399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 1178399090efSLorenzo Bianconi * 2: Only 5GHz channels 1179399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 1180399090efSLorenzo Bianconi * 4: Specified channels 1181399090efSLorenzo Bianconi * Others: Reserved 1182399090efSLorenzo Bianconi */ 1183399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 1184399090efSLorenzo Bianconi /* valid when channels_num is set */ 1185399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 1186399090efSLorenzo Bianconi __le16 ies_len; 1187399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 1188399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 1189399090efSLorenzo Bianconi u8 ext_channels_num; 1190399090efSLorenzo Bianconi u8 ext_ssids_num; 1191399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 1192399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 1193399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 1194399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 1195399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 1196399090efSLorenzo Bianconi u8 pad[63]; 1197399090efSLorenzo Bianconi u8 ssid_type_ext; 1198399090efSLorenzo Bianconi } __packed; 1199399090efSLorenzo Bianconi 1200399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 1201399090efSLorenzo Bianconi 1202399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 1203399090efSLorenzo Bianconi u8 seq_num; 1204399090efSLorenzo Bianconi u8 sparse_channel_num; 1205399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 1206399090efSLorenzo Bianconi u8 complete_channel_num; 1207399090efSLorenzo Bianconi u8 current_state; 1208399090efSLorenzo Bianconi u8 version; 1209399090efSLorenzo Bianconi u8 pad; 1210399090efSLorenzo Bianconi __le32 beacon_scan_num; 1211399090efSLorenzo Bianconi u8 pno_enabled; 1212399090efSLorenzo Bianconi u8 pad2[3]; 1213399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 1214399090efSLorenzo Bianconi u8 pad3[3]; 1215399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1216399090efSLorenzo Bianconi /* idle format for channel_idle_time 1217399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 1218399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 1219399090efSLorenzo Bianconi * 2: dwell time (16us) 1220399090efSLorenzo Bianconi */ 1221399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1222399090efSLorenzo Bianconi /* beacon and probe response count */ 1223399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1224399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 1225399090efSLorenzo Bianconi __le32 beacon_2g_num; 1226399090efSLorenzo Bianconi __le32 beacon_5g_num; 1227399090efSLorenzo Bianconi } __packed; 1228399090efSLorenzo Bianconi 1229399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 1230399090efSLorenzo Bianconi u8 version; 1231399090efSLorenzo Bianconi u8 seq_num; 1232399090efSLorenzo Bianconi u8 stop_on_match; 1233399090efSLorenzo Bianconi u8 ssids_num; 1234399090efSLorenzo Bianconi u8 match_num; 1235399090efSLorenzo Bianconi u8 pad; 1236399090efSLorenzo Bianconi __le16 ie_len; 1237399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 1238399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 1239399090efSLorenzo Bianconi u8 channel_type; 1240399090efSLorenzo Bianconi u8 channels_num; 1241399090efSLorenzo Bianconi u8 intervals_num; 12427139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 1243399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 1244abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 12457139b5c0SSean Wang union { 12467139b5c0SSean Wang struct { 12477139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 1248399090efSLorenzo Bianconi u8 pad2[58]; 12497139b5c0SSean Wang } mt7663; 12507139b5c0SSean Wang struct { 12517139b5c0SSean Wang u8 bss_idx; 1252b94c0ed6SDeren Wu u8 pad1[3]; 1253b94c0ed6SDeren Wu __le32 delay; 1254b94c0ed6SDeren Wu u8 pad2[12]; 12559f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 12569f367c81SDeren Wu u8 pad3[38]; 12577139b5c0SSean Wang } mt7921; 12587139b5c0SSean Wang }; 1259399090efSLorenzo Bianconi } __packed; 1260399090efSLorenzo Bianconi 1261399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 1262399090efSLorenzo Bianconi u8 seq_num; 1263399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 1264399090efSLorenzo Bianconi __le16 pad; 1265399090efSLorenzo Bianconi } __packed; 1266399090efSLorenzo Bianconi 1267b4b880b9SYN Chen struct bss_info_uni_bss_color { 1268b4b880b9SYN Chen __le16 tag; 1269b4b880b9SYN Chen __le16 len; 1270b4b880b9SYN Chen u8 enable; 1271b4b880b9SYN Chen u8 bss_color; 1272b4b880b9SYN Chen u8 rsv[2]; 1273b4b880b9SYN Chen } __packed; 1274b4b880b9SYN Chen 1275d0e274afSLorenzo Bianconi struct bss_info_uni_he { 1276d0e274afSLorenzo Bianconi __le16 tag; 1277d0e274afSLorenzo Bianconi __le16 len; 1278d0e274afSLorenzo Bianconi __le16 he_rts_thres; 1279d0e274afSLorenzo Bianconi u8 he_pe_duration; 1280d0e274afSLorenzo Bianconi u8 su_disable; 1281d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 1282d0e274afSLorenzo Bianconi u8 rsv[2]; 1283d0e274afSLorenzo Bianconi } __packed; 1284d0e274afSLorenzo Bianconi 128555d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 128655d4c19cSLorenzo Bianconi __le16 tag; 128755d4c19cSLorenzo Bianconi __le16 len; 128855d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 128955d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 129055d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 129155d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 129255d4c19cSLorenzo Bianconi * 1: rekey offload disable 129355d4c19cSLorenzo Bianconi * 2: rekey update 129455d4c19cSLorenzo Bianconi */ 129555d4c19cSLorenzo Bianconi u8 keyid; 1296d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 1297d741abeaSLeon Yen u8 pad[1]; 129855d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 129955d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 130055d4c19cSLorenzo Bianconi __le32 group_cipher; 130155d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 130255d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 1303d741abeaSLeon Yen u8 reserverd[4]; 130455d4c19cSLorenzo Bianconi } __packed; 130555d4c19cSLorenzo Bianconi 130655d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 130755d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 130855d4c19cSLorenzo Bianconi 130955d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 131055d4c19cSLorenzo Bianconi __le16 tag; 131155d4c19cSLorenzo Bianconi __le16 len; 131255d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 131355d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 131455d4c19cSLorenzo Bianconi * 1: enable 131555d4c19cSLorenzo Bianconi */ 131655d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 131755d4c19cSLorenzo Bianconi u8 pad; 131855d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 131955d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 132055d4c19cSLorenzo Bianconi u8 rsv[4]; 132155d4c19cSLorenzo Bianconi } __packed; 132255d4c19cSLorenzo Bianconi 132355d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 132455d4c19cSLorenzo Bianconi __le16 tag; 132555d4c19cSLorenzo Bianconi __le16 len; 132655d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 132755d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 132855d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 132955d4c19cSLorenzo Bianconi */ 133055d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 133155d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 133255d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 133355d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 133455d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 133555d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 133655d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 133755d4c19cSLorenzo Bianconi */ 133855d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 133955d4c19cSLorenzo Bianconi * 0x1: HIF_USB 134055d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 134155d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 134255d4c19cSLorenzo Bianconi */ 134355d4c19cSLorenzo Bianconi u8 pad; 134455d4c19cSLorenzo Bianconi u8 rsv[4]; 134555d4c19cSLorenzo Bianconi } __packed; 134655d4c19cSLorenzo Bianconi 134755d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 134855d4c19cSLorenzo Bianconi __le16 tag; 134955d4c19cSLorenzo Bianconi __le16 len; 135055d4c19cSLorenzo Bianconi u8 gpio_pin; 135155d4c19cSLorenzo Bianconi u8 trigger_lvl; 135255d4c19cSLorenzo Bianconi u8 pad[2]; 135355d4c19cSLorenzo Bianconi __le32 gpio_interval; 135455d4c19cSLorenzo Bianconi u8 rsv[4]; 135555d4c19cSLorenzo Bianconi } __packed; 135655d4c19cSLorenzo Bianconi 135755d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 135855d4c19cSLorenzo Bianconi __le16 tag; 135955d4c19cSLorenzo Bianconi __le16 len; 136055d4c19cSLorenzo Bianconi u8 mode; 136155d4c19cSLorenzo Bianconi u8 ips_num; 136255d4c19cSLorenzo Bianconi u8 option; 136355d4c19cSLorenzo Bianconi u8 pad[1]; 136455d4c19cSLorenzo Bianconi } __packed; 136555d4c19cSLorenzo Bianconi 136655d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 136755d4c19cSLorenzo Bianconi __le16 tag; 136855d4c19cSLorenzo Bianconi __le16 len; 136955d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 137055d4c19cSLorenzo Bianconi * 1: suspend mode enabled 137155d4c19cSLorenzo Bianconi */ 137255d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 137355d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 137455d4c19cSLorenzo Bianconi * 1: update by wow dtim 137555d4c19cSLorenzo Bianconi */ 137655d4c19cSLorenzo Bianconi u8 pad[5]; 137755d4c19cSLorenzo Bianconi } __packed; 137855d4c19cSLorenzo Bianconi 1379f5056657SSean Wang enum mt76_sta_info_state { 1380f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 1381f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 1382f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 1383f5056657SSean Wang }; 1384f5056657SSean Wang 13855802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 13865802106fSLorenzo Bianconi struct ieee80211_sta *sta; 13875802106fSLorenzo Bianconi struct mt76_wcid *wcid; 13885802106fSLorenzo Bianconi 13895802106fSLorenzo Bianconi struct ieee80211_vif *vif; 13905802106fSLorenzo Bianconi 139182453b1cSLorenzo Bianconi bool offload_fw; 13925802106fSLorenzo Bianconi bool enable; 1393f5056657SSean Wang bool newly; 13945802106fSLorenzo Bianconi int cmd; 13955802106fSLorenzo Bianconi u8 rcpi; 1396f5056657SSean Wang u8 state; 13975802106fSLorenzo Bianconi }; 13985802106fSLorenzo Bianconi 139918369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 140018369a4fSLorenzo Bianconi 140118369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 140218369a4fSLorenzo Bianconi u8 channel; 140318369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 140418369a4fSLorenzo Bianconi } __packed; 140518369a4fSLorenzo Bianconi 140618369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 140718369a4fSLorenzo Bianconi /* DW0 - common info*/ 140818369a4fSLorenzo Bianconi u8 ver; 140918369a4fSLorenzo Bianconi u8 pad0; 141018369a4fSLorenzo Bianconi __le16 len; 141118369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 141218369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 14139b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 141418369a4fSLorenzo Bianconi u8 last_msg; 141518369a4fSLorenzo Bianconi u8 pad1; 141618369a4fSLorenzo Bianconi /* DW3 */ 141718369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 141818369a4fSLorenzo Bianconi u8 pad2[32]; 141918369a4fSLorenzo Bianconi } __packed; 142018369a4fSLorenzo Bianconi 1421c0b21255SSean Wang struct mt76_connac_config { 1422c0b21255SSean Wang __le16 id; 1423c0b21255SSean Wang u8 type; 1424c0b21255SSean Wang u8 resp_type; 1425c0b21255SSean Wang __le16 data_size; 1426c0b21255SSean Wang __le16 resv; 1427c0b21255SSean Wang u8 data[320]; 1428c0b21255SSean Wang } __packed; 1429c0b21255SSean Wang 143067aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 143167aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 143267aa2743SLorenzo Bianconi 143367aa2743SLorenzo Bianconi static inline void 143467aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 143567aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 143667aa2743SLorenzo Bianconi { 143767aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 143867aa2743SLorenzo Bianconi 143967aa2743SLorenzo Bianconi if (is_mt7921(dev)) { 144067aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 144167aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 144267aa2743SLorenzo Bianconi } else { 144367aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 144467aa2743SLorenzo Bianconi } 144567aa2743SLorenzo Bianconi } 144667aa2743SLorenzo Bianconi 1447d0e274afSLorenzo Bianconi struct sk_buff * 1448d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1449d0e274afSLorenzo Bianconi struct mt76_wcid *wcid); 1450d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1451d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1452d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1453d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1454d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1455d0e274afSLorenzo Bianconi void *sta_wtbl); 1456d0e274afSLorenzo Bianconi static inline struct tlv * 1457d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1458d0e274afSLorenzo Bianconi { 1459d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1460d0e274afSLorenzo Bianconi } 1461d0e274afSLorenzo Bianconi 1462d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1463d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1464d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1465d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1466f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1467f5056657SSean Wang bool newly); 1468d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1469d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1470d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1471d0e274afSLorenzo Bianconi void *wtbl_tlv); 1472d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1473868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 147466978204SFelix Fietkau struct mt76_wcid *wcid, 1475d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 147624299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 147724299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 147824299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 1479d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1480d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 14815802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1482f5056657SSean Wang u8 rcpi, u8 state); 1483d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1484d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1485d0e274afSLorenzo Bianconi void *wtbl_tlv); 1486d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1487d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1488d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1489d0e274afSLorenzo Bianconi void *wtbl_tlv); 1490d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1491d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1492d0e274afSLorenzo Bianconi bool enable, bool tx); 1493d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1494d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1495d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1496d0e274afSLorenzo Bianconi bool enable); 1497d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1498d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1499d0e274afSLorenzo Bianconi bool enable, bool tx); 1500d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1501d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1502d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1503d0e274afSLorenzo Bianconi bool enable); 1504f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 15055802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1506d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1507d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1508d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1509d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1510d0e274afSLorenzo Bianconi bool hdr_trans); 1511d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1512d0e274afSLorenzo Bianconi u32 mode); 1513d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1514d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1515d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1516f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1517d0e274afSLorenzo Bianconi 1518399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1519399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1520399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1521399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1522399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1523399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1524399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1525399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1526399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1527399090efSLorenzo Bianconi bool enable); 1528f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1529f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1530f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 153155d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 153255d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 153355d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 153455d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 153555d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 153655d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1537f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1538f5056657SSean Wang enum ieee80211_sta_state old_state, 1539f5056657SSean Wang enum ieee80211_sta_state new_state); 15400da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1541c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 15420da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 15430da3c795SSean Wang struct mt76_connac_coredump *coredump); 154418369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 15451f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 15461f832887SLorenzo Bianconi struct ieee80211_vif *vif); 154787f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 154887f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1549d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1550