1d0e274afSLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2d0e274afSLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. */ 3d0e274afSLorenzo Bianconi 4d0e274afSLorenzo Bianconi #ifndef __MT76_CONNAC_MCU_H 5d0e274afSLorenzo Bianconi #define __MT76_CONNAC_MCU_H 6d0e274afSLorenzo Bianconi 7b7dd3c2eSLorenzo Bianconi #include "mt76_connac.h" 8d0e274afSLorenzo Bianconi 9d0e274afSLorenzo Bianconi struct tlv { 10d0e274afSLorenzo Bianconi __le16 tag; 11d0e274afSLorenzo Bianconi __le16 len; 12d0e274afSLorenzo Bianconi } __packed; 13d0e274afSLorenzo Bianconi 14d0e274afSLorenzo Bianconi /* sta_rec */ 15d0e274afSLorenzo Bianconi 16d0e274afSLorenzo Bianconi struct sta_ntlv_hdr { 17d0e274afSLorenzo Bianconi u8 rsv[2]; 18d0e274afSLorenzo Bianconi __le16 tlv_num; 19d0e274afSLorenzo Bianconi } __packed; 20d0e274afSLorenzo Bianconi 21d0e274afSLorenzo Bianconi struct sta_req_hdr { 22d0e274afSLorenzo Bianconi u8 bss_idx; 23d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 24d0e274afSLorenzo Bianconi __le16 tlv_num; 25d0e274afSLorenzo Bianconi u8 is_tlv_append; 26d0e274afSLorenzo Bianconi u8 muar_idx; 27d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 28d0e274afSLorenzo Bianconi u8 rsv; 29d0e274afSLorenzo Bianconi } __packed; 30d0e274afSLorenzo Bianconi 31d0e274afSLorenzo Bianconi struct sta_rec_basic { 32d0e274afSLorenzo Bianconi __le16 tag; 33d0e274afSLorenzo Bianconi __le16 len; 34d0e274afSLorenzo Bianconi __le32 conn_type; 35d0e274afSLorenzo Bianconi u8 conn_state; 36d0e274afSLorenzo Bianconi u8 qos; 37d0e274afSLorenzo Bianconi __le16 aid; 38d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 39d0e274afSLorenzo Bianconi #define EXTRA_INFO_VER BIT(0) 40d0e274afSLorenzo Bianconi #define EXTRA_INFO_NEW BIT(1) 41d0e274afSLorenzo Bianconi __le16 extra_info; 42d0e274afSLorenzo Bianconi } __packed; 43d0e274afSLorenzo Bianconi 44d0e274afSLorenzo Bianconi struct sta_rec_ht { 45d0e274afSLorenzo Bianconi __le16 tag; 46d0e274afSLorenzo Bianconi __le16 len; 47d0e274afSLorenzo Bianconi __le16 ht_cap; 48d0e274afSLorenzo Bianconi u16 rsv; 49d0e274afSLorenzo Bianconi } __packed; 50d0e274afSLorenzo Bianconi 51d0e274afSLorenzo Bianconi struct sta_rec_vht { 52d0e274afSLorenzo Bianconi __le16 tag; 53d0e274afSLorenzo Bianconi __le16 len; 54d0e274afSLorenzo Bianconi __le32 vht_cap; 55d0e274afSLorenzo Bianconi __le16 vht_rx_mcs_map; 56d0e274afSLorenzo Bianconi __le16 vht_tx_mcs_map; 57d0e274afSLorenzo Bianconi /* mt7921 */ 58d0e274afSLorenzo Bianconi u8 rts_bw_sig; 59d0e274afSLorenzo Bianconi u8 rsv[3]; 60d0e274afSLorenzo Bianconi } __packed; 61d0e274afSLorenzo Bianconi 62d0e274afSLorenzo Bianconi struct sta_rec_uapsd { 63d0e274afSLorenzo Bianconi __le16 tag; 64d0e274afSLorenzo Bianconi __le16 len; 65d0e274afSLorenzo Bianconi u8 dac_map; 66d0e274afSLorenzo Bianconi u8 tac_map; 67d0e274afSLorenzo Bianconi u8 max_sp; 68d0e274afSLorenzo Bianconi u8 rsv0; 69d0e274afSLorenzo Bianconi __le16 listen_interval; 70d0e274afSLorenzo Bianconi u8 rsv1[2]; 71d0e274afSLorenzo Bianconi } __packed; 72d0e274afSLorenzo Bianconi 73d0e274afSLorenzo Bianconi struct sta_rec_ba { 74d0e274afSLorenzo Bianconi __le16 tag; 75d0e274afSLorenzo Bianconi __le16 len; 76d0e274afSLorenzo Bianconi u8 tid; 77d0e274afSLorenzo Bianconi u8 ba_type; 78d0e274afSLorenzo Bianconi u8 amsdu; 79d0e274afSLorenzo Bianconi u8 ba_en; 80d0e274afSLorenzo Bianconi __le16 ssn; 81d0e274afSLorenzo Bianconi __le16 winsize; 82d0e274afSLorenzo Bianconi } __packed; 83d0e274afSLorenzo Bianconi 84d0e274afSLorenzo Bianconi struct sta_rec_he { 85d0e274afSLorenzo Bianconi __le16 tag; 86d0e274afSLorenzo Bianconi __le16 len; 87d0e274afSLorenzo Bianconi 88d0e274afSLorenzo Bianconi __le32 he_cap; 89d0e274afSLorenzo Bianconi 90d0e274afSLorenzo Bianconi u8 t_frame_dur; 91d0e274afSLorenzo Bianconi u8 max_ampdu_exp; 92d0e274afSLorenzo Bianconi u8 bw_set; 93d0e274afSLorenzo Bianconi u8 device_class; 94d0e274afSLorenzo Bianconi u8 dcm_tx_mode; 95d0e274afSLorenzo Bianconi u8 dcm_tx_max_nss; 96d0e274afSLorenzo Bianconi u8 dcm_rx_mode; 97d0e274afSLorenzo Bianconi u8 dcm_rx_max_nss; 98d0e274afSLorenzo Bianconi u8 dcm_max_ru; 99d0e274afSLorenzo Bianconi u8 punc_pream_rx; 100d0e274afSLorenzo Bianconi u8 pkt_ext; 101d0e274afSLorenzo Bianconi u8 rsv1; 102d0e274afSLorenzo Bianconi 103d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 104d0e274afSLorenzo Bianconi 105d0e274afSLorenzo Bianconi u8 rsv2[2]; 106d0e274afSLorenzo Bianconi } __packed; 107d0e274afSLorenzo Bianconi 108d0e274afSLorenzo Bianconi struct sta_rec_amsdu { 109d0e274afSLorenzo Bianconi __le16 tag; 110d0e274afSLorenzo Bianconi __le16 len; 111d0e274afSLorenzo Bianconi u8 max_amsdu_num; 112d0e274afSLorenzo Bianconi u8 max_mpdu_size; 113d0e274afSLorenzo Bianconi u8 amsdu_en; 114d0e274afSLorenzo Bianconi u8 rsv; 115d0e274afSLorenzo Bianconi } __packed; 116d0e274afSLorenzo Bianconi 117d0e274afSLorenzo Bianconi struct sta_rec_state { 118d0e274afSLorenzo Bianconi __le16 tag; 119d0e274afSLorenzo Bianconi __le16 len; 120d0e274afSLorenzo Bianconi __le32 flags; 121d0e274afSLorenzo Bianconi u8 state; 122d0e274afSLorenzo Bianconi u8 vht_opmode; 123d0e274afSLorenzo Bianconi u8 action; 124d0e274afSLorenzo Bianconi u8 rsv[1]; 125d0e274afSLorenzo Bianconi } __packed; 126d0e274afSLorenzo Bianconi 12799b8e195SSean Wang #define RA_LEGACY_OFDM GENMASK(13, 6) 12899b8e195SSean Wang #define RA_LEGACY_CCK GENMASK(3, 0) 129d0e274afSLorenzo Bianconi #define HT_MCS_MASK_NUM 10 130d0e274afSLorenzo Bianconi struct sta_rec_ra_info { 131d0e274afSLorenzo Bianconi __le16 tag; 132d0e274afSLorenzo Bianconi __le16 len; 133d0e274afSLorenzo Bianconi __le16 legacy; 134d0e274afSLorenzo Bianconi u8 rx_mcs_bitmask[HT_MCS_MASK_NUM]; 135d0e274afSLorenzo Bianconi } __packed; 136d0e274afSLorenzo Bianconi 137d0e274afSLorenzo Bianconi struct sta_rec_phy { 138d0e274afSLorenzo Bianconi __le16 tag; 139d0e274afSLorenzo Bianconi __le16 len; 140d0e274afSLorenzo Bianconi __le16 basic_rate; 141d0e274afSLorenzo Bianconi u8 phy_type; 142d0e274afSLorenzo Bianconi u8 ampdu; 143d0e274afSLorenzo Bianconi u8 rts_policy; 144d0e274afSLorenzo Bianconi u8 rcpi; 145d0e274afSLorenzo Bianconi u8 rsv[2]; 146d0e274afSLorenzo Bianconi } __packed; 147d0e274afSLorenzo Bianconi 1485883892bSLorenzo Bianconi struct sta_rec_he_6g_capa { 1495883892bSLorenzo Bianconi __le16 tag; 1505883892bSLorenzo Bianconi __le16 len; 1515883892bSLorenzo Bianconi __le16 capa; 1525883892bSLorenzo Bianconi u8 rsv[2]; 1535883892bSLorenzo Bianconi } __packed; 1545883892bSLorenzo Bianconi 155d0e274afSLorenzo Bianconi /* wtbl_rec */ 156d0e274afSLorenzo Bianconi 157d0e274afSLorenzo Bianconi struct wtbl_req_hdr { 158d0e274afSLorenzo Bianconi u8 wlan_idx_lo; 159d0e274afSLorenzo Bianconi u8 operation; 160d0e274afSLorenzo Bianconi __le16 tlv_num; 161d0e274afSLorenzo Bianconi u8 wlan_idx_hi; 162d0e274afSLorenzo Bianconi u8 rsv[3]; 163d0e274afSLorenzo Bianconi } __packed; 164d0e274afSLorenzo Bianconi 165d0e274afSLorenzo Bianconi struct wtbl_generic { 166d0e274afSLorenzo Bianconi __le16 tag; 167d0e274afSLorenzo Bianconi __le16 len; 168d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 169d0e274afSLorenzo Bianconi u8 muar_idx; 170d0e274afSLorenzo Bianconi u8 skip_tx; 171d0e274afSLorenzo Bianconi u8 cf_ack; 172d0e274afSLorenzo Bianconi u8 qos; 173d0e274afSLorenzo Bianconi u8 mesh; 174d0e274afSLorenzo Bianconi u8 adm; 175d0e274afSLorenzo Bianconi __le16 partial_aid; 176d0e274afSLorenzo Bianconi u8 baf_en; 177d0e274afSLorenzo Bianconi u8 aad_om; 178d0e274afSLorenzo Bianconi } __packed; 179d0e274afSLorenzo Bianconi 180d0e274afSLorenzo Bianconi struct wtbl_rx { 181d0e274afSLorenzo Bianconi __le16 tag; 182d0e274afSLorenzo Bianconi __le16 len; 183d0e274afSLorenzo Bianconi u8 rcid; 184d0e274afSLorenzo Bianconi u8 rca1; 185d0e274afSLorenzo Bianconi u8 rca2; 186d0e274afSLorenzo Bianconi u8 rv; 187d0e274afSLorenzo Bianconi u8 rsv[4]; 188d0e274afSLorenzo Bianconi } __packed; 189d0e274afSLorenzo Bianconi 190d0e274afSLorenzo Bianconi struct wtbl_ht { 191d0e274afSLorenzo Bianconi __le16 tag; 192d0e274afSLorenzo Bianconi __le16 len; 193d0e274afSLorenzo Bianconi u8 ht; 194d0e274afSLorenzo Bianconi u8 ldpc; 195d0e274afSLorenzo Bianconi u8 af; 196d0e274afSLorenzo Bianconi u8 mm; 197d0e274afSLorenzo Bianconi u8 rsv[4]; 198d0e274afSLorenzo Bianconi } __packed; 199d0e274afSLorenzo Bianconi 200d0e274afSLorenzo Bianconi struct wtbl_vht { 201d0e274afSLorenzo Bianconi __le16 tag; 202d0e274afSLorenzo Bianconi __le16 len; 203d0e274afSLorenzo Bianconi u8 ldpc; 204d0e274afSLorenzo Bianconi u8 dyn_bw; 205d0e274afSLorenzo Bianconi u8 vht; 206d0e274afSLorenzo Bianconi u8 txop_ps; 207d0e274afSLorenzo Bianconi u8 rsv[4]; 208d0e274afSLorenzo Bianconi } __packed; 209d0e274afSLorenzo Bianconi 210d0e274afSLorenzo Bianconi struct wtbl_tx_ps { 211d0e274afSLorenzo Bianconi __le16 tag; 212d0e274afSLorenzo Bianconi __le16 len; 213d0e274afSLorenzo Bianconi u8 txps; 214d0e274afSLorenzo Bianconi u8 rsv[3]; 215d0e274afSLorenzo Bianconi } __packed; 216d0e274afSLorenzo Bianconi 217d0e274afSLorenzo Bianconi struct wtbl_hdr_trans { 218d0e274afSLorenzo Bianconi __le16 tag; 219d0e274afSLorenzo Bianconi __le16 len; 220d0e274afSLorenzo Bianconi u8 to_ds; 221d0e274afSLorenzo Bianconi u8 from_ds; 222d4b98c63SRyder Lee u8 no_rx_trans; 223d0e274afSLorenzo Bianconi u8 rsv; 224d0e274afSLorenzo Bianconi } __packed; 225d0e274afSLorenzo Bianconi 226d0e274afSLorenzo Bianconi struct wtbl_ba { 227d0e274afSLorenzo Bianconi __le16 tag; 228d0e274afSLorenzo Bianconi __le16 len; 229d0e274afSLorenzo Bianconi /* common */ 230d0e274afSLorenzo Bianconi u8 tid; 231d0e274afSLorenzo Bianconi u8 ba_type; 232d0e274afSLorenzo Bianconi u8 rsv0[2]; 233d0e274afSLorenzo Bianconi /* originator only */ 234d0e274afSLorenzo Bianconi __le16 sn; 235d0e274afSLorenzo Bianconi u8 ba_en; 236d0e274afSLorenzo Bianconi u8 ba_winsize_idx; 237d0e274afSLorenzo Bianconi __le16 ba_winsize; 238d0e274afSLorenzo Bianconi /* recipient only */ 239d0e274afSLorenzo Bianconi u8 peer_addr[ETH_ALEN]; 240d0e274afSLorenzo Bianconi u8 rst_ba_tid; 241d0e274afSLorenzo Bianconi u8 rst_ba_sel; 242d0e274afSLorenzo Bianconi u8 rst_ba_sb; 243d0e274afSLorenzo Bianconi u8 band_idx; 244d0e274afSLorenzo Bianconi u8 rsv1[4]; 245d0e274afSLorenzo Bianconi } __packed; 246d0e274afSLorenzo Bianconi 247d0e274afSLorenzo Bianconi struct wtbl_smps { 248d0e274afSLorenzo Bianconi __le16 tag; 249d0e274afSLorenzo Bianconi __le16 len; 250d0e274afSLorenzo Bianconi u8 smps; 251d0e274afSLorenzo Bianconi u8 rsv[3]; 252d0e274afSLorenzo Bianconi } __packed; 253d0e274afSLorenzo Bianconi 254d0e274afSLorenzo Bianconi /* mt7615 only */ 255d0e274afSLorenzo Bianconi 256d0e274afSLorenzo Bianconi struct wtbl_bf { 257d0e274afSLorenzo Bianconi __le16 tag; 258d0e274afSLorenzo Bianconi __le16 len; 259d0e274afSLorenzo Bianconi u8 ibf; 260d0e274afSLorenzo Bianconi u8 ebf; 261d0e274afSLorenzo Bianconi u8 ibf_vht; 262d0e274afSLorenzo Bianconi u8 ebf_vht; 263d0e274afSLorenzo Bianconi u8 gid; 264d0e274afSLorenzo Bianconi u8 pfmu_idx; 265d0e274afSLorenzo Bianconi u8 rsv[2]; 266d0e274afSLorenzo Bianconi } __packed; 267d0e274afSLorenzo Bianconi 268d0e274afSLorenzo Bianconi struct wtbl_pn { 269d0e274afSLorenzo Bianconi __le16 tag; 270d0e274afSLorenzo Bianconi __le16 len; 271d0e274afSLorenzo Bianconi u8 pn[6]; 272d0e274afSLorenzo Bianconi u8 rsv[2]; 273d0e274afSLorenzo Bianconi } __packed; 274d0e274afSLorenzo Bianconi 275d0e274afSLorenzo Bianconi struct wtbl_spe { 276d0e274afSLorenzo Bianconi __le16 tag; 277d0e274afSLorenzo Bianconi __le16 len; 278d0e274afSLorenzo Bianconi u8 spe_idx; 279d0e274afSLorenzo Bianconi u8 rsv[3]; 280d0e274afSLorenzo Bianconi } __packed; 281d0e274afSLorenzo Bianconi 282d0e274afSLorenzo Bianconi struct wtbl_raw { 283d0e274afSLorenzo Bianconi __le16 tag; 284d0e274afSLorenzo Bianconi __le16 len; 285d0e274afSLorenzo Bianconi u8 wtbl_idx; 286d0e274afSLorenzo Bianconi u8 dw; 287d0e274afSLorenzo Bianconi u8 rsv[2]; 288d0e274afSLorenzo Bianconi __le32 msk; 289d0e274afSLorenzo Bianconi __le32 val; 290d0e274afSLorenzo Bianconi } __packed; 291d0e274afSLorenzo Bianconi 292d0e274afSLorenzo Bianconi #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 293d0e274afSLorenzo Bianconi sizeof(struct wtbl_generic) + \ 294d0e274afSLorenzo Bianconi sizeof(struct wtbl_rx) + \ 295d0e274afSLorenzo Bianconi sizeof(struct wtbl_ht) + \ 296d0e274afSLorenzo Bianconi sizeof(struct wtbl_vht) + \ 297d0e274afSLorenzo Bianconi sizeof(struct wtbl_tx_ps) + \ 298d0e274afSLorenzo Bianconi sizeof(struct wtbl_hdr_trans) +\ 299d0e274afSLorenzo Bianconi sizeof(struct wtbl_ba) + \ 300d0e274afSLorenzo Bianconi sizeof(struct wtbl_bf) + \ 301d0e274afSLorenzo Bianconi sizeof(struct wtbl_smps) + \ 302d0e274afSLorenzo Bianconi sizeof(struct wtbl_pn) + \ 303d0e274afSLorenzo Bianconi sizeof(struct wtbl_spe)) 304d0e274afSLorenzo Bianconi 305d0e274afSLorenzo Bianconi #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 306d0e274afSLorenzo Bianconi sizeof(struct sta_rec_basic) + \ 307d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ht) + \ 308d0e274afSLorenzo Bianconi sizeof(struct sta_rec_he) + \ 309d0e274afSLorenzo Bianconi sizeof(struct sta_rec_ba) + \ 310d0e274afSLorenzo Bianconi sizeof(struct sta_rec_vht) + \ 311d0e274afSLorenzo Bianconi sizeof(struct sta_rec_uapsd) + \ 312d0e274afSLorenzo Bianconi sizeof(struct sta_rec_amsdu) + \ 3135883892bSLorenzo Bianconi sizeof(struct sta_rec_he_6g_capa) + \ 314d0e274afSLorenzo Bianconi sizeof(struct tlv) + \ 315d0e274afSLorenzo Bianconi MT76_CONNAC_WTBL_UPDATE_MAX_SIZE) 316d0e274afSLorenzo Bianconi 317d0e274afSLorenzo Bianconi enum { 318d0e274afSLorenzo Bianconi STA_REC_BASIC, 319d0e274afSLorenzo Bianconi STA_REC_RA, 320d0e274afSLorenzo Bianconi STA_REC_RA_CMM_INFO, 321d0e274afSLorenzo Bianconi STA_REC_RA_UPDATE, 322d0e274afSLorenzo Bianconi STA_REC_BF, 323d0e274afSLorenzo Bianconi STA_REC_AMSDU, 324d0e274afSLorenzo Bianconi STA_REC_BA, 325d0e274afSLorenzo Bianconi STA_REC_STATE, 326d0e274afSLorenzo Bianconi STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 327d0e274afSLorenzo Bianconi STA_REC_HT, 328d0e274afSLorenzo Bianconi STA_REC_VHT, 329d0e274afSLorenzo Bianconi STA_REC_APPS, 330d0e274afSLorenzo Bianconi STA_REC_KEY, 331d0e274afSLorenzo Bianconi STA_REC_WTBL, 332d0e274afSLorenzo Bianconi STA_REC_HE, 333d0e274afSLorenzo Bianconi STA_REC_HW_AMSDU, 334d0e274afSLorenzo Bianconi STA_REC_WTBL_AADOM, 335d0e274afSLorenzo Bianconi STA_REC_KEY_V2, 336d0e274afSLorenzo Bianconi STA_REC_MURU, 337d0e274afSLorenzo Bianconi STA_REC_MUEDCA, 338d0e274afSLorenzo Bianconi STA_REC_BFEE, 339d0e274afSLorenzo Bianconi STA_REC_PHY = 0x15, 3405883892bSLorenzo Bianconi STA_REC_HE_6G = 0x17, 341d0e274afSLorenzo Bianconi STA_REC_MAX_NUM 342d0e274afSLorenzo Bianconi }; 343d0e274afSLorenzo Bianconi 344d0e274afSLorenzo Bianconi enum { 345d0e274afSLorenzo Bianconi WTBL_GENERIC, 346d0e274afSLorenzo Bianconi WTBL_RX, 347d0e274afSLorenzo Bianconi WTBL_HT, 348d0e274afSLorenzo Bianconi WTBL_VHT, 349d0e274afSLorenzo Bianconi WTBL_PEER_PS, /* not used */ 350d0e274afSLorenzo Bianconi WTBL_TX_PS, 351d0e274afSLorenzo Bianconi WTBL_HDR_TRANS, 352d0e274afSLorenzo Bianconi WTBL_SEC_KEY, 353d0e274afSLorenzo Bianconi WTBL_BA, 354d0e274afSLorenzo Bianconi WTBL_RDG, /* obsoleted */ 355d0e274afSLorenzo Bianconi WTBL_PROTECT, /* not used */ 356d0e274afSLorenzo Bianconi WTBL_CLEAR, /* not used */ 357d0e274afSLorenzo Bianconi WTBL_BF, 358d0e274afSLorenzo Bianconi WTBL_SMPS, 359d0e274afSLorenzo Bianconi WTBL_RAW_DATA, /* debug only */ 360d0e274afSLorenzo Bianconi WTBL_PN, 361d0e274afSLorenzo Bianconi WTBL_SPE, 362d0e274afSLorenzo Bianconi WTBL_MAX_NUM 363d0e274afSLorenzo Bianconi }; 364d0e274afSLorenzo Bianconi 365d0e274afSLorenzo Bianconi #define STA_TYPE_STA BIT(0) 366d0e274afSLorenzo Bianconi #define STA_TYPE_AP BIT(1) 367d0e274afSLorenzo Bianconi #define STA_TYPE_ADHOC BIT(2) 368d0e274afSLorenzo Bianconi #define STA_TYPE_WDS BIT(4) 369d0e274afSLorenzo Bianconi #define STA_TYPE_BC BIT(5) 370d0e274afSLorenzo Bianconi 371d0e274afSLorenzo Bianconi #define NETWORK_INFRA BIT(16) 372d0e274afSLorenzo Bianconi #define NETWORK_P2P BIT(17) 373d0e274afSLorenzo Bianconi #define NETWORK_IBSS BIT(18) 374d0e274afSLorenzo Bianconi #define NETWORK_WDS BIT(21) 375d0e274afSLorenzo Bianconi 3764da64fe0SSean Wang #define SCAN_FUNC_RANDOM_MAC BIT(0) 3774da64fe0SSean Wang #define SCAN_FUNC_SPLIT_SCAN BIT(5) 3784da64fe0SSean Wang 379d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 380d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 381d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 382d0e274afSLorenzo Bianconi #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 383d0e274afSLorenzo Bianconi #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 384d0e274afSLorenzo Bianconi #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 385d0e274afSLorenzo Bianconi #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 386d0e274afSLorenzo Bianconi 387d0e274afSLorenzo Bianconi #define CONN_STATE_DISCONNECT 0 388d0e274afSLorenzo Bianconi #define CONN_STATE_CONNECT 1 389d0e274afSLorenzo Bianconi #define CONN_STATE_PORT_SECURE 2 390d0e274afSLorenzo Bianconi 391d0e274afSLorenzo Bianconi /* HE MAC */ 392d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_HTC BIT(0) 393d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BQR BIT(1) 394d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BSR BIT(2) 395d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_OM BIT(3) 396d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4) 397d0e274afSLorenzo Bianconi /* HE PHY */ 398d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_DUAL_BAND BIT(5) 399d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LDPC BIT(6) 400d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7) 401d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8) 402d0e274afSLorenzo Bianconi /* STBC */ 403d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9) 404d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10) 405d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11) 406d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12) 407d0e274afSLorenzo Bianconi /* GI */ 408d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13) 409d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14) 410d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15) 411d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16) 412d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17) 413d0e274afSLorenzo Bianconi /* 242 TONE */ 414d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18) 415d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19) 416d0e274afSLorenzo Bianconi #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20) 417d0e274afSLorenzo Bianconi 418d0e274afSLorenzo Bianconi #define PHY_MODE_A BIT(0) 419d0e274afSLorenzo Bianconi #define PHY_MODE_B BIT(1) 420d0e274afSLorenzo Bianconi #define PHY_MODE_G BIT(2) 421d0e274afSLorenzo Bianconi #define PHY_MODE_GN BIT(3) 422d0e274afSLorenzo Bianconi #define PHY_MODE_AN BIT(4) 423d0e274afSLorenzo Bianconi #define PHY_MODE_AC BIT(5) 424d0e274afSLorenzo Bianconi #define PHY_MODE_AX_24G BIT(6) 425d0e274afSLorenzo Bianconi #define PHY_MODE_AX_5G BIT(7) 426d0e274afSLorenzo Bianconi #define PHY_MODE_AX_6G BIT(8) 427d0e274afSLorenzo Bianconi 428d0e274afSLorenzo Bianconi #define MODE_CCK BIT(0) 429d0e274afSLorenzo Bianconi #define MODE_OFDM BIT(1) 430d0e274afSLorenzo Bianconi #define MODE_HT BIT(2) 431d0e274afSLorenzo Bianconi #define MODE_VHT BIT(3) 432d0e274afSLorenzo Bianconi #define MODE_HE BIT(4) 433d0e274afSLorenzo Bianconi 434d0e274afSLorenzo Bianconi enum { 435d0e274afSLorenzo Bianconi PHY_TYPE_HR_DSSS_INDEX = 0, 436d0e274afSLorenzo Bianconi PHY_TYPE_ERP_INDEX, 437d0e274afSLorenzo Bianconi PHY_TYPE_ERP_P2P_INDEX, 438d0e274afSLorenzo Bianconi PHY_TYPE_OFDM_INDEX, 439d0e274afSLorenzo Bianconi PHY_TYPE_HT_INDEX, 440d0e274afSLorenzo Bianconi PHY_TYPE_VHT_INDEX, 441d0e274afSLorenzo Bianconi PHY_TYPE_HE_INDEX, 442d0e274afSLorenzo Bianconi PHY_TYPE_INDEX_NUM 443d0e274afSLorenzo Bianconi }; 444d0e274afSLorenzo Bianconi 445d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 446d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX) 447d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX) 448d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX) 449d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX) 450d0e274afSLorenzo Bianconi #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX) 451d0e274afSLorenzo Bianconi 452d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6) 453d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_MCS GENMASK(5, 0) 454d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_NSS GENMASK(12, 10) 455d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_HE_GI GENMASK(7, 4) 456d0e274afSLorenzo Bianconi #define MT_WTBL_RATE_GI GENMASK(3, 0) 457d0e274afSLorenzo Bianconi 458d0e274afSLorenzo Bianconi #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5) 459d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_20 BIT(8) 460d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_40 BIT(9) 461d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_80 BIT(10) 462d0e274afSLorenzo Bianconi #define MT_WTBL_W5_SHORT_GI_160 BIT(11) 463d0e274afSLorenzo Bianconi #define MT_WTBL_W5_BW_CAP GENMASK(13, 12) 464d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23) 465d0e274afSLorenzo Bianconi #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26) 466d0e274afSLorenzo Bianconi #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29) 467d0e274afSLorenzo Bianconi 468d0e274afSLorenzo Bianconi enum { 469d0e274afSLorenzo Bianconi WTBL_RESET_AND_SET = 1, 470d0e274afSLorenzo Bianconi WTBL_SET, 471d0e274afSLorenzo Bianconi WTBL_QUERY, 472d0e274afSLorenzo Bianconi WTBL_RESET_ALL 473d0e274afSLorenzo Bianconi }; 474d0e274afSLorenzo Bianconi 475d0e274afSLorenzo Bianconi enum { 476d0e274afSLorenzo Bianconi MT_BA_TYPE_INVALID, 477d0e274afSLorenzo Bianconi MT_BA_TYPE_ORIGINATOR, 478d0e274afSLorenzo Bianconi MT_BA_TYPE_RECIPIENT 479d0e274afSLorenzo Bianconi }; 480d0e274afSLorenzo Bianconi 481d0e274afSLorenzo Bianconi enum { 482d0e274afSLorenzo Bianconi RST_BA_MAC_TID_MATCH, 483d0e274afSLorenzo Bianconi RST_BA_MAC_MATCH, 484d0e274afSLorenzo Bianconi RST_BA_NO_MATCH 485d0e274afSLorenzo Bianconi }; 486d0e274afSLorenzo Bianconi 487d0e274afSLorenzo Bianconi enum { 488d0e274afSLorenzo Bianconi DEV_INFO_ACTIVE, 489d0e274afSLorenzo Bianconi DEV_INFO_MAX_NUM 490d0e274afSLorenzo Bianconi }; 491d0e274afSLorenzo Bianconi 492d0e274afSLorenzo Bianconi #define MCU_CMD_ACK BIT(0) 493d0e274afSLorenzo Bianconi #define MCU_CMD_UNI BIT(1) 494d0e274afSLorenzo Bianconi #define MCU_CMD_QUERY BIT(2) 495d0e274afSLorenzo Bianconi 496d0e274afSLorenzo Bianconi #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \ 497d0e274afSLorenzo Bianconi MCU_CMD_QUERY) 498d0e274afSLorenzo Bianconi 499d0e274afSLorenzo Bianconi #define MCU_FW_PREFIX BIT(31) 500d0e274afSLorenzo Bianconi #define MCU_UNI_PREFIX BIT(30) 501d0e274afSLorenzo Bianconi #define MCU_CE_PREFIX BIT(29) 502d0e274afSLorenzo Bianconi #define MCU_QUERY_PREFIX BIT(28) 503d0e274afSLorenzo Bianconi #define MCU_CMD_MASK ~(MCU_FW_PREFIX | MCU_UNI_PREFIX | \ 504d0e274afSLorenzo Bianconi MCU_CE_PREFIX | MCU_QUERY_PREFIX) 505d0e274afSLorenzo Bianconi 506d0e274afSLorenzo Bianconi #define MCU_QUERY_MASK BIT(16) 507d0e274afSLorenzo Bianconi 508d0e274afSLorenzo Bianconi enum { 509d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_ACCESS = 0x01, 510d0e274afSLorenzo Bianconi MCU_EXT_CMD_RF_REG_ACCESS = 0x02, 511d0e274afSLorenzo Bianconi MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 512d0e274afSLorenzo Bianconi MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 513d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, 514d0e274afSLorenzo Bianconi MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, 515d0e274afSLorenzo Bianconi MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 516d0e274afSLorenzo Bianconi MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 517d0e274afSLorenzo Bianconi MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 518d0e274afSLorenzo Bianconi MCU_EXT_CMD_EDCA_UPDATE = 0x27, 519d0e274afSLorenzo Bianconi MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 520d0e274afSLorenzo Bianconi MCU_EXT_CMD_GET_TEMP = 0x2c, 521d0e274afSLorenzo Bianconi MCU_EXT_CMD_WTBL_UPDATE = 0x32, 522d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, 523d0e274afSLorenzo Bianconi MCU_EXT_CMD_ATE_CTRL = 0x3d, 524d0e274afSLorenzo Bianconi MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 525d0e274afSLorenzo Bianconi MCU_EXT_CMD_DBDC_CTRL = 0x45, 526d0e274afSLorenzo Bianconi MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 527d0e274afSLorenzo Bianconi MCU_EXT_CMD_RX_HDR_TRANS = 0x47, 528d0e274afSLorenzo Bianconi MCU_EXT_CMD_MUAR_UPDATE = 0x48, 529d0e274afSLorenzo Bianconi MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 530d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RX_PATH = 0x4e, 531d0e274afSLorenzo Bianconi MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 532d0e274afSLorenzo Bianconi MCU_EXT_CMD_RXDCOC_CAL = 0x59, 533d0e274afSLorenzo Bianconi MCU_EXT_CMD_TXDPD_CAL = 0x60, 534*03a25c01SRyder Lee MCU_EXT_CMD_CAL_CACHE = 0x67, 535d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_TH = 0x7c, 536d0e274afSLorenzo Bianconi MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 537d0e274afSLorenzo Bianconi }; 538d0e274afSLorenzo Bianconi 539d0e274afSLorenzo Bianconi enum { 540d0e274afSLorenzo Bianconi MCU_UNI_CMD_DEV_INFO_UPDATE = MCU_UNI_PREFIX | 0x01, 541d0e274afSLorenzo Bianconi MCU_UNI_CMD_BSS_INFO_UPDATE = MCU_UNI_PREFIX | 0x02, 542d0e274afSLorenzo Bianconi MCU_UNI_CMD_STA_REC_UPDATE = MCU_UNI_PREFIX | 0x03, 543d0e274afSLorenzo Bianconi MCU_UNI_CMD_SUSPEND = MCU_UNI_PREFIX | 0x05, 544d0e274afSLorenzo Bianconi MCU_UNI_CMD_OFFLOAD = MCU_UNI_PREFIX | 0x06, 545d0e274afSLorenzo Bianconi MCU_UNI_CMD_HIF_CTRL = MCU_UNI_PREFIX | 0x07, 546d0e274afSLorenzo Bianconi }; 547d0e274afSLorenzo Bianconi 548d0e274afSLorenzo Bianconi enum { 549d0e274afSLorenzo Bianconi MCU_CMD_TARGET_ADDRESS_LEN_REQ = MCU_FW_PREFIX | 0x01, 550d0e274afSLorenzo Bianconi MCU_CMD_FW_START_REQ = MCU_FW_PREFIX | 0x02, 551d0e274afSLorenzo Bianconi MCU_CMD_INIT_ACCESS_REG = 0x3, 552d0e274afSLorenzo Bianconi MCU_CMD_NIC_POWER_CTRL = MCU_FW_PREFIX | 0x4, 553d0e274afSLorenzo Bianconi MCU_CMD_PATCH_START_REQ = MCU_FW_PREFIX | 0x05, 554d0e274afSLorenzo Bianconi MCU_CMD_PATCH_FINISH_REQ = MCU_FW_PREFIX | 0x07, 555d0e274afSLorenzo Bianconi MCU_CMD_PATCH_SEM_CONTROL = MCU_FW_PREFIX | 0x10, 556d0e274afSLorenzo Bianconi MCU_CMD_EXT_CID = 0xed, 557d0e274afSLorenzo Bianconi MCU_CMD_FW_SCATTER = MCU_FW_PREFIX | 0xee, 558d0e274afSLorenzo Bianconi MCU_CMD_RESTART_DL_REQ = MCU_FW_PREFIX | 0xef, 559d0e274afSLorenzo Bianconi }; 560d0e274afSLorenzo Bianconi 561d0e274afSLorenzo Bianconi /* offload mcu commands */ 562d0e274afSLorenzo Bianconi enum { 563bce84458SLorenzo Bianconi MCU_CMD_TEST_CTRL = MCU_CE_PREFIX | 0x01, 564d0e274afSLorenzo Bianconi MCU_CMD_START_HW_SCAN = MCU_CE_PREFIX | 0x03, 565d0e274afSLorenzo Bianconi MCU_CMD_SET_PS_PROFILE = MCU_CE_PREFIX | 0x05, 566d0e274afSLorenzo Bianconi MCU_CMD_SET_CHAN_DOMAIN = MCU_CE_PREFIX | 0x0f, 567d0e274afSLorenzo Bianconi MCU_CMD_SET_BSS_CONNECTED = MCU_CE_PREFIX | 0x16, 568d0e274afSLorenzo Bianconi MCU_CMD_SET_BSS_ABORT = MCU_CE_PREFIX | 0x17, 569d0e274afSLorenzo Bianconi MCU_CMD_CANCEL_HW_SCAN = MCU_CE_PREFIX | 0x1b, 570d0e274afSLorenzo Bianconi MCU_CMD_SET_ROC = MCU_CE_PREFIX | 0x1d, 571d0e274afSLorenzo Bianconi MCU_CMD_SET_P2P_OPPPS = MCU_CE_PREFIX | 0x33, 572d0e274afSLorenzo Bianconi MCU_CMD_SET_RATE_TX_POWER = MCU_CE_PREFIX | 0x5d, 573d0e274afSLorenzo Bianconi MCU_CMD_SCHED_SCAN_ENABLE = MCU_CE_PREFIX | 0x61, 574d0e274afSLorenzo Bianconi MCU_CMD_SCHED_SCAN_REQ = MCU_CE_PREFIX | 0x62, 575f7d2958cSLorenzo Bianconi MCU_CMD_GET_NIC_CAPAB = MCU_CE_PREFIX | 0x8a, 576bb0ae4cfSSean Wang MCU_CMD_SET_MU_EDCA_PARMS = MCU_CE_PREFIX | 0xb0, 577d0e274afSLorenzo Bianconi MCU_CMD_REG_WRITE = MCU_CE_PREFIX | 0xc0, 578d0e274afSLorenzo Bianconi MCU_CMD_REG_READ = MCU_CE_PREFIX | MCU_QUERY_MASK | 0xc0, 5790da3c795SSean Wang MCU_CMD_CHIP_CONFIG = MCU_CE_PREFIX | 0xca, 58067aa2743SLorenzo Bianconi MCU_CMD_FWLOG_2_HOST = MCU_CE_PREFIX | 0xc5, 58167aa2743SLorenzo Bianconi MCU_CMD_GET_WTBL = MCU_CE_PREFIX | 0xcd, 582ea29acc9SSean Wang MCU_CMD_GET_TXPWR = MCU_CE_PREFIX | 0xd0, 583d0e274afSLorenzo Bianconi }; 584d0e274afSLorenzo Bianconi 585d0e274afSLorenzo Bianconi enum { 586d0e274afSLorenzo Bianconi PATCH_SEM_RELEASE, 587d0e274afSLorenzo Bianconi PATCH_SEM_GET 588d0e274afSLorenzo Bianconi }; 589d0e274afSLorenzo Bianconi 590d0e274afSLorenzo Bianconi enum { 591d0e274afSLorenzo Bianconi UNI_BSS_INFO_BASIC = 0, 592d0e274afSLorenzo Bianconi UNI_BSS_INFO_RLM = 2, 593b4b880b9SYN Chen UNI_BSS_INFO_BSS_COLOR = 4, 594d0e274afSLorenzo Bianconi UNI_BSS_INFO_HE_BASIC = 5, 595d0e274afSLorenzo Bianconi UNI_BSS_INFO_BCN_CONTENT = 7, 596d0e274afSLorenzo Bianconi UNI_BSS_INFO_QBSS = 15, 597d0e274afSLorenzo Bianconi UNI_BSS_INFO_UAPSD = 19, 59867aa2743SLorenzo Bianconi UNI_BSS_INFO_PS = 21, 59967aa2743SLorenzo Bianconi UNI_BSS_INFO_BCNFT = 22, 600d0e274afSLorenzo Bianconi }; 601d0e274afSLorenzo Bianconi 60255d4c19cSLorenzo Bianconi enum { 60355d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ARP, 60455d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_ND, 60555d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_GTK_REKEY, 60655d4c19cSLorenzo Bianconi UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT, 60755d4c19cSLorenzo Bianconi }; 60855d4c19cSLorenzo Bianconi 609f7d2958cSLorenzo Bianconi enum { 610f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_RESOURCE, 611f7d2958cSLorenzo Bianconi MT_NIC_CAP_TX_EFUSE_ADDR, 612f7d2958cSLorenzo Bianconi MT_NIC_CAP_COEX, 613f7d2958cSLorenzo Bianconi MT_NIC_CAP_SINGLE_SKU, 614f7d2958cSLorenzo Bianconi MT_NIC_CAP_CSUM_OFFLOAD, 615f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_VER, 616f7d2958cSLorenzo Bianconi MT_NIC_CAP_SW_VER, 617f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC_ADDR, 618f7d2958cSLorenzo Bianconi MT_NIC_CAP_PHY, 619f7d2958cSLorenzo Bianconi MT_NIC_CAP_MAC, 620f7d2958cSLorenzo Bianconi MT_NIC_CAP_FRAME_BUF, 621f7d2958cSLorenzo Bianconi MT_NIC_CAP_BEAM_FORM, 622f7d2958cSLorenzo Bianconi MT_NIC_CAP_LOCATION, 623f7d2958cSLorenzo Bianconi MT_NIC_CAP_MUMIMO, 624f7d2958cSLorenzo Bianconi MT_NIC_CAP_BUFFER_MODE_INFO, 625f7d2958cSLorenzo Bianconi MT_NIC_CAP_HW_ADIE_VERSION = 0x14, 626f7d2958cSLorenzo Bianconi MT_NIC_CAP_ANTSWP = 0x16, 627f7d2958cSLorenzo Bianconi MT_NIC_CAP_WFDMA_REALLOC, 628f7d2958cSLorenzo Bianconi MT_NIC_CAP_6G, 629f7d2958cSLorenzo Bianconi }; 630f7d2958cSLorenzo Bianconi 631193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0) 632193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_ANY BIT(1) 633193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2) 634193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3) 635193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4) 636193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5) 637193e5f22SYN Chen #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6) 638193e5f22SYN Chen 63955d4c19cSLorenzo Bianconi enum { 64055d4c19cSLorenzo Bianconi UNI_SUSPEND_MODE_SETTING, 64155d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_CTRL, 64255d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_GPIO_PARAM, 64355d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_WAKEUP_PORT, 64455d4c19cSLorenzo Bianconi UNI_SUSPEND_WOW_PATTERN, 64555d4c19cSLorenzo Bianconi }; 64655d4c19cSLorenzo Bianconi 64755d4c19cSLorenzo Bianconi enum { 64855d4c19cSLorenzo Bianconi WOW_USB = 1, 64955d4c19cSLorenzo Bianconi WOW_PCIE = 2, 65055d4c19cSLorenzo Bianconi WOW_GPIO = 3, 65155d4c19cSLorenzo Bianconi }; 65255d4c19cSLorenzo Bianconi 653d0e274afSLorenzo Bianconi struct mt76_connac_bss_basic_tlv { 654d0e274afSLorenzo Bianconi __le16 tag; 655d0e274afSLorenzo Bianconi __le16 len; 656d0e274afSLorenzo Bianconi u8 active; 657d0e274afSLorenzo Bianconi u8 omac_idx; 658d0e274afSLorenzo Bianconi u8 hw_bss_idx; 659d0e274afSLorenzo Bianconi u8 band_idx; 660d0e274afSLorenzo Bianconi __le32 conn_type; 661d0e274afSLorenzo Bianconi u8 conn_state; 662d0e274afSLorenzo Bianconi u8 wmm_idx; 663d0e274afSLorenzo Bianconi u8 bssid[ETH_ALEN]; 664d0e274afSLorenzo Bianconi __le16 bmc_tx_wlan_idx; 665d0e274afSLorenzo Bianconi __le16 bcn_interval; 666d0e274afSLorenzo Bianconi u8 dtim_period; 667d0e274afSLorenzo Bianconi u8 phymode; /* bit(0): A 668d0e274afSLorenzo Bianconi * bit(1): B 669d0e274afSLorenzo Bianconi * bit(2): G 670d0e274afSLorenzo Bianconi * bit(3): GN 671d0e274afSLorenzo Bianconi * bit(4): AN 672d0e274afSLorenzo Bianconi * bit(5): AC 6733cf3e01bSLorenzo Bianconi * bit(6): AX2 6743cf3e01bSLorenzo Bianconi * bit(7): AX5 6753cf3e01bSLorenzo Bianconi * bit(8): AX6 676d0e274afSLorenzo Bianconi */ 677d0e274afSLorenzo Bianconi __le16 sta_idx; 6783cf3e01bSLorenzo Bianconi __le16 nonht_basic_phy; 6793cf3e01bSLorenzo Bianconi u8 phymode_ext; /* bit(0) AX_6G */ 6803cf3e01bSLorenzo Bianconi u8 pad[1]; 681d0e274afSLorenzo Bianconi } __packed; 682d0e274afSLorenzo Bianconi 683d0e274afSLorenzo Bianconi struct mt76_connac_bss_qos_tlv { 684d0e274afSLorenzo Bianconi __le16 tag; 685d0e274afSLorenzo Bianconi __le16 len; 686d0e274afSLorenzo Bianconi u8 qos; 687d0e274afSLorenzo Bianconi u8 pad[3]; 688d0e274afSLorenzo Bianconi } __packed; 689d0e274afSLorenzo Bianconi 690d0e274afSLorenzo Bianconi struct mt76_connac_beacon_loss_event { 691d0e274afSLorenzo Bianconi u8 bss_idx; 692d0e274afSLorenzo Bianconi u8 reason; 693d0e274afSLorenzo Bianconi u8 pad[2]; 694d0e274afSLorenzo Bianconi } __packed; 695d0e274afSLorenzo Bianconi 696d0e274afSLorenzo Bianconi struct mt76_connac_mcu_bss_event { 697d0e274afSLorenzo Bianconi u8 bss_idx; 698d0e274afSLorenzo Bianconi u8 is_absent; 699d0e274afSLorenzo Bianconi u8 free_quota; 700d0e274afSLorenzo Bianconi u8 pad; 701d0e274afSLorenzo Bianconi } __packed; 702d0e274afSLorenzo Bianconi 703399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid { 704399090efSLorenzo Bianconi __le32 ssid_len; 705399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 706399090efSLorenzo Bianconi } __packed; 707399090efSLorenzo Bianconi 708399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel { 709399090efSLorenzo Bianconi u8 band; /* 1: 2.4GHz 710399090efSLorenzo Bianconi * 2: 5.0GHz 711399090efSLorenzo Bianconi * Others: Reserved 712399090efSLorenzo Bianconi */ 713399090efSLorenzo Bianconi u8 channel_num; 714399090efSLorenzo Bianconi } __packed; 715399090efSLorenzo Bianconi 716399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match { 717399090efSLorenzo Bianconi __le32 rssi_th; 718399090efSLorenzo Bianconi u8 ssid[IEEE80211_MAX_SSID_LEN]; 719399090efSLorenzo Bianconi u8 ssid_len; 720399090efSLorenzo Bianconi u8 rsv[3]; 721399090efSLorenzo Bianconi } __packed; 722399090efSLorenzo Bianconi 723399090efSLorenzo Bianconi struct mt76_connac_hw_scan_req { 724399090efSLorenzo Bianconi u8 seq_num; 725399090efSLorenzo Bianconi u8 bss_idx; 726399090efSLorenzo Bianconi u8 scan_type; /* 0: PASSIVE SCAN 727399090efSLorenzo Bianconi * 1: ACTIVE SCAN 728399090efSLorenzo Bianconi */ 729399090efSLorenzo Bianconi u8 ssid_type; /* BIT(0) wildcard SSID 730399090efSLorenzo Bianconi * BIT(1) P2P wildcard SSID 731399090efSLorenzo Bianconi * BIT(2) specified SSID + wildcard SSID 732399090efSLorenzo Bianconi * BIT(2) + ssid_type_ext BIT(0) specified SSID only 733399090efSLorenzo Bianconi */ 734399090efSLorenzo Bianconi u8 ssids_num; 735399090efSLorenzo Bianconi u8 probe_req_num; /* Number of probe request for each SSID */ 736399090efSLorenzo Bianconi u8 scan_func; /* BIT(0) Enable random MAC scan 737399090efSLorenzo Bianconi * BIT(1) Disable DBDC scan type 1~3. 738399090efSLorenzo Bianconi * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan). 739399090efSLorenzo Bianconi */ 740399090efSLorenzo Bianconi u8 version; /* 0: Not support fields after ies. 741399090efSLorenzo Bianconi * 1: Support fields after ies. 742399090efSLorenzo Bianconi */ 743399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[4]; 744399090efSLorenzo Bianconi __le16 probe_delay_time; 745399090efSLorenzo Bianconi __le16 channel_dwell_time; /* channel Dwell interval */ 746399090efSLorenzo Bianconi __le16 timeout_value; 747399090efSLorenzo Bianconi u8 channel_type; /* 0: Full channels 748399090efSLorenzo Bianconi * 1: Only 2.4GHz channels 749399090efSLorenzo Bianconi * 2: Only 5GHz channels 750399090efSLorenzo Bianconi * 3: P2P social channel only (channel #1, #6 and #11) 751399090efSLorenzo Bianconi * 4: Specified channels 752399090efSLorenzo Bianconi * Others: Reserved 753399090efSLorenzo Bianconi */ 754399090efSLorenzo Bianconi u8 channels_num; /* valid when channel_type is 4 */ 755399090efSLorenzo Bianconi /* valid when channels_num is set */ 756399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[32]; 757399090efSLorenzo Bianconi __le16 ies_len; 758399090efSLorenzo Bianconi u8 ies[MT76_CONNAC_SCAN_IE_LEN]; 759399090efSLorenzo Bianconi /* following fields are valid if version > 0 */ 760399090efSLorenzo Bianconi u8 ext_channels_num; 761399090efSLorenzo Bianconi u8 ext_ssids_num; 762399090efSLorenzo Bianconi __le16 channel_min_dwell_time; 763399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel ext_channels[32]; 764399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ext_ssids[6]; 765399090efSLorenzo Bianconi u8 bssid[ETH_ALEN]; 766399090efSLorenzo Bianconi u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */ 767399090efSLorenzo Bianconi u8 pad[63]; 768399090efSLorenzo Bianconi u8 ssid_type_ext; 769399090efSLorenzo Bianconi } __packed; 770399090efSLorenzo Bianconi 771399090efSLorenzo Bianconi #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64 772399090efSLorenzo Bianconi 773399090efSLorenzo Bianconi struct mt76_connac_hw_scan_done { 774399090efSLorenzo Bianconi u8 seq_num; 775399090efSLorenzo Bianconi u8 sparse_channel_num; 776399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel sparse_channel; 777399090efSLorenzo Bianconi u8 complete_channel_num; 778399090efSLorenzo Bianconi u8 current_state; 779399090efSLorenzo Bianconi u8 version; 780399090efSLorenzo Bianconi u8 pad; 781399090efSLorenzo Bianconi __le32 beacon_scan_num; 782399090efSLorenzo Bianconi u8 pno_enabled; 783399090efSLorenzo Bianconi u8 pad2[3]; 784399090efSLorenzo Bianconi u8 sparse_channel_valid_num; 785399090efSLorenzo Bianconi u8 pad3[3]; 786399090efSLorenzo Bianconi u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 787399090efSLorenzo Bianconi /* idle format for channel_idle_time 788399090efSLorenzo Bianconi * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms) 789399090efSLorenzo Bianconi * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms) 790399090efSLorenzo Bianconi * 2: dwell time (16us) 791399090efSLorenzo Bianconi */ 792399090efSLorenzo Bianconi __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 793399090efSLorenzo Bianconi /* beacon and probe response count */ 794399090efSLorenzo Bianconi u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 795399090efSLorenzo Bianconi u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM]; 796399090efSLorenzo Bianconi __le32 beacon_2g_num; 797399090efSLorenzo Bianconi __le32 beacon_5g_num; 798399090efSLorenzo Bianconi } __packed; 799399090efSLorenzo Bianconi 800399090efSLorenzo Bianconi struct mt76_connac_sched_scan_req { 801399090efSLorenzo Bianconi u8 version; 802399090efSLorenzo Bianconi u8 seq_num; 803399090efSLorenzo Bianconi u8 stop_on_match; 804399090efSLorenzo Bianconi u8 ssids_num; 805399090efSLorenzo Bianconi u8 match_num; 806399090efSLorenzo Bianconi u8 pad; 807399090efSLorenzo Bianconi __le16 ie_len; 808399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID]; 809399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH]; 810399090efSLorenzo Bianconi u8 channel_type; 811399090efSLorenzo Bianconi u8 channels_num; 812399090efSLorenzo Bianconi u8 intervals_num; 8137139b5c0SSean Wang u8 scan_func; /* MT7663: BIT(0) eable random mac address */ 814399090efSLorenzo Bianconi struct mt76_connac_mcu_scan_channel channels[64]; 815abded041SSean Wang __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL]; 8167139b5c0SSean Wang union { 8177139b5c0SSean Wang struct { 8187139b5c0SSean Wang u8 random_mac[ETH_ALEN]; 819399090efSLorenzo Bianconi u8 pad2[58]; 8207139b5c0SSean Wang } mt7663; 8217139b5c0SSean Wang struct { 8227139b5c0SSean Wang u8 bss_idx; 823b94c0ed6SDeren Wu u8 pad1[3]; 824b94c0ed6SDeren Wu __le32 delay; 825b94c0ed6SDeren Wu u8 pad2[12]; 8269f367c81SDeren Wu u8 random_mac[ETH_ALEN]; 8279f367c81SDeren Wu u8 pad3[38]; 8287139b5c0SSean Wang } mt7921; 8297139b5c0SSean Wang }; 830399090efSLorenzo Bianconi } __packed; 831399090efSLorenzo Bianconi 832399090efSLorenzo Bianconi struct mt76_connac_sched_scan_done { 833399090efSLorenzo Bianconi u8 seq_num; 834399090efSLorenzo Bianconi u8 status; /* 0: ssid found */ 835399090efSLorenzo Bianconi __le16 pad; 836399090efSLorenzo Bianconi } __packed; 837399090efSLorenzo Bianconi 838b4b880b9SYN Chen struct bss_info_uni_bss_color { 839b4b880b9SYN Chen __le16 tag; 840b4b880b9SYN Chen __le16 len; 841b4b880b9SYN Chen u8 enable; 842b4b880b9SYN Chen u8 bss_color; 843b4b880b9SYN Chen u8 rsv[2]; 844b4b880b9SYN Chen } __packed; 845b4b880b9SYN Chen 846d0e274afSLorenzo Bianconi struct bss_info_uni_he { 847d0e274afSLorenzo Bianconi __le16 tag; 848d0e274afSLorenzo Bianconi __le16 len; 849d0e274afSLorenzo Bianconi __le16 he_rts_thres; 850d0e274afSLorenzo Bianconi u8 he_pe_duration; 851d0e274afSLorenzo Bianconi u8 su_disable; 852d0e274afSLorenzo Bianconi __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM]; 853d0e274afSLorenzo Bianconi u8 rsv[2]; 854d0e274afSLorenzo Bianconi } __packed; 855d0e274afSLorenzo Bianconi 85655d4c19cSLorenzo Bianconi struct mt76_connac_gtk_rekey_tlv { 85755d4c19cSLorenzo Bianconi __le16 tag; 85855d4c19cSLorenzo Bianconi __le16 len; 85955d4c19cSLorenzo Bianconi u8 kek[NL80211_KEK_LEN]; 86055d4c19cSLorenzo Bianconi u8 kck[NL80211_KCK_LEN]; 86155d4c19cSLorenzo Bianconi u8 replay_ctr[NL80211_REPLAY_CTR_LEN]; 86255d4c19cSLorenzo Bianconi u8 rekey_mode; /* 0: rekey offload enable 86355d4c19cSLorenzo Bianconi * 1: rekey offload disable 86455d4c19cSLorenzo Bianconi * 2: rekey update 86555d4c19cSLorenzo Bianconi */ 86655d4c19cSLorenzo Bianconi u8 keyid; 867d741abeaSLeon Yen u8 option; /* 1: rekey data update without enabling offload */ 868d741abeaSLeon Yen u8 pad[1]; 86955d4c19cSLorenzo Bianconi __le32 proto; /* WPA-RSN-WAPI-OPSN */ 87055d4c19cSLorenzo Bianconi __le32 pairwise_cipher; 87155d4c19cSLorenzo Bianconi __le32 group_cipher; 87255d4c19cSLorenzo Bianconi __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */ 87355d4c19cSLorenzo Bianconi __le32 mgmt_group_cipher; 874d741abeaSLeon Yen u8 reserverd[4]; 87555d4c19cSLorenzo Bianconi } __packed; 87655d4c19cSLorenzo Bianconi 87755d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_MASK_MAX_LEN 16 87855d4c19cSLorenzo Bianconi #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128 87955d4c19cSLorenzo Bianconi 88055d4c19cSLorenzo Bianconi struct mt76_connac_wow_pattern_tlv { 88155d4c19cSLorenzo Bianconi __le16 tag; 88255d4c19cSLorenzo Bianconi __le16 len; 88355d4c19cSLorenzo Bianconi u8 index; /* pattern index */ 88455d4c19cSLorenzo Bianconi u8 enable; /* 0: disable 88555d4c19cSLorenzo Bianconi * 1: enable 88655d4c19cSLorenzo Bianconi */ 88755d4c19cSLorenzo Bianconi u8 data_len; /* pattern length */ 88855d4c19cSLorenzo Bianconi u8 pad; 88955d4c19cSLorenzo Bianconi u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN]; 89055d4c19cSLorenzo Bianconi u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN]; 89155d4c19cSLorenzo Bianconi u8 rsv[4]; 89255d4c19cSLorenzo Bianconi } __packed; 89355d4c19cSLorenzo Bianconi 89455d4c19cSLorenzo Bianconi struct mt76_connac_wow_ctrl_tlv { 89555d4c19cSLorenzo Bianconi __le16 tag; 89655d4c19cSLorenzo Bianconi __le16 len; 89755d4c19cSLorenzo Bianconi u8 cmd; /* 0x1: PM_WOWLAN_REQ_START 89855d4c19cSLorenzo Bianconi * 0x2: PM_WOWLAN_REQ_STOP 89955d4c19cSLorenzo Bianconi * 0x3: PM_WOWLAN_PARAM_CLEAR 90055d4c19cSLorenzo Bianconi */ 90155d4c19cSLorenzo Bianconi u8 trigger; /* 0: NONE 90255d4c19cSLorenzo Bianconi * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT 90355d4c19cSLorenzo Bianconi * BIT(1): NL80211_WOWLAN_TRIG_ANY 90455d4c19cSLorenzo Bianconi * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT 90555d4c19cSLorenzo Bianconi * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE 90655d4c19cSLorenzo Bianconi * BIT(4): BEACON_LOST 90755d4c19cSLorenzo Bianconi * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT 90855d4c19cSLorenzo Bianconi */ 90955d4c19cSLorenzo Bianconi u8 wakeup_hif; /* 0x0: HIF_SDIO 91055d4c19cSLorenzo Bianconi * 0x1: HIF_USB 91155d4c19cSLorenzo Bianconi * 0x2: HIF_PCIE 91255d4c19cSLorenzo Bianconi * 0x3: HIF_GPIO 91355d4c19cSLorenzo Bianconi */ 91455d4c19cSLorenzo Bianconi u8 pad; 91555d4c19cSLorenzo Bianconi u8 rsv[4]; 91655d4c19cSLorenzo Bianconi } __packed; 91755d4c19cSLorenzo Bianconi 91855d4c19cSLorenzo Bianconi struct mt76_connac_wow_gpio_param_tlv { 91955d4c19cSLorenzo Bianconi __le16 tag; 92055d4c19cSLorenzo Bianconi __le16 len; 92155d4c19cSLorenzo Bianconi u8 gpio_pin; 92255d4c19cSLorenzo Bianconi u8 trigger_lvl; 92355d4c19cSLorenzo Bianconi u8 pad[2]; 92455d4c19cSLorenzo Bianconi __le32 gpio_interval; 92555d4c19cSLorenzo Bianconi u8 rsv[4]; 92655d4c19cSLorenzo Bianconi } __packed; 92755d4c19cSLorenzo Bianconi 92855d4c19cSLorenzo Bianconi struct mt76_connac_arpns_tlv { 92955d4c19cSLorenzo Bianconi __le16 tag; 93055d4c19cSLorenzo Bianconi __le16 len; 93155d4c19cSLorenzo Bianconi u8 mode; 93255d4c19cSLorenzo Bianconi u8 ips_num; 93355d4c19cSLorenzo Bianconi u8 option; 93455d4c19cSLorenzo Bianconi u8 pad[1]; 93555d4c19cSLorenzo Bianconi } __packed; 93655d4c19cSLorenzo Bianconi 93755d4c19cSLorenzo Bianconi struct mt76_connac_suspend_tlv { 93855d4c19cSLorenzo Bianconi __le16 tag; 93955d4c19cSLorenzo Bianconi __le16 len; 94055d4c19cSLorenzo Bianconi u8 enable; /* 0: suspend mode disabled 94155d4c19cSLorenzo Bianconi * 1: suspend mode enabled 94255d4c19cSLorenzo Bianconi */ 94355d4c19cSLorenzo Bianconi u8 mdtim; /* LP parameter */ 94455d4c19cSLorenzo Bianconi u8 wow_suspend; /* 0: update by origin policy 94555d4c19cSLorenzo Bianconi * 1: update by wow dtim 94655d4c19cSLorenzo Bianconi */ 94755d4c19cSLorenzo Bianconi u8 pad[5]; 94855d4c19cSLorenzo Bianconi } __packed; 94955d4c19cSLorenzo Bianconi 950f5056657SSean Wang enum mt76_sta_info_state { 951f5056657SSean Wang MT76_STA_INFO_STATE_NONE, 952f5056657SSean Wang MT76_STA_INFO_STATE_AUTH, 953f5056657SSean Wang MT76_STA_INFO_STATE_ASSOC 954f5056657SSean Wang }; 955f5056657SSean Wang 9565802106fSLorenzo Bianconi struct mt76_sta_cmd_info { 9575802106fSLorenzo Bianconi struct ieee80211_sta *sta; 9585802106fSLorenzo Bianconi struct mt76_wcid *wcid; 9595802106fSLorenzo Bianconi 9605802106fSLorenzo Bianconi struct ieee80211_vif *vif; 9615802106fSLorenzo Bianconi 96282453b1cSLorenzo Bianconi bool offload_fw; 9635802106fSLorenzo Bianconi bool enable; 964f5056657SSean Wang bool newly; 9655802106fSLorenzo Bianconi int cmd; 9665802106fSLorenzo Bianconi u8 rcpi; 967f5056657SSean Wang u8 state; 9685802106fSLorenzo Bianconi }; 9695802106fSLorenzo Bianconi 97018369a4fSLorenzo Bianconi #define MT_SKU_POWER_LIMIT 161 97118369a4fSLorenzo Bianconi 97218369a4fSLorenzo Bianconi struct mt76_connac_sku_tlv { 97318369a4fSLorenzo Bianconi u8 channel; 97418369a4fSLorenzo Bianconi s8 pwr_limit[MT_SKU_POWER_LIMIT]; 97518369a4fSLorenzo Bianconi } __packed; 97618369a4fSLorenzo Bianconi 97718369a4fSLorenzo Bianconi struct mt76_connac_tx_power_limit_tlv { 97818369a4fSLorenzo Bianconi /* DW0 - common info*/ 97918369a4fSLorenzo Bianconi u8 ver; 98018369a4fSLorenzo Bianconi u8 pad0; 98118369a4fSLorenzo Bianconi __le16 len; 98218369a4fSLorenzo Bianconi /* DW1 - cmd hint */ 98318369a4fSLorenzo Bianconi u8 n_chan; /* # channel */ 9849b2ea8eeSLorenzo Bianconi u8 band; /* 2.4GHz - 5GHz - 6GHz */ 98518369a4fSLorenzo Bianconi u8 last_msg; 98618369a4fSLorenzo Bianconi u8 pad1; 98718369a4fSLorenzo Bianconi /* DW3 */ 98818369a4fSLorenzo Bianconi u8 alpha2[4]; /* regulatory_request.alpha2 */ 98918369a4fSLorenzo Bianconi u8 pad2[32]; 99018369a4fSLorenzo Bianconi } __packed; 99118369a4fSLorenzo Bianconi 992c0b21255SSean Wang struct mt76_connac_config { 993c0b21255SSean Wang __le16 id; 994c0b21255SSean Wang u8 type; 995c0b21255SSean Wang u8 resp_type; 996c0b21255SSean Wang __le16 data_size; 997c0b21255SSean Wang __le16 resv; 998c0b21255SSean Wang u8 data[320]; 999c0b21255SSean Wang } __packed; 1000c0b21255SSean Wang 100167aa2743SLorenzo Bianconi #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 100267aa2743SLorenzo Bianconi #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 100367aa2743SLorenzo Bianconi 100467aa2743SLorenzo Bianconi static inline void 100567aa2743SLorenzo Bianconi mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, 100667aa2743SLorenzo Bianconi u8 *wlan_idx_lo, u8 *wlan_idx_hi) 100767aa2743SLorenzo Bianconi { 100867aa2743SLorenzo Bianconi *wlan_idx_hi = 0; 100967aa2743SLorenzo Bianconi 101067aa2743SLorenzo Bianconi if (is_mt7921(dev)) { 101167aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; 101267aa2743SLorenzo Bianconi *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; 101367aa2743SLorenzo Bianconi } else { 101467aa2743SLorenzo Bianconi *wlan_idx_lo = wcid ? wcid->idx : 0; 101567aa2743SLorenzo Bianconi } 101667aa2743SLorenzo Bianconi } 101767aa2743SLorenzo Bianconi 1018d0e274afSLorenzo Bianconi struct sk_buff * 1019d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 1020d0e274afSLorenzo Bianconi struct mt76_wcid *wcid); 1021d0e274afSLorenzo Bianconi struct wtbl_req_hdr * 1022d0e274afSLorenzo Bianconi mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 1023d0e274afSLorenzo Bianconi int cmd, void *sta_wtbl, struct sk_buff **skb); 1024d0e274afSLorenzo Bianconi struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, 1025d0e274afSLorenzo Bianconi int len, void *sta_ntlv, 1026d0e274afSLorenzo Bianconi void *sta_wtbl); 1027d0e274afSLorenzo Bianconi static inline struct tlv * 1028d0e274afSLorenzo Bianconi mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 1029d0e274afSLorenzo Bianconi { 1030d0e274afSLorenzo Bianconi return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 1031d0e274afSLorenzo Bianconi } 1032d0e274afSLorenzo Bianconi 1033d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy); 1034d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif); 1035d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 1036d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1037f5056657SSean Wang struct ieee80211_sta *sta, bool enable, 1038f5056657SSean Wang bool newly); 1039d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1040d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1041d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1042d0e274afSLorenzo Bianconi void *wtbl_tlv); 1043d4b98c63SRyder Lee void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 1044868fe07eSLorenzo Bianconi struct ieee80211_vif *vif, 104566978204SFelix Fietkau struct mt76_wcid *wcid, 1046d4b98c63SRyder Lee void *sta_wtbl, void *wtbl_tlv); 104724299fc8SLorenzo Bianconi int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 104824299fc8SLorenzo Bianconi struct ieee80211_vif *vif, 104924299fc8SLorenzo Bianconi struct mt76_wcid *wcid, int cmd); 1050d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 1051d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, 10525802106fSLorenzo Bianconi struct ieee80211_vif *vif, 1053f5056657SSean Wang u8 rcpi, u8 state); 1054d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1055d0e274afSLorenzo Bianconi struct ieee80211_sta *sta, void *sta_wtbl, 1056d0e274afSLorenzo Bianconi void *wtbl_tlv); 1057d0e274afSLorenzo Bianconi void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1058d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1059d0e274afSLorenzo Bianconi bool enable, bool tx, void *sta_wtbl, 1060d0e274afSLorenzo Bianconi void *wtbl_tlv); 1061d0e274afSLorenzo Bianconi void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1062d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1063d0e274afSLorenzo Bianconi bool enable, bool tx); 1064d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1065d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1066d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1067d0e274afSLorenzo Bianconi bool enable); 1068d0e274afSLorenzo Bianconi int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1069d0e274afSLorenzo Bianconi struct ieee80211_ampdu_params *params, 1070d0e274afSLorenzo Bianconi bool enable, bool tx); 1071d0e274afSLorenzo Bianconi int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1072d0e274afSLorenzo Bianconi struct ieee80211_vif *vif, 1073d0e274afSLorenzo Bianconi struct mt76_wcid *wcid, 1074d0e274afSLorenzo Bianconi bool enable); 1075f5056657SSean Wang int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 10765802106fSLorenzo Bianconi struct mt76_sta_cmd_info *info); 1077d0e274afSLorenzo Bianconi void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 1078d0e274afSLorenzo Bianconi struct ieee80211_vif *vif); 1079d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band); 1080d0e274afSLorenzo Bianconi int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 1081d0e274afSLorenzo Bianconi bool hdr_trans); 1082d0e274afSLorenzo Bianconi int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 1083d0e274afSLorenzo Bianconi u32 mode); 1084d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_patch(struct mt76_dev *dev); 1085d0e274afSLorenzo Bianconi int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get); 1086d0e274afSLorenzo Bianconi int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option); 1087f7d2958cSLorenzo Bianconi int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy); 1088d0e274afSLorenzo Bianconi 1089399090efSLorenzo Bianconi int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1090399090efSLorenzo Bianconi struct ieee80211_scan_request *scan_req); 1091399090efSLorenzo Bianconi int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1092399090efSLorenzo Bianconi struct ieee80211_vif *vif); 1093399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1094399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1095399090efSLorenzo Bianconi struct cfg80211_sched_scan_request *sreq); 1096399090efSLorenzo Bianconi int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1097399090efSLorenzo Bianconi struct ieee80211_vif *vif, 1098399090efSLorenzo Bianconi bool enable); 1099f4f4089eSLorenzo Bianconi int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 1100f4f4089eSLorenzo Bianconi struct mt76_vif *vif, 1101f4f4089eSLorenzo Bianconi struct ieee80211_bss_conf *info); 110255d4c19cSLorenzo Bianconi int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 110355d4c19cSLorenzo Bianconi struct ieee80211_vif *vif, 110455d4c19cSLorenzo Bianconi struct cfg80211_gtk_rekey_data *key); 110555d4c19cSLorenzo Bianconi int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); 110655d4c19cSLorenzo Bianconi void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 110755d4c19cSLorenzo Bianconi struct ieee80211_vif *vif); 1108f5056657SSean Wang int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1109f5056657SSean Wang enum ieee80211_sta_state old_state, 1110f5056657SSean Wang enum ieee80211_sta_state new_state); 11110da3c795SSean Wang int mt76_connac_mcu_chip_config(struct mt76_dev *dev); 1112c0b21255SSean Wang int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); 11130da3c795SSean Wang void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 11140da3c795SSean Wang struct mt76_connac_coredump *coredump); 111518369a4fSLorenzo Bianconi int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); 11161f832887SLorenzo Bianconi int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 11171f832887SLorenzo Bianconi struct ieee80211_vif *vif); 111887f9bf24SSean Wang u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 111987f9bf24SSean Wang void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 1120d0e274afSLorenzo Bianconi #endif /* __MT76_CONNAC_MCU_H */ 1121