1 /* SPDX-License-Identifier: ISC */ 2 3 #ifndef __MT7603_H 4 #define __MT7603_H 5 6 #include <linux/interrupt.h> 7 #include <linux/ktime.h> 8 #include "../mt76.h" 9 #include "regs.h" 10 11 #define MT7603_MAX_INTERFACES 4 12 #define MT7603_WTBL_SIZE 128 13 #define MT7603_WTBL_RESERVED (MT7603_WTBL_SIZE - 1) 14 #define MT7603_WTBL_STA (MT7603_WTBL_RESERVED - MT7603_MAX_INTERFACES) 15 16 #define MT7603_RATE_RETRY 2 17 18 #define MT7603_RX_RING_SIZE 128 19 20 #define MT7603_FIRMWARE_E1 "mt7603_e1.bin" 21 #define MT7603_FIRMWARE_E2 "mt7603_e2.bin" 22 #define MT7628_FIRMWARE_E1 "mt7628_e1.bin" 23 #define MT7628_FIRMWARE_E2 "mt7628_e2.bin" 24 25 #define MT7603_EEPROM_SIZE 1024 26 27 #define MT_AGG_SIZE_LIMIT(_n) (((_n) + 1) * 4) 28 29 #define MT7603_PRE_TBTT_TIME 5000 /* ms */ 30 31 #define MT7603_WATCHDOG_TIME 100 /* ms */ 32 #define MT7603_WATCHDOG_TIMEOUT 10 /* number of checks */ 33 34 #define MT7603_EDCCA_BLOCK_TH 10 35 36 #define MT7603_CFEND_RATE_DEFAULT 0x69 /* chip default (24M) */ 37 #define MT7603_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 38 39 struct mt7603_vif; 40 struct mt7603_sta; 41 42 enum { 43 MT7603_REV_E1 = 0x00, 44 MT7603_REV_E2 = 0x10, 45 MT7628_REV_E1 = 0x8a00, 46 }; 47 48 enum mt7603_bw { 49 MT_BW_20, 50 MT_BW_40, 51 MT_BW_80, 52 }; 53 54 struct mt7603_rate_set { 55 struct ieee80211_tx_rate probe_rate; 56 struct ieee80211_tx_rate rates[4]; 57 }; 58 59 struct mt7603_sta { 60 struct mt76_wcid wcid; /* must be first */ 61 62 struct mt7603_vif *vif; 63 64 struct list_head poll_list; 65 u32 tx_airtime_ac[4]; 66 67 struct sk_buff_head psq; 68 69 struct ieee80211_tx_rate rates[4]; 70 71 struct mt7603_rate_set rateset[2]; 72 u32 rate_set_tsf; 73 74 u8 rate_count; 75 u8 n_rates; 76 77 u8 rate_probe; 78 u8 smps; 79 80 u8 ps; 81 }; 82 83 struct mt7603_vif { 84 struct mt7603_sta sta; /* must be first */ 85 86 u8 idx; 87 }; 88 89 enum mt7603_reset_cause { 90 RESET_CAUSE_TX_HANG, 91 RESET_CAUSE_TX_BUSY, 92 RESET_CAUSE_RX_BUSY, 93 RESET_CAUSE_BEACON_STUCK, 94 RESET_CAUSE_RX_PSE_BUSY, 95 RESET_CAUSE_MCU_HANG, 96 RESET_CAUSE_RESET_FAILED, 97 __RESET_CAUSE_MAX 98 }; 99 100 struct mt7603_dev { 101 union { /* must be first */ 102 struct mt76_dev mt76; 103 struct mt76_phy mphy; 104 }; 105 106 const struct mt76_bus_ops *bus_ops; 107 108 u32 rxfilter; 109 110 u8 vif_mask; 111 112 struct list_head sta_poll_list; 113 spinlock_t sta_poll_lock; 114 115 struct mt7603_sta global_sta; 116 117 u32 agc0, agc3; 118 u32 false_cca_ofdm, false_cca_cck; 119 unsigned long last_cca_adj; 120 121 __le32 rx_ampdu_ts; 122 u8 rssi_offset[3]; 123 124 u8 slottime; 125 s16 coverage_class; 126 127 s8 tx_power_limit; 128 129 ktime_t ed_time; 130 131 spinlock_t ps_lock; 132 133 u8 mac_work_count; 134 135 u8 mcu_running; 136 137 u8 ed_monitor_enabled; 138 u8 ed_monitor; 139 s8 ed_trigger; 140 u8 ed_strict_mode; 141 u8 ed_strong_signal; 142 143 s8 sensitivity; 144 145 u8 beacon_check; 146 u8 tx_hang_check; 147 u8 tx_dma_check; 148 u8 rx_dma_check; 149 u8 rx_pse_check; 150 u8 mcu_hang; 151 152 enum mt7603_reset_cause cur_reset_cause; 153 154 u16 tx_dma_idx[4]; 155 u16 rx_dma_idx; 156 157 u32 reset_test; 158 159 unsigned int reset_cause[__RESET_CAUSE_MAX]; 160 }; 161 162 extern const struct mt76_driver_ops mt7603_drv_ops; 163 extern const struct ieee80211_ops mt7603_ops; 164 extern struct pci_driver mt7603_pci_driver; 165 extern struct platform_driver mt76_wmac_driver; 166 167 static inline bool is_mt7603(struct mt7603_dev *dev) 168 { 169 return mt76xx_chip(dev) == 0x7603; 170 } 171 172 static inline bool is_mt7628(struct mt7603_dev *dev) 173 { 174 return mt76xx_chip(dev) == 0x7628; 175 } 176 177 /* need offset to prevent conflict with ampdu_ack_len */ 178 #define MT_RATE_DRIVER_DATA_OFFSET 4 179 180 u32 mt7603_reg_map(struct mt7603_dev *dev, u32 addr); 181 182 irqreturn_t mt7603_irq_handler(int irq, void *dev_instance); 183 184 int mt7603_register_device(struct mt7603_dev *dev); 185 void mt7603_unregister_device(struct mt7603_dev *dev); 186 int mt7603_eeprom_init(struct mt7603_dev *dev); 187 int mt7603_dma_init(struct mt7603_dev *dev); 188 void mt7603_dma_cleanup(struct mt7603_dev *dev); 189 int mt7603_mcu_init(struct mt7603_dev *dev); 190 void mt7603_init_debugfs(struct mt7603_dev *dev); 191 192 static inline void mt7603_irq_enable(struct mt7603_dev *dev, u32 mask) 193 { 194 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask); 195 } 196 197 static inline void mt7603_irq_disable(struct mt7603_dev *dev, u32 mask) 198 { 199 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 200 } 201 202 void mt7603_mac_reset_counters(struct mt7603_dev *dev); 203 void mt7603_mac_dma_start(struct mt7603_dev *dev); 204 void mt7603_mac_start(struct mt7603_dev *dev); 205 void mt7603_mac_stop(struct mt7603_dev *dev); 206 void mt7603_mac_work(struct work_struct *work); 207 void mt7603_mac_set_timing(struct mt7603_dev *dev); 208 void mt7603_beacon_set_timer(struct mt7603_dev *dev, int idx, int intval); 209 int mt7603_mac_fill_rx(struct mt7603_dev *dev, struct sk_buff *skb); 210 void mt7603_mac_add_txs(struct mt7603_dev *dev, void *data); 211 void mt7603_mac_rx_ba_reset(struct mt7603_dev *dev, void *addr, u8 tid); 212 void mt7603_mac_tx_ba_reset(struct mt7603_dev *dev, int wcid, int tid, 213 int ba_size); 214 void mt7603_mac_sta_poll(struct mt7603_dev *dev); 215 216 void mt7603_pse_client_reset(struct mt7603_dev *dev); 217 218 int mt7603_mcu_set_channel(struct mt7603_dev *dev); 219 int mt7603_mcu_set_eeprom(struct mt7603_dev *dev); 220 void mt7603_mcu_exit(struct mt7603_dev *dev); 221 222 void mt7603_wtbl_init(struct mt7603_dev *dev, int idx, int vif, 223 const u8 *mac_addr); 224 void mt7603_wtbl_clear(struct mt7603_dev *dev, int idx); 225 void mt7603_wtbl_update_cap(struct mt7603_dev *dev, struct ieee80211_sta *sta); 226 void mt7603_wtbl_set_rates(struct mt7603_dev *dev, struct mt7603_sta *sta, 227 struct ieee80211_tx_rate *probe_rate, 228 struct ieee80211_tx_rate *rates); 229 int mt7603_wtbl_set_key(struct mt7603_dev *dev, int wcid, 230 struct ieee80211_key_conf *key); 231 void mt7603_wtbl_set_ps(struct mt7603_dev *dev, struct mt7603_sta *sta, 232 bool enabled); 233 void mt7603_wtbl_set_smps(struct mt7603_dev *dev, struct mt7603_sta *sta, 234 bool enabled); 235 void mt7603_filter_tx(struct mt7603_dev *dev, int idx, bool abort); 236 237 int mt7603_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 238 enum mt76_txq_id qid, struct mt76_wcid *wcid, 239 struct ieee80211_sta *sta, 240 struct mt76_tx_info *tx_info); 241 242 void mt7603_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid, 243 struct mt76_queue_entry *e); 244 245 void mt7603_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 246 struct sk_buff *skb); 247 void mt7603_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q); 248 void mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 249 int mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 250 struct ieee80211_sta *sta); 251 void mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif, 252 struct ieee80211_sta *sta); 253 void mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 254 struct ieee80211_sta *sta); 255 256 void mt7603_pre_tbtt_tasklet(unsigned long arg); 257 258 void mt7603_update_channel(struct mt76_dev *mdev); 259 260 void mt7603_edcca_set_strict(struct mt7603_dev *dev, bool val); 261 void mt7603_cca_stats_reset(struct mt7603_dev *dev); 262 263 void mt7603_init_edcca(struct mt7603_dev *dev); 264 #endif 265