1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2004-2011 Atheros Communications Inc.
3bdcd8170SKalle Valo  *
4bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
5bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
6bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
7bdcd8170SKalle Valo  *
8bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15bdcd8170SKalle Valo  */
16bdcd8170SKalle Valo 
17bdcd8170SKalle Valo #include "core.h"
18bdcd8170SKalle Valo #include "debug.h"
19bdcd8170SKalle Valo 
20bdcd8170SKalle Valo int ath6kl_printk(const char *level, const char *fmt, ...)
21bdcd8170SKalle Valo {
22bdcd8170SKalle Valo 	struct va_format vaf;
23bdcd8170SKalle Valo 	va_list args;
24bdcd8170SKalle Valo 	int rtn;
25bdcd8170SKalle Valo 
26bdcd8170SKalle Valo 	va_start(args, fmt);
27bdcd8170SKalle Valo 
28bdcd8170SKalle Valo 	vaf.fmt = fmt;
29bdcd8170SKalle Valo 	vaf.va = &args;
30bdcd8170SKalle Valo 
31bdcd8170SKalle Valo 	rtn = printk("%sath6kl: %pV", level, &vaf);
32bdcd8170SKalle Valo 
33bdcd8170SKalle Valo 	va_end(args);
34bdcd8170SKalle Valo 
35bdcd8170SKalle Valo 	return rtn;
36bdcd8170SKalle Valo }
37bdcd8170SKalle Valo 
38bdcd8170SKalle Valo #ifdef CONFIG_ATH6KL_DEBUG
39bdcd8170SKalle Valo void ath6kl_dump_registers(struct ath6kl_device *dev,
40bdcd8170SKalle Valo 			   struct ath6kl_irq_proc_registers *irq_proc_reg,
41bdcd8170SKalle Valo 			   struct ath6kl_irq_enable_reg *irq_enable_reg)
42bdcd8170SKalle Valo {
43bdcd8170SKalle Valo 
44bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, ("<------- Register Table -------->\n"));
45bdcd8170SKalle Valo 
46bdcd8170SKalle Valo 	if (irq_proc_reg != NULL) {
47bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
48bdcd8170SKalle Valo 			"Host Int status:           0x%x\n",
49bdcd8170SKalle Valo 			irq_proc_reg->host_int_status);
50bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
51bdcd8170SKalle Valo 			   "CPU Int status:            0x%x\n",
52bdcd8170SKalle Valo 			irq_proc_reg->cpu_int_status);
53bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
54bdcd8170SKalle Valo 			   "Error Int status:          0x%x\n",
55bdcd8170SKalle Valo 			irq_proc_reg->error_int_status);
56bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
57bdcd8170SKalle Valo 			   "Counter Int status:        0x%x\n",
58bdcd8170SKalle Valo 			irq_proc_reg->counter_int_status);
59bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
60bdcd8170SKalle Valo 			   "Mbox Frame:                0x%x\n",
61bdcd8170SKalle Valo 			irq_proc_reg->mbox_frame);
62bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
63bdcd8170SKalle Valo 			   "Rx Lookahead Valid:        0x%x\n",
64bdcd8170SKalle Valo 			irq_proc_reg->rx_lkahd_valid);
65bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
66bdcd8170SKalle Valo 			   "Rx Lookahead 0:            0x%x\n",
67bdcd8170SKalle Valo 			irq_proc_reg->rx_lkahd[0]);
68bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
69bdcd8170SKalle Valo 			   "Rx Lookahead 1:            0x%x\n",
70bdcd8170SKalle Valo 			irq_proc_reg->rx_lkahd[1]);
71bdcd8170SKalle Valo 
72bdcd8170SKalle Valo 		if (dev->ar->mbox_info.gmbox_addr != 0) {
73bdcd8170SKalle Valo 			/*
74bdcd8170SKalle Valo 			 * If the target supports GMBOX hardware, dump some
75bdcd8170SKalle Valo 			 * additional state.
76bdcd8170SKalle Valo 			 */
77bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_ANY,
78bdcd8170SKalle Valo 				"GMBOX Host Int status 2:   0x%x\n",
79bdcd8170SKalle Valo 				irq_proc_reg->host_int_status2);
80bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_ANY,
81bdcd8170SKalle Valo 				"GMBOX RX Avail:            0x%x\n",
82bdcd8170SKalle Valo 				irq_proc_reg->gmbox_rx_avail);
83bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_ANY,
84bdcd8170SKalle Valo 				"GMBOX lookahead alias 0:   0x%x\n",
85bdcd8170SKalle Valo 				irq_proc_reg->rx_gmbox_lkahd_alias[0]);
86bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_ANY,
87bdcd8170SKalle Valo 				"GMBOX lookahead alias 1:   0x%x\n",
88bdcd8170SKalle Valo 				irq_proc_reg->rx_gmbox_lkahd_alias[1]);
89bdcd8170SKalle Valo 		}
90bdcd8170SKalle Valo 
91bdcd8170SKalle Valo 	}
92bdcd8170SKalle Valo 
93bdcd8170SKalle Valo 	if (irq_enable_reg != NULL) {
94bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY,
95bdcd8170SKalle Valo 			"Int status Enable:         0x%x\n",
96bdcd8170SKalle Valo 			irq_enable_reg->int_status_en);
97bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_ANY, "Counter Int status Enable: 0x%x\n",
98bdcd8170SKalle Valo 			irq_enable_reg->cntr_int_status_en);
99bdcd8170SKalle Valo 	}
100bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, "<------------------------------->\n");
101bdcd8170SKalle Valo }
102bdcd8170SKalle Valo 
103bdcd8170SKalle Valo static void dump_cred_dist(struct htc_endpoint_credit_dist *ep_dist)
104bdcd8170SKalle Valo {
105bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY,
106bdcd8170SKalle Valo 		   "--- endpoint: %d  svc_id: 0x%X ---\n",
107bdcd8170SKalle Valo 		   ep_dist->endpoint, ep_dist->svc_id);
108bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " dist_flags     : 0x%X\n",
109bdcd8170SKalle Valo 		   ep_dist->dist_flags);
110bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " cred_norm      : %d\n",
111bdcd8170SKalle Valo 		   ep_dist->cred_norm);
112bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " cred_min       : %d\n",
113bdcd8170SKalle Valo 		   ep_dist->cred_min);
114bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " credits        : %d\n",
115bdcd8170SKalle Valo 		   ep_dist->credits);
116bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " cred_assngd    : %d\n",
117bdcd8170SKalle Valo 		   ep_dist->cred_assngd);
118bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " seek_cred      : %d\n",
119bdcd8170SKalle Valo 		   ep_dist->seek_cred);
120bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " cred_sz        : %d\n",
121bdcd8170SKalle Valo 		   ep_dist->cred_sz);
122bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " cred_per_msg   : %d\n",
123bdcd8170SKalle Valo 		   ep_dist->cred_per_msg);
124bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " cred_to_dist   : %d\n",
125bdcd8170SKalle Valo 		   ep_dist->cred_to_dist);
126bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY, " txq_depth      : %d\n",
127bdcd8170SKalle Valo 		   get_queue_depth(&((struct htc_endpoint *)
128bdcd8170SKalle Valo 				     ep_dist->htc_rsvd)->txq));
129bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_ANY,
130bdcd8170SKalle Valo 		   "----------------------------------\n");
131bdcd8170SKalle Valo }
132bdcd8170SKalle Valo 
133bdcd8170SKalle Valo void dump_cred_dist_stats(struct htc_target *target)
134bdcd8170SKalle Valo {
135bdcd8170SKalle Valo 	struct htc_endpoint_credit_dist *ep_list;
136bdcd8170SKalle Valo 
137bdcd8170SKalle Valo 	if (!AR_DBG_LVL_CHECK(ATH6KL_DBG_TRC))
138bdcd8170SKalle Valo 		return;
139bdcd8170SKalle Valo 
140bdcd8170SKalle Valo 	list_for_each_entry(ep_list, &target->cred_dist_list, list)
141bdcd8170SKalle Valo 		dump_cred_dist(ep_list);
142bdcd8170SKalle Valo 
143bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_HTC_SEND, "ctxt:%p dist:%p\n",
144bdcd8170SKalle Valo 		   target->cred_dist_cntxt, NULL);
145bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "credit distribution, total : %d, free : %d\n",
146bdcd8170SKalle Valo 		   target->cred_dist_cntxt->total_avail_credits,
147bdcd8170SKalle Valo 		   target->cred_dist_cntxt->cur_free_credits);
148bdcd8170SKalle Valo }
149bdcd8170SKalle Valo 
150bdcd8170SKalle Valo #endif
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