xref: /openbmc/linux/drivers/net/wireless/ath/ath10k/wmi.c (revision d7a3d85e)
1 /*
2  * Copyright (c) 2005-2011 Atheros Communications Inc.
3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #include <linux/skbuff.h>
19 #include <linux/ctype.h>
20 
21 #include "core.h"
22 #include "htc.h"
23 #include "debug.h"
24 #include "wmi.h"
25 #include "wmi-tlv.h"
26 #include "mac.h"
27 #include "testmode.h"
28 #include "wmi-ops.h"
29 
30 /* MAIN WMI cmd track */
31 static struct wmi_cmd_map wmi_cmd_map = {
32 	.init_cmdid = WMI_INIT_CMDID,
33 	.start_scan_cmdid = WMI_START_SCAN_CMDID,
34 	.stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
35 	.scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
36 	.scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
37 	.pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
38 	.pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
39 	.pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
40 	.pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
41 	.pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
42 	.pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
43 	.pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
44 	.pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
45 	.pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
46 	.pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
47 	.pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
48 	.pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
49 	.pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
50 	.vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
51 	.vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
52 	.vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
53 	.vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
54 	.vdev_up_cmdid = WMI_VDEV_UP_CMDID,
55 	.vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
56 	.vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
57 	.vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
58 	.vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
59 	.peer_create_cmdid = WMI_PEER_CREATE_CMDID,
60 	.peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
61 	.peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
62 	.peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
63 	.peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
64 	.peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
65 	.peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
66 	.peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
67 	.bcn_tx_cmdid = WMI_BCN_TX_CMDID,
68 	.pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
69 	.bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
70 	.bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
71 	.prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
72 	.mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
73 	.prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
74 	.addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
75 	.addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
76 	.addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
77 	.delba_send_cmdid = WMI_DELBA_SEND_CMDID,
78 	.addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
79 	.send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
80 	.sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
81 	.sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
82 	.sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
83 	.pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
84 	.pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
85 	.roam_scan_mode = WMI_ROAM_SCAN_MODE,
86 	.roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
87 	.roam_scan_period = WMI_ROAM_SCAN_PERIOD,
88 	.roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
89 	.roam_ap_profile = WMI_ROAM_AP_PROFILE,
90 	.ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
91 	.ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
92 	.ofl_scan_period = WMI_OFL_SCAN_PERIOD,
93 	.p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
94 	.p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
95 	.p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
96 	.p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
97 	.p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
98 	.ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
99 	.ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
100 	.peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
101 	.wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
102 	.wlan_profile_set_hist_intvl_cmdid =
103 				WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
104 	.wlan_profile_get_profile_data_cmdid =
105 				WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
106 	.wlan_profile_enable_profile_id_cmdid =
107 				WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
108 	.wlan_profile_list_profile_id_cmdid =
109 				WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
110 	.pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
111 	.pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
112 	.add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
113 	.rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
114 	.wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
115 	.wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
116 	.wow_enable_disable_wake_event_cmdid =
117 				WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
118 	.wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
119 	.wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
120 	.rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
121 	.rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
122 	.vdev_spectral_scan_configure_cmdid =
123 				WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
124 	.vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
125 	.request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
126 	.set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
127 	.network_list_offload_config_cmdid =
128 				WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
129 	.gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
130 	.csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
131 	.csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
132 	.chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
133 	.peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
134 	.peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
135 	.sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
136 	.sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
137 	.sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
138 	.echo_cmdid = WMI_ECHO_CMDID,
139 	.pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
140 	.dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
141 	.pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
142 	.pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
143 	.vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
144 	.vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
145 	.force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
146 	.gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
147 	.gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
148 	.pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
149 };
150 
151 /* 10.X WMI cmd track */
152 static struct wmi_cmd_map wmi_10x_cmd_map = {
153 	.init_cmdid = WMI_10X_INIT_CMDID,
154 	.start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
155 	.stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
156 	.scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
157 	.scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
158 	.pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
159 	.pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
160 	.pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
161 	.pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
162 	.pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
163 	.pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
164 	.pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
165 	.pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
166 	.pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
167 	.pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
168 	.pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
169 	.pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
170 	.pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
171 	.vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
172 	.vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
173 	.vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
174 	.vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
175 	.vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
176 	.vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
177 	.vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
178 	.vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
179 	.vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
180 	.peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
181 	.peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
182 	.peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
183 	.peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
184 	.peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
185 	.peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
186 	.peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
187 	.peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
188 	.bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
189 	.pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
190 	.bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
191 	.bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
192 	.prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
193 	.mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
194 	.prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
195 	.addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
196 	.addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
197 	.addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
198 	.delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
199 	.addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
200 	.send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
201 	.sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
202 	.sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
203 	.sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
204 	.pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
205 	.pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
206 	.roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
207 	.roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
208 	.roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
209 	.roam_scan_rssi_change_threshold =
210 				WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
211 	.roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
212 	.ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
213 	.ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
214 	.ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
215 	.p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
216 	.p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
217 	.p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
218 	.p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
219 	.p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
220 	.ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
221 	.ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
222 	.peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
223 	.wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
224 	.wlan_profile_set_hist_intvl_cmdid =
225 				WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
226 	.wlan_profile_get_profile_data_cmdid =
227 				WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
228 	.wlan_profile_enable_profile_id_cmdid =
229 				WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
230 	.wlan_profile_list_profile_id_cmdid =
231 				WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
232 	.pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
233 	.pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
234 	.add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
235 	.rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
236 	.wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
237 	.wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
238 	.wow_enable_disable_wake_event_cmdid =
239 				WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
240 	.wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
241 	.wow_hostwakeup_from_sleep_cmdid =
242 				WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
243 	.rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
244 	.rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
245 	.vdev_spectral_scan_configure_cmdid =
246 				WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
247 	.vdev_spectral_scan_enable_cmdid =
248 				WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
249 	.request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
250 	.set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
251 	.network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
252 	.gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
253 	.csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
254 	.csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
255 	.chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
256 	.peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
257 	.peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
258 	.sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
259 	.sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
260 	.sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
261 	.echo_cmdid = WMI_10X_ECHO_CMDID,
262 	.pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
263 	.dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
264 	.pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
265 	.pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
266 	.vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
267 	.vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
268 	.force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
269 	.gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
270 	.gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
271 	.pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
272 };
273 
274 /* 10.2.4 WMI cmd track */
275 static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
276 	.init_cmdid = WMI_10_2_INIT_CMDID,
277 	.start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
278 	.stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
279 	.scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
280 	.scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
281 	.pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
282 	.pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
283 	.pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
284 	.pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
285 	.pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
286 	.pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
287 	.pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
288 	.pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
289 	.pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
290 	.pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
291 	.pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
292 	.pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
293 	.vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
294 	.vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
295 	.vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
296 	.vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
297 	.vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
298 	.vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
299 	.vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
300 	.vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
301 	.vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
302 	.peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
303 	.peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
304 	.peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
305 	.peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
306 	.peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
307 	.peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
308 	.peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
309 	.peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
310 	.bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
311 	.pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
312 	.bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
313 	.bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
314 	.prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
315 	.mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
316 	.prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
317 	.addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
318 	.addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
319 	.addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
320 	.delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
321 	.addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
322 	.send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
323 	.sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
324 	.sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
325 	.sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
326 	.pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
327 	.pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
328 	.roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
329 	.roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
330 	.roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
331 	.roam_scan_rssi_change_threshold =
332 				WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
333 	.roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
334 	.ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
335 	.ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
336 	.ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
337 	.p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
338 	.p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
339 	.p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
340 	.p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
341 	.p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
342 	.ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
343 	.ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
344 	.peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
345 	.wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
346 	.wlan_profile_set_hist_intvl_cmdid =
347 				WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
348 	.wlan_profile_get_profile_data_cmdid =
349 				WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
350 	.wlan_profile_enable_profile_id_cmdid =
351 				WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
352 	.wlan_profile_list_profile_id_cmdid =
353 				WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
354 	.pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
355 	.pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
356 	.add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
357 	.rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
358 	.wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
359 	.wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
360 	.wow_enable_disable_wake_event_cmdid =
361 				WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
362 	.wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
363 	.wow_hostwakeup_from_sleep_cmdid =
364 				WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
365 	.rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
366 	.rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
367 	.vdev_spectral_scan_configure_cmdid =
368 				WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
369 	.vdev_spectral_scan_enable_cmdid =
370 				WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
371 	.request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
372 	.set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
373 	.network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
374 	.gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
375 	.csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
376 	.csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
377 	.chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
378 	.peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
379 	.peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
380 	.sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
381 	.sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
382 	.sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
383 	.echo_cmdid = WMI_10_2_ECHO_CMDID,
384 	.pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
385 	.dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
386 	.pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
387 	.pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
388 	.vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
389 	.vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
390 	.force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
391 	.gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
392 	.gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
393 	.pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
394 };
395 
396 /* MAIN WMI VDEV param map */
397 static struct wmi_vdev_param_map wmi_vdev_param_map = {
398 	.rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
399 	.fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
400 	.beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
401 	.listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
402 	.multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
403 	.mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
404 	.slot_time = WMI_VDEV_PARAM_SLOT_TIME,
405 	.preamble = WMI_VDEV_PARAM_PREAMBLE,
406 	.swba_time = WMI_VDEV_PARAM_SWBA_TIME,
407 	.wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
408 	.wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
409 	.wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
410 	.dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
411 	.wmi_vdev_oc_scheduler_air_time_limit =
412 					WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
413 	.wds = WMI_VDEV_PARAM_WDS,
414 	.atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
415 	.bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
416 	.bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
417 	.bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
418 	.feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
419 	.chwidth = WMI_VDEV_PARAM_CHWIDTH,
420 	.chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
421 	.disable_htprotection =	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
422 	.sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
423 	.mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
424 	.protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
425 	.fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
426 	.sgi = WMI_VDEV_PARAM_SGI,
427 	.ldpc = WMI_VDEV_PARAM_LDPC,
428 	.tx_stbc = WMI_VDEV_PARAM_TX_STBC,
429 	.rx_stbc = WMI_VDEV_PARAM_RX_STBC,
430 	.intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
431 	.def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
432 	.nss = WMI_VDEV_PARAM_NSS,
433 	.bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
434 	.mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
435 	.mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
436 	.dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
437 	.unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
438 	.ap_keepalive_min_idle_inactive_time_secs =
439 			WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
440 	.ap_keepalive_max_idle_inactive_time_secs =
441 			WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
442 	.ap_keepalive_max_unresponsive_time_secs =
443 			WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
444 	.ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
445 	.mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
446 	.enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
447 	.txbf = WMI_VDEV_PARAM_TXBF,
448 	.packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
449 	.drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
450 	.tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
451 	.ap_detect_out_of_sync_sleeping_sta_time_secs =
452 					WMI_VDEV_PARAM_UNSUPPORTED,
453 };
454 
455 /* 10.X WMI VDEV param map */
456 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
457 	.rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
458 	.fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
459 	.beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
460 	.listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
461 	.multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
462 	.mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
463 	.slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
464 	.preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
465 	.swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
466 	.wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
467 	.wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
468 	.wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
469 	.dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
470 	.wmi_vdev_oc_scheduler_air_time_limit =
471 				WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
472 	.wds = WMI_10X_VDEV_PARAM_WDS,
473 	.atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
474 	.bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
475 	.bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
476 	.bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
477 	.feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
478 	.chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
479 	.chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
480 	.disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
481 	.sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
482 	.mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
483 	.protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
484 	.fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
485 	.sgi = WMI_10X_VDEV_PARAM_SGI,
486 	.ldpc = WMI_10X_VDEV_PARAM_LDPC,
487 	.tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
488 	.rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
489 	.intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
490 	.def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
491 	.nss = WMI_10X_VDEV_PARAM_NSS,
492 	.bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
493 	.mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
494 	.mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
495 	.dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
496 	.unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
497 	.ap_keepalive_min_idle_inactive_time_secs =
498 		WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
499 	.ap_keepalive_max_idle_inactive_time_secs =
500 		WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
501 	.ap_keepalive_max_unresponsive_time_secs =
502 		WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
503 	.ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
504 	.mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
505 	.enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
506 	.txbf = WMI_VDEV_PARAM_UNSUPPORTED,
507 	.packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
508 	.drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
509 	.tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
510 	.ap_detect_out_of_sync_sleeping_sta_time_secs =
511 		WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
512 };
513 
514 static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
515 	.rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
516 	.fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
517 	.beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
518 	.listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
519 	.multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
520 	.mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
521 	.slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
522 	.preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
523 	.swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
524 	.wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
525 	.wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
526 	.wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
527 	.dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
528 	.wmi_vdev_oc_scheduler_air_time_limit =
529 				WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
530 	.wds = WMI_10X_VDEV_PARAM_WDS,
531 	.atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
532 	.bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
533 	.bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
534 	.bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
535 	.feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
536 	.chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
537 	.chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
538 	.disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
539 	.sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
540 	.mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
541 	.protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
542 	.fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
543 	.sgi = WMI_10X_VDEV_PARAM_SGI,
544 	.ldpc = WMI_10X_VDEV_PARAM_LDPC,
545 	.tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
546 	.rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
547 	.intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
548 	.def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
549 	.nss = WMI_10X_VDEV_PARAM_NSS,
550 	.bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
551 	.mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
552 	.mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
553 	.dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
554 	.unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
555 	.ap_keepalive_min_idle_inactive_time_secs =
556 		WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
557 	.ap_keepalive_max_idle_inactive_time_secs =
558 		WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
559 	.ap_keepalive_max_unresponsive_time_secs =
560 		WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
561 	.ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
562 	.mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
563 	.enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
564 	.txbf = WMI_VDEV_PARAM_UNSUPPORTED,
565 	.packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
566 	.drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
567 	.tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
568 	.ap_detect_out_of_sync_sleeping_sta_time_secs =
569 		WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
570 };
571 
572 static struct wmi_pdev_param_map wmi_pdev_param_map = {
573 	.tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
574 	.rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
575 	.txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
576 	.txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
577 	.txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
578 	.beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
579 	.beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
580 	.resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
581 	.protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
582 	.dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
583 	.non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
584 	.agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
585 	.sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
586 	.ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
587 	.ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
588 	.ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
589 	.ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
590 	.ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
591 	.ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
592 	.ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
593 	.ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
594 	.ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
595 	.ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
596 	.l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
597 	.dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
598 	.pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
599 	.pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
600 	.pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
601 	.pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
602 	.pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
603 	.vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
604 	.peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
605 	.bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
606 	.pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
607 	.arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
608 	.dcs = WMI_PDEV_PARAM_DCS,
609 	.ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
610 	.ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
611 	.ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
612 	.ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
613 	.ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
614 	.dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
615 	.proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
616 	.idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
617 	.power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
618 	.fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
619 	.burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
620 	.burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
621 	.cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
622 };
623 
624 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
625 	.tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
626 	.rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
627 	.txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
628 	.txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
629 	.txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
630 	.beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
631 	.beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
632 	.resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
633 	.protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
634 	.dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
635 	.non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
636 	.agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
637 	.sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
638 	.ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
639 	.ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
640 	.ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
641 	.ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
642 	.ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
643 	.ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
644 	.ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
645 	.ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
646 	.ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
647 	.ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
648 	.l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
649 	.dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
650 	.pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
651 	.pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
652 	.pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
653 	.pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
654 	.pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
655 	.vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
656 	.peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
657 	.bcnflt_stats_update_period =
658 				WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
659 	.pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
660 	.arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
661 	.dcs = WMI_10X_PDEV_PARAM_DCS,
662 	.ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
663 	.ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
664 	.ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
665 	.ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
666 	.ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
667 	.dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
668 	.proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
669 	.idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
670 	.power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
671 	.fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
672 	.burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
673 	.burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
674 	.cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
675 };
676 
677 static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
678 	.tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
679 	.rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
680 	.txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
681 	.txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
682 	.txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
683 	.beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
684 	.beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
685 	.resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
686 	.protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
687 	.dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
688 	.non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
689 	.agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
690 	.sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
691 	.ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
692 	.ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
693 	.ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
694 	.ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
695 	.ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
696 	.ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
697 	.ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
698 	.ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
699 	.ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
700 	.ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
701 	.l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
702 	.dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
703 	.pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
704 	.pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
705 	.pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
706 	.pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
707 	.pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
708 	.vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
709 	.peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
710 	.bcnflt_stats_update_period =
711 				WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
712 	.pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
713 	.arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
714 	.dcs = WMI_10X_PDEV_PARAM_DCS,
715 	.ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
716 	.ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
717 	.ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
718 	.ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
719 	.ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
720 	.dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
721 	.proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
722 	.idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
723 	.power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
724 	.fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
725 	.burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
726 	.burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
727 	.cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
728 };
729 
730 /* firmware 10.2 specific mappings */
731 static struct wmi_cmd_map wmi_10_2_cmd_map = {
732 	.init_cmdid = WMI_10_2_INIT_CMDID,
733 	.start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
734 	.stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
735 	.scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
736 	.scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
737 	.pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
738 	.pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
739 	.pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
740 	.pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
741 	.pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
742 	.pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
743 	.pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
744 	.pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
745 	.pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
746 	.pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
747 	.pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
748 	.pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
749 	.vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
750 	.vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
751 	.vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
752 	.vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
753 	.vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
754 	.vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
755 	.vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
756 	.vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
757 	.vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
758 	.peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
759 	.peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
760 	.peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
761 	.peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
762 	.peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
763 	.peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
764 	.peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
765 	.peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
766 	.bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
767 	.pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
768 	.bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
769 	.bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
770 	.prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
771 	.mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
772 	.prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
773 	.addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
774 	.addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
775 	.addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
776 	.delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
777 	.addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
778 	.send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
779 	.sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
780 	.sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
781 	.sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
782 	.pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
783 	.pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
784 	.roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
785 	.roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
786 	.roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
787 	.roam_scan_rssi_change_threshold =
788 				WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
789 	.roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
790 	.ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
791 	.ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
792 	.ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
793 	.p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
794 	.p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
795 	.p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
796 	.p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
797 	.p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
798 	.ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
799 	.ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
800 	.peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
801 	.wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
802 	.wlan_profile_set_hist_intvl_cmdid =
803 				WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
804 	.wlan_profile_get_profile_data_cmdid =
805 				WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
806 	.wlan_profile_enable_profile_id_cmdid =
807 				WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
808 	.wlan_profile_list_profile_id_cmdid =
809 				WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
810 	.pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
811 	.pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
812 	.add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
813 	.rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
814 	.wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
815 	.wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
816 	.wow_enable_disable_wake_event_cmdid =
817 				WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
818 	.wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
819 	.wow_hostwakeup_from_sleep_cmdid =
820 				WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
821 	.rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
822 	.rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
823 	.vdev_spectral_scan_configure_cmdid =
824 				WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
825 	.vdev_spectral_scan_enable_cmdid =
826 				WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
827 	.request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
828 	.set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
829 	.network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
830 	.gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
831 	.csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
832 	.csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
833 	.chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
834 	.peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
835 	.peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
836 	.sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
837 	.sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
838 	.sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
839 	.echo_cmdid = WMI_10_2_ECHO_CMDID,
840 	.pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
841 	.dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
842 	.pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
843 	.pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
844 	.vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
845 	.vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
846 	.force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
847 	.gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
848 	.gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
849 	.pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
850 };
851 
852 void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
853 				const struct wmi_channel_arg *arg)
854 {
855 	u32 flags = 0;
856 
857 	memset(ch, 0, sizeof(*ch));
858 
859 	if (arg->passive)
860 		flags |= WMI_CHAN_FLAG_PASSIVE;
861 	if (arg->allow_ibss)
862 		flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
863 	if (arg->allow_ht)
864 		flags |= WMI_CHAN_FLAG_ALLOW_HT;
865 	if (arg->allow_vht)
866 		flags |= WMI_CHAN_FLAG_ALLOW_VHT;
867 	if (arg->ht40plus)
868 		flags |= WMI_CHAN_FLAG_HT40_PLUS;
869 	if (arg->chan_radar)
870 		flags |= WMI_CHAN_FLAG_DFS;
871 
872 	ch->mhz = __cpu_to_le32(arg->freq);
873 	ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
874 	ch->band_center_freq2 = 0;
875 	ch->min_power = arg->min_power;
876 	ch->max_power = arg->max_power;
877 	ch->reg_power = arg->max_reg_power;
878 	ch->antenna_max = arg->max_antenna_gain;
879 
880 	/* mode & flags share storage */
881 	ch->mode = arg->mode;
882 	ch->flags |= __cpu_to_le32(flags);
883 }
884 
885 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
886 {
887 	int ret;
888 
889 	ret = wait_for_completion_timeout(&ar->wmi.service_ready,
890 					  WMI_SERVICE_READY_TIMEOUT_HZ);
891 	return ret;
892 }
893 
894 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
895 {
896 	int ret;
897 
898 	ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
899 					  WMI_UNIFIED_READY_TIMEOUT_HZ);
900 	return ret;
901 }
902 
903 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
904 {
905 	struct sk_buff *skb;
906 	u32 round_len = roundup(len, 4);
907 
908 	skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
909 	if (!skb)
910 		return NULL;
911 
912 	skb_reserve(skb, WMI_SKB_HEADROOM);
913 	if (!IS_ALIGNED((unsigned long)skb->data, 4))
914 		ath10k_warn(ar, "Unaligned WMI skb\n");
915 
916 	skb_put(skb, round_len);
917 	memset(skb->data, 0, round_len);
918 
919 	return skb;
920 }
921 
922 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
923 {
924 	dev_kfree_skb(skb);
925 }
926 
927 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
928 			       u32 cmd_id)
929 {
930 	struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
931 	struct wmi_cmd_hdr *cmd_hdr;
932 	int ret;
933 	u32 cmd = 0;
934 
935 	if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
936 		return -ENOMEM;
937 
938 	cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
939 
940 	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
941 	cmd_hdr->cmd_id = __cpu_to_le32(cmd);
942 
943 	memset(skb_cb, 0, sizeof(*skb_cb));
944 	ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
945 	trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
946 
947 	if (ret)
948 		goto err_pull;
949 
950 	return 0;
951 
952 err_pull:
953 	skb_pull(skb, sizeof(struct wmi_cmd_hdr));
954 	return ret;
955 }
956 
957 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
958 {
959 	struct ath10k *ar = arvif->ar;
960 	struct ath10k_skb_cb *cb;
961 	struct sk_buff *bcn;
962 	int ret;
963 
964 	spin_lock_bh(&ar->data_lock);
965 
966 	bcn = arvif->beacon;
967 
968 	if (!bcn)
969 		goto unlock;
970 
971 	cb = ATH10K_SKB_CB(bcn);
972 
973 	switch (arvif->beacon_state) {
974 	case ATH10K_BEACON_SENDING:
975 	case ATH10K_BEACON_SENT:
976 		break;
977 	case ATH10K_BEACON_SCHEDULED:
978 		arvif->beacon_state = ATH10K_BEACON_SENDING;
979 		spin_unlock_bh(&ar->data_lock);
980 
981 		ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
982 							arvif->vdev_id,
983 							bcn->data, bcn->len,
984 							cb->paddr,
985 							cb->bcn.dtim_zero,
986 							cb->bcn.deliver_cab);
987 
988 		spin_lock_bh(&ar->data_lock);
989 
990 		if (ret == 0)
991 			arvif->beacon_state = ATH10K_BEACON_SENT;
992 		else
993 			arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
994 	}
995 
996 unlock:
997 	spin_unlock_bh(&ar->data_lock);
998 }
999 
1000 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1001 				       struct ieee80211_vif *vif)
1002 {
1003 	struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
1004 
1005 	ath10k_wmi_tx_beacon_nowait(arvif);
1006 }
1007 
1008 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1009 {
1010 	ieee80211_iterate_active_interfaces_atomic(ar->hw,
1011 						   IEEE80211_IFACE_ITER_NORMAL,
1012 						   ath10k_wmi_tx_beacons_iter,
1013 						   NULL);
1014 }
1015 
1016 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
1017 {
1018 	/* try to send pending beacons first. they take priority */
1019 	ath10k_wmi_tx_beacons_nowait(ar);
1020 
1021 	wake_up(&ar->wmi.tx_credits_wq);
1022 }
1023 
1024 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
1025 {
1026 	int ret = -EOPNOTSUPP;
1027 
1028 	might_sleep();
1029 
1030 	if (cmd_id == WMI_CMD_UNSUPPORTED) {
1031 		ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
1032 			    cmd_id);
1033 		return ret;
1034 	}
1035 
1036 	wait_event_timeout(ar->wmi.tx_credits_wq, ({
1037 		/* try to send pending beacons first. they take priority */
1038 		ath10k_wmi_tx_beacons_nowait(ar);
1039 
1040 		ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
1041 
1042 		if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1043 			ret = -ESHUTDOWN;
1044 
1045 		(ret != -EAGAIN);
1046 	}), 3*HZ);
1047 
1048 	if (ret)
1049 		dev_kfree_skb_any(skb);
1050 
1051 	return ret;
1052 }
1053 
1054 static struct sk_buff *
1055 ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
1056 {
1057 	struct wmi_mgmt_tx_cmd *cmd;
1058 	struct ieee80211_hdr *hdr;
1059 	struct sk_buff *skb;
1060 	int len;
1061 	u32 buf_len = msdu->len;
1062 	u16 fc;
1063 
1064 	hdr = (struct ieee80211_hdr *)msdu->data;
1065 	fc = le16_to_cpu(hdr->frame_control);
1066 
1067 	if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
1068 		return ERR_PTR(-EINVAL);
1069 
1070 	len = sizeof(cmd->hdr) + msdu->len;
1071 
1072 	if ((ieee80211_is_action(hdr->frame_control) ||
1073 	     ieee80211_is_deauth(hdr->frame_control) ||
1074 	     ieee80211_is_disassoc(hdr->frame_control)) &&
1075 	     ieee80211_has_protected(hdr->frame_control)) {
1076 		len += IEEE80211_CCMP_MIC_LEN;
1077 		buf_len += IEEE80211_CCMP_MIC_LEN;
1078 	}
1079 
1080 	len = round_up(len, 4);
1081 
1082 	skb = ath10k_wmi_alloc_skb(ar, len);
1083 	if (!skb)
1084 		return ERR_PTR(-ENOMEM);
1085 
1086 	cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
1087 
1088 	cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(msdu)->vdev_id);
1089 	cmd->hdr.tx_rate = 0;
1090 	cmd->hdr.tx_power = 0;
1091 	cmd->hdr.buf_len = __cpu_to_le32(buf_len);
1092 
1093 	ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
1094 	memcpy(cmd->buf, msdu->data, msdu->len);
1095 
1096 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
1097 		   msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
1098 		   fc & IEEE80211_FCTL_STYPE);
1099 	trace_ath10k_tx_hdr(ar, skb->data, skb->len);
1100 	trace_ath10k_tx_payload(ar, skb->data, skb->len);
1101 
1102 	return skb;
1103 }
1104 
1105 static void ath10k_wmi_event_scan_started(struct ath10k *ar)
1106 {
1107 	lockdep_assert_held(&ar->data_lock);
1108 
1109 	switch (ar->scan.state) {
1110 	case ATH10K_SCAN_IDLE:
1111 	case ATH10K_SCAN_RUNNING:
1112 	case ATH10K_SCAN_ABORTING:
1113 		ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
1114 			    ath10k_scan_state_str(ar->scan.state),
1115 			    ar->scan.state);
1116 		break;
1117 	case ATH10K_SCAN_STARTING:
1118 		ar->scan.state = ATH10K_SCAN_RUNNING;
1119 
1120 		if (ar->scan.is_roc)
1121 			ieee80211_ready_on_channel(ar->hw);
1122 
1123 		complete(&ar->scan.started);
1124 		break;
1125 	}
1126 }
1127 
1128 static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
1129 {
1130 	lockdep_assert_held(&ar->data_lock);
1131 
1132 	switch (ar->scan.state) {
1133 	case ATH10K_SCAN_IDLE:
1134 	case ATH10K_SCAN_RUNNING:
1135 	case ATH10K_SCAN_ABORTING:
1136 		ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
1137 			    ath10k_scan_state_str(ar->scan.state),
1138 			    ar->scan.state);
1139 		break;
1140 	case ATH10K_SCAN_STARTING:
1141 		complete(&ar->scan.started);
1142 		__ath10k_scan_finish(ar);
1143 		break;
1144 	}
1145 }
1146 
1147 static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
1148 {
1149 	lockdep_assert_held(&ar->data_lock);
1150 
1151 	switch (ar->scan.state) {
1152 	case ATH10K_SCAN_IDLE:
1153 	case ATH10K_SCAN_STARTING:
1154 		/* One suspected reason scan can be completed while starting is
1155 		 * if firmware fails to deliver all scan events to the host,
1156 		 * e.g. when transport pipe is full. This has been observed
1157 		 * with spectral scan phyerr events starving wmi transport
1158 		 * pipe. In such case the "scan completed" event should be (and
1159 		 * is) ignored by the host as it may be just firmware's scan
1160 		 * state machine recovering.
1161 		 */
1162 		ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
1163 			    ath10k_scan_state_str(ar->scan.state),
1164 			    ar->scan.state);
1165 		break;
1166 	case ATH10K_SCAN_RUNNING:
1167 	case ATH10K_SCAN_ABORTING:
1168 		__ath10k_scan_finish(ar);
1169 		break;
1170 	}
1171 }
1172 
1173 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
1174 {
1175 	lockdep_assert_held(&ar->data_lock);
1176 
1177 	switch (ar->scan.state) {
1178 	case ATH10K_SCAN_IDLE:
1179 	case ATH10K_SCAN_STARTING:
1180 		ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
1181 			    ath10k_scan_state_str(ar->scan.state),
1182 			    ar->scan.state);
1183 		break;
1184 	case ATH10K_SCAN_RUNNING:
1185 	case ATH10K_SCAN_ABORTING:
1186 		ar->scan_channel = NULL;
1187 		break;
1188 	}
1189 }
1190 
1191 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
1192 {
1193 	lockdep_assert_held(&ar->data_lock);
1194 
1195 	switch (ar->scan.state) {
1196 	case ATH10K_SCAN_IDLE:
1197 	case ATH10K_SCAN_STARTING:
1198 		ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
1199 			    ath10k_scan_state_str(ar->scan.state),
1200 			    ar->scan.state);
1201 		break;
1202 	case ATH10K_SCAN_RUNNING:
1203 	case ATH10K_SCAN_ABORTING:
1204 		ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
1205 
1206 		if (ar->scan.is_roc && ar->scan.roc_freq == freq)
1207 			complete(&ar->scan.on_channel);
1208 		break;
1209 	}
1210 }
1211 
1212 static const char *
1213 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
1214 			       enum wmi_scan_completion_reason reason)
1215 {
1216 	switch (type) {
1217 	case WMI_SCAN_EVENT_STARTED:
1218 		return "started";
1219 	case WMI_SCAN_EVENT_COMPLETED:
1220 		switch (reason) {
1221 		case WMI_SCAN_REASON_COMPLETED:
1222 			return "completed";
1223 		case WMI_SCAN_REASON_CANCELLED:
1224 			return "completed [cancelled]";
1225 		case WMI_SCAN_REASON_PREEMPTED:
1226 			return "completed [preempted]";
1227 		case WMI_SCAN_REASON_TIMEDOUT:
1228 			return "completed [timedout]";
1229 		case WMI_SCAN_REASON_MAX:
1230 			break;
1231 		}
1232 		return "completed [unknown]";
1233 	case WMI_SCAN_EVENT_BSS_CHANNEL:
1234 		return "bss channel";
1235 	case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
1236 		return "foreign channel";
1237 	case WMI_SCAN_EVENT_DEQUEUED:
1238 		return "dequeued";
1239 	case WMI_SCAN_EVENT_PREEMPTED:
1240 		return "preempted";
1241 	case WMI_SCAN_EVENT_START_FAILED:
1242 		return "start failed";
1243 	default:
1244 		return "unknown";
1245 	}
1246 }
1247 
1248 static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
1249 				      struct wmi_scan_ev_arg *arg)
1250 {
1251 	struct wmi_scan_event *ev = (void *)skb->data;
1252 
1253 	if (skb->len < sizeof(*ev))
1254 		return -EPROTO;
1255 
1256 	skb_pull(skb, sizeof(*ev));
1257 	arg->event_type = ev->event_type;
1258 	arg->reason = ev->reason;
1259 	arg->channel_freq = ev->channel_freq;
1260 	arg->scan_req_id = ev->scan_req_id;
1261 	arg->scan_id = ev->scan_id;
1262 	arg->vdev_id = ev->vdev_id;
1263 
1264 	return 0;
1265 }
1266 
1267 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
1268 {
1269 	struct wmi_scan_ev_arg arg = {};
1270 	enum wmi_scan_event_type event_type;
1271 	enum wmi_scan_completion_reason reason;
1272 	u32 freq;
1273 	u32 req_id;
1274 	u32 scan_id;
1275 	u32 vdev_id;
1276 	int ret;
1277 
1278 	ret = ath10k_wmi_pull_scan(ar, skb, &arg);
1279 	if (ret) {
1280 		ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
1281 		return ret;
1282 	}
1283 
1284 	event_type = __le32_to_cpu(arg.event_type);
1285 	reason = __le32_to_cpu(arg.reason);
1286 	freq = __le32_to_cpu(arg.channel_freq);
1287 	req_id = __le32_to_cpu(arg.scan_req_id);
1288 	scan_id = __le32_to_cpu(arg.scan_id);
1289 	vdev_id = __le32_to_cpu(arg.vdev_id);
1290 
1291 	spin_lock_bh(&ar->data_lock);
1292 
1293 	ath10k_dbg(ar, ATH10K_DBG_WMI,
1294 		   "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
1295 		   ath10k_wmi_event_scan_type_str(event_type, reason),
1296 		   event_type, reason, freq, req_id, scan_id, vdev_id,
1297 		   ath10k_scan_state_str(ar->scan.state), ar->scan.state);
1298 
1299 	switch (event_type) {
1300 	case WMI_SCAN_EVENT_STARTED:
1301 		ath10k_wmi_event_scan_started(ar);
1302 		break;
1303 	case WMI_SCAN_EVENT_COMPLETED:
1304 		ath10k_wmi_event_scan_completed(ar);
1305 		break;
1306 	case WMI_SCAN_EVENT_BSS_CHANNEL:
1307 		ath10k_wmi_event_scan_bss_chan(ar);
1308 		break;
1309 	case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
1310 		ath10k_wmi_event_scan_foreign_chan(ar, freq);
1311 		break;
1312 	case WMI_SCAN_EVENT_START_FAILED:
1313 		ath10k_warn(ar, "received scan start failure event\n");
1314 		ath10k_wmi_event_scan_start_failed(ar);
1315 		break;
1316 	case WMI_SCAN_EVENT_DEQUEUED:
1317 	case WMI_SCAN_EVENT_PREEMPTED:
1318 	default:
1319 		break;
1320 	}
1321 
1322 	spin_unlock_bh(&ar->data_lock);
1323 	return 0;
1324 }
1325 
1326 static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
1327 {
1328 	enum ieee80211_band band;
1329 
1330 	switch (phy_mode) {
1331 	case MODE_11A:
1332 	case MODE_11NA_HT20:
1333 	case MODE_11NA_HT40:
1334 	case MODE_11AC_VHT20:
1335 	case MODE_11AC_VHT40:
1336 	case MODE_11AC_VHT80:
1337 		band = IEEE80211_BAND_5GHZ;
1338 		break;
1339 	case MODE_11G:
1340 	case MODE_11B:
1341 	case MODE_11GONLY:
1342 	case MODE_11NG_HT20:
1343 	case MODE_11NG_HT40:
1344 	case MODE_11AC_VHT20_2G:
1345 	case MODE_11AC_VHT40_2G:
1346 	case MODE_11AC_VHT80_2G:
1347 	default:
1348 		band = IEEE80211_BAND_2GHZ;
1349 	}
1350 
1351 	return band;
1352 }
1353 
1354 static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
1355 {
1356 	u8 rate_idx = 0;
1357 
1358 	/* rate in Kbps */
1359 	switch (rate) {
1360 	case 1000:
1361 		rate_idx = 0;
1362 		break;
1363 	case 2000:
1364 		rate_idx = 1;
1365 		break;
1366 	case 5500:
1367 		rate_idx = 2;
1368 		break;
1369 	case 11000:
1370 		rate_idx = 3;
1371 		break;
1372 	case 6000:
1373 		rate_idx = 4;
1374 		break;
1375 	case 9000:
1376 		rate_idx = 5;
1377 		break;
1378 	case 12000:
1379 		rate_idx = 6;
1380 		break;
1381 	case 18000:
1382 		rate_idx = 7;
1383 		break;
1384 	case 24000:
1385 		rate_idx = 8;
1386 		break;
1387 	case 36000:
1388 		rate_idx = 9;
1389 		break;
1390 	case 48000:
1391 		rate_idx = 10;
1392 		break;
1393 	case 54000:
1394 		rate_idx = 11;
1395 		break;
1396 	default:
1397 		break;
1398 	}
1399 
1400 	if (band == IEEE80211_BAND_5GHZ) {
1401 		if (rate_idx > 3)
1402 			/* Omit CCK rates */
1403 			rate_idx -= 4;
1404 		else
1405 			rate_idx = 0;
1406 	}
1407 
1408 	return rate_idx;
1409 }
1410 
1411 /* If keys are configured, HW decrypts all frames
1412  * with protected bit set. Mark such frames as decrypted.
1413  */
1414 static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
1415 					 struct sk_buff *skb,
1416 					 struct ieee80211_rx_status *status)
1417 {
1418 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1419 	unsigned int hdrlen;
1420 	bool peer_key;
1421 	u8 *addr, keyidx;
1422 
1423 	if (!ieee80211_is_auth(hdr->frame_control) ||
1424 	    !ieee80211_has_protected(hdr->frame_control))
1425 		return;
1426 
1427 	hdrlen = ieee80211_hdrlen(hdr->frame_control);
1428 	if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
1429 		return;
1430 
1431 	keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
1432 	addr = ieee80211_get_SA(hdr);
1433 
1434 	spin_lock_bh(&ar->data_lock);
1435 	peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
1436 	spin_unlock_bh(&ar->data_lock);
1437 
1438 	if (peer_key) {
1439 		ath10k_dbg(ar, ATH10K_DBG_MAC,
1440 			   "mac wep key present for peer %pM\n", addr);
1441 		status->flag |= RX_FLAG_DECRYPTED;
1442 	}
1443 }
1444 
1445 static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
1446 					 struct wmi_mgmt_rx_ev_arg *arg)
1447 {
1448 	struct wmi_mgmt_rx_event_v1 *ev_v1;
1449 	struct wmi_mgmt_rx_event_v2 *ev_v2;
1450 	struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
1451 	size_t pull_len;
1452 	u32 msdu_len;
1453 
1454 	if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
1455 		ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
1456 		ev_hdr = &ev_v2->hdr.v1;
1457 		pull_len = sizeof(*ev_v2);
1458 	} else {
1459 		ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
1460 		ev_hdr = &ev_v1->hdr;
1461 		pull_len = sizeof(*ev_v1);
1462 	}
1463 
1464 	if (skb->len < pull_len)
1465 		return -EPROTO;
1466 
1467 	skb_pull(skb, pull_len);
1468 	arg->channel = ev_hdr->channel;
1469 	arg->buf_len = ev_hdr->buf_len;
1470 	arg->status = ev_hdr->status;
1471 	arg->snr = ev_hdr->snr;
1472 	arg->phy_mode = ev_hdr->phy_mode;
1473 	arg->rate = ev_hdr->rate;
1474 
1475 	msdu_len = __le32_to_cpu(arg->buf_len);
1476 	if (skb->len < msdu_len)
1477 		return -EPROTO;
1478 
1479 	/* the WMI buffer might've ended up being padded to 4 bytes due to HTC
1480 	 * trailer with credit update. Trim the excess garbage.
1481 	 */
1482 	skb_trim(skb, msdu_len);
1483 
1484 	return 0;
1485 }
1486 
1487 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
1488 {
1489 	struct wmi_mgmt_rx_ev_arg arg = {};
1490 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
1491 	struct ieee80211_hdr *hdr;
1492 	u32 rx_status;
1493 	u32 channel;
1494 	u32 phy_mode;
1495 	u32 snr;
1496 	u32 rate;
1497 	u32 buf_len;
1498 	u16 fc;
1499 	int ret;
1500 
1501 	ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
1502 	if (ret) {
1503 		ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
1504 		return ret;
1505 	}
1506 
1507 	channel = __le32_to_cpu(arg.channel);
1508 	buf_len = __le32_to_cpu(arg.buf_len);
1509 	rx_status = __le32_to_cpu(arg.status);
1510 	snr = __le32_to_cpu(arg.snr);
1511 	phy_mode = __le32_to_cpu(arg.phy_mode);
1512 	rate = __le32_to_cpu(arg.rate);
1513 
1514 	memset(status, 0, sizeof(*status));
1515 
1516 	ath10k_dbg(ar, ATH10K_DBG_MGMT,
1517 		   "event mgmt rx status %08x\n", rx_status);
1518 
1519 	if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1520 		dev_kfree_skb(skb);
1521 		return 0;
1522 	}
1523 
1524 	if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
1525 		dev_kfree_skb(skb);
1526 		return 0;
1527 	}
1528 
1529 	if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
1530 		dev_kfree_skb(skb);
1531 		return 0;
1532 	}
1533 
1534 	if (rx_status & WMI_RX_STATUS_ERR_CRC) {
1535 		dev_kfree_skb(skb);
1536 		return 0;
1537 	}
1538 
1539 	if (rx_status & WMI_RX_STATUS_ERR_MIC)
1540 		status->flag |= RX_FLAG_MMIC_ERROR;
1541 
1542 	/* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
1543 	 * MODE_11B. This means phy_mode is not a reliable source for the band
1544 	 * of mgmt rx.
1545 	 */
1546 	if (channel >= 1 && channel <= 14) {
1547 		status->band = IEEE80211_BAND_2GHZ;
1548 	} else if (channel >= 36 && channel <= 165) {
1549 		status->band = IEEE80211_BAND_5GHZ;
1550 	} else {
1551 		/* Shouldn't happen unless list of advertised channels to
1552 		 * mac80211 has been changed.
1553 		 */
1554 		WARN_ON_ONCE(1);
1555 		dev_kfree_skb(skb);
1556 		return 0;
1557 	}
1558 
1559 	if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ)
1560 		ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
1561 
1562 	status->freq = ieee80211_channel_to_frequency(channel, status->band);
1563 	status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
1564 	status->rate_idx = get_rate_idx(rate, status->band);
1565 
1566 	hdr = (struct ieee80211_hdr *)skb->data;
1567 	fc = le16_to_cpu(hdr->frame_control);
1568 
1569 	ath10k_wmi_handle_wep_reauth(ar, skb, status);
1570 
1571 	/* FW delivers WEP Shared Auth frame with Protected Bit set and
1572 	 * encrypted payload. However in case of PMF it delivers decrypted
1573 	 * frames with Protected Bit set. */
1574 	if (ieee80211_has_protected(hdr->frame_control) &&
1575 	    !ieee80211_is_auth(hdr->frame_control)) {
1576 		status->flag |= RX_FLAG_DECRYPTED;
1577 
1578 		if (!ieee80211_is_action(hdr->frame_control) &&
1579 		    !ieee80211_is_deauth(hdr->frame_control) &&
1580 		    !ieee80211_is_disassoc(hdr->frame_control)) {
1581 			status->flag |= RX_FLAG_IV_STRIPPED |
1582 					RX_FLAG_MMIC_STRIPPED;
1583 			hdr->frame_control = __cpu_to_le16(fc &
1584 					~IEEE80211_FCTL_PROTECTED);
1585 		}
1586 	}
1587 
1588 	ath10k_dbg(ar, ATH10K_DBG_MGMT,
1589 		   "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
1590 		   skb, skb->len,
1591 		   fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
1592 
1593 	ath10k_dbg(ar, ATH10K_DBG_MGMT,
1594 		   "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
1595 		   status->freq, status->band, status->signal,
1596 		   status->rate_idx);
1597 
1598 	ieee80211_rx(ar->hw, skb);
1599 	return 0;
1600 }
1601 
1602 static int freq_to_idx(struct ath10k *ar, int freq)
1603 {
1604 	struct ieee80211_supported_band *sband;
1605 	int band, ch, idx = 0;
1606 
1607 	for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
1608 		sband = ar->hw->wiphy->bands[band];
1609 		if (!sband)
1610 			continue;
1611 
1612 		for (ch = 0; ch < sband->n_channels; ch++, idx++)
1613 			if (sband->channels[ch].center_freq == freq)
1614 				goto exit;
1615 	}
1616 
1617 exit:
1618 	return idx;
1619 }
1620 
1621 static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
1622 					 struct wmi_ch_info_ev_arg *arg)
1623 {
1624 	struct wmi_chan_info_event *ev = (void *)skb->data;
1625 
1626 	if (skb->len < sizeof(*ev))
1627 		return -EPROTO;
1628 
1629 	skb_pull(skb, sizeof(*ev));
1630 	arg->err_code = ev->err_code;
1631 	arg->freq = ev->freq;
1632 	arg->cmd_flags = ev->cmd_flags;
1633 	arg->noise_floor = ev->noise_floor;
1634 	arg->rx_clear_count = ev->rx_clear_count;
1635 	arg->cycle_count = ev->cycle_count;
1636 
1637 	return 0;
1638 }
1639 
1640 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1641 {
1642 	struct wmi_ch_info_ev_arg arg = {};
1643 	struct survey_info *survey;
1644 	u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1645 	int idx, ret;
1646 
1647 	ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
1648 	if (ret) {
1649 		ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
1650 		return;
1651 	}
1652 
1653 	err_code = __le32_to_cpu(arg.err_code);
1654 	freq = __le32_to_cpu(arg.freq);
1655 	cmd_flags = __le32_to_cpu(arg.cmd_flags);
1656 	noise_floor = __le32_to_cpu(arg.noise_floor);
1657 	rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
1658 	cycle_count = __le32_to_cpu(arg.cycle_count);
1659 
1660 	ath10k_dbg(ar, ATH10K_DBG_WMI,
1661 		   "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1662 		   err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1663 		   cycle_count);
1664 
1665 	spin_lock_bh(&ar->data_lock);
1666 
1667 	switch (ar->scan.state) {
1668 	case ATH10K_SCAN_IDLE:
1669 	case ATH10K_SCAN_STARTING:
1670 		ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
1671 		goto exit;
1672 	case ATH10K_SCAN_RUNNING:
1673 	case ATH10K_SCAN_ABORTING:
1674 		break;
1675 	}
1676 
1677 	idx = freq_to_idx(ar, freq);
1678 	if (idx >= ARRAY_SIZE(ar->survey)) {
1679 		ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
1680 			    freq, idx);
1681 		goto exit;
1682 	}
1683 
1684 	if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1685 		/* During scanning chan info is reported twice for each
1686 		 * visited channel. The reported cycle count is global
1687 		 * and per-channel cycle count must be calculated */
1688 
1689 		cycle_count -= ar->survey_last_cycle_count;
1690 		rx_clear_count -= ar->survey_last_rx_clear_count;
1691 
1692 		survey = &ar->survey[idx];
1693 		survey->time = WMI_CHAN_INFO_MSEC(cycle_count);
1694 		survey->time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1695 		survey->noise = noise_floor;
1696 		survey->filled = SURVEY_INFO_TIME |
1697 				 SURVEY_INFO_TIME_RX |
1698 				 SURVEY_INFO_NOISE_DBM;
1699 	}
1700 
1701 	ar->survey_last_rx_clear_count = rx_clear_count;
1702 	ar->survey_last_cycle_count = cycle_count;
1703 
1704 exit:
1705 	spin_unlock_bh(&ar->data_lock);
1706 }
1707 
1708 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1709 {
1710 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
1711 }
1712 
1713 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
1714 {
1715 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
1716 		   skb->len);
1717 
1718 	trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
1719 
1720 	return 0;
1721 }
1722 
1723 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
1724 				     struct ath10k_fw_stats_pdev *dst)
1725 {
1726 	dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
1727 	dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
1728 	dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
1729 	dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
1730 	dst->cycle_count = __le32_to_cpu(src->cycle_count);
1731 	dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
1732 	dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
1733 }
1734 
1735 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
1736 				   struct ath10k_fw_stats_pdev *dst)
1737 {
1738 	dst->comp_queued = __le32_to_cpu(src->comp_queued);
1739 	dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
1740 	dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
1741 	dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
1742 	dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
1743 	dst->local_enqued = __le32_to_cpu(src->local_enqued);
1744 	dst->local_freed = __le32_to_cpu(src->local_freed);
1745 	dst->hw_queued = __le32_to_cpu(src->hw_queued);
1746 	dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
1747 	dst->underrun = __le32_to_cpu(src->underrun);
1748 	dst->tx_abort = __le32_to_cpu(src->tx_abort);
1749 	dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
1750 	dst->tx_ko = __le32_to_cpu(src->tx_ko);
1751 	dst->data_rc = __le32_to_cpu(src->data_rc);
1752 	dst->self_triggers = __le32_to_cpu(src->self_triggers);
1753 	dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
1754 	dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
1755 	dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
1756 	dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
1757 	dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
1758 	dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
1759 	dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
1760 }
1761 
1762 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
1763 				   struct ath10k_fw_stats_pdev *dst)
1764 {
1765 	dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
1766 	dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
1767 	dst->r0_frags = __le32_to_cpu(src->r0_frags);
1768 	dst->r1_frags = __le32_to_cpu(src->r1_frags);
1769 	dst->r2_frags = __le32_to_cpu(src->r2_frags);
1770 	dst->r3_frags = __le32_to_cpu(src->r3_frags);
1771 	dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
1772 	dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
1773 	dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
1774 	dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
1775 	dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
1776 	dst->phy_errs = __le32_to_cpu(src->phy_errs);
1777 	dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
1778 	dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
1779 }
1780 
1781 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
1782 				      struct ath10k_fw_stats_pdev *dst)
1783 {
1784 	dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
1785 	dst->rts_bad = __le32_to_cpu(src->rts_bad);
1786 	dst->rts_good = __le32_to_cpu(src->rts_good);
1787 	dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
1788 	dst->no_beacons = __le32_to_cpu(src->no_beacons);
1789 	dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
1790 }
1791 
1792 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
1793 				struct ath10k_fw_stats_peer *dst)
1794 {
1795 	ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
1796 	dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
1797 	dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
1798 }
1799 
1800 static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
1801 					    struct sk_buff *skb,
1802 					    struct ath10k_fw_stats *stats)
1803 {
1804 	const struct wmi_stats_event *ev = (void *)skb->data;
1805 	u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
1806 	int i;
1807 
1808 	if (!skb_pull(skb, sizeof(*ev)))
1809 		return -EPROTO;
1810 
1811 	num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1812 	num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1813 	num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1814 
1815 	for (i = 0; i < num_pdev_stats; i++) {
1816 		const struct wmi_pdev_stats *src;
1817 		struct ath10k_fw_stats_pdev *dst;
1818 
1819 		src = (void *)skb->data;
1820 		if (!skb_pull(skb, sizeof(*src)))
1821 			return -EPROTO;
1822 
1823 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1824 		if (!dst)
1825 			continue;
1826 
1827 		ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
1828 		ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
1829 		ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
1830 
1831 		list_add_tail(&dst->list, &stats->pdevs);
1832 	}
1833 
1834 	/* fw doesn't implement vdev stats */
1835 
1836 	for (i = 0; i < num_peer_stats; i++) {
1837 		const struct wmi_peer_stats *src;
1838 		struct ath10k_fw_stats_peer *dst;
1839 
1840 		src = (void *)skb->data;
1841 		if (!skb_pull(skb, sizeof(*src)))
1842 			return -EPROTO;
1843 
1844 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1845 		if (!dst)
1846 			continue;
1847 
1848 		ath10k_wmi_pull_peer_stats(src, dst);
1849 		list_add_tail(&dst->list, &stats->peers);
1850 	}
1851 
1852 	return 0;
1853 }
1854 
1855 static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
1856 					   struct sk_buff *skb,
1857 					   struct ath10k_fw_stats *stats)
1858 {
1859 	const struct wmi_stats_event *ev = (void *)skb->data;
1860 	u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
1861 	int i;
1862 
1863 	if (!skb_pull(skb, sizeof(*ev)))
1864 		return -EPROTO;
1865 
1866 	num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1867 	num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1868 	num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1869 
1870 	for (i = 0; i < num_pdev_stats; i++) {
1871 		const struct wmi_10x_pdev_stats *src;
1872 		struct ath10k_fw_stats_pdev *dst;
1873 
1874 		src = (void *)skb->data;
1875 		if (!skb_pull(skb, sizeof(*src)))
1876 			return -EPROTO;
1877 
1878 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1879 		if (!dst)
1880 			continue;
1881 
1882 		ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
1883 		ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
1884 		ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
1885 		ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
1886 
1887 		list_add_tail(&dst->list, &stats->pdevs);
1888 	}
1889 
1890 	/* fw doesn't implement vdev stats */
1891 
1892 	for (i = 0; i < num_peer_stats; i++) {
1893 		const struct wmi_10x_peer_stats *src;
1894 		struct ath10k_fw_stats_peer *dst;
1895 
1896 		src = (void *)skb->data;
1897 		if (!skb_pull(skb, sizeof(*src)))
1898 			return -EPROTO;
1899 
1900 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1901 		if (!dst)
1902 			continue;
1903 
1904 		ath10k_wmi_pull_peer_stats(&src->old, dst);
1905 
1906 		dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
1907 
1908 		list_add_tail(&dst->list, &stats->peers);
1909 	}
1910 
1911 	return 0;
1912 }
1913 
1914 static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
1915 					    struct sk_buff *skb,
1916 					    struct ath10k_fw_stats *stats)
1917 {
1918 	const struct wmi_10_2_stats_event *ev = (void *)skb->data;
1919 	u32 num_pdev_stats;
1920 	u32 num_pdev_ext_stats;
1921 	u32 num_vdev_stats;
1922 	u32 num_peer_stats;
1923 	int i;
1924 
1925 	if (!skb_pull(skb, sizeof(*ev)))
1926 		return -EPROTO;
1927 
1928 	num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1929 	num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
1930 	num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1931 	num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1932 
1933 	for (i = 0; i < num_pdev_stats; i++) {
1934 		const struct wmi_10_2_pdev_stats *src;
1935 		struct ath10k_fw_stats_pdev *dst;
1936 
1937 		src = (void *)skb->data;
1938 		if (!skb_pull(skb, sizeof(*src)))
1939 			return -EPROTO;
1940 
1941 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1942 		if (!dst)
1943 			continue;
1944 
1945 		ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
1946 		ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
1947 		ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
1948 		ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
1949 		/* FIXME: expose 10.2 specific values */
1950 
1951 		list_add_tail(&dst->list, &stats->pdevs);
1952 	}
1953 
1954 	for (i = 0; i < num_pdev_ext_stats; i++) {
1955 		const struct wmi_10_2_pdev_ext_stats *src;
1956 
1957 		src = (void *)skb->data;
1958 		if (!skb_pull(skb, sizeof(*src)))
1959 			return -EPROTO;
1960 
1961 		/* FIXME: expose values to userspace
1962 		 *
1963 		 * Note: Even though this loop seems to do nothing it is
1964 		 * required to parse following sub-structures properly.
1965 		 */
1966 	}
1967 
1968 	/* fw doesn't implement vdev stats */
1969 
1970 	for (i = 0; i < num_peer_stats; i++) {
1971 		const struct wmi_10_2_peer_stats *src;
1972 		struct ath10k_fw_stats_peer *dst;
1973 
1974 		src = (void *)skb->data;
1975 		if (!skb_pull(skb, sizeof(*src)))
1976 			return -EPROTO;
1977 
1978 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1979 		if (!dst)
1980 			continue;
1981 
1982 		ath10k_wmi_pull_peer_stats(&src->old, dst);
1983 
1984 		dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
1985 		/* FIXME: expose 10.2 specific values */
1986 
1987 		list_add_tail(&dst->list, &stats->peers);
1988 	}
1989 
1990 	return 0;
1991 }
1992 
1993 static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
1994 					      struct sk_buff *skb,
1995 					      struct ath10k_fw_stats *stats)
1996 {
1997 	const struct wmi_10_2_stats_event *ev = (void *)skb->data;
1998 	u32 num_pdev_stats;
1999 	u32 num_pdev_ext_stats;
2000 	u32 num_vdev_stats;
2001 	u32 num_peer_stats;
2002 	int i;
2003 
2004 	if (!skb_pull(skb, sizeof(*ev)))
2005 		return -EPROTO;
2006 
2007 	num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2008 	num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2009 	num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2010 	num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2011 
2012 	for (i = 0; i < num_pdev_stats; i++) {
2013 		const struct wmi_10_2_pdev_stats *src;
2014 		struct ath10k_fw_stats_pdev *dst;
2015 
2016 		src = (void *)skb->data;
2017 		if (!skb_pull(skb, sizeof(*src)))
2018 			return -EPROTO;
2019 
2020 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2021 		if (!dst)
2022 			continue;
2023 
2024 		ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2025 		ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2026 		ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2027 		ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2028 		/* FIXME: expose 10.2 specific values */
2029 
2030 		list_add_tail(&dst->list, &stats->pdevs);
2031 	}
2032 
2033 	for (i = 0; i < num_pdev_ext_stats; i++) {
2034 		const struct wmi_10_2_pdev_ext_stats *src;
2035 
2036 		src = (void *)skb->data;
2037 		if (!skb_pull(skb, sizeof(*src)))
2038 			return -EPROTO;
2039 
2040 		/* FIXME: expose values to userspace
2041 		 *
2042 		 * Note: Even though this loop seems to do nothing it is
2043 		 * required to parse following sub-structures properly.
2044 		 */
2045 	}
2046 
2047 	/* fw doesn't implement vdev stats */
2048 
2049 	for (i = 0; i < num_peer_stats; i++) {
2050 		const struct wmi_10_2_4_peer_stats *src;
2051 		struct ath10k_fw_stats_peer *dst;
2052 
2053 		src = (void *)skb->data;
2054 		if (!skb_pull(skb, sizeof(*src)))
2055 			return -EPROTO;
2056 
2057 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2058 		if (!dst)
2059 			continue;
2060 
2061 		ath10k_wmi_pull_peer_stats(&src->common.old, dst);
2062 
2063 		dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
2064 		/* FIXME: expose 10.2 specific values */
2065 
2066 		list_add_tail(&dst->list, &stats->peers);
2067 	}
2068 
2069 	return 0;
2070 }
2071 
2072 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
2073 {
2074 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
2075 	ath10k_debug_fw_stats_process(ar, skb);
2076 }
2077 
2078 static int
2079 ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
2080 				 struct wmi_vdev_start_ev_arg *arg)
2081 {
2082 	struct wmi_vdev_start_response_event *ev = (void *)skb->data;
2083 
2084 	if (skb->len < sizeof(*ev))
2085 		return -EPROTO;
2086 
2087 	skb_pull(skb, sizeof(*ev));
2088 	arg->vdev_id = ev->vdev_id;
2089 	arg->req_id = ev->req_id;
2090 	arg->resp_type = ev->resp_type;
2091 	arg->status = ev->status;
2092 
2093 	return 0;
2094 }
2095 
2096 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
2097 {
2098 	struct wmi_vdev_start_ev_arg arg = {};
2099 	int ret;
2100 
2101 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
2102 
2103 	ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
2104 	if (ret) {
2105 		ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
2106 		return;
2107 	}
2108 
2109 	if (WARN_ON(__le32_to_cpu(arg.status)))
2110 		return;
2111 
2112 	complete(&ar->vdev_setup_done);
2113 }
2114 
2115 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
2116 {
2117 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
2118 	complete(&ar->vdev_setup_done);
2119 }
2120 
2121 static int
2122 ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
2123 				struct wmi_peer_kick_ev_arg *arg)
2124 {
2125 	struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
2126 
2127 	if (skb->len < sizeof(*ev))
2128 		return -EPROTO;
2129 
2130 	skb_pull(skb, sizeof(*ev));
2131 	arg->mac_addr = ev->peer_macaddr.addr;
2132 
2133 	return 0;
2134 }
2135 
2136 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
2137 {
2138 	struct wmi_peer_kick_ev_arg arg = {};
2139 	struct ieee80211_sta *sta;
2140 	int ret;
2141 
2142 	ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
2143 	if (ret) {
2144 		ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
2145 			    ret);
2146 		return;
2147 	}
2148 
2149 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
2150 		   arg.mac_addr);
2151 
2152 	rcu_read_lock();
2153 
2154 	sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
2155 	if (!sta) {
2156 		ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
2157 			    arg.mac_addr);
2158 		goto exit;
2159 	}
2160 
2161 	ieee80211_report_low_ack(sta, 10);
2162 
2163 exit:
2164 	rcu_read_unlock();
2165 }
2166 
2167 /*
2168  * FIXME
2169  *
2170  * We don't report to mac80211 sleep state of connected
2171  * stations. Due to this mac80211 can't fill in TIM IE
2172  * correctly.
2173  *
2174  * I know of no way of getting nullfunc frames that contain
2175  * sleep transition from connected stations - these do not
2176  * seem to be sent from the target to the host. There also
2177  * doesn't seem to be a dedicated event for that. So the
2178  * only way left to do this would be to read tim_bitmap
2179  * during SWBA.
2180  *
2181  * We could probably try using tim_bitmap from SWBA to tell
2182  * mac80211 which stations are asleep and which are not. The
2183  * problem here is calling mac80211 functions so many times
2184  * could take too long and make us miss the time to submit
2185  * the beacon to the target.
2186  *
2187  * So as a workaround we try to extend the TIM IE if there
2188  * is unicast buffered for stations with aid > 7 and fill it
2189  * in ourselves.
2190  */
2191 static void ath10k_wmi_update_tim(struct ath10k *ar,
2192 				  struct ath10k_vif *arvif,
2193 				  struct sk_buff *bcn,
2194 				  const struct wmi_tim_info *tim_info)
2195 {
2196 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
2197 	struct ieee80211_tim_ie *tim;
2198 	u8 *ies, *ie;
2199 	u8 ie_len, pvm_len;
2200 	__le32 t;
2201 	u32 v;
2202 
2203 	/* if next SWBA has no tim_changed the tim_bitmap is garbage.
2204 	 * we must copy the bitmap upon change and reuse it later */
2205 	if (__le32_to_cpu(tim_info->tim_changed)) {
2206 		int i;
2207 
2208 		BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
2209 			     sizeof(tim_info->tim_bitmap));
2210 
2211 		for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
2212 			t = tim_info->tim_bitmap[i / 4];
2213 			v = __le32_to_cpu(t);
2214 			arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
2215 		}
2216 
2217 		/* FW reports either length 0 or 16
2218 		 * so we calculate this on our own */
2219 		arvif->u.ap.tim_len = 0;
2220 		for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
2221 			if (arvif->u.ap.tim_bitmap[i])
2222 				arvif->u.ap.tim_len = i;
2223 
2224 		arvif->u.ap.tim_len++;
2225 	}
2226 
2227 	ies = bcn->data;
2228 	ies += ieee80211_hdrlen(hdr->frame_control);
2229 	ies += 12; /* fixed parameters */
2230 
2231 	ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
2232 				    (u8 *)skb_tail_pointer(bcn) - ies);
2233 	if (!ie) {
2234 		if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
2235 			ath10k_warn(ar, "no tim ie found;\n");
2236 		return;
2237 	}
2238 
2239 	tim = (void *)ie + 2;
2240 	ie_len = ie[1];
2241 	pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
2242 
2243 	if (pvm_len < arvif->u.ap.tim_len) {
2244 		int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
2245 		int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
2246 		void *next_ie = ie + 2 + ie_len;
2247 
2248 		if (skb_put(bcn, expand_size)) {
2249 			memmove(next_ie + expand_size, next_ie, move_size);
2250 
2251 			ie[1] += expand_size;
2252 			ie_len += expand_size;
2253 			pvm_len += expand_size;
2254 		} else {
2255 			ath10k_warn(ar, "tim expansion failed\n");
2256 		}
2257 	}
2258 
2259 	if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
2260 		ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
2261 		return;
2262 	}
2263 
2264 	tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
2265 	memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
2266 
2267 	if (tim->dtim_count == 0) {
2268 		ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
2269 
2270 		if (__le32_to_cpu(tim_info->tim_mcast) == 1)
2271 			ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
2272 	}
2273 
2274 	ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
2275 		   tim->dtim_count, tim->dtim_period,
2276 		   tim->bitmap_ctrl, pvm_len);
2277 }
2278 
2279 static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
2280 				   const struct wmi_p2p_noa_info *noa)
2281 {
2282 	struct ieee80211_p2p_noa_attr *noa_attr;
2283 	u8  ctwindow_oppps = noa->ctwindow_oppps;
2284 	u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
2285 	bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
2286 	__le16 *noa_attr_len;
2287 	u16 attr_len;
2288 	u8 noa_descriptors = noa->num_descriptors;
2289 	int i;
2290 
2291 	/* P2P IE */
2292 	data[0] = WLAN_EID_VENDOR_SPECIFIC;
2293 	data[1] = len - 2;
2294 	data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
2295 	data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
2296 	data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
2297 	data[5] = WLAN_OUI_TYPE_WFA_P2P;
2298 
2299 	/* NOA ATTR */
2300 	data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
2301 	noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
2302 	noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
2303 
2304 	noa_attr->index = noa->index;
2305 	noa_attr->oppps_ctwindow = ctwindow;
2306 	if (oppps)
2307 		noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
2308 
2309 	for (i = 0; i < noa_descriptors; i++) {
2310 		noa_attr->desc[i].count =
2311 			__le32_to_cpu(noa->descriptors[i].type_count);
2312 		noa_attr->desc[i].duration = noa->descriptors[i].duration;
2313 		noa_attr->desc[i].interval = noa->descriptors[i].interval;
2314 		noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
2315 	}
2316 
2317 	attr_len = 2; /* index + oppps_ctwindow */
2318 	attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
2319 	*noa_attr_len = __cpu_to_le16(attr_len);
2320 }
2321 
2322 static u32 ath10k_p2p_calc_noa_ie_len(const struct wmi_p2p_noa_info *noa)
2323 {
2324 	u32 len = 0;
2325 	u8 noa_descriptors = noa->num_descriptors;
2326 	u8 opp_ps_info = noa->ctwindow_oppps;
2327 	bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
2328 
2329 	if (!noa_descriptors && !opps_enabled)
2330 		return len;
2331 
2332 	len += 1 + 1 + 4; /* EID + len + OUI */
2333 	len += 1 + 2; /* noa attr  + attr len */
2334 	len += 1 + 1; /* index + oppps_ctwindow */
2335 	len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
2336 
2337 	return len;
2338 }
2339 
2340 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
2341 				  struct sk_buff *bcn,
2342 				  const struct wmi_p2p_noa_info *noa)
2343 {
2344 	u8 *new_data, *old_data = arvif->u.ap.noa_data;
2345 	u32 new_len;
2346 
2347 	if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
2348 		return;
2349 
2350 	ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
2351 	if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
2352 		new_len = ath10k_p2p_calc_noa_ie_len(noa);
2353 		if (!new_len)
2354 			goto cleanup;
2355 
2356 		new_data = kmalloc(new_len, GFP_ATOMIC);
2357 		if (!new_data)
2358 			goto cleanup;
2359 
2360 		ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
2361 
2362 		spin_lock_bh(&ar->data_lock);
2363 		arvif->u.ap.noa_data = new_data;
2364 		arvif->u.ap.noa_len = new_len;
2365 		spin_unlock_bh(&ar->data_lock);
2366 		kfree(old_data);
2367 	}
2368 
2369 	if (arvif->u.ap.noa_data)
2370 		if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
2371 			memcpy(skb_put(bcn, arvif->u.ap.noa_len),
2372 			       arvif->u.ap.noa_data,
2373 			       arvif->u.ap.noa_len);
2374 	return;
2375 
2376 cleanup:
2377 	spin_lock_bh(&ar->data_lock);
2378 	arvif->u.ap.noa_data = NULL;
2379 	arvif->u.ap.noa_len = 0;
2380 	spin_unlock_bh(&ar->data_lock);
2381 	kfree(old_data);
2382 }
2383 
2384 static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
2385 				      struct wmi_swba_ev_arg *arg)
2386 {
2387 	struct wmi_host_swba_event *ev = (void *)skb->data;
2388 	u32 map;
2389 	size_t i;
2390 
2391 	if (skb->len < sizeof(*ev))
2392 		return -EPROTO;
2393 
2394 	skb_pull(skb, sizeof(*ev));
2395 	arg->vdev_map = ev->vdev_map;
2396 
2397 	for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
2398 		if (!(map & BIT(0)))
2399 			continue;
2400 
2401 		/* If this happens there were some changes in firmware and
2402 		 * ath10k should update the max size of tim_info array.
2403 		 */
2404 		if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
2405 			break;
2406 
2407 		arg->tim_info[i] = &ev->bcn_info[i].tim_info;
2408 		arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
2409 		i++;
2410 	}
2411 
2412 	return 0;
2413 }
2414 
2415 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
2416 {
2417 	struct wmi_swba_ev_arg arg = {};
2418 	u32 map;
2419 	int i = -1;
2420 	const struct wmi_tim_info *tim_info;
2421 	const struct wmi_p2p_noa_info *noa_info;
2422 	struct ath10k_vif *arvif;
2423 	struct sk_buff *bcn;
2424 	dma_addr_t paddr;
2425 	int ret, vdev_id = 0;
2426 
2427 	ret = ath10k_wmi_pull_swba(ar, skb, &arg);
2428 	if (ret) {
2429 		ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
2430 		return;
2431 	}
2432 
2433 	map = __le32_to_cpu(arg.vdev_map);
2434 
2435 	ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
2436 		   map);
2437 
2438 	for (; map; map >>= 1, vdev_id++) {
2439 		if (!(map & 0x1))
2440 			continue;
2441 
2442 		i++;
2443 
2444 		if (i >= WMI_MAX_AP_VDEV) {
2445 			ath10k_warn(ar, "swba has corrupted vdev map\n");
2446 			break;
2447 		}
2448 
2449 		tim_info = arg.tim_info[i];
2450 		noa_info = arg.noa_info[i];
2451 
2452 		ath10k_dbg(ar, ATH10K_DBG_MGMT,
2453 			   "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
2454 			   i,
2455 			   __le32_to_cpu(tim_info->tim_len),
2456 			   __le32_to_cpu(tim_info->tim_mcast),
2457 			   __le32_to_cpu(tim_info->tim_changed),
2458 			   __le32_to_cpu(tim_info->tim_num_ps_pending),
2459 			   __le32_to_cpu(tim_info->tim_bitmap[3]),
2460 			   __le32_to_cpu(tim_info->tim_bitmap[2]),
2461 			   __le32_to_cpu(tim_info->tim_bitmap[1]),
2462 			   __le32_to_cpu(tim_info->tim_bitmap[0]));
2463 
2464 		arvif = ath10k_get_arvif(ar, vdev_id);
2465 		if (arvif == NULL) {
2466 			ath10k_warn(ar, "no vif for vdev_id %d found\n",
2467 				    vdev_id);
2468 			continue;
2469 		}
2470 
2471 		/* There are no completions for beacons so wait for next SWBA
2472 		 * before telling mac80211 to decrement CSA counter
2473 		 *
2474 		 * Once CSA counter is completed stop sending beacons until
2475 		 * actual channel switch is done */
2476 		if (arvif->vif->csa_active &&
2477 		    ieee80211_csa_is_complete(arvif->vif)) {
2478 			ieee80211_csa_finish(arvif->vif);
2479 			continue;
2480 		}
2481 
2482 		bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
2483 		if (!bcn) {
2484 			ath10k_warn(ar, "could not get mac80211 beacon\n");
2485 			continue;
2486 		}
2487 
2488 		ath10k_tx_h_seq_no(arvif->vif, bcn);
2489 		ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
2490 		ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
2491 
2492 		spin_lock_bh(&ar->data_lock);
2493 
2494 		if (arvif->beacon) {
2495 			switch (arvif->beacon_state) {
2496 			case ATH10K_BEACON_SENT:
2497 				break;
2498 			case ATH10K_BEACON_SCHEDULED:
2499 				ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
2500 					    arvif->vdev_id);
2501 				break;
2502 			case ATH10K_BEACON_SENDING:
2503 				ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
2504 					    arvif->vdev_id);
2505 				dev_kfree_skb(bcn);
2506 				goto skip;
2507 			}
2508 
2509 			ath10k_mac_vif_beacon_free(arvif);
2510 		}
2511 
2512 		if (!arvif->beacon_buf) {
2513 			paddr = dma_map_single(arvif->ar->dev, bcn->data,
2514 					       bcn->len, DMA_TO_DEVICE);
2515 			ret = dma_mapping_error(arvif->ar->dev, paddr);
2516 			if (ret) {
2517 				ath10k_warn(ar, "failed to map beacon: %d\n",
2518 					    ret);
2519 				dev_kfree_skb_any(bcn);
2520 				goto skip;
2521 			}
2522 
2523 			ATH10K_SKB_CB(bcn)->paddr = paddr;
2524 		} else {
2525 			if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
2526 				ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
2527 					    bcn->len, IEEE80211_MAX_FRAME_LEN);
2528 				skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
2529 			}
2530 			memcpy(arvif->beacon_buf, bcn->data, bcn->len);
2531 			ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
2532 		}
2533 
2534 		arvif->beacon = bcn;
2535 		arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
2536 
2537 		trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
2538 		trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
2539 
2540 skip:
2541 		spin_unlock_bh(&ar->data_lock);
2542 	}
2543 
2544 	ath10k_wmi_tx_beacons_nowait(ar);
2545 }
2546 
2547 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
2548 {
2549 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
2550 }
2551 
2552 static void ath10k_dfs_radar_report(struct ath10k *ar,
2553 				    const struct wmi_phyerr *phyerr,
2554 				    const struct phyerr_radar_report *rr,
2555 				    u64 tsf)
2556 {
2557 	u32 reg0, reg1, tsf32l;
2558 	struct pulse_event pe;
2559 	u64 tsf64;
2560 	u8 rssi, width;
2561 
2562 	reg0 = __le32_to_cpu(rr->reg0);
2563 	reg1 = __le32_to_cpu(rr->reg1);
2564 
2565 	ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2566 		   "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
2567 		   MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
2568 		   MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
2569 		   MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
2570 		   MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
2571 	ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2572 		   "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
2573 		   MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
2574 		   MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
2575 		   MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
2576 		   MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
2577 		   MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
2578 	ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2579 		   "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
2580 		   MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
2581 		   MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
2582 
2583 	if (!ar->dfs_detector)
2584 		return;
2585 
2586 	/* report event to DFS pattern detector */
2587 	tsf32l = __le32_to_cpu(phyerr->tsf_timestamp);
2588 	tsf64 = tsf & (~0xFFFFFFFFULL);
2589 	tsf64 |= tsf32l;
2590 
2591 	width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
2592 	rssi = phyerr->rssi_combined;
2593 
2594 	/* hardware store this as 8 bit signed value,
2595 	 * set to zero if negative number
2596 	 */
2597 	if (rssi & 0x80)
2598 		rssi = 0;
2599 
2600 	pe.ts = tsf64;
2601 	pe.freq = ar->hw->conf.chandef.chan->center_freq;
2602 	pe.width = width;
2603 	pe.rssi = rssi;
2604 
2605 	ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2606 		   "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
2607 		   pe.freq, pe.width, pe.rssi, pe.ts);
2608 
2609 	ATH10K_DFS_STAT_INC(ar, pulses_detected);
2610 
2611 	if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
2612 		ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2613 			   "dfs no pulse pattern detected, yet\n");
2614 		return;
2615 	}
2616 
2617 	ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
2618 	ATH10K_DFS_STAT_INC(ar, radar_detected);
2619 
2620 	/* Control radar events reporting in debugfs file
2621 	   dfs_block_radar_events */
2622 	if (ar->dfs_block_radar_events) {
2623 		ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
2624 		return;
2625 	}
2626 
2627 	ieee80211_radar_detected(ar->hw);
2628 }
2629 
2630 static int ath10k_dfs_fft_report(struct ath10k *ar,
2631 				 const struct wmi_phyerr *phyerr,
2632 				 const struct phyerr_fft_report *fftr,
2633 				 u64 tsf)
2634 {
2635 	u32 reg0, reg1;
2636 	u8 rssi, peak_mag;
2637 
2638 	reg0 = __le32_to_cpu(fftr->reg0);
2639 	reg1 = __le32_to_cpu(fftr->reg1);
2640 	rssi = phyerr->rssi_combined;
2641 
2642 	ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2643 		   "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
2644 		   MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
2645 		   MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
2646 		   MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
2647 		   MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
2648 	ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2649 		   "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
2650 		   MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
2651 		   MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
2652 		   MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
2653 		   MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
2654 
2655 	peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
2656 
2657 	/* false event detection */
2658 	if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
2659 	    peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
2660 		ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
2661 		ATH10K_DFS_STAT_INC(ar, pulses_discarded);
2662 		return -EINVAL;
2663 	}
2664 
2665 	return 0;
2666 }
2667 
2668 void ath10k_wmi_event_dfs(struct ath10k *ar,
2669 			  const struct wmi_phyerr *phyerr,
2670 			  u64 tsf)
2671 {
2672 	int buf_len, tlv_len, res, i = 0;
2673 	const struct phyerr_tlv *tlv;
2674 	const struct phyerr_radar_report *rr;
2675 	const struct phyerr_fft_report *fftr;
2676 	const u8 *tlv_buf;
2677 
2678 	buf_len = __le32_to_cpu(phyerr->buf_len);
2679 	ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2680 		   "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
2681 		   phyerr->phy_err_code, phyerr->rssi_combined,
2682 		   __le32_to_cpu(phyerr->tsf_timestamp), tsf, buf_len);
2683 
2684 	/* Skip event if DFS disabled */
2685 	if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
2686 		return;
2687 
2688 	ATH10K_DFS_STAT_INC(ar, pulses_total);
2689 
2690 	while (i < buf_len) {
2691 		if (i + sizeof(*tlv) > buf_len) {
2692 			ath10k_warn(ar, "too short buf for tlv header (%d)\n",
2693 				    i);
2694 			return;
2695 		}
2696 
2697 		tlv = (struct phyerr_tlv *)&phyerr->buf[i];
2698 		tlv_len = __le16_to_cpu(tlv->len);
2699 		tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
2700 		ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2701 			   "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
2702 			   tlv_len, tlv->tag, tlv->sig);
2703 
2704 		switch (tlv->tag) {
2705 		case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
2706 			if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
2707 				ath10k_warn(ar, "too short radar pulse summary (%d)\n",
2708 					    i);
2709 				return;
2710 			}
2711 
2712 			rr = (struct phyerr_radar_report *)tlv_buf;
2713 			ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
2714 			break;
2715 		case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
2716 			if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
2717 				ath10k_warn(ar, "too short fft report (%d)\n",
2718 					    i);
2719 				return;
2720 			}
2721 
2722 			fftr = (struct phyerr_fft_report *)tlv_buf;
2723 			res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
2724 			if (res)
2725 				return;
2726 			break;
2727 		}
2728 
2729 		i += sizeof(*tlv) + tlv_len;
2730 	}
2731 }
2732 
2733 void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
2734 				    const struct wmi_phyerr *phyerr,
2735 				    u64 tsf)
2736 {
2737 	int buf_len, tlv_len, res, i = 0;
2738 	struct phyerr_tlv *tlv;
2739 	const void *tlv_buf;
2740 	const struct phyerr_fft_report *fftr;
2741 	size_t fftr_len;
2742 
2743 	buf_len = __le32_to_cpu(phyerr->buf_len);
2744 
2745 	while (i < buf_len) {
2746 		if (i + sizeof(*tlv) > buf_len) {
2747 			ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
2748 				    i);
2749 			return;
2750 		}
2751 
2752 		tlv = (struct phyerr_tlv *)&phyerr->buf[i];
2753 		tlv_len = __le16_to_cpu(tlv->len);
2754 		tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
2755 
2756 		if (i + sizeof(*tlv) + tlv_len > buf_len) {
2757 			ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
2758 				    i);
2759 			return;
2760 		}
2761 
2762 		switch (tlv->tag) {
2763 		case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
2764 			if (sizeof(*fftr) > tlv_len) {
2765 				ath10k_warn(ar, "failed to parse fft report at byte %d\n",
2766 					    i);
2767 				return;
2768 			}
2769 
2770 			fftr_len = tlv_len - sizeof(*fftr);
2771 			fftr = tlv_buf;
2772 			res = ath10k_spectral_process_fft(ar, phyerr,
2773 							  fftr, fftr_len,
2774 							  tsf);
2775 			if (res < 0) {
2776 				ath10k_warn(ar, "failed to process fft report: %d\n",
2777 					    res);
2778 				return;
2779 			}
2780 			break;
2781 		}
2782 
2783 		i += sizeof(*tlv) + tlv_len;
2784 	}
2785 }
2786 
2787 static int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, struct sk_buff *skb,
2788 					struct wmi_phyerr_ev_arg *arg)
2789 {
2790 	struct wmi_phyerr_event *ev = (void *)skb->data;
2791 
2792 	if (skb->len < sizeof(*ev))
2793 		return -EPROTO;
2794 
2795 	arg->num_phyerrs = ev->num_phyerrs;
2796 	arg->tsf_l32 = ev->tsf_l32;
2797 	arg->tsf_u32 = ev->tsf_u32;
2798 	arg->buf_len = __cpu_to_le32(skb->len - sizeof(*ev));
2799 	arg->phyerrs = ev->phyerrs;
2800 
2801 	return 0;
2802 }
2803 
2804 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
2805 {
2806 	struct wmi_phyerr_ev_arg arg = {};
2807 	const struct wmi_phyerr *phyerr;
2808 	u32 count, i, buf_len, phy_err_code;
2809 	u64 tsf;
2810 	int left_len, ret;
2811 
2812 	ATH10K_DFS_STAT_INC(ar, phy_errors);
2813 
2814 	ret = ath10k_wmi_pull_phyerr(ar, skb, &arg);
2815 	if (ret) {
2816 		ath10k_warn(ar, "failed to parse phyerr event: %d\n", ret);
2817 		return;
2818 	}
2819 
2820 	left_len = __le32_to_cpu(arg.buf_len);
2821 
2822 	/* Check number of included events */
2823 	count = __le32_to_cpu(arg.num_phyerrs);
2824 
2825 	tsf = __le32_to_cpu(arg.tsf_u32);
2826 	tsf <<= 32;
2827 	tsf |= __le32_to_cpu(arg.tsf_l32);
2828 
2829 	ath10k_dbg(ar, ATH10K_DBG_WMI,
2830 		   "wmi event phyerr count %d tsf64 0x%llX\n",
2831 		   count, tsf);
2832 
2833 	phyerr = arg.phyerrs;
2834 	for (i = 0; i < count; i++) {
2835 		/* Check if we can read event header */
2836 		if (left_len < sizeof(*phyerr)) {
2837 			ath10k_warn(ar, "single event (%d) wrong head len\n",
2838 				    i);
2839 			return;
2840 		}
2841 
2842 		left_len -= sizeof(*phyerr);
2843 
2844 		buf_len = __le32_to_cpu(phyerr->buf_len);
2845 		phy_err_code = phyerr->phy_err_code;
2846 
2847 		if (left_len < buf_len) {
2848 			ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
2849 			return;
2850 		}
2851 
2852 		left_len -= buf_len;
2853 
2854 		switch (phy_err_code) {
2855 		case PHY_ERROR_RADAR:
2856 			ath10k_wmi_event_dfs(ar, phyerr, tsf);
2857 			break;
2858 		case PHY_ERROR_SPECTRAL_SCAN:
2859 			ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
2860 			break;
2861 		case PHY_ERROR_FALSE_RADAR_EXT:
2862 			ath10k_wmi_event_dfs(ar, phyerr, tsf);
2863 			ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
2864 			break;
2865 		default:
2866 			break;
2867 		}
2868 
2869 		phyerr = (void *)phyerr + sizeof(*phyerr) + buf_len;
2870 	}
2871 }
2872 
2873 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
2874 {
2875 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
2876 }
2877 
2878 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
2879 {
2880 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
2881 }
2882 
2883 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
2884 {
2885 	char buf[101], c;
2886 	int i;
2887 
2888 	for (i = 0; i < sizeof(buf) - 1; i++) {
2889 		if (i >= skb->len)
2890 			break;
2891 
2892 		c = skb->data[i];
2893 
2894 		if (c == '\0')
2895 			break;
2896 
2897 		if (isascii(c) && isprint(c))
2898 			buf[i] = c;
2899 		else
2900 			buf[i] = '.';
2901 	}
2902 
2903 	if (i == sizeof(buf) - 1)
2904 		ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2905 
2906 	/* for some reason the debug prints end with \n, remove that */
2907 	if (skb->data[i - 1] == '\n')
2908 		i--;
2909 
2910 	/* the last byte is always reserved for the null character */
2911 	buf[i] = '\0';
2912 
2913 	ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
2914 }
2915 
2916 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
2917 {
2918 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
2919 }
2920 
2921 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
2922 {
2923 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
2924 }
2925 
2926 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
2927 					     struct sk_buff *skb)
2928 {
2929 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
2930 }
2931 
2932 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
2933 					     struct sk_buff *skb)
2934 {
2935 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
2936 }
2937 
2938 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
2939 {
2940 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
2941 }
2942 
2943 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
2944 {
2945 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
2946 }
2947 
2948 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
2949 {
2950 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
2951 }
2952 
2953 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
2954 {
2955 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
2956 }
2957 
2958 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
2959 {
2960 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
2961 }
2962 
2963 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
2964 {
2965 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
2966 }
2967 
2968 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
2969 {
2970 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
2971 }
2972 
2973 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
2974 {
2975 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
2976 }
2977 
2978 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
2979 {
2980 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
2981 }
2982 
2983 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
2984 						struct sk_buff *skb)
2985 {
2986 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
2987 }
2988 
2989 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
2990 {
2991 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
2992 }
2993 
2994 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
2995 {
2996 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
2997 }
2998 
2999 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
3000 {
3001 	ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
3002 }
3003 
3004 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
3005 				     u32 num_units, u32 unit_len)
3006 {
3007 	dma_addr_t paddr;
3008 	u32 pool_size;
3009 	int idx = ar->wmi.num_mem_chunks;
3010 
3011 	pool_size = num_units * round_up(unit_len, 4);
3012 
3013 	if (!pool_size)
3014 		return -EINVAL;
3015 
3016 	ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
3017 							   pool_size,
3018 							   &paddr,
3019 							   GFP_ATOMIC);
3020 	if (!ar->wmi.mem_chunks[idx].vaddr) {
3021 		ath10k_warn(ar, "failed to allocate memory chunk\n");
3022 		return -ENOMEM;
3023 	}
3024 
3025 	memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
3026 
3027 	ar->wmi.mem_chunks[idx].paddr = paddr;
3028 	ar->wmi.mem_chunks[idx].len = pool_size;
3029 	ar->wmi.mem_chunks[idx].req_id = req_id;
3030 	ar->wmi.num_mem_chunks++;
3031 
3032 	return 0;
3033 }
3034 
3035 static int
3036 ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
3037 				   struct wmi_svc_rdy_ev_arg *arg)
3038 {
3039 	struct wmi_service_ready_event *ev;
3040 	size_t i, n;
3041 
3042 	if (skb->len < sizeof(*ev))
3043 		return -EPROTO;
3044 
3045 	ev = (void *)skb->data;
3046 	skb_pull(skb, sizeof(*ev));
3047 	arg->min_tx_power = ev->hw_min_tx_power;
3048 	arg->max_tx_power = ev->hw_max_tx_power;
3049 	arg->ht_cap = ev->ht_cap_info;
3050 	arg->vht_cap = ev->vht_cap_info;
3051 	arg->sw_ver0 = ev->sw_version;
3052 	arg->sw_ver1 = ev->sw_version_1;
3053 	arg->phy_capab = ev->phy_capability;
3054 	arg->num_rf_chains = ev->num_rf_chains;
3055 	arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
3056 	arg->num_mem_reqs = ev->num_mem_reqs;
3057 	arg->service_map = ev->wmi_service_bitmap;
3058 	arg->service_map_len = sizeof(ev->wmi_service_bitmap);
3059 
3060 	n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
3061 		  ARRAY_SIZE(arg->mem_reqs));
3062 	for (i = 0; i < n; i++)
3063 		arg->mem_reqs[i] = &ev->mem_reqs[i];
3064 
3065 	if (skb->len <
3066 	    __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
3067 		return -EPROTO;
3068 
3069 	return 0;
3070 }
3071 
3072 static int
3073 ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
3074 				  struct wmi_svc_rdy_ev_arg *arg)
3075 {
3076 	struct wmi_10x_service_ready_event *ev;
3077 	int i, n;
3078 
3079 	if (skb->len < sizeof(*ev))
3080 		return -EPROTO;
3081 
3082 	ev = (void *)skb->data;
3083 	skb_pull(skb, sizeof(*ev));
3084 	arg->min_tx_power = ev->hw_min_tx_power;
3085 	arg->max_tx_power = ev->hw_max_tx_power;
3086 	arg->ht_cap = ev->ht_cap_info;
3087 	arg->vht_cap = ev->vht_cap_info;
3088 	arg->sw_ver0 = ev->sw_version;
3089 	arg->phy_capab = ev->phy_capability;
3090 	arg->num_rf_chains = ev->num_rf_chains;
3091 	arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
3092 	arg->num_mem_reqs = ev->num_mem_reqs;
3093 	arg->service_map = ev->wmi_service_bitmap;
3094 	arg->service_map_len = sizeof(ev->wmi_service_bitmap);
3095 
3096 	n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
3097 		  ARRAY_SIZE(arg->mem_reqs));
3098 	for (i = 0; i < n; i++)
3099 		arg->mem_reqs[i] = &ev->mem_reqs[i];
3100 
3101 	if (skb->len <
3102 	    __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
3103 		return -EPROTO;
3104 
3105 	return 0;
3106 }
3107 
3108 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
3109 {
3110 	struct wmi_svc_rdy_ev_arg arg = {};
3111 	u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
3112 	int ret;
3113 
3114 	ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
3115 	if (ret) {
3116 		ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
3117 		return;
3118 	}
3119 
3120 	memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
3121 	ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
3122 			   arg.service_map_len);
3123 
3124 	ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
3125 	ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
3126 	ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
3127 	ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
3128 	ar->fw_version_major =
3129 		(__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
3130 	ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
3131 	ar->fw_version_release =
3132 		(__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
3133 	ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
3134 	ar->phy_capability = __le32_to_cpu(arg.phy_capab);
3135 	ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
3136 	ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
3137 
3138 	ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
3139 			arg.service_map, arg.service_map_len);
3140 
3141 	/* only manually set fw features when not using FW IE format */
3142 	if (ar->fw_api == 1 && ar->fw_version_build > 636)
3143 		set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
3144 
3145 	if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
3146 		ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
3147 			    ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
3148 		ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
3149 	}
3150 
3151 	ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1;
3152 	ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1;
3153 
3154 	if (strlen(ar->hw->wiphy->fw_version) == 0) {
3155 		snprintf(ar->hw->wiphy->fw_version,
3156 			 sizeof(ar->hw->wiphy->fw_version),
3157 			 "%u.%u.%u.%u",
3158 			 ar->fw_version_major,
3159 			 ar->fw_version_minor,
3160 			 ar->fw_version_release,
3161 			 ar->fw_version_build);
3162 	}
3163 
3164 	num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
3165 	if (num_mem_reqs > WMI_MAX_MEM_REQS) {
3166 		ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
3167 			    num_mem_reqs);
3168 		return;
3169 	}
3170 
3171 	for (i = 0; i < num_mem_reqs; ++i) {
3172 		req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
3173 		num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
3174 		unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
3175 		num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
3176 
3177 		if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
3178 			/* number of units to allocate is number of
3179 			 * peers, 1 extra for self peer on target */
3180 			/* this needs to be tied, host and target
3181 			 * can get out of sync */
3182 			num_units = TARGET_10X_NUM_PEERS + 1;
3183 		else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
3184 			num_units = TARGET_10X_NUM_VDEVS + 1;
3185 
3186 		ath10k_dbg(ar, ATH10K_DBG_WMI,
3187 			   "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
3188 			   req_id,
3189 			   __le32_to_cpu(arg.mem_reqs[i]->num_units),
3190 			   num_unit_info,
3191 			   unit_size,
3192 			   num_units);
3193 
3194 		ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
3195 						unit_size);
3196 		if (ret)
3197 			return;
3198 	}
3199 
3200 	ath10k_dbg(ar, ATH10K_DBG_WMI,
3201 		   "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
3202 		   __le32_to_cpu(arg.min_tx_power),
3203 		   __le32_to_cpu(arg.max_tx_power),
3204 		   __le32_to_cpu(arg.ht_cap),
3205 		   __le32_to_cpu(arg.vht_cap),
3206 		   __le32_to_cpu(arg.sw_ver0),
3207 		   __le32_to_cpu(arg.sw_ver1),
3208 		   __le32_to_cpu(arg.fw_build),
3209 		   __le32_to_cpu(arg.phy_capab),
3210 		   __le32_to_cpu(arg.num_rf_chains),
3211 		   __le32_to_cpu(arg.eeprom_rd),
3212 		   __le32_to_cpu(arg.num_mem_reqs));
3213 
3214 	complete(&ar->wmi.service_ready);
3215 }
3216 
3217 static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
3218 				     struct wmi_rdy_ev_arg *arg)
3219 {
3220 	struct wmi_ready_event *ev = (void *)skb->data;
3221 
3222 	if (skb->len < sizeof(*ev))
3223 		return -EPROTO;
3224 
3225 	skb_pull(skb, sizeof(*ev));
3226 	arg->sw_version = ev->sw_version;
3227 	arg->abi_version = ev->abi_version;
3228 	arg->status = ev->status;
3229 	arg->mac_addr = ev->mac_addr.addr;
3230 
3231 	return 0;
3232 }
3233 
3234 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
3235 {
3236 	struct wmi_rdy_ev_arg arg = {};
3237 	int ret;
3238 
3239 	ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
3240 	if (ret) {
3241 		ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
3242 		return ret;
3243 	}
3244 
3245 	ath10k_dbg(ar, ATH10K_DBG_WMI,
3246 		   "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
3247 		   __le32_to_cpu(arg.sw_version),
3248 		   __le32_to_cpu(arg.abi_version),
3249 		   arg.mac_addr,
3250 		   __le32_to_cpu(arg.status));
3251 
3252 	ether_addr_copy(ar->mac_addr, arg.mac_addr);
3253 	complete(&ar->wmi.unified_ready);
3254 	return 0;
3255 }
3256 
3257 static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
3258 {
3259 	const struct wmi_pdev_temperature_event *ev;
3260 
3261 	ev = (struct wmi_pdev_temperature_event *)skb->data;
3262 	if (WARN_ON(skb->len < sizeof(*ev)))
3263 		return -EPROTO;
3264 
3265 	ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
3266 	return 0;
3267 }
3268 
3269 static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
3270 {
3271 	struct wmi_cmd_hdr *cmd_hdr;
3272 	enum wmi_event_id id;
3273 
3274 	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3275 	id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3276 
3277 	if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3278 		return;
3279 
3280 	trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
3281 
3282 	switch (id) {
3283 	case WMI_MGMT_RX_EVENTID:
3284 		ath10k_wmi_event_mgmt_rx(ar, skb);
3285 		/* mgmt_rx() owns the skb now! */
3286 		return;
3287 	case WMI_SCAN_EVENTID:
3288 		ath10k_wmi_event_scan(ar, skb);
3289 		break;
3290 	case WMI_CHAN_INFO_EVENTID:
3291 		ath10k_wmi_event_chan_info(ar, skb);
3292 		break;
3293 	case WMI_ECHO_EVENTID:
3294 		ath10k_wmi_event_echo(ar, skb);
3295 		break;
3296 	case WMI_DEBUG_MESG_EVENTID:
3297 		ath10k_wmi_event_debug_mesg(ar, skb);
3298 		break;
3299 	case WMI_UPDATE_STATS_EVENTID:
3300 		ath10k_wmi_event_update_stats(ar, skb);
3301 		break;
3302 	case WMI_VDEV_START_RESP_EVENTID:
3303 		ath10k_wmi_event_vdev_start_resp(ar, skb);
3304 		break;
3305 	case WMI_VDEV_STOPPED_EVENTID:
3306 		ath10k_wmi_event_vdev_stopped(ar, skb);
3307 		break;
3308 	case WMI_PEER_STA_KICKOUT_EVENTID:
3309 		ath10k_wmi_event_peer_sta_kickout(ar, skb);
3310 		break;
3311 	case WMI_HOST_SWBA_EVENTID:
3312 		ath10k_wmi_event_host_swba(ar, skb);
3313 		break;
3314 	case WMI_TBTTOFFSET_UPDATE_EVENTID:
3315 		ath10k_wmi_event_tbttoffset_update(ar, skb);
3316 		break;
3317 	case WMI_PHYERR_EVENTID:
3318 		ath10k_wmi_event_phyerr(ar, skb);
3319 		break;
3320 	case WMI_ROAM_EVENTID:
3321 		ath10k_wmi_event_roam(ar, skb);
3322 		break;
3323 	case WMI_PROFILE_MATCH:
3324 		ath10k_wmi_event_profile_match(ar, skb);
3325 		break;
3326 	case WMI_DEBUG_PRINT_EVENTID:
3327 		ath10k_wmi_event_debug_print(ar, skb);
3328 		break;
3329 	case WMI_PDEV_QVIT_EVENTID:
3330 		ath10k_wmi_event_pdev_qvit(ar, skb);
3331 		break;
3332 	case WMI_WLAN_PROFILE_DATA_EVENTID:
3333 		ath10k_wmi_event_wlan_profile_data(ar, skb);
3334 		break;
3335 	case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
3336 		ath10k_wmi_event_rtt_measurement_report(ar, skb);
3337 		break;
3338 	case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
3339 		ath10k_wmi_event_tsf_measurement_report(ar, skb);
3340 		break;
3341 	case WMI_RTT_ERROR_REPORT_EVENTID:
3342 		ath10k_wmi_event_rtt_error_report(ar, skb);
3343 		break;
3344 	case WMI_WOW_WAKEUP_HOST_EVENTID:
3345 		ath10k_wmi_event_wow_wakeup_host(ar, skb);
3346 		break;
3347 	case WMI_DCS_INTERFERENCE_EVENTID:
3348 		ath10k_wmi_event_dcs_interference(ar, skb);
3349 		break;
3350 	case WMI_PDEV_TPC_CONFIG_EVENTID:
3351 		ath10k_wmi_event_pdev_tpc_config(ar, skb);
3352 		break;
3353 	case WMI_PDEV_FTM_INTG_EVENTID:
3354 		ath10k_wmi_event_pdev_ftm_intg(ar, skb);
3355 		break;
3356 	case WMI_GTK_OFFLOAD_STATUS_EVENTID:
3357 		ath10k_wmi_event_gtk_offload_status(ar, skb);
3358 		break;
3359 	case WMI_GTK_REKEY_FAIL_EVENTID:
3360 		ath10k_wmi_event_gtk_rekey_fail(ar, skb);
3361 		break;
3362 	case WMI_TX_DELBA_COMPLETE_EVENTID:
3363 		ath10k_wmi_event_delba_complete(ar, skb);
3364 		break;
3365 	case WMI_TX_ADDBA_COMPLETE_EVENTID:
3366 		ath10k_wmi_event_addba_complete(ar, skb);
3367 		break;
3368 	case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
3369 		ath10k_wmi_event_vdev_install_key_complete(ar, skb);
3370 		break;
3371 	case WMI_SERVICE_READY_EVENTID:
3372 		ath10k_wmi_event_service_ready(ar, skb);
3373 		break;
3374 	case WMI_READY_EVENTID:
3375 		ath10k_wmi_event_ready(ar, skb);
3376 		break;
3377 	default:
3378 		ath10k_warn(ar, "Unknown eventid: %d\n", id);
3379 		break;
3380 	}
3381 
3382 	dev_kfree_skb(skb);
3383 }
3384 
3385 static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
3386 {
3387 	struct wmi_cmd_hdr *cmd_hdr;
3388 	enum wmi_10x_event_id id;
3389 	bool consumed;
3390 
3391 	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3392 	id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3393 
3394 	if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3395 		return;
3396 
3397 	trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
3398 
3399 	consumed = ath10k_tm_event_wmi(ar, id, skb);
3400 
3401 	/* Ready event must be handled normally also in UTF mode so that we
3402 	 * know the UTF firmware has booted, others we are just bypass WMI
3403 	 * events to testmode.
3404 	 */
3405 	if (consumed && id != WMI_10X_READY_EVENTID) {
3406 		ath10k_dbg(ar, ATH10K_DBG_WMI,
3407 			   "wmi testmode consumed 0x%x\n", id);
3408 		goto out;
3409 	}
3410 
3411 	switch (id) {
3412 	case WMI_10X_MGMT_RX_EVENTID:
3413 		ath10k_wmi_event_mgmt_rx(ar, skb);
3414 		/* mgmt_rx() owns the skb now! */
3415 		return;
3416 	case WMI_10X_SCAN_EVENTID:
3417 		ath10k_wmi_event_scan(ar, skb);
3418 		break;
3419 	case WMI_10X_CHAN_INFO_EVENTID:
3420 		ath10k_wmi_event_chan_info(ar, skb);
3421 		break;
3422 	case WMI_10X_ECHO_EVENTID:
3423 		ath10k_wmi_event_echo(ar, skb);
3424 		break;
3425 	case WMI_10X_DEBUG_MESG_EVENTID:
3426 		ath10k_wmi_event_debug_mesg(ar, skb);
3427 		break;
3428 	case WMI_10X_UPDATE_STATS_EVENTID:
3429 		ath10k_wmi_event_update_stats(ar, skb);
3430 		break;
3431 	case WMI_10X_VDEV_START_RESP_EVENTID:
3432 		ath10k_wmi_event_vdev_start_resp(ar, skb);
3433 		break;
3434 	case WMI_10X_VDEV_STOPPED_EVENTID:
3435 		ath10k_wmi_event_vdev_stopped(ar, skb);
3436 		break;
3437 	case WMI_10X_PEER_STA_KICKOUT_EVENTID:
3438 		ath10k_wmi_event_peer_sta_kickout(ar, skb);
3439 		break;
3440 	case WMI_10X_HOST_SWBA_EVENTID:
3441 		ath10k_wmi_event_host_swba(ar, skb);
3442 		break;
3443 	case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
3444 		ath10k_wmi_event_tbttoffset_update(ar, skb);
3445 		break;
3446 	case WMI_10X_PHYERR_EVENTID:
3447 		ath10k_wmi_event_phyerr(ar, skb);
3448 		break;
3449 	case WMI_10X_ROAM_EVENTID:
3450 		ath10k_wmi_event_roam(ar, skb);
3451 		break;
3452 	case WMI_10X_PROFILE_MATCH:
3453 		ath10k_wmi_event_profile_match(ar, skb);
3454 		break;
3455 	case WMI_10X_DEBUG_PRINT_EVENTID:
3456 		ath10k_wmi_event_debug_print(ar, skb);
3457 		break;
3458 	case WMI_10X_PDEV_QVIT_EVENTID:
3459 		ath10k_wmi_event_pdev_qvit(ar, skb);
3460 		break;
3461 	case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
3462 		ath10k_wmi_event_wlan_profile_data(ar, skb);
3463 		break;
3464 	case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
3465 		ath10k_wmi_event_rtt_measurement_report(ar, skb);
3466 		break;
3467 	case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
3468 		ath10k_wmi_event_tsf_measurement_report(ar, skb);
3469 		break;
3470 	case WMI_10X_RTT_ERROR_REPORT_EVENTID:
3471 		ath10k_wmi_event_rtt_error_report(ar, skb);
3472 		break;
3473 	case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
3474 		ath10k_wmi_event_wow_wakeup_host(ar, skb);
3475 		break;
3476 	case WMI_10X_DCS_INTERFERENCE_EVENTID:
3477 		ath10k_wmi_event_dcs_interference(ar, skb);
3478 		break;
3479 	case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
3480 		ath10k_wmi_event_pdev_tpc_config(ar, skb);
3481 		break;
3482 	case WMI_10X_INST_RSSI_STATS_EVENTID:
3483 		ath10k_wmi_event_inst_rssi_stats(ar, skb);
3484 		break;
3485 	case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
3486 		ath10k_wmi_event_vdev_standby_req(ar, skb);
3487 		break;
3488 	case WMI_10X_VDEV_RESUME_REQ_EVENTID:
3489 		ath10k_wmi_event_vdev_resume_req(ar, skb);
3490 		break;
3491 	case WMI_10X_SERVICE_READY_EVENTID:
3492 		ath10k_wmi_event_service_ready(ar, skb);
3493 		break;
3494 	case WMI_10X_READY_EVENTID:
3495 		ath10k_wmi_event_ready(ar, skb);
3496 		break;
3497 	case WMI_10X_PDEV_UTF_EVENTID:
3498 		/* ignore utf events */
3499 		break;
3500 	default:
3501 		ath10k_warn(ar, "Unknown eventid: %d\n", id);
3502 		break;
3503 	}
3504 
3505 out:
3506 	dev_kfree_skb(skb);
3507 }
3508 
3509 static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
3510 {
3511 	struct wmi_cmd_hdr *cmd_hdr;
3512 	enum wmi_10_2_event_id id;
3513 
3514 	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3515 	id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3516 
3517 	if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3518 		return;
3519 
3520 	trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
3521 
3522 	switch (id) {
3523 	case WMI_10_2_MGMT_RX_EVENTID:
3524 		ath10k_wmi_event_mgmt_rx(ar, skb);
3525 		/* mgmt_rx() owns the skb now! */
3526 		return;
3527 	case WMI_10_2_SCAN_EVENTID:
3528 		ath10k_wmi_event_scan(ar, skb);
3529 		break;
3530 	case WMI_10_2_CHAN_INFO_EVENTID:
3531 		ath10k_wmi_event_chan_info(ar, skb);
3532 		break;
3533 	case WMI_10_2_ECHO_EVENTID:
3534 		ath10k_wmi_event_echo(ar, skb);
3535 		break;
3536 	case WMI_10_2_DEBUG_MESG_EVENTID:
3537 		ath10k_wmi_event_debug_mesg(ar, skb);
3538 		break;
3539 	case WMI_10_2_UPDATE_STATS_EVENTID:
3540 		ath10k_wmi_event_update_stats(ar, skb);
3541 		break;
3542 	case WMI_10_2_VDEV_START_RESP_EVENTID:
3543 		ath10k_wmi_event_vdev_start_resp(ar, skb);
3544 		break;
3545 	case WMI_10_2_VDEV_STOPPED_EVENTID:
3546 		ath10k_wmi_event_vdev_stopped(ar, skb);
3547 		break;
3548 	case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
3549 		ath10k_wmi_event_peer_sta_kickout(ar, skb);
3550 		break;
3551 	case WMI_10_2_HOST_SWBA_EVENTID:
3552 		ath10k_wmi_event_host_swba(ar, skb);
3553 		break;
3554 	case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
3555 		ath10k_wmi_event_tbttoffset_update(ar, skb);
3556 		break;
3557 	case WMI_10_2_PHYERR_EVENTID:
3558 		ath10k_wmi_event_phyerr(ar, skb);
3559 		break;
3560 	case WMI_10_2_ROAM_EVENTID:
3561 		ath10k_wmi_event_roam(ar, skb);
3562 		break;
3563 	case WMI_10_2_PROFILE_MATCH:
3564 		ath10k_wmi_event_profile_match(ar, skb);
3565 		break;
3566 	case WMI_10_2_DEBUG_PRINT_EVENTID:
3567 		ath10k_wmi_event_debug_print(ar, skb);
3568 		break;
3569 	case WMI_10_2_PDEV_QVIT_EVENTID:
3570 		ath10k_wmi_event_pdev_qvit(ar, skb);
3571 		break;
3572 	case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
3573 		ath10k_wmi_event_wlan_profile_data(ar, skb);
3574 		break;
3575 	case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
3576 		ath10k_wmi_event_rtt_measurement_report(ar, skb);
3577 		break;
3578 	case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
3579 		ath10k_wmi_event_tsf_measurement_report(ar, skb);
3580 		break;
3581 	case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
3582 		ath10k_wmi_event_rtt_error_report(ar, skb);
3583 		break;
3584 	case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
3585 		ath10k_wmi_event_wow_wakeup_host(ar, skb);
3586 		break;
3587 	case WMI_10_2_DCS_INTERFERENCE_EVENTID:
3588 		ath10k_wmi_event_dcs_interference(ar, skb);
3589 		break;
3590 	case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
3591 		ath10k_wmi_event_pdev_tpc_config(ar, skb);
3592 		break;
3593 	case WMI_10_2_INST_RSSI_STATS_EVENTID:
3594 		ath10k_wmi_event_inst_rssi_stats(ar, skb);
3595 		break;
3596 	case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
3597 		ath10k_wmi_event_vdev_standby_req(ar, skb);
3598 		break;
3599 	case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
3600 		ath10k_wmi_event_vdev_resume_req(ar, skb);
3601 		break;
3602 	case WMI_10_2_SERVICE_READY_EVENTID:
3603 		ath10k_wmi_event_service_ready(ar, skb);
3604 		break;
3605 	case WMI_10_2_READY_EVENTID:
3606 		ath10k_wmi_event_ready(ar, skb);
3607 		break;
3608 	case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
3609 		ath10k_wmi_event_temperature(ar, skb);
3610 		break;
3611 	case WMI_10_2_RTT_KEEPALIVE_EVENTID:
3612 	case WMI_10_2_GPIO_INPUT_EVENTID:
3613 	case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
3614 	case WMI_10_2_GENERIC_BUFFER_EVENTID:
3615 	case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
3616 	case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
3617 	case WMI_10_2_WDS_PEER_EVENTID:
3618 		ath10k_dbg(ar, ATH10K_DBG_WMI,
3619 			   "received event id %d not implemented\n", id);
3620 		break;
3621 	default:
3622 		ath10k_warn(ar, "Unknown eventid: %d\n", id);
3623 		break;
3624 	}
3625 
3626 	dev_kfree_skb(skb);
3627 }
3628 
3629 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
3630 {
3631 	int ret;
3632 
3633 	ret = ath10k_wmi_rx(ar, skb);
3634 	if (ret)
3635 		ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
3636 }
3637 
3638 int ath10k_wmi_connect(struct ath10k *ar)
3639 {
3640 	int status;
3641 	struct ath10k_htc_svc_conn_req conn_req;
3642 	struct ath10k_htc_svc_conn_resp conn_resp;
3643 
3644 	memset(&conn_req, 0, sizeof(conn_req));
3645 	memset(&conn_resp, 0, sizeof(conn_resp));
3646 
3647 	/* these fields are the same for all service endpoints */
3648 	conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
3649 	conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
3650 	conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
3651 
3652 	/* connect to control service */
3653 	conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
3654 
3655 	status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
3656 	if (status) {
3657 		ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
3658 			    status);
3659 		return status;
3660 	}
3661 
3662 	ar->wmi.eid = conn_resp.eid;
3663 	return 0;
3664 }
3665 
3666 static struct sk_buff *
3667 ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
3668 			      u16 ctl2g, u16 ctl5g,
3669 			      enum wmi_dfs_region dfs_reg)
3670 {
3671 	struct wmi_pdev_set_regdomain_cmd *cmd;
3672 	struct sk_buff *skb;
3673 
3674 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3675 	if (!skb)
3676 		return ERR_PTR(-ENOMEM);
3677 
3678 	cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
3679 	cmd->reg_domain = __cpu_to_le32(rd);
3680 	cmd->reg_domain_2G = __cpu_to_le32(rd2g);
3681 	cmd->reg_domain_5G = __cpu_to_le32(rd5g);
3682 	cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
3683 	cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
3684 
3685 	ath10k_dbg(ar, ATH10K_DBG_WMI,
3686 		   "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
3687 		   rd, rd2g, rd5g, ctl2g, ctl5g);
3688 	return skb;
3689 }
3690 
3691 static struct sk_buff *
3692 ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
3693 				  rd5g, u16 ctl2g, u16 ctl5g,
3694 				  enum wmi_dfs_region dfs_reg)
3695 {
3696 	struct wmi_pdev_set_regdomain_cmd_10x *cmd;
3697 	struct sk_buff *skb;
3698 
3699 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3700 	if (!skb)
3701 		return ERR_PTR(-ENOMEM);
3702 
3703 	cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
3704 	cmd->reg_domain = __cpu_to_le32(rd);
3705 	cmd->reg_domain_2G = __cpu_to_le32(rd2g);
3706 	cmd->reg_domain_5G = __cpu_to_le32(rd5g);
3707 	cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
3708 	cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
3709 	cmd->dfs_domain = __cpu_to_le32(dfs_reg);
3710 
3711 	ath10k_dbg(ar, ATH10K_DBG_WMI,
3712 		   "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
3713 		   rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
3714 	return skb;
3715 }
3716 
3717 static struct sk_buff *
3718 ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
3719 {
3720 	struct wmi_pdev_suspend_cmd *cmd;
3721 	struct sk_buff *skb;
3722 
3723 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3724 	if (!skb)
3725 		return ERR_PTR(-ENOMEM);
3726 
3727 	cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
3728 	cmd->suspend_opt = __cpu_to_le32(suspend_opt);
3729 
3730 	return skb;
3731 }
3732 
3733 static struct sk_buff *
3734 ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
3735 {
3736 	struct sk_buff *skb;
3737 
3738 	skb = ath10k_wmi_alloc_skb(ar, 0);
3739 	if (!skb)
3740 		return ERR_PTR(-ENOMEM);
3741 
3742 	return skb;
3743 }
3744 
3745 static struct sk_buff *
3746 ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
3747 {
3748 	struct wmi_pdev_set_param_cmd *cmd;
3749 	struct sk_buff *skb;
3750 
3751 	if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
3752 		ath10k_warn(ar, "pdev param %d not supported by firmware\n",
3753 			    id);
3754 		return ERR_PTR(-EOPNOTSUPP);
3755 	}
3756 
3757 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3758 	if (!skb)
3759 		return ERR_PTR(-ENOMEM);
3760 
3761 	cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
3762 	cmd->param_id    = __cpu_to_le32(id);
3763 	cmd->param_value = __cpu_to_le32(value);
3764 
3765 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
3766 		   id, value);
3767 	return skb;
3768 }
3769 
3770 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
3771 				    struct wmi_host_mem_chunks *chunks)
3772 {
3773 	struct host_memory_chunk *chunk;
3774 	int i;
3775 
3776 	chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
3777 
3778 	for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3779 		chunk = &chunks->items[i];
3780 		chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3781 		chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3782 		chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3783 
3784 		ath10k_dbg(ar, ATH10K_DBG_WMI,
3785 			   "wmi chunk %d len %d requested, addr 0x%llx\n",
3786 			   i,
3787 			   ar->wmi.mem_chunks[i].len,
3788 			   (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3789 	}
3790 }
3791 
3792 static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
3793 {
3794 	struct wmi_init_cmd *cmd;
3795 	struct sk_buff *buf;
3796 	struct wmi_resource_config config = {};
3797 	u32 len, val;
3798 
3799 	config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
3800 	config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
3801 	config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
3802 
3803 	config.num_offload_reorder_bufs =
3804 		__cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
3805 
3806 	config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
3807 	config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
3808 	config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
3809 	config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
3810 	config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
3811 	config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3812 	config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3813 	config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3814 	config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
3815 	config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
3816 
3817 	config.scan_max_pending_reqs =
3818 		__cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
3819 
3820 	config.bmiss_offload_max_vdev =
3821 		__cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
3822 
3823 	config.roam_offload_max_vdev =
3824 		__cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
3825 
3826 	config.roam_offload_max_ap_profiles =
3827 		__cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
3828 
3829 	config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
3830 	config.num_mcast_table_elems =
3831 		__cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
3832 
3833 	config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
3834 	config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
3835 	config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
3836 	config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
3837 	config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
3838 
3839 	val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3840 	config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3841 
3842 	config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
3843 
3844 	config.gtk_offload_max_vdev =
3845 		__cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
3846 
3847 	config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
3848 	config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
3849 
3850 	len = sizeof(*cmd) +
3851 	      (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3852 
3853 	buf = ath10k_wmi_alloc_skb(ar, len);
3854 	if (!buf)
3855 		return ERR_PTR(-ENOMEM);
3856 
3857 	cmd = (struct wmi_init_cmd *)buf->data;
3858 
3859 	memcpy(&cmd->resource_config, &config, sizeof(config));
3860 	ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
3861 
3862 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
3863 	return buf;
3864 }
3865 
3866 static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
3867 {
3868 	struct wmi_init_cmd_10x *cmd;
3869 	struct sk_buff *buf;
3870 	struct wmi_resource_config_10x config = {};
3871 	u32 len, val;
3872 
3873 	config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3874 	config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3875 	config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3876 	config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3877 	config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3878 	config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3879 	config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3880 	config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3881 	config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3882 	config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3883 	config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3884 	config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3885 
3886 	config.scan_max_pending_reqs =
3887 		__cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3888 
3889 	config.bmiss_offload_max_vdev =
3890 		__cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3891 
3892 	config.roam_offload_max_vdev =
3893 		__cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3894 
3895 	config.roam_offload_max_ap_profiles =
3896 		__cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3897 
3898 	config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3899 	config.num_mcast_table_elems =
3900 		__cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3901 
3902 	config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3903 	config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3904 	config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3905 	config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3906 	config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3907 
3908 	val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3909 	config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3910 
3911 	config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3912 
3913 	config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3914 	config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3915 
3916 	len = sizeof(*cmd) +
3917 	      (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3918 
3919 	buf = ath10k_wmi_alloc_skb(ar, len);
3920 	if (!buf)
3921 		return ERR_PTR(-ENOMEM);
3922 
3923 	cmd = (struct wmi_init_cmd_10x *)buf->data;
3924 
3925 	memcpy(&cmd->resource_config, &config, sizeof(config));
3926 	ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
3927 
3928 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
3929 	return buf;
3930 }
3931 
3932 static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
3933 {
3934 	struct wmi_init_cmd_10_2 *cmd;
3935 	struct sk_buff *buf;
3936 	struct wmi_resource_config_10x config = {};
3937 	u32 len, val, features;
3938 
3939 	config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3940 	config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3941 	config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3942 	config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3943 	config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3944 	config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3945 	config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3946 	config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3947 	config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3948 	config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3949 	config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3950 	config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3951 
3952 	config.scan_max_pending_reqs =
3953 		__cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3954 
3955 	config.bmiss_offload_max_vdev =
3956 		__cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3957 
3958 	config.roam_offload_max_vdev =
3959 		__cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3960 
3961 	config.roam_offload_max_ap_profiles =
3962 		__cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3963 
3964 	config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3965 	config.num_mcast_table_elems =
3966 		__cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3967 
3968 	config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3969 	config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3970 	config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3971 	config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
3972 	config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3973 
3974 	val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3975 	config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3976 
3977 	config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3978 
3979 	config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3980 	config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3981 
3982 	len = sizeof(*cmd) +
3983 	      (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3984 
3985 	buf = ath10k_wmi_alloc_skb(ar, len);
3986 	if (!buf)
3987 		return ERR_PTR(-ENOMEM);
3988 
3989 	cmd = (struct wmi_init_cmd_10_2 *)buf->data;
3990 
3991 	features = WMI_10_2_RX_BATCH_MODE;
3992 	cmd->resource_config.feature_mask = __cpu_to_le32(features);
3993 
3994 	memcpy(&cmd->resource_config.common, &config, sizeof(config));
3995 	ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
3996 
3997 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
3998 	return buf;
3999 }
4000 
4001 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
4002 {
4003 	if (arg->ie_len && !arg->ie)
4004 		return -EINVAL;
4005 	if (arg->n_channels && !arg->channels)
4006 		return -EINVAL;
4007 	if (arg->n_ssids && !arg->ssids)
4008 		return -EINVAL;
4009 	if (arg->n_bssids && !arg->bssids)
4010 		return -EINVAL;
4011 
4012 	if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
4013 		return -EINVAL;
4014 	if (arg->n_channels > ARRAY_SIZE(arg->channels))
4015 		return -EINVAL;
4016 	if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
4017 		return -EINVAL;
4018 	if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
4019 		return -EINVAL;
4020 
4021 	return 0;
4022 }
4023 
4024 static size_t
4025 ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
4026 {
4027 	int len = 0;
4028 
4029 	if (arg->ie_len) {
4030 		len += sizeof(struct wmi_ie_data);
4031 		len += roundup(arg->ie_len, 4);
4032 	}
4033 
4034 	if (arg->n_channels) {
4035 		len += sizeof(struct wmi_chan_list);
4036 		len += sizeof(__le32) * arg->n_channels;
4037 	}
4038 
4039 	if (arg->n_ssids) {
4040 		len += sizeof(struct wmi_ssid_list);
4041 		len += sizeof(struct wmi_ssid) * arg->n_ssids;
4042 	}
4043 
4044 	if (arg->n_bssids) {
4045 		len += sizeof(struct wmi_bssid_list);
4046 		len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
4047 	}
4048 
4049 	return len;
4050 }
4051 
4052 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
4053 				      const struct wmi_start_scan_arg *arg)
4054 {
4055 	u32 scan_id;
4056 	u32 scan_req_id;
4057 
4058 	scan_id  = WMI_HOST_SCAN_REQ_ID_PREFIX;
4059 	scan_id |= arg->scan_id;
4060 
4061 	scan_req_id  = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
4062 	scan_req_id |= arg->scan_req_id;
4063 
4064 	cmn->scan_id            = __cpu_to_le32(scan_id);
4065 	cmn->scan_req_id        = __cpu_to_le32(scan_req_id);
4066 	cmn->vdev_id            = __cpu_to_le32(arg->vdev_id);
4067 	cmn->scan_priority      = __cpu_to_le32(arg->scan_priority);
4068 	cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
4069 	cmn->dwell_time_active  = __cpu_to_le32(arg->dwell_time_active);
4070 	cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
4071 	cmn->min_rest_time      = __cpu_to_le32(arg->min_rest_time);
4072 	cmn->max_rest_time      = __cpu_to_le32(arg->max_rest_time);
4073 	cmn->repeat_probe_time  = __cpu_to_le32(arg->repeat_probe_time);
4074 	cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
4075 	cmn->idle_time          = __cpu_to_le32(arg->idle_time);
4076 	cmn->max_scan_time      = __cpu_to_le32(arg->max_scan_time);
4077 	cmn->probe_delay        = __cpu_to_le32(arg->probe_delay);
4078 	cmn->scan_ctrl_flags    = __cpu_to_le32(arg->scan_ctrl_flags);
4079 }
4080 
4081 static void
4082 ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
4083 			       const struct wmi_start_scan_arg *arg)
4084 {
4085 	struct wmi_ie_data *ie;
4086 	struct wmi_chan_list *channels;
4087 	struct wmi_ssid_list *ssids;
4088 	struct wmi_bssid_list *bssids;
4089 	void *ptr = tlvs->tlvs;
4090 	int i;
4091 
4092 	if (arg->n_channels) {
4093 		channels = ptr;
4094 		channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
4095 		channels->num_chan = __cpu_to_le32(arg->n_channels);
4096 
4097 		for (i = 0; i < arg->n_channels; i++)
4098 			channels->channel_list[i].freq =
4099 				__cpu_to_le16(arg->channels[i]);
4100 
4101 		ptr += sizeof(*channels);
4102 		ptr += sizeof(__le32) * arg->n_channels;
4103 	}
4104 
4105 	if (arg->n_ssids) {
4106 		ssids = ptr;
4107 		ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
4108 		ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
4109 
4110 		for (i = 0; i < arg->n_ssids; i++) {
4111 			ssids->ssids[i].ssid_len =
4112 				__cpu_to_le32(arg->ssids[i].len);
4113 			memcpy(&ssids->ssids[i].ssid,
4114 			       arg->ssids[i].ssid,
4115 			       arg->ssids[i].len);
4116 		}
4117 
4118 		ptr += sizeof(*ssids);
4119 		ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
4120 	}
4121 
4122 	if (arg->n_bssids) {
4123 		bssids = ptr;
4124 		bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
4125 		bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
4126 
4127 		for (i = 0; i < arg->n_bssids; i++)
4128 			memcpy(&bssids->bssid_list[i],
4129 			       arg->bssids[i].bssid,
4130 			       ETH_ALEN);
4131 
4132 		ptr += sizeof(*bssids);
4133 		ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
4134 	}
4135 
4136 	if (arg->ie_len) {
4137 		ie = ptr;
4138 		ie->tag = __cpu_to_le32(WMI_IE_TAG);
4139 		ie->ie_len = __cpu_to_le32(arg->ie_len);
4140 		memcpy(ie->ie_data, arg->ie, arg->ie_len);
4141 
4142 		ptr += sizeof(*ie);
4143 		ptr += roundup(arg->ie_len, 4);
4144 	}
4145 }
4146 
4147 static struct sk_buff *
4148 ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
4149 			     const struct wmi_start_scan_arg *arg)
4150 {
4151 	struct wmi_start_scan_cmd *cmd;
4152 	struct sk_buff *skb;
4153 	size_t len;
4154 	int ret;
4155 
4156 	ret = ath10k_wmi_start_scan_verify(arg);
4157 	if (ret)
4158 		return ERR_PTR(ret);
4159 
4160 	len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
4161 	skb = ath10k_wmi_alloc_skb(ar, len);
4162 	if (!skb)
4163 		return ERR_PTR(-ENOMEM);
4164 
4165 	cmd = (struct wmi_start_scan_cmd *)skb->data;
4166 
4167 	ath10k_wmi_put_start_scan_common(&cmd->common, arg);
4168 	ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
4169 
4170 	cmd->burst_duration_ms = __cpu_to_le32(0);
4171 
4172 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
4173 	return skb;
4174 }
4175 
4176 static struct sk_buff *
4177 ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
4178 				 const struct wmi_start_scan_arg *arg)
4179 {
4180 	struct wmi_10x_start_scan_cmd *cmd;
4181 	struct sk_buff *skb;
4182 	size_t len;
4183 	int ret;
4184 
4185 	ret = ath10k_wmi_start_scan_verify(arg);
4186 	if (ret)
4187 		return ERR_PTR(ret);
4188 
4189 	len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
4190 	skb = ath10k_wmi_alloc_skb(ar, len);
4191 	if (!skb)
4192 		return ERR_PTR(-ENOMEM);
4193 
4194 	cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
4195 
4196 	ath10k_wmi_put_start_scan_common(&cmd->common, arg);
4197 	ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
4198 
4199 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
4200 	return skb;
4201 }
4202 
4203 void ath10k_wmi_start_scan_init(struct ath10k *ar,
4204 				struct wmi_start_scan_arg *arg)
4205 {
4206 	/* setup commonly used values */
4207 	arg->scan_req_id = 1;
4208 	arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
4209 	arg->dwell_time_active = 50;
4210 	arg->dwell_time_passive = 150;
4211 	arg->min_rest_time = 50;
4212 	arg->max_rest_time = 500;
4213 	arg->repeat_probe_time = 0;
4214 	arg->probe_spacing_time = 0;
4215 	arg->idle_time = 0;
4216 	arg->max_scan_time = 20000;
4217 	arg->probe_delay = 5;
4218 	arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
4219 		| WMI_SCAN_EVENT_COMPLETED
4220 		| WMI_SCAN_EVENT_BSS_CHANNEL
4221 		| WMI_SCAN_EVENT_FOREIGN_CHANNEL
4222 		| WMI_SCAN_EVENT_DEQUEUED;
4223 	arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
4224 	arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
4225 	arg->n_bssids = 1;
4226 	arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
4227 }
4228 
4229 static struct sk_buff *
4230 ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
4231 			    const struct wmi_stop_scan_arg *arg)
4232 {
4233 	struct wmi_stop_scan_cmd *cmd;
4234 	struct sk_buff *skb;
4235 	u32 scan_id;
4236 	u32 req_id;
4237 
4238 	if (arg->req_id > 0xFFF)
4239 		return ERR_PTR(-EINVAL);
4240 	if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
4241 		return ERR_PTR(-EINVAL);
4242 
4243 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4244 	if (!skb)
4245 		return ERR_PTR(-ENOMEM);
4246 
4247 	scan_id = arg->u.scan_id;
4248 	scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
4249 
4250 	req_id = arg->req_id;
4251 	req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
4252 
4253 	cmd = (struct wmi_stop_scan_cmd *)skb->data;
4254 	cmd->req_type    = __cpu_to_le32(arg->req_type);
4255 	cmd->vdev_id     = __cpu_to_le32(arg->u.vdev_id);
4256 	cmd->scan_id     = __cpu_to_le32(scan_id);
4257 	cmd->scan_req_id = __cpu_to_le32(req_id);
4258 
4259 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4260 		   "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
4261 		   arg->req_id, arg->req_type, arg->u.scan_id);
4262 	return skb;
4263 }
4264 
4265 static struct sk_buff *
4266 ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
4267 			      enum wmi_vdev_type type,
4268 			      enum wmi_vdev_subtype subtype,
4269 			      const u8 macaddr[ETH_ALEN])
4270 {
4271 	struct wmi_vdev_create_cmd *cmd;
4272 	struct sk_buff *skb;
4273 
4274 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4275 	if (!skb)
4276 		return ERR_PTR(-ENOMEM);
4277 
4278 	cmd = (struct wmi_vdev_create_cmd *)skb->data;
4279 	cmd->vdev_id      = __cpu_to_le32(vdev_id);
4280 	cmd->vdev_type    = __cpu_to_le32(type);
4281 	cmd->vdev_subtype = __cpu_to_le32(subtype);
4282 	ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
4283 
4284 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4285 		   "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
4286 		   vdev_id, type, subtype, macaddr);
4287 	return skb;
4288 }
4289 
4290 static struct sk_buff *
4291 ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
4292 {
4293 	struct wmi_vdev_delete_cmd *cmd;
4294 	struct sk_buff *skb;
4295 
4296 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4297 	if (!skb)
4298 		return ERR_PTR(-ENOMEM);
4299 
4300 	cmd = (struct wmi_vdev_delete_cmd *)skb->data;
4301 	cmd->vdev_id = __cpu_to_le32(vdev_id);
4302 
4303 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4304 		   "WMI vdev delete id %d\n", vdev_id);
4305 	return skb;
4306 }
4307 
4308 static struct sk_buff *
4309 ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
4310 			     const struct wmi_vdev_start_request_arg *arg,
4311 			     bool restart)
4312 {
4313 	struct wmi_vdev_start_request_cmd *cmd;
4314 	struct sk_buff *skb;
4315 	const char *cmdname;
4316 	u32 flags = 0;
4317 
4318 	if (WARN_ON(arg->ssid && arg->ssid_len == 0))
4319 		return ERR_PTR(-EINVAL);
4320 	if (WARN_ON(arg->hidden_ssid && !arg->ssid))
4321 		return ERR_PTR(-EINVAL);
4322 	if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
4323 		return ERR_PTR(-EINVAL);
4324 
4325 	if (restart)
4326 		cmdname = "restart";
4327 	else
4328 		cmdname = "start";
4329 
4330 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4331 	if (!skb)
4332 		return ERR_PTR(-ENOMEM);
4333 
4334 	if (arg->hidden_ssid)
4335 		flags |= WMI_VDEV_START_HIDDEN_SSID;
4336 	if (arg->pmf_enabled)
4337 		flags |= WMI_VDEV_START_PMF_ENABLED;
4338 
4339 	cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
4340 	cmd->vdev_id         = __cpu_to_le32(arg->vdev_id);
4341 	cmd->disable_hw_ack  = __cpu_to_le32(arg->disable_hw_ack);
4342 	cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
4343 	cmd->dtim_period     = __cpu_to_le32(arg->dtim_period);
4344 	cmd->flags           = __cpu_to_le32(flags);
4345 	cmd->bcn_tx_rate     = __cpu_to_le32(arg->bcn_tx_rate);
4346 	cmd->bcn_tx_power    = __cpu_to_le32(arg->bcn_tx_power);
4347 
4348 	if (arg->ssid) {
4349 		cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
4350 		memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
4351 	}
4352 
4353 	ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
4354 
4355 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4356 		   "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
4357 		   cmdname, arg->vdev_id,
4358 		   flags, arg->channel.freq, arg->channel.mode,
4359 		   cmd->chan.flags, arg->channel.max_power);
4360 
4361 	return skb;
4362 }
4363 
4364 static struct sk_buff *
4365 ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
4366 {
4367 	struct wmi_vdev_stop_cmd *cmd;
4368 	struct sk_buff *skb;
4369 
4370 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4371 	if (!skb)
4372 		return ERR_PTR(-ENOMEM);
4373 
4374 	cmd = (struct wmi_vdev_stop_cmd *)skb->data;
4375 	cmd->vdev_id = __cpu_to_le32(vdev_id);
4376 
4377 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
4378 	return skb;
4379 }
4380 
4381 static struct sk_buff *
4382 ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
4383 			  const u8 *bssid)
4384 {
4385 	struct wmi_vdev_up_cmd *cmd;
4386 	struct sk_buff *skb;
4387 
4388 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4389 	if (!skb)
4390 		return ERR_PTR(-ENOMEM);
4391 
4392 	cmd = (struct wmi_vdev_up_cmd *)skb->data;
4393 	cmd->vdev_id       = __cpu_to_le32(vdev_id);
4394 	cmd->vdev_assoc_id = __cpu_to_le32(aid);
4395 	ether_addr_copy(cmd->vdev_bssid.addr, bssid);
4396 
4397 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4398 		   "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
4399 		   vdev_id, aid, bssid);
4400 	return skb;
4401 }
4402 
4403 static struct sk_buff *
4404 ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
4405 {
4406 	struct wmi_vdev_down_cmd *cmd;
4407 	struct sk_buff *skb;
4408 
4409 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4410 	if (!skb)
4411 		return ERR_PTR(-ENOMEM);
4412 
4413 	cmd = (struct wmi_vdev_down_cmd *)skb->data;
4414 	cmd->vdev_id = __cpu_to_le32(vdev_id);
4415 
4416 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4417 		   "wmi mgmt vdev down id 0x%x\n", vdev_id);
4418 	return skb;
4419 }
4420 
4421 static struct sk_buff *
4422 ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
4423 				 u32 param_id, u32 param_value)
4424 {
4425 	struct wmi_vdev_set_param_cmd *cmd;
4426 	struct sk_buff *skb;
4427 
4428 	if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
4429 		ath10k_dbg(ar, ATH10K_DBG_WMI,
4430 			   "vdev param %d not supported by firmware\n",
4431 			    param_id);
4432 		return ERR_PTR(-EOPNOTSUPP);
4433 	}
4434 
4435 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4436 	if (!skb)
4437 		return ERR_PTR(-ENOMEM);
4438 
4439 	cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
4440 	cmd->vdev_id     = __cpu_to_le32(vdev_id);
4441 	cmd->param_id    = __cpu_to_le32(param_id);
4442 	cmd->param_value = __cpu_to_le32(param_value);
4443 
4444 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4445 		   "wmi vdev id 0x%x set param %d value %d\n",
4446 		   vdev_id, param_id, param_value);
4447 	return skb;
4448 }
4449 
4450 static struct sk_buff *
4451 ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
4452 				   const struct wmi_vdev_install_key_arg *arg)
4453 {
4454 	struct wmi_vdev_install_key_cmd *cmd;
4455 	struct sk_buff *skb;
4456 
4457 	if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
4458 		return ERR_PTR(-EINVAL);
4459 	if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
4460 		return ERR_PTR(-EINVAL);
4461 
4462 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
4463 	if (!skb)
4464 		return ERR_PTR(-ENOMEM);
4465 
4466 	cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
4467 	cmd->vdev_id       = __cpu_to_le32(arg->vdev_id);
4468 	cmd->key_idx       = __cpu_to_le32(arg->key_idx);
4469 	cmd->key_flags     = __cpu_to_le32(arg->key_flags);
4470 	cmd->key_cipher    = __cpu_to_le32(arg->key_cipher);
4471 	cmd->key_len       = __cpu_to_le32(arg->key_len);
4472 	cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
4473 	cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
4474 
4475 	if (arg->macaddr)
4476 		ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
4477 	if (arg->key_data)
4478 		memcpy(cmd->key_data, arg->key_data, arg->key_len);
4479 
4480 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4481 		   "wmi vdev install key idx %d cipher %d len %d\n",
4482 		   arg->key_idx, arg->key_cipher, arg->key_len);
4483 	return skb;
4484 }
4485 
4486 static struct sk_buff *
4487 ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
4488 				     const struct wmi_vdev_spectral_conf_arg *arg)
4489 {
4490 	struct wmi_vdev_spectral_conf_cmd *cmd;
4491 	struct sk_buff *skb;
4492 
4493 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4494 	if (!skb)
4495 		return ERR_PTR(-ENOMEM);
4496 
4497 	cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
4498 	cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4499 	cmd->scan_count = __cpu_to_le32(arg->scan_count);
4500 	cmd->scan_period = __cpu_to_le32(arg->scan_period);
4501 	cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
4502 	cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
4503 	cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
4504 	cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
4505 	cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
4506 	cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
4507 	cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
4508 	cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
4509 	cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
4510 	cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
4511 	cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
4512 	cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
4513 	cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
4514 	cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
4515 	cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
4516 	cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
4517 
4518 	return skb;
4519 }
4520 
4521 static struct sk_buff *
4522 ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
4523 				       u32 trigger, u32 enable)
4524 {
4525 	struct wmi_vdev_spectral_enable_cmd *cmd;
4526 	struct sk_buff *skb;
4527 
4528 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4529 	if (!skb)
4530 		return ERR_PTR(-ENOMEM);
4531 
4532 	cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
4533 	cmd->vdev_id = __cpu_to_le32(vdev_id);
4534 	cmd->trigger_cmd = __cpu_to_le32(trigger);
4535 	cmd->enable_cmd = __cpu_to_le32(enable);
4536 
4537 	return skb;
4538 }
4539 
4540 static struct sk_buff *
4541 ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
4542 			      const u8 peer_addr[ETH_ALEN])
4543 {
4544 	struct wmi_peer_create_cmd *cmd;
4545 	struct sk_buff *skb;
4546 
4547 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4548 	if (!skb)
4549 		return ERR_PTR(-ENOMEM);
4550 
4551 	cmd = (struct wmi_peer_create_cmd *)skb->data;
4552 	cmd->vdev_id = __cpu_to_le32(vdev_id);
4553 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
4554 
4555 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4556 		   "wmi peer create vdev_id %d peer_addr %pM\n",
4557 		   vdev_id, peer_addr);
4558 	return skb;
4559 }
4560 
4561 static struct sk_buff *
4562 ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
4563 			      const u8 peer_addr[ETH_ALEN])
4564 {
4565 	struct wmi_peer_delete_cmd *cmd;
4566 	struct sk_buff *skb;
4567 
4568 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4569 	if (!skb)
4570 		return ERR_PTR(-ENOMEM);
4571 
4572 	cmd = (struct wmi_peer_delete_cmd *)skb->data;
4573 	cmd->vdev_id = __cpu_to_le32(vdev_id);
4574 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
4575 
4576 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4577 		   "wmi peer delete vdev_id %d peer_addr %pM\n",
4578 		   vdev_id, peer_addr);
4579 	return skb;
4580 }
4581 
4582 static struct sk_buff *
4583 ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
4584 			     const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
4585 {
4586 	struct wmi_peer_flush_tids_cmd *cmd;
4587 	struct sk_buff *skb;
4588 
4589 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4590 	if (!skb)
4591 		return ERR_PTR(-ENOMEM);
4592 
4593 	cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
4594 	cmd->vdev_id         = __cpu_to_le32(vdev_id);
4595 	cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
4596 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
4597 
4598 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4599 		   "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
4600 		   vdev_id, peer_addr, tid_bitmap);
4601 	return skb;
4602 }
4603 
4604 static struct sk_buff *
4605 ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
4606 				 const u8 *peer_addr,
4607 				 enum wmi_peer_param param_id,
4608 				 u32 param_value)
4609 {
4610 	struct wmi_peer_set_param_cmd *cmd;
4611 	struct sk_buff *skb;
4612 
4613 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4614 	if (!skb)
4615 		return ERR_PTR(-ENOMEM);
4616 
4617 	cmd = (struct wmi_peer_set_param_cmd *)skb->data;
4618 	cmd->vdev_id     = __cpu_to_le32(vdev_id);
4619 	cmd->param_id    = __cpu_to_le32(param_id);
4620 	cmd->param_value = __cpu_to_le32(param_value);
4621 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
4622 
4623 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4624 		   "wmi vdev %d peer 0x%pM set param %d value %d\n",
4625 		   vdev_id, peer_addr, param_id, param_value);
4626 	return skb;
4627 }
4628 
4629 static struct sk_buff *
4630 ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
4631 			     enum wmi_sta_ps_mode psmode)
4632 {
4633 	struct wmi_sta_powersave_mode_cmd *cmd;
4634 	struct sk_buff *skb;
4635 
4636 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4637 	if (!skb)
4638 		return ERR_PTR(-ENOMEM);
4639 
4640 	cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
4641 	cmd->vdev_id     = __cpu_to_le32(vdev_id);
4642 	cmd->sta_ps_mode = __cpu_to_le32(psmode);
4643 
4644 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4645 		   "wmi set powersave id 0x%x mode %d\n",
4646 		   vdev_id, psmode);
4647 	return skb;
4648 }
4649 
4650 static struct sk_buff *
4651 ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
4652 			     enum wmi_sta_powersave_param param_id,
4653 			     u32 value)
4654 {
4655 	struct wmi_sta_powersave_param_cmd *cmd;
4656 	struct sk_buff *skb;
4657 
4658 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4659 	if (!skb)
4660 		return ERR_PTR(-ENOMEM);
4661 
4662 	cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
4663 	cmd->vdev_id     = __cpu_to_le32(vdev_id);
4664 	cmd->param_id    = __cpu_to_le32(param_id);
4665 	cmd->param_value = __cpu_to_le32(value);
4666 
4667 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4668 		   "wmi sta ps param vdev_id 0x%x param %d value %d\n",
4669 		   vdev_id, param_id, value);
4670 	return skb;
4671 }
4672 
4673 static struct sk_buff *
4674 ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
4675 			    enum wmi_ap_ps_peer_param param_id, u32 value)
4676 {
4677 	struct wmi_ap_ps_peer_cmd *cmd;
4678 	struct sk_buff *skb;
4679 
4680 	if (!mac)
4681 		return ERR_PTR(-EINVAL);
4682 
4683 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4684 	if (!skb)
4685 		return ERR_PTR(-ENOMEM);
4686 
4687 	cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
4688 	cmd->vdev_id = __cpu_to_le32(vdev_id);
4689 	cmd->param_id = __cpu_to_le32(param_id);
4690 	cmd->param_value = __cpu_to_le32(value);
4691 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
4692 
4693 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4694 		   "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
4695 		   vdev_id, param_id, value, mac);
4696 	return skb;
4697 }
4698 
4699 static struct sk_buff *
4700 ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
4701 				 const struct wmi_scan_chan_list_arg *arg)
4702 {
4703 	struct wmi_scan_chan_list_cmd *cmd;
4704 	struct sk_buff *skb;
4705 	struct wmi_channel_arg *ch;
4706 	struct wmi_channel *ci;
4707 	int len;
4708 	int i;
4709 
4710 	len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
4711 
4712 	skb = ath10k_wmi_alloc_skb(ar, len);
4713 	if (!skb)
4714 		return ERR_PTR(-EINVAL);
4715 
4716 	cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
4717 	cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
4718 
4719 	for (i = 0; i < arg->n_channels; i++) {
4720 		ch = &arg->channels[i];
4721 		ci = &cmd->chan_info[i];
4722 
4723 		ath10k_wmi_put_wmi_channel(ci, ch);
4724 	}
4725 
4726 	return skb;
4727 }
4728 
4729 static void
4730 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
4731 			   const struct wmi_peer_assoc_complete_arg *arg)
4732 {
4733 	struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
4734 
4735 	cmd->vdev_id            = __cpu_to_le32(arg->vdev_id);
4736 	cmd->peer_new_assoc     = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
4737 	cmd->peer_associd       = __cpu_to_le32(arg->peer_aid);
4738 	cmd->peer_flags         = __cpu_to_le32(arg->peer_flags);
4739 	cmd->peer_caps          = __cpu_to_le32(arg->peer_caps);
4740 	cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
4741 	cmd->peer_ht_caps       = __cpu_to_le32(arg->peer_ht_caps);
4742 	cmd->peer_max_mpdu      = __cpu_to_le32(arg->peer_max_mpdu);
4743 	cmd->peer_mpdu_density  = __cpu_to_le32(arg->peer_mpdu_density);
4744 	cmd->peer_rate_caps     = __cpu_to_le32(arg->peer_rate_caps);
4745 	cmd->peer_nss           = __cpu_to_le32(arg->peer_num_spatial_streams);
4746 	cmd->peer_vht_caps      = __cpu_to_le32(arg->peer_vht_caps);
4747 	cmd->peer_phymode       = __cpu_to_le32(arg->peer_phymode);
4748 
4749 	ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
4750 
4751 	cmd->peer_legacy_rates.num_rates =
4752 		__cpu_to_le32(arg->peer_legacy_rates.num_rates);
4753 	memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
4754 	       arg->peer_legacy_rates.num_rates);
4755 
4756 	cmd->peer_ht_rates.num_rates =
4757 		__cpu_to_le32(arg->peer_ht_rates.num_rates);
4758 	memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
4759 	       arg->peer_ht_rates.num_rates);
4760 
4761 	cmd->peer_vht_rates.rx_max_rate =
4762 		__cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
4763 	cmd->peer_vht_rates.rx_mcs_set =
4764 		__cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
4765 	cmd->peer_vht_rates.tx_max_rate =
4766 		__cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
4767 	cmd->peer_vht_rates.tx_mcs_set =
4768 		__cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
4769 }
4770 
4771 static void
4772 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
4773 				const struct wmi_peer_assoc_complete_arg *arg)
4774 {
4775 	struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
4776 
4777 	ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4778 	memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
4779 }
4780 
4781 static void
4782 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
4783 				const struct wmi_peer_assoc_complete_arg *arg)
4784 {
4785 	ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4786 }
4787 
4788 static void
4789 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
4790 				const struct wmi_peer_assoc_complete_arg *arg)
4791 {
4792 	struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
4793 	int max_mcs, max_nss;
4794 	u32 info0;
4795 
4796 	/* TODO: Is using max values okay with firmware? */
4797 	max_mcs = 0xf;
4798 	max_nss = 0xf;
4799 
4800 	info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
4801 		SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
4802 
4803 	ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4804 	cmd->info0 = __cpu_to_le32(info0);
4805 }
4806 
4807 static int
4808 ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
4809 {
4810 	if (arg->peer_mpdu_density > 16)
4811 		return -EINVAL;
4812 	if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
4813 		return -EINVAL;
4814 	if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
4815 		return -EINVAL;
4816 
4817 	return 0;
4818 }
4819 
4820 static struct sk_buff *
4821 ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
4822 			     const struct wmi_peer_assoc_complete_arg *arg)
4823 {
4824 	size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
4825 	struct sk_buff *skb;
4826 	int ret;
4827 
4828 	ret = ath10k_wmi_peer_assoc_check_arg(arg);
4829 	if (ret)
4830 		return ERR_PTR(ret);
4831 
4832 	skb = ath10k_wmi_alloc_skb(ar, len);
4833 	if (!skb)
4834 		return ERR_PTR(-ENOMEM);
4835 
4836 	ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
4837 
4838 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4839 		   "wmi peer assoc vdev %d addr %pM (%s)\n",
4840 		   arg->vdev_id, arg->addr,
4841 		   arg->peer_reassoc ? "reassociate" : "new");
4842 	return skb;
4843 }
4844 
4845 static struct sk_buff *
4846 ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
4847 				  const struct wmi_peer_assoc_complete_arg *arg)
4848 {
4849 	size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
4850 	struct sk_buff *skb;
4851 	int ret;
4852 
4853 	ret = ath10k_wmi_peer_assoc_check_arg(arg);
4854 	if (ret)
4855 		return ERR_PTR(ret);
4856 
4857 	skb = ath10k_wmi_alloc_skb(ar, len);
4858 	if (!skb)
4859 		return ERR_PTR(-ENOMEM);
4860 
4861 	ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
4862 
4863 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4864 		   "wmi peer assoc vdev %d addr %pM (%s)\n",
4865 		   arg->vdev_id, arg->addr,
4866 		   arg->peer_reassoc ? "reassociate" : "new");
4867 	return skb;
4868 }
4869 
4870 static struct sk_buff *
4871 ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
4872 				  const struct wmi_peer_assoc_complete_arg *arg)
4873 {
4874 	size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
4875 	struct sk_buff *skb;
4876 	int ret;
4877 
4878 	ret = ath10k_wmi_peer_assoc_check_arg(arg);
4879 	if (ret)
4880 		return ERR_PTR(ret);
4881 
4882 	skb = ath10k_wmi_alloc_skb(ar, len);
4883 	if (!skb)
4884 		return ERR_PTR(-ENOMEM);
4885 
4886 	ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
4887 
4888 	ath10k_dbg(ar, ATH10K_DBG_WMI,
4889 		   "wmi peer assoc vdev %d addr %pM (%s)\n",
4890 		   arg->vdev_id, arg->addr,
4891 		   arg->peer_reassoc ? "reassociate" : "new");
4892 	return skb;
4893 }
4894 
4895 static struct sk_buff *
4896 ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
4897 {
4898 	struct sk_buff *skb;
4899 
4900 	skb = ath10k_wmi_alloc_skb(ar, 0);
4901 	if (!skb)
4902 		return ERR_PTR(-ENOMEM);
4903 
4904 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
4905 	return skb;
4906 }
4907 
4908 /* This function assumes the beacon is already DMA mapped */
4909 static struct sk_buff *
4910 ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
4911 			     size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
4912 			     bool deliver_cab)
4913 {
4914 	struct wmi_bcn_tx_ref_cmd *cmd;
4915 	struct sk_buff *skb;
4916 	struct ieee80211_hdr *hdr;
4917 	u16 fc;
4918 
4919 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4920 	if (!skb)
4921 		return ERR_PTR(-ENOMEM);
4922 
4923 	hdr = (struct ieee80211_hdr *)bcn;
4924 	fc = le16_to_cpu(hdr->frame_control);
4925 
4926 	cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
4927 	cmd->vdev_id = __cpu_to_le32(vdev_id);
4928 	cmd->data_len = __cpu_to_le32(bcn_len);
4929 	cmd->data_ptr = __cpu_to_le32(bcn_paddr);
4930 	cmd->msdu_id = 0;
4931 	cmd->frame_control = __cpu_to_le32(fc);
4932 	cmd->flags = 0;
4933 	cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
4934 
4935 	if (dtim_zero)
4936 		cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
4937 
4938 	if (deliver_cab)
4939 		cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
4940 
4941 	return skb;
4942 }
4943 
4944 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
4945 			      const struct wmi_wmm_params_arg *arg)
4946 {
4947 	params->cwmin  = __cpu_to_le32(arg->cwmin);
4948 	params->cwmax  = __cpu_to_le32(arg->cwmax);
4949 	params->aifs   = __cpu_to_le32(arg->aifs);
4950 	params->txop   = __cpu_to_le32(arg->txop);
4951 	params->acm    = __cpu_to_le32(arg->acm);
4952 	params->no_ack = __cpu_to_le32(arg->no_ack);
4953 }
4954 
4955 static struct sk_buff *
4956 ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
4957 			       const struct wmi_wmm_params_all_arg *arg)
4958 {
4959 	struct wmi_pdev_set_wmm_params *cmd;
4960 	struct sk_buff *skb;
4961 
4962 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4963 	if (!skb)
4964 		return ERR_PTR(-ENOMEM);
4965 
4966 	cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
4967 	ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
4968 	ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
4969 	ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
4970 	ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
4971 
4972 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
4973 	return skb;
4974 }
4975 
4976 static struct sk_buff *
4977 ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
4978 {
4979 	struct wmi_request_stats_cmd *cmd;
4980 	struct sk_buff *skb;
4981 
4982 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4983 	if (!skb)
4984 		return ERR_PTR(-ENOMEM);
4985 
4986 	cmd = (struct wmi_request_stats_cmd *)skb->data;
4987 	cmd->stats_id = __cpu_to_le32(stats_mask);
4988 
4989 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
4990 		   stats_mask);
4991 	return skb;
4992 }
4993 
4994 static struct sk_buff *
4995 ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
4996 				enum wmi_force_fw_hang_type type, u32 delay_ms)
4997 {
4998 	struct wmi_force_fw_hang_cmd *cmd;
4999 	struct sk_buff *skb;
5000 
5001 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5002 	if (!skb)
5003 		return ERR_PTR(-ENOMEM);
5004 
5005 	cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
5006 	cmd->type = __cpu_to_le32(type);
5007 	cmd->delay_ms = __cpu_to_le32(delay_ms);
5008 
5009 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
5010 		   type, delay_ms);
5011 	return skb;
5012 }
5013 
5014 static struct sk_buff *
5015 ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable,
5016 			     u32 log_level)
5017 {
5018 	struct wmi_dbglog_cfg_cmd *cmd;
5019 	struct sk_buff *skb;
5020 	u32 cfg;
5021 
5022 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5023 	if (!skb)
5024 		return ERR_PTR(-ENOMEM);
5025 
5026 	cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
5027 
5028 	if (module_enable) {
5029 		cfg = SM(log_level,
5030 			 ATH10K_DBGLOG_CFG_LOG_LVL);
5031 	} else {
5032 		/* set back defaults, all modules with WARN level */
5033 		cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
5034 			 ATH10K_DBGLOG_CFG_LOG_LVL);
5035 		module_enable = ~0;
5036 	}
5037 
5038 	cmd->module_enable = __cpu_to_le32(module_enable);
5039 	cmd->module_valid = __cpu_to_le32(~0);
5040 	cmd->config_enable = __cpu_to_le32(cfg);
5041 	cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
5042 
5043 	ath10k_dbg(ar, ATH10K_DBG_WMI,
5044 		   "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
5045 		   __le32_to_cpu(cmd->module_enable),
5046 		   __le32_to_cpu(cmd->module_valid),
5047 		   __le32_to_cpu(cmd->config_enable),
5048 		   __le32_to_cpu(cmd->config_valid));
5049 	return skb;
5050 }
5051 
5052 static struct sk_buff *
5053 ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
5054 {
5055 	struct wmi_pdev_pktlog_enable_cmd *cmd;
5056 	struct sk_buff *skb;
5057 
5058 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5059 	if (!skb)
5060 		return ERR_PTR(-ENOMEM);
5061 
5062 	ev_bitmap &= ATH10K_PKTLOG_ANY;
5063 
5064 	cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
5065 	cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
5066 
5067 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
5068 		   ev_bitmap);
5069 	return skb;
5070 }
5071 
5072 static struct sk_buff *
5073 ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
5074 {
5075 	struct sk_buff *skb;
5076 
5077 	skb = ath10k_wmi_alloc_skb(ar, 0);
5078 	if (!skb)
5079 		return ERR_PTR(-ENOMEM);
5080 
5081 	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
5082 	return skb;
5083 }
5084 
5085 static struct sk_buff *
5086 ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
5087 				      u32 duration, u32 next_offset,
5088 				      u32 enabled)
5089 {
5090 	struct wmi_pdev_set_quiet_cmd *cmd;
5091 	struct sk_buff *skb;
5092 
5093 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5094 	if (!skb)
5095 		return ERR_PTR(-ENOMEM);
5096 
5097 	cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
5098 	cmd->period = __cpu_to_le32(period);
5099 	cmd->duration = __cpu_to_le32(duration);
5100 	cmd->next_start = __cpu_to_le32(next_offset);
5101 	cmd->enabled = __cpu_to_le32(enabled);
5102 
5103 	ath10k_dbg(ar, ATH10K_DBG_WMI,
5104 		   "wmi quiet param: period %u duration %u enabled %d\n",
5105 		   period, duration, enabled);
5106 	return skb;
5107 }
5108 
5109 static struct sk_buff *
5110 ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
5111 				   const u8 *mac)
5112 {
5113 	struct wmi_addba_clear_resp_cmd *cmd;
5114 	struct sk_buff *skb;
5115 
5116 	if (!mac)
5117 		return ERR_PTR(-EINVAL);
5118 
5119 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5120 	if (!skb)
5121 		return ERR_PTR(-ENOMEM);
5122 
5123 	cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
5124 	cmd->vdev_id = __cpu_to_le32(vdev_id);
5125 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
5126 
5127 	ath10k_dbg(ar, ATH10K_DBG_WMI,
5128 		   "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
5129 		   vdev_id, mac);
5130 	return skb;
5131 }
5132 
5133 static struct sk_buff *
5134 ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
5135 			     u32 tid, u32 buf_size)
5136 {
5137 	struct wmi_addba_send_cmd *cmd;
5138 	struct sk_buff *skb;
5139 
5140 	if (!mac)
5141 		return ERR_PTR(-EINVAL);
5142 
5143 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5144 	if (!skb)
5145 		return ERR_PTR(-ENOMEM);
5146 
5147 	cmd = (struct wmi_addba_send_cmd *)skb->data;
5148 	cmd->vdev_id = __cpu_to_le32(vdev_id);
5149 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
5150 	cmd->tid = __cpu_to_le32(tid);
5151 	cmd->buffersize = __cpu_to_le32(buf_size);
5152 
5153 	ath10k_dbg(ar, ATH10K_DBG_WMI,
5154 		   "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
5155 		   vdev_id, mac, tid, buf_size);
5156 	return skb;
5157 }
5158 
5159 static struct sk_buff *
5160 ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
5161 				 u32 tid, u32 status)
5162 {
5163 	struct wmi_addba_setresponse_cmd *cmd;
5164 	struct sk_buff *skb;
5165 
5166 	if (!mac)
5167 		return ERR_PTR(-EINVAL);
5168 
5169 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5170 	if (!skb)
5171 		return ERR_PTR(-ENOMEM);
5172 
5173 	cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
5174 	cmd->vdev_id = __cpu_to_le32(vdev_id);
5175 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
5176 	cmd->tid = __cpu_to_le32(tid);
5177 	cmd->statuscode = __cpu_to_le32(status);
5178 
5179 	ath10k_dbg(ar, ATH10K_DBG_WMI,
5180 		   "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
5181 		   vdev_id, mac, tid, status);
5182 	return skb;
5183 }
5184 
5185 static struct sk_buff *
5186 ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
5187 			     u32 tid, u32 initiator, u32 reason)
5188 {
5189 	struct wmi_delba_send_cmd *cmd;
5190 	struct sk_buff *skb;
5191 
5192 	if (!mac)
5193 		return ERR_PTR(-EINVAL);
5194 
5195 	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5196 	if (!skb)
5197 		return ERR_PTR(-ENOMEM);
5198 
5199 	cmd = (struct wmi_delba_send_cmd *)skb->data;
5200 	cmd->vdev_id = __cpu_to_le32(vdev_id);
5201 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
5202 	cmd->tid = __cpu_to_le32(tid);
5203 	cmd->initiator = __cpu_to_le32(initiator);
5204 	cmd->reasoncode = __cpu_to_le32(reason);
5205 
5206 	ath10k_dbg(ar, ATH10K_DBG_WMI,
5207 		   "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
5208 		   vdev_id, mac, tid, initiator, reason);
5209 	return skb;
5210 }
5211 
5212 static const struct wmi_ops wmi_ops = {
5213 	.rx = ath10k_wmi_op_rx,
5214 	.map_svc = wmi_main_svc_map,
5215 
5216 	.pull_scan = ath10k_wmi_op_pull_scan_ev,
5217 	.pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5218 	.pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5219 	.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5220 	.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5221 	.pull_swba = ath10k_wmi_op_pull_swba_ev,
5222 	.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5223 	.pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
5224 	.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5225 	.pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
5226 
5227 	.gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5228 	.gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5229 	.gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
5230 	.gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5231 	.gen_init = ath10k_wmi_op_gen_init,
5232 	.gen_start_scan = ath10k_wmi_op_gen_start_scan,
5233 	.gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5234 	.gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5235 	.gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5236 	.gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5237 	.gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5238 	.gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5239 	.gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5240 	.gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5241 	.gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5242 	.gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5243 	.gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5244 	/* .gen_vdev_wmm_conf not implemented */
5245 	.gen_peer_create = ath10k_wmi_op_gen_peer_create,
5246 	.gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5247 	.gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5248 	.gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5249 	.gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
5250 	.gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5251 	.gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5252 	.gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5253 	.gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5254 	.gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5255 	.gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5256 	.gen_request_stats = ath10k_wmi_op_gen_request_stats,
5257 	.gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5258 	.gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5259 	.gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5260 	.gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5261 	.gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
5262 	.gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
5263 	/* .gen_pdev_get_temperature not implemented */
5264 	.gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
5265 	.gen_addba_send = ath10k_wmi_op_gen_addba_send,
5266 	.gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
5267 	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
5268 	/* .gen_bcn_tmpl not implemented */
5269 	/* .gen_prb_tmpl not implemented */
5270 	/* .gen_p2p_go_bcn_ie not implemented */
5271 };
5272 
5273 static const struct wmi_ops wmi_10_1_ops = {
5274 	.rx = ath10k_wmi_10_1_op_rx,
5275 	.map_svc = wmi_10x_svc_map,
5276 	.pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
5277 	.pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
5278 	.gen_init = ath10k_wmi_10_1_op_gen_init,
5279 	.gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5280 	.gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5281 	.gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
5282 	/* .gen_pdev_get_temperature not implemented */
5283 
5284 	/* shared with main branch */
5285 	.pull_scan = ath10k_wmi_op_pull_scan_ev,
5286 	.pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5287 	.pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5288 	.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5289 	.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5290 	.pull_swba = ath10k_wmi_op_pull_swba_ev,
5291 	.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5292 	.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5293 
5294 	.gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5295 	.gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5296 	.gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5297 	.gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5298 	.gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5299 	.gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5300 	.gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5301 	.gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5302 	.gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5303 	.gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5304 	.gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5305 	.gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5306 	.gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5307 	.gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5308 	/* .gen_vdev_wmm_conf not implemented */
5309 	.gen_peer_create = ath10k_wmi_op_gen_peer_create,
5310 	.gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5311 	.gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5312 	.gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5313 	.gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5314 	.gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5315 	.gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5316 	.gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5317 	.gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5318 	.gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5319 	.gen_request_stats = ath10k_wmi_op_gen_request_stats,
5320 	.gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5321 	.gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5322 	.gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5323 	.gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5324 	.gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
5325 	.gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
5326 	.gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
5327 	.gen_addba_send = ath10k_wmi_op_gen_addba_send,
5328 	.gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
5329 	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
5330 	/* .gen_bcn_tmpl not implemented */
5331 	/* .gen_prb_tmpl not implemented */
5332 	/* .gen_p2p_go_bcn_ie not implemented */
5333 };
5334 
5335 static const struct wmi_ops wmi_10_2_ops = {
5336 	.rx = ath10k_wmi_10_2_op_rx,
5337 	.pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
5338 	.gen_init = ath10k_wmi_10_2_op_gen_init,
5339 	.gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
5340 	/* .gen_pdev_get_temperature not implemented */
5341 
5342 	/* shared with 10.1 */
5343 	.map_svc = wmi_10x_svc_map,
5344 	.pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
5345 	.gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5346 	.gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5347 
5348 	.pull_scan = ath10k_wmi_op_pull_scan_ev,
5349 	.pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5350 	.pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5351 	.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5352 	.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5353 	.pull_swba = ath10k_wmi_op_pull_swba_ev,
5354 	.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5355 	.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5356 
5357 	.gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5358 	.gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5359 	.gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5360 	.gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5361 	.gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5362 	.gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5363 	.gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5364 	.gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5365 	.gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5366 	.gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5367 	.gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5368 	.gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5369 	.gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5370 	.gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5371 	/* .gen_vdev_wmm_conf not implemented */
5372 	.gen_peer_create = ath10k_wmi_op_gen_peer_create,
5373 	.gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5374 	.gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5375 	.gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5376 	.gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5377 	.gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5378 	.gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5379 	.gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5380 	.gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5381 	.gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5382 	.gen_request_stats = ath10k_wmi_op_gen_request_stats,
5383 	.gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5384 	.gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5385 	.gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5386 	.gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5387 	.gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
5388 	.gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
5389 	.gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
5390 	.gen_addba_send = ath10k_wmi_op_gen_addba_send,
5391 	.gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
5392 	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
5393 };
5394 
5395 static const struct wmi_ops wmi_10_2_4_ops = {
5396 	.rx = ath10k_wmi_10_2_op_rx,
5397 	.pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
5398 	.gen_init = ath10k_wmi_10_2_op_gen_init,
5399 	.gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
5400 	.gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
5401 
5402 	/* shared with 10.1 */
5403 	.map_svc = wmi_10x_svc_map,
5404 	.pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
5405 	.gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5406 	.gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5407 
5408 	.pull_scan = ath10k_wmi_op_pull_scan_ev,
5409 	.pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5410 	.pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5411 	.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5412 	.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5413 	.pull_swba = ath10k_wmi_op_pull_swba_ev,
5414 	.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5415 	.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5416 
5417 	.gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5418 	.gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5419 	.gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5420 	.gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5421 	.gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5422 	.gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5423 	.gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5424 	.gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5425 	.gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5426 	.gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5427 	.gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5428 	.gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5429 	.gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5430 	.gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5431 	.gen_peer_create = ath10k_wmi_op_gen_peer_create,
5432 	.gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5433 	.gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5434 	.gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5435 	.gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5436 	.gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5437 	.gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5438 	.gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5439 	.gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5440 	.gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5441 	.gen_request_stats = ath10k_wmi_op_gen_request_stats,
5442 	.gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5443 	.gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5444 	.gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5445 	.gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5446 	.gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
5447 	.gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
5448 	.gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
5449 	.gen_addba_send = ath10k_wmi_op_gen_addba_send,
5450 	.gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
5451 	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
5452 	/* .gen_bcn_tmpl not implemented */
5453 	/* .gen_prb_tmpl not implemented */
5454 	/* .gen_p2p_go_bcn_ie not implemented */
5455 };
5456 
5457 int ath10k_wmi_attach(struct ath10k *ar)
5458 {
5459 	switch (ar->wmi.op_version) {
5460 	case ATH10K_FW_WMI_OP_VERSION_10_2_4:
5461 		ar->wmi.cmd = &wmi_10_2_4_cmd_map;
5462 		ar->wmi.ops = &wmi_10_2_4_ops;
5463 		ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
5464 		ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
5465 		break;
5466 	case ATH10K_FW_WMI_OP_VERSION_10_2:
5467 		ar->wmi.cmd = &wmi_10_2_cmd_map;
5468 		ar->wmi.ops = &wmi_10_2_ops;
5469 		ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
5470 		ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
5471 		break;
5472 	case ATH10K_FW_WMI_OP_VERSION_10_1:
5473 		ar->wmi.cmd = &wmi_10x_cmd_map;
5474 		ar->wmi.ops = &wmi_10_1_ops;
5475 		ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
5476 		ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
5477 		break;
5478 	case ATH10K_FW_WMI_OP_VERSION_MAIN:
5479 		ar->wmi.cmd = &wmi_cmd_map;
5480 		ar->wmi.ops = &wmi_ops;
5481 		ar->wmi.vdev_param = &wmi_vdev_param_map;
5482 		ar->wmi.pdev_param = &wmi_pdev_param_map;
5483 		break;
5484 	case ATH10K_FW_WMI_OP_VERSION_TLV:
5485 		ath10k_wmi_tlv_attach(ar);
5486 		break;
5487 	case ATH10K_FW_WMI_OP_VERSION_UNSET:
5488 	case ATH10K_FW_WMI_OP_VERSION_MAX:
5489 		ath10k_err(ar, "unsupported WMI op version: %d\n",
5490 			   ar->wmi.op_version);
5491 		return -EINVAL;
5492 	}
5493 
5494 	init_completion(&ar->wmi.service_ready);
5495 	init_completion(&ar->wmi.unified_ready);
5496 
5497 	return 0;
5498 }
5499 
5500 void ath10k_wmi_detach(struct ath10k *ar)
5501 {
5502 	int i;
5503 
5504 	/* free the host memory chunks requested by firmware */
5505 	for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
5506 		dma_free_coherent(ar->dev,
5507 				  ar->wmi.mem_chunks[i].len,
5508 				  ar->wmi.mem_chunks[i].vaddr,
5509 				  ar->wmi.mem_chunks[i].paddr);
5510 	}
5511 
5512 	ar->wmi.num_mem_chunks = 0;
5513 }
5514