1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #include <linux/skbuff.h> 9 #include <linux/ctype.h> 10 11 #include "core.h" 12 #include "htc.h" 13 #include "debug.h" 14 #include "wmi.h" 15 #include "wmi-tlv.h" 16 #include "mac.h" 17 #include "testmode.h" 18 #include "wmi-ops.h" 19 #include "p2p.h" 20 #include "hw.h" 21 #include "hif.h" 22 #include "txrx.h" 23 24 #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9 25 #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ) 26 #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6) 27 28 /* MAIN WMI cmd track */ 29 static struct wmi_cmd_map wmi_cmd_map = { 30 .init_cmdid = WMI_INIT_CMDID, 31 .start_scan_cmdid = WMI_START_SCAN_CMDID, 32 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID, 33 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID, 34 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID, 35 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED, 36 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID, 37 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID, 38 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID, 39 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID, 40 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID, 41 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID, 42 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID, 43 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID, 44 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 45 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID, 46 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 47 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID, 48 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID, 49 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID, 50 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID, 51 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID, 52 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID, 53 .vdev_up_cmdid = WMI_VDEV_UP_CMDID, 54 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID, 55 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID, 56 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID, 57 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID, 58 .peer_create_cmdid = WMI_PEER_CREATE_CMDID, 59 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID, 60 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID, 61 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID, 62 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID, 63 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID, 64 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 65 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID, 66 .bcn_tx_cmdid = WMI_BCN_TX_CMDID, 67 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID, 68 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID, 69 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID, 70 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID, 71 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID, 72 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID, 73 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID, 74 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID, 75 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID, 76 .delba_send_cmdid = WMI_DELBA_SEND_CMDID, 77 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID, 78 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID, 79 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID, 80 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID, 81 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID, 82 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID, 83 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID, 84 .roam_scan_mode = WMI_ROAM_SCAN_MODE, 85 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD, 86 .roam_scan_period = WMI_ROAM_SCAN_PERIOD, 87 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 88 .roam_ap_profile = WMI_ROAM_AP_PROFILE, 89 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE, 90 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE, 91 .ofl_scan_period = WMI_OFL_SCAN_PERIOD, 92 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO, 93 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY, 94 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE, 95 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE, 96 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 97 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID, 98 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 99 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID, 100 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID, 101 .wlan_profile_set_hist_intvl_cmdid = 102 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 103 .wlan_profile_get_profile_data_cmdid = 104 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 105 .wlan_profile_enable_profile_id_cmdid = 106 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 107 .wlan_profile_list_profile_id_cmdid = 108 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 109 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID, 110 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID, 111 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID, 112 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID, 113 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID, 114 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID, 115 .wow_enable_disable_wake_event_cmdid = 116 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 117 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID, 118 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 119 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID, 120 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID, 121 .vdev_spectral_scan_configure_cmdid = 122 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 123 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 124 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID, 125 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID, 126 .network_list_offload_config_cmdid = 127 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID, 128 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID, 129 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID, 130 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 131 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID, 132 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID, 133 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID, 134 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID, 135 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID, 136 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD, 137 .echo_cmdid = WMI_ECHO_CMDID, 138 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID, 139 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID, 140 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID, 141 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID, 142 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID, 143 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID, 144 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, 145 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, 146 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, 147 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 148 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, 149 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, 150 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, 151 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, 152 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, 153 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, 154 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, 155 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, 156 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, 157 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, 158 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 159 .oem_req_cmdid = WMI_CMD_UNSUPPORTED, 160 .nan_cmdid = WMI_CMD_UNSUPPORTED, 161 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, 162 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, 163 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, 164 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, 165 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, 166 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, 167 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, 168 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, 169 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, 170 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, 171 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, 172 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, 173 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, 174 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, 175 .fwtest_cmdid = WMI_CMD_UNSUPPORTED, 176 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, 177 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, 178 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, 179 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, 180 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, 181 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, 182 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, 183 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, 184 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, 185 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, 186 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, 187 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, 188 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, 189 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, 190 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, 191 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED, 192 .radar_found_cmdid = WMI_CMD_UNSUPPORTED, 193 }; 194 195 /* 10.X WMI cmd track */ 196 static struct wmi_cmd_map wmi_10x_cmd_map = { 197 .init_cmdid = WMI_10X_INIT_CMDID, 198 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID, 199 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID, 200 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID, 201 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, 202 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED, 203 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID, 204 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID, 205 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID, 206 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, 207 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, 208 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, 209 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, 210 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, 211 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, 212 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID, 213 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, 214 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, 215 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, 216 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID, 217 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID, 218 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID, 219 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID, 220 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID, 221 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID, 222 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID, 223 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID, 224 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID, 225 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID, 226 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID, 227 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID, 228 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID, 229 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID, 230 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, 231 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, 232 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID, 233 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID, 234 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID, 235 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 236 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID, 237 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID, 238 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID, 239 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 240 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID, 241 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID, 242 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID, 243 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID, 244 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID, 245 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID, 246 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID, 247 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID, 248 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID, 249 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID, 250 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID, 251 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE, 252 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, 253 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD, 254 .roam_scan_rssi_change_threshold = 255 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 256 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE, 257 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE, 258 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, 259 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD, 260 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO, 261 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY, 262 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE, 263 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE, 264 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, 265 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID, 266 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, 267 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, 268 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, 269 .wlan_profile_set_hist_intvl_cmdid = 270 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 271 .wlan_profile_get_profile_data_cmdid = 272 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 273 .wlan_profile_enable_profile_id_cmdid = 274 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 275 .wlan_profile_list_profile_id_cmdid = 276 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 277 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID, 278 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID, 279 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID, 280 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID, 281 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, 282 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, 283 .wow_enable_disable_wake_event_cmdid = 284 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 285 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID, 286 .wow_hostwakeup_from_sleep_cmdid = 287 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 288 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID, 289 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID, 290 .vdev_spectral_scan_configure_cmdid = 291 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 292 .vdev_spectral_scan_enable_cmdid = 293 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 294 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID, 295 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 296 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 297 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, 298 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, 299 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, 300 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 301 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 302 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 303 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 304 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 305 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 306 .echo_cmdid = WMI_10X_ECHO_CMDID, 307 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID, 308 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID, 309 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID, 310 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 311 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 312 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 313 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, 314 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, 315 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, 316 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 317 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, 318 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, 319 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, 320 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, 321 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, 322 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, 323 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, 324 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, 325 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, 326 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, 327 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 328 .oem_req_cmdid = WMI_CMD_UNSUPPORTED, 329 .nan_cmdid = WMI_CMD_UNSUPPORTED, 330 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, 331 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, 332 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, 333 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, 334 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, 335 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, 336 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, 337 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, 338 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, 339 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, 340 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, 341 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, 342 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, 343 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, 344 .fwtest_cmdid = WMI_CMD_UNSUPPORTED, 345 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, 346 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, 347 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, 348 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, 349 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, 350 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, 351 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, 352 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, 353 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, 354 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, 355 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, 356 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, 357 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, 358 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, 359 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, 360 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED, 361 .radar_found_cmdid = WMI_CMD_UNSUPPORTED, 362 }; 363 364 /* 10.2.4 WMI cmd track */ 365 static struct wmi_cmd_map wmi_10_2_4_cmd_map = { 366 .init_cmdid = WMI_10_2_INIT_CMDID, 367 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, 368 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, 369 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, 370 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, 371 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED, 372 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, 373 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, 374 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, 375 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, 376 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, 377 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, 378 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, 379 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, 380 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, 381 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, 382 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, 383 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, 384 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, 385 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, 386 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, 387 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, 388 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, 389 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, 390 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, 391 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, 392 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, 393 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, 394 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, 395 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, 396 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, 397 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, 398 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, 399 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, 400 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, 401 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, 402 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, 403 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 404 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, 405 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, 406 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, 407 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 408 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, 409 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, 410 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, 411 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, 412 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, 413 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, 414 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, 415 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, 416 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, 417 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, 418 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, 419 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, 420 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, 421 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, 422 .roam_scan_rssi_change_threshold = 423 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 424 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, 425 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, 426 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, 427 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, 428 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, 429 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, 430 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, 431 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, 432 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, 433 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, 434 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, 435 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, 436 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, 437 .wlan_profile_set_hist_intvl_cmdid = 438 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 439 .wlan_profile_get_profile_data_cmdid = 440 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 441 .wlan_profile_enable_profile_id_cmdid = 442 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 443 .wlan_profile_list_profile_id_cmdid = 444 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 445 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, 446 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, 447 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, 448 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, 449 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, 450 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, 451 .wow_enable_disable_wake_event_cmdid = 452 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 453 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, 454 .wow_hostwakeup_from_sleep_cmdid = 455 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 456 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, 457 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, 458 .vdev_spectral_scan_configure_cmdid = 459 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 460 .vdev_spectral_scan_enable_cmdid = 461 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 462 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, 463 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 464 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 465 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, 466 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, 467 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, 468 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 469 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 470 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 471 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 472 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 473 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 474 .echo_cmdid = WMI_10_2_ECHO_CMDID, 475 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, 476 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, 477 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, 478 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 479 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 480 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 481 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, 482 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, 483 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, 484 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, 485 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS, 486 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, 487 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, 488 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, 489 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, 490 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, 491 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, 492 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, 493 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, 494 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, 495 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 496 .oem_req_cmdid = WMI_CMD_UNSUPPORTED, 497 .nan_cmdid = WMI_CMD_UNSUPPORTED, 498 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, 499 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, 500 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, 501 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, 502 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, 503 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, 504 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, 505 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, 506 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, 507 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, 508 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, 509 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, 510 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, 511 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, 512 .fwtest_cmdid = WMI_CMD_UNSUPPORTED, 513 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, 514 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, 515 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, 516 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, 517 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, 518 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, 519 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, 520 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, 521 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, 522 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, 523 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, 524 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, 525 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, 526 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, 527 .pdev_bss_chan_info_request_cmdid = 528 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 529 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED, 530 .radar_found_cmdid = WMI_CMD_UNSUPPORTED, 531 .set_bb_timing_cmdid = WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID, 532 }; 533 534 /* 10.4 WMI cmd track */ 535 static struct wmi_cmd_map wmi_10_4_cmd_map = { 536 .init_cmdid = WMI_10_4_INIT_CMDID, 537 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID, 538 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID, 539 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID, 540 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID, 541 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED, 542 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID, 543 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID, 544 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID, 545 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID, 546 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID, 547 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID, 548 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID, 549 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID, 550 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID, 551 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID, 552 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID, 553 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID, 554 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID, 555 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID, 556 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID, 557 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID, 558 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID, 559 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID, 560 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID, 561 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID, 562 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID, 563 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID, 564 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID, 565 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID, 566 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID, 567 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID, 568 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID, 569 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID, 570 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID, 571 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID, 572 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID, 573 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID, 574 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID, 575 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID, 576 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID, 577 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID, 578 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID, 579 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID, 580 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID, 581 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID, 582 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID, 583 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID, 584 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID, 585 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID, 586 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID, 587 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID, 588 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID, 589 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID, 590 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE, 591 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD, 592 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD, 593 .roam_scan_rssi_change_threshold = 594 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 595 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE, 596 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE, 597 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE, 598 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD, 599 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO, 600 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY, 601 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE, 602 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE, 603 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID, 604 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID, 605 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID, 606 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID, 607 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID, 608 .wlan_profile_set_hist_intvl_cmdid = 609 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 610 .wlan_profile_get_profile_data_cmdid = 611 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 612 .wlan_profile_enable_profile_id_cmdid = 613 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 614 .wlan_profile_list_profile_id_cmdid = 615 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 616 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID, 617 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID, 618 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID, 619 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID, 620 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID, 621 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID, 622 .wow_enable_disable_wake_event_cmdid = 623 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 624 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID, 625 .wow_hostwakeup_from_sleep_cmdid = 626 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 627 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID, 628 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID, 629 .vdev_spectral_scan_configure_cmdid = 630 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 631 .vdev_spectral_scan_enable_cmdid = 632 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 633 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID, 634 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 635 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 636 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID, 637 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID, 638 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID, 639 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 640 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 641 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 642 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 643 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 644 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 645 .echo_cmdid = WMI_10_4_ECHO_CMDID, 646 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID, 647 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID, 648 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID, 649 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 650 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID, 651 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID, 652 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID, 653 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID, 654 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID, 655 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID, 656 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED, 657 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED, 658 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID, 659 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID, 660 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID, 661 .wlan_peer_caching_add_peer_cmdid = 662 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID, 663 .wlan_peer_caching_evict_peer_cmdid = 664 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID, 665 .wlan_peer_caching_restore_peer_cmdid = 666 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID, 667 .wlan_peer_caching_print_all_peers_info_cmdid = 668 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID, 669 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID, 670 .peer_add_proxy_sta_entry_cmdid = 671 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID, 672 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID, 673 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID, 674 .nan_cmdid = WMI_10_4_NAN_CMDID, 675 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID, 676 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID, 677 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID, 678 .pdev_smart_ant_set_rx_antenna_cmdid = 679 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 680 .peer_smart_ant_set_tx_antenna_cmdid = 681 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 682 .peer_smart_ant_set_train_info_cmdid = 683 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 684 .peer_smart_ant_set_node_config_ops_cmdid = 685 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 686 .pdev_set_antenna_switch_table_cmdid = 687 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 688 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID, 689 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID, 690 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID, 691 .pdev_ratepwr_chainmsk_table_cmdid = 692 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, 693 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID, 694 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID, 695 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID, 696 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID, 697 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID, 698 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID, 699 .pdev_get_ani_ofdm_config_cmdid = 700 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 701 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID, 702 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID, 703 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID, 704 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID, 705 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID, 706 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID, 707 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID, 708 .vdev_filter_neighbor_rx_packets_cmdid = 709 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 710 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID, 711 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID, 712 .pdev_bss_chan_info_request_cmdid = 713 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 714 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID, 715 .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID, 716 .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID, 717 .atf_ssid_grouping_request_cmdid = 718 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID, 719 .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID, 720 .set_periodic_channel_stats_cfg_cmdid = 721 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG, 722 .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID, 723 .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID, 724 .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID, 725 .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID, 726 .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID, 727 .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID, 728 .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID, 729 .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID, 730 .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID, 731 .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID, 732 .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID, 733 .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID, 734 .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID, 735 .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID, 736 .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID, 737 .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID, 738 .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID, 739 .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID, 740 .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID, 741 .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID, 742 .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID, 743 }; 744 745 /* MAIN WMI VDEV param map */ 746 static struct wmi_vdev_param_map wmi_vdev_param_map = { 747 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD, 748 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 749 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL, 750 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL, 751 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE, 752 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE, 753 .slot_time = WMI_VDEV_PARAM_SLOT_TIME, 754 .preamble = WMI_VDEV_PARAM_PREAMBLE, 755 .swba_time = WMI_VDEV_PARAM_SWBA_TIME, 756 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD, 757 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME, 758 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL, 759 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD, 760 .wmi_vdev_oc_scheduler_air_time_limit = 761 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 762 .wds = WMI_VDEV_PARAM_WDS, 763 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW, 764 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX, 765 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 766 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 767 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM, 768 .chwidth = WMI_VDEV_PARAM_CHWIDTH, 769 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET, 770 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 771 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT, 772 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE, 773 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE, 774 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE, 775 .sgi = WMI_VDEV_PARAM_SGI, 776 .ldpc = WMI_VDEV_PARAM_LDPC, 777 .tx_stbc = WMI_VDEV_PARAM_TX_STBC, 778 .rx_stbc = WMI_VDEV_PARAM_RX_STBC, 779 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD, 780 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID, 781 .nss = WMI_VDEV_PARAM_NSS, 782 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE, 783 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE, 784 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE, 785 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE, 786 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 787 .ap_keepalive_min_idle_inactive_time_secs = 788 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 789 .ap_keepalive_max_idle_inactive_time_secs = 790 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 791 .ap_keepalive_max_unresponsive_time_secs = 792 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 793 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 794 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED, 795 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS, 796 .txbf = WMI_VDEV_PARAM_TXBF, 797 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE, 798 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY, 799 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE, 800 .ap_detect_out_of_sync_sleeping_sta_time_secs = 801 WMI_VDEV_PARAM_UNSUPPORTED, 802 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, 803 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, 804 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, 805 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, 806 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, 807 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, 808 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, 809 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, 810 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, 811 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, 812 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, 813 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, 814 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, 815 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, 816 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, 817 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, 818 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED, 819 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED, 820 }; 821 822 /* 10.X WMI VDEV param map */ 823 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = { 824 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, 825 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 826 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, 827 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, 828 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, 829 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, 830 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, 831 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, 832 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, 833 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, 834 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, 835 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, 836 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, 837 .wmi_vdev_oc_scheduler_air_time_limit = 838 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 839 .wds = WMI_10X_VDEV_PARAM_WDS, 840 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, 841 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, 842 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 843 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 844 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, 845 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, 846 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, 847 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, 848 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, 849 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, 850 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, 851 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, 852 .sgi = WMI_10X_VDEV_PARAM_SGI, 853 .ldpc = WMI_10X_VDEV_PARAM_LDPC, 854 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, 855 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, 856 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, 857 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, 858 .nss = WMI_10X_VDEV_PARAM_NSS, 859 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, 860 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, 861 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, 862 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, 863 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 864 .ap_keepalive_min_idle_inactive_time_secs = 865 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 866 .ap_keepalive_max_idle_inactive_time_secs = 867 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 868 .ap_keepalive_max_unresponsive_time_secs = 869 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 870 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, 871 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, 872 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, 873 .txbf = WMI_VDEV_PARAM_UNSUPPORTED, 874 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, 875 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, 876 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, 877 .ap_detect_out_of_sync_sleeping_sta_time_secs = 878 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 879 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, 880 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, 881 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, 882 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, 883 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, 884 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, 885 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, 886 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, 887 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, 888 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, 889 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, 890 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, 891 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, 892 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, 893 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, 894 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, 895 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED, 896 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED, 897 }; 898 899 static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = { 900 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, 901 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 902 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, 903 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, 904 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, 905 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, 906 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, 907 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, 908 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, 909 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, 910 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, 911 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, 912 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, 913 .wmi_vdev_oc_scheduler_air_time_limit = 914 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 915 .wds = WMI_10X_VDEV_PARAM_WDS, 916 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, 917 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, 918 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 919 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 920 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, 921 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, 922 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, 923 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, 924 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, 925 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, 926 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, 927 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, 928 .sgi = WMI_10X_VDEV_PARAM_SGI, 929 .ldpc = WMI_10X_VDEV_PARAM_LDPC, 930 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, 931 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, 932 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, 933 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, 934 .nss = WMI_10X_VDEV_PARAM_NSS, 935 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, 936 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, 937 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, 938 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, 939 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 940 .ap_keepalive_min_idle_inactive_time_secs = 941 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 942 .ap_keepalive_max_idle_inactive_time_secs = 943 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 944 .ap_keepalive_max_unresponsive_time_secs = 945 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 946 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, 947 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, 948 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, 949 .txbf = WMI_VDEV_PARAM_UNSUPPORTED, 950 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, 951 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, 952 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, 953 .ap_detect_out_of_sync_sleeping_sta_time_secs = 954 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 955 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, 956 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, 957 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, 958 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, 959 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, 960 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, 961 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, 962 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, 963 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, 964 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, 965 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, 966 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, 967 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, 968 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, 969 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, 970 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, 971 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED, 972 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED, 973 }; 974 975 static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = { 976 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD, 977 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 978 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL, 979 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL, 980 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE, 981 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE, 982 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME, 983 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE, 984 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME, 985 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD, 986 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME, 987 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL, 988 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD, 989 .wmi_vdev_oc_scheduler_air_time_limit = 990 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 991 .wds = WMI_10_4_VDEV_PARAM_WDS, 992 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW, 993 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX, 994 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT, 995 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT, 996 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM, 997 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH, 998 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET, 999 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION, 1000 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT, 1001 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE, 1002 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE, 1003 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE, 1004 .sgi = WMI_10_4_VDEV_PARAM_SGI, 1005 .ldpc = WMI_10_4_VDEV_PARAM_LDPC, 1006 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC, 1007 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC, 1008 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD, 1009 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID, 1010 .nss = WMI_10_4_VDEV_PARAM_NSS, 1011 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE, 1012 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE, 1013 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE, 1014 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE, 1015 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1016 .ap_keepalive_min_idle_inactive_time_secs = 1017 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1018 .ap_keepalive_max_idle_inactive_time_secs = 1019 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1020 .ap_keepalive_max_unresponsive_time_secs = 1021 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1022 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS, 1023 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET, 1024 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS, 1025 .txbf = WMI_10_4_VDEV_PARAM_TXBF, 1026 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE, 1027 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY, 1028 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE, 1029 .ap_detect_out_of_sync_sleeping_sta_time_secs = 1030 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1031 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES, 1032 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR, 1033 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET, 1034 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE, 1035 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK, 1036 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK, 1037 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1038 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1039 .early_rx_bmiss_sample_cycle = 1040 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1041 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1042 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1043 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1044 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA, 1045 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC, 1046 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE, 1047 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK, 1048 .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT, 1049 .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT, 1050 .disable_4addr_src_lrn = WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN, 1051 .rtt_responder_role = WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE, 1052 }; 1053 1054 static struct wmi_pdev_param_map wmi_pdev_param_map = { 1055 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, 1056 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, 1057 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 1058 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 1059 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE, 1060 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE, 1061 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE, 1062 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 1063 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE, 1064 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW, 1065 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 1066 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 1067 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH, 1068 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 1069 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE, 1070 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 1071 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 1072 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 1073 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 1074 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 1075 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 1076 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 1077 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 1078 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE, 1079 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE, 1080 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 1081 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 1082 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 1083 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 1084 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 1085 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 1086 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 1087 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 1088 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS, 1089 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 1090 .dcs = WMI_PDEV_PARAM_DCS, 1091 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE, 1092 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD, 1093 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 1094 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 1095 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL, 1096 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN, 1097 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA, 1098 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG, 1099 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP, 1100 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, 1101 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, 1102 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, 1103 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED, 1104 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, 1105 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1106 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, 1107 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, 1108 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, 1109 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, 1110 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, 1111 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, 1112 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1113 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1114 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, 1115 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, 1116 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, 1117 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, 1118 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, 1119 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1120 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1121 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1122 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1123 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1124 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1125 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, 1126 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, 1127 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, 1128 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, 1129 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, 1130 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, 1131 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, 1132 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, 1133 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, 1134 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, 1135 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, 1136 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, 1137 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, 1138 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, 1139 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, 1140 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, 1141 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, 1142 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, 1143 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, 1144 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, 1145 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, 1146 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED, 1147 }; 1148 1149 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { 1150 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, 1151 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, 1152 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, 1153 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, 1154 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, 1155 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, 1156 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, 1157 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 1158 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, 1159 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, 1160 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 1161 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, 1162 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, 1163 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, 1164 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, 1165 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, 1166 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, 1167 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, 1168 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, 1169 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 1170 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 1171 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, 1172 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 1173 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, 1174 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, 1175 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, 1176 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, 1177 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, 1178 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, 1179 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 1180 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 1181 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 1182 .bcnflt_stats_update_period = 1183 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 1184 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, 1185 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, 1186 .dcs = WMI_10X_PDEV_PARAM_DCS, 1187 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, 1188 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, 1189 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, 1190 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, 1191 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, 1192 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, 1193 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, 1194 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, 1195 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, 1196 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, 1197 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, 1198 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, 1199 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, 1200 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, 1201 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1202 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, 1203 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, 1204 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, 1205 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, 1206 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, 1207 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, 1208 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1209 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1210 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, 1211 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, 1212 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, 1213 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, 1214 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, 1215 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1216 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1217 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1218 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1219 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1220 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1221 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, 1222 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, 1223 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, 1224 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, 1225 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, 1226 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, 1227 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, 1228 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, 1229 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, 1230 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, 1231 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, 1232 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, 1233 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, 1234 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, 1235 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, 1236 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, 1237 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, 1238 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, 1239 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, 1240 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, 1241 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, 1242 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED, 1243 }; 1244 1245 static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = { 1246 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, 1247 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, 1248 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, 1249 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, 1250 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, 1251 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, 1252 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, 1253 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 1254 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, 1255 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, 1256 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 1257 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, 1258 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, 1259 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, 1260 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, 1261 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, 1262 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, 1263 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, 1264 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, 1265 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 1266 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 1267 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, 1268 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 1269 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, 1270 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, 1271 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, 1272 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, 1273 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, 1274 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, 1275 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 1276 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 1277 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 1278 .bcnflt_stats_update_period = 1279 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 1280 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, 1281 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, 1282 .dcs = WMI_10X_PDEV_PARAM_DCS, 1283 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, 1284 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, 1285 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, 1286 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, 1287 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, 1288 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, 1289 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, 1290 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, 1291 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, 1292 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, 1293 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, 1294 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, 1295 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, 1296 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, 1297 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1298 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, 1299 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, 1300 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, 1301 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, 1302 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, 1303 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, 1304 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1305 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, 1306 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, 1307 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, 1308 .peer_sta_ps_statechg_enable = 1309 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE, 1310 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, 1311 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, 1312 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1313 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1314 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1315 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1316 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1317 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, 1318 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, 1319 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, 1320 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, 1321 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, 1322 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, 1323 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, 1324 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, 1325 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, 1326 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, 1327 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, 1328 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, 1329 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, 1330 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, 1331 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, 1332 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, 1333 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, 1334 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, 1335 .pdev_reset = WMI_10X_PDEV_PARAM_PDEV_RESET, 1336 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, 1337 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, 1338 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, 1339 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED, 1340 }; 1341 1342 /* firmware 10.2 specific mappings */ 1343 static struct wmi_cmd_map wmi_10_2_cmd_map = { 1344 .init_cmdid = WMI_10_2_INIT_CMDID, 1345 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, 1346 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, 1347 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, 1348 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, 1349 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED, 1350 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, 1351 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, 1352 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, 1353 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, 1354 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, 1355 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, 1356 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, 1357 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, 1358 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, 1359 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, 1360 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, 1361 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, 1362 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, 1363 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, 1364 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, 1365 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, 1366 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, 1367 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, 1368 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, 1369 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, 1370 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, 1371 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, 1372 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, 1373 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, 1374 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, 1375 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, 1376 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, 1377 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, 1378 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, 1379 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, 1380 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, 1381 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 1382 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, 1383 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, 1384 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, 1385 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 1386 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, 1387 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, 1388 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, 1389 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, 1390 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, 1391 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, 1392 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, 1393 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, 1394 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, 1395 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, 1396 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, 1397 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, 1398 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, 1399 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, 1400 .roam_scan_rssi_change_threshold = 1401 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1402 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, 1403 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, 1404 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, 1405 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, 1406 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, 1407 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, 1408 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, 1409 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, 1410 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, 1411 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, 1412 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, 1413 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, 1414 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, 1415 .wlan_profile_set_hist_intvl_cmdid = 1416 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 1417 .wlan_profile_get_profile_data_cmdid = 1418 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 1419 .wlan_profile_enable_profile_id_cmdid = 1420 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 1421 .wlan_profile_list_profile_id_cmdid = 1422 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 1423 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, 1424 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, 1425 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, 1426 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, 1427 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, 1428 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, 1429 .wow_enable_disable_wake_event_cmdid = 1430 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 1431 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, 1432 .wow_hostwakeup_from_sleep_cmdid = 1433 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 1434 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, 1435 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, 1436 .vdev_spectral_scan_configure_cmdid = 1437 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 1438 .vdev_spectral_scan_enable_cmdid = 1439 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 1440 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, 1441 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 1442 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 1443 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, 1444 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, 1445 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, 1446 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 1447 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 1448 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 1449 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 1450 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 1451 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 1452 .echo_cmdid = WMI_10_2_ECHO_CMDID, 1453 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, 1454 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, 1455 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, 1456 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 1457 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 1458 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 1459 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, 1460 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, 1461 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, 1462 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 1463 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, 1464 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, 1465 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, 1466 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, 1467 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, 1468 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, 1469 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, 1470 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, 1471 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, 1472 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, 1473 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 1474 .oem_req_cmdid = WMI_CMD_UNSUPPORTED, 1475 .nan_cmdid = WMI_CMD_UNSUPPORTED, 1476 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, 1477 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, 1478 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, 1479 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, 1480 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, 1481 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, 1482 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, 1483 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, 1484 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, 1485 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, 1486 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, 1487 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, 1488 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, 1489 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, 1490 .fwtest_cmdid = WMI_CMD_UNSUPPORTED, 1491 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, 1492 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, 1493 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, 1494 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, 1495 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, 1496 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED, 1497 .radar_found_cmdid = WMI_CMD_UNSUPPORTED, 1498 }; 1499 1500 static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = { 1501 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK, 1502 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK, 1503 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G, 1504 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G, 1505 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE, 1506 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE, 1507 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE, 1508 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 1509 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE, 1510 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW, 1511 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 1512 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH, 1513 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH, 1514 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING, 1515 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE, 1516 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE, 1517 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK, 1518 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI, 1519 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO, 1520 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 1521 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 1522 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE, 1523 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 1524 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE, 1525 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE, 1526 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 1527 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 1528 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 1529 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 1530 .pdev_stats_update_period = 1531 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 1532 .vdev_stats_update_period = 1533 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 1534 .peer_stats_update_period = 1535 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 1536 .bcnflt_stats_update_period = 1537 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 1538 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS, 1539 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE, 1540 .dcs = WMI_10_4_PDEV_PARAM_DCS, 1541 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE, 1542 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD, 1543 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD, 1544 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL, 1545 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL, 1546 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN, 1547 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA, 1548 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG, 1549 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP, 1550 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET, 1551 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR, 1552 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE, 1553 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD, 1554 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST, 1555 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE, 1556 .smart_antenna_default_antenna = 1557 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 1558 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE, 1559 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID, 1560 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN, 1561 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER, 1562 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID, 1563 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE, 1564 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE, 1565 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 1566 .remove_mcast2ucast_buffer = 1567 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 1568 .peer_sta_ps_statechg_enable = 1569 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE, 1570 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 1571 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS, 1572 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 1573 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID, 1574 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 1575 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 1576 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 1577 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID, 1578 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS, 1579 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY, 1580 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION, 1581 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD, 1582 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE, 1583 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 1584 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH, 1585 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION, 1586 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN, 1587 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT, 1588 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL, 1589 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G, 1590 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G, 1591 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 1592 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 1593 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD, 1594 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE, 1595 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET, 1596 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET, 1597 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR, 1598 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR, 1599 .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX, 1600 }; 1601 1602 static const u8 wmi_key_cipher_suites[] = { 1603 [WMI_CIPHER_NONE] = WMI_CIPHER_NONE, 1604 [WMI_CIPHER_WEP] = WMI_CIPHER_WEP, 1605 [WMI_CIPHER_TKIP] = WMI_CIPHER_TKIP, 1606 [WMI_CIPHER_AES_OCB] = WMI_CIPHER_AES_OCB, 1607 [WMI_CIPHER_AES_CCM] = WMI_CIPHER_AES_CCM, 1608 [WMI_CIPHER_WAPI] = WMI_CIPHER_WAPI, 1609 [WMI_CIPHER_CKIP] = WMI_CIPHER_CKIP, 1610 [WMI_CIPHER_AES_CMAC] = WMI_CIPHER_AES_CMAC, 1611 [WMI_CIPHER_AES_GCM] = WMI_CIPHER_AES_GCM, 1612 }; 1613 1614 static const u8 wmi_tlv_key_cipher_suites[] = { 1615 [WMI_CIPHER_NONE] = WMI_TLV_CIPHER_NONE, 1616 [WMI_CIPHER_WEP] = WMI_TLV_CIPHER_WEP, 1617 [WMI_CIPHER_TKIP] = WMI_TLV_CIPHER_TKIP, 1618 [WMI_CIPHER_AES_OCB] = WMI_TLV_CIPHER_AES_OCB, 1619 [WMI_CIPHER_AES_CCM] = WMI_TLV_CIPHER_AES_CCM, 1620 [WMI_CIPHER_WAPI] = WMI_TLV_CIPHER_WAPI, 1621 [WMI_CIPHER_CKIP] = WMI_TLV_CIPHER_CKIP, 1622 [WMI_CIPHER_AES_CMAC] = WMI_TLV_CIPHER_AES_CMAC, 1623 [WMI_CIPHER_AES_GCM] = WMI_TLV_CIPHER_AES_GCM, 1624 }; 1625 1626 static const struct wmi_peer_flags_map wmi_peer_flags_map = { 1627 .auth = WMI_PEER_AUTH, 1628 .qos = WMI_PEER_QOS, 1629 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY, 1630 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY, 1631 .apsd = WMI_PEER_APSD, 1632 .ht = WMI_PEER_HT, 1633 .bw40 = WMI_PEER_40MHZ, 1634 .stbc = WMI_PEER_STBC, 1635 .ldbc = WMI_PEER_LDPC, 1636 .dyn_mimops = WMI_PEER_DYN_MIMOPS, 1637 .static_mimops = WMI_PEER_STATIC_MIMOPS, 1638 .spatial_mux = WMI_PEER_SPATIAL_MUX, 1639 .vht = WMI_PEER_VHT, 1640 .bw80 = WMI_PEER_80MHZ, 1641 .vht_2g = WMI_PEER_VHT_2G, 1642 .pmf = WMI_PEER_PMF, 1643 .bw160 = WMI_PEER_160MHZ, 1644 }; 1645 1646 static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = { 1647 .auth = WMI_10X_PEER_AUTH, 1648 .qos = WMI_10X_PEER_QOS, 1649 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY, 1650 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY, 1651 .apsd = WMI_10X_PEER_APSD, 1652 .ht = WMI_10X_PEER_HT, 1653 .bw40 = WMI_10X_PEER_40MHZ, 1654 .stbc = WMI_10X_PEER_STBC, 1655 .ldbc = WMI_10X_PEER_LDPC, 1656 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS, 1657 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS, 1658 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX, 1659 .vht = WMI_10X_PEER_VHT, 1660 .bw80 = WMI_10X_PEER_80MHZ, 1661 .bw160 = WMI_10X_PEER_160MHZ, 1662 }; 1663 1664 static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = { 1665 .auth = WMI_10_2_PEER_AUTH, 1666 .qos = WMI_10_2_PEER_QOS, 1667 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY, 1668 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY, 1669 .apsd = WMI_10_2_PEER_APSD, 1670 .ht = WMI_10_2_PEER_HT, 1671 .bw40 = WMI_10_2_PEER_40MHZ, 1672 .stbc = WMI_10_2_PEER_STBC, 1673 .ldbc = WMI_10_2_PEER_LDPC, 1674 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS, 1675 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS, 1676 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX, 1677 .vht = WMI_10_2_PEER_VHT, 1678 .bw80 = WMI_10_2_PEER_80MHZ, 1679 .vht_2g = WMI_10_2_PEER_VHT_2G, 1680 .pmf = WMI_10_2_PEER_PMF, 1681 .bw160 = WMI_10_2_PEER_160MHZ, 1682 }; 1683 1684 void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, 1685 const struct wmi_channel_arg *arg) 1686 { 1687 u32 flags = 0; 1688 1689 memset(ch, 0, sizeof(*ch)); 1690 1691 if (arg->passive) 1692 flags |= WMI_CHAN_FLAG_PASSIVE; 1693 if (arg->allow_ibss) 1694 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED; 1695 if (arg->allow_ht) 1696 flags |= WMI_CHAN_FLAG_ALLOW_HT; 1697 if (arg->allow_vht) 1698 flags |= WMI_CHAN_FLAG_ALLOW_VHT; 1699 if (arg->ht40plus) 1700 flags |= WMI_CHAN_FLAG_HT40_PLUS; 1701 if (arg->chan_radar) 1702 flags |= WMI_CHAN_FLAG_DFS; 1703 1704 ch->mhz = __cpu_to_le32(arg->freq); 1705 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1); 1706 if (arg->mode == MODE_11AC_VHT80_80) 1707 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2); 1708 else 1709 ch->band_center_freq2 = 0; 1710 ch->min_power = arg->min_power; 1711 ch->max_power = arg->max_power; 1712 ch->reg_power = arg->max_reg_power; 1713 ch->antenna_max = arg->max_antenna_gain; 1714 ch->max_tx_power = arg->max_power; 1715 1716 /* mode & flags share storage */ 1717 ch->mode = arg->mode; 1718 ch->flags |= __cpu_to_le32(flags); 1719 } 1720 1721 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar) 1722 { 1723 unsigned long time_left; 1724 1725 time_left = wait_for_completion_timeout(&ar->wmi.service_ready, 1726 WMI_SERVICE_READY_TIMEOUT_HZ); 1727 if (!time_left) 1728 return -ETIMEDOUT; 1729 return 0; 1730 } 1731 1732 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar) 1733 { 1734 unsigned long time_left; 1735 1736 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready, 1737 WMI_UNIFIED_READY_TIMEOUT_HZ); 1738 if (!time_left) 1739 return -ETIMEDOUT; 1740 return 0; 1741 } 1742 1743 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len) 1744 { 1745 struct sk_buff *skb; 1746 u32 round_len = roundup(len, 4); 1747 1748 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len); 1749 if (!skb) 1750 return NULL; 1751 1752 skb_reserve(skb, WMI_SKB_HEADROOM); 1753 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 1754 ath10k_warn(ar, "Unaligned WMI skb\n"); 1755 1756 skb_put(skb, round_len); 1757 memset(skb->data, 0, round_len); 1758 1759 return skb; 1760 } 1761 1762 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) 1763 { 1764 dev_kfree_skb(skb); 1765 } 1766 1767 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, 1768 u32 cmd_id) 1769 { 1770 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); 1771 struct wmi_cmd_hdr *cmd_hdr; 1772 int ret; 1773 u32 cmd = 0; 1774 1775 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 1776 return -ENOMEM; 1777 1778 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID); 1779 1780 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 1781 cmd_hdr->cmd_id = __cpu_to_le32(cmd); 1782 1783 memset(skb_cb, 0, sizeof(*skb_cb)); 1784 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len); 1785 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb); 1786 1787 if (ret) 1788 goto err_pull; 1789 1790 return 0; 1791 1792 err_pull: 1793 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 1794 return ret; 1795 } 1796 1797 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) 1798 { 1799 struct ath10k *ar = arvif->ar; 1800 struct ath10k_skb_cb *cb; 1801 struct sk_buff *bcn; 1802 bool dtim_zero; 1803 bool deliver_cab; 1804 int ret; 1805 1806 spin_lock_bh(&ar->data_lock); 1807 1808 bcn = arvif->beacon; 1809 1810 if (!bcn) 1811 goto unlock; 1812 1813 cb = ATH10K_SKB_CB(bcn); 1814 1815 switch (arvif->beacon_state) { 1816 case ATH10K_BEACON_SENDING: 1817 case ATH10K_BEACON_SENT: 1818 break; 1819 case ATH10K_BEACON_SCHEDULED: 1820 arvif->beacon_state = ATH10K_BEACON_SENDING; 1821 spin_unlock_bh(&ar->data_lock); 1822 1823 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO); 1824 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB); 1825 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar, 1826 arvif->vdev_id, 1827 bcn->data, bcn->len, 1828 cb->paddr, 1829 dtim_zero, 1830 deliver_cab); 1831 1832 spin_lock_bh(&ar->data_lock); 1833 1834 if (ret == 0) 1835 arvif->beacon_state = ATH10K_BEACON_SENT; 1836 else 1837 arvif->beacon_state = ATH10K_BEACON_SCHEDULED; 1838 } 1839 1840 unlock: 1841 spin_unlock_bh(&ar->data_lock); 1842 } 1843 1844 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, 1845 struct ieee80211_vif *vif) 1846 { 1847 struct ath10k_vif *arvif = (void *)vif->drv_priv; 1848 1849 ath10k_wmi_tx_beacon_nowait(arvif); 1850 } 1851 1852 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) 1853 { 1854 ieee80211_iterate_active_interfaces_atomic(ar->hw, 1855 IEEE80211_IFACE_ITER_NORMAL, 1856 ath10k_wmi_tx_beacons_iter, 1857 NULL); 1858 } 1859 1860 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) 1861 { 1862 /* try to send pending beacons first. they take priority */ 1863 ath10k_wmi_tx_beacons_nowait(ar); 1864 1865 wake_up(&ar->wmi.tx_credits_wq); 1866 } 1867 1868 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id) 1869 { 1870 int ret = -EOPNOTSUPP; 1871 1872 might_sleep(); 1873 1874 if (cmd_id == WMI_CMD_UNSUPPORTED) { 1875 ath10k_warn(ar, "wmi command %d is not supported by firmware\n", 1876 cmd_id); 1877 return ret; 1878 } 1879 1880 wait_event_timeout(ar->wmi.tx_credits_wq, ({ 1881 /* try to send pending beacons first. they take priority */ 1882 ath10k_wmi_tx_beacons_nowait(ar); 1883 1884 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id); 1885 1886 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags)) 1887 ret = -ESHUTDOWN; 1888 1889 (ret != -EAGAIN); 1890 }), 3 * HZ); 1891 1892 if (ret) 1893 dev_kfree_skb_any(skb); 1894 1895 if (ret == -EAGAIN) { 1896 ath10k_warn(ar, "wmi command %d timeout, restarting hardware\n", 1897 cmd_id); 1898 queue_work(ar->workqueue, &ar->restart_work); 1899 } 1900 1901 return ret; 1902 } 1903 1904 static struct sk_buff * 1905 ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu) 1906 { 1907 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu); 1908 struct ath10k_vif *arvif; 1909 struct wmi_mgmt_tx_cmd *cmd; 1910 struct ieee80211_hdr *hdr; 1911 struct sk_buff *skb; 1912 int len; 1913 u32 vdev_id; 1914 u32 buf_len = msdu->len; 1915 u16 fc; 1916 1917 hdr = (struct ieee80211_hdr *)msdu->data; 1918 fc = le16_to_cpu(hdr->frame_control); 1919 1920 if (cb->vif) { 1921 arvif = (void *)cb->vif->drv_priv; 1922 vdev_id = arvif->vdev_id; 1923 } else { 1924 vdev_id = 0; 1925 } 1926 1927 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) 1928 return ERR_PTR(-EINVAL); 1929 1930 len = sizeof(cmd->hdr) + msdu->len; 1931 1932 if ((ieee80211_is_action(hdr->frame_control) || 1933 ieee80211_is_deauth(hdr->frame_control) || 1934 ieee80211_is_disassoc(hdr->frame_control)) && 1935 ieee80211_has_protected(hdr->frame_control)) { 1936 len += IEEE80211_CCMP_MIC_LEN; 1937 buf_len += IEEE80211_CCMP_MIC_LEN; 1938 } 1939 1940 len = round_up(len, 4); 1941 1942 skb = ath10k_wmi_alloc_skb(ar, len); 1943 if (!skb) 1944 return ERR_PTR(-ENOMEM); 1945 1946 cmd = (struct wmi_mgmt_tx_cmd *)skb->data; 1947 1948 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id); 1949 cmd->hdr.tx_rate = 0; 1950 cmd->hdr.tx_power = 0; 1951 cmd->hdr.buf_len = __cpu_to_le32(buf_len); 1952 1953 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); 1954 memcpy(cmd->buf, msdu->data, msdu->len); 1955 1956 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n", 1957 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE, 1958 fc & IEEE80211_FCTL_STYPE); 1959 trace_ath10k_tx_hdr(ar, skb->data, skb->len); 1960 trace_ath10k_tx_payload(ar, skb->data, skb->len); 1961 1962 return skb; 1963 } 1964 1965 static void ath10k_wmi_event_scan_started(struct ath10k *ar) 1966 { 1967 lockdep_assert_held(&ar->data_lock); 1968 1969 switch (ar->scan.state) { 1970 case ATH10K_SCAN_IDLE: 1971 case ATH10K_SCAN_RUNNING: 1972 case ATH10K_SCAN_ABORTING: 1973 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n", 1974 ath10k_scan_state_str(ar->scan.state), 1975 ar->scan.state); 1976 break; 1977 case ATH10K_SCAN_STARTING: 1978 ar->scan.state = ATH10K_SCAN_RUNNING; 1979 1980 if (ar->scan.is_roc) 1981 ieee80211_ready_on_channel(ar->hw); 1982 1983 complete(&ar->scan.started); 1984 break; 1985 } 1986 } 1987 1988 static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar) 1989 { 1990 lockdep_assert_held(&ar->data_lock); 1991 1992 switch (ar->scan.state) { 1993 case ATH10K_SCAN_IDLE: 1994 case ATH10K_SCAN_RUNNING: 1995 case ATH10K_SCAN_ABORTING: 1996 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n", 1997 ath10k_scan_state_str(ar->scan.state), 1998 ar->scan.state); 1999 break; 2000 case ATH10K_SCAN_STARTING: 2001 complete(&ar->scan.started); 2002 __ath10k_scan_finish(ar); 2003 break; 2004 } 2005 } 2006 2007 static void ath10k_wmi_event_scan_completed(struct ath10k *ar) 2008 { 2009 lockdep_assert_held(&ar->data_lock); 2010 2011 switch (ar->scan.state) { 2012 case ATH10K_SCAN_IDLE: 2013 case ATH10K_SCAN_STARTING: 2014 /* One suspected reason scan can be completed while starting is 2015 * if firmware fails to deliver all scan events to the host, 2016 * e.g. when transport pipe is full. This has been observed 2017 * with spectral scan phyerr events starving wmi transport 2018 * pipe. In such case the "scan completed" event should be (and 2019 * is) ignored by the host as it may be just firmware's scan 2020 * state machine recovering. 2021 */ 2022 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n", 2023 ath10k_scan_state_str(ar->scan.state), 2024 ar->scan.state); 2025 break; 2026 case ATH10K_SCAN_RUNNING: 2027 case ATH10K_SCAN_ABORTING: 2028 __ath10k_scan_finish(ar); 2029 break; 2030 } 2031 } 2032 2033 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar) 2034 { 2035 lockdep_assert_held(&ar->data_lock); 2036 2037 switch (ar->scan.state) { 2038 case ATH10K_SCAN_IDLE: 2039 case ATH10K_SCAN_STARTING: 2040 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n", 2041 ath10k_scan_state_str(ar->scan.state), 2042 ar->scan.state); 2043 break; 2044 case ATH10K_SCAN_RUNNING: 2045 case ATH10K_SCAN_ABORTING: 2046 ar->scan_channel = NULL; 2047 break; 2048 } 2049 } 2050 2051 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq) 2052 { 2053 lockdep_assert_held(&ar->data_lock); 2054 2055 switch (ar->scan.state) { 2056 case ATH10K_SCAN_IDLE: 2057 case ATH10K_SCAN_STARTING: 2058 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 2059 ath10k_scan_state_str(ar->scan.state), 2060 ar->scan.state); 2061 break; 2062 case ATH10K_SCAN_RUNNING: 2063 case ATH10K_SCAN_ABORTING: 2064 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); 2065 2066 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 2067 complete(&ar->scan.on_channel); 2068 break; 2069 } 2070 } 2071 2072 static const char * 2073 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 2074 enum wmi_scan_completion_reason reason) 2075 { 2076 switch (type) { 2077 case WMI_SCAN_EVENT_STARTED: 2078 return "started"; 2079 case WMI_SCAN_EVENT_COMPLETED: 2080 switch (reason) { 2081 case WMI_SCAN_REASON_COMPLETED: 2082 return "completed"; 2083 case WMI_SCAN_REASON_CANCELLED: 2084 return "completed [cancelled]"; 2085 case WMI_SCAN_REASON_PREEMPTED: 2086 return "completed [preempted]"; 2087 case WMI_SCAN_REASON_TIMEDOUT: 2088 return "completed [timedout]"; 2089 case WMI_SCAN_REASON_INTERNAL_FAILURE: 2090 return "completed [internal err]"; 2091 case WMI_SCAN_REASON_MAX: 2092 break; 2093 } 2094 return "completed [unknown]"; 2095 case WMI_SCAN_EVENT_BSS_CHANNEL: 2096 return "bss channel"; 2097 case WMI_SCAN_EVENT_FOREIGN_CHANNEL: 2098 return "foreign channel"; 2099 case WMI_SCAN_EVENT_DEQUEUED: 2100 return "dequeued"; 2101 case WMI_SCAN_EVENT_PREEMPTED: 2102 return "preempted"; 2103 case WMI_SCAN_EVENT_START_FAILED: 2104 return "start failed"; 2105 case WMI_SCAN_EVENT_RESTARTED: 2106 return "restarted"; 2107 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: 2108 return "foreign channel exit"; 2109 default: 2110 return "unknown"; 2111 } 2112 } 2113 2114 static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb, 2115 struct wmi_scan_ev_arg *arg) 2116 { 2117 struct wmi_scan_event *ev = (void *)skb->data; 2118 2119 if (skb->len < sizeof(*ev)) 2120 return -EPROTO; 2121 2122 skb_pull(skb, sizeof(*ev)); 2123 arg->event_type = ev->event_type; 2124 arg->reason = ev->reason; 2125 arg->channel_freq = ev->channel_freq; 2126 arg->scan_req_id = ev->scan_req_id; 2127 arg->scan_id = ev->scan_id; 2128 arg->vdev_id = ev->vdev_id; 2129 2130 return 0; 2131 } 2132 2133 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) 2134 { 2135 struct wmi_scan_ev_arg arg = {}; 2136 enum wmi_scan_event_type event_type; 2137 enum wmi_scan_completion_reason reason; 2138 u32 freq; 2139 u32 req_id; 2140 u32 scan_id; 2141 u32 vdev_id; 2142 int ret; 2143 2144 ret = ath10k_wmi_pull_scan(ar, skb, &arg); 2145 if (ret) { 2146 ath10k_warn(ar, "failed to parse scan event: %d\n", ret); 2147 return ret; 2148 } 2149 2150 event_type = __le32_to_cpu(arg.event_type); 2151 reason = __le32_to_cpu(arg.reason); 2152 freq = __le32_to_cpu(arg.channel_freq); 2153 req_id = __le32_to_cpu(arg.scan_req_id); 2154 scan_id = __le32_to_cpu(arg.scan_id); 2155 vdev_id = __le32_to_cpu(arg.vdev_id); 2156 2157 spin_lock_bh(&ar->data_lock); 2158 2159 ath10k_dbg(ar, ATH10K_DBG_WMI, 2160 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 2161 ath10k_wmi_event_scan_type_str(event_type, reason), 2162 event_type, reason, freq, req_id, scan_id, vdev_id, 2163 ath10k_scan_state_str(ar->scan.state), ar->scan.state); 2164 2165 switch (event_type) { 2166 case WMI_SCAN_EVENT_STARTED: 2167 ath10k_wmi_event_scan_started(ar); 2168 break; 2169 case WMI_SCAN_EVENT_COMPLETED: 2170 ath10k_wmi_event_scan_completed(ar); 2171 break; 2172 case WMI_SCAN_EVENT_BSS_CHANNEL: 2173 ath10k_wmi_event_scan_bss_chan(ar); 2174 break; 2175 case WMI_SCAN_EVENT_FOREIGN_CHANNEL: 2176 ath10k_wmi_event_scan_foreign_chan(ar, freq); 2177 break; 2178 case WMI_SCAN_EVENT_START_FAILED: 2179 ath10k_warn(ar, "received scan start failure event\n"); 2180 ath10k_wmi_event_scan_start_failed(ar); 2181 break; 2182 case WMI_SCAN_EVENT_DEQUEUED: 2183 case WMI_SCAN_EVENT_PREEMPTED: 2184 case WMI_SCAN_EVENT_RESTARTED: 2185 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: 2186 default: 2187 break; 2188 } 2189 2190 spin_unlock_bh(&ar->data_lock); 2191 return 0; 2192 } 2193 2194 /* If keys are configured, HW decrypts all frames 2195 * with protected bit set. Mark such frames as decrypted. 2196 */ 2197 static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar, 2198 struct sk_buff *skb, 2199 struct ieee80211_rx_status *status) 2200 { 2201 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 2202 unsigned int hdrlen; 2203 bool peer_key; 2204 u8 *addr, keyidx; 2205 2206 if (!ieee80211_is_auth(hdr->frame_control) || 2207 !ieee80211_has_protected(hdr->frame_control)) 2208 return; 2209 2210 hdrlen = ieee80211_hdrlen(hdr->frame_control); 2211 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN)) 2212 return; 2213 2214 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT; 2215 addr = ieee80211_get_SA(hdr); 2216 2217 spin_lock_bh(&ar->data_lock); 2218 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx); 2219 spin_unlock_bh(&ar->data_lock); 2220 2221 if (peer_key) { 2222 ath10k_dbg(ar, ATH10K_DBG_MAC, 2223 "mac wep key present for peer %pM\n", addr); 2224 status->flag |= RX_FLAG_DECRYPTED; 2225 } 2226 } 2227 2228 static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb, 2229 struct wmi_mgmt_rx_ev_arg *arg) 2230 { 2231 struct wmi_mgmt_rx_event_v1 *ev_v1; 2232 struct wmi_mgmt_rx_event_v2 *ev_v2; 2233 struct wmi_mgmt_rx_hdr_v1 *ev_hdr; 2234 struct wmi_mgmt_rx_ext_info *ext_info; 2235 size_t pull_len; 2236 u32 msdu_len; 2237 u32 len; 2238 2239 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, 2240 ar->running_fw->fw_file.fw_features)) { 2241 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; 2242 ev_hdr = &ev_v2->hdr.v1; 2243 pull_len = sizeof(*ev_v2); 2244 } else { 2245 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; 2246 ev_hdr = &ev_v1->hdr; 2247 pull_len = sizeof(*ev_v1); 2248 } 2249 2250 if (skb->len < pull_len) 2251 return -EPROTO; 2252 2253 skb_pull(skb, pull_len); 2254 arg->channel = ev_hdr->channel; 2255 arg->buf_len = ev_hdr->buf_len; 2256 arg->status = ev_hdr->status; 2257 arg->snr = ev_hdr->snr; 2258 arg->phy_mode = ev_hdr->phy_mode; 2259 arg->rate = ev_hdr->rate; 2260 2261 msdu_len = __le32_to_cpu(arg->buf_len); 2262 if (skb->len < msdu_len) 2263 return -EPROTO; 2264 2265 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) { 2266 len = ALIGN(le32_to_cpu(arg->buf_len), 4); 2267 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len); 2268 memcpy(&arg->ext_info, ext_info, 2269 sizeof(struct wmi_mgmt_rx_ext_info)); 2270 } 2271 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC 2272 * trailer with credit update. Trim the excess garbage. 2273 */ 2274 skb_trim(skb, msdu_len); 2275 2276 return 0; 2277 } 2278 2279 static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar, 2280 struct sk_buff *skb, 2281 struct wmi_mgmt_rx_ev_arg *arg) 2282 { 2283 struct wmi_10_4_mgmt_rx_event *ev; 2284 struct wmi_10_4_mgmt_rx_hdr *ev_hdr; 2285 size_t pull_len; 2286 u32 msdu_len; 2287 struct wmi_mgmt_rx_ext_info *ext_info; 2288 u32 len; 2289 2290 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data; 2291 ev_hdr = &ev->hdr; 2292 pull_len = sizeof(*ev); 2293 2294 if (skb->len < pull_len) 2295 return -EPROTO; 2296 2297 skb_pull(skb, pull_len); 2298 arg->channel = ev_hdr->channel; 2299 arg->buf_len = ev_hdr->buf_len; 2300 arg->status = ev_hdr->status; 2301 arg->snr = ev_hdr->snr; 2302 arg->phy_mode = ev_hdr->phy_mode; 2303 arg->rate = ev_hdr->rate; 2304 2305 msdu_len = __le32_to_cpu(arg->buf_len); 2306 if (skb->len < msdu_len) 2307 return -EPROTO; 2308 2309 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) { 2310 len = ALIGN(le32_to_cpu(arg->buf_len), 4); 2311 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len); 2312 memcpy(&arg->ext_info, ext_info, 2313 sizeof(struct wmi_mgmt_rx_ext_info)); 2314 } 2315 2316 /* Make sure bytes added for padding are removed. */ 2317 skb_trim(skb, msdu_len); 2318 2319 return 0; 2320 } 2321 2322 static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar, 2323 struct ieee80211_hdr *hdr) 2324 { 2325 if (!ieee80211_has_protected(hdr->frame_control)) 2326 return false; 2327 2328 /* FW delivers WEP Shared Auth frame with Protected Bit set and 2329 * encrypted payload. However in case of PMF it delivers decrypted 2330 * frames with Protected Bit set. 2331 */ 2332 if (ieee80211_is_auth(hdr->frame_control)) 2333 return false; 2334 2335 /* qca99x0 based FW delivers broadcast or multicast management frames 2336 * (ex: group privacy action frames in mesh) as encrypted payload. 2337 */ 2338 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) && 2339 ar->hw_params.sw_decrypt_mcast_mgmt) 2340 return false; 2341 2342 return true; 2343 } 2344 2345 static int 2346 wmi_process_mgmt_tx_comp(struct ath10k *ar, struct mgmt_tx_compl_params *param) 2347 { 2348 struct ath10k_mgmt_tx_pkt_addr *pkt_addr; 2349 struct ath10k_wmi *wmi = &ar->wmi; 2350 struct ieee80211_tx_info *info; 2351 struct sk_buff *msdu; 2352 int ret; 2353 2354 spin_lock_bh(&ar->data_lock); 2355 2356 pkt_addr = idr_find(&wmi->mgmt_pending_tx, param->desc_id); 2357 if (!pkt_addr) { 2358 ath10k_warn(ar, "received mgmt tx completion for invalid msdu_id: %d\n", 2359 param->desc_id); 2360 ret = -ENOENT; 2361 goto out; 2362 } 2363 2364 msdu = pkt_addr->vaddr; 2365 dma_unmap_single(ar->dev, pkt_addr->paddr, 2366 msdu->len, DMA_TO_DEVICE); 2367 info = IEEE80211_SKB_CB(msdu); 2368 2369 if (param->status) { 2370 info->flags &= ~IEEE80211_TX_STAT_ACK; 2371 } else { 2372 info->flags |= IEEE80211_TX_STAT_ACK; 2373 info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR + 2374 param->ack_rssi; 2375 info->status.is_valid_ack_signal = true; 2376 } 2377 2378 ieee80211_tx_status_irqsafe(ar->hw, msdu); 2379 2380 ret = 0; 2381 2382 out: 2383 idr_remove(&wmi->mgmt_pending_tx, param->desc_id); 2384 spin_unlock_bh(&ar->data_lock); 2385 return ret; 2386 } 2387 2388 int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb) 2389 { 2390 struct wmi_tlv_mgmt_tx_compl_ev_arg arg; 2391 struct mgmt_tx_compl_params param; 2392 int ret; 2393 2394 ret = ath10k_wmi_pull_mgmt_tx_compl(ar, skb, &arg); 2395 if (ret) { 2396 ath10k_warn(ar, "failed to parse mgmt comp event: %d\n", ret); 2397 return ret; 2398 } 2399 2400 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params)); 2401 param.desc_id = __le32_to_cpu(arg.desc_id); 2402 param.status = __le32_to_cpu(arg.status); 2403 2404 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map)) 2405 param.ack_rssi = __le32_to_cpu(arg.ack_rssi); 2406 2407 wmi_process_mgmt_tx_comp(ar, ¶m); 2408 2409 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv evnt mgmt tx completion\n"); 2410 2411 return 0; 2412 } 2413 2414 int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb) 2415 { 2416 struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg arg; 2417 struct mgmt_tx_compl_params param; 2418 u32 num_reports; 2419 int i, ret; 2420 2421 ret = ath10k_wmi_pull_mgmt_tx_bundle_compl(ar, skb, &arg); 2422 if (ret) { 2423 ath10k_warn(ar, "failed to parse bundle mgmt compl event: %d\n", ret); 2424 return ret; 2425 } 2426 2427 num_reports = __le32_to_cpu(arg.num_reports); 2428 2429 for (i = 0; i < num_reports; i++) { 2430 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params)); 2431 param.desc_id = __le32_to_cpu(arg.desc_ids[i]); 2432 param.status = __le32_to_cpu(arg.desc_ids[i]); 2433 2434 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map)) 2435 param.ack_rssi = __le32_to_cpu(arg.ack_rssi[i]); 2436 wmi_process_mgmt_tx_comp(ar, ¶m); 2437 } 2438 2439 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv event bundle mgmt tx completion\n"); 2440 2441 return 0; 2442 } 2443 2444 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) 2445 { 2446 struct wmi_mgmt_rx_ev_arg arg = {}; 2447 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 2448 struct ieee80211_hdr *hdr; 2449 struct ieee80211_supported_band *sband; 2450 u32 rx_status; 2451 u32 channel; 2452 u32 phy_mode; 2453 u32 snr; 2454 u32 rate; 2455 u16 fc; 2456 int ret; 2457 2458 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg); 2459 if (ret) { 2460 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret); 2461 dev_kfree_skb(skb); 2462 return ret; 2463 } 2464 2465 channel = __le32_to_cpu(arg.channel); 2466 rx_status = __le32_to_cpu(arg.status); 2467 snr = __le32_to_cpu(arg.snr); 2468 phy_mode = __le32_to_cpu(arg.phy_mode); 2469 rate = __le32_to_cpu(arg.rate); 2470 2471 memset(status, 0, sizeof(*status)); 2472 2473 ath10k_dbg(ar, ATH10K_DBG_MGMT, 2474 "event mgmt rx status %08x\n", rx_status); 2475 2476 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) || 2477 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT | 2478 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) { 2479 dev_kfree_skb(skb); 2480 return 0; 2481 } 2482 2483 if (rx_status & WMI_RX_STATUS_ERR_MIC) 2484 status->flag |= RX_FLAG_MMIC_ERROR; 2485 2486 if (rx_status & WMI_RX_STATUS_EXT_INFO) { 2487 status->mactime = 2488 __le64_to_cpu(arg.ext_info.rx_mac_timestamp); 2489 status->flag |= RX_FLAG_MACTIME_END; 2490 } 2491 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to 2492 * MODE_11B. This means phy_mode is not a reliable source for the band 2493 * of mgmt rx. 2494 */ 2495 if (channel >= 1 && channel <= 14) { 2496 status->band = NL80211_BAND_2GHZ; 2497 } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) { 2498 status->band = NL80211_BAND_5GHZ; 2499 } else { 2500 /* Shouldn't happen unless list of advertised channels to 2501 * mac80211 has been changed. 2502 */ 2503 WARN_ON_ONCE(1); 2504 dev_kfree_skb(skb); 2505 return 0; 2506 } 2507 2508 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ) 2509 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n"); 2510 2511 sband = &ar->mac.sbands[status->band]; 2512 2513 status->freq = ieee80211_channel_to_frequency(channel, status->band); 2514 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; 2515 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100); 2516 2517 hdr = (struct ieee80211_hdr *)skb->data; 2518 fc = le16_to_cpu(hdr->frame_control); 2519 2520 /* Firmware is guaranteed to report all essential management frames via 2521 * WMI while it can deliver some extra via HTT. Since there can be 2522 * duplicates split the reporting wrt monitor/sniffing. 2523 */ 2524 status->flag |= RX_FLAG_SKIP_MONITOR; 2525 2526 ath10k_wmi_handle_wep_reauth(ar, skb, status); 2527 2528 if (ath10k_wmi_rx_is_decrypted(ar, hdr)) { 2529 status->flag |= RX_FLAG_DECRYPTED; 2530 2531 if (!ieee80211_is_action(hdr->frame_control) && 2532 !ieee80211_is_deauth(hdr->frame_control) && 2533 !ieee80211_is_disassoc(hdr->frame_control)) { 2534 status->flag |= RX_FLAG_IV_STRIPPED | 2535 RX_FLAG_MMIC_STRIPPED; 2536 hdr->frame_control = __cpu_to_le16(fc & 2537 ~IEEE80211_FCTL_PROTECTED); 2538 } 2539 } 2540 2541 if (ieee80211_is_beacon(hdr->frame_control)) 2542 ath10k_mac_handle_beacon(ar, skb); 2543 2544 ath10k_dbg(ar, ATH10K_DBG_MGMT, 2545 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n", 2546 skb, skb->len, 2547 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 2548 2549 ath10k_dbg(ar, ATH10K_DBG_MGMT, 2550 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 2551 status->freq, status->band, status->signal, 2552 status->rate_idx); 2553 2554 ieee80211_rx_ni(ar->hw, skb); 2555 2556 return 0; 2557 } 2558 2559 static int freq_to_idx(struct ath10k *ar, int freq) 2560 { 2561 struct ieee80211_supported_band *sband; 2562 int band, ch, idx = 0; 2563 2564 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 2565 sband = ar->hw->wiphy->bands[band]; 2566 if (!sband) 2567 continue; 2568 2569 for (ch = 0; ch < sband->n_channels; ch++, idx++) 2570 if (sband->channels[ch].center_freq == freq) 2571 goto exit; 2572 } 2573 2574 exit: 2575 return idx; 2576 } 2577 2578 static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb, 2579 struct wmi_ch_info_ev_arg *arg) 2580 { 2581 struct wmi_chan_info_event *ev = (void *)skb->data; 2582 2583 if (skb->len < sizeof(*ev)) 2584 return -EPROTO; 2585 2586 skb_pull(skb, sizeof(*ev)); 2587 arg->err_code = ev->err_code; 2588 arg->freq = ev->freq; 2589 arg->cmd_flags = ev->cmd_flags; 2590 arg->noise_floor = ev->noise_floor; 2591 arg->rx_clear_count = ev->rx_clear_count; 2592 arg->cycle_count = ev->cycle_count; 2593 2594 return 0; 2595 } 2596 2597 static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar, 2598 struct sk_buff *skb, 2599 struct wmi_ch_info_ev_arg *arg) 2600 { 2601 struct wmi_10_4_chan_info_event *ev = (void *)skb->data; 2602 2603 if (skb->len < sizeof(*ev)) 2604 return -EPROTO; 2605 2606 skb_pull(skb, sizeof(*ev)); 2607 arg->err_code = ev->err_code; 2608 arg->freq = ev->freq; 2609 arg->cmd_flags = ev->cmd_flags; 2610 arg->noise_floor = ev->noise_floor; 2611 arg->rx_clear_count = ev->rx_clear_count; 2612 arg->cycle_count = ev->cycle_count; 2613 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range; 2614 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 2615 arg->rx_frame_count = ev->rx_frame_count; 2616 2617 return 0; 2618 } 2619 2620 /* 2621 * Handle the channel info event for firmware which only sends one 2622 * chan_info event per scanned channel. 2623 */ 2624 static void ath10k_wmi_event_chan_info_unpaired(struct ath10k *ar, 2625 struct chan_info_params *params) 2626 { 2627 struct survey_info *survey; 2628 int idx; 2629 2630 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { 2631 ath10k_dbg(ar, ATH10K_DBG_WMI, "chan info report completed\n"); 2632 return; 2633 } 2634 2635 idx = freq_to_idx(ar, params->freq); 2636 if (idx >= ARRAY_SIZE(ar->survey)) { 2637 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n", 2638 params->freq, idx); 2639 return; 2640 } 2641 2642 survey = &ar->survey[idx]; 2643 2644 if (!params->mac_clk_mhz) 2645 return; 2646 2647 memset(survey, 0, sizeof(*survey)); 2648 2649 survey->noise = params->noise_floor; 2650 survey->time = (params->cycle_count / params->mac_clk_mhz) / 1000; 2651 survey->time_busy = (params->rx_clear_count / params->mac_clk_mhz) / 1000; 2652 survey->filled |= SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 2653 SURVEY_INFO_TIME_BUSY; 2654 } 2655 2656 /* 2657 * Handle the channel info event for firmware which sends chan_info 2658 * event in pairs(start and stop events) for every scanned channel. 2659 */ 2660 static void ath10k_wmi_event_chan_info_paired(struct ath10k *ar, 2661 struct chan_info_params *params) 2662 { 2663 struct survey_info *survey; 2664 int idx; 2665 2666 idx = freq_to_idx(ar, params->freq); 2667 if (idx >= ARRAY_SIZE(ar->survey)) { 2668 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n", 2669 params->freq, idx); 2670 return; 2671 } 2672 2673 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { 2674 if (ar->ch_info_can_report_survey) { 2675 survey = &ar->survey[idx]; 2676 survey->noise = params->noise_floor; 2677 survey->filled = SURVEY_INFO_NOISE_DBM; 2678 2679 ath10k_hw_fill_survey_time(ar, 2680 survey, 2681 params->cycle_count, 2682 params->rx_clear_count, 2683 ar->survey_last_cycle_count, 2684 ar->survey_last_rx_clear_count); 2685 } 2686 2687 ar->ch_info_can_report_survey = false; 2688 } else { 2689 ar->ch_info_can_report_survey = true; 2690 } 2691 2692 if (!(params->cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) { 2693 ar->survey_last_rx_clear_count = params->rx_clear_count; 2694 ar->survey_last_cycle_count = params->cycle_count; 2695 } 2696 } 2697 2698 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) 2699 { 2700 struct chan_info_params ch_info_param; 2701 struct wmi_ch_info_ev_arg arg = {}; 2702 int ret; 2703 2704 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg); 2705 if (ret) { 2706 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret); 2707 return; 2708 } 2709 2710 ch_info_param.err_code = __le32_to_cpu(arg.err_code); 2711 ch_info_param.freq = __le32_to_cpu(arg.freq); 2712 ch_info_param.cmd_flags = __le32_to_cpu(arg.cmd_flags); 2713 ch_info_param.noise_floor = __le32_to_cpu(arg.noise_floor); 2714 ch_info_param.rx_clear_count = __le32_to_cpu(arg.rx_clear_count); 2715 ch_info_param.cycle_count = __le32_to_cpu(arg.cycle_count); 2716 ch_info_param.mac_clk_mhz = __le32_to_cpu(arg.mac_clk_mhz); 2717 2718 ath10k_dbg(ar, ATH10K_DBG_WMI, 2719 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", 2720 ch_info_param.err_code, ch_info_param.freq, ch_info_param.cmd_flags, 2721 ch_info_param.noise_floor, ch_info_param.rx_clear_count, 2722 ch_info_param.cycle_count); 2723 2724 spin_lock_bh(&ar->data_lock); 2725 2726 switch (ar->scan.state) { 2727 case ATH10K_SCAN_IDLE: 2728 case ATH10K_SCAN_STARTING: 2729 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n"); 2730 goto exit; 2731 case ATH10K_SCAN_RUNNING: 2732 case ATH10K_SCAN_ABORTING: 2733 break; 2734 } 2735 2736 if (test_bit(ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL, 2737 ar->running_fw->fw_file.fw_features)) 2738 ath10k_wmi_event_chan_info_unpaired(ar, &ch_info_param); 2739 else 2740 ath10k_wmi_event_chan_info_paired(ar, &ch_info_param); 2741 2742 exit: 2743 spin_unlock_bh(&ar->data_lock); 2744 } 2745 2746 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) 2747 { 2748 struct wmi_echo_ev_arg arg = {}; 2749 int ret; 2750 2751 ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg); 2752 if (ret) { 2753 ath10k_warn(ar, "failed to parse echo: %d\n", ret); 2754 return; 2755 } 2756 2757 ath10k_dbg(ar, ATH10K_DBG_WMI, 2758 "wmi event echo value 0x%08x\n", 2759 le32_to_cpu(arg.value)); 2760 2761 if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID) 2762 complete(&ar->wmi.barrier); 2763 } 2764 2765 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) 2766 { 2767 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", 2768 skb->len); 2769 2770 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len); 2771 2772 return 0; 2773 } 2774 2775 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, 2776 struct ath10k_fw_stats_pdev *dst) 2777 { 2778 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf); 2779 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); 2780 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); 2781 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); 2782 dst->cycle_count = __le32_to_cpu(src->cycle_count); 2783 dst->phy_err_count = __le32_to_cpu(src->phy_err_count); 2784 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); 2785 } 2786 2787 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, 2788 struct ath10k_fw_stats_pdev *dst) 2789 { 2790 dst->comp_queued = __le32_to_cpu(src->comp_queued); 2791 dst->comp_delivered = __le32_to_cpu(src->comp_delivered); 2792 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); 2793 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); 2794 dst->wmm_drop = __le32_to_cpu(src->wmm_drop); 2795 dst->local_enqued = __le32_to_cpu(src->local_enqued); 2796 dst->local_freed = __le32_to_cpu(src->local_freed); 2797 dst->hw_queued = __le32_to_cpu(src->hw_queued); 2798 dst->hw_reaped = __le32_to_cpu(src->hw_reaped); 2799 dst->underrun = __le32_to_cpu(src->underrun); 2800 dst->tx_abort = __le32_to_cpu(src->tx_abort); 2801 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); 2802 dst->tx_ko = __le32_to_cpu(src->tx_ko); 2803 dst->data_rc = __le32_to_cpu(src->data_rc); 2804 dst->self_triggers = __le32_to_cpu(src->self_triggers); 2805 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); 2806 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); 2807 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); 2808 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); 2809 dst->pdev_resets = __le32_to_cpu(src->pdev_resets); 2810 dst->phy_underrun = __le32_to_cpu(src->phy_underrun); 2811 dst->txop_ovf = __le32_to_cpu(src->txop_ovf); 2812 } 2813 2814 static void 2815 ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src, 2816 struct ath10k_fw_stats_pdev *dst) 2817 { 2818 dst->comp_queued = __le32_to_cpu(src->comp_queued); 2819 dst->comp_delivered = __le32_to_cpu(src->comp_delivered); 2820 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); 2821 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); 2822 dst->wmm_drop = __le32_to_cpu(src->wmm_drop); 2823 dst->local_enqued = __le32_to_cpu(src->local_enqued); 2824 dst->local_freed = __le32_to_cpu(src->local_freed); 2825 dst->hw_queued = __le32_to_cpu(src->hw_queued); 2826 dst->hw_reaped = __le32_to_cpu(src->hw_reaped); 2827 dst->underrun = __le32_to_cpu(src->underrun); 2828 dst->tx_abort = __le32_to_cpu(src->tx_abort); 2829 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); 2830 dst->tx_ko = __le32_to_cpu(src->tx_ko); 2831 dst->data_rc = __le32_to_cpu(src->data_rc); 2832 dst->self_triggers = __le32_to_cpu(src->self_triggers); 2833 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); 2834 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); 2835 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); 2836 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); 2837 dst->pdev_resets = __le32_to_cpu(src->pdev_resets); 2838 dst->phy_underrun = __le32_to_cpu(src->phy_underrun); 2839 dst->txop_ovf = __le32_to_cpu(src->txop_ovf); 2840 dst->hw_paused = __le32_to_cpu(src->hw_paused); 2841 dst->seq_posted = __le32_to_cpu(src->seq_posted); 2842 dst->seq_failed_queueing = 2843 __le32_to_cpu(src->seq_failed_queueing); 2844 dst->seq_completed = __le32_to_cpu(src->seq_completed); 2845 dst->seq_restarted = __le32_to_cpu(src->seq_restarted); 2846 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted); 2847 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush); 2848 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); 2849 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated); 2850 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed); 2851 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); 2852 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired); 2853 } 2854 2855 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, 2856 struct ath10k_fw_stats_pdev *dst) 2857 { 2858 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change); 2859 dst->status_rcvd = __le32_to_cpu(src->status_rcvd); 2860 dst->r0_frags = __le32_to_cpu(src->r0_frags); 2861 dst->r1_frags = __le32_to_cpu(src->r1_frags); 2862 dst->r2_frags = __le32_to_cpu(src->r2_frags); 2863 dst->r3_frags = __le32_to_cpu(src->r3_frags); 2864 dst->htt_msdus = __le32_to_cpu(src->htt_msdus); 2865 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus); 2866 dst->loc_msdus = __le32_to_cpu(src->loc_msdus); 2867 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus); 2868 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu); 2869 dst->phy_errs = __le32_to_cpu(src->phy_errs); 2870 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop); 2871 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs); 2872 } 2873 2874 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, 2875 struct ath10k_fw_stats_pdev *dst) 2876 { 2877 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad); 2878 dst->rts_bad = __le32_to_cpu(src->rts_bad); 2879 dst->rts_good = __le32_to_cpu(src->rts_good); 2880 dst->fcs_bad = __le32_to_cpu(src->fcs_bad); 2881 dst->no_beacons = __le32_to_cpu(src->no_beacons); 2882 dst->mib_int_count = __le32_to_cpu(src->mib_int_count); 2883 } 2884 2885 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, 2886 struct ath10k_fw_stats_peer *dst) 2887 { 2888 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); 2889 dst->peer_rssi = __le32_to_cpu(src->peer_rssi); 2890 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); 2891 } 2892 2893 static void 2894 ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src, 2895 struct ath10k_fw_stats_peer *dst) 2896 { 2897 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); 2898 dst->peer_rssi = __le32_to_cpu(src->peer_rssi); 2899 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); 2900 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); 2901 } 2902 2903 static void 2904 ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src, 2905 struct ath10k_fw_stats_vdev_extd *dst) 2906 { 2907 dst->vdev_id = __le32_to_cpu(src->vdev_id); 2908 dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt); 2909 dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack); 2910 dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued); 2911 dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt); 2912 dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued); 2913 dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry); 2914 dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry); 2915 dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry); 2916 dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc); 2917 dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry); 2918 dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail); 2919 dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt); 2920 dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt); 2921 dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt); 2922 dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt); 2923 } 2924 2925 static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar, 2926 struct sk_buff *skb, 2927 struct ath10k_fw_stats *stats) 2928 { 2929 const struct wmi_stats_event *ev = (void *)skb->data; 2930 u32 num_pdev_stats, num_peer_stats; 2931 int i; 2932 2933 if (!skb_pull(skb, sizeof(*ev))) 2934 return -EPROTO; 2935 2936 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 2937 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 2938 2939 for (i = 0; i < num_pdev_stats; i++) { 2940 const struct wmi_pdev_stats *src; 2941 struct ath10k_fw_stats_pdev *dst; 2942 2943 src = (void *)skb->data; 2944 if (!skb_pull(skb, sizeof(*src))) 2945 return -EPROTO; 2946 2947 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 2948 if (!dst) 2949 continue; 2950 2951 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 2952 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); 2953 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 2954 2955 list_add_tail(&dst->list, &stats->pdevs); 2956 } 2957 2958 /* fw doesn't implement vdev stats */ 2959 2960 for (i = 0; i < num_peer_stats; i++) { 2961 const struct wmi_peer_stats *src; 2962 struct ath10k_fw_stats_peer *dst; 2963 2964 src = (void *)skb->data; 2965 if (!skb_pull(skb, sizeof(*src))) 2966 return -EPROTO; 2967 2968 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 2969 if (!dst) 2970 continue; 2971 2972 ath10k_wmi_pull_peer_stats(src, dst); 2973 list_add_tail(&dst->list, &stats->peers); 2974 } 2975 2976 return 0; 2977 } 2978 2979 static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar, 2980 struct sk_buff *skb, 2981 struct ath10k_fw_stats *stats) 2982 { 2983 const struct wmi_stats_event *ev = (void *)skb->data; 2984 u32 num_pdev_stats, num_peer_stats; 2985 int i; 2986 2987 if (!skb_pull(skb, sizeof(*ev))) 2988 return -EPROTO; 2989 2990 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 2991 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 2992 2993 for (i = 0; i < num_pdev_stats; i++) { 2994 const struct wmi_10x_pdev_stats *src; 2995 struct ath10k_fw_stats_pdev *dst; 2996 2997 src = (void *)skb->data; 2998 if (!skb_pull(skb, sizeof(*src))) 2999 return -EPROTO; 3000 3001 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3002 if (!dst) 3003 continue; 3004 3005 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 3006 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); 3007 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 3008 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); 3009 3010 list_add_tail(&dst->list, &stats->pdevs); 3011 } 3012 3013 /* fw doesn't implement vdev stats */ 3014 3015 for (i = 0; i < num_peer_stats; i++) { 3016 const struct wmi_10x_peer_stats *src; 3017 struct ath10k_fw_stats_peer *dst; 3018 3019 src = (void *)skb->data; 3020 if (!skb_pull(skb, sizeof(*src))) 3021 return -EPROTO; 3022 3023 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3024 if (!dst) 3025 continue; 3026 3027 ath10k_wmi_pull_peer_stats(&src->old, dst); 3028 3029 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); 3030 3031 list_add_tail(&dst->list, &stats->peers); 3032 } 3033 3034 return 0; 3035 } 3036 3037 static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar, 3038 struct sk_buff *skb, 3039 struct ath10k_fw_stats *stats) 3040 { 3041 const struct wmi_10_2_stats_event *ev = (void *)skb->data; 3042 u32 num_pdev_stats; 3043 u32 num_pdev_ext_stats; 3044 u32 num_peer_stats; 3045 int i; 3046 3047 if (!skb_pull(skb, sizeof(*ev))) 3048 return -EPROTO; 3049 3050 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 3051 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); 3052 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 3053 3054 for (i = 0; i < num_pdev_stats; i++) { 3055 const struct wmi_10_2_pdev_stats *src; 3056 struct ath10k_fw_stats_pdev *dst; 3057 3058 src = (void *)skb->data; 3059 if (!skb_pull(skb, sizeof(*src))) 3060 return -EPROTO; 3061 3062 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3063 if (!dst) 3064 continue; 3065 3066 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 3067 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); 3068 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 3069 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); 3070 /* FIXME: expose 10.2 specific values */ 3071 3072 list_add_tail(&dst->list, &stats->pdevs); 3073 } 3074 3075 for (i = 0; i < num_pdev_ext_stats; i++) { 3076 const struct wmi_10_2_pdev_ext_stats *src; 3077 3078 src = (void *)skb->data; 3079 if (!skb_pull(skb, sizeof(*src))) 3080 return -EPROTO; 3081 3082 /* FIXME: expose values to userspace 3083 * 3084 * Note: Even though this loop seems to do nothing it is 3085 * required to parse following sub-structures properly. 3086 */ 3087 } 3088 3089 /* fw doesn't implement vdev stats */ 3090 3091 for (i = 0; i < num_peer_stats; i++) { 3092 const struct wmi_10_2_peer_stats *src; 3093 struct ath10k_fw_stats_peer *dst; 3094 3095 src = (void *)skb->data; 3096 if (!skb_pull(skb, sizeof(*src))) 3097 return -EPROTO; 3098 3099 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3100 if (!dst) 3101 continue; 3102 3103 ath10k_wmi_pull_peer_stats(&src->old, dst); 3104 3105 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); 3106 /* FIXME: expose 10.2 specific values */ 3107 3108 list_add_tail(&dst->list, &stats->peers); 3109 } 3110 3111 return 0; 3112 } 3113 3114 static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar, 3115 struct sk_buff *skb, 3116 struct ath10k_fw_stats *stats) 3117 { 3118 const struct wmi_10_2_stats_event *ev = (void *)skb->data; 3119 u32 num_pdev_stats; 3120 u32 num_pdev_ext_stats; 3121 u32 num_peer_stats; 3122 int i; 3123 3124 if (!skb_pull(skb, sizeof(*ev))) 3125 return -EPROTO; 3126 3127 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 3128 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); 3129 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 3130 3131 for (i = 0; i < num_pdev_stats; i++) { 3132 const struct wmi_10_2_pdev_stats *src; 3133 struct ath10k_fw_stats_pdev *dst; 3134 3135 src = (void *)skb->data; 3136 if (!skb_pull(skb, sizeof(*src))) 3137 return -EPROTO; 3138 3139 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3140 if (!dst) 3141 continue; 3142 3143 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 3144 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); 3145 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 3146 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); 3147 /* FIXME: expose 10.2 specific values */ 3148 3149 list_add_tail(&dst->list, &stats->pdevs); 3150 } 3151 3152 for (i = 0; i < num_pdev_ext_stats; i++) { 3153 const struct wmi_10_2_pdev_ext_stats *src; 3154 3155 src = (void *)skb->data; 3156 if (!skb_pull(skb, sizeof(*src))) 3157 return -EPROTO; 3158 3159 /* FIXME: expose values to userspace 3160 * 3161 * Note: Even though this loop seems to do nothing it is 3162 * required to parse following sub-structures properly. 3163 */ 3164 } 3165 3166 /* fw doesn't implement vdev stats */ 3167 3168 for (i = 0; i < num_peer_stats; i++) { 3169 const struct wmi_10_2_4_ext_peer_stats *src; 3170 struct ath10k_fw_stats_peer *dst; 3171 int stats_len; 3172 3173 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 3174 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats); 3175 else 3176 stats_len = sizeof(struct wmi_10_2_4_peer_stats); 3177 3178 src = (void *)skb->data; 3179 if (!skb_pull(skb, stats_len)) 3180 return -EPROTO; 3181 3182 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3183 if (!dst) 3184 continue; 3185 3186 ath10k_wmi_pull_peer_stats(&src->common.old, dst); 3187 3188 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate); 3189 3190 if (ath10k_peer_stats_enabled(ar)) 3191 dst->rx_duration = __le32_to_cpu(src->rx_duration); 3192 /* FIXME: expose 10.2 specific values */ 3193 3194 list_add_tail(&dst->list, &stats->peers); 3195 } 3196 3197 return 0; 3198 } 3199 3200 static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar, 3201 struct sk_buff *skb, 3202 struct ath10k_fw_stats *stats) 3203 { 3204 const struct wmi_10_2_stats_event *ev = (void *)skb->data; 3205 u32 num_pdev_stats; 3206 u32 num_pdev_ext_stats; 3207 u32 num_vdev_stats; 3208 u32 num_peer_stats; 3209 u32 num_bcnflt_stats; 3210 u32 stats_id; 3211 int i; 3212 3213 if (!skb_pull(skb, sizeof(*ev))) 3214 return -EPROTO; 3215 3216 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 3217 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); 3218 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); 3219 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 3220 num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats); 3221 stats_id = __le32_to_cpu(ev->stats_id); 3222 3223 for (i = 0; i < num_pdev_stats; i++) { 3224 const struct wmi_10_4_pdev_stats *src; 3225 struct ath10k_fw_stats_pdev *dst; 3226 3227 src = (void *)skb->data; 3228 if (!skb_pull(skb, sizeof(*src))) 3229 return -EPROTO; 3230 3231 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3232 if (!dst) 3233 continue; 3234 3235 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 3236 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst); 3237 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 3238 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs); 3239 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); 3240 3241 list_add_tail(&dst->list, &stats->pdevs); 3242 } 3243 3244 for (i = 0; i < num_pdev_ext_stats; i++) { 3245 const struct wmi_10_2_pdev_ext_stats *src; 3246 3247 src = (void *)skb->data; 3248 if (!skb_pull(skb, sizeof(*src))) 3249 return -EPROTO; 3250 3251 /* FIXME: expose values to userspace 3252 * 3253 * Note: Even though this loop seems to do nothing it is 3254 * required to parse following sub-structures properly. 3255 */ 3256 } 3257 3258 for (i = 0; i < num_vdev_stats; i++) { 3259 const struct wmi_vdev_stats *src; 3260 3261 /* Ignore vdev stats here as it has only vdev id. Actual vdev 3262 * stats will be retrieved from vdev extended stats. 3263 */ 3264 src = (void *)skb->data; 3265 if (!skb_pull(skb, sizeof(*src))) 3266 return -EPROTO; 3267 } 3268 3269 for (i = 0; i < num_peer_stats; i++) { 3270 const struct wmi_10_4_peer_stats *src; 3271 struct ath10k_fw_stats_peer *dst; 3272 3273 src = (void *)skb->data; 3274 if (!skb_pull(skb, sizeof(*src))) 3275 return -EPROTO; 3276 3277 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3278 if (!dst) 3279 continue; 3280 3281 ath10k_wmi_10_4_pull_peer_stats(src, dst); 3282 list_add_tail(&dst->list, &stats->peers); 3283 } 3284 3285 for (i = 0; i < num_bcnflt_stats; i++) { 3286 const struct wmi_10_4_bss_bcn_filter_stats *src; 3287 3288 src = (void *)skb->data; 3289 if (!skb_pull(skb, sizeof(*src))) 3290 return -EPROTO; 3291 3292 /* FIXME: expose values to userspace 3293 * 3294 * Note: Even though this loop seems to do nothing it is 3295 * required to parse following sub-structures properly. 3296 */ 3297 } 3298 3299 if (stats_id & WMI_10_4_STAT_PEER_EXTD) { 3300 stats->extended = true; 3301 3302 for (i = 0; i < num_peer_stats; i++) { 3303 const struct wmi_10_4_peer_extd_stats *src; 3304 struct ath10k_fw_extd_stats_peer *dst; 3305 3306 src = (void *)skb->data; 3307 if (!skb_pull(skb, sizeof(*src))) 3308 return -EPROTO; 3309 3310 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3311 if (!dst) 3312 continue; 3313 3314 ether_addr_copy(dst->peer_macaddr, 3315 src->peer_macaddr.addr); 3316 dst->rx_duration = __le32_to_cpu(src->rx_duration); 3317 list_add_tail(&dst->list, &stats->peers_extd); 3318 } 3319 } 3320 3321 if (stats_id & WMI_10_4_STAT_VDEV_EXTD) { 3322 for (i = 0; i < num_vdev_stats; i++) { 3323 const struct wmi_vdev_stats_extd *src; 3324 struct ath10k_fw_stats_vdev_extd *dst; 3325 3326 src = (void *)skb->data; 3327 if (!skb_pull(skb, sizeof(*src))) 3328 return -EPROTO; 3329 3330 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 3331 if (!dst) 3332 continue; 3333 ath10k_wmi_10_4_pull_vdev_stats(src, dst); 3334 list_add_tail(&dst->list, &stats->vdevs); 3335 } 3336 } 3337 3338 return 0; 3339 } 3340 3341 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb) 3342 { 3343 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); 3344 ath10k_debug_fw_stats_process(ar, skb); 3345 } 3346 3347 static int 3348 ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb, 3349 struct wmi_vdev_start_ev_arg *arg) 3350 { 3351 struct wmi_vdev_start_response_event *ev = (void *)skb->data; 3352 3353 if (skb->len < sizeof(*ev)) 3354 return -EPROTO; 3355 3356 skb_pull(skb, sizeof(*ev)); 3357 arg->vdev_id = ev->vdev_id; 3358 arg->req_id = ev->req_id; 3359 arg->resp_type = ev->resp_type; 3360 arg->status = ev->status; 3361 3362 return 0; 3363 } 3364 3365 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb) 3366 { 3367 struct wmi_vdev_start_ev_arg arg = {}; 3368 int ret; 3369 u32 status; 3370 3371 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); 3372 3373 ar->last_wmi_vdev_start_status = 0; 3374 3375 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg); 3376 if (ret) { 3377 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret); 3378 ar->last_wmi_vdev_start_status = ret; 3379 goto out; 3380 } 3381 3382 status = __le32_to_cpu(arg.status); 3383 if (WARN_ON_ONCE(status)) { 3384 ath10k_warn(ar, "vdev-start-response reports status error: %d (%s)\n", 3385 status, (status == WMI_VDEV_START_CHAN_INVALID) ? 3386 "chan-invalid" : "unknown"); 3387 /* Setup is done one way or another though, so we should still 3388 * do the completion, so don't return here. 3389 */ 3390 ar->last_wmi_vdev_start_status = -EINVAL; 3391 } 3392 3393 out: 3394 complete(&ar->vdev_setup_done); 3395 } 3396 3397 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb) 3398 { 3399 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); 3400 complete(&ar->vdev_setup_done); 3401 } 3402 3403 static int 3404 ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb, 3405 struct wmi_peer_kick_ev_arg *arg) 3406 { 3407 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data; 3408 3409 if (skb->len < sizeof(*ev)) 3410 return -EPROTO; 3411 3412 skb_pull(skb, sizeof(*ev)); 3413 arg->mac_addr = ev->peer_macaddr.addr; 3414 3415 return 0; 3416 } 3417 3418 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb) 3419 { 3420 struct wmi_peer_kick_ev_arg arg = {}; 3421 struct ieee80211_sta *sta; 3422 int ret; 3423 3424 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg); 3425 if (ret) { 3426 ath10k_warn(ar, "failed to parse peer kickout event: %d\n", 3427 ret); 3428 return; 3429 } 3430 3431 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", 3432 arg.mac_addr); 3433 3434 rcu_read_lock(); 3435 3436 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL); 3437 if (!sta) { 3438 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", 3439 arg.mac_addr); 3440 goto exit; 3441 } 3442 3443 ieee80211_report_low_ack(sta, 10); 3444 3445 exit: 3446 rcu_read_unlock(); 3447 } 3448 3449 /* 3450 * FIXME 3451 * 3452 * We don't report to mac80211 sleep state of connected 3453 * stations. Due to this mac80211 can't fill in TIM IE 3454 * correctly. 3455 * 3456 * I know of no way of getting nullfunc frames that contain 3457 * sleep transition from connected stations - these do not 3458 * seem to be sent from the target to the host. There also 3459 * doesn't seem to be a dedicated event for that. So the 3460 * only way left to do this would be to read tim_bitmap 3461 * during SWBA. 3462 * 3463 * We could probably try using tim_bitmap from SWBA to tell 3464 * mac80211 which stations are asleep and which are not. The 3465 * problem here is calling mac80211 functions so many times 3466 * could take too long and make us miss the time to submit 3467 * the beacon to the target. 3468 * 3469 * So as a workaround we try to extend the TIM IE if there 3470 * is unicast buffered for stations with aid > 7 and fill it 3471 * in ourselves. 3472 */ 3473 static void ath10k_wmi_update_tim(struct ath10k *ar, 3474 struct ath10k_vif *arvif, 3475 struct sk_buff *bcn, 3476 const struct wmi_tim_info_arg *tim_info) 3477 { 3478 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; 3479 struct ieee80211_tim_ie *tim; 3480 u8 *ies, *ie; 3481 u8 ie_len, pvm_len; 3482 __le32 t; 3483 u32 v, tim_len; 3484 3485 /* When FW reports 0 in tim_len, ensure atleast first byte 3486 * in tim_bitmap is considered for pvm calculation. 3487 */ 3488 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1; 3489 3490 /* if next SWBA has no tim_changed the tim_bitmap is garbage. 3491 * we must copy the bitmap upon change and reuse it later 3492 */ 3493 if (__le32_to_cpu(tim_info->tim_changed)) { 3494 int i; 3495 3496 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) { 3497 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu", 3498 tim_len, sizeof(arvif->u.ap.tim_bitmap)); 3499 tim_len = sizeof(arvif->u.ap.tim_bitmap); 3500 } 3501 3502 for (i = 0; i < tim_len; i++) { 3503 t = tim_info->tim_bitmap[i / 4]; 3504 v = __le32_to_cpu(t); 3505 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; 3506 } 3507 3508 /* FW reports either length 0 or length based on max supported 3509 * station. so we calculate this on our own 3510 */ 3511 arvif->u.ap.tim_len = 0; 3512 for (i = 0; i < tim_len; i++) 3513 if (arvif->u.ap.tim_bitmap[i]) 3514 arvif->u.ap.tim_len = i; 3515 3516 arvif->u.ap.tim_len++; 3517 } 3518 3519 ies = bcn->data; 3520 ies += ieee80211_hdrlen(hdr->frame_control); 3521 ies += 12; /* fixed parameters */ 3522 3523 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies, 3524 (u8 *)skb_tail_pointer(bcn) - ies); 3525 if (!ie) { 3526 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS) 3527 ath10k_warn(ar, "no tim ie found;\n"); 3528 return; 3529 } 3530 3531 tim = (void *)ie + 2; 3532 ie_len = ie[1]; 3533 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */ 3534 3535 if (pvm_len < arvif->u.ap.tim_len) { 3536 int expand_size = tim_len - pvm_len; 3537 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len); 3538 void *next_ie = ie + 2 + ie_len; 3539 3540 if (skb_put(bcn, expand_size)) { 3541 memmove(next_ie + expand_size, next_ie, move_size); 3542 3543 ie[1] += expand_size; 3544 ie_len += expand_size; 3545 pvm_len += expand_size; 3546 } else { 3547 ath10k_warn(ar, "tim expansion failed\n"); 3548 } 3549 } 3550 3551 if (pvm_len > tim_len) { 3552 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len); 3553 return; 3554 } 3555 3556 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast); 3557 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); 3558 3559 if (tim->dtim_count == 0) { 3560 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO; 3561 3562 if (__le32_to_cpu(tim_info->tim_mcast) == 1) 3563 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB; 3564 } 3565 3566 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n", 3567 tim->dtim_count, tim->dtim_period, 3568 tim->bitmap_ctrl, pvm_len); 3569 } 3570 3571 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, 3572 struct sk_buff *bcn, 3573 const struct wmi_p2p_noa_info *noa) 3574 { 3575 if (!arvif->vif->p2p) 3576 return; 3577 3578 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed); 3579 3580 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) 3581 ath10k_p2p_noa_update(arvif, noa); 3582 3583 if (arvif->u.ap.noa_data) 3584 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC)) 3585 skb_put_data(bcn, arvif->u.ap.noa_data, 3586 arvif->u.ap.noa_len); 3587 } 3588 3589 static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb, 3590 struct wmi_swba_ev_arg *arg) 3591 { 3592 struct wmi_host_swba_event *ev = (void *)skb->data; 3593 u32 map; 3594 size_t i; 3595 3596 if (skb->len < sizeof(*ev)) 3597 return -EPROTO; 3598 3599 skb_pull(skb, sizeof(*ev)); 3600 arg->vdev_map = ev->vdev_map; 3601 3602 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { 3603 if (!(map & BIT(0))) 3604 continue; 3605 3606 /* If this happens there were some changes in firmware and 3607 * ath10k should update the max size of tim_info array. 3608 */ 3609 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) 3610 break; 3611 3612 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > 3613 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { 3614 ath10k_warn(ar, "refusing to parse invalid swba structure\n"); 3615 return -EPROTO; 3616 } 3617 3618 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len; 3619 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; 3620 arg->tim_info[i].tim_bitmap = 3621 ev->bcn_info[i].tim_info.tim_bitmap; 3622 arg->tim_info[i].tim_changed = 3623 ev->bcn_info[i].tim_info.tim_changed; 3624 arg->tim_info[i].tim_num_ps_pending = 3625 ev->bcn_info[i].tim_info.tim_num_ps_pending; 3626 3627 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info; 3628 i++; 3629 } 3630 3631 return 0; 3632 } 3633 3634 static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar, 3635 struct sk_buff *skb, 3636 struct wmi_swba_ev_arg *arg) 3637 { 3638 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data; 3639 u32 map; 3640 size_t i; 3641 3642 if (skb->len < sizeof(*ev)) 3643 return -EPROTO; 3644 3645 skb_pull(skb, sizeof(*ev)); 3646 arg->vdev_map = ev->vdev_map; 3647 3648 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { 3649 if (!(map & BIT(0))) 3650 continue; 3651 3652 /* If this happens there were some changes in firmware and 3653 * ath10k should update the max size of tim_info array. 3654 */ 3655 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) 3656 break; 3657 3658 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > 3659 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { 3660 ath10k_warn(ar, "refusing to parse invalid swba structure\n"); 3661 return -EPROTO; 3662 } 3663 3664 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len; 3665 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; 3666 arg->tim_info[i].tim_bitmap = 3667 ev->bcn_info[i].tim_info.tim_bitmap; 3668 arg->tim_info[i].tim_changed = 3669 ev->bcn_info[i].tim_info.tim_changed; 3670 arg->tim_info[i].tim_num_ps_pending = 3671 ev->bcn_info[i].tim_info.tim_num_ps_pending; 3672 i++; 3673 } 3674 3675 return 0; 3676 } 3677 3678 static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar, 3679 struct sk_buff *skb, 3680 struct wmi_swba_ev_arg *arg) 3681 { 3682 struct wmi_10_4_host_swba_event *ev = (void *)skb->data; 3683 u32 map, tim_len; 3684 size_t i; 3685 3686 if (skb->len < sizeof(*ev)) 3687 return -EPROTO; 3688 3689 skb_pull(skb, sizeof(*ev)); 3690 arg->vdev_map = ev->vdev_map; 3691 3692 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { 3693 if (!(map & BIT(0))) 3694 continue; 3695 3696 /* If this happens there were some changes in firmware and 3697 * ath10k should update the max size of tim_info array. 3698 */ 3699 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) 3700 break; 3701 3702 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > 3703 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { 3704 ath10k_warn(ar, "refusing to parse invalid swba structure\n"); 3705 return -EPROTO; 3706 } 3707 3708 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len); 3709 if (tim_len) { 3710 /* Exclude 4 byte guard length */ 3711 tim_len -= 4; 3712 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len); 3713 } else { 3714 arg->tim_info[i].tim_len = 0; 3715 } 3716 3717 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; 3718 arg->tim_info[i].tim_bitmap = 3719 ev->bcn_info[i].tim_info.tim_bitmap; 3720 arg->tim_info[i].tim_changed = 3721 ev->bcn_info[i].tim_info.tim_changed; 3722 arg->tim_info[i].tim_num_ps_pending = 3723 ev->bcn_info[i].tim_info.tim_num_ps_pending; 3724 3725 /* 10.4 firmware doesn't have p2p support. notice of absence 3726 * info can be ignored for now. 3727 */ 3728 3729 i++; 3730 } 3731 3732 return 0; 3733 } 3734 3735 static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar) 3736 { 3737 return WMI_TXBF_CONF_BEFORE_ASSOC; 3738 } 3739 3740 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) 3741 { 3742 struct wmi_swba_ev_arg arg = {}; 3743 u32 map; 3744 int i = -1; 3745 const struct wmi_tim_info_arg *tim_info; 3746 const struct wmi_p2p_noa_info *noa_info; 3747 struct ath10k_vif *arvif; 3748 struct sk_buff *bcn; 3749 dma_addr_t paddr; 3750 int ret, vdev_id = 0; 3751 3752 ret = ath10k_wmi_pull_swba(ar, skb, &arg); 3753 if (ret) { 3754 ath10k_warn(ar, "failed to parse swba event: %d\n", ret); 3755 return; 3756 } 3757 3758 map = __le32_to_cpu(arg.vdev_map); 3759 3760 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", 3761 map); 3762 3763 for (; map; map >>= 1, vdev_id++) { 3764 if (!(map & 0x1)) 3765 continue; 3766 3767 i++; 3768 3769 if (i >= WMI_MAX_AP_VDEV) { 3770 ath10k_warn(ar, "swba has corrupted vdev map\n"); 3771 break; 3772 } 3773 3774 tim_info = &arg.tim_info[i]; 3775 noa_info = arg.noa_info[i]; 3776 3777 ath10k_dbg(ar, ATH10K_DBG_MGMT, 3778 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", 3779 i, 3780 __le32_to_cpu(tim_info->tim_len), 3781 __le32_to_cpu(tim_info->tim_mcast), 3782 __le32_to_cpu(tim_info->tim_changed), 3783 __le32_to_cpu(tim_info->tim_num_ps_pending), 3784 __le32_to_cpu(tim_info->tim_bitmap[3]), 3785 __le32_to_cpu(tim_info->tim_bitmap[2]), 3786 __le32_to_cpu(tim_info->tim_bitmap[1]), 3787 __le32_to_cpu(tim_info->tim_bitmap[0])); 3788 3789 /* TODO: Only first 4 word from tim_bitmap is dumped. 3790 * Extend debug code to dump full tim_bitmap. 3791 */ 3792 3793 arvif = ath10k_get_arvif(ar, vdev_id); 3794 if (arvif == NULL) { 3795 ath10k_warn(ar, "no vif for vdev_id %d found\n", 3796 vdev_id); 3797 continue; 3798 } 3799 3800 /* mac80211 would have already asked us to stop beaconing and 3801 * bring the vdev down, so continue in that case 3802 */ 3803 if (!arvif->is_up) 3804 continue; 3805 3806 /* There are no completions for beacons so wait for next SWBA 3807 * before telling mac80211 to decrement CSA counter 3808 * 3809 * Once CSA counter is completed stop sending beacons until 3810 * actual channel switch is done 3811 */ 3812 if (arvif->vif->csa_active && 3813 ieee80211_csa_is_complete(arvif->vif)) { 3814 ieee80211_csa_finish(arvif->vif); 3815 continue; 3816 } 3817 3818 bcn = ieee80211_beacon_get(ar->hw, arvif->vif); 3819 if (!bcn) { 3820 ath10k_warn(ar, "could not get mac80211 beacon\n"); 3821 continue; 3822 } 3823 3824 ath10k_tx_h_seq_no(arvif->vif, bcn); 3825 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info); 3826 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info); 3827 3828 spin_lock_bh(&ar->data_lock); 3829 3830 if (arvif->beacon) { 3831 switch (arvif->beacon_state) { 3832 case ATH10K_BEACON_SENT: 3833 break; 3834 case ATH10K_BEACON_SCHEDULED: 3835 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n", 3836 arvif->vdev_id); 3837 break; 3838 case ATH10K_BEACON_SENDING: 3839 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n", 3840 arvif->vdev_id); 3841 dev_kfree_skb(bcn); 3842 goto skip; 3843 } 3844 3845 ath10k_mac_vif_beacon_free(arvif); 3846 } 3847 3848 if (!arvif->beacon_buf) { 3849 paddr = dma_map_single(arvif->ar->dev, bcn->data, 3850 bcn->len, DMA_TO_DEVICE); 3851 ret = dma_mapping_error(arvif->ar->dev, paddr); 3852 if (ret) { 3853 ath10k_warn(ar, "failed to map beacon: %d\n", 3854 ret); 3855 dev_kfree_skb_any(bcn); 3856 goto skip; 3857 } 3858 3859 ATH10K_SKB_CB(bcn)->paddr = paddr; 3860 } else { 3861 if (bcn->len > IEEE80211_MAX_FRAME_LEN) { 3862 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n", 3863 bcn->len, IEEE80211_MAX_FRAME_LEN); 3864 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN); 3865 } 3866 memcpy(arvif->beacon_buf, bcn->data, bcn->len); 3867 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr; 3868 } 3869 3870 arvif->beacon = bcn; 3871 arvif->beacon_state = ATH10K_BEACON_SCHEDULED; 3872 3873 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len); 3874 trace_ath10k_tx_payload(ar, bcn->data, bcn->len); 3875 3876 skip: 3877 spin_unlock_bh(&ar->data_lock); 3878 } 3879 3880 ath10k_wmi_tx_beacons_nowait(ar); 3881 } 3882 3883 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb) 3884 { 3885 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); 3886 } 3887 3888 static void ath10k_radar_detected(struct ath10k *ar) 3889 { 3890 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n"); 3891 ATH10K_DFS_STAT_INC(ar, radar_detected); 3892 3893 /* Control radar events reporting in debugfs file 3894 * dfs_block_radar_events 3895 */ 3896 if (ar->dfs_block_radar_events) 3897 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n"); 3898 else 3899 ieee80211_radar_detected(ar->hw); 3900 } 3901 3902 static void ath10k_radar_confirmation_work(struct work_struct *work) 3903 { 3904 struct ath10k *ar = container_of(work, struct ath10k, 3905 radar_confirmation_work); 3906 struct ath10k_radar_found_info radar_info; 3907 int ret, time_left; 3908 3909 reinit_completion(&ar->wmi.radar_confirm); 3910 3911 spin_lock_bh(&ar->data_lock); 3912 memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info)); 3913 spin_unlock_bh(&ar->data_lock); 3914 3915 ret = ath10k_wmi_report_radar_found(ar, &radar_info); 3916 if (ret) { 3917 ath10k_warn(ar, "failed to send radar found %d\n", ret); 3918 goto wait_complete; 3919 } 3920 3921 time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm, 3922 ATH10K_WMI_DFS_CONF_TIMEOUT_HZ); 3923 if (time_left) { 3924 /* DFS Confirmation status event received and 3925 * necessary action completed. 3926 */ 3927 goto wait_complete; 3928 } else { 3929 /* DFS Confirmation event not received from FW.Considering this 3930 * as real radar. 3931 */ 3932 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 3933 "dfs confirmation not received from fw, considering as radar\n"); 3934 goto radar_detected; 3935 } 3936 3937 radar_detected: 3938 ath10k_radar_detected(ar); 3939 3940 /* Reset state to allow sending confirmation on consecutive radar 3941 * detections, unless radar confirmation is disabled/stopped. 3942 */ 3943 wait_complete: 3944 spin_lock_bh(&ar->data_lock); 3945 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED) 3946 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE; 3947 spin_unlock_bh(&ar->data_lock); 3948 } 3949 3950 static void ath10k_dfs_radar_report(struct ath10k *ar, 3951 struct wmi_phyerr_ev_arg *phyerr, 3952 const struct phyerr_radar_report *rr, 3953 u64 tsf) 3954 { 3955 u32 reg0, reg1, tsf32l; 3956 struct ieee80211_channel *ch; 3957 struct pulse_event pe; 3958 struct radar_detector_specs rs; 3959 u64 tsf64; 3960 u8 rssi, width; 3961 struct ath10k_radar_found_info *radar_info; 3962 3963 reg0 = __le32_to_cpu(rr->reg0); 3964 reg1 = __le32_to_cpu(rr->reg1); 3965 3966 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 3967 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n", 3968 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP), 3969 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH), 3970 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN), 3971 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF)); 3972 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 3973 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n", 3974 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK), 3975 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX), 3976 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID), 3977 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN), 3978 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK)); 3979 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 3980 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n", 3981 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET), 3982 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR)); 3983 3984 if (!ar->dfs_detector) 3985 return; 3986 3987 spin_lock_bh(&ar->data_lock); 3988 ch = ar->rx_channel; 3989 3990 /* fetch target operating channel during channel change */ 3991 if (!ch) 3992 ch = ar->tgt_oper_chan; 3993 3994 spin_unlock_bh(&ar->data_lock); 3995 3996 if (!ch) { 3997 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n"); 3998 goto radar_detected; 3999 } 4000 4001 /* report event to DFS pattern detector */ 4002 tsf32l = phyerr->tsf_timestamp; 4003 tsf64 = tsf & (~0xFFFFFFFFULL); 4004 tsf64 |= tsf32l; 4005 4006 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR); 4007 rssi = phyerr->rssi_combined; 4008 4009 /* hardware store this as 8 bit signed value, 4010 * set to zero if negative number 4011 */ 4012 if (rssi & 0x80) 4013 rssi = 0; 4014 4015 pe.ts = tsf64; 4016 pe.freq = ch->center_freq; 4017 pe.width = width; 4018 pe.rssi = rssi; 4019 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0); 4020 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 4021 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n", 4022 pe.freq, pe.width, pe.rssi, pe.ts); 4023 4024 ATH10K_DFS_STAT_INC(ar, pulses_detected); 4025 4026 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) { 4027 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 4028 "dfs no pulse pattern detected, yet\n"); 4029 return; 4030 } 4031 4032 if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) && 4033 ar->dfs_detector->region == NL80211_DFS_FCC) { 4034 /* Consecutive radar indications need not be 4035 * sent to the firmware until we get confirmation 4036 * for the previous detected radar. 4037 */ 4038 spin_lock_bh(&ar->data_lock); 4039 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) { 4040 spin_unlock_bh(&ar->data_lock); 4041 return; 4042 } 4043 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS; 4044 radar_info = &ar->last_radar_info; 4045 4046 radar_info->pri_min = rs.pri_min; 4047 radar_info->pri_max = rs.pri_max; 4048 radar_info->width_min = rs.width_min; 4049 radar_info->width_max = rs.width_max; 4050 /*TODO Find sidx_min and sidx_max */ 4051 radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX); 4052 radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX); 4053 4054 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 4055 "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n", 4056 radar_info->pri_min, radar_info->pri_max, 4057 radar_info->width_min, radar_info->width_max, 4058 radar_info->sidx_min, radar_info->sidx_max); 4059 ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work); 4060 spin_unlock_bh(&ar->data_lock); 4061 return; 4062 } 4063 4064 radar_detected: 4065 ath10k_radar_detected(ar); 4066 } 4067 4068 static int ath10k_dfs_fft_report(struct ath10k *ar, 4069 struct wmi_phyerr_ev_arg *phyerr, 4070 const struct phyerr_fft_report *fftr, 4071 u64 tsf) 4072 { 4073 u32 reg0, reg1; 4074 u8 rssi, peak_mag; 4075 4076 reg0 = __le32_to_cpu(fftr->reg0); 4077 reg1 = __le32_to_cpu(fftr->reg1); 4078 rssi = phyerr->rssi_combined; 4079 4080 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 4081 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n", 4082 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB), 4083 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB), 4084 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX), 4085 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX)); 4086 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 4087 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n", 4088 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB), 4089 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB), 4090 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG), 4091 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB)); 4092 4093 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG); 4094 4095 /* false event detection */ 4096 if (rssi == DFS_RSSI_POSSIBLY_FALSE && 4097 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) { 4098 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n"); 4099 ATH10K_DFS_STAT_INC(ar, pulses_discarded); 4100 return -EINVAL; 4101 } 4102 4103 return 0; 4104 } 4105 4106 void ath10k_wmi_event_dfs(struct ath10k *ar, 4107 struct wmi_phyerr_ev_arg *phyerr, 4108 u64 tsf) 4109 { 4110 int buf_len, tlv_len, res, i = 0; 4111 const struct phyerr_tlv *tlv; 4112 const struct phyerr_radar_report *rr; 4113 const struct phyerr_fft_report *fftr; 4114 const u8 *tlv_buf; 4115 4116 buf_len = phyerr->buf_len; 4117 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 4118 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n", 4119 phyerr->phy_err_code, phyerr->rssi_combined, 4120 phyerr->tsf_timestamp, tsf, buf_len); 4121 4122 /* Skip event if DFS disabled */ 4123 if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED)) 4124 return; 4125 4126 ATH10K_DFS_STAT_INC(ar, pulses_total); 4127 4128 while (i < buf_len) { 4129 if (i + sizeof(*tlv) > buf_len) { 4130 ath10k_warn(ar, "too short buf for tlv header (%d)\n", 4131 i); 4132 return; 4133 } 4134 4135 tlv = (struct phyerr_tlv *)&phyerr->buf[i]; 4136 tlv_len = __le16_to_cpu(tlv->len); 4137 tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; 4138 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 4139 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n", 4140 tlv_len, tlv->tag, tlv->sig); 4141 4142 switch (tlv->tag) { 4143 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY: 4144 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) { 4145 ath10k_warn(ar, "too short radar pulse summary (%d)\n", 4146 i); 4147 return; 4148 } 4149 4150 rr = (struct phyerr_radar_report *)tlv_buf; 4151 ath10k_dfs_radar_report(ar, phyerr, rr, tsf); 4152 break; 4153 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: 4154 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) { 4155 ath10k_warn(ar, "too short fft report (%d)\n", 4156 i); 4157 return; 4158 } 4159 4160 fftr = (struct phyerr_fft_report *)tlv_buf; 4161 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf); 4162 if (res) 4163 return; 4164 break; 4165 } 4166 4167 i += sizeof(*tlv) + tlv_len; 4168 } 4169 } 4170 4171 void ath10k_wmi_event_spectral_scan(struct ath10k *ar, 4172 struct wmi_phyerr_ev_arg *phyerr, 4173 u64 tsf) 4174 { 4175 int buf_len, tlv_len, res, i = 0; 4176 struct phyerr_tlv *tlv; 4177 const void *tlv_buf; 4178 const struct phyerr_fft_report *fftr; 4179 size_t fftr_len; 4180 4181 buf_len = phyerr->buf_len; 4182 4183 while (i < buf_len) { 4184 if (i + sizeof(*tlv) > buf_len) { 4185 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n", 4186 i); 4187 return; 4188 } 4189 4190 tlv = (struct phyerr_tlv *)&phyerr->buf[i]; 4191 tlv_len = __le16_to_cpu(tlv->len); 4192 tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; 4193 4194 if (i + sizeof(*tlv) + tlv_len > buf_len) { 4195 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n", 4196 i); 4197 return; 4198 } 4199 4200 switch (tlv->tag) { 4201 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: 4202 if (sizeof(*fftr) > tlv_len) { 4203 ath10k_warn(ar, "failed to parse fft report at byte %d\n", 4204 i); 4205 return; 4206 } 4207 4208 fftr_len = tlv_len - sizeof(*fftr); 4209 fftr = tlv_buf; 4210 res = ath10k_spectral_process_fft(ar, phyerr, 4211 fftr, fftr_len, 4212 tsf); 4213 if (res < 0) { 4214 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n", 4215 res); 4216 return; 4217 } 4218 break; 4219 } 4220 4221 i += sizeof(*tlv) + tlv_len; 4222 } 4223 } 4224 4225 static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar, 4226 struct sk_buff *skb, 4227 struct wmi_phyerr_hdr_arg *arg) 4228 { 4229 struct wmi_phyerr_event *ev = (void *)skb->data; 4230 4231 if (skb->len < sizeof(*ev)) 4232 return -EPROTO; 4233 4234 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs); 4235 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); 4236 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); 4237 arg->buf_len = skb->len - sizeof(*ev); 4238 arg->phyerrs = ev->phyerrs; 4239 4240 return 0; 4241 } 4242 4243 static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar, 4244 struct sk_buff *skb, 4245 struct wmi_phyerr_hdr_arg *arg) 4246 { 4247 struct wmi_10_4_phyerr_event *ev = (void *)skb->data; 4248 4249 if (skb->len < sizeof(*ev)) 4250 return -EPROTO; 4251 4252 /* 10.4 firmware always reports only one phyerr */ 4253 arg->num_phyerrs = 1; 4254 4255 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); 4256 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); 4257 arg->buf_len = skb->len; 4258 arg->phyerrs = skb->data; 4259 4260 return 0; 4261 } 4262 4263 int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, 4264 const void *phyerr_buf, 4265 int left_len, 4266 struct wmi_phyerr_ev_arg *arg) 4267 { 4268 const struct wmi_phyerr *phyerr = phyerr_buf; 4269 int i; 4270 4271 if (left_len < sizeof(*phyerr)) { 4272 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n", 4273 left_len, sizeof(*phyerr)); 4274 return -EINVAL; 4275 } 4276 4277 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); 4278 arg->freq1 = __le16_to_cpu(phyerr->freq1); 4279 arg->freq2 = __le16_to_cpu(phyerr->freq2); 4280 arg->rssi_combined = phyerr->rssi_combined; 4281 arg->chan_width_mhz = phyerr->chan_width_mhz; 4282 arg->buf_len = __le32_to_cpu(phyerr->buf_len); 4283 arg->buf = phyerr->buf; 4284 arg->hdr_len = sizeof(*phyerr); 4285 4286 for (i = 0; i < 4; i++) 4287 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); 4288 4289 switch (phyerr->phy_err_code) { 4290 case PHY_ERROR_GEN_SPECTRAL_SCAN: 4291 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; 4292 break; 4293 case PHY_ERROR_GEN_FALSE_RADAR_EXT: 4294 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT; 4295 break; 4296 case PHY_ERROR_GEN_RADAR: 4297 arg->phy_err_code = PHY_ERROR_RADAR; 4298 break; 4299 default: 4300 arg->phy_err_code = PHY_ERROR_UNKNOWN; 4301 break; 4302 } 4303 4304 return 0; 4305 } 4306 4307 static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar, 4308 const void *phyerr_buf, 4309 int left_len, 4310 struct wmi_phyerr_ev_arg *arg) 4311 { 4312 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf; 4313 u32 phy_err_mask; 4314 int i; 4315 4316 if (left_len < sizeof(*phyerr)) { 4317 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n", 4318 left_len, sizeof(*phyerr)); 4319 return -EINVAL; 4320 } 4321 4322 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); 4323 arg->freq1 = __le16_to_cpu(phyerr->freq1); 4324 arg->freq2 = __le16_to_cpu(phyerr->freq2); 4325 arg->rssi_combined = phyerr->rssi_combined; 4326 arg->chan_width_mhz = phyerr->chan_width_mhz; 4327 arg->buf_len = __le32_to_cpu(phyerr->buf_len); 4328 arg->buf = phyerr->buf; 4329 arg->hdr_len = sizeof(*phyerr); 4330 4331 for (i = 0; i < 4; i++) 4332 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); 4333 4334 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]); 4335 4336 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK) 4337 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; 4338 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK) 4339 arg->phy_err_code = PHY_ERROR_RADAR; 4340 else 4341 arg->phy_err_code = PHY_ERROR_UNKNOWN; 4342 4343 return 0; 4344 } 4345 4346 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) 4347 { 4348 struct wmi_phyerr_hdr_arg hdr_arg = {}; 4349 struct wmi_phyerr_ev_arg phyerr_arg = {}; 4350 const void *phyerr; 4351 u32 count, i, buf_len, phy_err_code; 4352 u64 tsf; 4353 int left_len, ret; 4354 4355 ATH10K_DFS_STAT_INC(ar, phy_errors); 4356 4357 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg); 4358 if (ret) { 4359 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret); 4360 return; 4361 } 4362 4363 /* Check number of included events */ 4364 count = hdr_arg.num_phyerrs; 4365 4366 left_len = hdr_arg.buf_len; 4367 4368 tsf = hdr_arg.tsf_u32; 4369 tsf <<= 32; 4370 tsf |= hdr_arg.tsf_l32; 4371 4372 ath10k_dbg(ar, ATH10K_DBG_WMI, 4373 "wmi event phyerr count %d tsf64 0x%llX\n", 4374 count, tsf); 4375 4376 phyerr = hdr_arg.phyerrs; 4377 for (i = 0; i < count; i++) { 4378 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg); 4379 if (ret) { 4380 ath10k_warn(ar, "failed to parse phyerr event (%d)\n", 4381 i); 4382 return; 4383 } 4384 4385 left_len -= phyerr_arg.hdr_len; 4386 buf_len = phyerr_arg.buf_len; 4387 phy_err_code = phyerr_arg.phy_err_code; 4388 4389 if (left_len < buf_len) { 4390 ath10k_warn(ar, "single event (%d) wrong buf len\n", i); 4391 return; 4392 } 4393 4394 left_len -= buf_len; 4395 4396 switch (phy_err_code) { 4397 case PHY_ERROR_RADAR: 4398 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); 4399 break; 4400 case PHY_ERROR_SPECTRAL_SCAN: 4401 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); 4402 break; 4403 case PHY_ERROR_FALSE_RADAR_EXT: 4404 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); 4405 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); 4406 break; 4407 default: 4408 break; 4409 } 4410 4411 phyerr = phyerr + phyerr_arg.hdr_len + buf_len; 4412 } 4413 } 4414 4415 static int 4416 ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb, 4417 struct wmi_dfs_status_ev_arg *arg) 4418 { 4419 struct wmi_dfs_status_ev_arg *ev = (void *)skb->data; 4420 4421 if (skb->len < sizeof(*ev)) 4422 return -EPROTO; 4423 4424 arg->status = ev->status; 4425 4426 return 0; 4427 } 4428 4429 static void 4430 ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb) 4431 { 4432 struct wmi_dfs_status_ev_arg status_arg = {}; 4433 int ret; 4434 4435 ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg); 4436 4437 if (ret) { 4438 ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret); 4439 return; 4440 } 4441 4442 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 4443 "dfs status event received from fw: %d\n", 4444 status_arg.status); 4445 4446 /* Even in case of radar detection failure we follow the same 4447 * behaviour as if radar is detected i.e to switch to a different 4448 * channel. 4449 */ 4450 if (status_arg.status == WMI_HW_RADAR_DETECTED || 4451 status_arg.status == WMI_RADAR_DETECTION_FAIL) 4452 ath10k_radar_detected(ar); 4453 complete(&ar->wmi.radar_confirm); 4454 } 4455 4456 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) 4457 { 4458 struct wmi_roam_ev_arg arg = {}; 4459 int ret; 4460 u32 vdev_id; 4461 u32 reason; 4462 s32 rssi; 4463 4464 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg); 4465 if (ret) { 4466 ath10k_warn(ar, "failed to parse roam event: %d\n", ret); 4467 return; 4468 } 4469 4470 vdev_id = __le32_to_cpu(arg.vdev_id); 4471 reason = __le32_to_cpu(arg.reason); 4472 rssi = __le32_to_cpu(arg.rssi); 4473 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT; 4474 4475 ath10k_dbg(ar, ATH10K_DBG_WMI, 4476 "wmi roam event vdev %u reason 0x%08x rssi %d\n", 4477 vdev_id, reason, rssi); 4478 4479 if (reason >= WMI_ROAM_REASON_MAX) 4480 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n", 4481 reason, vdev_id); 4482 4483 switch (reason) { 4484 case WMI_ROAM_REASON_BEACON_MISS: 4485 ath10k_mac_handle_beacon_miss(ar, vdev_id); 4486 break; 4487 case WMI_ROAM_REASON_BETTER_AP: 4488 case WMI_ROAM_REASON_LOW_RSSI: 4489 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 4490 case WMI_ROAM_REASON_HO_FAILED: 4491 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n", 4492 reason, vdev_id); 4493 break; 4494 } 4495 } 4496 4497 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb) 4498 { 4499 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); 4500 } 4501 4502 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb) 4503 { 4504 char buf[101], c; 4505 int i; 4506 4507 for (i = 0; i < sizeof(buf) - 1; i++) { 4508 if (i >= skb->len) 4509 break; 4510 4511 c = skb->data[i]; 4512 4513 if (c == '\0') 4514 break; 4515 4516 if (isascii(c) && isprint(c)) 4517 buf[i] = c; 4518 else 4519 buf[i] = '.'; 4520 } 4521 4522 if (i == sizeof(buf) - 1) 4523 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len); 4524 4525 /* for some reason the debug prints end with \n, remove that */ 4526 if (skb->data[i - 1] == '\n') 4527 i--; 4528 4529 /* the last byte is always reserved for the null character */ 4530 buf[i] = '\0'; 4531 4532 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf); 4533 } 4534 4535 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) 4536 { 4537 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); 4538 } 4539 4540 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb) 4541 { 4542 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); 4543 } 4544 4545 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, 4546 struct sk_buff *skb) 4547 { 4548 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); 4549 } 4550 4551 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, 4552 struct sk_buff *skb) 4553 { 4554 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); 4555 } 4556 4557 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb) 4558 { 4559 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); 4560 } 4561 4562 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb) 4563 { 4564 struct wmi_wow_ev_arg ev = {}; 4565 int ret; 4566 4567 complete(&ar->wow.wakeup_completed); 4568 4569 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev); 4570 if (ret) { 4571 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret); 4572 return; 4573 } 4574 4575 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n", 4576 wow_reason(ev.wake_reason)); 4577 } 4578 4579 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb) 4580 { 4581 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); 4582 } 4583 4584 static u8 ath10k_tpc_config_get_rate(struct ath10k *ar, 4585 struct wmi_pdev_tpc_config_event *ev, 4586 u32 rate_idx, u32 num_chains, 4587 u32 rate_code, u8 type) 4588 { 4589 u8 tpc, num_streams, preamble, ch, stm_idx; 4590 4591 num_streams = ATH10K_HW_NSS(rate_code); 4592 preamble = ATH10K_HW_PREAMBLE(rate_code); 4593 ch = num_chains - 1; 4594 4595 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]); 4596 4597 if (__le32_to_cpu(ev->num_tx_chain) <= 1) 4598 goto out; 4599 4600 if (preamble == WMI_RATE_PREAMBLE_CCK) 4601 goto out; 4602 4603 stm_idx = num_streams - 1; 4604 if (num_chains <= num_streams) 4605 goto out; 4606 4607 switch (type) { 4608 case WMI_TPC_TABLE_TYPE_STBC: 4609 tpc = min_t(u8, tpc, 4610 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]); 4611 break; 4612 case WMI_TPC_TABLE_TYPE_TXBF: 4613 tpc = min_t(u8, tpc, 4614 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]); 4615 break; 4616 case WMI_TPC_TABLE_TYPE_CDD: 4617 tpc = min_t(u8, tpc, 4618 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]); 4619 break; 4620 default: 4621 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type); 4622 tpc = 0; 4623 break; 4624 } 4625 4626 out: 4627 return tpc; 4628 } 4629 4630 static void ath10k_tpc_config_disp_tables(struct ath10k *ar, 4631 struct wmi_pdev_tpc_config_event *ev, 4632 struct ath10k_tpc_stats *tpc_stats, 4633 u8 *rate_code, u16 *pream_table, u8 type) 4634 { 4635 u32 i, j, pream_idx, flags; 4636 u8 tpc[WMI_TPC_TX_N_CHAIN]; 4637 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 4638 char buff[WMI_TPC_BUF_SIZE]; 4639 4640 flags = __le32_to_cpu(ev->flags); 4641 4642 switch (type) { 4643 case WMI_TPC_TABLE_TYPE_CDD: 4644 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) { 4645 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n"); 4646 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; 4647 return; 4648 } 4649 break; 4650 case WMI_TPC_TABLE_TYPE_STBC: 4651 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) { 4652 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n"); 4653 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; 4654 return; 4655 } 4656 break; 4657 case WMI_TPC_TABLE_TYPE_TXBF: 4658 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) { 4659 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n"); 4660 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; 4661 return; 4662 } 4663 break; 4664 default: 4665 ath10k_dbg(ar, ATH10K_DBG_WMI, 4666 "invalid table type in wmi tpc event: %d\n", type); 4667 return; 4668 } 4669 4670 pream_idx = 0; 4671 for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) { 4672 memset(tpc_value, 0, sizeof(tpc_value)); 4673 memset(buff, 0, sizeof(buff)); 4674 if (i == pream_table[pream_idx]) 4675 pream_idx++; 4676 4677 for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) { 4678 if (j >= __le32_to_cpu(ev->num_tx_chain)) 4679 break; 4680 4681 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1, 4682 rate_code[i], 4683 type); 4684 snprintf(buff, sizeof(buff), "%8d ", tpc[j]); 4685 strlcat(tpc_value, buff, sizeof(tpc_value)); 4686 } 4687 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx; 4688 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i]; 4689 memcpy(tpc_stats->tpc_table[type].tpc_value[i], 4690 tpc_value, sizeof(tpc_value)); 4691 } 4692 } 4693 4694 void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table, 4695 u32 num_tx_chain) 4696 { 4697 u32 i, j, pream_idx; 4698 u8 rate_idx; 4699 4700 /* Create the rate code table based on the chains supported */ 4701 rate_idx = 0; 4702 pream_idx = 0; 4703 4704 /* Fill CCK rate code */ 4705 for (i = 0; i < 4; i++) { 4706 rate_code[rate_idx] = 4707 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK); 4708 rate_idx++; 4709 } 4710 pream_table[pream_idx] = rate_idx; 4711 pream_idx++; 4712 4713 /* Fill OFDM rate code */ 4714 for (i = 0; i < 8; i++) { 4715 rate_code[rate_idx] = 4716 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM); 4717 rate_idx++; 4718 } 4719 pream_table[pream_idx] = rate_idx; 4720 pream_idx++; 4721 4722 /* Fill HT20 rate code */ 4723 for (i = 0; i < num_tx_chain; i++) { 4724 for (j = 0; j < 8; j++) { 4725 rate_code[rate_idx] = 4726 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT); 4727 rate_idx++; 4728 } 4729 } 4730 pream_table[pream_idx] = rate_idx; 4731 pream_idx++; 4732 4733 /* Fill HT40 rate code */ 4734 for (i = 0; i < num_tx_chain; i++) { 4735 for (j = 0; j < 8; j++) { 4736 rate_code[rate_idx] = 4737 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT); 4738 rate_idx++; 4739 } 4740 } 4741 pream_table[pream_idx] = rate_idx; 4742 pream_idx++; 4743 4744 /* Fill VHT20 rate code */ 4745 for (i = 0; i < num_tx_chain; i++) { 4746 for (j = 0; j < 10; j++) { 4747 rate_code[rate_idx] = 4748 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); 4749 rate_idx++; 4750 } 4751 } 4752 pream_table[pream_idx] = rate_idx; 4753 pream_idx++; 4754 4755 /* Fill VHT40 rate code */ 4756 for (i = 0; i < num_tx_chain; i++) { 4757 for (j = 0; j < 10; j++) { 4758 rate_code[rate_idx] = 4759 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); 4760 rate_idx++; 4761 } 4762 } 4763 pream_table[pream_idx] = rate_idx; 4764 pream_idx++; 4765 4766 /* Fill VHT80 rate code */ 4767 for (i = 0; i < num_tx_chain; i++) { 4768 for (j = 0; j < 10; j++) { 4769 rate_code[rate_idx] = 4770 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); 4771 rate_idx++; 4772 } 4773 } 4774 pream_table[pream_idx] = rate_idx; 4775 pream_idx++; 4776 4777 rate_code[rate_idx++] = 4778 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK); 4779 rate_code[rate_idx++] = 4780 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); 4781 rate_code[rate_idx++] = 4782 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK); 4783 rate_code[rate_idx++] = 4784 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); 4785 rate_code[rate_idx++] = 4786 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); 4787 4788 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END; 4789 } 4790 4791 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb) 4792 { 4793 u32 num_tx_chain; 4794 u8 rate_code[WMI_TPC_RATE_MAX]; 4795 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX]; 4796 struct wmi_pdev_tpc_config_event *ev; 4797 struct ath10k_tpc_stats *tpc_stats; 4798 4799 ev = (struct wmi_pdev_tpc_config_event *)skb->data; 4800 4801 num_tx_chain = __le32_to_cpu(ev->num_tx_chain); 4802 4803 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) { 4804 ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n", 4805 num_tx_chain, WMI_TPC_TX_N_CHAIN); 4806 return; 4807 } 4808 4809 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC); 4810 if (!tpc_stats) 4811 return; 4812 4813 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table, 4814 num_tx_chain); 4815 4816 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq); 4817 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode); 4818 tpc_stats->ctl = __le32_to_cpu(ev->ctl); 4819 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain); 4820 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain); 4821 tpc_stats->twice_antenna_reduction = 4822 __le32_to_cpu(ev->twice_antenna_reduction); 4823 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit); 4824 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power); 4825 tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain); 4826 tpc_stats->rate_max = __le32_to_cpu(ev->rate_max); 4827 4828 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, 4829 rate_code, pream_table, 4830 WMI_TPC_TABLE_TYPE_CDD); 4831 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, 4832 rate_code, pream_table, 4833 WMI_TPC_TABLE_TYPE_STBC); 4834 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, 4835 rate_code, pream_table, 4836 WMI_TPC_TABLE_TYPE_TXBF); 4837 4838 ath10k_debug_tpc_stats_process(ar, tpc_stats); 4839 4840 ath10k_dbg(ar, ATH10K_DBG_WMI, 4841 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n", 4842 __le32_to_cpu(ev->chan_freq), 4843 __le32_to_cpu(ev->phy_mode), 4844 __le32_to_cpu(ev->ctl), 4845 __le32_to_cpu(ev->reg_domain), 4846 a_sle32_to_cpu(ev->twice_antenna_gain), 4847 __le32_to_cpu(ev->twice_antenna_reduction), 4848 __le32_to_cpu(ev->power_limit), 4849 __le32_to_cpu(ev->twice_max_rd_power) / 2, 4850 __le32_to_cpu(ev->num_tx_chain), 4851 __le32_to_cpu(ev->rate_max)); 4852 } 4853 4854 static u8 4855 ath10k_wmi_tpc_final_get_rate(struct ath10k *ar, 4856 struct wmi_pdev_tpc_final_table_event *ev, 4857 u32 rate_idx, u32 num_chains, 4858 u32 rate_code, u8 type, u32 pream_idx) 4859 { 4860 u8 tpc, num_streams, preamble, ch, stm_idx; 4861 s8 pow_agcdd, pow_agstbc, pow_agtxbf; 4862 int pream; 4863 4864 num_streams = ATH10K_HW_NSS(rate_code); 4865 preamble = ATH10K_HW_PREAMBLE(rate_code); 4866 ch = num_chains - 1; 4867 stm_idx = num_streams - 1; 4868 pream = -1; 4869 4870 if (__le32_to_cpu(ev->chan_freq) <= 2483) { 4871 switch (pream_idx) { 4872 case WMI_TPC_PREAM_2GHZ_CCK: 4873 pream = 0; 4874 break; 4875 case WMI_TPC_PREAM_2GHZ_OFDM: 4876 pream = 1; 4877 break; 4878 case WMI_TPC_PREAM_2GHZ_HT20: 4879 case WMI_TPC_PREAM_2GHZ_VHT20: 4880 pream = 2; 4881 break; 4882 case WMI_TPC_PREAM_2GHZ_HT40: 4883 case WMI_TPC_PREAM_2GHZ_VHT40: 4884 pream = 3; 4885 break; 4886 case WMI_TPC_PREAM_2GHZ_VHT80: 4887 pream = 4; 4888 break; 4889 default: 4890 pream = -1; 4891 break; 4892 } 4893 } 4894 4895 if (__le32_to_cpu(ev->chan_freq) >= 5180) { 4896 switch (pream_idx) { 4897 case WMI_TPC_PREAM_5GHZ_OFDM: 4898 pream = 0; 4899 break; 4900 case WMI_TPC_PREAM_5GHZ_HT20: 4901 case WMI_TPC_PREAM_5GHZ_VHT20: 4902 pream = 1; 4903 break; 4904 case WMI_TPC_PREAM_5GHZ_HT40: 4905 case WMI_TPC_PREAM_5GHZ_VHT40: 4906 pream = 2; 4907 break; 4908 case WMI_TPC_PREAM_5GHZ_VHT80: 4909 pream = 3; 4910 break; 4911 case WMI_TPC_PREAM_5GHZ_HTCUP: 4912 pream = 4; 4913 break; 4914 default: 4915 pream = -1; 4916 break; 4917 } 4918 } 4919 4920 if (pream == -1) { 4921 ath10k_warn(ar, "unknown wmi tpc final index and frequency: %u, %u\n", 4922 pream_idx, __le32_to_cpu(ev->chan_freq)); 4923 tpc = 0; 4924 goto out; 4925 } 4926 4927 if (pream == 4) 4928 tpc = min_t(u8, ev->rates_array[rate_idx], 4929 ev->max_reg_allow_pow[ch]); 4930 else 4931 tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx], 4932 ev->max_reg_allow_pow[ch]), 4933 ev->ctl_power_table[0][pream][stm_idx]); 4934 4935 if (__le32_to_cpu(ev->num_tx_chain) <= 1) 4936 goto out; 4937 4938 if (preamble == WMI_RATE_PREAMBLE_CCK) 4939 goto out; 4940 4941 if (num_chains <= num_streams) 4942 goto out; 4943 4944 switch (type) { 4945 case WMI_TPC_TABLE_TYPE_STBC: 4946 pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]; 4947 if (pream == 4) 4948 tpc = min_t(u8, tpc, pow_agstbc); 4949 else 4950 tpc = min_t(u8, min_t(u8, tpc, pow_agstbc), 4951 ev->ctl_power_table[0][pream][stm_idx]); 4952 break; 4953 case WMI_TPC_TABLE_TYPE_TXBF: 4954 pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]; 4955 if (pream == 4) 4956 tpc = min_t(u8, tpc, pow_agtxbf); 4957 else 4958 tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf), 4959 ev->ctl_power_table[1][pream][stm_idx]); 4960 break; 4961 case WMI_TPC_TABLE_TYPE_CDD: 4962 pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]; 4963 if (pream == 4) 4964 tpc = min_t(u8, tpc, pow_agcdd); 4965 else 4966 tpc = min_t(u8, min_t(u8, tpc, pow_agcdd), 4967 ev->ctl_power_table[0][pream][stm_idx]); 4968 break; 4969 default: 4970 ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type); 4971 tpc = 0; 4972 break; 4973 } 4974 4975 out: 4976 return tpc; 4977 } 4978 4979 static void 4980 ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar, 4981 struct wmi_pdev_tpc_final_table_event *ev, 4982 struct ath10k_tpc_stats_final *tpc_stats, 4983 u8 *rate_code, u16 *pream_table, u8 type) 4984 { 4985 u32 i, j, pream_idx, flags; 4986 u8 tpc[WMI_TPC_TX_N_CHAIN]; 4987 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 4988 char buff[WMI_TPC_BUF_SIZE]; 4989 4990 flags = __le32_to_cpu(ev->flags); 4991 4992 switch (type) { 4993 case WMI_TPC_TABLE_TYPE_CDD: 4994 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) { 4995 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n"); 4996 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; 4997 return; 4998 } 4999 break; 5000 case WMI_TPC_TABLE_TYPE_STBC: 5001 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) { 5002 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n"); 5003 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; 5004 return; 5005 } 5006 break; 5007 case WMI_TPC_TABLE_TYPE_TXBF: 5008 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) { 5009 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n"); 5010 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; 5011 return; 5012 } 5013 break; 5014 default: 5015 ath10k_dbg(ar, ATH10K_DBG_WMI, 5016 "invalid table type in wmi tpc event: %d\n", type); 5017 return; 5018 } 5019 5020 pream_idx = 0; 5021 for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) { 5022 memset(tpc_value, 0, sizeof(tpc_value)); 5023 memset(buff, 0, sizeof(buff)); 5024 if (i == pream_table[pream_idx]) 5025 pream_idx++; 5026 5027 for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) { 5028 if (j >= __le32_to_cpu(ev->num_tx_chain)) 5029 break; 5030 5031 tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1, 5032 rate_code[i], 5033 type, pream_idx); 5034 snprintf(buff, sizeof(buff), "%8d ", tpc[j]); 5035 strlcat(tpc_value, buff, sizeof(tpc_value)); 5036 } 5037 tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx; 5038 tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i]; 5039 memcpy(tpc_stats->tpc_table_final[type].tpc_value[i], 5040 tpc_value, sizeof(tpc_value)); 5041 } 5042 } 5043 5044 void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb) 5045 { 5046 u32 num_tx_chain; 5047 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 5048 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX]; 5049 struct wmi_pdev_tpc_final_table_event *ev; 5050 struct ath10k_tpc_stats_final *tpc_stats; 5051 5052 ev = (struct wmi_pdev_tpc_final_table_event *)skb->data; 5053 5054 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC); 5055 if (!tpc_stats) 5056 return; 5057 5058 num_tx_chain = __le32_to_cpu(ev->num_tx_chain); 5059 5060 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table, 5061 num_tx_chain); 5062 5063 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq); 5064 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode); 5065 tpc_stats->ctl = __le32_to_cpu(ev->ctl); 5066 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain); 5067 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain); 5068 tpc_stats->twice_antenna_reduction = 5069 __le32_to_cpu(ev->twice_antenna_reduction); 5070 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit); 5071 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power); 5072 tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain); 5073 tpc_stats->rate_max = __le32_to_cpu(ev->rate_max); 5074 5075 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats, 5076 rate_code, pream_table, 5077 WMI_TPC_TABLE_TYPE_CDD); 5078 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats, 5079 rate_code, pream_table, 5080 WMI_TPC_TABLE_TYPE_STBC); 5081 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats, 5082 rate_code, pream_table, 5083 WMI_TPC_TABLE_TYPE_TXBF); 5084 5085 ath10k_debug_tpc_stats_final_process(ar, tpc_stats); 5086 5087 ath10k_dbg(ar, ATH10K_DBG_WMI, 5088 "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n", 5089 __le32_to_cpu(ev->chan_freq), 5090 __le32_to_cpu(ev->phy_mode), 5091 __le32_to_cpu(ev->ctl), 5092 __le32_to_cpu(ev->reg_domain), 5093 a_sle32_to_cpu(ev->twice_antenna_gain), 5094 __le32_to_cpu(ev->twice_antenna_reduction), 5095 __le32_to_cpu(ev->power_limit), 5096 __le32_to_cpu(ev->twice_max_rd_power) / 2, 5097 __le32_to_cpu(ev->num_tx_chain), 5098 __le32_to_cpu(ev->rate_max)); 5099 } 5100 5101 static void 5102 ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb) 5103 { 5104 struct wmi_tdls_peer_event *ev; 5105 struct ath10k_peer *peer; 5106 struct ath10k_vif *arvif; 5107 int vdev_id; 5108 int peer_status; 5109 int peer_reason; 5110 u8 reason; 5111 5112 if (skb->len < sizeof(*ev)) { 5113 ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n", 5114 skb->len); 5115 return; 5116 } 5117 5118 ev = (struct wmi_tdls_peer_event *)skb->data; 5119 vdev_id = __le32_to_cpu(ev->vdev_id); 5120 peer_status = __le32_to_cpu(ev->peer_status); 5121 peer_reason = __le32_to_cpu(ev->peer_reason); 5122 5123 spin_lock_bh(&ar->data_lock); 5124 peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr); 5125 spin_unlock_bh(&ar->data_lock); 5126 5127 if (!peer) { 5128 ath10k_warn(ar, "failed to find peer entry for %pM\n", 5129 ev->peer_macaddr.addr); 5130 return; 5131 } 5132 5133 switch (peer_status) { 5134 case WMI_TDLS_SHOULD_TEARDOWN: 5135 switch (peer_reason) { 5136 case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT: 5137 case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE: 5138 case WMI_TDLS_TEARDOWN_REASON_RSSI: 5139 reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE; 5140 break; 5141 default: 5142 reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED; 5143 break; 5144 } 5145 5146 arvif = ath10k_get_arvif(ar, vdev_id); 5147 if (!arvif) { 5148 ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n", 5149 vdev_id); 5150 return; 5151 } 5152 5153 ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr, 5154 NL80211_TDLS_TEARDOWN, reason, 5155 GFP_ATOMIC); 5156 5157 ath10k_dbg(ar, ATH10K_DBG_WMI, 5158 "received tdls teardown event for peer %pM reason %u\n", 5159 ev->peer_macaddr.addr, peer_reason); 5160 break; 5161 default: 5162 ath10k_dbg(ar, ATH10K_DBG_WMI, 5163 "received unknown tdls peer event %u\n", 5164 peer_status); 5165 break; 5166 } 5167 } 5168 5169 static void 5170 ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k *ar, struct sk_buff *skb) 5171 { 5172 struct wmi_peer_sta_ps_state_chg_event *ev; 5173 struct ieee80211_sta *sta; 5174 struct ath10k_sta *arsta; 5175 u8 peer_addr[ETH_ALEN]; 5176 5177 lockdep_assert_held(&ar->data_lock); 5178 5179 ev = (struct wmi_peer_sta_ps_state_chg_event *)skb->data; 5180 ether_addr_copy(peer_addr, ev->peer_macaddr.addr); 5181 5182 rcu_read_lock(); 5183 5184 sta = ieee80211_find_sta_by_ifaddr(ar->hw, peer_addr, NULL); 5185 5186 if (!sta) { 5187 ath10k_warn(ar, "failed to find station entry %pM\n", 5188 peer_addr); 5189 goto exit; 5190 } 5191 5192 arsta = (struct ath10k_sta *)sta->drv_priv; 5193 arsta->peer_ps_state = __le32_to_cpu(ev->peer_ps_state); 5194 5195 exit: 5196 rcu_read_unlock(); 5197 } 5198 5199 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb) 5200 { 5201 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); 5202 } 5203 5204 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb) 5205 { 5206 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); 5207 } 5208 5209 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb) 5210 { 5211 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); 5212 } 5213 5214 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb) 5215 { 5216 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); 5217 } 5218 5219 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb) 5220 { 5221 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); 5222 } 5223 5224 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, 5225 struct sk_buff *skb) 5226 { 5227 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); 5228 } 5229 5230 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb) 5231 { 5232 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); 5233 } 5234 5235 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb) 5236 { 5237 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); 5238 } 5239 5240 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb) 5241 { 5242 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); 5243 } 5244 5245 static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id, 5246 u32 num_units, u32 unit_len) 5247 { 5248 dma_addr_t paddr; 5249 u32 pool_size; 5250 int idx = ar->wmi.num_mem_chunks; 5251 void *vaddr; 5252 5253 pool_size = num_units * round_up(unit_len, 4); 5254 vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL); 5255 5256 if (!vaddr) 5257 return -ENOMEM; 5258 5259 ar->wmi.mem_chunks[idx].vaddr = vaddr; 5260 ar->wmi.mem_chunks[idx].paddr = paddr; 5261 ar->wmi.mem_chunks[idx].len = pool_size; 5262 ar->wmi.mem_chunks[idx].req_id = req_id; 5263 ar->wmi.num_mem_chunks++; 5264 5265 return num_units; 5266 } 5267 5268 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id, 5269 u32 num_units, u32 unit_len) 5270 { 5271 int ret; 5272 5273 while (num_units) { 5274 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len); 5275 if (ret < 0) 5276 return ret; 5277 5278 num_units -= ret; 5279 } 5280 5281 return 0; 5282 } 5283 5284 static bool 5285 ath10k_wmi_is_host_mem_allocated(struct ath10k *ar, 5286 const struct wlan_host_mem_req **mem_reqs, 5287 u32 num_mem_reqs) 5288 { 5289 u32 req_id, num_units, unit_size, num_unit_info; 5290 u32 pool_size; 5291 int i, j; 5292 bool found; 5293 5294 if (ar->wmi.num_mem_chunks != num_mem_reqs) 5295 return false; 5296 5297 for (i = 0; i < num_mem_reqs; ++i) { 5298 req_id = __le32_to_cpu(mem_reqs[i]->req_id); 5299 num_units = __le32_to_cpu(mem_reqs[i]->num_units); 5300 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size); 5301 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info); 5302 5303 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { 5304 if (ar->num_active_peers) 5305 num_units = ar->num_active_peers + 1; 5306 else 5307 num_units = ar->max_num_peers + 1; 5308 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { 5309 num_units = ar->max_num_peers + 1; 5310 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { 5311 num_units = ar->max_num_vdevs + 1; 5312 } 5313 5314 found = false; 5315 for (j = 0; j < ar->wmi.num_mem_chunks; j++) { 5316 if (ar->wmi.mem_chunks[j].req_id == req_id) { 5317 pool_size = num_units * round_up(unit_size, 4); 5318 if (ar->wmi.mem_chunks[j].len == pool_size) { 5319 found = true; 5320 break; 5321 } 5322 } 5323 } 5324 if (!found) 5325 return false; 5326 } 5327 5328 return true; 5329 } 5330 5331 static int 5332 ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, 5333 struct wmi_svc_rdy_ev_arg *arg) 5334 { 5335 struct wmi_service_ready_event *ev; 5336 size_t i, n; 5337 5338 if (skb->len < sizeof(*ev)) 5339 return -EPROTO; 5340 5341 ev = (void *)skb->data; 5342 skb_pull(skb, sizeof(*ev)); 5343 arg->min_tx_power = ev->hw_min_tx_power; 5344 arg->max_tx_power = ev->hw_max_tx_power; 5345 arg->ht_cap = ev->ht_cap_info; 5346 arg->vht_cap = ev->vht_cap_info; 5347 arg->sw_ver0 = ev->sw_version; 5348 arg->sw_ver1 = ev->sw_version_1; 5349 arg->phy_capab = ev->phy_capability; 5350 arg->num_rf_chains = ev->num_rf_chains; 5351 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; 5352 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan; 5353 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan; 5354 arg->num_mem_reqs = ev->num_mem_reqs; 5355 arg->service_map = ev->wmi_service_bitmap; 5356 arg->service_map_len = sizeof(ev->wmi_service_bitmap); 5357 5358 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), 5359 ARRAY_SIZE(arg->mem_reqs)); 5360 for (i = 0; i < n; i++) 5361 arg->mem_reqs[i] = &ev->mem_reqs[i]; 5362 5363 if (skb->len < 5364 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) 5365 return -EPROTO; 5366 5367 return 0; 5368 } 5369 5370 static int 5371 ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, 5372 struct wmi_svc_rdy_ev_arg *arg) 5373 { 5374 struct wmi_10x_service_ready_event *ev; 5375 int i, n; 5376 5377 if (skb->len < sizeof(*ev)) 5378 return -EPROTO; 5379 5380 ev = (void *)skb->data; 5381 skb_pull(skb, sizeof(*ev)); 5382 arg->min_tx_power = ev->hw_min_tx_power; 5383 arg->max_tx_power = ev->hw_max_tx_power; 5384 arg->ht_cap = ev->ht_cap_info; 5385 arg->vht_cap = ev->vht_cap_info; 5386 arg->sw_ver0 = ev->sw_version; 5387 arg->phy_capab = ev->phy_capability; 5388 arg->num_rf_chains = ev->num_rf_chains; 5389 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; 5390 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan; 5391 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan; 5392 arg->num_mem_reqs = ev->num_mem_reqs; 5393 arg->service_map = ev->wmi_service_bitmap; 5394 arg->service_map_len = sizeof(ev->wmi_service_bitmap); 5395 5396 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), 5397 ARRAY_SIZE(arg->mem_reqs)); 5398 for (i = 0; i < n; i++) 5399 arg->mem_reqs[i] = &ev->mem_reqs[i]; 5400 5401 if (skb->len < 5402 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) 5403 return -EPROTO; 5404 5405 return 0; 5406 } 5407 5408 static void ath10k_wmi_event_service_ready_work(struct work_struct *work) 5409 { 5410 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work); 5411 struct sk_buff *skb = ar->svc_rdy_skb; 5412 struct wmi_svc_rdy_ev_arg arg = {}; 5413 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; 5414 int ret; 5415 bool allocated; 5416 5417 if (!skb) { 5418 ath10k_warn(ar, "invalid service ready event skb\n"); 5419 return; 5420 } 5421 5422 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg); 5423 if (ret) { 5424 ath10k_warn(ar, "failed to parse service ready: %d\n", ret); 5425 return; 5426 } 5427 5428 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map, 5429 arg.service_map_len); 5430 5431 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power); 5432 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power); 5433 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap); 5434 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap); 5435 ar->fw_version_major = 5436 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24; 5437 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff); 5438 ar->fw_version_release = 5439 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16; 5440 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff); 5441 ar->phy_capability = __le32_to_cpu(arg.phy_capab); 5442 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains); 5443 ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd); 5444 ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan); 5445 ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan); 5446 5447 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ", 5448 arg.service_map, arg.service_map_len); 5449 5450 if (ar->num_rf_chains > ar->max_spatial_stream) { 5451 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n", 5452 ar->num_rf_chains, ar->max_spatial_stream); 5453 ar->num_rf_chains = ar->max_spatial_stream; 5454 } 5455 5456 if (!ar->cfg_tx_chainmask) { 5457 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1; 5458 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1; 5459 } 5460 5461 if (strlen(ar->hw->wiphy->fw_version) == 0) { 5462 snprintf(ar->hw->wiphy->fw_version, 5463 sizeof(ar->hw->wiphy->fw_version), 5464 "%u.%u.%u.%u", 5465 ar->fw_version_major, 5466 ar->fw_version_minor, 5467 ar->fw_version_release, 5468 ar->fw_version_build); 5469 } 5470 5471 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs); 5472 if (num_mem_reqs > WMI_MAX_MEM_REQS) { 5473 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n", 5474 num_mem_reqs); 5475 return; 5476 } 5477 5478 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) { 5479 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 5480 ar->running_fw->fw_file.fw_features)) 5481 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC + 5482 ar->max_num_vdevs; 5483 else 5484 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS + 5485 ar->max_num_vdevs; 5486 5487 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX + 5488 ar->max_num_vdevs; 5489 ar->num_tids = ar->num_active_peers * 2; 5490 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX; 5491 } 5492 5493 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE 5494 * and WMI_SERVICE_IRAM_TIDS, etc. 5495 */ 5496 5497 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs, 5498 num_mem_reqs); 5499 if (allocated) 5500 goto skip_mem_alloc; 5501 5502 /* Either this event is received during boot time or there is a change 5503 * in memory requirement from firmware when compared to last request. 5504 * Free any old memory and do a fresh allocation based on the current 5505 * memory requirement. 5506 */ 5507 ath10k_wmi_free_host_mem(ar); 5508 5509 for (i = 0; i < num_mem_reqs; ++i) { 5510 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id); 5511 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units); 5512 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size); 5513 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info); 5514 5515 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { 5516 if (ar->num_active_peers) 5517 num_units = ar->num_active_peers + 1; 5518 else 5519 num_units = ar->max_num_peers + 1; 5520 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { 5521 /* number of units to allocate is number of 5522 * peers, 1 extra for self peer on target 5523 * this needs to be tied, host and target 5524 * can get out of sync 5525 */ 5526 num_units = ar->max_num_peers + 1; 5527 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { 5528 num_units = ar->max_num_vdevs + 1; 5529 } 5530 5531 ath10k_dbg(ar, ATH10K_DBG_WMI, 5532 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n", 5533 req_id, 5534 __le32_to_cpu(arg.mem_reqs[i]->num_units), 5535 num_unit_info, 5536 unit_size, 5537 num_units); 5538 5539 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units, 5540 unit_size); 5541 if (ret) 5542 return; 5543 } 5544 5545 skip_mem_alloc: 5546 ath10k_dbg(ar, ATH10K_DBG_WMI, 5547 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n", 5548 __le32_to_cpu(arg.min_tx_power), 5549 __le32_to_cpu(arg.max_tx_power), 5550 __le32_to_cpu(arg.ht_cap), 5551 __le32_to_cpu(arg.vht_cap), 5552 __le32_to_cpu(arg.sw_ver0), 5553 __le32_to_cpu(arg.sw_ver1), 5554 __le32_to_cpu(arg.fw_build), 5555 __le32_to_cpu(arg.phy_capab), 5556 __le32_to_cpu(arg.num_rf_chains), 5557 __le32_to_cpu(arg.eeprom_rd), 5558 __le32_to_cpu(arg.num_mem_reqs)); 5559 5560 dev_kfree_skb(skb); 5561 ar->svc_rdy_skb = NULL; 5562 complete(&ar->wmi.service_ready); 5563 } 5564 5565 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb) 5566 { 5567 ar->svc_rdy_skb = skb; 5568 queue_work(ar->workqueue_aux, &ar->svc_rdy_work); 5569 } 5570 5571 static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb, 5572 struct wmi_rdy_ev_arg *arg) 5573 { 5574 struct wmi_ready_event *ev = (void *)skb->data; 5575 5576 if (skb->len < sizeof(*ev)) 5577 return -EPROTO; 5578 5579 skb_pull(skb, sizeof(*ev)); 5580 arg->sw_version = ev->sw_version; 5581 arg->abi_version = ev->abi_version; 5582 arg->status = ev->status; 5583 arg->mac_addr = ev->mac_addr.addr; 5584 5585 return 0; 5586 } 5587 5588 static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb, 5589 struct wmi_roam_ev_arg *arg) 5590 { 5591 struct wmi_roam_ev *ev = (void *)skb->data; 5592 5593 if (skb->len < sizeof(*ev)) 5594 return -EPROTO; 5595 5596 skb_pull(skb, sizeof(*ev)); 5597 arg->vdev_id = ev->vdev_id; 5598 arg->reason = ev->reason; 5599 5600 return 0; 5601 } 5602 5603 static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar, 5604 struct sk_buff *skb, 5605 struct wmi_echo_ev_arg *arg) 5606 { 5607 struct wmi_echo_event *ev = (void *)skb->data; 5608 5609 arg->value = ev->value; 5610 5611 return 0; 5612 } 5613 5614 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb) 5615 { 5616 struct wmi_rdy_ev_arg arg = {}; 5617 int ret; 5618 5619 ret = ath10k_wmi_pull_rdy(ar, skb, &arg); 5620 if (ret) { 5621 ath10k_warn(ar, "failed to parse ready event: %d\n", ret); 5622 return ret; 5623 } 5624 5625 ath10k_dbg(ar, ATH10K_DBG_WMI, 5626 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n", 5627 __le32_to_cpu(arg.sw_version), 5628 __le32_to_cpu(arg.abi_version), 5629 arg.mac_addr, 5630 __le32_to_cpu(arg.status)); 5631 5632 if (is_zero_ether_addr(ar->mac_addr)) 5633 ether_addr_copy(ar->mac_addr, arg.mac_addr); 5634 complete(&ar->wmi.unified_ready); 5635 return 0; 5636 } 5637 5638 void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb) 5639 { 5640 int ret; 5641 struct wmi_svc_avail_ev_arg arg = {}; 5642 5643 ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg); 5644 if (ret) { 5645 ath10k_warn(ar, "failed to parse service available event: %d\n", 5646 ret); 5647 } 5648 5649 ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map, 5650 __le32_to_cpu(arg.service_map_ext_len)); 5651 } 5652 5653 static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb) 5654 { 5655 const struct wmi_pdev_temperature_event *ev; 5656 5657 ev = (struct wmi_pdev_temperature_event *)skb->data; 5658 if (WARN_ON(skb->len < sizeof(*ev))) 5659 return -EPROTO; 5660 5661 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature)); 5662 return 0; 5663 } 5664 5665 static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar, 5666 struct sk_buff *skb) 5667 { 5668 struct wmi_pdev_bss_chan_info_event *ev; 5669 struct survey_info *survey; 5670 u64 busy, total, tx, rx, rx_bss; 5671 u32 freq, noise_floor; 5672 u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz; 5673 int idx; 5674 5675 ev = (struct wmi_pdev_bss_chan_info_event *)skb->data; 5676 if (WARN_ON(skb->len < sizeof(*ev))) 5677 return -EPROTO; 5678 5679 freq = __le32_to_cpu(ev->freq); 5680 noise_floor = __le32_to_cpu(ev->noise_floor); 5681 busy = __le64_to_cpu(ev->cycle_busy); 5682 total = __le64_to_cpu(ev->cycle_total); 5683 tx = __le64_to_cpu(ev->cycle_tx); 5684 rx = __le64_to_cpu(ev->cycle_rx); 5685 rx_bss = __le64_to_cpu(ev->cycle_rx_bss); 5686 5687 ath10k_dbg(ar, ATH10K_DBG_WMI, 5688 "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 5689 freq, noise_floor, busy, total, tx, rx, rx_bss); 5690 5691 spin_lock_bh(&ar->data_lock); 5692 idx = freq_to_idx(ar, freq); 5693 if (idx >= ARRAY_SIZE(ar->survey)) { 5694 ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 5695 freq, idx); 5696 goto exit; 5697 } 5698 5699 survey = &ar->survey[idx]; 5700 5701 survey->noise = noise_floor; 5702 survey->time = div_u64(total, cc_freq_hz); 5703 survey->time_busy = div_u64(busy, cc_freq_hz); 5704 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 5705 survey->time_tx = div_u64(tx, cc_freq_hz); 5706 survey->filled |= (SURVEY_INFO_NOISE_DBM | 5707 SURVEY_INFO_TIME | 5708 SURVEY_INFO_TIME_BUSY | 5709 SURVEY_INFO_TIME_RX | 5710 SURVEY_INFO_TIME_TX); 5711 exit: 5712 spin_unlock_bh(&ar->data_lock); 5713 complete(&ar->bss_survey_done); 5714 return 0; 5715 } 5716 5717 static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar) 5718 { 5719 if (ar->hw_params.hw_ops->set_coverage_class) { 5720 spin_lock_bh(&ar->data_lock); 5721 5722 /* This call only ensures that the modified coverage class 5723 * persists in case the firmware sets the registers back to 5724 * their default value. So calling it is only necessary if the 5725 * coverage class has a non-zero value. 5726 */ 5727 if (ar->fw_coverage.coverage_class) 5728 queue_work(ar->workqueue, &ar->set_coverage_class_work); 5729 5730 spin_unlock_bh(&ar->data_lock); 5731 } 5732 } 5733 5734 static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb) 5735 { 5736 struct wmi_cmd_hdr *cmd_hdr; 5737 enum wmi_event_id id; 5738 5739 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 5740 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 5741 5742 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 5743 goto out; 5744 5745 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 5746 5747 switch (id) { 5748 case WMI_MGMT_RX_EVENTID: 5749 ath10k_wmi_event_mgmt_rx(ar, skb); 5750 /* mgmt_rx() owns the skb now! */ 5751 return; 5752 case WMI_SCAN_EVENTID: 5753 ath10k_wmi_event_scan(ar, skb); 5754 ath10k_wmi_queue_set_coverage_class_work(ar); 5755 break; 5756 case WMI_CHAN_INFO_EVENTID: 5757 ath10k_wmi_event_chan_info(ar, skb); 5758 break; 5759 case WMI_ECHO_EVENTID: 5760 ath10k_wmi_event_echo(ar, skb); 5761 break; 5762 case WMI_DEBUG_MESG_EVENTID: 5763 ath10k_wmi_event_debug_mesg(ar, skb); 5764 ath10k_wmi_queue_set_coverage_class_work(ar); 5765 break; 5766 case WMI_UPDATE_STATS_EVENTID: 5767 ath10k_wmi_event_update_stats(ar, skb); 5768 break; 5769 case WMI_VDEV_START_RESP_EVENTID: 5770 ath10k_wmi_event_vdev_start_resp(ar, skb); 5771 ath10k_wmi_queue_set_coverage_class_work(ar); 5772 break; 5773 case WMI_VDEV_STOPPED_EVENTID: 5774 ath10k_wmi_event_vdev_stopped(ar, skb); 5775 ath10k_wmi_queue_set_coverage_class_work(ar); 5776 break; 5777 case WMI_PEER_STA_KICKOUT_EVENTID: 5778 ath10k_wmi_event_peer_sta_kickout(ar, skb); 5779 break; 5780 case WMI_HOST_SWBA_EVENTID: 5781 ath10k_wmi_event_host_swba(ar, skb); 5782 break; 5783 case WMI_TBTTOFFSET_UPDATE_EVENTID: 5784 ath10k_wmi_event_tbttoffset_update(ar, skb); 5785 break; 5786 case WMI_PHYERR_EVENTID: 5787 ath10k_wmi_event_phyerr(ar, skb); 5788 break; 5789 case WMI_ROAM_EVENTID: 5790 ath10k_wmi_event_roam(ar, skb); 5791 ath10k_wmi_queue_set_coverage_class_work(ar); 5792 break; 5793 case WMI_PROFILE_MATCH: 5794 ath10k_wmi_event_profile_match(ar, skb); 5795 break; 5796 case WMI_DEBUG_PRINT_EVENTID: 5797 ath10k_wmi_event_debug_print(ar, skb); 5798 ath10k_wmi_queue_set_coverage_class_work(ar); 5799 break; 5800 case WMI_PDEV_QVIT_EVENTID: 5801 ath10k_wmi_event_pdev_qvit(ar, skb); 5802 break; 5803 case WMI_WLAN_PROFILE_DATA_EVENTID: 5804 ath10k_wmi_event_wlan_profile_data(ar, skb); 5805 break; 5806 case WMI_RTT_MEASUREMENT_REPORT_EVENTID: 5807 ath10k_wmi_event_rtt_measurement_report(ar, skb); 5808 break; 5809 case WMI_TSF_MEASUREMENT_REPORT_EVENTID: 5810 ath10k_wmi_event_tsf_measurement_report(ar, skb); 5811 break; 5812 case WMI_RTT_ERROR_REPORT_EVENTID: 5813 ath10k_wmi_event_rtt_error_report(ar, skb); 5814 break; 5815 case WMI_WOW_WAKEUP_HOST_EVENTID: 5816 ath10k_wmi_event_wow_wakeup_host(ar, skb); 5817 break; 5818 case WMI_DCS_INTERFERENCE_EVENTID: 5819 ath10k_wmi_event_dcs_interference(ar, skb); 5820 break; 5821 case WMI_PDEV_TPC_CONFIG_EVENTID: 5822 ath10k_wmi_event_pdev_tpc_config(ar, skb); 5823 break; 5824 case WMI_PDEV_FTM_INTG_EVENTID: 5825 ath10k_wmi_event_pdev_ftm_intg(ar, skb); 5826 break; 5827 case WMI_GTK_OFFLOAD_STATUS_EVENTID: 5828 ath10k_wmi_event_gtk_offload_status(ar, skb); 5829 break; 5830 case WMI_GTK_REKEY_FAIL_EVENTID: 5831 ath10k_wmi_event_gtk_rekey_fail(ar, skb); 5832 break; 5833 case WMI_TX_DELBA_COMPLETE_EVENTID: 5834 ath10k_wmi_event_delba_complete(ar, skb); 5835 break; 5836 case WMI_TX_ADDBA_COMPLETE_EVENTID: 5837 ath10k_wmi_event_addba_complete(ar, skb); 5838 break; 5839 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 5840 ath10k_wmi_event_vdev_install_key_complete(ar, skb); 5841 break; 5842 case WMI_SERVICE_READY_EVENTID: 5843 ath10k_wmi_event_service_ready(ar, skb); 5844 return; 5845 case WMI_READY_EVENTID: 5846 ath10k_wmi_event_ready(ar, skb); 5847 ath10k_wmi_queue_set_coverage_class_work(ar); 5848 break; 5849 case WMI_SERVICE_AVAILABLE_EVENTID: 5850 ath10k_wmi_event_service_available(ar, skb); 5851 break; 5852 default: 5853 ath10k_warn(ar, "Unknown eventid: %d\n", id); 5854 break; 5855 } 5856 5857 out: 5858 dev_kfree_skb(skb); 5859 } 5860 5861 static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb) 5862 { 5863 struct wmi_cmd_hdr *cmd_hdr; 5864 enum wmi_10x_event_id id; 5865 bool consumed; 5866 5867 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 5868 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 5869 5870 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 5871 goto out; 5872 5873 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 5874 5875 consumed = ath10k_tm_event_wmi(ar, id, skb); 5876 5877 /* Ready event must be handled normally also in UTF mode so that we 5878 * know the UTF firmware has booted, others we are just bypass WMI 5879 * events to testmode. 5880 */ 5881 if (consumed && id != WMI_10X_READY_EVENTID) { 5882 ath10k_dbg(ar, ATH10K_DBG_WMI, 5883 "wmi testmode consumed 0x%x\n", id); 5884 goto out; 5885 } 5886 5887 switch (id) { 5888 case WMI_10X_MGMT_RX_EVENTID: 5889 ath10k_wmi_event_mgmt_rx(ar, skb); 5890 /* mgmt_rx() owns the skb now! */ 5891 return; 5892 case WMI_10X_SCAN_EVENTID: 5893 ath10k_wmi_event_scan(ar, skb); 5894 ath10k_wmi_queue_set_coverage_class_work(ar); 5895 break; 5896 case WMI_10X_CHAN_INFO_EVENTID: 5897 ath10k_wmi_event_chan_info(ar, skb); 5898 break; 5899 case WMI_10X_ECHO_EVENTID: 5900 ath10k_wmi_event_echo(ar, skb); 5901 break; 5902 case WMI_10X_DEBUG_MESG_EVENTID: 5903 ath10k_wmi_event_debug_mesg(ar, skb); 5904 ath10k_wmi_queue_set_coverage_class_work(ar); 5905 break; 5906 case WMI_10X_UPDATE_STATS_EVENTID: 5907 ath10k_wmi_event_update_stats(ar, skb); 5908 break; 5909 case WMI_10X_VDEV_START_RESP_EVENTID: 5910 ath10k_wmi_event_vdev_start_resp(ar, skb); 5911 ath10k_wmi_queue_set_coverage_class_work(ar); 5912 break; 5913 case WMI_10X_VDEV_STOPPED_EVENTID: 5914 ath10k_wmi_event_vdev_stopped(ar, skb); 5915 ath10k_wmi_queue_set_coverage_class_work(ar); 5916 break; 5917 case WMI_10X_PEER_STA_KICKOUT_EVENTID: 5918 ath10k_wmi_event_peer_sta_kickout(ar, skb); 5919 break; 5920 case WMI_10X_HOST_SWBA_EVENTID: 5921 ath10k_wmi_event_host_swba(ar, skb); 5922 break; 5923 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID: 5924 ath10k_wmi_event_tbttoffset_update(ar, skb); 5925 break; 5926 case WMI_10X_PHYERR_EVENTID: 5927 ath10k_wmi_event_phyerr(ar, skb); 5928 break; 5929 case WMI_10X_ROAM_EVENTID: 5930 ath10k_wmi_event_roam(ar, skb); 5931 ath10k_wmi_queue_set_coverage_class_work(ar); 5932 break; 5933 case WMI_10X_PROFILE_MATCH: 5934 ath10k_wmi_event_profile_match(ar, skb); 5935 break; 5936 case WMI_10X_DEBUG_PRINT_EVENTID: 5937 ath10k_wmi_event_debug_print(ar, skb); 5938 ath10k_wmi_queue_set_coverage_class_work(ar); 5939 break; 5940 case WMI_10X_PDEV_QVIT_EVENTID: 5941 ath10k_wmi_event_pdev_qvit(ar, skb); 5942 break; 5943 case WMI_10X_WLAN_PROFILE_DATA_EVENTID: 5944 ath10k_wmi_event_wlan_profile_data(ar, skb); 5945 break; 5946 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID: 5947 ath10k_wmi_event_rtt_measurement_report(ar, skb); 5948 break; 5949 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID: 5950 ath10k_wmi_event_tsf_measurement_report(ar, skb); 5951 break; 5952 case WMI_10X_RTT_ERROR_REPORT_EVENTID: 5953 ath10k_wmi_event_rtt_error_report(ar, skb); 5954 break; 5955 case WMI_10X_WOW_WAKEUP_HOST_EVENTID: 5956 ath10k_wmi_event_wow_wakeup_host(ar, skb); 5957 break; 5958 case WMI_10X_DCS_INTERFERENCE_EVENTID: 5959 ath10k_wmi_event_dcs_interference(ar, skb); 5960 break; 5961 case WMI_10X_PDEV_TPC_CONFIG_EVENTID: 5962 ath10k_wmi_event_pdev_tpc_config(ar, skb); 5963 break; 5964 case WMI_10X_INST_RSSI_STATS_EVENTID: 5965 ath10k_wmi_event_inst_rssi_stats(ar, skb); 5966 break; 5967 case WMI_10X_VDEV_STANDBY_REQ_EVENTID: 5968 ath10k_wmi_event_vdev_standby_req(ar, skb); 5969 break; 5970 case WMI_10X_VDEV_RESUME_REQ_EVENTID: 5971 ath10k_wmi_event_vdev_resume_req(ar, skb); 5972 break; 5973 case WMI_10X_SERVICE_READY_EVENTID: 5974 ath10k_wmi_event_service_ready(ar, skb); 5975 return; 5976 case WMI_10X_READY_EVENTID: 5977 ath10k_wmi_event_ready(ar, skb); 5978 ath10k_wmi_queue_set_coverage_class_work(ar); 5979 break; 5980 case WMI_10X_PDEV_UTF_EVENTID: 5981 /* ignore utf events */ 5982 break; 5983 default: 5984 ath10k_warn(ar, "Unknown eventid: %d\n", id); 5985 break; 5986 } 5987 5988 out: 5989 dev_kfree_skb(skb); 5990 } 5991 5992 static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb) 5993 { 5994 struct wmi_cmd_hdr *cmd_hdr; 5995 enum wmi_10_2_event_id id; 5996 bool consumed; 5997 5998 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 5999 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 6000 6001 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 6002 goto out; 6003 6004 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 6005 6006 consumed = ath10k_tm_event_wmi(ar, id, skb); 6007 6008 /* Ready event must be handled normally also in UTF mode so that we 6009 * know the UTF firmware has booted, others we are just bypass WMI 6010 * events to testmode. 6011 */ 6012 if (consumed && id != WMI_10_2_READY_EVENTID) { 6013 ath10k_dbg(ar, ATH10K_DBG_WMI, 6014 "wmi testmode consumed 0x%x\n", id); 6015 goto out; 6016 } 6017 6018 switch (id) { 6019 case WMI_10_2_MGMT_RX_EVENTID: 6020 ath10k_wmi_event_mgmt_rx(ar, skb); 6021 /* mgmt_rx() owns the skb now! */ 6022 return; 6023 case WMI_10_2_SCAN_EVENTID: 6024 ath10k_wmi_event_scan(ar, skb); 6025 ath10k_wmi_queue_set_coverage_class_work(ar); 6026 break; 6027 case WMI_10_2_CHAN_INFO_EVENTID: 6028 ath10k_wmi_event_chan_info(ar, skb); 6029 break; 6030 case WMI_10_2_ECHO_EVENTID: 6031 ath10k_wmi_event_echo(ar, skb); 6032 break; 6033 case WMI_10_2_DEBUG_MESG_EVENTID: 6034 ath10k_wmi_event_debug_mesg(ar, skb); 6035 ath10k_wmi_queue_set_coverage_class_work(ar); 6036 break; 6037 case WMI_10_2_UPDATE_STATS_EVENTID: 6038 ath10k_wmi_event_update_stats(ar, skb); 6039 break; 6040 case WMI_10_2_VDEV_START_RESP_EVENTID: 6041 ath10k_wmi_event_vdev_start_resp(ar, skb); 6042 ath10k_wmi_queue_set_coverage_class_work(ar); 6043 break; 6044 case WMI_10_2_VDEV_STOPPED_EVENTID: 6045 ath10k_wmi_event_vdev_stopped(ar, skb); 6046 ath10k_wmi_queue_set_coverage_class_work(ar); 6047 break; 6048 case WMI_10_2_PEER_STA_KICKOUT_EVENTID: 6049 ath10k_wmi_event_peer_sta_kickout(ar, skb); 6050 break; 6051 case WMI_10_2_HOST_SWBA_EVENTID: 6052 ath10k_wmi_event_host_swba(ar, skb); 6053 break; 6054 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID: 6055 ath10k_wmi_event_tbttoffset_update(ar, skb); 6056 break; 6057 case WMI_10_2_PHYERR_EVENTID: 6058 ath10k_wmi_event_phyerr(ar, skb); 6059 break; 6060 case WMI_10_2_ROAM_EVENTID: 6061 ath10k_wmi_event_roam(ar, skb); 6062 ath10k_wmi_queue_set_coverage_class_work(ar); 6063 break; 6064 case WMI_10_2_PROFILE_MATCH: 6065 ath10k_wmi_event_profile_match(ar, skb); 6066 break; 6067 case WMI_10_2_DEBUG_PRINT_EVENTID: 6068 ath10k_wmi_event_debug_print(ar, skb); 6069 ath10k_wmi_queue_set_coverage_class_work(ar); 6070 break; 6071 case WMI_10_2_PDEV_QVIT_EVENTID: 6072 ath10k_wmi_event_pdev_qvit(ar, skb); 6073 break; 6074 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID: 6075 ath10k_wmi_event_wlan_profile_data(ar, skb); 6076 break; 6077 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID: 6078 ath10k_wmi_event_rtt_measurement_report(ar, skb); 6079 break; 6080 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID: 6081 ath10k_wmi_event_tsf_measurement_report(ar, skb); 6082 break; 6083 case WMI_10_2_RTT_ERROR_REPORT_EVENTID: 6084 ath10k_wmi_event_rtt_error_report(ar, skb); 6085 break; 6086 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID: 6087 ath10k_wmi_event_wow_wakeup_host(ar, skb); 6088 break; 6089 case WMI_10_2_DCS_INTERFERENCE_EVENTID: 6090 ath10k_wmi_event_dcs_interference(ar, skb); 6091 break; 6092 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID: 6093 ath10k_wmi_event_pdev_tpc_config(ar, skb); 6094 break; 6095 case WMI_10_2_INST_RSSI_STATS_EVENTID: 6096 ath10k_wmi_event_inst_rssi_stats(ar, skb); 6097 break; 6098 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID: 6099 ath10k_wmi_event_vdev_standby_req(ar, skb); 6100 ath10k_wmi_queue_set_coverage_class_work(ar); 6101 break; 6102 case WMI_10_2_VDEV_RESUME_REQ_EVENTID: 6103 ath10k_wmi_event_vdev_resume_req(ar, skb); 6104 ath10k_wmi_queue_set_coverage_class_work(ar); 6105 break; 6106 case WMI_10_2_SERVICE_READY_EVENTID: 6107 ath10k_wmi_event_service_ready(ar, skb); 6108 return; 6109 case WMI_10_2_READY_EVENTID: 6110 ath10k_wmi_event_ready(ar, skb); 6111 ath10k_wmi_queue_set_coverage_class_work(ar); 6112 break; 6113 case WMI_10_2_PDEV_TEMPERATURE_EVENTID: 6114 ath10k_wmi_event_temperature(ar, skb); 6115 break; 6116 case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID: 6117 ath10k_wmi_event_pdev_bss_chan_info(ar, skb); 6118 break; 6119 case WMI_10_2_RTT_KEEPALIVE_EVENTID: 6120 case WMI_10_2_GPIO_INPUT_EVENTID: 6121 case WMI_10_2_PEER_RATECODE_LIST_EVENTID: 6122 case WMI_10_2_GENERIC_BUFFER_EVENTID: 6123 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID: 6124 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID: 6125 case WMI_10_2_WDS_PEER_EVENTID: 6126 ath10k_dbg(ar, ATH10K_DBG_WMI, 6127 "received event id %d not implemented\n", id); 6128 break; 6129 case WMI_10_2_PEER_STA_PS_STATECHG_EVENTID: 6130 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb); 6131 break; 6132 default: 6133 ath10k_warn(ar, "Unknown eventid: %d\n", id); 6134 break; 6135 } 6136 6137 out: 6138 dev_kfree_skb(skb); 6139 } 6140 6141 static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb) 6142 { 6143 struct wmi_cmd_hdr *cmd_hdr; 6144 enum wmi_10_4_event_id id; 6145 bool consumed; 6146 6147 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 6148 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 6149 6150 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 6151 goto out; 6152 6153 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 6154 6155 consumed = ath10k_tm_event_wmi(ar, id, skb); 6156 6157 /* Ready event must be handled normally also in UTF mode so that we 6158 * know the UTF firmware has booted, others we are just bypass WMI 6159 * events to testmode. 6160 */ 6161 if (consumed && id != WMI_10_4_READY_EVENTID) { 6162 ath10k_dbg(ar, ATH10K_DBG_WMI, 6163 "wmi testmode consumed 0x%x\n", id); 6164 goto out; 6165 } 6166 6167 switch (id) { 6168 case WMI_10_4_MGMT_RX_EVENTID: 6169 ath10k_wmi_event_mgmt_rx(ar, skb); 6170 /* mgmt_rx() owns the skb now! */ 6171 return; 6172 case WMI_10_4_ECHO_EVENTID: 6173 ath10k_wmi_event_echo(ar, skb); 6174 break; 6175 case WMI_10_4_DEBUG_MESG_EVENTID: 6176 ath10k_wmi_event_debug_mesg(ar, skb); 6177 ath10k_wmi_queue_set_coverage_class_work(ar); 6178 break; 6179 case WMI_10_4_SERVICE_READY_EVENTID: 6180 ath10k_wmi_event_service_ready(ar, skb); 6181 return; 6182 case WMI_10_4_SCAN_EVENTID: 6183 ath10k_wmi_event_scan(ar, skb); 6184 ath10k_wmi_queue_set_coverage_class_work(ar); 6185 break; 6186 case WMI_10_4_CHAN_INFO_EVENTID: 6187 ath10k_wmi_event_chan_info(ar, skb); 6188 break; 6189 case WMI_10_4_PHYERR_EVENTID: 6190 ath10k_wmi_event_phyerr(ar, skb); 6191 break; 6192 case WMI_10_4_READY_EVENTID: 6193 ath10k_wmi_event_ready(ar, skb); 6194 ath10k_wmi_queue_set_coverage_class_work(ar); 6195 break; 6196 case WMI_10_4_PEER_STA_KICKOUT_EVENTID: 6197 ath10k_wmi_event_peer_sta_kickout(ar, skb); 6198 break; 6199 case WMI_10_4_ROAM_EVENTID: 6200 ath10k_wmi_event_roam(ar, skb); 6201 ath10k_wmi_queue_set_coverage_class_work(ar); 6202 break; 6203 case WMI_10_4_HOST_SWBA_EVENTID: 6204 ath10k_wmi_event_host_swba(ar, skb); 6205 break; 6206 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID: 6207 ath10k_wmi_event_tbttoffset_update(ar, skb); 6208 break; 6209 case WMI_10_4_DEBUG_PRINT_EVENTID: 6210 ath10k_wmi_event_debug_print(ar, skb); 6211 ath10k_wmi_queue_set_coverage_class_work(ar); 6212 break; 6213 case WMI_10_4_VDEV_START_RESP_EVENTID: 6214 ath10k_wmi_event_vdev_start_resp(ar, skb); 6215 ath10k_wmi_queue_set_coverage_class_work(ar); 6216 break; 6217 case WMI_10_4_VDEV_STOPPED_EVENTID: 6218 ath10k_wmi_event_vdev_stopped(ar, skb); 6219 ath10k_wmi_queue_set_coverage_class_work(ar); 6220 break; 6221 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID: 6222 case WMI_10_4_PEER_RATECODE_LIST_EVENTID: 6223 case WMI_10_4_WDS_PEER_EVENTID: 6224 case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID: 6225 ath10k_dbg(ar, ATH10K_DBG_WMI, 6226 "received event id %d not implemented\n", id); 6227 break; 6228 case WMI_10_4_UPDATE_STATS_EVENTID: 6229 ath10k_wmi_event_update_stats(ar, skb); 6230 break; 6231 case WMI_10_4_PDEV_TEMPERATURE_EVENTID: 6232 ath10k_wmi_event_temperature(ar, skb); 6233 break; 6234 case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID: 6235 ath10k_wmi_event_pdev_bss_chan_info(ar, skb); 6236 break; 6237 case WMI_10_4_PDEV_TPC_CONFIG_EVENTID: 6238 ath10k_wmi_event_pdev_tpc_config(ar, skb); 6239 break; 6240 case WMI_10_4_TDLS_PEER_EVENTID: 6241 ath10k_wmi_handle_tdls_peer_event(ar, skb); 6242 break; 6243 case WMI_10_4_PDEV_TPC_TABLE_EVENTID: 6244 ath10k_wmi_event_tpc_final_table(ar, skb); 6245 break; 6246 case WMI_10_4_DFS_STATUS_CHECK_EVENTID: 6247 ath10k_wmi_event_dfs_status_check(ar, skb); 6248 break; 6249 case WMI_10_4_PEER_STA_PS_STATECHG_EVENTID: 6250 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb); 6251 break; 6252 default: 6253 ath10k_warn(ar, "Unknown eventid: %d\n", id); 6254 break; 6255 } 6256 6257 out: 6258 dev_kfree_skb(skb); 6259 } 6260 6261 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) 6262 { 6263 int ret; 6264 6265 ret = ath10k_wmi_rx(ar, skb); 6266 if (ret) 6267 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret); 6268 } 6269 6270 int ath10k_wmi_connect(struct ath10k *ar) 6271 { 6272 int status; 6273 struct ath10k_htc_svc_conn_req conn_req; 6274 struct ath10k_htc_svc_conn_resp conn_resp; 6275 6276 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map)); 6277 6278 memset(&conn_req, 0, sizeof(conn_req)); 6279 memset(&conn_resp, 0, sizeof(conn_resp)); 6280 6281 /* these fields are the same for all service endpoints */ 6282 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete; 6283 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx; 6284 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits; 6285 6286 /* connect to control service */ 6287 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL; 6288 6289 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp); 6290 if (status) { 6291 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n", 6292 status); 6293 return status; 6294 } 6295 6296 ar->wmi.eid = conn_resp.eid; 6297 return 0; 6298 } 6299 6300 static struct sk_buff * 6301 ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k *ar, 6302 const u8 macaddr[ETH_ALEN]) 6303 { 6304 struct wmi_pdev_set_base_macaddr_cmd *cmd; 6305 struct sk_buff *skb; 6306 6307 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 6308 if (!skb) 6309 return ERR_PTR(-ENOMEM); 6310 6311 cmd = (struct wmi_pdev_set_base_macaddr_cmd *)skb->data; 6312 ether_addr_copy(cmd->mac_addr.addr, macaddr); 6313 6314 ath10k_dbg(ar, ATH10K_DBG_WMI, 6315 "wmi pdev basemac %pM\n", macaddr); 6316 return skb; 6317 } 6318 6319 static struct sk_buff * 6320 ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, 6321 u16 ctl2g, u16 ctl5g, 6322 enum wmi_dfs_region dfs_reg) 6323 { 6324 struct wmi_pdev_set_regdomain_cmd *cmd; 6325 struct sk_buff *skb; 6326 6327 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 6328 if (!skb) 6329 return ERR_PTR(-ENOMEM); 6330 6331 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 6332 cmd->reg_domain = __cpu_to_le32(rd); 6333 cmd->reg_domain_2G = __cpu_to_le32(rd2g); 6334 cmd->reg_domain_5G = __cpu_to_le32(rd5g); 6335 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); 6336 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); 6337 6338 ath10k_dbg(ar, ATH10K_DBG_WMI, 6339 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", 6340 rd, rd2g, rd5g, ctl2g, ctl5g); 6341 return skb; 6342 } 6343 6344 static struct sk_buff * 6345 ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 6346 rd5g, u16 ctl2g, u16 ctl5g, 6347 enum wmi_dfs_region dfs_reg) 6348 { 6349 struct wmi_pdev_set_regdomain_cmd_10x *cmd; 6350 struct sk_buff *skb; 6351 6352 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 6353 if (!skb) 6354 return ERR_PTR(-ENOMEM); 6355 6356 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; 6357 cmd->reg_domain = __cpu_to_le32(rd); 6358 cmd->reg_domain_2G = __cpu_to_le32(rd2g); 6359 cmd->reg_domain_5G = __cpu_to_le32(rd5g); 6360 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); 6361 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); 6362 cmd->dfs_domain = __cpu_to_le32(dfs_reg); 6363 6364 ath10k_dbg(ar, ATH10K_DBG_WMI, 6365 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", 6366 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); 6367 return skb; 6368 } 6369 6370 static struct sk_buff * 6371 ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt) 6372 { 6373 struct wmi_pdev_suspend_cmd *cmd; 6374 struct sk_buff *skb; 6375 6376 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 6377 if (!skb) 6378 return ERR_PTR(-ENOMEM); 6379 6380 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 6381 cmd->suspend_opt = __cpu_to_le32(suspend_opt); 6382 6383 return skb; 6384 } 6385 6386 static struct sk_buff * 6387 ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar) 6388 { 6389 struct sk_buff *skb; 6390 6391 skb = ath10k_wmi_alloc_skb(ar, 0); 6392 if (!skb) 6393 return ERR_PTR(-ENOMEM); 6394 6395 return skb; 6396 } 6397 6398 static struct sk_buff * 6399 ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value) 6400 { 6401 struct wmi_pdev_set_param_cmd *cmd; 6402 struct sk_buff *skb; 6403 6404 if (id == WMI_PDEV_PARAM_UNSUPPORTED) { 6405 ath10k_warn(ar, "pdev param %d not supported by firmware\n", 6406 id); 6407 return ERR_PTR(-EOPNOTSUPP); 6408 } 6409 6410 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 6411 if (!skb) 6412 return ERR_PTR(-ENOMEM); 6413 6414 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 6415 cmd->param_id = __cpu_to_le32(id); 6416 cmd->param_value = __cpu_to_le32(value); 6417 6418 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", 6419 id, value); 6420 return skb; 6421 } 6422 6423 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, 6424 struct wmi_host_mem_chunks *chunks) 6425 { 6426 struct host_memory_chunk *chunk; 6427 int i; 6428 6429 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks); 6430 6431 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 6432 chunk = &chunks->items[i]; 6433 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); 6434 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len); 6435 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); 6436 6437 ath10k_dbg(ar, ATH10K_DBG_WMI, 6438 "wmi chunk %d len %d requested, addr 0x%llx\n", 6439 i, 6440 ar->wmi.mem_chunks[i].len, 6441 (unsigned long long)ar->wmi.mem_chunks[i].paddr); 6442 } 6443 } 6444 6445 static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar) 6446 { 6447 struct wmi_init_cmd *cmd; 6448 struct sk_buff *buf; 6449 struct wmi_resource_config config = {}; 6450 u32 len, val; 6451 6452 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS); 6453 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS); 6454 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS); 6455 6456 config.num_offload_reorder_bufs = 6457 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS); 6458 6459 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS); 6460 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS); 6461 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT); 6462 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK); 6463 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK); 6464 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 6465 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 6466 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 6467 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI); 6468 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); 6469 config.scan_max_pending_reqs = 6470 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS); 6471 6472 config.bmiss_offload_max_vdev = 6473 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV); 6474 6475 config.roam_offload_max_vdev = 6476 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV); 6477 6478 config.roam_offload_max_ap_profiles = 6479 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES); 6480 6481 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS); 6482 config.num_mcast_table_elems = 6483 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS); 6484 6485 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE); 6486 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE); 6487 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES); 6488 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE); 6489 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM); 6490 6491 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 6492 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 6493 6494 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG); 6495 6496 config.gtk_offload_max_vdev = 6497 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV); 6498 6499 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC); 6500 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES); 6501 6502 len = sizeof(*cmd) + 6503 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 6504 6505 buf = ath10k_wmi_alloc_skb(ar, len); 6506 if (!buf) 6507 return ERR_PTR(-ENOMEM); 6508 6509 cmd = (struct wmi_init_cmd *)buf->data; 6510 6511 memcpy(&cmd->resource_config, &config, sizeof(config)); 6512 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); 6513 6514 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); 6515 return buf; 6516 } 6517 6518 static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar) 6519 { 6520 struct wmi_init_cmd_10x *cmd; 6521 struct sk_buff *buf; 6522 struct wmi_resource_config_10x config = {}; 6523 u32 len, val; 6524 6525 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); 6526 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); 6527 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); 6528 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); 6529 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); 6530 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); 6531 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); 6532 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 6533 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 6534 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 6535 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); 6536 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); 6537 config.scan_max_pending_reqs = 6538 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); 6539 6540 config.bmiss_offload_max_vdev = 6541 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); 6542 6543 config.roam_offload_max_vdev = 6544 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); 6545 6546 config.roam_offload_max_ap_profiles = 6547 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); 6548 6549 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); 6550 config.num_mcast_table_elems = 6551 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); 6552 6553 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); 6554 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); 6555 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); 6556 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); 6557 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); 6558 6559 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 6560 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 6561 6562 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); 6563 6564 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); 6565 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); 6566 6567 len = sizeof(*cmd) + 6568 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 6569 6570 buf = ath10k_wmi_alloc_skb(ar, len); 6571 if (!buf) 6572 return ERR_PTR(-ENOMEM); 6573 6574 cmd = (struct wmi_init_cmd_10x *)buf->data; 6575 6576 memcpy(&cmd->resource_config, &config, sizeof(config)); 6577 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); 6578 6579 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); 6580 return buf; 6581 } 6582 6583 static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar) 6584 { 6585 struct wmi_init_cmd_10_2 *cmd; 6586 struct sk_buff *buf; 6587 struct wmi_resource_config_10x config = {}; 6588 u32 len, val, features; 6589 6590 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); 6591 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); 6592 6593 if (ath10k_peer_stats_enabled(ar)) { 6594 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS); 6595 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS); 6596 } else { 6597 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); 6598 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); 6599 } 6600 6601 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); 6602 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); 6603 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); 6604 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 6605 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 6606 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 6607 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); 6608 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); 6609 6610 config.scan_max_pending_reqs = 6611 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); 6612 6613 config.bmiss_offload_max_vdev = 6614 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); 6615 6616 config.roam_offload_max_vdev = 6617 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); 6618 6619 config.roam_offload_max_ap_profiles = 6620 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); 6621 6622 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); 6623 config.num_mcast_table_elems = 6624 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); 6625 6626 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); 6627 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); 6628 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); 6629 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE); 6630 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); 6631 6632 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 6633 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 6634 6635 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); 6636 6637 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); 6638 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); 6639 6640 len = sizeof(*cmd) + 6641 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 6642 6643 buf = ath10k_wmi_alloc_skb(ar, len); 6644 if (!buf) 6645 return ERR_PTR(-ENOMEM); 6646 6647 cmd = (struct wmi_init_cmd_10_2 *)buf->data; 6648 6649 features = WMI_10_2_RX_BATCH_MODE; 6650 6651 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) && 6652 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map)) 6653 features |= WMI_10_2_COEX_GPIO; 6654 6655 if (ath10k_peer_stats_enabled(ar)) 6656 features |= WMI_10_2_PEER_STATS; 6657 6658 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 6659 features |= WMI_10_2_BSS_CHAN_INFO; 6660 6661 cmd->resource_config.feature_mask = __cpu_to_le32(features); 6662 6663 memcpy(&cmd->resource_config.common, &config, sizeof(config)); 6664 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); 6665 6666 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); 6667 return buf; 6668 } 6669 6670 static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar) 6671 { 6672 struct wmi_init_cmd_10_4 *cmd; 6673 struct sk_buff *buf; 6674 struct wmi_resource_config_10_4 config = {}; 6675 u32 len; 6676 6677 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs); 6678 config.num_peers = __cpu_to_le32(ar->max_num_peers); 6679 config.num_active_peers = __cpu_to_le32(ar->num_active_peers); 6680 config.num_tids = __cpu_to_le32(ar->num_tids); 6681 6682 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS); 6683 config.num_offload_reorder_buffs = 6684 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS); 6685 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS); 6686 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT); 6687 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask); 6688 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask); 6689 6690 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); 6691 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); 6692 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); 6693 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI); 6694 6695 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); 6696 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS); 6697 config.bmiss_offload_max_vdev = 6698 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV); 6699 config.roam_offload_max_vdev = 6700 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV); 6701 config.roam_offload_max_ap_profiles = 6702 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES); 6703 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS); 6704 config.num_mcast_table_elems = 6705 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS); 6706 6707 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE); 6708 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE); 6709 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES); 6710 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE); 6711 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM); 6712 6713 config.rx_skip_defrag_timeout_dup_detection_check = 6714 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK); 6715 6716 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG); 6717 config.gtk_offload_max_vdev = 6718 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV); 6719 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx); 6720 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS); 6721 config.max_peer_ext_stats = 6722 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS); 6723 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP); 6724 6725 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE); 6726 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE); 6727 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE); 6728 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE); 6729 6730 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE); 6731 config.tt_support = 6732 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG); 6733 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG); 6734 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG); 6735 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG); 6736 6737 len = sizeof(*cmd) + 6738 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 6739 6740 buf = ath10k_wmi_alloc_skb(ar, len); 6741 if (!buf) 6742 return ERR_PTR(-ENOMEM); 6743 6744 cmd = (struct wmi_init_cmd_10_4 *)buf->data; 6745 memcpy(&cmd->resource_config, &config, sizeof(config)); 6746 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); 6747 6748 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n"); 6749 return buf; 6750 } 6751 6752 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg) 6753 { 6754 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN) 6755 return -EINVAL; 6756 if (arg->n_channels > ARRAY_SIZE(arg->channels)) 6757 return -EINVAL; 6758 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID) 6759 return -EINVAL; 6760 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID) 6761 return -EINVAL; 6762 6763 return 0; 6764 } 6765 6766 static size_t 6767 ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg) 6768 { 6769 int len = 0; 6770 6771 if (arg->ie_len) { 6772 len += sizeof(struct wmi_ie_data); 6773 len += roundup(arg->ie_len, 4); 6774 } 6775 6776 if (arg->n_channels) { 6777 len += sizeof(struct wmi_chan_list); 6778 len += sizeof(__le32) * arg->n_channels; 6779 } 6780 6781 if (arg->n_ssids) { 6782 len += sizeof(struct wmi_ssid_list); 6783 len += sizeof(struct wmi_ssid) * arg->n_ssids; 6784 } 6785 6786 if (arg->n_bssids) { 6787 len += sizeof(struct wmi_bssid_list); 6788 len += sizeof(struct wmi_mac_addr) * arg->n_bssids; 6789 } 6790 6791 return len; 6792 } 6793 6794 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, 6795 const struct wmi_start_scan_arg *arg) 6796 { 6797 u32 scan_id; 6798 u32 scan_req_id; 6799 6800 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX; 6801 scan_id |= arg->scan_id; 6802 6803 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; 6804 scan_req_id |= arg->scan_req_id; 6805 6806 cmn->scan_id = __cpu_to_le32(scan_id); 6807 cmn->scan_req_id = __cpu_to_le32(scan_req_id); 6808 cmn->vdev_id = __cpu_to_le32(arg->vdev_id); 6809 cmn->scan_priority = __cpu_to_le32(arg->scan_priority); 6810 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events); 6811 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active); 6812 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive); 6813 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time); 6814 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time); 6815 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time); 6816 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time); 6817 cmn->idle_time = __cpu_to_le32(arg->idle_time); 6818 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time); 6819 cmn->probe_delay = __cpu_to_le32(arg->probe_delay); 6820 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags); 6821 } 6822 6823 static void 6824 ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs, 6825 const struct wmi_start_scan_arg *arg) 6826 { 6827 struct wmi_ie_data *ie; 6828 struct wmi_chan_list *channels; 6829 struct wmi_ssid_list *ssids; 6830 struct wmi_bssid_list *bssids; 6831 void *ptr = tlvs->tlvs; 6832 int i; 6833 6834 if (arg->n_channels) { 6835 channels = ptr; 6836 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG); 6837 channels->num_chan = __cpu_to_le32(arg->n_channels); 6838 6839 for (i = 0; i < arg->n_channels; i++) 6840 channels->channel_list[i].freq = 6841 __cpu_to_le16(arg->channels[i]); 6842 6843 ptr += sizeof(*channels); 6844 ptr += sizeof(__le32) * arg->n_channels; 6845 } 6846 6847 if (arg->n_ssids) { 6848 ssids = ptr; 6849 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG); 6850 ssids->num_ssids = __cpu_to_le32(arg->n_ssids); 6851 6852 for (i = 0; i < arg->n_ssids; i++) { 6853 ssids->ssids[i].ssid_len = 6854 __cpu_to_le32(arg->ssids[i].len); 6855 memcpy(&ssids->ssids[i].ssid, 6856 arg->ssids[i].ssid, 6857 arg->ssids[i].len); 6858 } 6859 6860 ptr += sizeof(*ssids); 6861 ptr += sizeof(struct wmi_ssid) * arg->n_ssids; 6862 } 6863 6864 if (arg->n_bssids) { 6865 bssids = ptr; 6866 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG); 6867 bssids->num_bssid = __cpu_to_le32(arg->n_bssids); 6868 6869 for (i = 0; i < arg->n_bssids; i++) 6870 ether_addr_copy(bssids->bssid_list[i].addr, 6871 arg->bssids[i].bssid); 6872 6873 ptr += sizeof(*bssids); 6874 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids; 6875 } 6876 6877 if (arg->ie_len) { 6878 ie = ptr; 6879 ie->tag = __cpu_to_le32(WMI_IE_TAG); 6880 ie->ie_len = __cpu_to_le32(arg->ie_len); 6881 memcpy(ie->ie_data, arg->ie, arg->ie_len); 6882 6883 ptr += sizeof(*ie); 6884 ptr += roundup(arg->ie_len, 4); 6885 } 6886 } 6887 6888 static struct sk_buff * 6889 ath10k_wmi_op_gen_start_scan(struct ath10k *ar, 6890 const struct wmi_start_scan_arg *arg) 6891 { 6892 struct wmi_start_scan_cmd *cmd; 6893 struct sk_buff *skb; 6894 size_t len; 6895 int ret; 6896 6897 ret = ath10k_wmi_start_scan_verify(arg); 6898 if (ret) 6899 return ERR_PTR(ret); 6900 6901 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); 6902 skb = ath10k_wmi_alloc_skb(ar, len); 6903 if (!skb) 6904 return ERR_PTR(-ENOMEM); 6905 6906 cmd = (struct wmi_start_scan_cmd *)skb->data; 6907 6908 ath10k_wmi_put_start_scan_common(&cmd->common, arg); 6909 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); 6910 6911 cmd->burst_duration_ms = __cpu_to_le32(0); 6912 6913 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); 6914 return skb; 6915 } 6916 6917 static struct sk_buff * 6918 ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar, 6919 const struct wmi_start_scan_arg *arg) 6920 { 6921 struct wmi_10x_start_scan_cmd *cmd; 6922 struct sk_buff *skb; 6923 size_t len; 6924 int ret; 6925 6926 ret = ath10k_wmi_start_scan_verify(arg); 6927 if (ret) 6928 return ERR_PTR(ret); 6929 6930 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); 6931 skb = ath10k_wmi_alloc_skb(ar, len); 6932 if (!skb) 6933 return ERR_PTR(-ENOMEM); 6934 6935 cmd = (struct wmi_10x_start_scan_cmd *)skb->data; 6936 6937 ath10k_wmi_put_start_scan_common(&cmd->common, arg); 6938 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); 6939 6940 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n"); 6941 return skb; 6942 } 6943 6944 void ath10k_wmi_start_scan_init(struct ath10k *ar, 6945 struct wmi_start_scan_arg *arg) 6946 { 6947 /* setup commonly used values */ 6948 arg->scan_req_id = 1; 6949 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 6950 arg->dwell_time_active = 50; 6951 arg->dwell_time_passive = 150; 6952 arg->min_rest_time = 50; 6953 arg->max_rest_time = 500; 6954 arg->repeat_probe_time = 0; 6955 arg->probe_spacing_time = 0; 6956 arg->idle_time = 0; 6957 arg->max_scan_time = 20000; 6958 arg->probe_delay = 5; 6959 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED 6960 | WMI_SCAN_EVENT_COMPLETED 6961 | WMI_SCAN_EVENT_BSS_CHANNEL 6962 | WMI_SCAN_EVENT_FOREIGN_CHANNEL 6963 | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT 6964 | WMI_SCAN_EVENT_DEQUEUED; 6965 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT; 6966 arg->n_bssids = 1; 6967 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; 6968 } 6969 6970 static struct sk_buff * 6971 ath10k_wmi_op_gen_stop_scan(struct ath10k *ar, 6972 const struct wmi_stop_scan_arg *arg) 6973 { 6974 struct wmi_stop_scan_cmd *cmd; 6975 struct sk_buff *skb; 6976 u32 scan_id; 6977 u32 req_id; 6978 6979 if (arg->req_id > 0xFFF) 6980 return ERR_PTR(-EINVAL); 6981 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) 6982 return ERR_PTR(-EINVAL); 6983 6984 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 6985 if (!skb) 6986 return ERR_PTR(-ENOMEM); 6987 6988 scan_id = arg->u.scan_id; 6989 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; 6990 6991 req_id = arg->req_id; 6992 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; 6993 6994 cmd = (struct wmi_stop_scan_cmd *)skb->data; 6995 cmd->req_type = __cpu_to_le32(arg->req_type); 6996 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id); 6997 cmd->scan_id = __cpu_to_le32(scan_id); 6998 cmd->scan_req_id = __cpu_to_le32(req_id); 6999 7000 ath10k_dbg(ar, ATH10K_DBG_WMI, 7001 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", 7002 arg->req_id, arg->req_type, arg->u.scan_id); 7003 return skb; 7004 } 7005 7006 static struct sk_buff * 7007 ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id, 7008 enum wmi_vdev_type type, 7009 enum wmi_vdev_subtype subtype, 7010 const u8 macaddr[ETH_ALEN]) 7011 { 7012 struct wmi_vdev_create_cmd *cmd; 7013 struct sk_buff *skb; 7014 7015 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7016 if (!skb) 7017 return ERR_PTR(-ENOMEM); 7018 7019 cmd = (struct wmi_vdev_create_cmd *)skb->data; 7020 cmd->vdev_id = __cpu_to_le32(vdev_id); 7021 cmd->vdev_type = __cpu_to_le32(type); 7022 cmd->vdev_subtype = __cpu_to_le32(subtype); 7023 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 7024 7025 ath10k_dbg(ar, ATH10K_DBG_WMI, 7026 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", 7027 vdev_id, type, subtype, macaddr); 7028 return skb; 7029 } 7030 7031 static struct sk_buff * 7032 ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id) 7033 { 7034 struct wmi_vdev_delete_cmd *cmd; 7035 struct sk_buff *skb; 7036 7037 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7038 if (!skb) 7039 return ERR_PTR(-ENOMEM); 7040 7041 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 7042 cmd->vdev_id = __cpu_to_le32(vdev_id); 7043 7044 ath10k_dbg(ar, ATH10K_DBG_WMI, 7045 "WMI vdev delete id %d\n", vdev_id); 7046 return skb; 7047 } 7048 7049 static struct sk_buff * 7050 ath10k_wmi_op_gen_vdev_start(struct ath10k *ar, 7051 const struct wmi_vdev_start_request_arg *arg, 7052 bool restart) 7053 { 7054 struct wmi_vdev_start_request_cmd *cmd; 7055 struct sk_buff *skb; 7056 const char *cmdname; 7057 u32 flags = 0; 7058 7059 if (WARN_ON(arg->hidden_ssid && !arg->ssid)) 7060 return ERR_PTR(-EINVAL); 7061 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 7062 return ERR_PTR(-EINVAL); 7063 7064 if (restart) 7065 cmdname = "restart"; 7066 else 7067 cmdname = "start"; 7068 7069 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7070 if (!skb) 7071 return ERR_PTR(-ENOMEM); 7072 7073 if (arg->hidden_ssid) 7074 flags |= WMI_VDEV_START_HIDDEN_SSID; 7075 if (arg->pmf_enabled) 7076 flags |= WMI_VDEV_START_PMF_ENABLED; 7077 7078 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 7079 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 7080 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack); 7081 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval); 7082 cmd->dtim_period = __cpu_to_le32(arg->dtim_period); 7083 cmd->flags = __cpu_to_le32(flags); 7084 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate); 7085 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power); 7086 7087 if (arg->ssid) { 7088 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len); 7089 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 7090 } 7091 7092 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel); 7093 7094 ath10k_dbg(ar, ATH10K_DBG_WMI, 7095 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n", 7096 cmdname, arg->vdev_id, 7097 flags, arg->channel.freq, arg->channel.mode, 7098 cmd->chan.flags, arg->channel.max_power); 7099 7100 return skb; 7101 } 7102 7103 static struct sk_buff * 7104 ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id) 7105 { 7106 struct wmi_vdev_stop_cmd *cmd; 7107 struct sk_buff *skb; 7108 7109 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7110 if (!skb) 7111 return ERR_PTR(-ENOMEM); 7112 7113 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 7114 cmd->vdev_id = __cpu_to_le32(vdev_id); 7115 7116 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); 7117 return skb; 7118 } 7119 7120 static struct sk_buff * 7121 ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, 7122 const u8 *bssid) 7123 { 7124 struct wmi_vdev_up_cmd *cmd; 7125 struct sk_buff *skb; 7126 7127 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7128 if (!skb) 7129 return ERR_PTR(-ENOMEM); 7130 7131 cmd = (struct wmi_vdev_up_cmd *)skb->data; 7132 cmd->vdev_id = __cpu_to_le32(vdev_id); 7133 cmd->vdev_assoc_id = __cpu_to_le32(aid); 7134 ether_addr_copy(cmd->vdev_bssid.addr, bssid); 7135 7136 ath10k_dbg(ar, ATH10K_DBG_WMI, 7137 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 7138 vdev_id, aid, bssid); 7139 return skb; 7140 } 7141 7142 static struct sk_buff * 7143 ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id) 7144 { 7145 struct wmi_vdev_down_cmd *cmd; 7146 struct sk_buff *skb; 7147 7148 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7149 if (!skb) 7150 return ERR_PTR(-ENOMEM); 7151 7152 cmd = (struct wmi_vdev_down_cmd *)skb->data; 7153 cmd->vdev_id = __cpu_to_le32(vdev_id); 7154 7155 ath10k_dbg(ar, ATH10K_DBG_WMI, 7156 "wmi mgmt vdev down id 0x%x\n", vdev_id); 7157 return skb; 7158 } 7159 7160 static struct sk_buff * 7161 ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id, 7162 u32 param_id, u32 param_value) 7163 { 7164 struct wmi_vdev_set_param_cmd *cmd; 7165 struct sk_buff *skb; 7166 7167 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) { 7168 ath10k_dbg(ar, ATH10K_DBG_WMI, 7169 "vdev param %d not supported by firmware\n", 7170 param_id); 7171 return ERR_PTR(-EOPNOTSUPP); 7172 } 7173 7174 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7175 if (!skb) 7176 return ERR_PTR(-ENOMEM); 7177 7178 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 7179 cmd->vdev_id = __cpu_to_le32(vdev_id); 7180 cmd->param_id = __cpu_to_le32(param_id); 7181 cmd->param_value = __cpu_to_le32(param_value); 7182 7183 ath10k_dbg(ar, ATH10K_DBG_WMI, 7184 "wmi vdev id 0x%x set param %d value %d\n", 7185 vdev_id, param_id, param_value); 7186 return skb; 7187 } 7188 7189 static struct sk_buff * 7190 ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar, 7191 const struct wmi_vdev_install_key_arg *arg) 7192 { 7193 struct wmi_vdev_install_key_cmd *cmd; 7194 struct sk_buff *skb; 7195 7196 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) 7197 return ERR_PTR(-EINVAL); 7198 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) 7199 return ERR_PTR(-EINVAL); 7200 7201 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); 7202 if (!skb) 7203 return ERR_PTR(-ENOMEM); 7204 7205 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 7206 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 7207 cmd->key_idx = __cpu_to_le32(arg->key_idx); 7208 cmd->key_flags = __cpu_to_le32(arg->key_flags); 7209 cmd->key_cipher = __cpu_to_le32(arg->key_cipher); 7210 cmd->key_len = __cpu_to_le32(arg->key_len); 7211 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len); 7212 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len); 7213 7214 if (arg->macaddr) 7215 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 7216 if (arg->key_data) 7217 memcpy(cmd->key_data, arg->key_data, arg->key_len); 7218 7219 ath10k_dbg(ar, ATH10K_DBG_WMI, 7220 "wmi vdev install key idx %d cipher %d len %d\n", 7221 arg->key_idx, arg->key_cipher, arg->key_len); 7222 return skb; 7223 } 7224 7225 static struct sk_buff * 7226 ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar, 7227 const struct wmi_vdev_spectral_conf_arg *arg) 7228 { 7229 struct wmi_vdev_spectral_conf_cmd *cmd; 7230 struct sk_buff *skb; 7231 7232 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7233 if (!skb) 7234 return ERR_PTR(-ENOMEM); 7235 7236 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; 7237 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 7238 cmd->scan_count = __cpu_to_le32(arg->scan_count); 7239 cmd->scan_period = __cpu_to_le32(arg->scan_period); 7240 cmd->scan_priority = __cpu_to_le32(arg->scan_priority); 7241 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size); 7242 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena); 7243 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena); 7244 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref); 7245 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay); 7246 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr); 7247 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr); 7248 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode); 7249 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode); 7250 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr); 7251 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format); 7252 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode); 7253 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale); 7254 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); 7255 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); 7256 7257 return skb; 7258 } 7259 7260 static struct sk_buff * 7261 ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, 7262 u32 trigger, u32 enable) 7263 { 7264 struct wmi_vdev_spectral_enable_cmd *cmd; 7265 struct sk_buff *skb; 7266 7267 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7268 if (!skb) 7269 return ERR_PTR(-ENOMEM); 7270 7271 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; 7272 cmd->vdev_id = __cpu_to_le32(vdev_id); 7273 cmd->trigger_cmd = __cpu_to_le32(trigger); 7274 cmd->enable_cmd = __cpu_to_le32(enable); 7275 7276 return skb; 7277 } 7278 7279 static struct sk_buff * 7280 ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id, 7281 const u8 peer_addr[ETH_ALEN], 7282 enum wmi_peer_type peer_type) 7283 { 7284 struct wmi_peer_create_cmd *cmd; 7285 struct sk_buff *skb; 7286 7287 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7288 if (!skb) 7289 return ERR_PTR(-ENOMEM); 7290 7291 cmd = (struct wmi_peer_create_cmd *)skb->data; 7292 cmd->vdev_id = __cpu_to_le32(vdev_id); 7293 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 7294 cmd->peer_type = __cpu_to_le32(peer_type); 7295 7296 ath10k_dbg(ar, ATH10K_DBG_WMI, 7297 "wmi peer create vdev_id %d peer_addr %pM\n", 7298 vdev_id, peer_addr); 7299 return skb; 7300 } 7301 7302 static struct sk_buff * 7303 ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id, 7304 const u8 peer_addr[ETH_ALEN]) 7305 { 7306 struct wmi_peer_delete_cmd *cmd; 7307 struct sk_buff *skb; 7308 7309 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7310 if (!skb) 7311 return ERR_PTR(-ENOMEM); 7312 7313 cmd = (struct wmi_peer_delete_cmd *)skb->data; 7314 cmd->vdev_id = __cpu_to_le32(vdev_id); 7315 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 7316 7317 ath10k_dbg(ar, ATH10K_DBG_WMI, 7318 "wmi peer delete vdev_id %d peer_addr %pM\n", 7319 vdev_id, peer_addr); 7320 return skb; 7321 } 7322 7323 static struct sk_buff * 7324 ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id, 7325 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) 7326 { 7327 struct wmi_peer_flush_tids_cmd *cmd; 7328 struct sk_buff *skb; 7329 7330 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7331 if (!skb) 7332 return ERR_PTR(-ENOMEM); 7333 7334 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 7335 cmd->vdev_id = __cpu_to_le32(vdev_id); 7336 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap); 7337 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 7338 7339 ath10k_dbg(ar, ATH10K_DBG_WMI, 7340 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", 7341 vdev_id, peer_addr, tid_bitmap); 7342 return skb; 7343 } 7344 7345 static struct sk_buff * 7346 ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id, 7347 const u8 *peer_addr, 7348 enum wmi_peer_param param_id, 7349 u32 param_value) 7350 { 7351 struct wmi_peer_set_param_cmd *cmd; 7352 struct sk_buff *skb; 7353 7354 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7355 if (!skb) 7356 return ERR_PTR(-ENOMEM); 7357 7358 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 7359 cmd->vdev_id = __cpu_to_le32(vdev_id); 7360 cmd->param_id = __cpu_to_le32(param_id); 7361 cmd->param_value = __cpu_to_le32(param_value); 7362 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 7363 7364 ath10k_dbg(ar, ATH10K_DBG_WMI, 7365 "wmi vdev %d peer 0x%pM set param %d value %d\n", 7366 vdev_id, peer_addr, param_id, param_value); 7367 return skb; 7368 } 7369 7370 static struct sk_buff * 7371 ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id, 7372 enum wmi_sta_ps_mode psmode) 7373 { 7374 struct wmi_sta_powersave_mode_cmd *cmd; 7375 struct sk_buff *skb; 7376 7377 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7378 if (!skb) 7379 return ERR_PTR(-ENOMEM); 7380 7381 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; 7382 cmd->vdev_id = __cpu_to_le32(vdev_id); 7383 cmd->sta_ps_mode = __cpu_to_le32(psmode); 7384 7385 ath10k_dbg(ar, ATH10K_DBG_WMI, 7386 "wmi set powersave id 0x%x mode %d\n", 7387 vdev_id, psmode); 7388 return skb; 7389 } 7390 7391 static struct sk_buff * 7392 ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id, 7393 enum wmi_sta_powersave_param param_id, 7394 u32 value) 7395 { 7396 struct wmi_sta_powersave_param_cmd *cmd; 7397 struct sk_buff *skb; 7398 7399 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7400 if (!skb) 7401 return ERR_PTR(-ENOMEM); 7402 7403 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 7404 cmd->vdev_id = __cpu_to_le32(vdev_id); 7405 cmd->param_id = __cpu_to_le32(param_id); 7406 cmd->param_value = __cpu_to_le32(value); 7407 7408 ath10k_dbg(ar, ATH10K_DBG_WMI, 7409 "wmi sta ps param vdev_id 0x%x param %d value %d\n", 7410 vdev_id, param_id, value); 7411 return skb; 7412 } 7413 7414 static struct sk_buff * 7415 ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac, 7416 enum wmi_ap_ps_peer_param param_id, u32 value) 7417 { 7418 struct wmi_ap_ps_peer_cmd *cmd; 7419 struct sk_buff *skb; 7420 7421 if (!mac) 7422 return ERR_PTR(-EINVAL); 7423 7424 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7425 if (!skb) 7426 return ERR_PTR(-ENOMEM); 7427 7428 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 7429 cmd->vdev_id = __cpu_to_le32(vdev_id); 7430 cmd->param_id = __cpu_to_le32(param_id); 7431 cmd->param_value = __cpu_to_le32(value); 7432 ether_addr_copy(cmd->peer_macaddr.addr, mac); 7433 7434 ath10k_dbg(ar, ATH10K_DBG_WMI, 7435 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", 7436 vdev_id, param_id, value, mac); 7437 return skb; 7438 } 7439 7440 static struct sk_buff * 7441 ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar, 7442 const struct wmi_scan_chan_list_arg *arg) 7443 { 7444 struct wmi_scan_chan_list_cmd *cmd; 7445 struct sk_buff *skb; 7446 struct wmi_channel_arg *ch; 7447 struct wmi_channel *ci; 7448 int len; 7449 int i; 7450 7451 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel); 7452 7453 skb = ath10k_wmi_alloc_skb(ar, len); 7454 if (!skb) 7455 return ERR_PTR(-EINVAL); 7456 7457 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 7458 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); 7459 7460 for (i = 0; i < arg->n_channels; i++) { 7461 ch = &arg->channels[i]; 7462 ci = &cmd->chan_info[i]; 7463 7464 ath10k_wmi_put_wmi_channel(ci, ch); 7465 } 7466 7467 return skb; 7468 } 7469 7470 static void 7471 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf, 7472 const struct wmi_peer_assoc_complete_arg *arg) 7473 { 7474 struct wmi_common_peer_assoc_complete_cmd *cmd = buf; 7475 7476 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 7477 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1); 7478 cmd->peer_associd = __cpu_to_le32(arg->peer_aid); 7479 cmd->peer_flags = __cpu_to_le32(arg->peer_flags); 7480 cmd->peer_caps = __cpu_to_le32(arg->peer_caps); 7481 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval); 7482 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps); 7483 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu); 7484 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density); 7485 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps); 7486 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams); 7487 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps); 7488 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode); 7489 7490 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr); 7491 7492 cmd->peer_legacy_rates.num_rates = 7493 __cpu_to_le32(arg->peer_legacy_rates.num_rates); 7494 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates, 7495 arg->peer_legacy_rates.num_rates); 7496 7497 cmd->peer_ht_rates.num_rates = 7498 __cpu_to_le32(arg->peer_ht_rates.num_rates); 7499 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates, 7500 arg->peer_ht_rates.num_rates); 7501 7502 cmd->peer_vht_rates.rx_max_rate = 7503 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate); 7504 cmd->peer_vht_rates.rx_mcs_set = 7505 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set); 7506 cmd->peer_vht_rates.tx_max_rate = 7507 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate); 7508 cmd->peer_vht_rates.tx_mcs_set = 7509 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set); 7510 } 7511 7512 static void 7513 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf, 7514 const struct wmi_peer_assoc_complete_arg *arg) 7515 { 7516 struct wmi_main_peer_assoc_complete_cmd *cmd = buf; 7517 7518 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 7519 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info)); 7520 } 7521 7522 static void 7523 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf, 7524 const struct wmi_peer_assoc_complete_arg *arg) 7525 { 7526 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 7527 } 7528 7529 static void 7530 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf, 7531 const struct wmi_peer_assoc_complete_arg *arg) 7532 { 7533 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf; 7534 int max_mcs, max_nss; 7535 u32 info0; 7536 7537 /* TODO: Is using max values okay with firmware? */ 7538 max_mcs = 0xf; 7539 max_nss = 0xf; 7540 7541 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) | 7542 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS); 7543 7544 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 7545 cmd->info0 = __cpu_to_le32(info0); 7546 } 7547 7548 static void 7549 ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf, 7550 const struct wmi_peer_assoc_complete_arg *arg) 7551 { 7552 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf; 7553 7554 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg); 7555 if (arg->peer_bw_rxnss_override) 7556 cmd->peer_bw_rxnss_override = 7557 __cpu_to_le32((arg->peer_bw_rxnss_override - 1) | 7558 BIT(PEER_BW_RXNSS_OVERRIDE_OFFSET)); 7559 else 7560 cmd->peer_bw_rxnss_override = 0; 7561 } 7562 7563 static int 7564 ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg) 7565 { 7566 if (arg->peer_mpdu_density > 16) 7567 return -EINVAL; 7568 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) 7569 return -EINVAL; 7570 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) 7571 return -EINVAL; 7572 7573 return 0; 7574 } 7575 7576 static struct sk_buff * 7577 ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar, 7578 const struct wmi_peer_assoc_complete_arg *arg) 7579 { 7580 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd); 7581 struct sk_buff *skb; 7582 int ret; 7583 7584 ret = ath10k_wmi_peer_assoc_check_arg(arg); 7585 if (ret) 7586 return ERR_PTR(ret); 7587 7588 skb = ath10k_wmi_alloc_skb(ar, len); 7589 if (!skb) 7590 return ERR_PTR(-ENOMEM); 7591 7592 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); 7593 7594 ath10k_dbg(ar, ATH10K_DBG_WMI, 7595 "wmi peer assoc vdev %d addr %pM (%s)\n", 7596 arg->vdev_id, arg->addr, 7597 arg->peer_reassoc ? "reassociate" : "new"); 7598 return skb; 7599 } 7600 7601 static struct sk_buff * 7602 ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar, 7603 const struct wmi_peer_assoc_complete_arg *arg) 7604 { 7605 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); 7606 struct sk_buff *skb; 7607 int ret; 7608 7609 ret = ath10k_wmi_peer_assoc_check_arg(arg); 7610 if (ret) 7611 return ERR_PTR(ret); 7612 7613 skb = ath10k_wmi_alloc_skb(ar, len); 7614 if (!skb) 7615 return ERR_PTR(-ENOMEM); 7616 7617 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); 7618 7619 ath10k_dbg(ar, ATH10K_DBG_WMI, 7620 "wmi peer assoc vdev %d addr %pM (%s)\n", 7621 arg->vdev_id, arg->addr, 7622 arg->peer_reassoc ? "reassociate" : "new"); 7623 return skb; 7624 } 7625 7626 static struct sk_buff * 7627 ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar, 7628 const struct wmi_peer_assoc_complete_arg *arg) 7629 { 7630 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); 7631 struct sk_buff *skb; 7632 int ret; 7633 7634 ret = ath10k_wmi_peer_assoc_check_arg(arg); 7635 if (ret) 7636 return ERR_PTR(ret); 7637 7638 skb = ath10k_wmi_alloc_skb(ar, len); 7639 if (!skb) 7640 return ERR_PTR(-ENOMEM); 7641 7642 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); 7643 7644 ath10k_dbg(ar, ATH10K_DBG_WMI, 7645 "wmi peer assoc vdev %d addr %pM (%s)\n", 7646 arg->vdev_id, arg->addr, 7647 arg->peer_reassoc ? "reassociate" : "new"); 7648 return skb; 7649 } 7650 7651 static struct sk_buff * 7652 ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar, 7653 const struct wmi_peer_assoc_complete_arg *arg) 7654 { 7655 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd); 7656 struct sk_buff *skb; 7657 int ret; 7658 7659 ret = ath10k_wmi_peer_assoc_check_arg(arg); 7660 if (ret) 7661 return ERR_PTR(ret); 7662 7663 skb = ath10k_wmi_alloc_skb(ar, len); 7664 if (!skb) 7665 return ERR_PTR(-ENOMEM); 7666 7667 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg); 7668 7669 ath10k_dbg(ar, ATH10K_DBG_WMI, 7670 "wmi peer assoc vdev %d addr %pM (%s)\n", 7671 arg->vdev_id, arg->addr, 7672 arg->peer_reassoc ? "reassociate" : "new"); 7673 return skb; 7674 } 7675 7676 static struct sk_buff * 7677 ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar) 7678 { 7679 struct sk_buff *skb; 7680 7681 skb = ath10k_wmi_alloc_skb(ar, 0); 7682 if (!skb) 7683 return ERR_PTR(-ENOMEM); 7684 7685 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n"); 7686 return skb; 7687 } 7688 7689 static struct sk_buff * 7690 ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar, 7691 enum wmi_bss_survey_req_type type) 7692 { 7693 struct wmi_pdev_chan_info_req_cmd *cmd; 7694 struct sk_buff *skb; 7695 7696 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7697 if (!skb) 7698 return ERR_PTR(-ENOMEM); 7699 7700 cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data; 7701 cmd->type = __cpu_to_le32(type); 7702 7703 ath10k_dbg(ar, ATH10K_DBG_WMI, 7704 "wmi pdev bss info request type %d\n", type); 7705 7706 return skb; 7707 } 7708 7709 /* This function assumes the beacon is already DMA mapped */ 7710 static struct sk_buff * 7711 ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn, 7712 size_t bcn_len, u32 bcn_paddr, bool dtim_zero, 7713 bool deliver_cab) 7714 { 7715 struct wmi_bcn_tx_ref_cmd *cmd; 7716 struct sk_buff *skb; 7717 struct ieee80211_hdr *hdr; 7718 u16 fc; 7719 7720 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7721 if (!skb) 7722 return ERR_PTR(-ENOMEM); 7723 7724 hdr = (struct ieee80211_hdr *)bcn; 7725 fc = le16_to_cpu(hdr->frame_control); 7726 7727 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; 7728 cmd->vdev_id = __cpu_to_le32(vdev_id); 7729 cmd->data_len = __cpu_to_le32(bcn_len); 7730 cmd->data_ptr = __cpu_to_le32(bcn_paddr); 7731 cmd->msdu_id = 0; 7732 cmd->frame_control = __cpu_to_le32(fc); 7733 cmd->flags = 0; 7734 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); 7735 7736 if (dtim_zero) 7737 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); 7738 7739 if (deliver_cab) 7740 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); 7741 7742 return skb; 7743 } 7744 7745 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, 7746 const struct wmi_wmm_params_arg *arg) 7747 { 7748 params->cwmin = __cpu_to_le32(arg->cwmin); 7749 params->cwmax = __cpu_to_le32(arg->cwmax); 7750 params->aifs = __cpu_to_le32(arg->aifs); 7751 params->txop = __cpu_to_le32(arg->txop); 7752 params->acm = __cpu_to_le32(arg->acm); 7753 params->no_ack = __cpu_to_le32(arg->no_ack); 7754 } 7755 7756 static struct sk_buff * 7757 ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar, 7758 const struct wmi_wmm_params_all_arg *arg) 7759 { 7760 struct wmi_pdev_set_wmm_params *cmd; 7761 struct sk_buff *skb; 7762 7763 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7764 if (!skb) 7765 return ERR_PTR(-ENOMEM); 7766 7767 cmd = (struct wmi_pdev_set_wmm_params *)skb->data; 7768 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be); 7769 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); 7770 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); 7771 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); 7772 7773 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); 7774 return skb; 7775 } 7776 7777 static struct sk_buff * 7778 ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask) 7779 { 7780 struct wmi_request_stats_cmd *cmd; 7781 struct sk_buff *skb; 7782 7783 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7784 if (!skb) 7785 return ERR_PTR(-ENOMEM); 7786 7787 cmd = (struct wmi_request_stats_cmd *)skb->data; 7788 cmd->stats_id = __cpu_to_le32(stats_mask); 7789 7790 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n", 7791 stats_mask); 7792 return skb; 7793 } 7794 7795 static struct sk_buff * 7796 ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar, 7797 enum wmi_force_fw_hang_type type, u32 delay_ms) 7798 { 7799 struct wmi_force_fw_hang_cmd *cmd; 7800 struct sk_buff *skb; 7801 7802 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7803 if (!skb) 7804 return ERR_PTR(-ENOMEM); 7805 7806 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 7807 cmd->type = __cpu_to_le32(type); 7808 cmd->delay_ms = __cpu_to_le32(delay_ms); 7809 7810 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", 7811 type, delay_ms); 7812 return skb; 7813 } 7814 7815 static struct sk_buff * 7816 ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable, 7817 u32 log_level) 7818 { 7819 struct wmi_dbglog_cfg_cmd *cmd; 7820 struct sk_buff *skb; 7821 u32 cfg; 7822 7823 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7824 if (!skb) 7825 return ERR_PTR(-ENOMEM); 7826 7827 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; 7828 7829 if (module_enable) { 7830 cfg = SM(log_level, 7831 ATH10K_DBGLOG_CFG_LOG_LVL); 7832 } else { 7833 /* set back defaults, all modules with WARN level */ 7834 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN, 7835 ATH10K_DBGLOG_CFG_LOG_LVL); 7836 module_enable = ~0; 7837 } 7838 7839 cmd->module_enable = __cpu_to_le32(module_enable); 7840 cmd->module_valid = __cpu_to_le32(~0); 7841 cmd->config_enable = __cpu_to_le32(cfg); 7842 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK); 7843 7844 ath10k_dbg(ar, ATH10K_DBG_WMI, 7845 "wmi dbglog cfg modules %08x %08x config %08x %08x\n", 7846 __le32_to_cpu(cmd->module_enable), 7847 __le32_to_cpu(cmd->module_valid), 7848 __le32_to_cpu(cmd->config_enable), 7849 __le32_to_cpu(cmd->config_valid)); 7850 return skb; 7851 } 7852 7853 static struct sk_buff * 7854 ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable, 7855 u32 log_level) 7856 { 7857 struct wmi_10_4_dbglog_cfg_cmd *cmd; 7858 struct sk_buff *skb; 7859 u32 cfg; 7860 7861 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7862 if (!skb) 7863 return ERR_PTR(-ENOMEM); 7864 7865 cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data; 7866 7867 if (module_enable) { 7868 cfg = SM(log_level, 7869 ATH10K_DBGLOG_CFG_LOG_LVL); 7870 } else { 7871 /* set back defaults, all modules with WARN level */ 7872 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN, 7873 ATH10K_DBGLOG_CFG_LOG_LVL); 7874 module_enable = ~0; 7875 } 7876 7877 cmd->module_enable = __cpu_to_le64(module_enable); 7878 cmd->module_valid = __cpu_to_le64(~0); 7879 cmd->config_enable = __cpu_to_le32(cfg); 7880 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK); 7881 7882 ath10k_dbg(ar, ATH10K_DBG_WMI, 7883 "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n", 7884 __le64_to_cpu(cmd->module_enable), 7885 __le64_to_cpu(cmd->module_valid), 7886 __le32_to_cpu(cmd->config_enable), 7887 __le32_to_cpu(cmd->config_valid)); 7888 return skb; 7889 } 7890 7891 static struct sk_buff * 7892 ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap) 7893 { 7894 struct wmi_pdev_pktlog_enable_cmd *cmd; 7895 struct sk_buff *skb; 7896 7897 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7898 if (!skb) 7899 return ERR_PTR(-ENOMEM); 7900 7901 ev_bitmap &= ATH10K_PKTLOG_ANY; 7902 7903 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data; 7904 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap); 7905 7906 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n", 7907 ev_bitmap); 7908 return skb; 7909 } 7910 7911 static struct sk_buff * 7912 ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar) 7913 { 7914 struct sk_buff *skb; 7915 7916 skb = ath10k_wmi_alloc_skb(ar, 0); 7917 if (!skb) 7918 return ERR_PTR(-ENOMEM); 7919 7920 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n"); 7921 return skb; 7922 } 7923 7924 static struct sk_buff * 7925 ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period, 7926 u32 duration, u32 next_offset, 7927 u32 enabled) 7928 { 7929 struct wmi_pdev_set_quiet_cmd *cmd; 7930 struct sk_buff *skb; 7931 7932 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7933 if (!skb) 7934 return ERR_PTR(-ENOMEM); 7935 7936 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data; 7937 cmd->period = __cpu_to_le32(period); 7938 cmd->duration = __cpu_to_le32(duration); 7939 cmd->next_start = __cpu_to_le32(next_offset); 7940 cmd->enabled = __cpu_to_le32(enabled); 7941 7942 ath10k_dbg(ar, ATH10K_DBG_WMI, 7943 "wmi quiet param: period %u duration %u enabled %d\n", 7944 period, duration, enabled); 7945 return skb; 7946 } 7947 7948 static struct sk_buff * 7949 ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id, 7950 const u8 *mac) 7951 { 7952 struct wmi_addba_clear_resp_cmd *cmd; 7953 struct sk_buff *skb; 7954 7955 if (!mac) 7956 return ERR_PTR(-EINVAL); 7957 7958 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7959 if (!skb) 7960 return ERR_PTR(-ENOMEM); 7961 7962 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 7963 cmd->vdev_id = __cpu_to_le32(vdev_id); 7964 ether_addr_copy(cmd->peer_macaddr.addr, mac); 7965 7966 ath10k_dbg(ar, ATH10K_DBG_WMI, 7967 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 7968 vdev_id, mac); 7969 return skb; 7970 } 7971 7972 static struct sk_buff * 7973 ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, 7974 u32 tid, u32 buf_size) 7975 { 7976 struct wmi_addba_send_cmd *cmd; 7977 struct sk_buff *skb; 7978 7979 if (!mac) 7980 return ERR_PTR(-EINVAL); 7981 7982 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7983 if (!skb) 7984 return ERR_PTR(-ENOMEM); 7985 7986 cmd = (struct wmi_addba_send_cmd *)skb->data; 7987 cmd->vdev_id = __cpu_to_le32(vdev_id); 7988 ether_addr_copy(cmd->peer_macaddr.addr, mac); 7989 cmd->tid = __cpu_to_le32(tid); 7990 cmd->buffersize = __cpu_to_le32(buf_size); 7991 7992 ath10k_dbg(ar, ATH10K_DBG_WMI, 7993 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 7994 vdev_id, mac, tid, buf_size); 7995 return skb; 7996 } 7997 7998 static struct sk_buff * 7999 ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac, 8000 u32 tid, u32 status) 8001 { 8002 struct wmi_addba_setresponse_cmd *cmd; 8003 struct sk_buff *skb; 8004 8005 if (!mac) 8006 return ERR_PTR(-EINVAL); 8007 8008 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8009 if (!skb) 8010 return ERR_PTR(-ENOMEM); 8011 8012 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 8013 cmd->vdev_id = __cpu_to_le32(vdev_id); 8014 ether_addr_copy(cmd->peer_macaddr.addr, mac); 8015 cmd->tid = __cpu_to_le32(tid); 8016 cmd->statuscode = __cpu_to_le32(status); 8017 8018 ath10k_dbg(ar, ATH10K_DBG_WMI, 8019 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 8020 vdev_id, mac, tid, status); 8021 return skb; 8022 } 8023 8024 static struct sk_buff * 8025 ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, 8026 u32 tid, u32 initiator, u32 reason) 8027 { 8028 struct wmi_delba_send_cmd *cmd; 8029 struct sk_buff *skb; 8030 8031 if (!mac) 8032 return ERR_PTR(-EINVAL); 8033 8034 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8035 if (!skb) 8036 return ERR_PTR(-ENOMEM); 8037 8038 cmd = (struct wmi_delba_send_cmd *)skb->data; 8039 cmd->vdev_id = __cpu_to_le32(vdev_id); 8040 ether_addr_copy(cmd->peer_macaddr.addr, mac); 8041 cmd->tid = __cpu_to_le32(tid); 8042 cmd->initiator = __cpu_to_le32(initiator); 8043 cmd->reasoncode = __cpu_to_le32(reason); 8044 8045 ath10k_dbg(ar, ATH10K_DBG_WMI, 8046 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 8047 vdev_id, mac, tid, initiator, reason); 8048 return skb; 8049 } 8050 8051 static struct sk_buff * 8052 ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param) 8053 { 8054 struct wmi_pdev_get_tpc_config_cmd *cmd; 8055 struct sk_buff *skb; 8056 8057 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8058 if (!skb) 8059 return ERR_PTR(-ENOMEM); 8060 8061 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data; 8062 cmd->param = __cpu_to_le32(param); 8063 8064 ath10k_dbg(ar, ATH10K_DBG_WMI, 8065 "wmi pdev get tpc config param %d\n", param); 8066 return skb; 8067 } 8068 8069 size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head) 8070 { 8071 struct ath10k_fw_stats_peer *i; 8072 size_t num = 0; 8073 8074 list_for_each_entry(i, head, list) 8075 ++num; 8076 8077 return num; 8078 } 8079 8080 size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head) 8081 { 8082 struct ath10k_fw_stats_vdev *i; 8083 size_t num = 0; 8084 8085 list_for_each_entry(i, head, list) 8086 ++num; 8087 8088 return num; 8089 } 8090 8091 static void 8092 ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev, 8093 char *buf, u32 *length) 8094 { 8095 u32 len = *length; 8096 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8097 8098 len += scnprintf(buf + len, buf_len - len, "\n"); 8099 len += scnprintf(buf + len, buf_len - len, "%30s\n", 8100 "ath10k PDEV stats"); 8101 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8102 "================="); 8103 8104 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8105 "Channel noise floor", pdev->ch_noise_floor); 8106 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8107 "Channel TX power", pdev->chan_tx_power); 8108 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8109 "TX frame count", pdev->tx_frame_count); 8110 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8111 "RX frame count", pdev->rx_frame_count); 8112 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8113 "RX clear count", pdev->rx_clear_count); 8114 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8115 "Cycle count", pdev->cycle_count); 8116 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8117 "PHY error count", pdev->phy_err_count); 8118 8119 *length = len; 8120 } 8121 8122 static void 8123 ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev, 8124 char *buf, u32 *length) 8125 { 8126 u32 len = *length; 8127 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8128 8129 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8130 "RTS bad count", pdev->rts_bad); 8131 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8132 "RTS good count", pdev->rts_good); 8133 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8134 "FCS bad count", pdev->fcs_bad); 8135 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8136 "No beacon count", pdev->no_beacons); 8137 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8138 "MIB int count", pdev->mib_int_count); 8139 8140 len += scnprintf(buf + len, buf_len - len, "\n"); 8141 *length = len; 8142 } 8143 8144 static void 8145 ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev, 8146 char *buf, u32 *length) 8147 { 8148 u32 len = *length; 8149 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8150 8151 len += scnprintf(buf + len, buf_len - len, "\n%30s\n", 8152 "ath10k PDEV TX stats"); 8153 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8154 "================="); 8155 8156 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8157 "HTT cookies queued", pdev->comp_queued); 8158 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8159 "HTT cookies disp.", pdev->comp_delivered); 8160 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8161 "MSDU queued", pdev->msdu_enqued); 8162 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8163 "MPDU queued", pdev->mpdu_enqued); 8164 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8165 "MSDUs dropped", pdev->wmm_drop); 8166 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8167 "Local enqued", pdev->local_enqued); 8168 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8169 "Local freed", pdev->local_freed); 8170 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8171 "HW queued", pdev->hw_queued); 8172 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8173 "PPDUs reaped", pdev->hw_reaped); 8174 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8175 "Num underruns", pdev->underrun); 8176 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8177 "PPDUs cleaned", pdev->tx_abort); 8178 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8179 "MPDUs requed", pdev->mpdus_requed); 8180 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8181 "Excessive retries", pdev->tx_ko); 8182 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8183 "HW rate", pdev->data_rc); 8184 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8185 "Sched self triggers", pdev->self_triggers); 8186 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8187 "Dropped due to SW retries", 8188 pdev->sw_retry_failure); 8189 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8190 "Illegal rate phy errors", 8191 pdev->illgl_rate_phy_err); 8192 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8193 "Pdev continuous xretry", pdev->pdev_cont_xretry); 8194 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8195 "TX timeout", pdev->pdev_tx_timeout); 8196 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8197 "PDEV resets", pdev->pdev_resets); 8198 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8199 "PHY underrun", pdev->phy_underrun); 8200 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8201 "MPDU is more than txop limit", pdev->txop_ovf); 8202 *length = len; 8203 } 8204 8205 static void 8206 ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev, 8207 char *buf, u32 *length) 8208 { 8209 u32 len = *length; 8210 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8211 8212 len += scnprintf(buf + len, buf_len - len, "\n%30s\n", 8213 "ath10k PDEV RX stats"); 8214 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8215 "================="); 8216 8217 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8218 "Mid PPDU route change", 8219 pdev->mid_ppdu_route_change); 8220 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8221 "Tot. number of statuses", pdev->status_rcvd); 8222 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8223 "Extra frags on rings 0", pdev->r0_frags); 8224 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8225 "Extra frags on rings 1", pdev->r1_frags); 8226 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8227 "Extra frags on rings 2", pdev->r2_frags); 8228 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8229 "Extra frags on rings 3", pdev->r3_frags); 8230 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8231 "MSDUs delivered to HTT", pdev->htt_msdus); 8232 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8233 "MPDUs delivered to HTT", pdev->htt_mpdus); 8234 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8235 "MSDUs delivered to stack", pdev->loc_msdus); 8236 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8237 "MPDUs delivered to stack", pdev->loc_mpdus); 8238 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8239 "Oversized AMSUs", pdev->oversize_amsdu); 8240 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8241 "PHY errors", pdev->phy_errs); 8242 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8243 "PHY errors drops", pdev->phy_err_drop); 8244 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8245 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs); 8246 *length = len; 8247 } 8248 8249 static void 8250 ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev, 8251 char *buf, u32 *length) 8252 { 8253 u32 len = *length; 8254 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8255 int i; 8256 8257 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8258 "vdev id", vdev->vdev_id); 8259 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8260 "beacon snr", vdev->beacon_snr); 8261 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8262 "data snr", vdev->data_snr); 8263 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8264 "num rx frames", vdev->num_rx_frames); 8265 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8266 "num rts fail", vdev->num_rts_fail); 8267 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8268 "num rts success", vdev->num_rts_success); 8269 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8270 "num rx err", vdev->num_rx_err); 8271 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8272 "num rx discard", vdev->num_rx_discard); 8273 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8274 "num tx not acked", vdev->num_tx_not_acked); 8275 8276 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++) 8277 len += scnprintf(buf + len, buf_len - len, 8278 "%25s [%02d] %u\n", 8279 "num tx frames", i, 8280 vdev->num_tx_frames[i]); 8281 8282 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++) 8283 len += scnprintf(buf + len, buf_len - len, 8284 "%25s [%02d] %u\n", 8285 "num tx frames retries", i, 8286 vdev->num_tx_frames_retries[i]); 8287 8288 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++) 8289 len += scnprintf(buf + len, buf_len - len, 8290 "%25s [%02d] %u\n", 8291 "num tx frames failures", i, 8292 vdev->num_tx_frames_failures[i]); 8293 8294 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++) 8295 len += scnprintf(buf + len, buf_len - len, 8296 "%25s [%02d] 0x%08x\n", 8297 "tx rate history", i, 8298 vdev->tx_rate_history[i]); 8299 8300 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++) 8301 len += scnprintf(buf + len, buf_len - len, 8302 "%25s [%02d] %u\n", 8303 "beacon rssi history", i, 8304 vdev->beacon_rssi_history[i]); 8305 8306 len += scnprintf(buf + len, buf_len - len, "\n"); 8307 *length = len; 8308 } 8309 8310 static void 8311 ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer, 8312 char *buf, u32 *length) 8313 { 8314 u32 len = *length; 8315 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8316 8317 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", 8318 "Peer MAC address", peer->peer_macaddr); 8319 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8320 "Peer RSSI", peer->peer_rssi); 8321 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8322 "Peer TX rate", peer->peer_tx_rate); 8323 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8324 "Peer RX rate", peer->peer_rx_rate); 8325 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n", 8326 "Peer RX duration", peer->rx_duration); 8327 8328 len += scnprintf(buf + len, buf_len - len, "\n"); 8329 *length = len; 8330 } 8331 8332 void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar, 8333 struct ath10k_fw_stats *fw_stats, 8334 char *buf) 8335 { 8336 u32 len = 0; 8337 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8338 const struct ath10k_fw_stats_pdev *pdev; 8339 const struct ath10k_fw_stats_vdev *vdev; 8340 const struct ath10k_fw_stats_peer *peer; 8341 size_t num_peers; 8342 size_t num_vdevs; 8343 8344 spin_lock_bh(&ar->data_lock); 8345 8346 pdev = list_first_entry_or_null(&fw_stats->pdevs, 8347 struct ath10k_fw_stats_pdev, list); 8348 if (!pdev) { 8349 ath10k_warn(ar, "failed to get pdev stats\n"); 8350 goto unlock; 8351 } 8352 8353 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); 8354 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); 8355 8356 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); 8357 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); 8358 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); 8359 8360 len += scnprintf(buf + len, buf_len - len, "\n"); 8361 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 8362 "ath10k VDEV stats", num_vdevs); 8363 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8364 "================="); 8365 8366 list_for_each_entry(vdev, &fw_stats->vdevs, list) { 8367 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); 8368 } 8369 8370 len += scnprintf(buf + len, buf_len - len, "\n"); 8371 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 8372 "ath10k PEER stats", num_peers); 8373 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8374 "================="); 8375 8376 list_for_each_entry(peer, &fw_stats->peers, list) { 8377 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); 8378 } 8379 8380 unlock: 8381 spin_unlock_bh(&ar->data_lock); 8382 8383 if (len >= buf_len) 8384 buf[len - 1] = 0; 8385 else 8386 buf[len] = 0; 8387 } 8388 8389 void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar, 8390 struct ath10k_fw_stats *fw_stats, 8391 char *buf) 8392 { 8393 unsigned int len = 0; 8394 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE; 8395 const struct ath10k_fw_stats_pdev *pdev; 8396 const struct ath10k_fw_stats_vdev *vdev; 8397 const struct ath10k_fw_stats_peer *peer; 8398 size_t num_peers; 8399 size_t num_vdevs; 8400 8401 spin_lock_bh(&ar->data_lock); 8402 8403 pdev = list_first_entry_or_null(&fw_stats->pdevs, 8404 struct ath10k_fw_stats_pdev, list); 8405 if (!pdev) { 8406 ath10k_warn(ar, "failed to get pdev stats\n"); 8407 goto unlock; 8408 } 8409 8410 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); 8411 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); 8412 8413 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); 8414 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); 8415 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); 8416 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); 8417 8418 len += scnprintf(buf + len, buf_len - len, "\n"); 8419 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 8420 "ath10k VDEV stats", num_vdevs); 8421 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8422 "================="); 8423 8424 list_for_each_entry(vdev, &fw_stats->vdevs, list) { 8425 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); 8426 } 8427 8428 len += scnprintf(buf + len, buf_len - len, "\n"); 8429 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 8430 "ath10k PEER stats", num_peers); 8431 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8432 "================="); 8433 8434 list_for_each_entry(peer, &fw_stats->peers, list) { 8435 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); 8436 } 8437 8438 unlock: 8439 spin_unlock_bh(&ar->data_lock); 8440 8441 if (len >= buf_len) 8442 buf[len - 1] = 0; 8443 else 8444 buf[len] = 0; 8445 } 8446 8447 static struct sk_buff * 8448 ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable, 8449 u32 detect_level, u32 detect_margin) 8450 { 8451 struct wmi_pdev_set_adaptive_cca_params *cmd; 8452 struct sk_buff *skb; 8453 8454 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8455 if (!skb) 8456 return ERR_PTR(-ENOMEM); 8457 8458 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data; 8459 cmd->enable = __cpu_to_le32(enable); 8460 cmd->cca_detect_level = __cpu_to_le32(detect_level); 8461 cmd->cca_detect_margin = __cpu_to_le32(detect_margin); 8462 8463 ath10k_dbg(ar, ATH10K_DBG_WMI, 8464 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n", 8465 enable, detect_level, detect_margin); 8466 return skb; 8467 } 8468 8469 static void 8470 ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev, 8471 char *buf, u32 *length) 8472 { 8473 u32 len = *length; 8474 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8475 u32 val; 8476 8477 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8478 "vdev id", vdev->vdev_id); 8479 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8480 "ppdu aggr count", vdev->ppdu_aggr_cnt); 8481 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8482 "ppdu noack", vdev->ppdu_noack); 8483 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8484 "mpdu queued", vdev->mpdu_queued); 8485 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8486 "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt); 8487 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8488 "mpdu sw requeued", vdev->mpdu_sw_requeued); 8489 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8490 "mpdu success retry", vdev->mpdu_suc_retry); 8491 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8492 "mpdu success multitry", vdev->mpdu_suc_multitry); 8493 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8494 "mpdu fail retry", vdev->mpdu_fail_retry); 8495 val = vdev->tx_ftm_suc; 8496 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID) 8497 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8498 "tx ftm success", 8499 MS(val, WMI_VDEV_STATS_FTM_COUNT)); 8500 val = vdev->tx_ftm_suc_retry; 8501 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID) 8502 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8503 "tx ftm success retry", 8504 MS(val, WMI_VDEV_STATS_FTM_COUNT)); 8505 val = vdev->tx_ftm_fail; 8506 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID) 8507 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8508 "tx ftm fail", 8509 MS(val, WMI_VDEV_STATS_FTM_COUNT)); 8510 val = vdev->rx_ftmr_cnt; 8511 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID) 8512 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8513 "rx ftm request count", 8514 MS(val, WMI_VDEV_STATS_FTM_COUNT)); 8515 val = vdev->rx_ftmr_dup_cnt; 8516 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID) 8517 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8518 "rx ftm request dup count", 8519 MS(val, WMI_VDEV_STATS_FTM_COUNT)); 8520 val = vdev->rx_iftmr_cnt; 8521 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID) 8522 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8523 "rx initial ftm req count", 8524 MS(val, WMI_VDEV_STATS_FTM_COUNT)); 8525 val = vdev->rx_iftmr_dup_cnt; 8526 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID) 8527 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8528 "rx initial ftm req dup cnt", 8529 MS(val, WMI_VDEV_STATS_FTM_COUNT)); 8530 len += scnprintf(buf + len, buf_len - len, "\n"); 8531 8532 *length = len; 8533 } 8534 8535 void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar, 8536 struct ath10k_fw_stats *fw_stats, 8537 char *buf) 8538 { 8539 u32 len = 0; 8540 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 8541 const struct ath10k_fw_stats_pdev *pdev; 8542 const struct ath10k_fw_stats_vdev_extd *vdev; 8543 const struct ath10k_fw_stats_peer *peer; 8544 size_t num_peers; 8545 size_t num_vdevs; 8546 8547 spin_lock_bh(&ar->data_lock); 8548 8549 pdev = list_first_entry_or_null(&fw_stats->pdevs, 8550 struct ath10k_fw_stats_pdev, list); 8551 if (!pdev) { 8552 ath10k_warn(ar, "failed to get pdev stats\n"); 8553 goto unlock; 8554 } 8555 8556 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); 8557 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); 8558 8559 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); 8560 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); 8561 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); 8562 8563 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8564 "HW paused", pdev->hw_paused); 8565 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8566 "Seqs posted", pdev->seq_posted); 8567 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8568 "Seqs failed queueing", pdev->seq_failed_queueing); 8569 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8570 "Seqs completed", pdev->seq_completed); 8571 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8572 "Seqs restarted", pdev->seq_restarted); 8573 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8574 "MU Seqs posted", pdev->mu_seq_posted); 8575 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8576 "MPDUs SW flushed", pdev->mpdus_sw_flush); 8577 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8578 "MPDUs HW filtered", pdev->mpdus_hw_filter); 8579 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8580 "MPDUs truncated", pdev->mpdus_truncated); 8581 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8582 "MPDUs receive no ACK", pdev->mpdus_ack_failed); 8583 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8584 "MPDUs expired", pdev->mpdus_expired); 8585 8586 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); 8587 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8588 "Num Rx Overflow errors", pdev->rx_ovfl_errs); 8589 8590 len += scnprintf(buf + len, buf_len - len, "\n"); 8591 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 8592 "ath10k VDEV stats", num_vdevs); 8593 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8594 "================="); 8595 list_for_each_entry(vdev, &fw_stats->vdevs, list) { 8596 ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len); 8597 } 8598 8599 len += scnprintf(buf + len, buf_len - len, "\n"); 8600 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 8601 "ath10k PEER stats", num_peers); 8602 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8603 "================="); 8604 8605 list_for_each_entry(peer, &fw_stats->peers, list) { 8606 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); 8607 } 8608 8609 unlock: 8610 spin_unlock_bh(&ar->data_lock); 8611 8612 if (len >= buf_len) 8613 buf[len - 1] = 0; 8614 else 8615 buf[len] = 0; 8616 } 8617 8618 int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar, 8619 enum wmi_vdev_subtype subtype) 8620 { 8621 switch (subtype) { 8622 case WMI_VDEV_SUBTYPE_NONE: 8623 return WMI_VDEV_SUBTYPE_LEGACY_NONE; 8624 case WMI_VDEV_SUBTYPE_P2P_DEVICE: 8625 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV; 8626 case WMI_VDEV_SUBTYPE_P2P_CLIENT: 8627 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI; 8628 case WMI_VDEV_SUBTYPE_P2P_GO: 8629 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO; 8630 case WMI_VDEV_SUBTYPE_PROXY_STA: 8631 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA; 8632 case WMI_VDEV_SUBTYPE_MESH_11S: 8633 case WMI_VDEV_SUBTYPE_MESH_NON_11S: 8634 return -ENOTSUPP; 8635 } 8636 return -ENOTSUPP; 8637 } 8638 8639 static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar, 8640 enum wmi_vdev_subtype subtype) 8641 { 8642 switch (subtype) { 8643 case WMI_VDEV_SUBTYPE_NONE: 8644 return WMI_VDEV_SUBTYPE_10_2_4_NONE; 8645 case WMI_VDEV_SUBTYPE_P2P_DEVICE: 8646 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV; 8647 case WMI_VDEV_SUBTYPE_P2P_CLIENT: 8648 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI; 8649 case WMI_VDEV_SUBTYPE_P2P_GO: 8650 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO; 8651 case WMI_VDEV_SUBTYPE_PROXY_STA: 8652 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA; 8653 case WMI_VDEV_SUBTYPE_MESH_11S: 8654 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S; 8655 case WMI_VDEV_SUBTYPE_MESH_NON_11S: 8656 return -ENOTSUPP; 8657 } 8658 return -ENOTSUPP; 8659 } 8660 8661 static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar, 8662 enum wmi_vdev_subtype subtype) 8663 { 8664 switch (subtype) { 8665 case WMI_VDEV_SUBTYPE_NONE: 8666 return WMI_VDEV_SUBTYPE_10_4_NONE; 8667 case WMI_VDEV_SUBTYPE_P2P_DEVICE: 8668 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV; 8669 case WMI_VDEV_SUBTYPE_P2P_CLIENT: 8670 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI; 8671 case WMI_VDEV_SUBTYPE_P2P_GO: 8672 return WMI_VDEV_SUBTYPE_10_4_P2P_GO; 8673 case WMI_VDEV_SUBTYPE_PROXY_STA: 8674 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA; 8675 case WMI_VDEV_SUBTYPE_MESH_11S: 8676 return WMI_VDEV_SUBTYPE_10_4_MESH_11S; 8677 case WMI_VDEV_SUBTYPE_MESH_NON_11S: 8678 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S; 8679 } 8680 return -ENOTSUPP; 8681 } 8682 8683 static struct sk_buff * 8684 ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar, 8685 enum wmi_host_platform_type type, 8686 u32 fw_feature_bitmap) 8687 { 8688 struct wmi_ext_resource_config_10_4_cmd *cmd; 8689 struct sk_buff *skb; 8690 u32 num_tdls_sleep_sta = 0; 8691 8692 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8693 if (!skb) 8694 return ERR_PTR(-ENOMEM); 8695 8696 if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map)) 8697 num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA; 8698 8699 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data; 8700 cmd->host_platform_config = __cpu_to_le32(type); 8701 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap); 8702 cmd->wlan_gpio_priority = __cpu_to_le32(-1); 8703 cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT); 8704 cmd->coex_gpio_pin1 = __cpu_to_le32(-1); 8705 cmd->coex_gpio_pin2 = __cpu_to_le32(-1); 8706 cmd->coex_gpio_pin3 = __cpu_to_le32(-1); 8707 cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS); 8708 cmd->num_tdls_conn_table_entries = __cpu_to_le32(20); 8709 cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta); 8710 cmd->max_tdls_concurrent_buffer_sta = 8711 __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA); 8712 8713 ath10k_dbg(ar, ATH10K_DBG_WMI, 8714 "wmi ext resource config host type %d firmware feature bitmap %08x\n", 8715 type, fw_feature_bitmap); 8716 return skb; 8717 } 8718 8719 static struct sk_buff * 8720 ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id, 8721 enum wmi_tdls_state state) 8722 { 8723 struct wmi_10_4_tdls_set_state_cmd *cmd; 8724 struct sk_buff *skb; 8725 u32 options = 0; 8726 8727 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8728 if (!skb) 8729 return ERR_PTR(-ENOMEM); 8730 8731 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) && 8732 state == WMI_TDLS_ENABLE_ACTIVE) 8733 state = WMI_TDLS_ENABLE_PASSIVE; 8734 8735 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map)) 8736 options |= WMI_TDLS_BUFFER_STA_EN; 8737 8738 cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data; 8739 cmd->vdev_id = __cpu_to_le32(vdev_id); 8740 cmd->state = __cpu_to_le32(state); 8741 cmd->notification_interval_ms = __cpu_to_le32(5000); 8742 cmd->tx_discovery_threshold = __cpu_to_le32(100); 8743 cmd->tx_teardown_threshold = __cpu_to_le32(5); 8744 cmd->rssi_teardown_threshold = __cpu_to_le32(-75); 8745 cmd->rssi_delta = __cpu_to_le32(-20); 8746 cmd->tdls_options = __cpu_to_le32(options); 8747 cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2); 8748 cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000); 8749 cmd->tdls_puapsd_mask = __cpu_to_le32(0xf); 8750 cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0); 8751 cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10); 8752 cmd->teardown_notification_ms = __cpu_to_le32(10); 8753 cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96); 8754 8755 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n", 8756 state, vdev_id); 8757 return skb; 8758 } 8759 8760 static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp) 8761 { 8762 u32 peer_qos = 0; 8763 8764 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) 8765 peer_qos |= WMI_TDLS_PEER_QOS_AC_VO; 8766 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) 8767 peer_qos |= WMI_TDLS_PEER_QOS_AC_VI; 8768 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) 8769 peer_qos |= WMI_TDLS_PEER_QOS_AC_BK; 8770 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) 8771 peer_qos |= WMI_TDLS_PEER_QOS_AC_BE; 8772 8773 peer_qos |= SM(sp, WMI_TDLS_PEER_SP); 8774 8775 return peer_qos; 8776 } 8777 8778 static struct sk_buff * 8779 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param) 8780 { 8781 struct wmi_pdev_get_tpc_table_cmd *cmd; 8782 struct sk_buff *skb; 8783 8784 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8785 if (!skb) 8786 return ERR_PTR(-ENOMEM); 8787 8788 cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data; 8789 cmd->param = __cpu_to_le32(param); 8790 8791 ath10k_dbg(ar, ATH10K_DBG_WMI, 8792 "wmi pdev get tpc table param:%d\n", param); 8793 return skb; 8794 } 8795 8796 static struct sk_buff * 8797 ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar, 8798 const struct wmi_tdls_peer_update_cmd_arg *arg, 8799 const struct wmi_tdls_peer_capab_arg *cap, 8800 const struct wmi_channel_arg *chan_arg) 8801 { 8802 struct wmi_10_4_tdls_peer_update_cmd *cmd; 8803 struct wmi_tdls_peer_capabilities *peer_cap; 8804 struct wmi_channel *chan; 8805 struct sk_buff *skb; 8806 u32 peer_qos; 8807 int len, chan_len; 8808 int i; 8809 8810 /* tdls peer update cmd has place holder for one channel*/ 8811 chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0; 8812 8813 len = sizeof(*cmd) + chan_len * sizeof(*chan); 8814 8815 skb = ath10k_wmi_alloc_skb(ar, len); 8816 if (!skb) 8817 return ERR_PTR(-ENOMEM); 8818 8819 memset(skb->data, 0, sizeof(*cmd)); 8820 8821 cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data; 8822 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 8823 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr); 8824 cmd->peer_state = __cpu_to_le32(arg->peer_state); 8825 8826 peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues, 8827 cap->peer_max_sp); 8828 8829 peer_cap = &cmd->peer_capab; 8830 peer_cap->peer_qos = __cpu_to_le32(peer_qos); 8831 peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support); 8832 peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support); 8833 peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass); 8834 peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass); 8835 peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len); 8836 peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len); 8837 8838 for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++) 8839 peer_cap->peer_operclass[i] = cap->peer_operclass[i]; 8840 8841 peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder); 8842 peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num); 8843 peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw); 8844 8845 for (i = 0; i < cap->peer_chan_len; i++) { 8846 chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i]; 8847 ath10k_wmi_put_wmi_channel(chan, &chan_arg[i]); 8848 } 8849 8850 ath10k_dbg(ar, ATH10K_DBG_WMI, 8851 "wmi tdls peer update vdev %i state %d n_chans %u\n", 8852 arg->vdev_id, arg->peer_state, cap->peer_chan_len); 8853 return skb; 8854 } 8855 8856 static struct sk_buff * 8857 ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar, 8858 const struct ath10k_radar_found_info *arg) 8859 { 8860 struct wmi_radar_found_info *cmd; 8861 struct sk_buff *skb; 8862 8863 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8864 if (!skb) 8865 return ERR_PTR(-ENOMEM); 8866 8867 cmd = (struct wmi_radar_found_info *)skb->data; 8868 cmd->pri_min = __cpu_to_le32(arg->pri_min); 8869 cmd->pri_max = __cpu_to_le32(arg->pri_max); 8870 cmd->width_min = __cpu_to_le32(arg->width_min); 8871 cmd->width_max = __cpu_to_le32(arg->width_max); 8872 cmd->sidx_min = __cpu_to_le32(arg->sidx_min); 8873 cmd->sidx_max = __cpu_to_le32(arg->sidx_max); 8874 8875 ath10k_dbg(ar, ATH10K_DBG_WMI, 8876 "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n", 8877 arg->pri_min, arg->pri_max, arg->width_min, 8878 arg->width_max, arg->sidx_min, arg->sidx_max); 8879 return skb; 8880 } 8881 8882 static struct sk_buff * 8883 ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value) 8884 { 8885 struct wmi_echo_cmd *cmd; 8886 struct sk_buff *skb; 8887 8888 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8889 if (!skb) 8890 return ERR_PTR(-ENOMEM); 8891 8892 cmd = (struct wmi_echo_cmd *)skb->data; 8893 cmd->value = cpu_to_le32(value); 8894 8895 ath10k_dbg(ar, ATH10K_DBG_WMI, 8896 "wmi echo value 0x%08x\n", value); 8897 return skb; 8898 } 8899 8900 int 8901 ath10k_wmi_barrier(struct ath10k *ar) 8902 { 8903 int ret; 8904 int time_left; 8905 8906 spin_lock_bh(&ar->data_lock); 8907 reinit_completion(&ar->wmi.barrier); 8908 spin_unlock_bh(&ar->data_lock); 8909 8910 ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID); 8911 if (ret) { 8912 ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret); 8913 return ret; 8914 } 8915 8916 time_left = wait_for_completion_timeout(&ar->wmi.barrier, 8917 ATH10K_WMI_BARRIER_TIMEOUT_HZ); 8918 if (!time_left) 8919 return -ETIMEDOUT; 8920 8921 return 0; 8922 } 8923 8924 static struct sk_buff * 8925 ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k *ar, 8926 const struct wmi_bb_timing_cfg_arg *arg) 8927 { 8928 struct wmi_pdev_bb_timing_cfg_cmd *cmd; 8929 struct sk_buff *skb; 8930 8931 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 8932 if (!skb) 8933 return ERR_PTR(-ENOMEM); 8934 8935 cmd = (struct wmi_pdev_bb_timing_cfg_cmd *)skb->data; 8936 cmd->bb_tx_timing = __cpu_to_le32(arg->bb_tx_timing); 8937 cmd->bb_xpa_timing = __cpu_to_le32(arg->bb_xpa_timing); 8938 8939 ath10k_dbg(ar, ATH10K_DBG_WMI, 8940 "wmi pdev bb_tx_timing 0x%x bb_xpa_timing 0x%x\n", 8941 arg->bb_tx_timing, arg->bb_xpa_timing); 8942 return skb; 8943 } 8944 8945 static const struct wmi_ops wmi_ops = { 8946 .rx = ath10k_wmi_op_rx, 8947 .map_svc = wmi_main_svc_map, 8948 8949 .pull_scan = ath10k_wmi_op_pull_scan_ev, 8950 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, 8951 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, 8952 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 8953 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 8954 .pull_swba = ath10k_wmi_op_pull_swba_ev, 8955 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, 8956 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, 8957 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, 8958 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 8959 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats, 8960 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, 8961 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev, 8962 8963 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 8964 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 8965 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd, 8966 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 8967 .gen_init = ath10k_wmi_op_gen_init, 8968 .gen_start_scan = ath10k_wmi_op_gen_start_scan, 8969 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 8970 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 8971 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 8972 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 8973 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 8974 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 8975 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 8976 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 8977 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 8978 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 8979 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 8980 /* .gen_vdev_wmm_conf not implemented */ 8981 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 8982 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 8983 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 8984 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 8985 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc, 8986 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 8987 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 8988 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 8989 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 8990 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 8991 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 8992 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 8993 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 8994 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 8995 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, 8996 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 8997 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 8998 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 8999 /* .gen_pdev_get_temperature not implemented */ 9000 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 9001 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 9002 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 9003 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 9004 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill, 9005 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, 9006 .gen_echo = ath10k_wmi_op_gen_echo, 9007 /* .gen_bcn_tmpl not implemented */ 9008 /* .gen_prb_tmpl not implemented */ 9009 /* .gen_p2p_go_bcn_ie not implemented */ 9010 /* .gen_adaptive_qcs not implemented */ 9011 /* .gen_pdev_enable_adaptive_cca not implemented */ 9012 }; 9013 9014 static const struct wmi_ops wmi_10_1_ops = { 9015 .rx = ath10k_wmi_10_1_op_rx, 9016 .map_svc = wmi_10x_svc_map, 9017 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, 9018 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats, 9019 .gen_init = ath10k_wmi_10_1_op_gen_init, 9020 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, 9021 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, 9022 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc, 9023 /* .gen_pdev_get_temperature not implemented */ 9024 9025 /* shared with main branch */ 9026 .pull_scan = ath10k_wmi_op_pull_scan_ev, 9027 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, 9028 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, 9029 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 9030 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 9031 .pull_swba = ath10k_wmi_op_pull_swba_ev, 9032 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, 9033 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, 9034 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 9035 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, 9036 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev, 9037 9038 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 9039 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 9040 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 9041 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 9042 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 9043 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 9044 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 9045 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 9046 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 9047 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 9048 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 9049 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 9050 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 9051 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 9052 /* .gen_vdev_wmm_conf not implemented */ 9053 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 9054 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 9055 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 9056 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 9057 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 9058 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 9059 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 9060 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 9061 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 9062 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 9063 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 9064 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 9065 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 9066 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, 9067 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 9068 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 9069 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 9070 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 9071 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 9072 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 9073 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 9074 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, 9075 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, 9076 .gen_echo = ath10k_wmi_op_gen_echo, 9077 /* .gen_bcn_tmpl not implemented */ 9078 /* .gen_prb_tmpl not implemented */ 9079 /* .gen_p2p_go_bcn_ie not implemented */ 9080 /* .gen_adaptive_qcs not implemented */ 9081 /* .gen_pdev_enable_adaptive_cca not implemented */ 9082 }; 9083 9084 static const struct wmi_ops wmi_10_2_ops = { 9085 .rx = ath10k_wmi_10_2_op_rx, 9086 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats, 9087 .gen_init = ath10k_wmi_10_2_op_gen_init, 9088 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, 9089 /* .gen_pdev_get_temperature not implemented */ 9090 9091 /* shared with 10.1 */ 9092 .map_svc = wmi_10x_svc_map, 9093 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, 9094 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, 9095 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, 9096 .gen_echo = ath10k_wmi_op_gen_echo, 9097 9098 .pull_scan = ath10k_wmi_op_pull_scan_ev, 9099 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, 9100 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, 9101 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 9102 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 9103 .pull_swba = ath10k_wmi_op_pull_swba_ev, 9104 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, 9105 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, 9106 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 9107 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, 9108 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev, 9109 9110 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 9111 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 9112 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 9113 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 9114 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 9115 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 9116 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 9117 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 9118 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 9119 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 9120 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 9121 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 9122 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 9123 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 9124 /* .gen_vdev_wmm_conf not implemented */ 9125 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 9126 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 9127 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 9128 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr, 9129 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 9130 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 9131 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 9132 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 9133 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 9134 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 9135 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 9136 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 9137 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 9138 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 9139 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, 9140 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 9141 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 9142 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 9143 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 9144 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 9145 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 9146 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 9147 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, 9148 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, 9149 /* .gen_pdev_enable_adaptive_cca not implemented */ 9150 }; 9151 9152 static const struct wmi_ops wmi_10_2_4_ops = { 9153 .rx = ath10k_wmi_10_2_op_rx, 9154 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats, 9155 .gen_init = ath10k_wmi_10_2_op_gen_init, 9156 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, 9157 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, 9158 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info, 9159 9160 /* shared with 10.1 */ 9161 .map_svc = wmi_10x_svc_map, 9162 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, 9163 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, 9164 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, 9165 .gen_echo = ath10k_wmi_op_gen_echo, 9166 9167 .pull_scan = ath10k_wmi_op_pull_scan_ev, 9168 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, 9169 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, 9170 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 9171 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 9172 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev, 9173 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, 9174 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, 9175 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 9176 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, 9177 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev, 9178 9179 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 9180 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 9181 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 9182 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 9183 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 9184 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 9185 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 9186 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 9187 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 9188 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 9189 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 9190 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 9191 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 9192 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 9193 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 9194 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 9195 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 9196 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 9197 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 9198 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 9199 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 9200 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 9201 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 9202 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 9203 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 9204 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 9205 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 9206 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, 9207 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 9208 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 9209 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 9210 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 9211 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 9212 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 9213 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 9214 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config, 9215 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, 9216 .gen_pdev_enable_adaptive_cca = 9217 ath10k_wmi_op_gen_pdev_enable_adaptive_cca, 9218 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype, 9219 .gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing, 9220 /* .gen_bcn_tmpl not implemented */ 9221 /* .gen_prb_tmpl not implemented */ 9222 /* .gen_p2p_go_bcn_ie not implemented */ 9223 /* .gen_adaptive_qcs not implemented */ 9224 }; 9225 9226 static const struct wmi_ops wmi_10_4_ops = { 9227 .rx = ath10k_wmi_10_4_op_rx, 9228 .map_svc = wmi_10_4_svc_map, 9229 9230 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats, 9231 .pull_scan = ath10k_wmi_op_pull_scan_ev, 9232 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev, 9233 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev, 9234 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 9235 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 9236 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev, 9237 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr, 9238 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev, 9239 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, 9240 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 9241 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, 9242 .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev, 9243 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme, 9244 9245 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 9246 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 9247 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr, 9248 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, 9249 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 9250 .gen_init = ath10k_wmi_10_4_op_gen_init, 9251 .gen_start_scan = ath10k_wmi_op_gen_start_scan, 9252 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 9253 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 9254 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 9255 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 9256 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 9257 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 9258 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 9259 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 9260 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 9261 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 9262 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 9263 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 9264 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 9265 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 9266 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 9267 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc, 9268 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 9269 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 9270 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 9271 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 9272 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 9273 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 9274 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 9275 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 9276 .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg, 9277 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 9278 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 9279 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 9280 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 9281 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 9282 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 9283 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 9284 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill, 9285 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config, 9286 .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state, 9287 .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update, 9288 .gen_pdev_get_tpc_table_cmdid = 9289 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid, 9290 .gen_radar_found = ath10k_wmi_10_4_gen_radar_found, 9291 9292 /* shared with 10.2 */ 9293 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev, 9294 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 9295 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, 9296 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype, 9297 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info, 9298 .gen_echo = ath10k_wmi_op_gen_echo, 9299 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config, 9300 }; 9301 9302 int ath10k_wmi_attach(struct ath10k *ar) 9303 { 9304 switch (ar->running_fw->fw_file.wmi_op_version) { 9305 case ATH10K_FW_WMI_OP_VERSION_10_4: 9306 ar->wmi.ops = &wmi_10_4_ops; 9307 ar->wmi.cmd = &wmi_10_4_cmd_map; 9308 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map; 9309 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map; 9310 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; 9311 ar->wmi_key_cipher = wmi_key_cipher_suites; 9312 break; 9313 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 9314 ar->wmi.cmd = &wmi_10_2_4_cmd_map; 9315 ar->wmi.ops = &wmi_10_2_4_ops; 9316 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map; 9317 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map; 9318 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; 9319 ar->wmi_key_cipher = wmi_key_cipher_suites; 9320 break; 9321 case ATH10K_FW_WMI_OP_VERSION_10_2: 9322 ar->wmi.cmd = &wmi_10_2_cmd_map; 9323 ar->wmi.ops = &wmi_10_2_ops; 9324 ar->wmi.vdev_param = &wmi_10x_vdev_param_map; 9325 ar->wmi.pdev_param = &wmi_10x_pdev_param_map; 9326 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; 9327 ar->wmi_key_cipher = wmi_key_cipher_suites; 9328 break; 9329 case ATH10K_FW_WMI_OP_VERSION_10_1: 9330 ar->wmi.cmd = &wmi_10x_cmd_map; 9331 ar->wmi.ops = &wmi_10_1_ops; 9332 ar->wmi.vdev_param = &wmi_10x_vdev_param_map; 9333 ar->wmi.pdev_param = &wmi_10x_pdev_param_map; 9334 ar->wmi.peer_flags = &wmi_10x_peer_flags_map; 9335 ar->wmi_key_cipher = wmi_key_cipher_suites; 9336 break; 9337 case ATH10K_FW_WMI_OP_VERSION_MAIN: 9338 ar->wmi.cmd = &wmi_cmd_map; 9339 ar->wmi.ops = &wmi_ops; 9340 ar->wmi.vdev_param = &wmi_vdev_param_map; 9341 ar->wmi.pdev_param = &wmi_pdev_param_map; 9342 ar->wmi.peer_flags = &wmi_peer_flags_map; 9343 ar->wmi_key_cipher = wmi_key_cipher_suites; 9344 break; 9345 case ATH10K_FW_WMI_OP_VERSION_TLV: 9346 ath10k_wmi_tlv_attach(ar); 9347 ar->wmi_key_cipher = wmi_tlv_key_cipher_suites; 9348 break; 9349 case ATH10K_FW_WMI_OP_VERSION_UNSET: 9350 case ATH10K_FW_WMI_OP_VERSION_MAX: 9351 ath10k_err(ar, "unsupported WMI op version: %d\n", 9352 ar->running_fw->fw_file.wmi_op_version); 9353 return -EINVAL; 9354 } 9355 9356 init_completion(&ar->wmi.service_ready); 9357 init_completion(&ar->wmi.unified_ready); 9358 init_completion(&ar->wmi.barrier); 9359 init_completion(&ar->wmi.radar_confirm); 9360 9361 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work); 9362 INIT_WORK(&ar->radar_confirmation_work, 9363 ath10k_radar_confirmation_work); 9364 9365 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF, 9366 ar->running_fw->fw_file.fw_features)) { 9367 idr_init(&ar->wmi.mgmt_pending_tx); 9368 } 9369 9370 return 0; 9371 } 9372 9373 void ath10k_wmi_free_host_mem(struct ath10k *ar) 9374 { 9375 int i; 9376 9377 /* free the host memory chunks requested by firmware */ 9378 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 9379 dma_free_coherent(ar->dev, 9380 ar->wmi.mem_chunks[i].len, 9381 ar->wmi.mem_chunks[i].vaddr, 9382 ar->wmi.mem_chunks[i].paddr); 9383 } 9384 9385 ar->wmi.num_mem_chunks = 0; 9386 } 9387 9388 static int ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id, void *ptr, 9389 void *ctx) 9390 { 9391 struct ath10k_mgmt_tx_pkt_addr *pkt_addr = ptr; 9392 struct ath10k *ar = ctx; 9393 struct sk_buff *msdu; 9394 9395 ath10k_dbg(ar, ATH10K_DBG_WMI, 9396 "force cleanup mgmt msdu_id %hu\n", msdu_id); 9397 9398 msdu = pkt_addr->vaddr; 9399 dma_unmap_single(ar->dev, pkt_addr->paddr, 9400 msdu->len, DMA_FROM_DEVICE); 9401 ieee80211_free_txskb(ar->hw, msdu); 9402 9403 return 0; 9404 } 9405 9406 void ath10k_wmi_detach(struct ath10k *ar) 9407 { 9408 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF, 9409 ar->running_fw->fw_file.fw_features)) { 9410 spin_lock_bh(&ar->data_lock); 9411 idr_for_each(&ar->wmi.mgmt_pending_tx, 9412 ath10k_wmi_mgmt_tx_clean_up_pending, ar); 9413 idr_destroy(&ar->wmi.mgmt_pending_tx); 9414 spin_unlock_bh(&ar->data_lock); 9415 } 9416 9417 cancel_work_sync(&ar->svc_rdy_work); 9418 9419 if (ar->svc_rdy_skb) 9420 dev_kfree_skb(ar->svc_rdy_skb); 9421 } 9422