1 // SPDX-License-Identifier: GPL-2.0-only 2 /******************************************************************************* 3 This contains the functions to handle the platform driver. 4 5 Copyright (C) 2007-2011 STMicroelectronics Ltd 6 7 8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 9 *******************************************************************************/ 10 11 #include <linux/platform_device.h> 12 #include <linux/module.h> 13 #include <linux/io.h> 14 #include <linux/of.h> 15 #include <linux/of_net.h> 16 #include <linux/of_device.h> 17 #include <linux/of_mdio.h> 18 19 #include "stmmac.h" 20 #include "stmmac_platform.h" 21 22 #ifdef CONFIG_OF 23 24 /** 25 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins 26 * @dev: struct device of the platform device 27 * @mcast_bins: Multicast filtering bins 28 * Description: 29 * this function validates the number of Multicast filtering bins specified 30 * by the configuration through the device tree. The Synopsys GMAC supports 31 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC 32 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds 33 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is 34 * invalid and will cause the filtering algorithm to use Multicast 35 * promiscuous mode. 36 */ 37 static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins) 38 { 39 int x = mcast_bins; 40 41 switch (x) { 42 case HASH_TABLE_SIZE: 43 case 128: 44 case 256: 45 break; 46 default: 47 x = 0; 48 dev_info(dev, "Hash table entries set to unexpected value %d\n", 49 mcast_bins); 50 break; 51 } 52 return x; 53 } 54 55 /** 56 * dwmac1000_validate_ucast_entries - validate the Unicast address entries 57 * @dev: struct device of the platform device 58 * @ucast_entries: number of Unicast address entries 59 * Description: 60 * This function validates the number of Unicast address entries supported 61 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller 62 * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter 63 * logic. This function validates a valid, supported configuration is 64 * selected, and defaults to 1 Unicast address if an unsupported 65 * configuration is selected. 66 */ 67 static int dwmac1000_validate_ucast_entries(struct device *dev, 68 int ucast_entries) 69 { 70 int x = ucast_entries; 71 72 switch (x) { 73 case 1 ... 32: 74 case 64: 75 case 128: 76 break; 77 default: 78 x = 1; 79 dev_info(dev, "Unicast table entries set to unexpected value %d\n", 80 ucast_entries); 81 break; 82 } 83 return x; 84 } 85 86 /** 87 * stmmac_axi_setup - parse DT parameters for programming the AXI register 88 * @pdev: platform device 89 * Description: 90 * if required, from device-tree the AXI internal register can be tuned 91 * by using platform parameters. 92 */ 93 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev) 94 { 95 struct device_node *np; 96 struct stmmac_axi *axi; 97 98 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); 99 if (!np) 100 return NULL; 101 102 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); 103 if (!axi) { 104 of_node_put(np); 105 return ERR_PTR(-ENOMEM); 106 } 107 108 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en"); 109 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm"); 110 axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe"); 111 axi->axi_fb = of_property_read_bool(np, "snps,axi_fb"); 112 axi->axi_mb = of_property_read_bool(np, "snps,axi_mb"); 113 axi->axi_rb = of_property_read_bool(np, "snps,axi_rb"); 114 115 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt)) 116 axi->axi_wr_osr_lmt = 1; 117 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt)) 118 axi->axi_rd_osr_lmt = 1; 119 of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN); 120 of_node_put(np); 121 122 return axi; 123 } 124 125 /** 126 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration 127 * @pdev: platform device 128 * @plat: enet data 129 */ 130 static int stmmac_mtl_setup(struct platform_device *pdev, 131 struct plat_stmmacenet_data *plat) 132 { 133 struct device_node *q_node; 134 struct device_node *rx_node; 135 struct device_node *tx_node; 136 u8 queue = 0; 137 int ret = 0; 138 139 /* For backwards-compatibility with device trees that don't have any 140 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back 141 * to one RX and TX queues each. 142 */ 143 plat->rx_queues_to_use = 1; 144 plat->tx_queues_to_use = 1; 145 146 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need 147 * to always set this, otherwise Queue will be classified as AVB 148 * (because MTL_QUEUE_AVB = 0). 149 */ 150 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB; 151 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB; 152 153 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0); 154 if (!rx_node) 155 return ret; 156 157 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0); 158 if (!tx_node) { 159 of_node_put(rx_node); 160 return ret; 161 } 162 163 /* Processing RX queues common config */ 164 if (of_property_read_u32(rx_node, "snps,rx-queues-to-use", 165 &plat->rx_queues_to_use)) 166 plat->rx_queues_to_use = 1; 167 168 if (of_property_read_bool(rx_node, "snps,rx-sched-sp")) 169 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; 170 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp")) 171 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP; 172 else 173 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; 174 175 /* Processing individual RX queue config */ 176 for_each_child_of_node(rx_node, q_node) { 177 if (queue >= plat->rx_queues_to_use) 178 break; 179 180 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) 181 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 182 else if (of_property_read_bool(q_node, "snps,avb-algorithm")) 183 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; 184 else 185 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 186 187 if (of_property_read_u32(q_node, "snps,map-to-dma-channel", 188 &plat->rx_queues_cfg[queue].chan)) 189 plat->rx_queues_cfg[queue].chan = queue; 190 /* TODO: Dynamic mapping to be included in the future */ 191 192 if (of_property_read_u32(q_node, "snps,priority", 193 &plat->rx_queues_cfg[queue].prio)) { 194 plat->rx_queues_cfg[queue].prio = 0; 195 plat->rx_queues_cfg[queue].use_prio = false; 196 } else { 197 plat->rx_queues_cfg[queue].use_prio = true; 198 } 199 200 /* RX queue specific packet type routing */ 201 if (of_property_read_bool(q_node, "snps,route-avcp")) 202 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ; 203 else if (of_property_read_bool(q_node, "snps,route-ptp")) 204 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ; 205 else if (of_property_read_bool(q_node, "snps,route-dcbcp")) 206 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ; 207 else if (of_property_read_bool(q_node, "snps,route-up")) 208 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ; 209 else if (of_property_read_bool(q_node, "snps,route-multi-broad")) 210 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ; 211 else 212 plat->rx_queues_cfg[queue].pkt_route = 0x0; 213 214 queue++; 215 } 216 if (queue != plat->rx_queues_to_use) { 217 ret = -EINVAL; 218 dev_err(&pdev->dev, "Not all RX queues were configured\n"); 219 goto out; 220 } 221 222 /* Processing TX queues common config */ 223 if (of_property_read_u32(tx_node, "snps,tx-queues-to-use", 224 &plat->tx_queues_to_use)) 225 plat->tx_queues_to_use = 1; 226 227 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr")) 228 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR; 229 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq")) 230 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ; 231 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr")) 232 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR; 233 else 234 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP; 235 236 queue = 0; 237 238 /* Processing individual TX queue config */ 239 for_each_child_of_node(tx_node, q_node) { 240 if (queue >= plat->tx_queues_to_use) 241 break; 242 243 if (of_property_read_u32(q_node, "snps,weight", 244 &plat->tx_queues_cfg[queue].weight)) 245 plat->tx_queues_cfg[queue].weight = 0x10 + queue; 246 247 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) { 248 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 249 } else if (of_property_read_bool(q_node, 250 "snps,avb-algorithm")) { 251 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; 252 253 /* Credit Base Shaper parameters used by AVB */ 254 if (of_property_read_u32(q_node, "snps,send_slope", 255 &plat->tx_queues_cfg[queue].send_slope)) 256 plat->tx_queues_cfg[queue].send_slope = 0x0; 257 if (of_property_read_u32(q_node, "snps,idle_slope", 258 &plat->tx_queues_cfg[queue].idle_slope)) 259 plat->tx_queues_cfg[queue].idle_slope = 0x0; 260 if (of_property_read_u32(q_node, "snps,high_credit", 261 &plat->tx_queues_cfg[queue].high_credit)) 262 plat->tx_queues_cfg[queue].high_credit = 0x0; 263 if (of_property_read_u32(q_node, "snps,low_credit", 264 &plat->tx_queues_cfg[queue].low_credit)) 265 plat->tx_queues_cfg[queue].low_credit = 0x0; 266 } else { 267 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 268 } 269 270 if (of_property_read_u32(q_node, "snps,priority", 271 &plat->tx_queues_cfg[queue].prio)) { 272 plat->tx_queues_cfg[queue].prio = 0; 273 plat->tx_queues_cfg[queue].use_prio = false; 274 } else { 275 plat->tx_queues_cfg[queue].use_prio = true; 276 } 277 278 queue++; 279 } 280 if (queue != plat->tx_queues_to_use) { 281 ret = -EINVAL; 282 dev_err(&pdev->dev, "Not all TX queues were configured\n"); 283 goto out; 284 } 285 286 out: 287 of_node_put(rx_node); 288 of_node_put(tx_node); 289 of_node_put(q_node); 290 291 return ret; 292 } 293 294 /** 295 * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources 296 * @plat: driver data platform structure 297 * @np: device tree node 298 * @dev: device pointer 299 * Description: 300 * The mdio bus will be allocated in case of a phy transceiver is on board; 301 * it will be NULL if the fixed-link is configured. 302 * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated 303 * in any case (for DSA, mdio must be registered even if fixed-link). 304 * The table below sums the supported configurations: 305 * ------------------------------- 306 * snps,phy-addr | Y 307 * ------------------------------- 308 * phy-handle | Y 309 * ------------------------------- 310 * fixed-link | N 311 * ------------------------------- 312 * snps,dwmac-mdio | 313 * even if | Y 314 * fixed-link | 315 * ------------------------------- 316 * 317 * It returns 0 in case of success otherwise -ENODEV. 318 */ 319 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, 320 struct device_node *np, struct device *dev) 321 { 322 bool mdio = !of_phy_is_fixed_link(np); 323 static const struct of_device_id need_mdio_ids[] = { 324 { .compatible = "snps,dwc-qos-ethernet-4.10" }, 325 {}, 326 }; 327 328 if (of_match_node(need_mdio_ids, np)) { 329 plat->mdio_node = of_get_child_by_name(np, "mdio"); 330 } else { 331 /** 332 * If snps,dwmac-mdio is passed from DT, always register 333 * the MDIO 334 */ 335 for_each_child_of_node(np, plat->mdio_node) { 336 if (of_device_is_compatible(plat->mdio_node, 337 "snps,dwmac-mdio")) 338 break; 339 } 340 } 341 342 if (plat->mdio_node) { 343 dev_dbg(dev, "Found MDIO subnode\n"); 344 mdio = true; 345 } 346 347 if (mdio) { 348 plat->mdio_bus_data = 349 devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data), 350 GFP_KERNEL); 351 if (!plat->mdio_bus_data) 352 return -ENOMEM; 353 354 plat->mdio_bus_data->needs_reset = true; 355 } 356 357 return 0; 358 } 359 360 /** 361 * stmmac_of_get_mac_mode - retrieves the interface of the MAC 362 * @np: - device-tree node 363 * Description: 364 * Similar to `of_get_phy_mode()`, this function will retrieve (from 365 * the device-tree) the interface mode on the MAC side. This assumes 366 * that there is mode converter in-between the MAC & PHY 367 * (e.g. GMII-to-RGMII). 368 */ 369 static int stmmac_of_get_mac_mode(struct device_node *np) 370 { 371 const char *pm; 372 int err, i; 373 374 err = of_property_read_string(np, "mac-mode", &pm); 375 if (err < 0) 376 return err; 377 378 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) { 379 if (!strcasecmp(pm, phy_modes(i))) 380 return i; 381 } 382 383 return -ENODEV; 384 } 385 386 /** 387 * stmmac_probe_config_dt - parse device-tree driver parameters 388 * @pdev: platform_device structure 389 * @mac: MAC address to use 390 * Description: 391 * this function is to read the driver parameters from device-tree and 392 * set some private fields that will be used by the main at runtime. 393 */ 394 struct plat_stmmacenet_data * 395 stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) 396 { 397 struct device_node *np = pdev->dev.of_node; 398 struct plat_stmmacenet_data *plat; 399 struct stmmac_dma_cfg *dma_cfg; 400 void *ret; 401 int rc; 402 403 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL); 404 if (!plat) 405 return ERR_PTR(-ENOMEM); 406 407 rc = of_get_mac_address(np, mac); 408 if (rc) { 409 if (rc == -EPROBE_DEFER) 410 return ERR_PTR(rc); 411 412 eth_zero_addr(mac); 413 } 414 415 plat->phy_interface = device_get_phy_mode(&pdev->dev); 416 if (plat->phy_interface < 0) 417 return ERR_PTR(plat->phy_interface); 418 419 plat->interface = stmmac_of_get_mac_mode(np); 420 if (plat->interface < 0) 421 plat->interface = plat->phy_interface; 422 423 /* Some wrapper drivers still rely on phy_node. Let's save it while 424 * they are not converted to phylink. */ 425 plat->phy_node = of_parse_phandle(np, "phy-handle", 0); 426 427 /* PHYLINK automatically parses the phy-handle property */ 428 plat->phylink_node = np; 429 430 /* Get max speed of operation from device tree */ 431 if (of_property_read_u32(np, "max-speed", &plat->max_speed)) 432 plat->max_speed = -1; 433 434 plat->bus_id = of_alias_get_id(np, "ethernet"); 435 if (plat->bus_id < 0) 436 plat->bus_id = 0; 437 438 /* Default to phy auto-detection */ 439 plat->phy_addr = -1; 440 441 /* Default to get clk_csr from stmmac_clk_crs_set(), 442 * or get clk_csr from device tree. 443 */ 444 plat->clk_csr = -1; 445 of_property_read_u32(np, "clk_csr", &plat->clk_csr); 446 447 /* "snps,phy-addr" is not a standard property. Mark it as deprecated 448 * and warn of its use. Remove this when phy node support is added. 449 */ 450 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0) 451 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n"); 452 453 /* To Configure PHY by using all device-tree supported properties */ 454 rc = stmmac_dt_phy(plat, np, &pdev->dev); 455 if (rc) 456 return ERR_PTR(rc); 457 458 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size); 459 460 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size); 461 462 plat->force_sf_dma_mode = 463 of_property_read_bool(np, "snps,force_sf_dma_mode"); 464 465 plat->en_tx_lpi_clockgating = 466 of_property_read_bool(np, "snps,en-tx-lpi-clockgating"); 467 468 /* Set the maxmtu to a default of JUMBO_LEN in case the 469 * parameter is not present in the device tree. 470 */ 471 plat->maxmtu = JUMBO_LEN; 472 473 /* Set default value for multicast hash bins */ 474 plat->multicast_filter_bins = HASH_TABLE_SIZE; 475 476 /* Set default value for unicast filter entries */ 477 plat->unicast_filter_entries = 1; 478 479 /* 480 * Currently only the properties needed on SPEAr600 481 * are provided. All other properties should be added 482 * once needed on other platforms. 483 */ 484 if (of_device_is_compatible(np, "st,spear600-gmac") || 485 of_device_is_compatible(np, "snps,dwmac-3.50a") || 486 of_device_is_compatible(np, "snps,dwmac-3.70a") || 487 of_device_is_compatible(np, "snps,dwmac")) { 488 /* Note that the max-frame-size parameter as defined in the 489 * ePAPR v1.1 spec is defined as max-frame-size, it's 490 * actually used as the IEEE definition of MAC Client 491 * data, or MTU. The ePAPR specification is confusing as 492 * the definition is max-frame-size, but usage examples 493 * are clearly MTUs 494 */ 495 of_property_read_u32(np, "max-frame-size", &plat->maxmtu); 496 of_property_read_u32(np, "snps,multicast-filter-bins", 497 &plat->multicast_filter_bins); 498 of_property_read_u32(np, "snps,perfect-filter-entries", 499 &plat->unicast_filter_entries); 500 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries( 501 &pdev->dev, plat->unicast_filter_entries); 502 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins( 503 &pdev->dev, plat->multicast_filter_bins); 504 plat->has_gmac = 1; 505 plat->pmt = 1; 506 } 507 508 if (of_device_is_compatible(np, "snps,dwmac-4.00") || 509 of_device_is_compatible(np, "snps,dwmac-4.10a") || 510 of_device_is_compatible(np, "snps,dwmac-4.20a") || 511 of_device_is_compatible(np, "snps,dwmac-5.10a")) { 512 plat->has_gmac4 = 1; 513 plat->has_gmac = 0; 514 plat->pmt = 1; 515 plat->tso_en = of_property_read_bool(np, "snps,tso"); 516 } 517 518 if (of_device_is_compatible(np, "snps,dwmac-3.610") || 519 of_device_is_compatible(np, "snps,dwmac-3.710")) { 520 plat->enh_desc = 1; 521 plat->bugged_jumbo = 1; 522 plat->force_sf_dma_mode = 1; 523 } 524 525 if (of_device_is_compatible(np, "snps,dwxgmac")) { 526 plat->has_xgmac = 1; 527 plat->pmt = 1; 528 plat->tso_en = of_property_read_bool(np, "snps,tso"); 529 } 530 531 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg), 532 GFP_KERNEL); 533 if (!dma_cfg) { 534 stmmac_remove_config_dt(pdev, plat); 535 return ERR_PTR(-ENOMEM); 536 } 537 plat->dma_cfg = dma_cfg; 538 539 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl); 540 if (!dma_cfg->pbl) 541 dma_cfg->pbl = DEFAULT_DMA_PBL; 542 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl); 543 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl); 544 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8"); 545 546 dma_cfg->aal = of_property_read_bool(np, "snps,aal"); 547 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst"); 548 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst"); 549 550 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode"); 551 if (plat->force_thresh_dma_mode) { 552 plat->force_sf_dma_mode = 0; 553 dev_warn(&pdev->dev, 554 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n"); 555 } 556 557 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed); 558 559 plat->axi = stmmac_axi_setup(pdev); 560 561 rc = stmmac_mtl_setup(pdev, plat); 562 if (rc) { 563 stmmac_remove_config_dt(pdev, plat); 564 return ERR_PTR(rc); 565 } 566 567 /* clock setup */ 568 if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) { 569 plat->stmmac_clk = devm_clk_get(&pdev->dev, 570 STMMAC_RESOURCE_NAME); 571 if (IS_ERR(plat->stmmac_clk)) { 572 dev_warn(&pdev->dev, "Cannot get CSR clock\n"); 573 plat->stmmac_clk = NULL; 574 } 575 clk_prepare_enable(plat->stmmac_clk); 576 } 577 578 plat->pclk = devm_clk_get_optional(&pdev->dev, "pclk"); 579 if (IS_ERR(plat->pclk)) { 580 ret = plat->pclk; 581 goto error_pclk_get; 582 } 583 clk_prepare_enable(plat->pclk); 584 585 /* Fall-back to main clock in case of no PTP ref is passed */ 586 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref"); 587 if (IS_ERR(plat->clk_ptp_ref)) { 588 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk); 589 plat->clk_ptp_ref = NULL; 590 dev_info(&pdev->dev, "PTP uses main clock\n"); 591 } else { 592 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref); 593 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate); 594 } 595 596 plat->stmmac_rst = devm_reset_control_get_optional(&pdev->dev, 597 STMMAC_RESOURCE_NAME); 598 if (IS_ERR(plat->stmmac_rst)) { 599 ret = plat->stmmac_rst; 600 goto error_hw_init; 601 } 602 603 plat->stmmac_ahb_rst = devm_reset_control_get_optional_shared( 604 &pdev->dev, "ahb"); 605 if (IS_ERR(plat->stmmac_ahb_rst)) { 606 ret = plat->stmmac_ahb_rst; 607 goto error_hw_init; 608 } 609 610 return plat; 611 612 error_hw_init: 613 clk_disable_unprepare(plat->pclk); 614 error_pclk_get: 615 clk_disable_unprepare(plat->stmmac_clk); 616 617 return ret; 618 } 619 620 /** 621 * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt() 622 * @pdev: platform_device structure 623 * @plat: driver data platform structure 624 * 625 * Release resources claimed by stmmac_probe_config_dt(). 626 */ 627 void stmmac_remove_config_dt(struct platform_device *pdev, 628 struct plat_stmmacenet_data *plat) 629 { 630 clk_disable_unprepare(plat->stmmac_clk); 631 clk_disable_unprepare(plat->pclk); 632 of_node_put(plat->phy_node); 633 of_node_put(plat->mdio_node); 634 } 635 #else 636 struct plat_stmmacenet_data * 637 stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) 638 { 639 return ERR_PTR(-EINVAL); 640 } 641 642 void stmmac_remove_config_dt(struct platform_device *pdev, 643 struct plat_stmmacenet_data *plat) 644 { 645 } 646 #endif /* CONFIG_OF */ 647 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt); 648 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt); 649 650 int stmmac_get_platform_resources(struct platform_device *pdev, 651 struct stmmac_resources *stmmac_res) 652 { 653 memset(stmmac_res, 0, sizeof(*stmmac_res)); 654 655 /* Get IRQ information early to have an ability to ask for deferred 656 * probe if needed before we went too far with resource allocation. 657 */ 658 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq"); 659 if (stmmac_res->irq < 0) 660 return stmmac_res->irq; 661 662 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq 663 * The external wake up irq can be passed through the platform code 664 * named as "eth_wake_irq" 665 * 666 * In case the wake up interrupt is not passed from the platform 667 * so the driver will continue to use the mac irq (ndev->irq) 668 */ 669 stmmac_res->wol_irq = 670 platform_get_irq_byname_optional(pdev, "eth_wake_irq"); 671 if (stmmac_res->wol_irq < 0) { 672 if (stmmac_res->wol_irq == -EPROBE_DEFER) 673 return -EPROBE_DEFER; 674 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n"); 675 stmmac_res->wol_irq = stmmac_res->irq; 676 } 677 678 stmmac_res->lpi_irq = 679 platform_get_irq_byname_optional(pdev, "eth_lpi"); 680 if (stmmac_res->lpi_irq < 0) { 681 if (stmmac_res->lpi_irq == -EPROBE_DEFER) 682 return -EPROBE_DEFER; 683 dev_info(&pdev->dev, "IRQ eth_lpi not found\n"); 684 } 685 686 stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0); 687 688 return PTR_ERR_OR_ZERO(stmmac_res->addr); 689 } 690 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources); 691 692 /** 693 * stmmac_pltfr_remove 694 * @pdev: platform device pointer 695 * Description: this function calls the main to free the net resources 696 * and calls the platforms hook and release the resources (e.g. mem). 697 */ 698 int stmmac_pltfr_remove(struct platform_device *pdev) 699 { 700 struct net_device *ndev = platform_get_drvdata(pdev); 701 struct stmmac_priv *priv = netdev_priv(ndev); 702 struct plat_stmmacenet_data *plat = priv->plat; 703 int ret = stmmac_dvr_remove(&pdev->dev); 704 705 if (plat->exit) 706 plat->exit(pdev, plat->bsp_priv); 707 708 stmmac_remove_config_dt(pdev, plat); 709 710 return ret; 711 } 712 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove); 713 714 /** 715 * stmmac_pltfr_suspend 716 * @dev: device pointer 717 * Description: this function is invoked when suspend the driver and it direcly 718 * call the main suspend function and then, if required, on some platform, it 719 * can call an exit helper. 720 */ 721 static int __maybe_unused stmmac_pltfr_suspend(struct device *dev) 722 { 723 int ret; 724 struct net_device *ndev = dev_get_drvdata(dev); 725 struct stmmac_priv *priv = netdev_priv(ndev); 726 struct platform_device *pdev = to_platform_device(dev); 727 728 ret = stmmac_suspend(dev); 729 if (priv->plat->exit) 730 priv->plat->exit(pdev, priv->plat->bsp_priv); 731 732 return ret; 733 } 734 735 /** 736 * stmmac_pltfr_resume 737 * @dev: device pointer 738 * Description: this function is invoked when resume the driver before calling 739 * the main resume function, on some platforms, it can call own init helper 740 * if required. 741 */ 742 static int __maybe_unused stmmac_pltfr_resume(struct device *dev) 743 { 744 struct net_device *ndev = dev_get_drvdata(dev); 745 struct stmmac_priv *priv = netdev_priv(ndev); 746 struct platform_device *pdev = to_platform_device(dev); 747 748 if (priv->plat->init) 749 priv->plat->init(pdev, priv->plat->bsp_priv); 750 751 return stmmac_resume(dev); 752 } 753 754 static int __maybe_unused stmmac_runtime_suspend(struct device *dev) 755 { 756 struct net_device *ndev = dev_get_drvdata(dev); 757 struct stmmac_priv *priv = netdev_priv(ndev); 758 759 stmmac_bus_clks_config(priv, false); 760 761 return 0; 762 } 763 764 static int __maybe_unused stmmac_runtime_resume(struct device *dev) 765 { 766 struct net_device *ndev = dev_get_drvdata(dev); 767 struct stmmac_priv *priv = netdev_priv(ndev); 768 769 return stmmac_bus_clks_config(priv, true); 770 } 771 772 const struct dev_pm_ops stmmac_pltfr_pm_ops = { 773 SET_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_suspend, stmmac_pltfr_resume) 774 SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL) 775 }; 776 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops); 777 778 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support"); 779 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>"); 780 MODULE_LICENSE("GPL"); 781