1 /**************************************************************************** 2 * Driver for Solarflare Solarstorm network controllers and boards 3 * Copyright 2005-2006 Fen Systems Ltd. 4 * Copyright 2005-2011 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/delay.h> 16 #include <linux/notifier.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/in.h> 20 #include <linux/crc32.h> 21 #include <linux/ethtool.h> 22 #include <linux/topology.h> 23 #include <linux/gfp.h> 24 #include <linux/cpu_rmap.h> 25 #include <linux/aer.h> 26 #include "net_driver.h" 27 #include "efx.h" 28 #include "nic.h" 29 #include "selftest.h" 30 31 #include "mcdi.h" 32 #include "workarounds.h" 33 34 /************************************************************************** 35 * 36 * Type name strings 37 * 38 ************************************************************************** 39 */ 40 41 /* Loopback mode names (see LOOPBACK_MODE()) */ 42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX; 43 const char *const efx_loopback_mode_names[] = { 44 [LOOPBACK_NONE] = "NONE", 45 [LOOPBACK_DATA] = "DATAPATH", 46 [LOOPBACK_GMAC] = "GMAC", 47 [LOOPBACK_XGMII] = "XGMII", 48 [LOOPBACK_XGXS] = "XGXS", 49 [LOOPBACK_XAUI] = "XAUI", 50 [LOOPBACK_GMII] = "GMII", 51 [LOOPBACK_SGMII] = "SGMII", 52 [LOOPBACK_XGBR] = "XGBR", 53 [LOOPBACK_XFI] = "XFI", 54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR", 55 [LOOPBACK_GMII_FAR] = "GMII_FAR", 56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR", 57 [LOOPBACK_XFI_FAR] = "XFI_FAR", 58 [LOOPBACK_GPHY] = "GPHY", 59 [LOOPBACK_PHYXS] = "PHYXS", 60 [LOOPBACK_PCS] = "PCS", 61 [LOOPBACK_PMAPMD] = "PMA/PMD", 62 [LOOPBACK_XPORT] = "XPORT", 63 [LOOPBACK_XGMII_WS] = "XGMII_WS", 64 [LOOPBACK_XAUI_WS] = "XAUI_WS", 65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR", 66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR", 67 [LOOPBACK_GMII_WS] = "GMII_WS", 68 [LOOPBACK_XFI_WS] = "XFI_WS", 69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR", 70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS", 71 }; 72 73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX; 74 const char *const efx_reset_type_names[] = { 75 [RESET_TYPE_INVISIBLE] = "INVISIBLE", 76 [RESET_TYPE_ALL] = "ALL", 77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", 78 [RESET_TYPE_WORLD] = "WORLD", 79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", 80 [RESET_TYPE_DISABLE] = "DISABLE", 81 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", 82 [RESET_TYPE_INT_ERROR] = "INT_ERROR", 83 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY", 84 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH", 85 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH", 86 [RESET_TYPE_TX_SKIP] = "TX_SKIP", 87 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", 88 }; 89 90 /* Reset workqueue. If any NIC has a hardware failure then a reset will be 91 * queued onto this work queue. This is not a per-nic work queue, because 92 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. 93 */ 94 static struct workqueue_struct *reset_workqueue; 95 96 /************************************************************************** 97 * 98 * Configurable values 99 * 100 *************************************************************************/ 101 102 /* 103 * Use separate channels for TX and RX events 104 * 105 * Set this to 1 to use separate channels for TX and RX. It allows us 106 * to control interrupt affinity separately for TX and RX. 107 * 108 * This is only used in MSI-X interrupt mode 109 */ 110 static bool separate_tx_channels; 111 module_param(separate_tx_channels, bool, 0444); 112 MODULE_PARM_DESC(separate_tx_channels, 113 "Use separate channels for TX and RX"); 114 115 /* This is the weight assigned to each of the (per-channel) virtual 116 * NAPI devices. 117 */ 118 static int napi_weight = 64; 119 120 /* This is the time (in jiffies) between invocations of the hardware 121 * monitor. 122 * On Falcon-based NICs, this will: 123 * - Check the on-board hardware monitor; 124 * - Poll the link state and reconfigure the hardware as necessary. 125 * On Siena-based NICs for power systems with EEH support, this will give EEH a 126 * chance to start. 127 */ 128 static unsigned int efx_monitor_interval = 1 * HZ; 129 130 /* Initial interrupt moderation settings. They can be modified after 131 * module load with ethtool. 132 * 133 * The default for RX should strike a balance between increasing the 134 * round-trip latency and reducing overhead. 135 */ 136 static unsigned int rx_irq_mod_usec = 60; 137 138 /* Initial interrupt moderation settings. They can be modified after 139 * module load with ethtool. 140 * 141 * This default is chosen to ensure that a 10G link does not go idle 142 * while a TX queue is stopped after it has become full. A queue is 143 * restarted when it drops below half full. The time this takes (assuming 144 * worst case 3 descriptors per packet and 1024 descriptors) is 145 * 512 / 3 * 1.2 = 205 usec. 146 */ 147 static unsigned int tx_irq_mod_usec = 150; 148 149 /* This is the first interrupt mode to try out of: 150 * 0 => MSI-X 151 * 1 => MSI 152 * 2 => legacy 153 */ 154 static unsigned int interrupt_mode; 155 156 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS), 157 * i.e. the number of CPUs among which we may distribute simultaneous 158 * interrupt handling. 159 * 160 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt. 161 * The default (0) means to assign an interrupt to each core. 162 */ 163 static unsigned int rss_cpus; 164 module_param(rss_cpus, uint, 0444); 165 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling"); 166 167 static bool phy_flash_cfg; 168 module_param(phy_flash_cfg, bool, 0644); 169 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially"); 170 171 static unsigned irq_adapt_low_thresh = 8000; 172 module_param(irq_adapt_low_thresh, uint, 0644); 173 MODULE_PARM_DESC(irq_adapt_low_thresh, 174 "Threshold score for reducing IRQ moderation"); 175 176 static unsigned irq_adapt_high_thresh = 16000; 177 module_param(irq_adapt_high_thresh, uint, 0644); 178 MODULE_PARM_DESC(irq_adapt_high_thresh, 179 "Threshold score for increasing IRQ moderation"); 180 181 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE | 182 NETIF_MSG_LINK | NETIF_MSG_IFDOWN | 183 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR | 184 NETIF_MSG_TX_ERR | NETIF_MSG_HW); 185 module_param(debug, uint, 0); 186 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value"); 187 188 /************************************************************************** 189 * 190 * Utility functions and prototypes 191 * 192 *************************************************************************/ 193 194 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq); 195 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq); 196 static void efx_remove_channel(struct efx_channel *channel); 197 static void efx_remove_channels(struct efx_nic *efx); 198 static const struct efx_channel_type efx_default_channel_type; 199 static void efx_remove_port(struct efx_nic *efx); 200 static void efx_init_napi_channel(struct efx_channel *channel); 201 static void efx_fini_napi(struct efx_nic *efx); 202 static void efx_fini_napi_channel(struct efx_channel *channel); 203 static void efx_fini_struct(struct efx_nic *efx); 204 static void efx_start_all(struct efx_nic *efx); 205 static void efx_stop_all(struct efx_nic *efx); 206 207 #define EFX_ASSERT_RESET_SERIALISED(efx) \ 208 do { \ 209 if ((efx->state == STATE_READY) || \ 210 (efx->state == STATE_RECOVERY) || \ 211 (efx->state == STATE_DISABLED)) \ 212 ASSERT_RTNL(); \ 213 } while (0) 214 215 static int efx_check_disabled(struct efx_nic *efx) 216 { 217 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) { 218 netif_err(efx, drv, efx->net_dev, 219 "device is disabled due to earlier errors\n"); 220 return -EIO; 221 } 222 return 0; 223 } 224 225 /************************************************************************** 226 * 227 * Event queue processing 228 * 229 *************************************************************************/ 230 231 /* Process channel's event queue 232 * 233 * This function is responsible for processing the event queue of a 234 * single channel. The caller must guarantee that this function will 235 * never be concurrently called more than once on the same channel, 236 * though different channels may be being processed concurrently. 237 */ 238 static int efx_process_channel(struct efx_channel *channel, int budget) 239 { 240 int spent; 241 242 if (unlikely(!channel->enabled)) 243 return 0; 244 245 spent = efx_nic_process_eventq(channel, budget); 246 if (spent && efx_channel_has_rx_queue(channel)) { 247 struct efx_rx_queue *rx_queue = 248 efx_channel_get_rx_queue(channel); 249 250 efx_rx_flush_packet(channel); 251 if (rx_queue->enabled) 252 efx_fast_push_rx_descriptors(rx_queue); 253 } 254 255 return spent; 256 } 257 258 /* Mark channel as finished processing 259 * 260 * Note that since we will not receive further interrupts for this 261 * channel before we finish processing and call the eventq_read_ack() 262 * method, there is no need to use the interrupt hold-off timers. 263 */ 264 static inline void efx_channel_processed(struct efx_channel *channel) 265 { 266 /* The interrupt handler for this channel may set work_pending 267 * as soon as we acknowledge the events we've seen. Make sure 268 * it's cleared before then. */ 269 channel->work_pending = false; 270 smp_wmb(); 271 272 efx_nic_eventq_read_ack(channel); 273 } 274 275 /* NAPI poll handler 276 * 277 * NAPI guarantees serialisation of polls of the same device, which 278 * provides the guarantee required by efx_process_channel(). 279 */ 280 static int efx_poll(struct napi_struct *napi, int budget) 281 { 282 struct efx_channel *channel = 283 container_of(napi, struct efx_channel, napi_str); 284 struct efx_nic *efx = channel->efx; 285 int spent; 286 287 netif_vdbg(efx, intr, efx->net_dev, 288 "channel %d NAPI poll executing on CPU %d\n", 289 channel->channel, raw_smp_processor_id()); 290 291 spent = efx_process_channel(channel, budget); 292 293 if (spent < budget) { 294 if (efx_channel_has_rx_queue(channel) && 295 efx->irq_rx_adaptive && 296 unlikely(++channel->irq_count == 1000)) { 297 if (unlikely(channel->irq_mod_score < 298 irq_adapt_low_thresh)) { 299 if (channel->irq_moderation > 1) { 300 channel->irq_moderation -= 1; 301 efx->type->push_irq_moderation(channel); 302 } 303 } else if (unlikely(channel->irq_mod_score > 304 irq_adapt_high_thresh)) { 305 if (channel->irq_moderation < 306 efx->irq_rx_moderation) { 307 channel->irq_moderation += 1; 308 efx->type->push_irq_moderation(channel); 309 } 310 } 311 channel->irq_count = 0; 312 channel->irq_mod_score = 0; 313 } 314 315 efx_filter_rfs_expire(channel); 316 317 /* There is no race here; although napi_disable() will 318 * only wait for napi_complete(), this isn't a problem 319 * since efx_channel_processed() will have no effect if 320 * interrupts have already been disabled. 321 */ 322 napi_complete(napi); 323 efx_channel_processed(channel); 324 } 325 326 return spent; 327 } 328 329 /* Process the eventq of the specified channel immediately on this CPU 330 * 331 * Disable hardware generated interrupts, wait for any existing 332 * processing to finish, then directly poll (and ack ) the eventq. 333 * Finally reenable NAPI and interrupts. 334 * 335 * This is for use only during a loopback self-test. It must not 336 * deliver any packets up the stack as this can result in deadlock. 337 */ 338 void efx_process_channel_now(struct efx_channel *channel) 339 { 340 struct efx_nic *efx = channel->efx; 341 342 BUG_ON(channel->channel >= efx->n_channels); 343 BUG_ON(!channel->enabled); 344 BUG_ON(!efx->loopback_selftest); 345 346 /* Disable interrupts and wait for ISRs to complete */ 347 efx_nic_disable_interrupts(efx); 348 if (efx->legacy_irq) { 349 synchronize_irq(efx->legacy_irq); 350 efx->legacy_irq_enabled = false; 351 } 352 if (channel->irq) 353 synchronize_irq(channel->irq); 354 355 /* Wait for any NAPI processing to complete */ 356 napi_disable(&channel->napi_str); 357 358 /* Poll the channel */ 359 efx_process_channel(channel, channel->eventq_mask + 1); 360 361 /* Ack the eventq. This may cause an interrupt to be generated 362 * when they are reenabled */ 363 efx_channel_processed(channel); 364 365 napi_enable(&channel->napi_str); 366 if (efx->legacy_irq) 367 efx->legacy_irq_enabled = true; 368 efx_nic_enable_interrupts(efx); 369 } 370 371 /* Create event queue 372 * Event queue memory allocations are done only once. If the channel 373 * is reset, the memory buffer will be reused; this guards against 374 * errors during channel reset and also simplifies interrupt handling. 375 */ 376 static int efx_probe_eventq(struct efx_channel *channel) 377 { 378 struct efx_nic *efx = channel->efx; 379 unsigned long entries; 380 381 netif_dbg(efx, probe, efx->net_dev, 382 "chan %d create event queue\n", channel->channel); 383 384 /* Build an event queue with room for one event per tx and rx buffer, 385 * plus some extra for link state events and MCDI completions. */ 386 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128); 387 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE); 388 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1; 389 390 return efx_nic_probe_eventq(channel); 391 } 392 393 /* Prepare channel's event queue */ 394 static void efx_init_eventq(struct efx_channel *channel) 395 { 396 netif_dbg(channel->efx, drv, channel->efx->net_dev, 397 "chan %d init event queue\n", channel->channel); 398 399 channel->eventq_read_ptr = 0; 400 401 efx_nic_init_eventq(channel); 402 } 403 404 /* Enable event queue processing and NAPI */ 405 static void efx_start_eventq(struct efx_channel *channel) 406 { 407 netif_dbg(channel->efx, ifup, channel->efx->net_dev, 408 "chan %d start event queue\n", channel->channel); 409 410 /* The interrupt handler for this channel may set work_pending 411 * as soon as we enable it. Make sure it's cleared before 412 * then. Similarly, make sure it sees the enabled flag set. 413 */ 414 channel->work_pending = false; 415 channel->enabled = true; 416 smp_wmb(); 417 418 napi_enable(&channel->napi_str); 419 efx_nic_eventq_read_ack(channel); 420 } 421 422 /* Disable event queue processing and NAPI */ 423 static void efx_stop_eventq(struct efx_channel *channel) 424 { 425 if (!channel->enabled) 426 return; 427 428 napi_disable(&channel->napi_str); 429 channel->enabled = false; 430 } 431 432 static void efx_fini_eventq(struct efx_channel *channel) 433 { 434 netif_dbg(channel->efx, drv, channel->efx->net_dev, 435 "chan %d fini event queue\n", channel->channel); 436 437 efx_nic_fini_eventq(channel); 438 } 439 440 static void efx_remove_eventq(struct efx_channel *channel) 441 { 442 netif_dbg(channel->efx, drv, channel->efx->net_dev, 443 "chan %d remove event queue\n", channel->channel); 444 445 efx_nic_remove_eventq(channel); 446 } 447 448 /************************************************************************** 449 * 450 * Channel handling 451 * 452 *************************************************************************/ 453 454 /* Allocate and initialise a channel structure. */ 455 static struct efx_channel * 456 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel) 457 { 458 struct efx_channel *channel; 459 struct efx_rx_queue *rx_queue; 460 struct efx_tx_queue *tx_queue; 461 int j; 462 463 channel = kzalloc(sizeof(*channel), GFP_KERNEL); 464 if (!channel) 465 return NULL; 466 467 channel->efx = efx; 468 channel->channel = i; 469 channel->type = &efx_default_channel_type; 470 471 for (j = 0; j < EFX_TXQ_TYPES; j++) { 472 tx_queue = &channel->tx_queue[j]; 473 tx_queue->efx = efx; 474 tx_queue->queue = i * EFX_TXQ_TYPES + j; 475 tx_queue->channel = channel; 476 } 477 478 rx_queue = &channel->rx_queue; 479 rx_queue->efx = efx; 480 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 481 (unsigned long)rx_queue); 482 483 return channel; 484 } 485 486 /* Allocate and initialise a channel structure, copying parameters 487 * (but not resources) from an old channel structure. 488 */ 489 static struct efx_channel * 490 efx_copy_channel(const struct efx_channel *old_channel) 491 { 492 struct efx_channel *channel; 493 struct efx_rx_queue *rx_queue; 494 struct efx_tx_queue *tx_queue; 495 int j; 496 497 channel = kmalloc(sizeof(*channel), GFP_KERNEL); 498 if (!channel) 499 return NULL; 500 501 *channel = *old_channel; 502 503 channel->napi_dev = NULL; 504 memset(&channel->eventq, 0, sizeof(channel->eventq)); 505 506 for (j = 0; j < EFX_TXQ_TYPES; j++) { 507 tx_queue = &channel->tx_queue[j]; 508 if (tx_queue->channel) 509 tx_queue->channel = channel; 510 tx_queue->buffer = NULL; 511 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd)); 512 } 513 514 rx_queue = &channel->rx_queue; 515 rx_queue->buffer = NULL; 516 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd)); 517 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 518 (unsigned long)rx_queue); 519 520 return channel; 521 } 522 523 static int efx_probe_channel(struct efx_channel *channel) 524 { 525 struct efx_tx_queue *tx_queue; 526 struct efx_rx_queue *rx_queue; 527 int rc; 528 529 netif_dbg(channel->efx, probe, channel->efx->net_dev, 530 "creating channel %d\n", channel->channel); 531 532 rc = channel->type->pre_probe(channel); 533 if (rc) 534 goto fail; 535 536 rc = efx_probe_eventq(channel); 537 if (rc) 538 goto fail; 539 540 efx_for_each_channel_tx_queue(tx_queue, channel) { 541 rc = efx_probe_tx_queue(tx_queue); 542 if (rc) 543 goto fail; 544 } 545 546 efx_for_each_channel_rx_queue(rx_queue, channel) { 547 rc = efx_probe_rx_queue(rx_queue); 548 if (rc) 549 goto fail; 550 } 551 552 channel->n_rx_frm_trunc = 0; 553 554 return 0; 555 556 fail: 557 efx_remove_channel(channel); 558 return rc; 559 } 560 561 static void 562 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len) 563 { 564 struct efx_nic *efx = channel->efx; 565 const char *type; 566 int number; 567 568 number = channel->channel; 569 if (efx->tx_channel_offset == 0) { 570 type = ""; 571 } else if (channel->channel < efx->tx_channel_offset) { 572 type = "-rx"; 573 } else { 574 type = "-tx"; 575 number -= efx->tx_channel_offset; 576 } 577 snprintf(buf, len, "%s%s-%d", efx->name, type, number); 578 } 579 580 static void efx_set_channel_names(struct efx_nic *efx) 581 { 582 struct efx_channel *channel; 583 584 efx_for_each_channel(channel, efx) 585 channel->type->get_name(channel, 586 efx->channel_name[channel->channel], 587 sizeof(efx->channel_name[0])); 588 } 589 590 static int efx_probe_channels(struct efx_nic *efx) 591 { 592 struct efx_channel *channel; 593 int rc; 594 595 /* Restart special buffer allocation */ 596 efx->next_buffer_table = 0; 597 598 /* Probe channels in reverse, so that any 'extra' channels 599 * use the start of the buffer table. This allows the traffic 600 * channels to be resized without moving them or wasting the 601 * entries before them. 602 */ 603 efx_for_each_channel_rev(channel, efx) { 604 rc = efx_probe_channel(channel); 605 if (rc) { 606 netif_err(efx, probe, efx->net_dev, 607 "failed to create channel %d\n", 608 channel->channel); 609 goto fail; 610 } 611 } 612 efx_set_channel_names(efx); 613 614 return 0; 615 616 fail: 617 efx_remove_channels(efx); 618 return rc; 619 } 620 621 /* Channels are shutdown and reinitialised whilst the NIC is running 622 * to propagate configuration changes (mtu, checksum offload), or 623 * to clear hardware error conditions 624 */ 625 static void efx_start_datapath(struct efx_nic *efx) 626 { 627 bool old_rx_scatter = efx->rx_scatter; 628 struct efx_tx_queue *tx_queue; 629 struct efx_rx_queue *rx_queue; 630 struct efx_channel *channel; 631 size_t rx_buf_len; 632 633 /* Calculate the rx buffer allocation parameters required to 634 * support the current MTU, including padding for header 635 * alignment and overruns. 636 */ 637 efx->rx_dma_len = (efx->type->rx_buffer_hash_size + 638 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + 639 efx->type->rx_buffer_padding); 640 rx_buf_len = (sizeof(struct efx_rx_page_state) + 641 EFX_PAGE_IP_ALIGN + efx->rx_dma_len); 642 if (rx_buf_len <= PAGE_SIZE) { 643 efx->rx_scatter = false; 644 efx->rx_buffer_order = 0; 645 } else if (efx->type->can_rx_scatter) { 646 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) + 647 EFX_PAGE_IP_ALIGN + EFX_RX_USR_BUF_SIZE > 648 PAGE_SIZE / 2); 649 efx->rx_scatter = true; 650 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE; 651 efx->rx_buffer_order = 0; 652 } else { 653 efx->rx_scatter = false; 654 efx->rx_buffer_order = get_order(rx_buf_len); 655 } 656 657 efx_rx_config_page_split(efx); 658 if (efx->rx_buffer_order) 659 netif_dbg(efx, drv, efx->net_dev, 660 "RX buf len=%u; page order=%u batch=%u\n", 661 efx->rx_dma_len, efx->rx_buffer_order, 662 efx->rx_pages_per_batch); 663 else 664 netif_dbg(efx, drv, efx->net_dev, 665 "RX buf len=%u step=%u bpp=%u; page batch=%u\n", 666 efx->rx_dma_len, efx->rx_page_buf_step, 667 efx->rx_bufs_per_page, efx->rx_pages_per_batch); 668 669 /* RX filters also have scatter-enabled flags */ 670 if (efx->rx_scatter != old_rx_scatter) 671 efx_filter_update_rx_scatter(efx); 672 673 /* We must keep at least one descriptor in a TX ring empty. 674 * We could avoid this when the queue size does not exactly 675 * match the hardware ring size, but it's not that important. 676 * Therefore we stop the queue when one more skb might fill 677 * the ring completely. We wake it when half way back to 678 * empty. 679 */ 680 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx); 681 efx->txq_wake_thresh = efx->txq_stop_thresh / 2; 682 683 /* Initialise the channels */ 684 efx_for_each_channel(channel, efx) { 685 efx_for_each_channel_tx_queue(tx_queue, channel) 686 efx_init_tx_queue(tx_queue); 687 688 efx_for_each_channel_rx_queue(rx_queue, channel) { 689 efx_init_rx_queue(rx_queue); 690 efx_nic_generate_fill_event(rx_queue); 691 } 692 693 WARN_ON(channel->rx_pkt_n_frags); 694 } 695 696 if (netif_device_present(efx->net_dev)) 697 netif_tx_wake_all_queues(efx->net_dev); 698 } 699 700 static void efx_stop_datapath(struct efx_nic *efx) 701 { 702 struct efx_channel *channel; 703 struct efx_tx_queue *tx_queue; 704 struct efx_rx_queue *rx_queue; 705 struct pci_dev *dev = efx->pci_dev; 706 int rc; 707 708 EFX_ASSERT_RESET_SERIALISED(efx); 709 BUG_ON(efx->port_enabled); 710 711 /* Only perform flush if dma is enabled */ 712 if (dev->is_busmaster && efx->state != STATE_RECOVERY) { 713 rc = efx_nic_flush_queues(efx); 714 715 if (rc && EFX_WORKAROUND_7803(efx)) { 716 /* Schedule a reset to recover from the flush failure. The 717 * descriptor caches reference memory we're about to free, 718 * but falcon_reconfigure_mac_wrapper() won't reconnect 719 * the MACs because of the pending reset. */ 720 netif_err(efx, drv, efx->net_dev, 721 "Resetting to recover from flush failure\n"); 722 efx_schedule_reset(efx, RESET_TYPE_ALL); 723 } else if (rc) { 724 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); 725 } else { 726 netif_dbg(efx, drv, efx->net_dev, 727 "successfully flushed all queues\n"); 728 } 729 } 730 731 efx_for_each_channel(channel, efx) { 732 /* RX packet processing is pipelined, so wait for the 733 * NAPI handler to complete. At least event queue 0 734 * might be kept active by non-data events, so don't 735 * use napi_synchronize() but actually disable NAPI 736 * temporarily. 737 */ 738 if (efx_channel_has_rx_queue(channel)) { 739 efx_stop_eventq(channel); 740 efx_start_eventq(channel); 741 } 742 743 efx_for_each_channel_rx_queue(rx_queue, channel) 744 efx_fini_rx_queue(rx_queue); 745 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 746 efx_fini_tx_queue(tx_queue); 747 } 748 } 749 750 static void efx_remove_channel(struct efx_channel *channel) 751 { 752 struct efx_tx_queue *tx_queue; 753 struct efx_rx_queue *rx_queue; 754 755 netif_dbg(channel->efx, drv, channel->efx->net_dev, 756 "destroy chan %d\n", channel->channel); 757 758 efx_for_each_channel_rx_queue(rx_queue, channel) 759 efx_remove_rx_queue(rx_queue); 760 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 761 efx_remove_tx_queue(tx_queue); 762 efx_remove_eventq(channel); 763 channel->type->post_remove(channel); 764 } 765 766 static void efx_remove_channels(struct efx_nic *efx) 767 { 768 struct efx_channel *channel; 769 770 efx_for_each_channel(channel, efx) 771 efx_remove_channel(channel); 772 } 773 774 int 775 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries) 776 { 777 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; 778 u32 old_rxq_entries, old_txq_entries; 779 unsigned i, next_buffer_table = 0; 780 int rc; 781 782 rc = efx_check_disabled(efx); 783 if (rc) 784 return rc; 785 786 /* Not all channels should be reallocated. We must avoid 787 * reallocating their buffer table entries. 788 */ 789 efx_for_each_channel(channel, efx) { 790 struct efx_rx_queue *rx_queue; 791 struct efx_tx_queue *tx_queue; 792 793 if (channel->type->copy) 794 continue; 795 next_buffer_table = max(next_buffer_table, 796 channel->eventq.index + 797 channel->eventq.entries); 798 efx_for_each_channel_rx_queue(rx_queue, channel) 799 next_buffer_table = max(next_buffer_table, 800 rx_queue->rxd.index + 801 rx_queue->rxd.entries); 802 efx_for_each_channel_tx_queue(tx_queue, channel) 803 next_buffer_table = max(next_buffer_table, 804 tx_queue->txd.index + 805 tx_queue->txd.entries); 806 } 807 808 efx_device_detach_sync(efx); 809 efx_stop_all(efx); 810 efx_stop_interrupts(efx, true); 811 812 /* Clone channels (where possible) */ 813 memset(other_channel, 0, sizeof(other_channel)); 814 for (i = 0; i < efx->n_channels; i++) { 815 channel = efx->channel[i]; 816 if (channel->type->copy) 817 channel = channel->type->copy(channel); 818 if (!channel) { 819 rc = -ENOMEM; 820 goto out; 821 } 822 other_channel[i] = channel; 823 } 824 825 /* Swap entry counts and channel pointers */ 826 old_rxq_entries = efx->rxq_entries; 827 old_txq_entries = efx->txq_entries; 828 efx->rxq_entries = rxq_entries; 829 efx->txq_entries = txq_entries; 830 for (i = 0; i < efx->n_channels; i++) { 831 channel = efx->channel[i]; 832 efx->channel[i] = other_channel[i]; 833 other_channel[i] = channel; 834 } 835 836 /* Restart buffer table allocation */ 837 efx->next_buffer_table = next_buffer_table; 838 839 for (i = 0; i < efx->n_channels; i++) { 840 channel = efx->channel[i]; 841 if (!channel->type->copy) 842 continue; 843 rc = efx_probe_channel(channel); 844 if (rc) 845 goto rollback; 846 efx_init_napi_channel(efx->channel[i]); 847 } 848 849 out: 850 /* Destroy unused channel structures */ 851 for (i = 0; i < efx->n_channels; i++) { 852 channel = other_channel[i]; 853 if (channel && channel->type->copy) { 854 efx_fini_napi_channel(channel); 855 efx_remove_channel(channel); 856 kfree(channel); 857 } 858 } 859 860 efx_start_interrupts(efx, true); 861 efx_start_all(efx); 862 netif_device_attach(efx->net_dev); 863 return rc; 864 865 rollback: 866 /* Swap back */ 867 efx->rxq_entries = old_rxq_entries; 868 efx->txq_entries = old_txq_entries; 869 for (i = 0; i < efx->n_channels; i++) { 870 channel = efx->channel[i]; 871 efx->channel[i] = other_channel[i]; 872 other_channel[i] = channel; 873 } 874 goto out; 875 } 876 877 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue) 878 { 879 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); 880 } 881 882 static const struct efx_channel_type efx_default_channel_type = { 883 .pre_probe = efx_channel_dummy_op_int, 884 .post_remove = efx_channel_dummy_op_void, 885 .get_name = efx_get_channel_name, 886 .copy = efx_copy_channel, 887 .keep_eventq = false, 888 }; 889 890 int efx_channel_dummy_op_int(struct efx_channel *channel) 891 { 892 return 0; 893 } 894 895 void efx_channel_dummy_op_void(struct efx_channel *channel) 896 { 897 } 898 899 /************************************************************************** 900 * 901 * Port handling 902 * 903 **************************************************************************/ 904 905 /* This ensures that the kernel is kept informed (via 906 * netif_carrier_on/off) of the link status, and also maintains the 907 * link status's stop on the port's TX queue. 908 */ 909 void efx_link_status_changed(struct efx_nic *efx) 910 { 911 struct efx_link_state *link_state = &efx->link_state; 912 913 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure 914 * that no events are triggered between unregister_netdev() and the 915 * driver unloading. A more general condition is that NETDEV_CHANGE 916 * can only be generated between NETDEV_UP and NETDEV_DOWN */ 917 if (!netif_running(efx->net_dev)) 918 return; 919 920 if (link_state->up != netif_carrier_ok(efx->net_dev)) { 921 efx->n_link_state_changes++; 922 923 if (link_state->up) 924 netif_carrier_on(efx->net_dev); 925 else 926 netif_carrier_off(efx->net_dev); 927 } 928 929 /* Status message for kernel log */ 930 if (link_state->up) 931 netif_info(efx, link, efx->net_dev, 932 "link up at %uMbps %s-duplex (MTU %d)%s\n", 933 link_state->speed, link_state->fd ? "full" : "half", 934 efx->net_dev->mtu, 935 (efx->promiscuous ? " [PROMISC]" : "")); 936 else 937 netif_info(efx, link, efx->net_dev, "link down\n"); 938 } 939 940 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising) 941 { 942 efx->link_advertising = advertising; 943 if (advertising) { 944 if (advertising & ADVERTISED_Pause) 945 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX); 946 else 947 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); 948 if (advertising & ADVERTISED_Asym_Pause) 949 efx->wanted_fc ^= EFX_FC_TX; 950 } 951 } 952 953 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc) 954 { 955 efx->wanted_fc = wanted_fc; 956 if (efx->link_advertising) { 957 if (wanted_fc & EFX_FC_RX) 958 efx->link_advertising |= (ADVERTISED_Pause | 959 ADVERTISED_Asym_Pause); 960 else 961 efx->link_advertising &= ~(ADVERTISED_Pause | 962 ADVERTISED_Asym_Pause); 963 if (wanted_fc & EFX_FC_TX) 964 efx->link_advertising ^= ADVERTISED_Asym_Pause; 965 } 966 } 967 968 static void efx_fini_port(struct efx_nic *efx); 969 970 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure 971 * the MAC appropriately. All other PHY configuration changes are pushed 972 * through phy_op->set_settings(), and pushed asynchronously to the MAC 973 * through efx_monitor(). 974 * 975 * Callers must hold the mac_lock 976 */ 977 int __efx_reconfigure_port(struct efx_nic *efx) 978 { 979 enum efx_phy_mode phy_mode; 980 int rc; 981 982 WARN_ON(!mutex_is_locked(&efx->mac_lock)); 983 984 /* Serialise the promiscuous flag with efx_set_rx_mode. */ 985 netif_addr_lock_bh(efx->net_dev); 986 netif_addr_unlock_bh(efx->net_dev); 987 988 /* Disable PHY transmit in mac level loopbacks */ 989 phy_mode = efx->phy_mode; 990 if (LOOPBACK_INTERNAL(efx)) 991 efx->phy_mode |= PHY_MODE_TX_DISABLED; 992 else 993 efx->phy_mode &= ~PHY_MODE_TX_DISABLED; 994 995 rc = efx->type->reconfigure_port(efx); 996 997 if (rc) 998 efx->phy_mode = phy_mode; 999 1000 return rc; 1001 } 1002 1003 /* Reinitialise the MAC to pick up new PHY settings, even if the port is 1004 * disabled. */ 1005 int efx_reconfigure_port(struct efx_nic *efx) 1006 { 1007 int rc; 1008 1009 EFX_ASSERT_RESET_SERIALISED(efx); 1010 1011 mutex_lock(&efx->mac_lock); 1012 rc = __efx_reconfigure_port(efx); 1013 mutex_unlock(&efx->mac_lock); 1014 1015 return rc; 1016 } 1017 1018 /* Asynchronous work item for changing MAC promiscuity and multicast 1019 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current 1020 * MAC directly. */ 1021 static void efx_mac_work(struct work_struct *data) 1022 { 1023 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work); 1024 1025 mutex_lock(&efx->mac_lock); 1026 if (efx->port_enabled) 1027 efx->type->reconfigure_mac(efx); 1028 mutex_unlock(&efx->mac_lock); 1029 } 1030 1031 static int efx_probe_port(struct efx_nic *efx) 1032 { 1033 int rc; 1034 1035 netif_dbg(efx, probe, efx->net_dev, "create port\n"); 1036 1037 if (phy_flash_cfg) 1038 efx->phy_mode = PHY_MODE_SPECIAL; 1039 1040 /* Connect up MAC/PHY operations table */ 1041 rc = efx->type->probe_port(efx); 1042 if (rc) 1043 return rc; 1044 1045 /* Initialise MAC address to permanent address */ 1046 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN); 1047 1048 return 0; 1049 } 1050 1051 static int efx_init_port(struct efx_nic *efx) 1052 { 1053 int rc; 1054 1055 netif_dbg(efx, drv, efx->net_dev, "init port\n"); 1056 1057 mutex_lock(&efx->mac_lock); 1058 1059 rc = efx->phy_op->init(efx); 1060 if (rc) 1061 goto fail1; 1062 1063 efx->port_initialized = true; 1064 1065 /* Reconfigure the MAC before creating dma queues (required for 1066 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */ 1067 efx->type->reconfigure_mac(efx); 1068 1069 /* Ensure the PHY advertises the correct flow control settings */ 1070 rc = efx->phy_op->reconfigure(efx); 1071 if (rc) 1072 goto fail2; 1073 1074 mutex_unlock(&efx->mac_lock); 1075 return 0; 1076 1077 fail2: 1078 efx->phy_op->fini(efx); 1079 fail1: 1080 mutex_unlock(&efx->mac_lock); 1081 return rc; 1082 } 1083 1084 static void efx_start_port(struct efx_nic *efx) 1085 { 1086 netif_dbg(efx, ifup, efx->net_dev, "start port\n"); 1087 BUG_ON(efx->port_enabled); 1088 1089 mutex_lock(&efx->mac_lock); 1090 efx->port_enabled = true; 1091 1092 /* efx_mac_work() might have been scheduled after efx_stop_port(), 1093 * and then cancelled by efx_flush_all() */ 1094 efx->type->reconfigure_mac(efx); 1095 1096 mutex_unlock(&efx->mac_lock); 1097 } 1098 1099 /* Prevent efx_mac_work() and efx_monitor() from working */ 1100 static void efx_stop_port(struct efx_nic *efx) 1101 { 1102 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); 1103 1104 mutex_lock(&efx->mac_lock); 1105 efx->port_enabled = false; 1106 mutex_unlock(&efx->mac_lock); 1107 1108 /* Serialise against efx_set_multicast_list() */ 1109 netif_addr_lock_bh(efx->net_dev); 1110 netif_addr_unlock_bh(efx->net_dev); 1111 } 1112 1113 static void efx_fini_port(struct efx_nic *efx) 1114 { 1115 netif_dbg(efx, drv, efx->net_dev, "shut down port\n"); 1116 1117 if (!efx->port_initialized) 1118 return; 1119 1120 efx->phy_op->fini(efx); 1121 efx->port_initialized = false; 1122 1123 efx->link_state.up = false; 1124 efx_link_status_changed(efx); 1125 } 1126 1127 static void efx_remove_port(struct efx_nic *efx) 1128 { 1129 netif_dbg(efx, drv, efx->net_dev, "destroying port\n"); 1130 1131 efx->type->remove_port(efx); 1132 } 1133 1134 /************************************************************************** 1135 * 1136 * NIC handling 1137 * 1138 **************************************************************************/ 1139 1140 /* This configures the PCI device to enable I/O and DMA. */ 1141 static int efx_init_io(struct efx_nic *efx) 1142 { 1143 struct pci_dev *pci_dev = efx->pci_dev; 1144 dma_addr_t dma_mask = efx->type->max_dma_mask; 1145 int rc; 1146 1147 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); 1148 1149 rc = pci_enable_device(pci_dev); 1150 if (rc) { 1151 netif_err(efx, probe, efx->net_dev, 1152 "failed to enable PCI device\n"); 1153 goto fail1; 1154 } 1155 1156 pci_set_master(pci_dev); 1157 1158 /* Set the PCI DMA mask. Try all possibilities from our 1159 * genuine mask down to 32 bits, because some architectures 1160 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit 1161 * masks event though they reject 46 bit masks. 1162 */ 1163 while (dma_mask > 0x7fffffffUL) { 1164 if (dma_supported(&pci_dev->dev, dma_mask)) { 1165 rc = dma_set_mask(&pci_dev->dev, dma_mask); 1166 if (rc == 0) 1167 break; 1168 } 1169 dma_mask >>= 1; 1170 } 1171 if (rc) { 1172 netif_err(efx, probe, efx->net_dev, 1173 "could not find a suitable DMA mask\n"); 1174 goto fail2; 1175 } 1176 netif_dbg(efx, probe, efx->net_dev, 1177 "using DMA mask %llx\n", (unsigned long long) dma_mask); 1178 rc = dma_set_coherent_mask(&pci_dev->dev, dma_mask); 1179 if (rc) { 1180 /* dma_set_coherent_mask() is not *allowed* to 1181 * fail with a mask that dma_set_mask() accepted, 1182 * but just in case... 1183 */ 1184 netif_err(efx, probe, efx->net_dev, 1185 "failed to set consistent DMA mask\n"); 1186 goto fail2; 1187 } 1188 1189 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR); 1190 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc"); 1191 if (rc) { 1192 netif_err(efx, probe, efx->net_dev, 1193 "request for memory BAR failed\n"); 1194 rc = -EIO; 1195 goto fail3; 1196 } 1197 efx->membase = ioremap_nocache(efx->membase_phys, 1198 efx->type->mem_map_size); 1199 if (!efx->membase) { 1200 netif_err(efx, probe, efx->net_dev, 1201 "could not map memory BAR at %llx+%x\n", 1202 (unsigned long long)efx->membase_phys, 1203 efx->type->mem_map_size); 1204 rc = -ENOMEM; 1205 goto fail4; 1206 } 1207 netif_dbg(efx, probe, efx->net_dev, 1208 "memory BAR at %llx+%x (virtual %p)\n", 1209 (unsigned long long)efx->membase_phys, 1210 efx->type->mem_map_size, efx->membase); 1211 1212 return 0; 1213 1214 fail4: 1215 pci_release_region(efx->pci_dev, EFX_MEM_BAR); 1216 fail3: 1217 efx->membase_phys = 0; 1218 fail2: 1219 pci_disable_device(efx->pci_dev); 1220 fail1: 1221 return rc; 1222 } 1223 1224 static void efx_fini_io(struct efx_nic *efx) 1225 { 1226 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); 1227 1228 if (efx->membase) { 1229 iounmap(efx->membase); 1230 efx->membase = NULL; 1231 } 1232 1233 if (efx->membase_phys) { 1234 pci_release_region(efx->pci_dev, EFX_MEM_BAR); 1235 efx->membase_phys = 0; 1236 } 1237 1238 pci_disable_device(efx->pci_dev); 1239 } 1240 1241 static unsigned int efx_wanted_parallelism(struct efx_nic *efx) 1242 { 1243 cpumask_var_t thread_mask; 1244 unsigned int count; 1245 int cpu; 1246 1247 if (rss_cpus) { 1248 count = rss_cpus; 1249 } else { 1250 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) { 1251 netif_warn(efx, probe, efx->net_dev, 1252 "RSS disabled due to allocation failure\n"); 1253 return 1; 1254 } 1255 1256 count = 0; 1257 for_each_online_cpu(cpu) { 1258 if (!cpumask_test_cpu(cpu, thread_mask)) { 1259 ++count; 1260 cpumask_or(thread_mask, thread_mask, 1261 topology_thread_cpumask(cpu)); 1262 } 1263 } 1264 1265 free_cpumask_var(thread_mask); 1266 } 1267 1268 /* If RSS is requested for the PF *and* VFs then we can't write RSS 1269 * table entries that are inaccessible to VFs 1270 */ 1271 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 && 1272 count > efx_vf_size(efx)) { 1273 netif_warn(efx, probe, efx->net_dev, 1274 "Reducing number of RSS channels from %u to %u for " 1275 "VF support. Increase vf-msix-limit to use more " 1276 "channels on the PF.\n", 1277 count, efx_vf_size(efx)); 1278 count = efx_vf_size(efx); 1279 } 1280 1281 return count; 1282 } 1283 1284 static int 1285 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries) 1286 { 1287 #ifdef CONFIG_RFS_ACCEL 1288 unsigned int i; 1289 int rc; 1290 1291 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels); 1292 if (!efx->net_dev->rx_cpu_rmap) 1293 return -ENOMEM; 1294 for (i = 0; i < efx->n_rx_channels; i++) { 1295 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap, 1296 xentries[i].vector); 1297 if (rc) { 1298 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap); 1299 efx->net_dev->rx_cpu_rmap = NULL; 1300 return rc; 1301 } 1302 } 1303 #endif 1304 return 0; 1305 } 1306 1307 /* Probe the number and type of interrupts we are able to obtain, and 1308 * the resulting numbers of channels and RX queues. 1309 */ 1310 static int efx_probe_interrupts(struct efx_nic *efx) 1311 { 1312 unsigned int max_channels = 1313 min(efx->type->phys_addr_channels, EFX_MAX_CHANNELS); 1314 unsigned int extra_channels = 0; 1315 unsigned int i, j; 1316 int rc; 1317 1318 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) 1319 if (efx->extra_channel_type[i]) 1320 ++extra_channels; 1321 1322 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) { 1323 struct msix_entry xentries[EFX_MAX_CHANNELS]; 1324 unsigned int n_channels; 1325 1326 n_channels = efx_wanted_parallelism(efx); 1327 if (separate_tx_channels) 1328 n_channels *= 2; 1329 n_channels += extra_channels; 1330 n_channels = min(n_channels, max_channels); 1331 1332 for (i = 0; i < n_channels; i++) 1333 xentries[i].entry = i; 1334 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels); 1335 if (rc > 0) { 1336 netif_err(efx, drv, efx->net_dev, 1337 "WARNING: Insufficient MSI-X vectors" 1338 " available (%d < %u).\n", rc, n_channels); 1339 netif_err(efx, drv, efx->net_dev, 1340 "WARNING: Performance may be reduced.\n"); 1341 EFX_BUG_ON_PARANOID(rc >= n_channels); 1342 n_channels = rc; 1343 rc = pci_enable_msix(efx->pci_dev, xentries, 1344 n_channels); 1345 } 1346 1347 if (rc == 0) { 1348 efx->n_channels = n_channels; 1349 if (n_channels > extra_channels) 1350 n_channels -= extra_channels; 1351 if (separate_tx_channels) { 1352 efx->n_tx_channels = max(n_channels / 2, 1U); 1353 efx->n_rx_channels = max(n_channels - 1354 efx->n_tx_channels, 1355 1U); 1356 } else { 1357 efx->n_tx_channels = n_channels; 1358 efx->n_rx_channels = n_channels; 1359 } 1360 rc = efx_init_rx_cpu_rmap(efx, xentries); 1361 if (rc) { 1362 pci_disable_msix(efx->pci_dev); 1363 return rc; 1364 } 1365 for (i = 0; i < efx->n_channels; i++) 1366 efx_get_channel(efx, i)->irq = 1367 xentries[i].vector; 1368 } else { 1369 /* Fall back to single channel MSI */ 1370 efx->interrupt_mode = EFX_INT_MODE_MSI; 1371 netif_err(efx, drv, efx->net_dev, 1372 "could not enable MSI-X\n"); 1373 } 1374 } 1375 1376 /* Try single interrupt MSI */ 1377 if (efx->interrupt_mode == EFX_INT_MODE_MSI) { 1378 efx->n_channels = 1; 1379 efx->n_rx_channels = 1; 1380 efx->n_tx_channels = 1; 1381 rc = pci_enable_msi(efx->pci_dev); 1382 if (rc == 0) { 1383 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq; 1384 } else { 1385 netif_err(efx, drv, efx->net_dev, 1386 "could not enable MSI\n"); 1387 efx->interrupt_mode = EFX_INT_MODE_LEGACY; 1388 } 1389 } 1390 1391 /* Assume legacy interrupts */ 1392 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) { 1393 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0); 1394 efx->n_rx_channels = 1; 1395 efx->n_tx_channels = 1; 1396 efx->legacy_irq = efx->pci_dev->irq; 1397 } 1398 1399 /* Assign extra channels if possible */ 1400 j = efx->n_channels; 1401 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) { 1402 if (!efx->extra_channel_type[i]) 1403 continue; 1404 if (efx->interrupt_mode != EFX_INT_MODE_MSIX || 1405 efx->n_channels <= extra_channels) { 1406 efx->extra_channel_type[i]->handle_no_channel(efx); 1407 } else { 1408 --j; 1409 efx_get_channel(efx, j)->type = 1410 efx->extra_channel_type[i]; 1411 } 1412 } 1413 1414 /* RSS might be usable on VFs even if it is disabled on the PF */ 1415 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ? 1416 efx->n_rx_channels : efx_vf_size(efx)); 1417 1418 return 0; 1419 } 1420 1421 /* Enable interrupts, then probe and start the event queues */ 1422 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq) 1423 { 1424 struct efx_channel *channel; 1425 1426 BUG_ON(efx->state == STATE_DISABLED); 1427 1428 if (efx->legacy_irq) 1429 efx->legacy_irq_enabled = true; 1430 efx_nic_enable_interrupts(efx); 1431 1432 efx_for_each_channel(channel, efx) { 1433 if (!channel->type->keep_eventq || !may_keep_eventq) 1434 efx_init_eventq(channel); 1435 efx_start_eventq(channel); 1436 } 1437 1438 efx_mcdi_mode_event(efx); 1439 } 1440 1441 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq) 1442 { 1443 struct efx_channel *channel; 1444 1445 if (efx->state == STATE_DISABLED) 1446 return; 1447 1448 efx_mcdi_mode_poll(efx); 1449 1450 efx_nic_disable_interrupts(efx); 1451 if (efx->legacy_irq) { 1452 synchronize_irq(efx->legacy_irq); 1453 efx->legacy_irq_enabled = false; 1454 } 1455 1456 efx_for_each_channel(channel, efx) { 1457 if (channel->irq) 1458 synchronize_irq(channel->irq); 1459 1460 efx_stop_eventq(channel); 1461 if (!channel->type->keep_eventq || !may_keep_eventq) 1462 efx_fini_eventq(channel); 1463 } 1464 } 1465 1466 static void efx_remove_interrupts(struct efx_nic *efx) 1467 { 1468 struct efx_channel *channel; 1469 1470 /* Remove MSI/MSI-X interrupts */ 1471 efx_for_each_channel(channel, efx) 1472 channel->irq = 0; 1473 pci_disable_msi(efx->pci_dev); 1474 pci_disable_msix(efx->pci_dev); 1475 1476 /* Remove legacy interrupt */ 1477 efx->legacy_irq = 0; 1478 } 1479 1480 static void efx_set_channels(struct efx_nic *efx) 1481 { 1482 struct efx_channel *channel; 1483 struct efx_tx_queue *tx_queue; 1484 1485 efx->tx_channel_offset = 1486 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0; 1487 1488 /* We need to mark which channels really have RX and TX 1489 * queues, and adjust the TX queue numbers if we have separate 1490 * RX-only and TX-only channels. 1491 */ 1492 efx_for_each_channel(channel, efx) { 1493 if (channel->channel < efx->n_rx_channels) 1494 channel->rx_queue.core_index = channel->channel; 1495 else 1496 channel->rx_queue.core_index = -1; 1497 1498 efx_for_each_channel_tx_queue(tx_queue, channel) 1499 tx_queue->queue -= (efx->tx_channel_offset * 1500 EFX_TXQ_TYPES); 1501 } 1502 } 1503 1504 static int efx_probe_nic(struct efx_nic *efx) 1505 { 1506 size_t i; 1507 int rc; 1508 1509 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n"); 1510 1511 /* Carry out hardware-type specific initialisation */ 1512 rc = efx->type->probe(efx); 1513 if (rc) 1514 return rc; 1515 1516 /* Determine the number of channels and queues by trying to hook 1517 * in MSI-X interrupts. */ 1518 rc = efx_probe_interrupts(efx); 1519 if (rc) 1520 goto fail; 1521 1522 efx->type->dimension_resources(efx); 1523 1524 if (efx->n_channels > 1) 1525 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key)); 1526 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++) 1527 efx->rx_indir_table[i] = 1528 ethtool_rxfh_indir_default(i, efx->rss_spread); 1529 1530 efx_set_channels(efx); 1531 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels); 1532 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels); 1533 1534 /* Initialise the interrupt moderation settings */ 1535 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true, 1536 true); 1537 1538 return 0; 1539 1540 fail: 1541 efx->type->remove(efx); 1542 return rc; 1543 } 1544 1545 static void efx_remove_nic(struct efx_nic *efx) 1546 { 1547 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n"); 1548 1549 efx_remove_interrupts(efx); 1550 efx->type->remove(efx); 1551 } 1552 1553 /************************************************************************** 1554 * 1555 * NIC startup/shutdown 1556 * 1557 *************************************************************************/ 1558 1559 static int efx_probe_all(struct efx_nic *efx) 1560 { 1561 int rc; 1562 1563 rc = efx_probe_nic(efx); 1564 if (rc) { 1565 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n"); 1566 goto fail1; 1567 } 1568 1569 rc = efx_probe_port(efx); 1570 if (rc) { 1571 netif_err(efx, probe, efx->net_dev, "failed to create port\n"); 1572 goto fail2; 1573 } 1574 1575 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT); 1576 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) { 1577 rc = -EINVAL; 1578 goto fail3; 1579 } 1580 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE; 1581 1582 rc = efx_probe_filters(efx); 1583 if (rc) { 1584 netif_err(efx, probe, efx->net_dev, 1585 "failed to create filter tables\n"); 1586 goto fail3; 1587 } 1588 1589 rc = efx_probe_channels(efx); 1590 if (rc) 1591 goto fail4; 1592 1593 return 0; 1594 1595 fail4: 1596 efx_remove_filters(efx); 1597 fail3: 1598 efx_remove_port(efx); 1599 fail2: 1600 efx_remove_nic(efx); 1601 fail1: 1602 return rc; 1603 } 1604 1605 /* If the interface is supposed to be running but is not, start 1606 * the hardware and software data path, regular activity for the port 1607 * (MAC statistics, link polling, etc.) and schedule the port to be 1608 * reconfigured. Interrupts must already be enabled. This function 1609 * is safe to call multiple times, so long as the NIC is not disabled. 1610 * Requires the RTNL lock. 1611 */ 1612 static void efx_start_all(struct efx_nic *efx) 1613 { 1614 EFX_ASSERT_RESET_SERIALISED(efx); 1615 BUG_ON(efx->state == STATE_DISABLED); 1616 1617 /* Check that it is appropriate to restart the interface. All 1618 * of these flags are safe to read under just the rtnl lock */ 1619 if (efx->port_enabled || !netif_running(efx->net_dev)) 1620 return; 1621 1622 efx_start_port(efx); 1623 efx_start_datapath(efx); 1624 1625 /* Start the hardware monitor if there is one */ 1626 if (efx->type->monitor != NULL) 1627 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1628 efx_monitor_interval); 1629 1630 /* If link state detection is normally event-driven, we have 1631 * to poll now because we could have missed a change 1632 */ 1633 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) { 1634 mutex_lock(&efx->mac_lock); 1635 if (efx->phy_op->poll(efx)) 1636 efx_link_status_changed(efx); 1637 mutex_unlock(&efx->mac_lock); 1638 } 1639 1640 efx->type->start_stats(efx); 1641 } 1642 1643 /* Flush all delayed work. Should only be called when no more delayed work 1644 * will be scheduled. This doesn't flush pending online resets (efx_reset), 1645 * since we're holding the rtnl_lock at this point. */ 1646 static void efx_flush_all(struct efx_nic *efx) 1647 { 1648 /* Make sure the hardware monitor and event self-test are stopped */ 1649 cancel_delayed_work_sync(&efx->monitor_work); 1650 efx_selftest_async_cancel(efx); 1651 /* Stop scheduled port reconfigurations */ 1652 cancel_work_sync(&efx->mac_work); 1653 } 1654 1655 /* Quiesce the hardware and software data path, and regular activity 1656 * for the port without bringing the link down. Safe to call multiple 1657 * times with the NIC in almost any state, but interrupts should be 1658 * enabled. Requires the RTNL lock. 1659 */ 1660 static void efx_stop_all(struct efx_nic *efx) 1661 { 1662 EFX_ASSERT_RESET_SERIALISED(efx); 1663 1664 /* port_enabled can be read safely under the rtnl lock */ 1665 if (!efx->port_enabled) 1666 return; 1667 1668 efx->type->stop_stats(efx); 1669 efx_stop_port(efx); 1670 1671 /* Flush efx_mac_work(), refill_workqueue, monitor_work */ 1672 efx_flush_all(efx); 1673 1674 /* Stop the kernel transmit interface. This is only valid if 1675 * the device is stopped or detached; otherwise the watchdog 1676 * may fire immediately. 1677 */ 1678 WARN_ON(netif_running(efx->net_dev) && 1679 netif_device_present(efx->net_dev)); 1680 netif_tx_disable(efx->net_dev); 1681 1682 efx_stop_datapath(efx); 1683 } 1684 1685 static void efx_remove_all(struct efx_nic *efx) 1686 { 1687 efx_remove_channels(efx); 1688 efx_remove_filters(efx); 1689 efx_remove_port(efx); 1690 efx_remove_nic(efx); 1691 } 1692 1693 /************************************************************************** 1694 * 1695 * Interrupt moderation 1696 * 1697 **************************************************************************/ 1698 1699 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns) 1700 { 1701 if (usecs == 0) 1702 return 0; 1703 if (usecs * 1000 < quantum_ns) 1704 return 1; /* never round down to 0 */ 1705 return usecs * 1000 / quantum_ns; 1706 } 1707 1708 /* Set interrupt moderation parameters */ 1709 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, 1710 unsigned int rx_usecs, bool rx_adaptive, 1711 bool rx_may_override_tx) 1712 { 1713 struct efx_channel *channel; 1714 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max * 1715 efx->timer_quantum_ns, 1716 1000); 1717 unsigned int tx_ticks; 1718 unsigned int rx_ticks; 1719 1720 EFX_ASSERT_RESET_SERIALISED(efx); 1721 1722 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max) 1723 return -EINVAL; 1724 1725 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns); 1726 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns); 1727 1728 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 && 1729 !rx_may_override_tx) { 1730 netif_err(efx, drv, efx->net_dev, "Channels are shared. " 1731 "RX and TX IRQ moderation must be equal\n"); 1732 return -EINVAL; 1733 } 1734 1735 efx->irq_rx_adaptive = rx_adaptive; 1736 efx->irq_rx_moderation = rx_ticks; 1737 efx_for_each_channel(channel, efx) { 1738 if (efx_channel_has_rx_queue(channel)) 1739 channel->irq_moderation = rx_ticks; 1740 else if (efx_channel_has_tx_queues(channel)) 1741 channel->irq_moderation = tx_ticks; 1742 } 1743 1744 return 0; 1745 } 1746 1747 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, 1748 unsigned int *rx_usecs, bool *rx_adaptive) 1749 { 1750 /* We must round up when converting ticks to microseconds 1751 * because we round down when converting the other way. 1752 */ 1753 1754 *rx_adaptive = efx->irq_rx_adaptive; 1755 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation * 1756 efx->timer_quantum_ns, 1757 1000); 1758 1759 /* If channels are shared between RX and TX, so is IRQ 1760 * moderation. Otherwise, IRQ moderation is the same for all 1761 * TX channels and is not adaptive. 1762 */ 1763 if (efx->tx_channel_offset == 0) 1764 *tx_usecs = *rx_usecs; 1765 else 1766 *tx_usecs = DIV_ROUND_UP( 1767 efx->channel[efx->tx_channel_offset]->irq_moderation * 1768 efx->timer_quantum_ns, 1769 1000); 1770 } 1771 1772 /************************************************************************** 1773 * 1774 * Hardware monitor 1775 * 1776 **************************************************************************/ 1777 1778 /* Run periodically off the general workqueue */ 1779 static void efx_monitor(struct work_struct *data) 1780 { 1781 struct efx_nic *efx = container_of(data, struct efx_nic, 1782 monitor_work.work); 1783 1784 netif_vdbg(efx, timer, efx->net_dev, 1785 "hardware monitor executing on CPU %d\n", 1786 raw_smp_processor_id()); 1787 BUG_ON(efx->type->monitor == NULL); 1788 1789 /* If the mac_lock is already held then it is likely a port 1790 * reconfiguration is already in place, which will likely do 1791 * most of the work of monitor() anyway. */ 1792 if (mutex_trylock(&efx->mac_lock)) { 1793 if (efx->port_enabled) 1794 efx->type->monitor(efx); 1795 mutex_unlock(&efx->mac_lock); 1796 } 1797 1798 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1799 efx_monitor_interval); 1800 } 1801 1802 /************************************************************************** 1803 * 1804 * ioctls 1805 * 1806 *************************************************************************/ 1807 1808 /* Net device ioctl 1809 * Context: process, rtnl_lock() held. 1810 */ 1811 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) 1812 { 1813 struct efx_nic *efx = netdev_priv(net_dev); 1814 struct mii_ioctl_data *data = if_mii(ifr); 1815 1816 if (cmd == SIOCSHWTSTAMP) 1817 return efx_ptp_ioctl(efx, ifr, cmd); 1818 1819 /* Convert phy_id from older PRTAD/DEVAD format */ 1820 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) && 1821 (data->phy_id & 0xfc00) == 0x0400) 1822 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400; 1823 1824 return mdio_mii_ioctl(&efx->mdio, data, cmd); 1825 } 1826 1827 /************************************************************************** 1828 * 1829 * NAPI interface 1830 * 1831 **************************************************************************/ 1832 1833 static void efx_init_napi_channel(struct efx_channel *channel) 1834 { 1835 struct efx_nic *efx = channel->efx; 1836 1837 channel->napi_dev = efx->net_dev; 1838 netif_napi_add(channel->napi_dev, &channel->napi_str, 1839 efx_poll, napi_weight); 1840 } 1841 1842 static void efx_init_napi(struct efx_nic *efx) 1843 { 1844 struct efx_channel *channel; 1845 1846 efx_for_each_channel(channel, efx) 1847 efx_init_napi_channel(channel); 1848 } 1849 1850 static void efx_fini_napi_channel(struct efx_channel *channel) 1851 { 1852 if (channel->napi_dev) 1853 netif_napi_del(&channel->napi_str); 1854 channel->napi_dev = NULL; 1855 } 1856 1857 static void efx_fini_napi(struct efx_nic *efx) 1858 { 1859 struct efx_channel *channel; 1860 1861 efx_for_each_channel(channel, efx) 1862 efx_fini_napi_channel(channel); 1863 } 1864 1865 /************************************************************************** 1866 * 1867 * Kernel netpoll interface 1868 * 1869 *************************************************************************/ 1870 1871 #ifdef CONFIG_NET_POLL_CONTROLLER 1872 1873 /* Although in the common case interrupts will be disabled, this is not 1874 * guaranteed. However, all our work happens inside the NAPI callback, 1875 * so no locking is required. 1876 */ 1877 static void efx_netpoll(struct net_device *net_dev) 1878 { 1879 struct efx_nic *efx = netdev_priv(net_dev); 1880 struct efx_channel *channel; 1881 1882 efx_for_each_channel(channel, efx) 1883 efx_schedule_channel(channel); 1884 } 1885 1886 #endif 1887 1888 /************************************************************************** 1889 * 1890 * Kernel net device interface 1891 * 1892 *************************************************************************/ 1893 1894 /* Context: process, rtnl_lock() held. */ 1895 static int efx_net_open(struct net_device *net_dev) 1896 { 1897 struct efx_nic *efx = netdev_priv(net_dev); 1898 int rc; 1899 1900 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n", 1901 raw_smp_processor_id()); 1902 1903 rc = efx_check_disabled(efx); 1904 if (rc) 1905 return rc; 1906 if (efx->phy_mode & PHY_MODE_SPECIAL) 1907 return -EBUSY; 1908 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL)) 1909 return -EIO; 1910 1911 /* Notify the kernel of the link state polled during driver load, 1912 * before the monitor starts running */ 1913 efx_link_status_changed(efx); 1914 1915 efx_start_all(efx); 1916 efx_selftest_async_start(efx); 1917 return 0; 1918 } 1919 1920 /* Context: process, rtnl_lock() held. 1921 * Note that the kernel will ignore our return code; this method 1922 * should really be a void. 1923 */ 1924 static int efx_net_stop(struct net_device *net_dev) 1925 { 1926 struct efx_nic *efx = netdev_priv(net_dev); 1927 1928 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n", 1929 raw_smp_processor_id()); 1930 1931 /* Stop the device and flush all the channels */ 1932 efx_stop_all(efx); 1933 1934 return 0; 1935 } 1936 1937 /* Context: process, dev_base_lock or RTNL held, non-blocking. */ 1938 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, 1939 struct rtnl_link_stats64 *stats) 1940 { 1941 struct efx_nic *efx = netdev_priv(net_dev); 1942 struct efx_mac_stats *mac_stats = &efx->mac_stats; 1943 1944 spin_lock_bh(&efx->stats_lock); 1945 1946 efx->type->update_stats(efx); 1947 1948 stats->rx_packets = mac_stats->rx_packets; 1949 stats->tx_packets = mac_stats->tx_packets; 1950 stats->rx_bytes = mac_stats->rx_bytes; 1951 stats->tx_bytes = mac_stats->tx_bytes; 1952 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt; 1953 stats->multicast = mac_stats->rx_multicast; 1954 stats->collisions = mac_stats->tx_collision; 1955 stats->rx_length_errors = (mac_stats->rx_gtjumbo + 1956 mac_stats->rx_length_error); 1957 stats->rx_crc_errors = mac_stats->rx_bad; 1958 stats->rx_frame_errors = mac_stats->rx_align_error; 1959 stats->rx_fifo_errors = mac_stats->rx_overflow; 1960 stats->rx_missed_errors = mac_stats->rx_missed; 1961 stats->tx_window_errors = mac_stats->tx_late_collision; 1962 1963 stats->rx_errors = (stats->rx_length_errors + 1964 stats->rx_crc_errors + 1965 stats->rx_frame_errors + 1966 mac_stats->rx_symbol_error); 1967 stats->tx_errors = (stats->tx_window_errors + 1968 mac_stats->tx_bad); 1969 1970 spin_unlock_bh(&efx->stats_lock); 1971 1972 return stats; 1973 } 1974 1975 /* Context: netif_tx_lock held, BHs disabled. */ 1976 static void efx_watchdog(struct net_device *net_dev) 1977 { 1978 struct efx_nic *efx = netdev_priv(net_dev); 1979 1980 netif_err(efx, tx_err, efx->net_dev, 1981 "TX stuck with port_enabled=%d: resetting channels\n", 1982 efx->port_enabled); 1983 1984 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG); 1985 } 1986 1987 1988 /* Context: process, rtnl_lock() held. */ 1989 static int efx_change_mtu(struct net_device *net_dev, int new_mtu) 1990 { 1991 struct efx_nic *efx = netdev_priv(net_dev); 1992 int rc; 1993 1994 rc = efx_check_disabled(efx); 1995 if (rc) 1996 return rc; 1997 if (new_mtu > EFX_MAX_MTU) 1998 return -EINVAL; 1999 2000 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); 2001 2002 efx_device_detach_sync(efx); 2003 efx_stop_all(efx); 2004 2005 mutex_lock(&efx->mac_lock); 2006 net_dev->mtu = new_mtu; 2007 efx->type->reconfigure_mac(efx); 2008 mutex_unlock(&efx->mac_lock); 2009 2010 efx_start_all(efx); 2011 netif_device_attach(efx->net_dev); 2012 return 0; 2013 } 2014 2015 static int efx_set_mac_address(struct net_device *net_dev, void *data) 2016 { 2017 struct efx_nic *efx = netdev_priv(net_dev); 2018 struct sockaddr *addr = data; 2019 char *new_addr = addr->sa_data; 2020 2021 if (!is_valid_ether_addr(new_addr)) { 2022 netif_err(efx, drv, efx->net_dev, 2023 "invalid ethernet MAC address requested: %pM\n", 2024 new_addr); 2025 return -EADDRNOTAVAIL; 2026 } 2027 2028 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len); 2029 efx_sriov_mac_address_changed(efx); 2030 2031 /* Reconfigure the MAC */ 2032 mutex_lock(&efx->mac_lock); 2033 efx->type->reconfigure_mac(efx); 2034 mutex_unlock(&efx->mac_lock); 2035 2036 return 0; 2037 } 2038 2039 /* Context: netif_addr_lock held, BHs disabled. */ 2040 static void efx_set_rx_mode(struct net_device *net_dev) 2041 { 2042 struct efx_nic *efx = netdev_priv(net_dev); 2043 struct netdev_hw_addr *ha; 2044 union efx_multicast_hash *mc_hash = &efx->multicast_hash; 2045 u32 crc; 2046 int bit; 2047 2048 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC); 2049 2050 /* Build multicast hash table */ 2051 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) { 2052 memset(mc_hash, 0xff, sizeof(*mc_hash)); 2053 } else { 2054 memset(mc_hash, 0x00, sizeof(*mc_hash)); 2055 netdev_for_each_mc_addr(ha, net_dev) { 2056 crc = ether_crc_le(ETH_ALEN, ha->addr); 2057 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1); 2058 __set_bit_le(bit, mc_hash); 2059 } 2060 2061 /* Broadcast packets go through the multicast hash filter. 2062 * ether_crc_le() of the broadcast address is 0xbe2612ff 2063 * so we always add bit 0xff to the mask. 2064 */ 2065 __set_bit_le(0xff, mc_hash); 2066 } 2067 2068 if (efx->port_enabled) 2069 queue_work(efx->workqueue, &efx->mac_work); 2070 /* Otherwise efx_start_port() will do this */ 2071 } 2072 2073 static int efx_set_features(struct net_device *net_dev, netdev_features_t data) 2074 { 2075 struct efx_nic *efx = netdev_priv(net_dev); 2076 2077 /* If disabling RX n-tuple filtering, clear existing filters */ 2078 if (net_dev->features & ~data & NETIF_F_NTUPLE) 2079 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL); 2080 2081 return 0; 2082 } 2083 2084 static const struct net_device_ops efx_netdev_ops = { 2085 .ndo_open = efx_net_open, 2086 .ndo_stop = efx_net_stop, 2087 .ndo_get_stats64 = efx_net_stats, 2088 .ndo_tx_timeout = efx_watchdog, 2089 .ndo_start_xmit = efx_hard_start_xmit, 2090 .ndo_validate_addr = eth_validate_addr, 2091 .ndo_do_ioctl = efx_ioctl, 2092 .ndo_change_mtu = efx_change_mtu, 2093 .ndo_set_mac_address = efx_set_mac_address, 2094 .ndo_set_rx_mode = efx_set_rx_mode, 2095 .ndo_set_features = efx_set_features, 2096 #ifdef CONFIG_SFC_SRIOV 2097 .ndo_set_vf_mac = efx_sriov_set_vf_mac, 2098 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan, 2099 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk, 2100 .ndo_get_vf_config = efx_sriov_get_vf_config, 2101 #endif 2102 #ifdef CONFIG_NET_POLL_CONTROLLER 2103 .ndo_poll_controller = efx_netpoll, 2104 #endif 2105 .ndo_setup_tc = efx_setup_tc, 2106 #ifdef CONFIG_RFS_ACCEL 2107 .ndo_rx_flow_steer = efx_filter_rfs, 2108 #endif 2109 }; 2110 2111 static void efx_update_name(struct efx_nic *efx) 2112 { 2113 strcpy(efx->name, efx->net_dev->name); 2114 efx_mtd_rename(efx); 2115 efx_set_channel_names(efx); 2116 } 2117 2118 static int efx_netdev_event(struct notifier_block *this, 2119 unsigned long event, void *ptr) 2120 { 2121 struct net_device *net_dev = ptr; 2122 2123 if (net_dev->netdev_ops == &efx_netdev_ops && 2124 event == NETDEV_CHANGENAME) 2125 efx_update_name(netdev_priv(net_dev)); 2126 2127 return NOTIFY_DONE; 2128 } 2129 2130 static struct notifier_block efx_netdev_notifier = { 2131 .notifier_call = efx_netdev_event, 2132 }; 2133 2134 static ssize_t 2135 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf) 2136 { 2137 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2138 return sprintf(buf, "%d\n", efx->phy_type); 2139 } 2140 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL); 2141 2142 static int efx_register_netdev(struct efx_nic *efx) 2143 { 2144 struct net_device *net_dev = efx->net_dev; 2145 struct efx_channel *channel; 2146 int rc; 2147 2148 net_dev->watchdog_timeo = 5 * HZ; 2149 net_dev->irq = efx->pci_dev->irq; 2150 net_dev->netdev_ops = &efx_netdev_ops; 2151 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops); 2152 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS; 2153 2154 rtnl_lock(); 2155 2156 /* Enable resets to be scheduled and check whether any were 2157 * already requested. If so, the NIC is probably hosed so we 2158 * abort. 2159 */ 2160 efx->state = STATE_READY; 2161 smp_mb(); /* ensure we change state before checking reset_pending */ 2162 if (efx->reset_pending) { 2163 netif_err(efx, probe, efx->net_dev, 2164 "aborting probe due to scheduled reset\n"); 2165 rc = -EIO; 2166 goto fail_locked; 2167 } 2168 2169 rc = dev_alloc_name(net_dev, net_dev->name); 2170 if (rc < 0) 2171 goto fail_locked; 2172 efx_update_name(efx); 2173 2174 /* Always start with carrier off; PHY events will detect the link */ 2175 netif_carrier_off(net_dev); 2176 2177 rc = register_netdevice(net_dev); 2178 if (rc) 2179 goto fail_locked; 2180 2181 efx_for_each_channel(channel, efx) { 2182 struct efx_tx_queue *tx_queue; 2183 efx_for_each_channel_tx_queue(tx_queue, channel) 2184 efx_init_tx_queue_core_txq(tx_queue); 2185 } 2186 2187 rtnl_unlock(); 2188 2189 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2190 if (rc) { 2191 netif_err(efx, drv, efx->net_dev, 2192 "failed to init net dev attributes\n"); 2193 goto fail_registered; 2194 } 2195 2196 return 0; 2197 2198 fail_registered: 2199 rtnl_lock(); 2200 unregister_netdevice(net_dev); 2201 fail_locked: 2202 efx->state = STATE_UNINIT; 2203 rtnl_unlock(); 2204 netif_err(efx, drv, efx->net_dev, "could not register net dev\n"); 2205 return rc; 2206 } 2207 2208 static void efx_unregister_netdev(struct efx_nic *efx) 2209 { 2210 struct efx_channel *channel; 2211 struct efx_tx_queue *tx_queue; 2212 2213 if (!efx->net_dev) 2214 return; 2215 2216 BUG_ON(netdev_priv(efx->net_dev) != efx); 2217 2218 /* Free up any skbs still remaining. This has to happen before 2219 * we try to unregister the netdev as running their destructors 2220 * may be needed to get the device ref. count to 0. */ 2221 efx_for_each_channel(channel, efx) { 2222 efx_for_each_channel_tx_queue(tx_queue, channel) 2223 efx_release_tx_buffers(tx_queue); 2224 } 2225 2226 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name)); 2227 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2228 2229 rtnl_lock(); 2230 unregister_netdevice(efx->net_dev); 2231 efx->state = STATE_UNINIT; 2232 rtnl_unlock(); 2233 } 2234 2235 /************************************************************************** 2236 * 2237 * Device reset and suspend 2238 * 2239 **************************************************************************/ 2240 2241 /* Tears down the entire software state and most of the hardware state 2242 * before reset. */ 2243 void efx_reset_down(struct efx_nic *efx, enum reset_type method) 2244 { 2245 EFX_ASSERT_RESET_SERIALISED(efx); 2246 2247 efx_stop_all(efx); 2248 efx_stop_interrupts(efx, false); 2249 2250 mutex_lock(&efx->mac_lock); 2251 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) 2252 efx->phy_op->fini(efx); 2253 efx->type->fini(efx); 2254 } 2255 2256 /* This function will always ensure that the locks acquired in 2257 * efx_reset_down() are released. A failure return code indicates 2258 * that we were unable to reinitialise the hardware, and the 2259 * driver should be disabled. If ok is false, then the rx and tx 2260 * engines are not restarted, pending a RESET_DISABLE. */ 2261 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok) 2262 { 2263 int rc; 2264 2265 EFX_ASSERT_RESET_SERIALISED(efx); 2266 2267 rc = efx->type->init(efx); 2268 if (rc) { 2269 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); 2270 goto fail; 2271 } 2272 2273 if (!ok) 2274 goto fail; 2275 2276 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) { 2277 rc = efx->phy_op->init(efx); 2278 if (rc) 2279 goto fail; 2280 if (efx->phy_op->reconfigure(efx)) 2281 netif_err(efx, drv, efx->net_dev, 2282 "could not restore PHY settings\n"); 2283 } 2284 2285 efx->type->reconfigure_mac(efx); 2286 2287 efx_start_interrupts(efx, false); 2288 efx_restore_filters(efx); 2289 efx_sriov_reset(efx); 2290 2291 mutex_unlock(&efx->mac_lock); 2292 2293 efx_start_all(efx); 2294 2295 return 0; 2296 2297 fail: 2298 efx->port_initialized = false; 2299 2300 mutex_unlock(&efx->mac_lock); 2301 2302 return rc; 2303 } 2304 2305 /* Reset the NIC using the specified method. Note that the reset may 2306 * fail, in which case the card will be left in an unusable state. 2307 * 2308 * Caller must hold the rtnl_lock. 2309 */ 2310 int efx_reset(struct efx_nic *efx, enum reset_type method) 2311 { 2312 int rc, rc2; 2313 bool disabled; 2314 2315 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", 2316 RESET_TYPE(method)); 2317 2318 efx_device_detach_sync(efx); 2319 efx_reset_down(efx, method); 2320 2321 rc = efx->type->reset(efx, method); 2322 if (rc) { 2323 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); 2324 goto out; 2325 } 2326 2327 /* Clear flags for the scopes we covered. We assume the NIC and 2328 * driver are now quiescent so that there is no race here. 2329 */ 2330 efx->reset_pending &= -(1 << (method + 1)); 2331 2332 /* Reinitialise bus-mastering, which may have been turned off before 2333 * the reset was scheduled. This is still appropriate, even in the 2334 * RESET_TYPE_DISABLE since this driver generally assumes the hardware 2335 * can respond to requests. */ 2336 pci_set_master(efx->pci_dev); 2337 2338 out: 2339 /* Leave device stopped if necessary */ 2340 disabled = rc || 2341 method == RESET_TYPE_DISABLE || 2342 method == RESET_TYPE_RECOVER_OR_DISABLE; 2343 rc2 = efx_reset_up(efx, method, !disabled); 2344 if (rc2) { 2345 disabled = true; 2346 if (!rc) 2347 rc = rc2; 2348 } 2349 2350 if (disabled) { 2351 dev_close(efx->net_dev); 2352 netif_err(efx, drv, efx->net_dev, "has been disabled\n"); 2353 efx->state = STATE_DISABLED; 2354 } else { 2355 netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); 2356 netif_device_attach(efx->net_dev); 2357 } 2358 return rc; 2359 } 2360 2361 /* Try recovery mechanisms. 2362 * For now only EEH is supported. 2363 * Returns 0 if the recovery mechanisms are unsuccessful. 2364 * Returns a non-zero value otherwise. 2365 */ 2366 static int efx_try_recovery(struct efx_nic *efx) 2367 { 2368 #ifdef CONFIG_EEH 2369 /* A PCI error can occur and not be seen by EEH because nothing 2370 * happens on the PCI bus. In this case the driver may fail and 2371 * schedule a 'recover or reset', leading to this recovery handler. 2372 * Manually call the eeh failure check function. 2373 */ 2374 struct eeh_dev *eehdev = 2375 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev)); 2376 2377 if (eeh_dev_check_failure(eehdev)) { 2378 /* The EEH mechanisms will handle the error and reset the 2379 * device if necessary. 2380 */ 2381 return 1; 2382 } 2383 #endif 2384 return 0; 2385 } 2386 2387 /* The worker thread exists so that code that cannot sleep can 2388 * schedule a reset for later. 2389 */ 2390 static void efx_reset_work(struct work_struct *data) 2391 { 2392 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); 2393 unsigned long pending; 2394 enum reset_type method; 2395 2396 pending = ACCESS_ONCE(efx->reset_pending); 2397 method = fls(pending) - 1; 2398 2399 if ((method == RESET_TYPE_RECOVER_OR_DISABLE || 2400 method == RESET_TYPE_RECOVER_OR_ALL) && 2401 efx_try_recovery(efx)) 2402 return; 2403 2404 if (!pending) 2405 return; 2406 2407 rtnl_lock(); 2408 2409 /* We checked the state in efx_schedule_reset() but it may 2410 * have changed by now. Now that we have the RTNL lock, 2411 * it cannot change again. 2412 */ 2413 if (efx->state == STATE_READY) 2414 (void)efx_reset(efx, method); 2415 2416 rtnl_unlock(); 2417 } 2418 2419 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) 2420 { 2421 enum reset_type method; 2422 2423 if (efx->state == STATE_RECOVERY) { 2424 netif_dbg(efx, drv, efx->net_dev, 2425 "recovering: skip scheduling %s reset\n", 2426 RESET_TYPE(type)); 2427 return; 2428 } 2429 2430 switch (type) { 2431 case RESET_TYPE_INVISIBLE: 2432 case RESET_TYPE_ALL: 2433 case RESET_TYPE_RECOVER_OR_ALL: 2434 case RESET_TYPE_WORLD: 2435 case RESET_TYPE_DISABLE: 2436 case RESET_TYPE_RECOVER_OR_DISABLE: 2437 method = type; 2438 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", 2439 RESET_TYPE(method)); 2440 break; 2441 default: 2442 method = efx->type->map_reset_reason(type); 2443 netif_dbg(efx, drv, efx->net_dev, 2444 "scheduling %s reset for %s\n", 2445 RESET_TYPE(method), RESET_TYPE(type)); 2446 break; 2447 } 2448 2449 set_bit(method, &efx->reset_pending); 2450 smp_mb(); /* ensure we change reset_pending before checking state */ 2451 2452 /* If we're not READY then just leave the flags set as the cue 2453 * to abort probing or reschedule the reset later. 2454 */ 2455 if (ACCESS_ONCE(efx->state) != STATE_READY) 2456 return; 2457 2458 /* efx_process_channel() will no longer read events once a 2459 * reset is scheduled. So switch back to poll'd MCDI completions. */ 2460 efx_mcdi_mode_poll(efx); 2461 2462 queue_work(reset_workqueue, &efx->reset_work); 2463 } 2464 2465 /************************************************************************** 2466 * 2467 * List of NICs we support 2468 * 2469 **************************************************************************/ 2470 2471 /* PCI device ID table */ 2472 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = { 2473 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2474 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0), 2475 .driver_data = (unsigned long) &falcon_a1_nic_type}, 2476 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2477 PCI_DEVICE_ID_SOLARFLARE_SFC4000B), 2478 .driver_data = (unsigned long) &falcon_b0_nic_type}, 2479 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */ 2480 .driver_data = (unsigned long) &siena_a0_nic_type}, 2481 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */ 2482 .driver_data = (unsigned long) &siena_a0_nic_type}, 2483 {0} /* end of list */ 2484 }; 2485 2486 /************************************************************************** 2487 * 2488 * Dummy PHY/MAC operations 2489 * 2490 * Can be used for some unimplemented operations 2491 * Needed so all function pointers are valid and do not have to be tested 2492 * before use 2493 * 2494 **************************************************************************/ 2495 int efx_port_dummy_op_int(struct efx_nic *efx) 2496 { 2497 return 0; 2498 } 2499 void efx_port_dummy_op_void(struct efx_nic *efx) {} 2500 2501 static bool efx_port_dummy_op_poll(struct efx_nic *efx) 2502 { 2503 return false; 2504 } 2505 2506 static const struct efx_phy_operations efx_dummy_phy_operations = { 2507 .init = efx_port_dummy_op_int, 2508 .reconfigure = efx_port_dummy_op_int, 2509 .poll = efx_port_dummy_op_poll, 2510 .fini = efx_port_dummy_op_void, 2511 }; 2512 2513 /************************************************************************** 2514 * 2515 * Data housekeeping 2516 * 2517 **************************************************************************/ 2518 2519 /* This zeroes out and then fills in the invariants in a struct 2520 * efx_nic (including all sub-structures). 2521 */ 2522 static int efx_init_struct(struct efx_nic *efx, 2523 struct pci_dev *pci_dev, struct net_device *net_dev) 2524 { 2525 int i; 2526 2527 /* Initialise common structures */ 2528 spin_lock_init(&efx->biu_lock); 2529 #ifdef CONFIG_SFC_MTD 2530 INIT_LIST_HEAD(&efx->mtd_list); 2531 #endif 2532 INIT_WORK(&efx->reset_work, efx_reset_work); 2533 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor); 2534 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work); 2535 efx->pci_dev = pci_dev; 2536 efx->msg_enable = debug; 2537 efx->state = STATE_UNINIT; 2538 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); 2539 2540 efx->net_dev = net_dev; 2541 spin_lock_init(&efx->stats_lock); 2542 mutex_init(&efx->mac_lock); 2543 efx->phy_op = &efx_dummy_phy_operations; 2544 efx->mdio.dev = net_dev; 2545 INIT_WORK(&efx->mac_work, efx_mac_work); 2546 init_waitqueue_head(&efx->flush_wq); 2547 2548 for (i = 0; i < EFX_MAX_CHANNELS; i++) { 2549 efx->channel[i] = efx_alloc_channel(efx, i, NULL); 2550 if (!efx->channel[i]) 2551 goto fail; 2552 } 2553 2554 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS); 2555 2556 /* Higher numbered interrupt modes are less capable! */ 2557 efx->interrupt_mode = max(efx->type->max_interrupt_mode, 2558 interrupt_mode); 2559 2560 /* Would be good to use the net_dev name, but we're too early */ 2561 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", 2562 pci_name(pci_dev)); 2563 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); 2564 if (!efx->workqueue) 2565 goto fail; 2566 2567 return 0; 2568 2569 fail: 2570 efx_fini_struct(efx); 2571 return -ENOMEM; 2572 } 2573 2574 static void efx_fini_struct(struct efx_nic *efx) 2575 { 2576 int i; 2577 2578 for (i = 0; i < EFX_MAX_CHANNELS; i++) 2579 kfree(efx->channel[i]); 2580 2581 if (efx->workqueue) { 2582 destroy_workqueue(efx->workqueue); 2583 efx->workqueue = NULL; 2584 } 2585 } 2586 2587 /************************************************************************** 2588 * 2589 * PCI interface 2590 * 2591 **************************************************************************/ 2592 2593 /* Main body of final NIC shutdown code 2594 * This is called only at module unload (or hotplug removal). 2595 */ 2596 static void efx_pci_remove_main(struct efx_nic *efx) 2597 { 2598 /* Flush reset_work. It can no longer be scheduled since we 2599 * are not READY. 2600 */ 2601 BUG_ON(efx->state == STATE_READY); 2602 cancel_work_sync(&efx->reset_work); 2603 2604 #ifdef CONFIG_RFS_ACCEL 2605 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap); 2606 efx->net_dev->rx_cpu_rmap = NULL; 2607 #endif 2608 efx_stop_interrupts(efx, false); 2609 efx_nic_fini_interrupt(efx); 2610 efx_fini_port(efx); 2611 efx->type->fini(efx); 2612 efx_fini_napi(efx); 2613 efx_remove_all(efx); 2614 } 2615 2616 /* Final NIC shutdown 2617 * This is called only at module unload (or hotplug removal). 2618 */ 2619 static void efx_pci_remove(struct pci_dev *pci_dev) 2620 { 2621 struct efx_nic *efx; 2622 2623 efx = pci_get_drvdata(pci_dev); 2624 if (!efx) 2625 return; 2626 2627 /* Mark the NIC as fini, then stop the interface */ 2628 rtnl_lock(); 2629 dev_close(efx->net_dev); 2630 efx_stop_interrupts(efx, false); 2631 rtnl_unlock(); 2632 2633 efx_sriov_fini(efx); 2634 efx_unregister_netdev(efx); 2635 2636 efx_mtd_remove(efx); 2637 2638 efx_pci_remove_main(efx); 2639 2640 efx_fini_io(efx); 2641 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n"); 2642 2643 efx_fini_struct(efx); 2644 pci_set_drvdata(pci_dev, NULL); 2645 free_netdev(efx->net_dev); 2646 2647 pci_disable_pcie_error_reporting(pci_dev); 2648 }; 2649 2650 /* NIC VPD information 2651 * Called during probe to display the part number of the 2652 * installed NIC. VPD is potentially very large but this should 2653 * always appear within the first 512 bytes. 2654 */ 2655 #define SFC_VPD_LEN 512 2656 static void efx_print_product_vpd(struct efx_nic *efx) 2657 { 2658 struct pci_dev *dev = efx->pci_dev; 2659 char vpd_data[SFC_VPD_LEN]; 2660 ssize_t vpd_size; 2661 int i, j; 2662 2663 /* Get the vpd data from the device */ 2664 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data); 2665 if (vpd_size <= 0) { 2666 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n"); 2667 return; 2668 } 2669 2670 /* Get the Read only section */ 2671 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA); 2672 if (i < 0) { 2673 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n"); 2674 return; 2675 } 2676 2677 j = pci_vpd_lrdt_size(&vpd_data[i]); 2678 i += PCI_VPD_LRDT_TAG_SIZE; 2679 if (i + j > vpd_size) 2680 j = vpd_size - i; 2681 2682 /* Get the Part number */ 2683 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN"); 2684 if (i < 0) { 2685 netif_err(efx, drv, efx->net_dev, "Part number not found\n"); 2686 return; 2687 } 2688 2689 j = pci_vpd_info_field_size(&vpd_data[i]); 2690 i += PCI_VPD_INFO_FLD_HDR_SIZE; 2691 if (i + j > vpd_size) { 2692 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n"); 2693 return; 2694 } 2695 2696 netif_info(efx, drv, efx->net_dev, 2697 "Part Number : %.*s\n", j, &vpd_data[i]); 2698 } 2699 2700 2701 /* Main body of NIC initialisation 2702 * This is called at module load (or hotplug insertion, theoretically). 2703 */ 2704 static int efx_pci_probe_main(struct efx_nic *efx) 2705 { 2706 int rc; 2707 2708 /* Do start-of-day initialisation */ 2709 rc = efx_probe_all(efx); 2710 if (rc) 2711 goto fail1; 2712 2713 efx_init_napi(efx); 2714 2715 rc = efx->type->init(efx); 2716 if (rc) { 2717 netif_err(efx, probe, efx->net_dev, 2718 "failed to initialise NIC\n"); 2719 goto fail3; 2720 } 2721 2722 rc = efx_init_port(efx); 2723 if (rc) { 2724 netif_err(efx, probe, efx->net_dev, 2725 "failed to initialise port\n"); 2726 goto fail4; 2727 } 2728 2729 rc = efx_nic_init_interrupt(efx); 2730 if (rc) 2731 goto fail5; 2732 efx_start_interrupts(efx, false); 2733 2734 return 0; 2735 2736 fail5: 2737 efx_fini_port(efx); 2738 fail4: 2739 efx->type->fini(efx); 2740 fail3: 2741 efx_fini_napi(efx); 2742 efx_remove_all(efx); 2743 fail1: 2744 return rc; 2745 } 2746 2747 /* NIC initialisation 2748 * 2749 * This is called at module load (or hotplug insertion, 2750 * theoretically). It sets up PCI mappings, resets the NIC, 2751 * sets up and registers the network devices with the kernel and hooks 2752 * the interrupt service routine. It does not prepare the device for 2753 * transmission; this is left to the first time one of the network 2754 * interfaces is brought up (i.e. efx_net_open). 2755 */ 2756 static int efx_pci_probe(struct pci_dev *pci_dev, 2757 const struct pci_device_id *entry) 2758 { 2759 struct net_device *net_dev; 2760 struct efx_nic *efx; 2761 int rc; 2762 2763 /* Allocate and initialise a struct net_device and struct efx_nic */ 2764 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES, 2765 EFX_MAX_RX_QUEUES); 2766 if (!net_dev) 2767 return -ENOMEM; 2768 efx = netdev_priv(net_dev); 2769 efx->type = (const struct efx_nic_type *) entry->driver_data; 2770 net_dev->features |= (efx->type->offload_features | NETIF_F_SG | 2771 NETIF_F_HIGHDMA | NETIF_F_TSO | 2772 NETIF_F_RXCSUM); 2773 if (efx->type->offload_features & NETIF_F_V6_CSUM) 2774 net_dev->features |= NETIF_F_TSO6; 2775 /* Mask for features that also apply to VLAN devices */ 2776 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG | 2777 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO | 2778 NETIF_F_RXCSUM); 2779 /* All offloads can be toggled */ 2780 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA; 2781 pci_set_drvdata(pci_dev, efx); 2782 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 2783 rc = efx_init_struct(efx, pci_dev, net_dev); 2784 if (rc) 2785 goto fail1; 2786 2787 netif_info(efx, probe, efx->net_dev, 2788 "Solarflare NIC detected\n"); 2789 2790 efx_print_product_vpd(efx); 2791 2792 /* Set up basic I/O (BAR mappings etc) */ 2793 rc = efx_init_io(efx); 2794 if (rc) 2795 goto fail2; 2796 2797 rc = efx_pci_probe_main(efx); 2798 if (rc) 2799 goto fail3; 2800 2801 rc = efx_register_netdev(efx); 2802 if (rc) 2803 goto fail4; 2804 2805 rc = efx_sriov_init(efx); 2806 if (rc) 2807 netif_err(efx, probe, efx->net_dev, 2808 "SR-IOV can't be enabled rc %d\n", rc); 2809 2810 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n"); 2811 2812 /* Try to create MTDs, but allow this to fail */ 2813 rtnl_lock(); 2814 rc = efx_mtd_probe(efx); 2815 rtnl_unlock(); 2816 if (rc) 2817 netif_warn(efx, probe, efx->net_dev, 2818 "failed to create MTDs (%d)\n", rc); 2819 2820 rc = pci_enable_pcie_error_reporting(pci_dev); 2821 if (rc && rc != -EINVAL) 2822 netif_warn(efx, probe, efx->net_dev, 2823 "pci_enable_pcie_error_reporting failed (%d)\n", rc); 2824 2825 return 0; 2826 2827 fail4: 2828 efx_pci_remove_main(efx); 2829 fail3: 2830 efx_fini_io(efx); 2831 fail2: 2832 efx_fini_struct(efx); 2833 fail1: 2834 pci_set_drvdata(pci_dev, NULL); 2835 WARN_ON(rc > 0); 2836 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc); 2837 free_netdev(net_dev); 2838 return rc; 2839 } 2840 2841 static int efx_pm_freeze(struct device *dev) 2842 { 2843 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2844 2845 rtnl_lock(); 2846 2847 if (efx->state != STATE_DISABLED) { 2848 efx->state = STATE_UNINIT; 2849 2850 efx_device_detach_sync(efx); 2851 2852 efx_stop_all(efx); 2853 efx_stop_interrupts(efx, false); 2854 } 2855 2856 rtnl_unlock(); 2857 2858 return 0; 2859 } 2860 2861 static int efx_pm_thaw(struct device *dev) 2862 { 2863 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2864 2865 rtnl_lock(); 2866 2867 if (efx->state != STATE_DISABLED) { 2868 efx_start_interrupts(efx, false); 2869 2870 mutex_lock(&efx->mac_lock); 2871 efx->phy_op->reconfigure(efx); 2872 mutex_unlock(&efx->mac_lock); 2873 2874 efx_start_all(efx); 2875 2876 netif_device_attach(efx->net_dev); 2877 2878 efx->state = STATE_READY; 2879 2880 efx->type->resume_wol(efx); 2881 } 2882 2883 rtnl_unlock(); 2884 2885 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */ 2886 queue_work(reset_workqueue, &efx->reset_work); 2887 2888 return 0; 2889 } 2890 2891 static int efx_pm_poweroff(struct device *dev) 2892 { 2893 struct pci_dev *pci_dev = to_pci_dev(dev); 2894 struct efx_nic *efx = pci_get_drvdata(pci_dev); 2895 2896 efx->type->fini(efx); 2897 2898 efx->reset_pending = 0; 2899 2900 pci_save_state(pci_dev); 2901 return pci_set_power_state(pci_dev, PCI_D3hot); 2902 } 2903 2904 /* Used for both resume and restore */ 2905 static int efx_pm_resume(struct device *dev) 2906 { 2907 struct pci_dev *pci_dev = to_pci_dev(dev); 2908 struct efx_nic *efx = pci_get_drvdata(pci_dev); 2909 int rc; 2910 2911 rc = pci_set_power_state(pci_dev, PCI_D0); 2912 if (rc) 2913 return rc; 2914 pci_restore_state(pci_dev); 2915 rc = pci_enable_device(pci_dev); 2916 if (rc) 2917 return rc; 2918 pci_set_master(efx->pci_dev); 2919 rc = efx->type->reset(efx, RESET_TYPE_ALL); 2920 if (rc) 2921 return rc; 2922 rc = efx->type->init(efx); 2923 if (rc) 2924 return rc; 2925 efx_pm_thaw(dev); 2926 return 0; 2927 } 2928 2929 static int efx_pm_suspend(struct device *dev) 2930 { 2931 int rc; 2932 2933 efx_pm_freeze(dev); 2934 rc = efx_pm_poweroff(dev); 2935 if (rc) 2936 efx_pm_resume(dev); 2937 return rc; 2938 } 2939 2940 static const struct dev_pm_ops efx_pm_ops = { 2941 .suspend = efx_pm_suspend, 2942 .resume = efx_pm_resume, 2943 .freeze = efx_pm_freeze, 2944 .thaw = efx_pm_thaw, 2945 .poweroff = efx_pm_poweroff, 2946 .restore = efx_pm_resume, 2947 }; 2948 2949 /* A PCI error affecting this device was detected. 2950 * At this point MMIO and DMA may be disabled. 2951 * Stop the software path and request a slot reset. 2952 */ 2953 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev, 2954 enum pci_channel_state state) 2955 { 2956 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 2957 struct efx_nic *efx = pci_get_drvdata(pdev); 2958 2959 if (state == pci_channel_io_perm_failure) 2960 return PCI_ERS_RESULT_DISCONNECT; 2961 2962 rtnl_lock(); 2963 2964 if (efx->state != STATE_DISABLED) { 2965 efx->state = STATE_RECOVERY; 2966 efx->reset_pending = 0; 2967 2968 efx_device_detach_sync(efx); 2969 2970 efx_stop_all(efx); 2971 efx_stop_interrupts(efx, false); 2972 2973 status = PCI_ERS_RESULT_NEED_RESET; 2974 } else { 2975 /* If the interface is disabled we don't want to do anything 2976 * with it. 2977 */ 2978 status = PCI_ERS_RESULT_RECOVERED; 2979 } 2980 2981 rtnl_unlock(); 2982 2983 pci_disable_device(pdev); 2984 2985 return status; 2986 } 2987 2988 /* Fake a successfull reset, which will be performed later in efx_io_resume. */ 2989 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev) 2990 { 2991 struct efx_nic *efx = pci_get_drvdata(pdev); 2992 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 2993 int rc; 2994 2995 if (pci_enable_device(pdev)) { 2996 netif_err(efx, hw, efx->net_dev, 2997 "Cannot re-enable PCI device after reset.\n"); 2998 status = PCI_ERS_RESULT_DISCONNECT; 2999 } 3000 3001 rc = pci_cleanup_aer_uncorrect_error_status(pdev); 3002 if (rc) { 3003 netif_err(efx, hw, efx->net_dev, 3004 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc); 3005 /* Non-fatal error. Continue. */ 3006 } 3007 3008 return status; 3009 } 3010 3011 /* Perform the actual reset and resume I/O operations. */ 3012 static void efx_io_resume(struct pci_dev *pdev) 3013 { 3014 struct efx_nic *efx = pci_get_drvdata(pdev); 3015 int rc; 3016 3017 rtnl_lock(); 3018 3019 if (efx->state == STATE_DISABLED) 3020 goto out; 3021 3022 rc = efx_reset(efx, RESET_TYPE_ALL); 3023 if (rc) { 3024 netif_err(efx, hw, efx->net_dev, 3025 "efx_reset failed after PCI error (%d)\n", rc); 3026 } else { 3027 efx->state = STATE_READY; 3028 netif_dbg(efx, hw, efx->net_dev, 3029 "Done resetting and resuming IO after PCI error.\n"); 3030 } 3031 3032 out: 3033 rtnl_unlock(); 3034 } 3035 3036 /* For simplicity and reliability, we always require a slot reset and try to 3037 * reset the hardware when a pci error affecting the device is detected. 3038 * We leave both the link_reset and mmio_enabled callback unimplemented: 3039 * with our request for slot reset the mmio_enabled callback will never be 3040 * called, and the link_reset callback is not used by AER or EEH mechanisms. 3041 */ 3042 static struct pci_error_handlers efx_err_handlers = { 3043 .error_detected = efx_io_error_detected, 3044 .slot_reset = efx_io_slot_reset, 3045 .resume = efx_io_resume, 3046 }; 3047 3048 static struct pci_driver efx_pci_driver = { 3049 .name = KBUILD_MODNAME, 3050 .id_table = efx_pci_table, 3051 .probe = efx_pci_probe, 3052 .remove = efx_pci_remove, 3053 .driver.pm = &efx_pm_ops, 3054 .err_handler = &efx_err_handlers, 3055 }; 3056 3057 /************************************************************************** 3058 * 3059 * Kernel module interface 3060 * 3061 *************************************************************************/ 3062 3063 module_param(interrupt_mode, uint, 0444); 3064 MODULE_PARM_DESC(interrupt_mode, 3065 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)"); 3066 3067 static int __init efx_init_module(void) 3068 { 3069 int rc; 3070 3071 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n"); 3072 3073 rc = register_netdevice_notifier(&efx_netdev_notifier); 3074 if (rc) 3075 goto err_notifier; 3076 3077 rc = efx_init_sriov(); 3078 if (rc) 3079 goto err_sriov; 3080 3081 reset_workqueue = create_singlethread_workqueue("sfc_reset"); 3082 if (!reset_workqueue) { 3083 rc = -ENOMEM; 3084 goto err_reset; 3085 } 3086 3087 rc = pci_register_driver(&efx_pci_driver); 3088 if (rc < 0) 3089 goto err_pci; 3090 3091 return 0; 3092 3093 err_pci: 3094 destroy_workqueue(reset_workqueue); 3095 err_reset: 3096 efx_fini_sriov(); 3097 err_sriov: 3098 unregister_netdevice_notifier(&efx_netdev_notifier); 3099 err_notifier: 3100 return rc; 3101 } 3102 3103 static void __exit efx_exit_module(void) 3104 { 3105 printk(KERN_INFO "Solarflare NET driver unloading\n"); 3106 3107 pci_unregister_driver(&efx_pci_driver); 3108 destroy_workqueue(reset_workqueue); 3109 efx_fini_sriov(); 3110 unregister_netdevice_notifier(&efx_netdev_notifier); 3111 3112 } 3113 3114 module_init(efx_init_module); 3115 module_exit(efx_exit_module); 3116 3117 MODULE_AUTHOR("Solarflare Communications and " 3118 "Michael Brown <mbrown@fensystems.co.uk>"); 3119 MODULE_DESCRIPTION("Solarflare Communications network driver"); 3120 MODULE_LICENSE("GPL"); 3121 MODULE_DEVICE_TABLE(pci, efx_pci_table); 3122