1 /**************************************************************************** 2 * Driver for Solarflare network controllers and boards 3 * Copyright 2005-2006 Fen Systems Ltd. 4 * Copyright 2005-2013 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/delay.h> 16 #include <linux/notifier.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/in.h> 20 #include <linux/ethtool.h> 21 #include <linux/topology.h> 22 #include <linux/gfp.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include "net_driver.h" 26 #include "efx.h" 27 #include "nic.h" 28 #include "selftest.h" 29 #include "sriov.h" 30 31 #include "mcdi.h" 32 #include "workarounds.h" 33 34 /************************************************************************** 35 * 36 * Type name strings 37 * 38 ************************************************************************** 39 */ 40 41 /* Loopback mode names (see LOOPBACK_MODE()) */ 42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX; 43 const char *const efx_loopback_mode_names[] = { 44 [LOOPBACK_NONE] = "NONE", 45 [LOOPBACK_DATA] = "DATAPATH", 46 [LOOPBACK_GMAC] = "GMAC", 47 [LOOPBACK_XGMII] = "XGMII", 48 [LOOPBACK_XGXS] = "XGXS", 49 [LOOPBACK_XAUI] = "XAUI", 50 [LOOPBACK_GMII] = "GMII", 51 [LOOPBACK_SGMII] = "SGMII", 52 [LOOPBACK_XGBR] = "XGBR", 53 [LOOPBACK_XFI] = "XFI", 54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR", 55 [LOOPBACK_GMII_FAR] = "GMII_FAR", 56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR", 57 [LOOPBACK_XFI_FAR] = "XFI_FAR", 58 [LOOPBACK_GPHY] = "GPHY", 59 [LOOPBACK_PHYXS] = "PHYXS", 60 [LOOPBACK_PCS] = "PCS", 61 [LOOPBACK_PMAPMD] = "PMA/PMD", 62 [LOOPBACK_XPORT] = "XPORT", 63 [LOOPBACK_XGMII_WS] = "XGMII_WS", 64 [LOOPBACK_XAUI_WS] = "XAUI_WS", 65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR", 66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR", 67 [LOOPBACK_GMII_WS] = "GMII_WS", 68 [LOOPBACK_XFI_WS] = "XFI_WS", 69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR", 70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS", 71 }; 72 73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX; 74 const char *const efx_reset_type_names[] = { 75 [RESET_TYPE_INVISIBLE] = "INVISIBLE", 76 [RESET_TYPE_ALL] = "ALL", 77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", 78 [RESET_TYPE_WORLD] = "WORLD", 79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", 80 [RESET_TYPE_DATAPATH] = "DATAPATH", 81 [RESET_TYPE_MC_BIST] = "MC_BIST", 82 [RESET_TYPE_DISABLE] = "DISABLE", 83 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", 84 [RESET_TYPE_INT_ERROR] = "INT_ERROR", 85 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY", 86 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR", 87 [RESET_TYPE_TX_SKIP] = "TX_SKIP", 88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", 89 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)", 90 }; 91 92 /* Reset workqueue. If any NIC has a hardware failure then a reset will be 93 * queued onto this work queue. This is not a per-nic work queue, because 94 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. 95 */ 96 static struct workqueue_struct *reset_workqueue; 97 98 /* How often and how many times to poll for a reset while waiting for a 99 * BIST that another function started to complete. 100 */ 101 #define BIST_WAIT_DELAY_MS 100 102 #define BIST_WAIT_DELAY_COUNT 100 103 104 /************************************************************************** 105 * 106 * Configurable values 107 * 108 *************************************************************************/ 109 110 /* 111 * Use separate channels for TX and RX events 112 * 113 * Set this to 1 to use separate channels for TX and RX. It allows us 114 * to control interrupt affinity separately for TX and RX. 115 * 116 * This is only used in MSI-X interrupt mode 117 */ 118 bool efx_separate_tx_channels; 119 module_param(efx_separate_tx_channels, bool, 0444); 120 MODULE_PARM_DESC(efx_separate_tx_channels, 121 "Use separate channels for TX and RX"); 122 123 /* This is the weight assigned to each of the (per-channel) virtual 124 * NAPI devices. 125 */ 126 static int napi_weight = 64; 127 128 /* This is the time (in jiffies) between invocations of the hardware 129 * monitor. 130 * On Falcon-based NICs, this will: 131 * - Check the on-board hardware monitor; 132 * - Poll the link state and reconfigure the hardware as necessary. 133 * On Siena-based NICs for power systems with EEH support, this will give EEH a 134 * chance to start. 135 */ 136 static unsigned int efx_monitor_interval = 1 * HZ; 137 138 /* Initial interrupt moderation settings. They can be modified after 139 * module load with ethtool. 140 * 141 * The default for RX should strike a balance between increasing the 142 * round-trip latency and reducing overhead. 143 */ 144 static unsigned int rx_irq_mod_usec = 60; 145 146 /* Initial interrupt moderation settings. They can be modified after 147 * module load with ethtool. 148 * 149 * This default is chosen to ensure that a 10G link does not go idle 150 * while a TX queue is stopped after it has become full. A queue is 151 * restarted when it drops below half full. The time this takes (assuming 152 * worst case 3 descriptors per packet and 1024 descriptors) is 153 * 512 / 3 * 1.2 = 205 usec. 154 */ 155 static unsigned int tx_irq_mod_usec = 150; 156 157 /* This is the first interrupt mode to try out of: 158 * 0 => MSI-X 159 * 1 => MSI 160 * 2 => legacy 161 */ 162 static unsigned int interrupt_mode; 163 164 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS), 165 * i.e. the number of CPUs among which we may distribute simultaneous 166 * interrupt handling. 167 * 168 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt. 169 * The default (0) means to assign an interrupt to each core. 170 */ 171 static unsigned int rss_cpus; 172 module_param(rss_cpus, uint, 0444); 173 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling"); 174 175 static bool phy_flash_cfg; 176 module_param(phy_flash_cfg, bool, 0644); 177 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially"); 178 179 static unsigned irq_adapt_low_thresh = 8000; 180 module_param(irq_adapt_low_thresh, uint, 0644); 181 MODULE_PARM_DESC(irq_adapt_low_thresh, 182 "Threshold score for reducing IRQ moderation"); 183 184 static unsigned irq_adapt_high_thresh = 16000; 185 module_param(irq_adapt_high_thresh, uint, 0644); 186 MODULE_PARM_DESC(irq_adapt_high_thresh, 187 "Threshold score for increasing IRQ moderation"); 188 189 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE | 190 NETIF_MSG_LINK | NETIF_MSG_IFDOWN | 191 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR | 192 NETIF_MSG_TX_ERR | NETIF_MSG_HW); 193 module_param(debug, uint, 0); 194 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value"); 195 196 /************************************************************************** 197 * 198 * Utility functions and prototypes 199 * 200 *************************************************************************/ 201 202 static int efx_soft_enable_interrupts(struct efx_nic *efx); 203 static void efx_soft_disable_interrupts(struct efx_nic *efx); 204 static void efx_remove_channel(struct efx_channel *channel); 205 static void efx_remove_channels(struct efx_nic *efx); 206 static const struct efx_channel_type efx_default_channel_type; 207 static void efx_remove_port(struct efx_nic *efx); 208 static void efx_init_napi_channel(struct efx_channel *channel); 209 static void efx_fini_napi(struct efx_nic *efx); 210 static void efx_fini_napi_channel(struct efx_channel *channel); 211 static void efx_fini_struct(struct efx_nic *efx); 212 static void efx_start_all(struct efx_nic *efx); 213 static void efx_stop_all(struct efx_nic *efx); 214 215 #define EFX_ASSERT_RESET_SERIALISED(efx) \ 216 do { \ 217 if ((efx->state == STATE_READY) || \ 218 (efx->state == STATE_RECOVERY) || \ 219 (efx->state == STATE_DISABLED)) \ 220 ASSERT_RTNL(); \ 221 } while (0) 222 223 static int efx_check_disabled(struct efx_nic *efx) 224 { 225 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) { 226 netif_err(efx, drv, efx->net_dev, 227 "device is disabled due to earlier errors\n"); 228 return -EIO; 229 } 230 return 0; 231 } 232 233 /************************************************************************** 234 * 235 * Event queue processing 236 * 237 *************************************************************************/ 238 239 /* Process channel's event queue 240 * 241 * This function is responsible for processing the event queue of a 242 * single channel. The caller must guarantee that this function will 243 * never be concurrently called more than once on the same channel, 244 * though different channels may be being processed concurrently. 245 */ 246 static int efx_process_channel(struct efx_channel *channel, int budget) 247 { 248 struct efx_tx_queue *tx_queue; 249 int spent; 250 251 if (unlikely(!channel->enabled)) 252 return 0; 253 254 efx_for_each_channel_tx_queue(tx_queue, channel) { 255 tx_queue->pkts_compl = 0; 256 tx_queue->bytes_compl = 0; 257 } 258 259 spent = efx_nic_process_eventq(channel, budget); 260 if (spent && efx_channel_has_rx_queue(channel)) { 261 struct efx_rx_queue *rx_queue = 262 efx_channel_get_rx_queue(channel); 263 264 efx_rx_flush_packet(channel); 265 efx_fast_push_rx_descriptors(rx_queue, true); 266 } 267 268 /* Update BQL */ 269 efx_for_each_channel_tx_queue(tx_queue, channel) { 270 if (tx_queue->bytes_compl) { 271 netdev_tx_completed_queue(tx_queue->core_txq, 272 tx_queue->pkts_compl, tx_queue->bytes_compl); 273 } 274 } 275 276 return spent; 277 } 278 279 /* NAPI poll handler 280 * 281 * NAPI guarantees serialisation of polls of the same device, which 282 * provides the guarantee required by efx_process_channel(). 283 */ 284 static int efx_poll(struct napi_struct *napi, int budget) 285 { 286 struct efx_channel *channel = 287 container_of(napi, struct efx_channel, napi_str); 288 struct efx_nic *efx = channel->efx; 289 int spent; 290 291 if (!efx_channel_lock_napi(channel)) 292 return budget; 293 294 netif_vdbg(efx, intr, efx->net_dev, 295 "channel %d NAPI poll executing on CPU %d\n", 296 channel->channel, raw_smp_processor_id()); 297 298 spent = efx_process_channel(channel, budget); 299 300 if (spent < budget) { 301 if (efx_channel_has_rx_queue(channel) && 302 efx->irq_rx_adaptive && 303 unlikely(++channel->irq_count == 1000)) { 304 if (unlikely(channel->irq_mod_score < 305 irq_adapt_low_thresh)) { 306 if (channel->irq_moderation > 1) { 307 channel->irq_moderation -= 1; 308 efx->type->push_irq_moderation(channel); 309 } 310 } else if (unlikely(channel->irq_mod_score > 311 irq_adapt_high_thresh)) { 312 if (channel->irq_moderation < 313 efx->irq_rx_moderation) { 314 channel->irq_moderation += 1; 315 efx->type->push_irq_moderation(channel); 316 } 317 } 318 channel->irq_count = 0; 319 channel->irq_mod_score = 0; 320 } 321 322 efx_filter_rfs_expire(channel); 323 324 /* There is no race here; although napi_disable() will 325 * only wait for napi_complete(), this isn't a problem 326 * since efx_nic_eventq_read_ack() will have no effect if 327 * interrupts have already been disabled. 328 */ 329 napi_complete(napi); 330 efx_nic_eventq_read_ack(channel); 331 } 332 333 efx_channel_unlock_napi(channel); 334 return spent; 335 } 336 337 /* Create event queue 338 * Event queue memory allocations are done only once. If the channel 339 * is reset, the memory buffer will be reused; this guards against 340 * errors during channel reset and also simplifies interrupt handling. 341 */ 342 static int efx_probe_eventq(struct efx_channel *channel) 343 { 344 struct efx_nic *efx = channel->efx; 345 unsigned long entries; 346 347 netif_dbg(efx, probe, efx->net_dev, 348 "chan %d create event queue\n", channel->channel); 349 350 /* Build an event queue with room for one event per tx and rx buffer, 351 * plus some extra for link state events and MCDI completions. */ 352 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128); 353 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE); 354 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1; 355 356 return efx_nic_probe_eventq(channel); 357 } 358 359 /* Prepare channel's event queue */ 360 static int efx_init_eventq(struct efx_channel *channel) 361 { 362 struct efx_nic *efx = channel->efx; 363 int rc; 364 365 EFX_WARN_ON_PARANOID(channel->eventq_init); 366 367 netif_dbg(efx, drv, efx->net_dev, 368 "chan %d init event queue\n", channel->channel); 369 370 rc = efx_nic_init_eventq(channel); 371 if (rc == 0) { 372 efx->type->push_irq_moderation(channel); 373 channel->eventq_read_ptr = 0; 374 channel->eventq_init = true; 375 } 376 return rc; 377 } 378 379 /* Enable event queue processing and NAPI */ 380 void efx_start_eventq(struct efx_channel *channel) 381 { 382 netif_dbg(channel->efx, ifup, channel->efx->net_dev, 383 "chan %d start event queue\n", channel->channel); 384 385 /* Make sure the NAPI handler sees the enabled flag set */ 386 channel->enabled = true; 387 smp_wmb(); 388 389 efx_channel_enable(channel); 390 napi_enable(&channel->napi_str); 391 efx_nic_eventq_read_ack(channel); 392 } 393 394 /* Disable event queue processing and NAPI */ 395 void efx_stop_eventq(struct efx_channel *channel) 396 { 397 if (!channel->enabled) 398 return; 399 400 napi_disable(&channel->napi_str); 401 while (!efx_channel_disable(channel)) 402 usleep_range(1000, 20000); 403 channel->enabled = false; 404 } 405 406 static void efx_fini_eventq(struct efx_channel *channel) 407 { 408 if (!channel->eventq_init) 409 return; 410 411 netif_dbg(channel->efx, drv, channel->efx->net_dev, 412 "chan %d fini event queue\n", channel->channel); 413 414 efx_nic_fini_eventq(channel); 415 channel->eventq_init = false; 416 } 417 418 static void efx_remove_eventq(struct efx_channel *channel) 419 { 420 netif_dbg(channel->efx, drv, channel->efx->net_dev, 421 "chan %d remove event queue\n", channel->channel); 422 423 efx_nic_remove_eventq(channel); 424 } 425 426 /************************************************************************** 427 * 428 * Channel handling 429 * 430 *************************************************************************/ 431 432 /* Allocate and initialise a channel structure. */ 433 static struct efx_channel * 434 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel) 435 { 436 struct efx_channel *channel; 437 struct efx_rx_queue *rx_queue; 438 struct efx_tx_queue *tx_queue; 439 int j; 440 441 channel = kzalloc(sizeof(*channel), GFP_KERNEL); 442 if (!channel) 443 return NULL; 444 445 channel->efx = efx; 446 channel->channel = i; 447 channel->type = &efx_default_channel_type; 448 449 for (j = 0; j < EFX_TXQ_TYPES; j++) { 450 tx_queue = &channel->tx_queue[j]; 451 tx_queue->efx = efx; 452 tx_queue->queue = i * EFX_TXQ_TYPES + j; 453 tx_queue->channel = channel; 454 } 455 456 rx_queue = &channel->rx_queue; 457 rx_queue->efx = efx; 458 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 459 (unsigned long)rx_queue); 460 461 return channel; 462 } 463 464 /* Allocate and initialise a channel structure, copying parameters 465 * (but not resources) from an old channel structure. 466 */ 467 static struct efx_channel * 468 efx_copy_channel(const struct efx_channel *old_channel) 469 { 470 struct efx_channel *channel; 471 struct efx_rx_queue *rx_queue; 472 struct efx_tx_queue *tx_queue; 473 int j; 474 475 channel = kmalloc(sizeof(*channel), GFP_KERNEL); 476 if (!channel) 477 return NULL; 478 479 *channel = *old_channel; 480 481 channel->napi_dev = NULL; 482 memset(&channel->eventq, 0, sizeof(channel->eventq)); 483 484 for (j = 0; j < EFX_TXQ_TYPES; j++) { 485 tx_queue = &channel->tx_queue[j]; 486 if (tx_queue->channel) 487 tx_queue->channel = channel; 488 tx_queue->buffer = NULL; 489 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd)); 490 } 491 492 rx_queue = &channel->rx_queue; 493 rx_queue->buffer = NULL; 494 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd)); 495 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 496 (unsigned long)rx_queue); 497 498 return channel; 499 } 500 501 static int efx_probe_channel(struct efx_channel *channel) 502 { 503 struct efx_tx_queue *tx_queue; 504 struct efx_rx_queue *rx_queue; 505 int rc; 506 507 netif_dbg(channel->efx, probe, channel->efx->net_dev, 508 "creating channel %d\n", channel->channel); 509 510 rc = channel->type->pre_probe(channel); 511 if (rc) 512 goto fail; 513 514 rc = efx_probe_eventq(channel); 515 if (rc) 516 goto fail; 517 518 efx_for_each_channel_tx_queue(tx_queue, channel) { 519 rc = efx_probe_tx_queue(tx_queue); 520 if (rc) 521 goto fail; 522 } 523 524 efx_for_each_channel_rx_queue(rx_queue, channel) { 525 rc = efx_probe_rx_queue(rx_queue); 526 if (rc) 527 goto fail; 528 } 529 530 return 0; 531 532 fail: 533 efx_remove_channel(channel); 534 return rc; 535 } 536 537 static void 538 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len) 539 { 540 struct efx_nic *efx = channel->efx; 541 const char *type; 542 int number; 543 544 number = channel->channel; 545 if (efx->tx_channel_offset == 0) { 546 type = ""; 547 } else if (channel->channel < efx->tx_channel_offset) { 548 type = "-rx"; 549 } else { 550 type = "-tx"; 551 number -= efx->tx_channel_offset; 552 } 553 snprintf(buf, len, "%s%s-%d", efx->name, type, number); 554 } 555 556 static void efx_set_channel_names(struct efx_nic *efx) 557 { 558 struct efx_channel *channel; 559 560 efx_for_each_channel(channel, efx) 561 channel->type->get_name(channel, 562 efx->msi_context[channel->channel].name, 563 sizeof(efx->msi_context[0].name)); 564 } 565 566 static int efx_probe_channels(struct efx_nic *efx) 567 { 568 struct efx_channel *channel; 569 int rc; 570 571 /* Restart special buffer allocation */ 572 efx->next_buffer_table = 0; 573 574 /* Probe channels in reverse, so that any 'extra' channels 575 * use the start of the buffer table. This allows the traffic 576 * channels to be resized without moving them or wasting the 577 * entries before them. 578 */ 579 efx_for_each_channel_rev(channel, efx) { 580 rc = efx_probe_channel(channel); 581 if (rc) { 582 netif_err(efx, probe, efx->net_dev, 583 "failed to create channel %d\n", 584 channel->channel); 585 goto fail; 586 } 587 } 588 efx_set_channel_names(efx); 589 590 return 0; 591 592 fail: 593 efx_remove_channels(efx); 594 return rc; 595 } 596 597 /* Channels are shutdown and reinitialised whilst the NIC is running 598 * to propagate configuration changes (mtu, checksum offload), or 599 * to clear hardware error conditions 600 */ 601 static void efx_start_datapath(struct efx_nic *efx) 602 { 603 bool old_rx_scatter = efx->rx_scatter; 604 struct efx_tx_queue *tx_queue; 605 struct efx_rx_queue *rx_queue; 606 struct efx_channel *channel; 607 size_t rx_buf_len; 608 609 /* Calculate the rx buffer allocation parameters required to 610 * support the current MTU, including padding for header 611 * alignment and overruns. 612 */ 613 efx->rx_dma_len = (efx->rx_prefix_size + 614 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + 615 efx->type->rx_buffer_padding); 616 rx_buf_len = (sizeof(struct efx_rx_page_state) + 617 efx->rx_ip_align + efx->rx_dma_len); 618 if (rx_buf_len <= PAGE_SIZE) { 619 efx->rx_scatter = efx->type->always_rx_scatter; 620 efx->rx_buffer_order = 0; 621 } else if (efx->type->can_rx_scatter) { 622 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES); 623 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) + 624 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE, 625 EFX_RX_BUF_ALIGNMENT) > 626 PAGE_SIZE); 627 efx->rx_scatter = true; 628 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE; 629 efx->rx_buffer_order = 0; 630 } else { 631 efx->rx_scatter = false; 632 efx->rx_buffer_order = get_order(rx_buf_len); 633 } 634 635 efx_rx_config_page_split(efx); 636 if (efx->rx_buffer_order) 637 netif_dbg(efx, drv, efx->net_dev, 638 "RX buf len=%u; page order=%u batch=%u\n", 639 efx->rx_dma_len, efx->rx_buffer_order, 640 efx->rx_pages_per_batch); 641 else 642 netif_dbg(efx, drv, efx->net_dev, 643 "RX buf len=%u step=%u bpp=%u; page batch=%u\n", 644 efx->rx_dma_len, efx->rx_page_buf_step, 645 efx->rx_bufs_per_page, efx->rx_pages_per_batch); 646 647 /* RX filters may also have scatter-enabled flags */ 648 if (efx->rx_scatter != old_rx_scatter) 649 efx->type->filter_update_rx_scatter(efx); 650 651 /* We must keep at least one descriptor in a TX ring empty. 652 * We could avoid this when the queue size does not exactly 653 * match the hardware ring size, but it's not that important. 654 * Therefore we stop the queue when one more skb might fill 655 * the ring completely. We wake it when half way back to 656 * empty. 657 */ 658 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx); 659 efx->txq_wake_thresh = efx->txq_stop_thresh / 2; 660 661 /* Initialise the channels */ 662 efx_for_each_channel(channel, efx) { 663 efx_for_each_channel_tx_queue(tx_queue, channel) { 664 efx_init_tx_queue(tx_queue); 665 atomic_inc(&efx->active_queues); 666 } 667 668 efx_for_each_channel_rx_queue(rx_queue, channel) { 669 efx_init_rx_queue(rx_queue); 670 atomic_inc(&efx->active_queues); 671 efx_stop_eventq(channel); 672 efx_fast_push_rx_descriptors(rx_queue, false); 673 efx_start_eventq(channel); 674 } 675 676 WARN_ON(channel->rx_pkt_n_frags); 677 } 678 679 efx_ptp_start_datapath(efx); 680 681 if (netif_device_present(efx->net_dev)) 682 netif_tx_wake_all_queues(efx->net_dev); 683 } 684 685 static void efx_stop_datapath(struct efx_nic *efx) 686 { 687 struct efx_channel *channel; 688 struct efx_tx_queue *tx_queue; 689 struct efx_rx_queue *rx_queue; 690 int rc; 691 692 EFX_ASSERT_RESET_SERIALISED(efx); 693 BUG_ON(efx->port_enabled); 694 695 efx_ptp_stop_datapath(efx); 696 697 /* Stop RX refill */ 698 efx_for_each_channel(channel, efx) { 699 efx_for_each_channel_rx_queue(rx_queue, channel) 700 rx_queue->refill_enabled = false; 701 } 702 703 efx_for_each_channel(channel, efx) { 704 /* RX packet processing is pipelined, so wait for the 705 * NAPI handler to complete. At least event queue 0 706 * might be kept active by non-data events, so don't 707 * use napi_synchronize() but actually disable NAPI 708 * temporarily. 709 */ 710 if (efx_channel_has_rx_queue(channel)) { 711 efx_stop_eventq(channel); 712 efx_start_eventq(channel); 713 } 714 } 715 716 rc = efx->type->fini_dmaq(efx); 717 if (rc && EFX_WORKAROUND_7803(efx)) { 718 /* Schedule a reset to recover from the flush failure. The 719 * descriptor caches reference memory we're about to free, 720 * but falcon_reconfigure_mac_wrapper() won't reconnect 721 * the MACs because of the pending reset. 722 */ 723 netif_err(efx, drv, efx->net_dev, 724 "Resetting to recover from flush failure\n"); 725 efx_schedule_reset(efx, RESET_TYPE_ALL); 726 } else if (rc) { 727 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); 728 } else { 729 netif_dbg(efx, drv, efx->net_dev, 730 "successfully flushed all queues\n"); 731 } 732 733 efx_for_each_channel(channel, efx) { 734 efx_for_each_channel_rx_queue(rx_queue, channel) 735 efx_fini_rx_queue(rx_queue); 736 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 737 efx_fini_tx_queue(tx_queue); 738 } 739 } 740 741 static void efx_remove_channel(struct efx_channel *channel) 742 { 743 struct efx_tx_queue *tx_queue; 744 struct efx_rx_queue *rx_queue; 745 746 netif_dbg(channel->efx, drv, channel->efx->net_dev, 747 "destroy chan %d\n", channel->channel); 748 749 efx_for_each_channel_rx_queue(rx_queue, channel) 750 efx_remove_rx_queue(rx_queue); 751 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 752 efx_remove_tx_queue(tx_queue); 753 efx_remove_eventq(channel); 754 channel->type->post_remove(channel); 755 } 756 757 static void efx_remove_channels(struct efx_nic *efx) 758 { 759 struct efx_channel *channel; 760 761 efx_for_each_channel(channel, efx) 762 efx_remove_channel(channel); 763 } 764 765 int 766 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries) 767 { 768 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; 769 u32 old_rxq_entries, old_txq_entries; 770 unsigned i, next_buffer_table = 0; 771 int rc, rc2; 772 773 rc = efx_check_disabled(efx); 774 if (rc) 775 return rc; 776 777 /* Not all channels should be reallocated. We must avoid 778 * reallocating their buffer table entries. 779 */ 780 efx_for_each_channel(channel, efx) { 781 struct efx_rx_queue *rx_queue; 782 struct efx_tx_queue *tx_queue; 783 784 if (channel->type->copy) 785 continue; 786 next_buffer_table = max(next_buffer_table, 787 channel->eventq.index + 788 channel->eventq.entries); 789 efx_for_each_channel_rx_queue(rx_queue, channel) 790 next_buffer_table = max(next_buffer_table, 791 rx_queue->rxd.index + 792 rx_queue->rxd.entries); 793 efx_for_each_channel_tx_queue(tx_queue, channel) 794 next_buffer_table = max(next_buffer_table, 795 tx_queue->txd.index + 796 tx_queue->txd.entries); 797 } 798 799 efx_device_detach_sync(efx); 800 efx_stop_all(efx); 801 efx_soft_disable_interrupts(efx); 802 803 /* Clone channels (where possible) */ 804 memset(other_channel, 0, sizeof(other_channel)); 805 for (i = 0; i < efx->n_channels; i++) { 806 channel = efx->channel[i]; 807 if (channel->type->copy) 808 channel = channel->type->copy(channel); 809 if (!channel) { 810 rc = -ENOMEM; 811 goto out; 812 } 813 other_channel[i] = channel; 814 } 815 816 /* Swap entry counts and channel pointers */ 817 old_rxq_entries = efx->rxq_entries; 818 old_txq_entries = efx->txq_entries; 819 efx->rxq_entries = rxq_entries; 820 efx->txq_entries = txq_entries; 821 for (i = 0; i < efx->n_channels; i++) { 822 channel = efx->channel[i]; 823 efx->channel[i] = other_channel[i]; 824 other_channel[i] = channel; 825 } 826 827 /* Restart buffer table allocation */ 828 efx->next_buffer_table = next_buffer_table; 829 830 for (i = 0; i < efx->n_channels; i++) { 831 channel = efx->channel[i]; 832 if (!channel->type->copy) 833 continue; 834 rc = efx_probe_channel(channel); 835 if (rc) 836 goto rollback; 837 efx_init_napi_channel(efx->channel[i]); 838 } 839 840 out: 841 /* Destroy unused channel structures */ 842 for (i = 0; i < efx->n_channels; i++) { 843 channel = other_channel[i]; 844 if (channel && channel->type->copy) { 845 efx_fini_napi_channel(channel); 846 efx_remove_channel(channel); 847 kfree(channel); 848 } 849 } 850 851 rc2 = efx_soft_enable_interrupts(efx); 852 if (rc2) { 853 rc = rc ? rc : rc2; 854 netif_err(efx, drv, efx->net_dev, 855 "unable to restart interrupts on channel reallocation\n"); 856 efx_schedule_reset(efx, RESET_TYPE_DISABLE); 857 } else { 858 efx_start_all(efx); 859 netif_device_attach(efx->net_dev); 860 } 861 return rc; 862 863 rollback: 864 /* Swap back */ 865 efx->rxq_entries = old_rxq_entries; 866 efx->txq_entries = old_txq_entries; 867 for (i = 0; i < efx->n_channels; i++) { 868 channel = efx->channel[i]; 869 efx->channel[i] = other_channel[i]; 870 other_channel[i] = channel; 871 } 872 goto out; 873 } 874 875 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue) 876 { 877 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); 878 } 879 880 static const struct efx_channel_type efx_default_channel_type = { 881 .pre_probe = efx_channel_dummy_op_int, 882 .post_remove = efx_channel_dummy_op_void, 883 .get_name = efx_get_channel_name, 884 .copy = efx_copy_channel, 885 .keep_eventq = false, 886 }; 887 888 int efx_channel_dummy_op_int(struct efx_channel *channel) 889 { 890 return 0; 891 } 892 893 void efx_channel_dummy_op_void(struct efx_channel *channel) 894 { 895 } 896 897 /************************************************************************** 898 * 899 * Port handling 900 * 901 **************************************************************************/ 902 903 /* This ensures that the kernel is kept informed (via 904 * netif_carrier_on/off) of the link status, and also maintains the 905 * link status's stop on the port's TX queue. 906 */ 907 void efx_link_status_changed(struct efx_nic *efx) 908 { 909 struct efx_link_state *link_state = &efx->link_state; 910 911 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure 912 * that no events are triggered between unregister_netdev() and the 913 * driver unloading. A more general condition is that NETDEV_CHANGE 914 * can only be generated between NETDEV_UP and NETDEV_DOWN */ 915 if (!netif_running(efx->net_dev)) 916 return; 917 918 if (link_state->up != netif_carrier_ok(efx->net_dev)) { 919 efx->n_link_state_changes++; 920 921 if (link_state->up) 922 netif_carrier_on(efx->net_dev); 923 else 924 netif_carrier_off(efx->net_dev); 925 } 926 927 /* Status message for kernel log */ 928 if (link_state->up) 929 netif_info(efx, link, efx->net_dev, 930 "link up at %uMbps %s-duplex (MTU %d)\n", 931 link_state->speed, link_state->fd ? "full" : "half", 932 efx->net_dev->mtu); 933 else 934 netif_info(efx, link, efx->net_dev, "link down\n"); 935 } 936 937 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising) 938 { 939 efx->link_advertising = advertising; 940 if (advertising) { 941 if (advertising & ADVERTISED_Pause) 942 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX); 943 else 944 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); 945 if (advertising & ADVERTISED_Asym_Pause) 946 efx->wanted_fc ^= EFX_FC_TX; 947 } 948 } 949 950 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc) 951 { 952 efx->wanted_fc = wanted_fc; 953 if (efx->link_advertising) { 954 if (wanted_fc & EFX_FC_RX) 955 efx->link_advertising |= (ADVERTISED_Pause | 956 ADVERTISED_Asym_Pause); 957 else 958 efx->link_advertising &= ~(ADVERTISED_Pause | 959 ADVERTISED_Asym_Pause); 960 if (wanted_fc & EFX_FC_TX) 961 efx->link_advertising ^= ADVERTISED_Asym_Pause; 962 } 963 } 964 965 static void efx_fini_port(struct efx_nic *efx); 966 967 /* We assume that efx->type->reconfigure_mac will always try to sync RX 968 * filters and therefore needs to read-lock the filter table against freeing 969 */ 970 void efx_mac_reconfigure(struct efx_nic *efx) 971 { 972 down_read(&efx->filter_sem); 973 efx->type->reconfigure_mac(efx); 974 up_read(&efx->filter_sem); 975 } 976 977 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure 978 * the MAC appropriately. All other PHY configuration changes are pushed 979 * through phy_op->set_settings(), and pushed asynchronously to the MAC 980 * through efx_monitor(). 981 * 982 * Callers must hold the mac_lock 983 */ 984 int __efx_reconfigure_port(struct efx_nic *efx) 985 { 986 enum efx_phy_mode phy_mode; 987 int rc; 988 989 WARN_ON(!mutex_is_locked(&efx->mac_lock)); 990 991 /* Disable PHY transmit in mac level loopbacks */ 992 phy_mode = efx->phy_mode; 993 if (LOOPBACK_INTERNAL(efx)) 994 efx->phy_mode |= PHY_MODE_TX_DISABLED; 995 else 996 efx->phy_mode &= ~PHY_MODE_TX_DISABLED; 997 998 rc = efx->type->reconfigure_port(efx); 999 1000 if (rc) 1001 efx->phy_mode = phy_mode; 1002 1003 return rc; 1004 } 1005 1006 /* Reinitialise the MAC to pick up new PHY settings, even if the port is 1007 * disabled. */ 1008 int efx_reconfigure_port(struct efx_nic *efx) 1009 { 1010 int rc; 1011 1012 EFX_ASSERT_RESET_SERIALISED(efx); 1013 1014 mutex_lock(&efx->mac_lock); 1015 rc = __efx_reconfigure_port(efx); 1016 mutex_unlock(&efx->mac_lock); 1017 1018 return rc; 1019 } 1020 1021 /* Asynchronous work item for changing MAC promiscuity and multicast 1022 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current 1023 * MAC directly. */ 1024 static void efx_mac_work(struct work_struct *data) 1025 { 1026 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work); 1027 1028 mutex_lock(&efx->mac_lock); 1029 if (efx->port_enabled) 1030 efx_mac_reconfigure(efx); 1031 mutex_unlock(&efx->mac_lock); 1032 } 1033 1034 static int efx_probe_port(struct efx_nic *efx) 1035 { 1036 int rc; 1037 1038 netif_dbg(efx, probe, efx->net_dev, "create port\n"); 1039 1040 if (phy_flash_cfg) 1041 efx->phy_mode = PHY_MODE_SPECIAL; 1042 1043 /* Connect up MAC/PHY operations table */ 1044 rc = efx->type->probe_port(efx); 1045 if (rc) 1046 return rc; 1047 1048 /* Initialise MAC address to permanent address */ 1049 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr); 1050 1051 return 0; 1052 } 1053 1054 static int efx_init_port(struct efx_nic *efx) 1055 { 1056 int rc; 1057 1058 netif_dbg(efx, drv, efx->net_dev, "init port\n"); 1059 1060 mutex_lock(&efx->mac_lock); 1061 1062 rc = efx->phy_op->init(efx); 1063 if (rc) 1064 goto fail1; 1065 1066 efx->port_initialized = true; 1067 1068 /* Reconfigure the MAC before creating dma queues (required for 1069 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */ 1070 efx_mac_reconfigure(efx); 1071 1072 /* Ensure the PHY advertises the correct flow control settings */ 1073 rc = efx->phy_op->reconfigure(efx); 1074 if (rc && rc != -EPERM) 1075 goto fail2; 1076 1077 mutex_unlock(&efx->mac_lock); 1078 return 0; 1079 1080 fail2: 1081 efx->phy_op->fini(efx); 1082 fail1: 1083 mutex_unlock(&efx->mac_lock); 1084 return rc; 1085 } 1086 1087 static void efx_start_port(struct efx_nic *efx) 1088 { 1089 netif_dbg(efx, ifup, efx->net_dev, "start port\n"); 1090 BUG_ON(efx->port_enabled); 1091 1092 mutex_lock(&efx->mac_lock); 1093 efx->port_enabled = true; 1094 1095 /* Ensure MAC ingress/egress is enabled */ 1096 efx_mac_reconfigure(efx); 1097 1098 mutex_unlock(&efx->mac_lock); 1099 } 1100 1101 /* Cancel work for MAC reconfiguration, periodic hardware monitoring 1102 * and the async self-test, wait for them to finish and prevent them 1103 * being scheduled again. This doesn't cover online resets, which 1104 * should only be cancelled when removing the device. 1105 */ 1106 static void efx_stop_port(struct efx_nic *efx) 1107 { 1108 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); 1109 1110 EFX_ASSERT_RESET_SERIALISED(efx); 1111 1112 mutex_lock(&efx->mac_lock); 1113 efx->port_enabled = false; 1114 mutex_unlock(&efx->mac_lock); 1115 1116 /* Serialise against efx_set_multicast_list() */ 1117 netif_addr_lock_bh(efx->net_dev); 1118 netif_addr_unlock_bh(efx->net_dev); 1119 1120 cancel_delayed_work_sync(&efx->monitor_work); 1121 efx_selftest_async_cancel(efx); 1122 cancel_work_sync(&efx->mac_work); 1123 } 1124 1125 static void efx_fini_port(struct efx_nic *efx) 1126 { 1127 netif_dbg(efx, drv, efx->net_dev, "shut down port\n"); 1128 1129 if (!efx->port_initialized) 1130 return; 1131 1132 efx->phy_op->fini(efx); 1133 efx->port_initialized = false; 1134 1135 efx->link_state.up = false; 1136 efx_link_status_changed(efx); 1137 } 1138 1139 static void efx_remove_port(struct efx_nic *efx) 1140 { 1141 netif_dbg(efx, drv, efx->net_dev, "destroying port\n"); 1142 1143 efx->type->remove_port(efx); 1144 } 1145 1146 /************************************************************************** 1147 * 1148 * NIC handling 1149 * 1150 **************************************************************************/ 1151 1152 static LIST_HEAD(efx_primary_list); 1153 static LIST_HEAD(efx_unassociated_list); 1154 1155 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right) 1156 { 1157 return left->type == right->type && 1158 left->vpd_sn && right->vpd_sn && 1159 !strcmp(left->vpd_sn, right->vpd_sn); 1160 } 1161 1162 static void efx_associate(struct efx_nic *efx) 1163 { 1164 struct efx_nic *other, *next; 1165 1166 if (efx->primary == efx) { 1167 /* Adding primary function; look for secondaries */ 1168 1169 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n"); 1170 list_add_tail(&efx->node, &efx_primary_list); 1171 1172 list_for_each_entry_safe(other, next, &efx_unassociated_list, 1173 node) { 1174 if (efx_same_controller(efx, other)) { 1175 list_del(&other->node); 1176 netif_dbg(other, probe, other->net_dev, 1177 "moving to secondary list of %s %s\n", 1178 pci_name(efx->pci_dev), 1179 efx->net_dev->name); 1180 list_add_tail(&other->node, 1181 &efx->secondary_list); 1182 other->primary = efx; 1183 } 1184 } 1185 } else { 1186 /* Adding secondary function; look for primary */ 1187 1188 list_for_each_entry(other, &efx_primary_list, node) { 1189 if (efx_same_controller(efx, other)) { 1190 netif_dbg(efx, probe, efx->net_dev, 1191 "adding to secondary list of %s %s\n", 1192 pci_name(other->pci_dev), 1193 other->net_dev->name); 1194 list_add_tail(&efx->node, 1195 &other->secondary_list); 1196 efx->primary = other; 1197 return; 1198 } 1199 } 1200 1201 netif_dbg(efx, probe, efx->net_dev, 1202 "adding to unassociated list\n"); 1203 list_add_tail(&efx->node, &efx_unassociated_list); 1204 } 1205 } 1206 1207 static void efx_dissociate(struct efx_nic *efx) 1208 { 1209 struct efx_nic *other, *next; 1210 1211 list_del(&efx->node); 1212 efx->primary = NULL; 1213 1214 list_for_each_entry_safe(other, next, &efx->secondary_list, node) { 1215 list_del(&other->node); 1216 netif_dbg(other, probe, other->net_dev, 1217 "moving to unassociated list\n"); 1218 list_add_tail(&other->node, &efx_unassociated_list); 1219 other->primary = NULL; 1220 } 1221 } 1222 1223 /* This configures the PCI device to enable I/O and DMA. */ 1224 static int efx_init_io(struct efx_nic *efx) 1225 { 1226 struct pci_dev *pci_dev = efx->pci_dev; 1227 dma_addr_t dma_mask = efx->type->max_dma_mask; 1228 unsigned int mem_map_size = efx->type->mem_map_size(efx); 1229 int rc, bar; 1230 1231 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); 1232 1233 bar = efx->type->mem_bar; 1234 1235 rc = pci_enable_device(pci_dev); 1236 if (rc) { 1237 netif_err(efx, probe, efx->net_dev, 1238 "failed to enable PCI device\n"); 1239 goto fail1; 1240 } 1241 1242 pci_set_master(pci_dev); 1243 1244 /* Set the PCI DMA mask. Try all possibilities from our 1245 * genuine mask down to 32 bits, because some architectures 1246 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit 1247 * masks event though they reject 46 bit masks. 1248 */ 1249 while (dma_mask > 0x7fffffffUL) { 1250 if (dma_supported(&pci_dev->dev, dma_mask)) { 1251 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask); 1252 if (rc == 0) 1253 break; 1254 } 1255 dma_mask >>= 1; 1256 } 1257 if (rc) { 1258 netif_err(efx, probe, efx->net_dev, 1259 "could not find a suitable DMA mask\n"); 1260 goto fail2; 1261 } 1262 netif_dbg(efx, probe, efx->net_dev, 1263 "using DMA mask %llx\n", (unsigned long long) dma_mask); 1264 1265 efx->membase_phys = pci_resource_start(efx->pci_dev, bar); 1266 rc = pci_request_region(pci_dev, bar, "sfc"); 1267 if (rc) { 1268 netif_err(efx, probe, efx->net_dev, 1269 "request for memory BAR failed\n"); 1270 rc = -EIO; 1271 goto fail3; 1272 } 1273 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size); 1274 if (!efx->membase) { 1275 netif_err(efx, probe, efx->net_dev, 1276 "could not map memory BAR at %llx+%x\n", 1277 (unsigned long long)efx->membase_phys, mem_map_size); 1278 rc = -ENOMEM; 1279 goto fail4; 1280 } 1281 netif_dbg(efx, probe, efx->net_dev, 1282 "memory BAR at %llx+%x (virtual %p)\n", 1283 (unsigned long long)efx->membase_phys, mem_map_size, 1284 efx->membase); 1285 1286 return 0; 1287 1288 fail4: 1289 pci_release_region(efx->pci_dev, bar); 1290 fail3: 1291 efx->membase_phys = 0; 1292 fail2: 1293 pci_disable_device(efx->pci_dev); 1294 fail1: 1295 return rc; 1296 } 1297 1298 static void efx_fini_io(struct efx_nic *efx) 1299 { 1300 int bar; 1301 1302 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); 1303 1304 if (efx->membase) { 1305 iounmap(efx->membase); 1306 efx->membase = NULL; 1307 } 1308 1309 if (efx->membase_phys) { 1310 bar = efx->type->mem_bar; 1311 pci_release_region(efx->pci_dev, bar); 1312 efx->membase_phys = 0; 1313 } 1314 1315 /* Don't disable bus-mastering if VFs are assigned */ 1316 if (!pci_vfs_assigned(efx->pci_dev)) 1317 pci_disable_device(efx->pci_dev); 1318 } 1319 1320 void efx_set_default_rx_indir_table(struct efx_nic *efx) 1321 { 1322 size_t i; 1323 1324 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++) 1325 efx->rx_indir_table[i] = 1326 ethtool_rxfh_indir_default(i, efx->rss_spread); 1327 } 1328 1329 static unsigned int efx_wanted_parallelism(struct efx_nic *efx) 1330 { 1331 cpumask_var_t thread_mask; 1332 unsigned int count; 1333 int cpu; 1334 1335 if (rss_cpus) { 1336 count = rss_cpus; 1337 } else { 1338 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) { 1339 netif_warn(efx, probe, efx->net_dev, 1340 "RSS disabled due to allocation failure\n"); 1341 return 1; 1342 } 1343 1344 count = 0; 1345 for_each_online_cpu(cpu) { 1346 if (!cpumask_test_cpu(cpu, thread_mask)) { 1347 ++count; 1348 cpumask_or(thread_mask, thread_mask, 1349 topology_sibling_cpumask(cpu)); 1350 } 1351 } 1352 1353 free_cpumask_var(thread_mask); 1354 } 1355 1356 /* If RSS is requested for the PF *and* VFs then we can't write RSS 1357 * table entries that are inaccessible to VFs 1358 */ 1359 #ifdef CONFIG_SFC_SRIOV 1360 if (efx->type->sriov_wanted) { 1361 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 && 1362 count > efx_vf_size(efx)) { 1363 netif_warn(efx, probe, efx->net_dev, 1364 "Reducing number of RSS channels from %u to %u for " 1365 "VF support. Increase vf-msix-limit to use more " 1366 "channels on the PF.\n", 1367 count, efx_vf_size(efx)); 1368 count = efx_vf_size(efx); 1369 } 1370 } 1371 #endif 1372 1373 return count; 1374 } 1375 1376 /* Probe the number and type of interrupts we are able to obtain, and 1377 * the resulting numbers of channels and RX queues. 1378 */ 1379 static int efx_probe_interrupts(struct efx_nic *efx) 1380 { 1381 unsigned int extra_channels = 0; 1382 unsigned int i, j; 1383 int rc; 1384 1385 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) 1386 if (efx->extra_channel_type[i]) 1387 ++extra_channels; 1388 1389 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) { 1390 struct msix_entry xentries[EFX_MAX_CHANNELS]; 1391 unsigned int n_channels; 1392 1393 n_channels = efx_wanted_parallelism(efx); 1394 if (efx_separate_tx_channels) 1395 n_channels *= 2; 1396 n_channels += extra_channels; 1397 n_channels = min(n_channels, efx->max_channels); 1398 1399 for (i = 0; i < n_channels; i++) 1400 xentries[i].entry = i; 1401 rc = pci_enable_msix_range(efx->pci_dev, 1402 xentries, 1, n_channels); 1403 if (rc < 0) { 1404 /* Fall back to single channel MSI */ 1405 efx->interrupt_mode = EFX_INT_MODE_MSI; 1406 netif_err(efx, drv, efx->net_dev, 1407 "could not enable MSI-X\n"); 1408 } else if (rc < n_channels) { 1409 netif_err(efx, drv, efx->net_dev, 1410 "WARNING: Insufficient MSI-X vectors" 1411 " available (%d < %u).\n", rc, n_channels); 1412 netif_err(efx, drv, efx->net_dev, 1413 "WARNING: Performance may be reduced.\n"); 1414 n_channels = rc; 1415 } 1416 1417 if (rc > 0) { 1418 efx->n_channels = n_channels; 1419 if (n_channels > extra_channels) 1420 n_channels -= extra_channels; 1421 if (efx_separate_tx_channels) { 1422 efx->n_tx_channels = min(max(n_channels / 2, 1423 1U), 1424 efx->max_tx_channels); 1425 efx->n_rx_channels = max(n_channels - 1426 efx->n_tx_channels, 1427 1U); 1428 } else { 1429 efx->n_tx_channels = min(n_channels, 1430 efx->max_tx_channels); 1431 efx->n_rx_channels = n_channels; 1432 } 1433 for (i = 0; i < efx->n_channels; i++) 1434 efx_get_channel(efx, i)->irq = 1435 xentries[i].vector; 1436 } 1437 } 1438 1439 /* Try single interrupt MSI */ 1440 if (efx->interrupt_mode == EFX_INT_MODE_MSI) { 1441 efx->n_channels = 1; 1442 efx->n_rx_channels = 1; 1443 efx->n_tx_channels = 1; 1444 rc = pci_enable_msi(efx->pci_dev); 1445 if (rc == 0) { 1446 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq; 1447 } else { 1448 netif_err(efx, drv, efx->net_dev, 1449 "could not enable MSI\n"); 1450 efx->interrupt_mode = EFX_INT_MODE_LEGACY; 1451 } 1452 } 1453 1454 /* Assume legacy interrupts */ 1455 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) { 1456 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0); 1457 efx->n_rx_channels = 1; 1458 efx->n_tx_channels = 1; 1459 efx->legacy_irq = efx->pci_dev->irq; 1460 } 1461 1462 /* Assign extra channels if possible */ 1463 j = efx->n_channels; 1464 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) { 1465 if (!efx->extra_channel_type[i]) 1466 continue; 1467 if (efx->interrupt_mode != EFX_INT_MODE_MSIX || 1468 efx->n_channels <= extra_channels) { 1469 efx->extra_channel_type[i]->handle_no_channel(efx); 1470 } else { 1471 --j; 1472 efx_get_channel(efx, j)->type = 1473 efx->extra_channel_type[i]; 1474 } 1475 } 1476 1477 /* RSS might be usable on VFs even if it is disabled on the PF */ 1478 #ifdef CONFIG_SFC_SRIOV 1479 if (efx->type->sriov_wanted) { 1480 efx->rss_spread = ((efx->n_rx_channels > 1 || 1481 !efx->type->sriov_wanted(efx)) ? 1482 efx->n_rx_channels : efx_vf_size(efx)); 1483 return 0; 1484 } 1485 #endif 1486 efx->rss_spread = efx->n_rx_channels; 1487 1488 return 0; 1489 } 1490 1491 static int efx_soft_enable_interrupts(struct efx_nic *efx) 1492 { 1493 struct efx_channel *channel, *end_channel; 1494 int rc; 1495 1496 BUG_ON(efx->state == STATE_DISABLED); 1497 1498 efx->irq_soft_enabled = true; 1499 smp_wmb(); 1500 1501 efx_for_each_channel(channel, efx) { 1502 if (!channel->type->keep_eventq) { 1503 rc = efx_init_eventq(channel); 1504 if (rc) 1505 goto fail; 1506 } 1507 efx_start_eventq(channel); 1508 } 1509 1510 efx_mcdi_mode_event(efx); 1511 1512 return 0; 1513 fail: 1514 end_channel = channel; 1515 efx_for_each_channel(channel, efx) { 1516 if (channel == end_channel) 1517 break; 1518 efx_stop_eventq(channel); 1519 if (!channel->type->keep_eventq) 1520 efx_fini_eventq(channel); 1521 } 1522 1523 return rc; 1524 } 1525 1526 static void efx_soft_disable_interrupts(struct efx_nic *efx) 1527 { 1528 struct efx_channel *channel; 1529 1530 if (efx->state == STATE_DISABLED) 1531 return; 1532 1533 efx_mcdi_mode_poll(efx); 1534 1535 efx->irq_soft_enabled = false; 1536 smp_wmb(); 1537 1538 if (efx->legacy_irq) 1539 synchronize_irq(efx->legacy_irq); 1540 1541 efx_for_each_channel(channel, efx) { 1542 if (channel->irq) 1543 synchronize_irq(channel->irq); 1544 1545 efx_stop_eventq(channel); 1546 if (!channel->type->keep_eventq) 1547 efx_fini_eventq(channel); 1548 } 1549 1550 /* Flush the asynchronous MCDI request queue */ 1551 efx_mcdi_flush_async(efx); 1552 } 1553 1554 static int efx_enable_interrupts(struct efx_nic *efx) 1555 { 1556 struct efx_channel *channel, *end_channel; 1557 int rc; 1558 1559 BUG_ON(efx->state == STATE_DISABLED); 1560 1561 if (efx->eeh_disabled_legacy_irq) { 1562 enable_irq(efx->legacy_irq); 1563 efx->eeh_disabled_legacy_irq = false; 1564 } 1565 1566 efx->type->irq_enable_master(efx); 1567 1568 efx_for_each_channel(channel, efx) { 1569 if (channel->type->keep_eventq) { 1570 rc = efx_init_eventq(channel); 1571 if (rc) 1572 goto fail; 1573 } 1574 } 1575 1576 rc = efx_soft_enable_interrupts(efx); 1577 if (rc) 1578 goto fail; 1579 1580 return 0; 1581 1582 fail: 1583 end_channel = channel; 1584 efx_for_each_channel(channel, efx) { 1585 if (channel == end_channel) 1586 break; 1587 if (channel->type->keep_eventq) 1588 efx_fini_eventq(channel); 1589 } 1590 1591 efx->type->irq_disable_non_ev(efx); 1592 1593 return rc; 1594 } 1595 1596 static void efx_disable_interrupts(struct efx_nic *efx) 1597 { 1598 struct efx_channel *channel; 1599 1600 efx_soft_disable_interrupts(efx); 1601 1602 efx_for_each_channel(channel, efx) { 1603 if (channel->type->keep_eventq) 1604 efx_fini_eventq(channel); 1605 } 1606 1607 efx->type->irq_disable_non_ev(efx); 1608 } 1609 1610 static void efx_remove_interrupts(struct efx_nic *efx) 1611 { 1612 struct efx_channel *channel; 1613 1614 /* Remove MSI/MSI-X interrupts */ 1615 efx_for_each_channel(channel, efx) 1616 channel->irq = 0; 1617 pci_disable_msi(efx->pci_dev); 1618 pci_disable_msix(efx->pci_dev); 1619 1620 /* Remove legacy interrupt */ 1621 efx->legacy_irq = 0; 1622 } 1623 1624 static void efx_set_channels(struct efx_nic *efx) 1625 { 1626 struct efx_channel *channel; 1627 struct efx_tx_queue *tx_queue; 1628 1629 efx->tx_channel_offset = 1630 efx_separate_tx_channels ? 1631 efx->n_channels - efx->n_tx_channels : 0; 1632 1633 /* We need to mark which channels really have RX and TX 1634 * queues, and adjust the TX queue numbers if we have separate 1635 * RX-only and TX-only channels. 1636 */ 1637 efx_for_each_channel(channel, efx) { 1638 if (channel->channel < efx->n_rx_channels) 1639 channel->rx_queue.core_index = channel->channel; 1640 else 1641 channel->rx_queue.core_index = -1; 1642 1643 efx_for_each_channel_tx_queue(tx_queue, channel) 1644 tx_queue->queue -= (efx->tx_channel_offset * 1645 EFX_TXQ_TYPES); 1646 } 1647 } 1648 1649 static int efx_probe_nic(struct efx_nic *efx) 1650 { 1651 int rc; 1652 1653 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n"); 1654 1655 /* Carry out hardware-type specific initialisation */ 1656 rc = efx->type->probe(efx); 1657 if (rc) 1658 return rc; 1659 1660 do { 1661 if (!efx->max_channels || !efx->max_tx_channels) { 1662 netif_err(efx, drv, efx->net_dev, 1663 "Insufficient resources to allocate" 1664 " any channels\n"); 1665 rc = -ENOSPC; 1666 goto fail1; 1667 } 1668 1669 /* Determine the number of channels and queues by trying 1670 * to hook in MSI-X interrupts. 1671 */ 1672 rc = efx_probe_interrupts(efx); 1673 if (rc) 1674 goto fail1; 1675 1676 efx_set_channels(efx); 1677 1678 /* dimension_resources can fail with EAGAIN */ 1679 rc = efx->type->dimension_resources(efx); 1680 if (rc != 0 && rc != -EAGAIN) 1681 goto fail2; 1682 1683 if (rc == -EAGAIN) 1684 /* try again with new max_channels */ 1685 efx_remove_interrupts(efx); 1686 1687 } while (rc == -EAGAIN); 1688 1689 if (efx->n_channels > 1) 1690 netdev_rss_key_fill(&efx->rx_hash_key, 1691 sizeof(efx->rx_hash_key)); 1692 efx_set_default_rx_indir_table(efx); 1693 1694 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels); 1695 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels); 1696 1697 /* Initialise the interrupt moderation settings */ 1698 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true, 1699 true); 1700 1701 return 0; 1702 1703 fail2: 1704 efx_remove_interrupts(efx); 1705 fail1: 1706 efx->type->remove(efx); 1707 return rc; 1708 } 1709 1710 static void efx_remove_nic(struct efx_nic *efx) 1711 { 1712 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n"); 1713 1714 efx_remove_interrupts(efx); 1715 efx->type->remove(efx); 1716 } 1717 1718 static int efx_probe_filters(struct efx_nic *efx) 1719 { 1720 int rc; 1721 1722 spin_lock_init(&efx->filter_lock); 1723 init_rwsem(&efx->filter_sem); 1724 down_write(&efx->filter_sem); 1725 rc = efx->type->filter_table_probe(efx); 1726 if (rc) 1727 goto out_unlock; 1728 1729 #ifdef CONFIG_RFS_ACCEL 1730 if (efx->type->offload_features & NETIF_F_NTUPLE) { 1731 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters, 1732 sizeof(*efx->rps_flow_id), 1733 GFP_KERNEL); 1734 if (!efx->rps_flow_id) { 1735 efx->type->filter_table_remove(efx); 1736 rc = -ENOMEM; 1737 goto out_unlock; 1738 } 1739 } 1740 #endif 1741 out_unlock: 1742 up_write(&efx->filter_sem); 1743 return rc; 1744 } 1745 1746 static void efx_remove_filters(struct efx_nic *efx) 1747 { 1748 #ifdef CONFIG_RFS_ACCEL 1749 kfree(efx->rps_flow_id); 1750 #endif 1751 down_write(&efx->filter_sem); 1752 efx->type->filter_table_remove(efx); 1753 up_write(&efx->filter_sem); 1754 } 1755 1756 static void efx_restore_filters(struct efx_nic *efx) 1757 { 1758 down_read(&efx->filter_sem); 1759 efx->type->filter_table_restore(efx); 1760 up_read(&efx->filter_sem); 1761 } 1762 1763 /************************************************************************** 1764 * 1765 * NIC startup/shutdown 1766 * 1767 *************************************************************************/ 1768 1769 static int efx_probe_all(struct efx_nic *efx) 1770 { 1771 int rc; 1772 1773 rc = efx_probe_nic(efx); 1774 if (rc) { 1775 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n"); 1776 goto fail1; 1777 } 1778 1779 rc = efx_probe_port(efx); 1780 if (rc) { 1781 netif_err(efx, probe, efx->net_dev, "failed to create port\n"); 1782 goto fail2; 1783 } 1784 1785 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT); 1786 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) { 1787 rc = -EINVAL; 1788 goto fail3; 1789 } 1790 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE; 1791 1792 #ifdef CONFIG_SFC_SRIOV 1793 rc = efx->type->vswitching_probe(efx); 1794 if (rc) /* not fatal; the PF will still work fine */ 1795 netif_warn(efx, probe, efx->net_dev, 1796 "failed to setup vswitching rc=%d;" 1797 " VFs may not function\n", rc); 1798 #endif 1799 1800 rc = efx_probe_filters(efx); 1801 if (rc) { 1802 netif_err(efx, probe, efx->net_dev, 1803 "failed to create filter tables\n"); 1804 goto fail4; 1805 } 1806 1807 rc = efx_probe_channels(efx); 1808 if (rc) 1809 goto fail5; 1810 1811 return 0; 1812 1813 fail5: 1814 efx_remove_filters(efx); 1815 fail4: 1816 #ifdef CONFIG_SFC_SRIOV 1817 efx->type->vswitching_remove(efx); 1818 #endif 1819 fail3: 1820 efx_remove_port(efx); 1821 fail2: 1822 efx_remove_nic(efx); 1823 fail1: 1824 return rc; 1825 } 1826 1827 /* If the interface is supposed to be running but is not, start 1828 * the hardware and software data path, regular activity for the port 1829 * (MAC statistics, link polling, etc.) and schedule the port to be 1830 * reconfigured. Interrupts must already be enabled. This function 1831 * is safe to call multiple times, so long as the NIC is not disabled. 1832 * Requires the RTNL lock. 1833 */ 1834 static void efx_start_all(struct efx_nic *efx) 1835 { 1836 EFX_ASSERT_RESET_SERIALISED(efx); 1837 BUG_ON(efx->state == STATE_DISABLED); 1838 1839 /* Check that it is appropriate to restart the interface. All 1840 * of these flags are safe to read under just the rtnl lock */ 1841 if (efx->port_enabled || !netif_running(efx->net_dev) || 1842 efx->reset_pending) 1843 return; 1844 1845 efx_start_port(efx); 1846 efx_start_datapath(efx); 1847 1848 /* Start the hardware monitor if there is one */ 1849 if (efx->type->monitor != NULL) 1850 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1851 efx_monitor_interval); 1852 1853 /* If link state detection is normally event-driven, we have 1854 * to poll now because we could have missed a change 1855 */ 1856 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) { 1857 mutex_lock(&efx->mac_lock); 1858 if (efx->phy_op->poll(efx)) 1859 efx_link_status_changed(efx); 1860 mutex_unlock(&efx->mac_lock); 1861 } 1862 1863 efx->type->start_stats(efx); 1864 efx->type->pull_stats(efx); 1865 spin_lock_bh(&efx->stats_lock); 1866 efx->type->update_stats(efx, NULL, NULL); 1867 spin_unlock_bh(&efx->stats_lock); 1868 } 1869 1870 /* Quiesce the hardware and software data path, and regular activity 1871 * for the port without bringing the link down. Safe to call multiple 1872 * times with the NIC in almost any state, but interrupts should be 1873 * enabled. Requires the RTNL lock. 1874 */ 1875 static void efx_stop_all(struct efx_nic *efx) 1876 { 1877 EFX_ASSERT_RESET_SERIALISED(efx); 1878 1879 /* port_enabled can be read safely under the rtnl lock */ 1880 if (!efx->port_enabled) 1881 return; 1882 1883 /* update stats before we go down so we can accurately count 1884 * rx_nodesc_drops 1885 */ 1886 efx->type->pull_stats(efx); 1887 spin_lock_bh(&efx->stats_lock); 1888 efx->type->update_stats(efx, NULL, NULL); 1889 spin_unlock_bh(&efx->stats_lock); 1890 efx->type->stop_stats(efx); 1891 efx_stop_port(efx); 1892 1893 /* Stop the kernel transmit interface. This is only valid if 1894 * the device is stopped or detached; otherwise the watchdog 1895 * may fire immediately. 1896 */ 1897 WARN_ON(netif_running(efx->net_dev) && 1898 netif_device_present(efx->net_dev)); 1899 netif_tx_disable(efx->net_dev); 1900 1901 efx_stop_datapath(efx); 1902 } 1903 1904 static void efx_remove_all(struct efx_nic *efx) 1905 { 1906 efx_remove_channels(efx); 1907 efx_remove_filters(efx); 1908 #ifdef CONFIG_SFC_SRIOV 1909 efx->type->vswitching_remove(efx); 1910 #endif 1911 efx_remove_port(efx); 1912 efx_remove_nic(efx); 1913 } 1914 1915 /************************************************************************** 1916 * 1917 * Interrupt moderation 1918 * 1919 **************************************************************************/ 1920 1921 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns) 1922 { 1923 if (usecs == 0) 1924 return 0; 1925 if (usecs * 1000 < quantum_ns) 1926 return 1; /* never round down to 0 */ 1927 return usecs * 1000 / quantum_ns; 1928 } 1929 1930 /* Set interrupt moderation parameters */ 1931 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, 1932 unsigned int rx_usecs, bool rx_adaptive, 1933 bool rx_may_override_tx) 1934 { 1935 struct efx_channel *channel; 1936 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max * 1937 efx->timer_quantum_ns, 1938 1000); 1939 unsigned int tx_ticks; 1940 unsigned int rx_ticks; 1941 1942 EFX_ASSERT_RESET_SERIALISED(efx); 1943 1944 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max) 1945 return -EINVAL; 1946 1947 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns); 1948 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns); 1949 1950 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 && 1951 !rx_may_override_tx) { 1952 netif_err(efx, drv, efx->net_dev, "Channels are shared. " 1953 "RX and TX IRQ moderation must be equal\n"); 1954 return -EINVAL; 1955 } 1956 1957 efx->irq_rx_adaptive = rx_adaptive; 1958 efx->irq_rx_moderation = rx_ticks; 1959 efx_for_each_channel(channel, efx) { 1960 if (efx_channel_has_rx_queue(channel)) 1961 channel->irq_moderation = rx_ticks; 1962 else if (efx_channel_has_tx_queues(channel)) 1963 channel->irq_moderation = tx_ticks; 1964 } 1965 1966 return 0; 1967 } 1968 1969 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, 1970 unsigned int *rx_usecs, bool *rx_adaptive) 1971 { 1972 /* We must round up when converting ticks to microseconds 1973 * because we round down when converting the other way. 1974 */ 1975 1976 *rx_adaptive = efx->irq_rx_adaptive; 1977 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation * 1978 efx->timer_quantum_ns, 1979 1000); 1980 1981 /* If channels are shared between RX and TX, so is IRQ 1982 * moderation. Otherwise, IRQ moderation is the same for all 1983 * TX channels and is not adaptive. 1984 */ 1985 if (efx->tx_channel_offset == 0) 1986 *tx_usecs = *rx_usecs; 1987 else 1988 *tx_usecs = DIV_ROUND_UP( 1989 efx->channel[efx->tx_channel_offset]->irq_moderation * 1990 efx->timer_quantum_ns, 1991 1000); 1992 } 1993 1994 /************************************************************************** 1995 * 1996 * Hardware monitor 1997 * 1998 **************************************************************************/ 1999 2000 /* Run periodically off the general workqueue */ 2001 static void efx_monitor(struct work_struct *data) 2002 { 2003 struct efx_nic *efx = container_of(data, struct efx_nic, 2004 monitor_work.work); 2005 2006 netif_vdbg(efx, timer, efx->net_dev, 2007 "hardware monitor executing on CPU %d\n", 2008 raw_smp_processor_id()); 2009 BUG_ON(efx->type->monitor == NULL); 2010 2011 /* If the mac_lock is already held then it is likely a port 2012 * reconfiguration is already in place, which will likely do 2013 * most of the work of monitor() anyway. */ 2014 if (mutex_trylock(&efx->mac_lock)) { 2015 if (efx->port_enabled) 2016 efx->type->monitor(efx); 2017 mutex_unlock(&efx->mac_lock); 2018 } 2019 2020 queue_delayed_work(efx->workqueue, &efx->monitor_work, 2021 efx_monitor_interval); 2022 } 2023 2024 /************************************************************************** 2025 * 2026 * ioctls 2027 * 2028 *************************************************************************/ 2029 2030 /* Net device ioctl 2031 * Context: process, rtnl_lock() held. 2032 */ 2033 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) 2034 { 2035 struct efx_nic *efx = netdev_priv(net_dev); 2036 struct mii_ioctl_data *data = if_mii(ifr); 2037 2038 if (cmd == SIOCSHWTSTAMP) 2039 return efx_ptp_set_ts_config(efx, ifr); 2040 if (cmd == SIOCGHWTSTAMP) 2041 return efx_ptp_get_ts_config(efx, ifr); 2042 2043 /* Convert phy_id from older PRTAD/DEVAD format */ 2044 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) && 2045 (data->phy_id & 0xfc00) == 0x0400) 2046 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400; 2047 2048 return mdio_mii_ioctl(&efx->mdio, data, cmd); 2049 } 2050 2051 /************************************************************************** 2052 * 2053 * NAPI interface 2054 * 2055 **************************************************************************/ 2056 2057 static void efx_init_napi_channel(struct efx_channel *channel) 2058 { 2059 struct efx_nic *efx = channel->efx; 2060 2061 channel->napi_dev = efx->net_dev; 2062 netif_napi_add(channel->napi_dev, &channel->napi_str, 2063 efx_poll, napi_weight); 2064 napi_hash_add(&channel->napi_str); 2065 efx_channel_init_lock(channel); 2066 } 2067 2068 static void efx_init_napi(struct efx_nic *efx) 2069 { 2070 struct efx_channel *channel; 2071 2072 efx_for_each_channel(channel, efx) 2073 efx_init_napi_channel(channel); 2074 } 2075 2076 static void efx_fini_napi_channel(struct efx_channel *channel) 2077 { 2078 if (channel->napi_dev) { 2079 netif_napi_del(&channel->napi_str); 2080 napi_hash_del(&channel->napi_str); 2081 } 2082 channel->napi_dev = NULL; 2083 } 2084 2085 static void efx_fini_napi(struct efx_nic *efx) 2086 { 2087 struct efx_channel *channel; 2088 2089 efx_for_each_channel(channel, efx) 2090 efx_fini_napi_channel(channel); 2091 } 2092 2093 /************************************************************************** 2094 * 2095 * Kernel netpoll interface 2096 * 2097 *************************************************************************/ 2098 2099 #ifdef CONFIG_NET_POLL_CONTROLLER 2100 2101 /* Although in the common case interrupts will be disabled, this is not 2102 * guaranteed. However, all our work happens inside the NAPI callback, 2103 * so no locking is required. 2104 */ 2105 static void efx_netpoll(struct net_device *net_dev) 2106 { 2107 struct efx_nic *efx = netdev_priv(net_dev); 2108 struct efx_channel *channel; 2109 2110 efx_for_each_channel(channel, efx) 2111 efx_schedule_channel(channel); 2112 } 2113 2114 #endif 2115 2116 #ifdef CONFIG_NET_RX_BUSY_POLL 2117 static int efx_busy_poll(struct napi_struct *napi) 2118 { 2119 struct efx_channel *channel = 2120 container_of(napi, struct efx_channel, napi_str); 2121 struct efx_nic *efx = channel->efx; 2122 int budget = 4; 2123 int old_rx_packets, rx_packets; 2124 2125 if (!netif_running(efx->net_dev)) 2126 return LL_FLUSH_FAILED; 2127 2128 if (!efx_channel_lock_poll(channel)) 2129 return LL_FLUSH_BUSY; 2130 2131 old_rx_packets = channel->rx_queue.rx_packets; 2132 efx_process_channel(channel, budget); 2133 2134 rx_packets = channel->rx_queue.rx_packets - old_rx_packets; 2135 2136 /* There is no race condition with NAPI here. 2137 * NAPI will automatically be rescheduled if it yielded during busy 2138 * polling, because it was not able to take the lock and thus returned 2139 * the full budget. 2140 */ 2141 efx_channel_unlock_poll(channel); 2142 2143 return rx_packets; 2144 } 2145 #endif 2146 2147 /************************************************************************** 2148 * 2149 * Kernel net device interface 2150 * 2151 *************************************************************************/ 2152 2153 /* Context: process, rtnl_lock() held. */ 2154 int efx_net_open(struct net_device *net_dev) 2155 { 2156 struct efx_nic *efx = netdev_priv(net_dev); 2157 int rc; 2158 2159 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n", 2160 raw_smp_processor_id()); 2161 2162 rc = efx_check_disabled(efx); 2163 if (rc) 2164 return rc; 2165 if (efx->phy_mode & PHY_MODE_SPECIAL) 2166 return -EBUSY; 2167 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL)) 2168 return -EIO; 2169 2170 /* Notify the kernel of the link state polled during driver load, 2171 * before the monitor starts running */ 2172 efx_link_status_changed(efx); 2173 2174 efx_start_all(efx); 2175 efx_selftest_async_start(efx); 2176 return 0; 2177 } 2178 2179 /* Context: process, rtnl_lock() held. 2180 * Note that the kernel will ignore our return code; this method 2181 * should really be a void. 2182 */ 2183 int efx_net_stop(struct net_device *net_dev) 2184 { 2185 struct efx_nic *efx = netdev_priv(net_dev); 2186 2187 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n", 2188 raw_smp_processor_id()); 2189 2190 /* Stop the device and flush all the channels */ 2191 efx_stop_all(efx); 2192 2193 return 0; 2194 } 2195 2196 /* Context: process, dev_base_lock or RTNL held, non-blocking. */ 2197 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, 2198 struct rtnl_link_stats64 *stats) 2199 { 2200 struct efx_nic *efx = netdev_priv(net_dev); 2201 2202 spin_lock_bh(&efx->stats_lock); 2203 efx->type->update_stats(efx, NULL, stats); 2204 spin_unlock_bh(&efx->stats_lock); 2205 2206 return stats; 2207 } 2208 2209 /* Context: netif_tx_lock held, BHs disabled. */ 2210 static void efx_watchdog(struct net_device *net_dev) 2211 { 2212 struct efx_nic *efx = netdev_priv(net_dev); 2213 2214 netif_err(efx, tx_err, efx->net_dev, 2215 "TX stuck with port_enabled=%d: resetting channels\n", 2216 efx->port_enabled); 2217 2218 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG); 2219 } 2220 2221 2222 /* Context: process, rtnl_lock() held. */ 2223 static int efx_change_mtu(struct net_device *net_dev, int new_mtu) 2224 { 2225 struct efx_nic *efx = netdev_priv(net_dev); 2226 int rc; 2227 2228 rc = efx_check_disabled(efx); 2229 if (rc) 2230 return rc; 2231 if (new_mtu > EFX_MAX_MTU) 2232 return -EINVAL; 2233 2234 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); 2235 2236 efx_device_detach_sync(efx); 2237 efx_stop_all(efx); 2238 2239 mutex_lock(&efx->mac_lock); 2240 net_dev->mtu = new_mtu; 2241 efx_mac_reconfigure(efx); 2242 mutex_unlock(&efx->mac_lock); 2243 2244 efx_start_all(efx); 2245 netif_device_attach(efx->net_dev); 2246 return 0; 2247 } 2248 2249 static int efx_set_mac_address(struct net_device *net_dev, void *data) 2250 { 2251 struct efx_nic *efx = netdev_priv(net_dev); 2252 struct sockaddr *addr = data; 2253 u8 *new_addr = addr->sa_data; 2254 u8 old_addr[6]; 2255 int rc; 2256 2257 if (!is_valid_ether_addr(new_addr)) { 2258 netif_err(efx, drv, efx->net_dev, 2259 "invalid ethernet MAC address requested: %pM\n", 2260 new_addr); 2261 return -EADDRNOTAVAIL; 2262 } 2263 2264 /* save old address */ 2265 ether_addr_copy(old_addr, net_dev->dev_addr); 2266 ether_addr_copy(net_dev->dev_addr, new_addr); 2267 if (efx->type->set_mac_address) { 2268 rc = efx->type->set_mac_address(efx); 2269 if (rc) { 2270 ether_addr_copy(net_dev->dev_addr, old_addr); 2271 return rc; 2272 } 2273 } 2274 2275 /* Reconfigure the MAC */ 2276 mutex_lock(&efx->mac_lock); 2277 efx_mac_reconfigure(efx); 2278 mutex_unlock(&efx->mac_lock); 2279 2280 return 0; 2281 } 2282 2283 /* Context: netif_addr_lock held, BHs disabled. */ 2284 static void efx_set_rx_mode(struct net_device *net_dev) 2285 { 2286 struct efx_nic *efx = netdev_priv(net_dev); 2287 2288 if (efx->port_enabled) 2289 queue_work(efx->workqueue, &efx->mac_work); 2290 /* Otherwise efx_start_port() will do this */ 2291 } 2292 2293 static int efx_set_features(struct net_device *net_dev, netdev_features_t data) 2294 { 2295 struct efx_nic *efx = netdev_priv(net_dev); 2296 2297 /* If disabling RX n-tuple filtering, clear existing filters */ 2298 if (net_dev->features & ~data & NETIF_F_NTUPLE) 2299 return efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL); 2300 2301 return 0; 2302 } 2303 2304 static const struct net_device_ops efx_netdev_ops = { 2305 .ndo_open = efx_net_open, 2306 .ndo_stop = efx_net_stop, 2307 .ndo_get_stats64 = efx_net_stats, 2308 .ndo_tx_timeout = efx_watchdog, 2309 .ndo_start_xmit = efx_hard_start_xmit, 2310 .ndo_validate_addr = eth_validate_addr, 2311 .ndo_do_ioctl = efx_ioctl, 2312 .ndo_change_mtu = efx_change_mtu, 2313 .ndo_set_mac_address = efx_set_mac_address, 2314 .ndo_set_rx_mode = efx_set_rx_mode, 2315 .ndo_set_features = efx_set_features, 2316 #ifdef CONFIG_SFC_SRIOV 2317 .ndo_set_vf_mac = efx_sriov_set_vf_mac, 2318 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan, 2319 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk, 2320 .ndo_get_vf_config = efx_sriov_get_vf_config, 2321 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state, 2322 .ndo_get_phys_port_id = efx_sriov_get_phys_port_id, 2323 #endif 2324 #ifdef CONFIG_NET_POLL_CONTROLLER 2325 .ndo_poll_controller = efx_netpoll, 2326 #endif 2327 .ndo_setup_tc = efx_setup_tc, 2328 #ifdef CONFIG_NET_RX_BUSY_POLL 2329 .ndo_busy_poll = efx_busy_poll, 2330 #endif 2331 #ifdef CONFIG_RFS_ACCEL 2332 .ndo_rx_flow_steer = efx_filter_rfs, 2333 #endif 2334 }; 2335 2336 static void efx_update_name(struct efx_nic *efx) 2337 { 2338 strcpy(efx->name, efx->net_dev->name); 2339 efx_mtd_rename(efx); 2340 efx_set_channel_names(efx); 2341 } 2342 2343 static int efx_netdev_event(struct notifier_block *this, 2344 unsigned long event, void *ptr) 2345 { 2346 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr); 2347 2348 if ((net_dev->netdev_ops == &efx_netdev_ops) && 2349 event == NETDEV_CHANGENAME) 2350 efx_update_name(netdev_priv(net_dev)); 2351 2352 return NOTIFY_DONE; 2353 } 2354 2355 static struct notifier_block efx_netdev_notifier = { 2356 .notifier_call = efx_netdev_event, 2357 }; 2358 2359 static ssize_t 2360 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf) 2361 { 2362 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2363 return sprintf(buf, "%d\n", efx->phy_type); 2364 } 2365 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL); 2366 2367 #ifdef CONFIG_SFC_MCDI_LOGGING 2368 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr, 2369 char *buf) 2370 { 2371 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2372 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 2373 2374 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled); 2375 } 2376 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr, 2377 const char *buf, size_t count) 2378 { 2379 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2380 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 2381 bool enable = count > 0 && *buf != '0'; 2382 2383 mcdi->logging_enabled = enable; 2384 return count; 2385 } 2386 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log); 2387 #endif 2388 2389 static int efx_register_netdev(struct efx_nic *efx) 2390 { 2391 struct net_device *net_dev = efx->net_dev; 2392 struct efx_channel *channel; 2393 int rc; 2394 2395 net_dev->watchdog_timeo = 5 * HZ; 2396 net_dev->irq = efx->pci_dev->irq; 2397 net_dev->netdev_ops = &efx_netdev_ops; 2398 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) 2399 net_dev->priv_flags |= IFF_UNICAST_FLT; 2400 net_dev->ethtool_ops = &efx_ethtool_ops; 2401 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS; 2402 2403 rtnl_lock(); 2404 2405 /* Enable resets to be scheduled and check whether any were 2406 * already requested. If so, the NIC is probably hosed so we 2407 * abort. 2408 */ 2409 efx->state = STATE_READY; 2410 smp_mb(); /* ensure we change state before checking reset_pending */ 2411 if (efx->reset_pending) { 2412 netif_err(efx, probe, efx->net_dev, 2413 "aborting probe due to scheduled reset\n"); 2414 rc = -EIO; 2415 goto fail_locked; 2416 } 2417 2418 rc = dev_alloc_name(net_dev, net_dev->name); 2419 if (rc < 0) 2420 goto fail_locked; 2421 efx_update_name(efx); 2422 2423 /* Always start with carrier off; PHY events will detect the link */ 2424 netif_carrier_off(net_dev); 2425 2426 rc = register_netdevice(net_dev); 2427 if (rc) 2428 goto fail_locked; 2429 2430 efx_for_each_channel(channel, efx) { 2431 struct efx_tx_queue *tx_queue; 2432 efx_for_each_channel_tx_queue(tx_queue, channel) 2433 efx_init_tx_queue_core_txq(tx_queue); 2434 } 2435 2436 efx_associate(efx); 2437 2438 rtnl_unlock(); 2439 2440 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2441 if (rc) { 2442 netif_err(efx, drv, efx->net_dev, 2443 "failed to init net dev attributes\n"); 2444 goto fail_registered; 2445 } 2446 #ifdef CONFIG_SFC_MCDI_LOGGING 2447 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging); 2448 if (rc) { 2449 netif_err(efx, drv, efx->net_dev, 2450 "failed to init net dev attributes\n"); 2451 goto fail_attr_mcdi_logging; 2452 } 2453 #endif 2454 2455 return 0; 2456 2457 #ifdef CONFIG_SFC_MCDI_LOGGING 2458 fail_attr_mcdi_logging: 2459 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2460 #endif 2461 fail_registered: 2462 rtnl_lock(); 2463 efx_dissociate(efx); 2464 unregister_netdevice(net_dev); 2465 fail_locked: 2466 efx->state = STATE_UNINIT; 2467 rtnl_unlock(); 2468 netif_err(efx, drv, efx->net_dev, "could not register net dev\n"); 2469 return rc; 2470 } 2471 2472 static void efx_unregister_netdev(struct efx_nic *efx) 2473 { 2474 if (!efx->net_dev) 2475 return; 2476 2477 BUG_ON(netdev_priv(efx->net_dev) != efx); 2478 2479 if (efx_dev_registered(efx)) { 2480 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name)); 2481 #ifdef CONFIG_SFC_MCDI_LOGGING 2482 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging); 2483 #endif 2484 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2485 unregister_netdev(efx->net_dev); 2486 } 2487 } 2488 2489 /************************************************************************** 2490 * 2491 * Device reset and suspend 2492 * 2493 **************************************************************************/ 2494 2495 /* Tears down the entire software state and most of the hardware state 2496 * before reset. */ 2497 void efx_reset_down(struct efx_nic *efx, enum reset_type method) 2498 { 2499 EFX_ASSERT_RESET_SERIALISED(efx); 2500 2501 if (method == RESET_TYPE_MCDI_TIMEOUT) 2502 efx->type->prepare_flr(efx); 2503 2504 efx_stop_all(efx); 2505 efx_disable_interrupts(efx); 2506 2507 mutex_lock(&efx->mac_lock); 2508 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && 2509 method != RESET_TYPE_DATAPATH) 2510 efx->phy_op->fini(efx); 2511 efx->type->fini(efx); 2512 } 2513 2514 /* This function will always ensure that the locks acquired in 2515 * efx_reset_down() are released. A failure return code indicates 2516 * that we were unable to reinitialise the hardware, and the 2517 * driver should be disabled. If ok is false, then the rx and tx 2518 * engines are not restarted, pending a RESET_DISABLE. */ 2519 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok) 2520 { 2521 int rc; 2522 2523 EFX_ASSERT_RESET_SERIALISED(efx); 2524 2525 if (method == RESET_TYPE_MCDI_TIMEOUT) 2526 efx->type->finish_flr(efx); 2527 2528 /* Ensure that SRAM is initialised even if we're disabling the device */ 2529 rc = efx->type->init(efx); 2530 if (rc) { 2531 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); 2532 goto fail; 2533 } 2534 2535 if (!ok) 2536 goto fail; 2537 2538 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && 2539 method != RESET_TYPE_DATAPATH) { 2540 rc = efx->phy_op->init(efx); 2541 if (rc) 2542 goto fail; 2543 rc = efx->phy_op->reconfigure(efx); 2544 if (rc && rc != -EPERM) 2545 netif_err(efx, drv, efx->net_dev, 2546 "could not restore PHY settings\n"); 2547 } 2548 2549 rc = efx_enable_interrupts(efx); 2550 if (rc) 2551 goto fail; 2552 2553 #ifdef CONFIG_SFC_SRIOV 2554 rc = efx->type->vswitching_restore(efx); 2555 if (rc) /* not fatal; the PF will still work fine */ 2556 netif_warn(efx, probe, efx->net_dev, 2557 "failed to restore vswitching rc=%d;" 2558 " VFs may not function\n", rc); 2559 #endif 2560 2561 down_read(&efx->filter_sem); 2562 efx_restore_filters(efx); 2563 up_read(&efx->filter_sem); 2564 if (efx->type->sriov_reset) 2565 efx->type->sriov_reset(efx); 2566 2567 mutex_unlock(&efx->mac_lock); 2568 2569 efx_start_all(efx); 2570 2571 return 0; 2572 2573 fail: 2574 efx->port_initialized = false; 2575 2576 mutex_unlock(&efx->mac_lock); 2577 2578 return rc; 2579 } 2580 2581 /* Reset the NIC using the specified method. Note that the reset may 2582 * fail, in which case the card will be left in an unusable state. 2583 * 2584 * Caller must hold the rtnl_lock. 2585 */ 2586 int efx_reset(struct efx_nic *efx, enum reset_type method) 2587 { 2588 int rc, rc2; 2589 bool disabled; 2590 2591 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", 2592 RESET_TYPE(method)); 2593 2594 efx_device_detach_sync(efx); 2595 efx_reset_down(efx, method); 2596 2597 rc = efx->type->reset(efx, method); 2598 if (rc) { 2599 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); 2600 goto out; 2601 } 2602 2603 /* Clear flags for the scopes we covered. We assume the NIC and 2604 * driver are now quiescent so that there is no race here. 2605 */ 2606 if (method < RESET_TYPE_MAX_METHOD) 2607 efx->reset_pending &= -(1 << (method + 1)); 2608 else /* it doesn't fit into the well-ordered scope hierarchy */ 2609 __clear_bit(method, &efx->reset_pending); 2610 2611 /* Reinitialise bus-mastering, which may have been turned off before 2612 * the reset was scheduled. This is still appropriate, even in the 2613 * RESET_TYPE_DISABLE since this driver generally assumes the hardware 2614 * can respond to requests. */ 2615 pci_set_master(efx->pci_dev); 2616 2617 out: 2618 /* Leave device stopped if necessary */ 2619 disabled = rc || 2620 method == RESET_TYPE_DISABLE || 2621 method == RESET_TYPE_RECOVER_OR_DISABLE; 2622 rc2 = efx_reset_up(efx, method, !disabled); 2623 if (rc2) { 2624 disabled = true; 2625 if (!rc) 2626 rc = rc2; 2627 } 2628 2629 if (disabled) { 2630 dev_close(efx->net_dev); 2631 netif_err(efx, drv, efx->net_dev, "has been disabled\n"); 2632 efx->state = STATE_DISABLED; 2633 } else { 2634 netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); 2635 netif_device_attach(efx->net_dev); 2636 } 2637 return rc; 2638 } 2639 2640 /* Try recovery mechanisms. 2641 * For now only EEH is supported. 2642 * Returns 0 if the recovery mechanisms are unsuccessful. 2643 * Returns a non-zero value otherwise. 2644 */ 2645 int efx_try_recovery(struct efx_nic *efx) 2646 { 2647 #ifdef CONFIG_EEH 2648 /* A PCI error can occur and not be seen by EEH because nothing 2649 * happens on the PCI bus. In this case the driver may fail and 2650 * schedule a 'recover or reset', leading to this recovery handler. 2651 * Manually call the eeh failure check function. 2652 */ 2653 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev); 2654 if (eeh_dev_check_failure(eehdev)) { 2655 /* The EEH mechanisms will handle the error and reset the 2656 * device if necessary. 2657 */ 2658 return 1; 2659 } 2660 #endif 2661 return 0; 2662 } 2663 2664 static void efx_wait_for_bist_end(struct efx_nic *efx) 2665 { 2666 int i; 2667 2668 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) { 2669 if (efx_mcdi_poll_reboot(efx)) 2670 goto out; 2671 msleep(BIST_WAIT_DELAY_MS); 2672 } 2673 2674 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n"); 2675 out: 2676 /* Either way unset the BIST flag. If we found no reboot we probably 2677 * won't recover, but we should try. 2678 */ 2679 efx->mc_bist_for_other_fn = false; 2680 } 2681 2682 /* The worker thread exists so that code that cannot sleep can 2683 * schedule a reset for later. 2684 */ 2685 static void efx_reset_work(struct work_struct *data) 2686 { 2687 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); 2688 unsigned long pending; 2689 enum reset_type method; 2690 2691 pending = ACCESS_ONCE(efx->reset_pending); 2692 method = fls(pending) - 1; 2693 2694 if (method == RESET_TYPE_MC_BIST) 2695 efx_wait_for_bist_end(efx); 2696 2697 if ((method == RESET_TYPE_RECOVER_OR_DISABLE || 2698 method == RESET_TYPE_RECOVER_OR_ALL) && 2699 efx_try_recovery(efx)) 2700 return; 2701 2702 if (!pending) 2703 return; 2704 2705 rtnl_lock(); 2706 2707 /* We checked the state in efx_schedule_reset() but it may 2708 * have changed by now. Now that we have the RTNL lock, 2709 * it cannot change again. 2710 */ 2711 if (efx->state == STATE_READY) 2712 (void)efx_reset(efx, method); 2713 2714 rtnl_unlock(); 2715 } 2716 2717 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) 2718 { 2719 enum reset_type method; 2720 2721 if (efx->state == STATE_RECOVERY) { 2722 netif_dbg(efx, drv, efx->net_dev, 2723 "recovering: skip scheduling %s reset\n", 2724 RESET_TYPE(type)); 2725 return; 2726 } 2727 2728 switch (type) { 2729 case RESET_TYPE_INVISIBLE: 2730 case RESET_TYPE_ALL: 2731 case RESET_TYPE_RECOVER_OR_ALL: 2732 case RESET_TYPE_WORLD: 2733 case RESET_TYPE_DISABLE: 2734 case RESET_TYPE_RECOVER_OR_DISABLE: 2735 case RESET_TYPE_DATAPATH: 2736 case RESET_TYPE_MC_BIST: 2737 case RESET_TYPE_MCDI_TIMEOUT: 2738 method = type; 2739 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", 2740 RESET_TYPE(method)); 2741 break; 2742 default: 2743 method = efx->type->map_reset_reason(type); 2744 netif_dbg(efx, drv, efx->net_dev, 2745 "scheduling %s reset for %s\n", 2746 RESET_TYPE(method), RESET_TYPE(type)); 2747 break; 2748 } 2749 2750 set_bit(method, &efx->reset_pending); 2751 smp_mb(); /* ensure we change reset_pending before checking state */ 2752 2753 /* If we're not READY then just leave the flags set as the cue 2754 * to abort probing or reschedule the reset later. 2755 */ 2756 if (ACCESS_ONCE(efx->state) != STATE_READY) 2757 return; 2758 2759 /* efx_process_channel() will no longer read events once a 2760 * reset is scheduled. So switch back to poll'd MCDI completions. */ 2761 efx_mcdi_mode_poll(efx); 2762 2763 queue_work(reset_workqueue, &efx->reset_work); 2764 } 2765 2766 /************************************************************************** 2767 * 2768 * List of NICs we support 2769 * 2770 **************************************************************************/ 2771 2772 /* PCI device ID table */ 2773 static const struct pci_device_id efx_pci_table[] = { 2774 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2775 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0), 2776 .driver_data = (unsigned long) &falcon_a1_nic_type}, 2777 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2778 PCI_DEVICE_ID_SOLARFLARE_SFC4000B), 2779 .driver_data = (unsigned long) &falcon_b0_nic_type}, 2780 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */ 2781 .driver_data = (unsigned long) &siena_a0_nic_type}, 2782 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */ 2783 .driver_data = (unsigned long) &siena_a0_nic_type}, 2784 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */ 2785 .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, 2786 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */ 2787 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type}, 2788 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */ 2789 .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, 2790 {0} /* end of list */ 2791 }; 2792 2793 /************************************************************************** 2794 * 2795 * Dummy PHY/MAC operations 2796 * 2797 * Can be used for some unimplemented operations 2798 * Needed so all function pointers are valid and do not have to be tested 2799 * before use 2800 * 2801 **************************************************************************/ 2802 int efx_port_dummy_op_int(struct efx_nic *efx) 2803 { 2804 return 0; 2805 } 2806 void efx_port_dummy_op_void(struct efx_nic *efx) {} 2807 2808 static bool efx_port_dummy_op_poll(struct efx_nic *efx) 2809 { 2810 return false; 2811 } 2812 2813 static const struct efx_phy_operations efx_dummy_phy_operations = { 2814 .init = efx_port_dummy_op_int, 2815 .reconfigure = efx_port_dummy_op_int, 2816 .poll = efx_port_dummy_op_poll, 2817 .fini = efx_port_dummy_op_void, 2818 }; 2819 2820 /************************************************************************** 2821 * 2822 * Data housekeeping 2823 * 2824 **************************************************************************/ 2825 2826 /* This zeroes out and then fills in the invariants in a struct 2827 * efx_nic (including all sub-structures). 2828 */ 2829 static int efx_init_struct(struct efx_nic *efx, 2830 struct pci_dev *pci_dev, struct net_device *net_dev) 2831 { 2832 int i; 2833 2834 /* Initialise common structures */ 2835 INIT_LIST_HEAD(&efx->node); 2836 INIT_LIST_HEAD(&efx->secondary_list); 2837 spin_lock_init(&efx->biu_lock); 2838 #ifdef CONFIG_SFC_MTD 2839 INIT_LIST_HEAD(&efx->mtd_list); 2840 #endif 2841 INIT_WORK(&efx->reset_work, efx_reset_work); 2842 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor); 2843 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work); 2844 efx->pci_dev = pci_dev; 2845 efx->msg_enable = debug; 2846 efx->state = STATE_UNINIT; 2847 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); 2848 2849 efx->net_dev = net_dev; 2850 efx->rx_prefix_size = efx->type->rx_prefix_size; 2851 efx->rx_ip_align = 2852 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0; 2853 efx->rx_packet_hash_offset = 2854 efx->type->rx_hash_offset - efx->type->rx_prefix_size; 2855 efx->rx_packet_ts_offset = 2856 efx->type->rx_ts_offset - efx->type->rx_prefix_size; 2857 spin_lock_init(&efx->stats_lock); 2858 mutex_init(&efx->mac_lock); 2859 efx->phy_op = &efx_dummy_phy_operations; 2860 efx->mdio.dev = net_dev; 2861 INIT_WORK(&efx->mac_work, efx_mac_work); 2862 init_waitqueue_head(&efx->flush_wq); 2863 2864 for (i = 0; i < EFX_MAX_CHANNELS; i++) { 2865 efx->channel[i] = efx_alloc_channel(efx, i, NULL); 2866 if (!efx->channel[i]) 2867 goto fail; 2868 efx->msi_context[i].efx = efx; 2869 efx->msi_context[i].index = i; 2870 } 2871 2872 /* Higher numbered interrupt modes are less capable! */ 2873 efx->interrupt_mode = max(efx->type->max_interrupt_mode, 2874 interrupt_mode); 2875 2876 /* Would be good to use the net_dev name, but we're too early */ 2877 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", 2878 pci_name(pci_dev)); 2879 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); 2880 if (!efx->workqueue) 2881 goto fail; 2882 2883 return 0; 2884 2885 fail: 2886 efx_fini_struct(efx); 2887 return -ENOMEM; 2888 } 2889 2890 static void efx_fini_struct(struct efx_nic *efx) 2891 { 2892 int i; 2893 2894 for (i = 0; i < EFX_MAX_CHANNELS; i++) 2895 kfree(efx->channel[i]); 2896 2897 kfree(efx->vpd_sn); 2898 2899 if (efx->workqueue) { 2900 destroy_workqueue(efx->workqueue); 2901 efx->workqueue = NULL; 2902 } 2903 } 2904 2905 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats) 2906 { 2907 u64 n_rx_nodesc_trunc = 0; 2908 struct efx_channel *channel; 2909 2910 efx_for_each_channel(channel, efx) 2911 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc; 2912 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc; 2913 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops); 2914 } 2915 2916 /************************************************************************** 2917 * 2918 * PCI interface 2919 * 2920 **************************************************************************/ 2921 2922 /* Main body of final NIC shutdown code 2923 * This is called only at module unload (or hotplug removal). 2924 */ 2925 static void efx_pci_remove_main(struct efx_nic *efx) 2926 { 2927 /* Flush reset_work. It can no longer be scheduled since we 2928 * are not READY. 2929 */ 2930 BUG_ON(efx->state == STATE_READY); 2931 cancel_work_sync(&efx->reset_work); 2932 2933 efx_disable_interrupts(efx); 2934 efx_nic_fini_interrupt(efx); 2935 efx_fini_port(efx); 2936 efx->type->fini(efx); 2937 efx_fini_napi(efx); 2938 efx_remove_all(efx); 2939 } 2940 2941 /* Final NIC shutdown 2942 * This is called only at module unload (or hotplug removal). A PF can call 2943 * this on its VFs to ensure they are unbound first. 2944 */ 2945 static void efx_pci_remove(struct pci_dev *pci_dev) 2946 { 2947 struct efx_nic *efx; 2948 2949 efx = pci_get_drvdata(pci_dev); 2950 if (!efx) 2951 return; 2952 2953 /* Mark the NIC as fini, then stop the interface */ 2954 rtnl_lock(); 2955 efx_dissociate(efx); 2956 dev_close(efx->net_dev); 2957 efx_disable_interrupts(efx); 2958 efx->state = STATE_UNINIT; 2959 rtnl_unlock(); 2960 2961 if (efx->type->sriov_fini) 2962 efx->type->sriov_fini(efx); 2963 2964 efx_unregister_netdev(efx); 2965 2966 efx_mtd_remove(efx); 2967 2968 efx_pci_remove_main(efx); 2969 2970 efx_fini_io(efx); 2971 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n"); 2972 2973 efx_fini_struct(efx); 2974 free_netdev(efx->net_dev); 2975 2976 pci_disable_pcie_error_reporting(pci_dev); 2977 }; 2978 2979 /* NIC VPD information 2980 * Called during probe to display the part number of the 2981 * installed NIC. VPD is potentially very large but this should 2982 * always appear within the first 512 bytes. 2983 */ 2984 #define SFC_VPD_LEN 512 2985 static void efx_probe_vpd_strings(struct efx_nic *efx) 2986 { 2987 struct pci_dev *dev = efx->pci_dev; 2988 char vpd_data[SFC_VPD_LEN]; 2989 ssize_t vpd_size; 2990 int ro_start, ro_size, i, j; 2991 2992 /* Get the vpd data from the device */ 2993 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data); 2994 if (vpd_size <= 0) { 2995 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n"); 2996 return; 2997 } 2998 2999 /* Get the Read only section */ 3000 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA); 3001 if (ro_start < 0) { 3002 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n"); 3003 return; 3004 } 3005 3006 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); 3007 j = ro_size; 3008 i = ro_start + PCI_VPD_LRDT_TAG_SIZE; 3009 if (i + j > vpd_size) 3010 j = vpd_size - i; 3011 3012 /* Get the Part number */ 3013 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN"); 3014 if (i < 0) { 3015 netif_err(efx, drv, efx->net_dev, "Part number not found\n"); 3016 return; 3017 } 3018 3019 j = pci_vpd_info_field_size(&vpd_data[i]); 3020 i += PCI_VPD_INFO_FLD_HDR_SIZE; 3021 if (i + j > vpd_size) { 3022 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n"); 3023 return; 3024 } 3025 3026 netif_info(efx, drv, efx->net_dev, 3027 "Part Number : %.*s\n", j, &vpd_data[i]); 3028 3029 i = ro_start + PCI_VPD_LRDT_TAG_SIZE; 3030 j = ro_size; 3031 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN"); 3032 if (i < 0) { 3033 netif_err(efx, drv, efx->net_dev, "Serial number not found\n"); 3034 return; 3035 } 3036 3037 j = pci_vpd_info_field_size(&vpd_data[i]); 3038 i += PCI_VPD_INFO_FLD_HDR_SIZE; 3039 if (i + j > vpd_size) { 3040 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n"); 3041 return; 3042 } 3043 3044 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL); 3045 if (!efx->vpd_sn) 3046 return; 3047 3048 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]); 3049 } 3050 3051 3052 /* Main body of NIC initialisation 3053 * This is called at module load (or hotplug insertion, theoretically). 3054 */ 3055 static int efx_pci_probe_main(struct efx_nic *efx) 3056 { 3057 int rc; 3058 3059 /* Do start-of-day initialisation */ 3060 rc = efx_probe_all(efx); 3061 if (rc) 3062 goto fail1; 3063 3064 efx_init_napi(efx); 3065 3066 rc = efx->type->init(efx); 3067 if (rc) { 3068 netif_err(efx, probe, efx->net_dev, 3069 "failed to initialise NIC\n"); 3070 goto fail3; 3071 } 3072 3073 rc = efx_init_port(efx); 3074 if (rc) { 3075 netif_err(efx, probe, efx->net_dev, 3076 "failed to initialise port\n"); 3077 goto fail4; 3078 } 3079 3080 rc = efx_nic_init_interrupt(efx); 3081 if (rc) 3082 goto fail5; 3083 rc = efx_enable_interrupts(efx); 3084 if (rc) 3085 goto fail6; 3086 3087 return 0; 3088 3089 fail6: 3090 efx_nic_fini_interrupt(efx); 3091 fail5: 3092 efx_fini_port(efx); 3093 fail4: 3094 efx->type->fini(efx); 3095 fail3: 3096 efx_fini_napi(efx); 3097 efx_remove_all(efx); 3098 fail1: 3099 return rc; 3100 } 3101 3102 /* NIC initialisation 3103 * 3104 * This is called at module load (or hotplug insertion, 3105 * theoretically). It sets up PCI mappings, resets the NIC, 3106 * sets up and registers the network devices with the kernel and hooks 3107 * the interrupt service routine. It does not prepare the device for 3108 * transmission; this is left to the first time one of the network 3109 * interfaces is brought up (i.e. efx_net_open). 3110 */ 3111 static int efx_pci_probe(struct pci_dev *pci_dev, 3112 const struct pci_device_id *entry) 3113 { 3114 struct net_device *net_dev; 3115 struct efx_nic *efx; 3116 int rc; 3117 3118 /* Allocate and initialise a struct net_device and struct efx_nic */ 3119 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES, 3120 EFX_MAX_RX_QUEUES); 3121 if (!net_dev) 3122 return -ENOMEM; 3123 efx = netdev_priv(net_dev); 3124 efx->type = (const struct efx_nic_type *) entry->driver_data; 3125 net_dev->features |= (efx->type->offload_features | NETIF_F_SG | 3126 NETIF_F_HIGHDMA | NETIF_F_TSO | 3127 NETIF_F_RXCSUM); 3128 if (efx->type->offload_features & NETIF_F_V6_CSUM) 3129 net_dev->features |= NETIF_F_TSO6; 3130 /* Mask for features that also apply to VLAN devices */ 3131 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG | 3132 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO | 3133 NETIF_F_RXCSUM); 3134 /* All offloads can be toggled */ 3135 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA; 3136 pci_set_drvdata(pci_dev, efx); 3137 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 3138 rc = efx_init_struct(efx, pci_dev, net_dev); 3139 if (rc) 3140 goto fail1; 3141 3142 netif_info(efx, probe, efx->net_dev, 3143 "Solarflare NIC detected\n"); 3144 3145 if (!efx->type->is_vf) 3146 efx_probe_vpd_strings(efx); 3147 3148 /* Set up basic I/O (BAR mappings etc) */ 3149 rc = efx_init_io(efx); 3150 if (rc) 3151 goto fail2; 3152 3153 rc = efx_pci_probe_main(efx); 3154 if (rc) 3155 goto fail3; 3156 3157 rc = efx_register_netdev(efx); 3158 if (rc) 3159 goto fail4; 3160 3161 if (efx->type->sriov_init) { 3162 rc = efx->type->sriov_init(efx); 3163 if (rc) 3164 netif_err(efx, probe, efx->net_dev, 3165 "SR-IOV can't be enabled rc %d\n", rc); 3166 } 3167 3168 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n"); 3169 3170 /* Try to create MTDs, but allow this to fail */ 3171 rtnl_lock(); 3172 rc = efx_mtd_probe(efx); 3173 rtnl_unlock(); 3174 if (rc) 3175 netif_warn(efx, probe, efx->net_dev, 3176 "failed to create MTDs (%d)\n", rc); 3177 3178 rc = pci_enable_pcie_error_reporting(pci_dev); 3179 if (rc && rc != -EINVAL) 3180 netif_warn(efx, probe, efx->net_dev, 3181 "pci_enable_pcie_error_reporting failed (%d)\n", rc); 3182 3183 return 0; 3184 3185 fail4: 3186 efx_pci_remove_main(efx); 3187 fail3: 3188 efx_fini_io(efx); 3189 fail2: 3190 efx_fini_struct(efx); 3191 fail1: 3192 WARN_ON(rc > 0); 3193 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc); 3194 free_netdev(net_dev); 3195 return rc; 3196 } 3197 3198 /* efx_pci_sriov_configure returns the actual number of Virtual Functions 3199 * enabled on success 3200 */ 3201 #ifdef CONFIG_SFC_SRIOV 3202 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs) 3203 { 3204 int rc; 3205 struct efx_nic *efx = pci_get_drvdata(dev); 3206 3207 if (efx->type->sriov_configure) { 3208 rc = efx->type->sriov_configure(efx, num_vfs); 3209 if (rc) 3210 return rc; 3211 else 3212 return num_vfs; 3213 } else 3214 return -EOPNOTSUPP; 3215 } 3216 #endif 3217 3218 static int efx_pm_freeze(struct device *dev) 3219 { 3220 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 3221 3222 rtnl_lock(); 3223 3224 if (efx->state != STATE_DISABLED) { 3225 efx->state = STATE_UNINIT; 3226 3227 efx_device_detach_sync(efx); 3228 3229 efx_stop_all(efx); 3230 efx_disable_interrupts(efx); 3231 } 3232 3233 rtnl_unlock(); 3234 3235 return 0; 3236 } 3237 3238 static int efx_pm_thaw(struct device *dev) 3239 { 3240 int rc; 3241 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 3242 3243 rtnl_lock(); 3244 3245 if (efx->state != STATE_DISABLED) { 3246 rc = efx_enable_interrupts(efx); 3247 if (rc) 3248 goto fail; 3249 3250 mutex_lock(&efx->mac_lock); 3251 efx->phy_op->reconfigure(efx); 3252 mutex_unlock(&efx->mac_lock); 3253 3254 efx_start_all(efx); 3255 3256 netif_device_attach(efx->net_dev); 3257 3258 efx->state = STATE_READY; 3259 3260 efx->type->resume_wol(efx); 3261 } 3262 3263 rtnl_unlock(); 3264 3265 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */ 3266 queue_work(reset_workqueue, &efx->reset_work); 3267 3268 return 0; 3269 3270 fail: 3271 rtnl_unlock(); 3272 3273 return rc; 3274 } 3275 3276 static int efx_pm_poweroff(struct device *dev) 3277 { 3278 struct pci_dev *pci_dev = to_pci_dev(dev); 3279 struct efx_nic *efx = pci_get_drvdata(pci_dev); 3280 3281 efx->type->fini(efx); 3282 3283 efx->reset_pending = 0; 3284 3285 pci_save_state(pci_dev); 3286 return pci_set_power_state(pci_dev, PCI_D3hot); 3287 } 3288 3289 /* Used for both resume and restore */ 3290 static int efx_pm_resume(struct device *dev) 3291 { 3292 struct pci_dev *pci_dev = to_pci_dev(dev); 3293 struct efx_nic *efx = pci_get_drvdata(pci_dev); 3294 int rc; 3295 3296 rc = pci_set_power_state(pci_dev, PCI_D0); 3297 if (rc) 3298 return rc; 3299 pci_restore_state(pci_dev); 3300 rc = pci_enable_device(pci_dev); 3301 if (rc) 3302 return rc; 3303 pci_set_master(efx->pci_dev); 3304 rc = efx->type->reset(efx, RESET_TYPE_ALL); 3305 if (rc) 3306 return rc; 3307 rc = efx->type->init(efx); 3308 if (rc) 3309 return rc; 3310 rc = efx_pm_thaw(dev); 3311 return rc; 3312 } 3313 3314 static int efx_pm_suspend(struct device *dev) 3315 { 3316 int rc; 3317 3318 efx_pm_freeze(dev); 3319 rc = efx_pm_poweroff(dev); 3320 if (rc) 3321 efx_pm_resume(dev); 3322 return rc; 3323 } 3324 3325 static const struct dev_pm_ops efx_pm_ops = { 3326 .suspend = efx_pm_suspend, 3327 .resume = efx_pm_resume, 3328 .freeze = efx_pm_freeze, 3329 .thaw = efx_pm_thaw, 3330 .poweroff = efx_pm_poweroff, 3331 .restore = efx_pm_resume, 3332 }; 3333 3334 /* A PCI error affecting this device was detected. 3335 * At this point MMIO and DMA may be disabled. 3336 * Stop the software path and request a slot reset. 3337 */ 3338 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev, 3339 enum pci_channel_state state) 3340 { 3341 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 3342 struct efx_nic *efx = pci_get_drvdata(pdev); 3343 3344 if (state == pci_channel_io_perm_failure) 3345 return PCI_ERS_RESULT_DISCONNECT; 3346 3347 rtnl_lock(); 3348 3349 if (efx->state != STATE_DISABLED) { 3350 efx->state = STATE_RECOVERY; 3351 efx->reset_pending = 0; 3352 3353 efx_device_detach_sync(efx); 3354 3355 efx_stop_all(efx); 3356 efx_disable_interrupts(efx); 3357 3358 status = PCI_ERS_RESULT_NEED_RESET; 3359 } else { 3360 /* If the interface is disabled we don't want to do anything 3361 * with it. 3362 */ 3363 status = PCI_ERS_RESULT_RECOVERED; 3364 } 3365 3366 rtnl_unlock(); 3367 3368 pci_disable_device(pdev); 3369 3370 return status; 3371 } 3372 3373 /* Fake a successful reset, which will be performed later in efx_io_resume. */ 3374 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev) 3375 { 3376 struct efx_nic *efx = pci_get_drvdata(pdev); 3377 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 3378 int rc; 3379 3380 if (pci_enable_device(pdev)) { 3381 netif_err(efx, hw, efx->net_dev, 3382 "Cannot re-enable PCI device after reset.\n"); 3383 status = PCI_ERS_RESULT_DISCONNECT; 3384 } 3385 3386 rc = pci_cleanup_aer_uncorrect_error_status(pdev); 3387 if (rc) { 3388 netif_err(efx, hw, efx->net_dev, 3389 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc); 3390 /* Non-fatal error. Continue. */ 3391 } 3392 3393 return status; 3394 } 3395 3396 /* Perform the actual reset and resume I/O operations. */ 3397 static void efx_io_resume(struct pci_dev *pdev) 3398 { 3399 struct efx_nic *efx = pci_get_drvdata(pdev); 3400 int rc; 3401 3402 rtnl_lock(); 3403 3404 if (efx->state == STATE_DISABLED) 3405 goto out; 3406 3407 rc = efx_reset(efx, RESET_TYPE_ALL); 3408 if (rc) { 3409 netif_err(efx, hw, efx->net_dev, 3410 "efx_reset failed after PCI error (%d)\n", rc); 3411 } else { 3412 efx->state = STATE_READY; 3413 netif_dbg(efx, hw, efx->net_dev, 3414 "Done resetting and resuming IO after PCI error.\n"); 3415 } 3416 3417 out: 3418 rtnl_unlock(); 3419 } 3420 3421 /* For simplicity and reliability, we always require a slot reset and try to 3422 * reset the hardware when a pci error affecting the device is detected. 3423 * We leave both the link_reset and mmio_enabled callback unimplemented: 3424 * with our request for slot reset the mmio_enabled callback will never be 3425 * called, and the link_reset callback is not used by AER or EEH mechanisms. 3426 */ 3427 static struct pci_error_handlers efx_err_handlers = { 3428 .error_detected = efx_io_error_detected, 3429 .slot_reset = efx_io_slot_reset, 3430 .resume = efx_io_resume, 3431 }; 3432 3433 static struct pci_driver efx_pci_driver = { 3434 .name = KBUILD_MODNAME, 3435 .id_table = efx_pci_table, 3436 .probe = efx_pci_probe, 3437 .remove = efx_pci_remove, 3438 .driver.pm = &efx_pm_ops, 3439 .err_handler = &efx_err_handlers, 3440 #ifdef CONFIG_SFC_SRIOV 3441 .sriov_configure = efx_pci_sriov_configure, 3442 #endif 3443 }; 3444 3445 /************************************************************************** 3446 * 3447 * Kernel module interface 3448 * 3449 *************************************************************************/ 3450 3451 module_param(interrupt_mode, uint, 0444); 3452 MODULE_PARM_DESC(interrupt_mode, 3453 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)"); 3454 3455 static int __init efx_init_module(void) 3456 { 3457 int rc; 3458 3459 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n"); 3460 3461 rc = register_netdevice_notifier(&efx_netdev_notifier); 3462 if (rc) 3463 goto err_notifier; 3464 3465 #ifdef CONFIG_SFC_SRIOV 3466 rc = efx_init_sriov(); 3467 if (rc) 3468 goto err_sriov; 3469 #endif 3470 3471 reset_workqueue = create_singlethread_workqueue("sfc_reset"); 3472 if (!reset_workqueue) { 3473 rc = -ENOMEM; 3474 goto err_reset; 3475 } 3476 3477 rc = pci_register_driver(&efx_pci_driver); 3478 if (rc < 0) 3479 goto err_pci; 3480 3481 return 0; 3482 3483 err_pci: 3484 destroy_workqueue(reset_workqueue); 3485 err_reset: 3486 #ifdef CONFIG_SFC_SRIOV 3487 efx_fini_sriov(); 3488 err_sriov: 3489 #endif 3490 unregister_netdevice_notifier(&efx_netdev_notifier); 3491 err_notifier: 3492 return rc; 3493 } 3494 3495 static void __exit efx_exit_module(void) 3496 { 3497 printk(KERN_INFO "Solarflare NET driver unloading\n"); 3498 3499 pci_unregister_driver(&efx_pci_driver); 3500 destroy_workqueue(reset_workqueue); 3501 #ifdef CONFIG_SFC_SRIOV 3502 efx_fini_sriov(); 3503 #endif 3504 unregister_netdevice_notifier(&efx_netdev_notifier); 3505 3506 } 3507 3508 module_init(efx_init_module); 3509 module_exit(efx_exit_module); 3510 3511 MODULE_AUTHOR("Solarflare Communications and " 3512 "Michael Brown <mbrown@fensystems.co.uk>"); 3513 MODULE_DESCRIPTION("Solarflare network driver"); 3514 MODULE_LICENSE("GPL"); 3515 MODULE_DEVICE_TABLE(pci, efx_pci_table); 3516