1 /**************************************************************************** 2 * Driver for Solarflare network controllers and boards 3 * Copyright 2005-2006 Fen Systems Ltd. 4 * Copyright 2005-2013 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/delay.h> 16 #include <linux/notifier.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/in.h> 20 #include <linux/ethtool.h> 21 #include <linux/topology.h> 22 #include <linux/gfp.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include "net_driver.h" 26 #include "efx.h" 27 #include "nic.h" 28 #include "selftest.h" 29 30 #include "mcdi.h" 31 #include "workarounds.h" 32 33 /************************************************************************** 34 * 35 * Type name strings 36 * 37 ************************************************************************** 38 */ 39 40 /* Loopback mode names (see LOOPBACK_MODE()) */ 41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX; 42 const char *const efx_loopback_mode_names[] = { 43 [LOOPBACK_NONE] = "NONE", 44 [LOOPBACK_DATA] = "DATAPATH", 45 [LOOPBACK_GMAC] = "GMAC", 46 [LOOPBACK_XGMII] = "XGMII", 47 [LOOPBACK_XGXS] = "XGXS", 48 [LOOPBACK_XAUI] = "XAUI", 49 [LOOPBACK_GMII] = "GMII", 50 [LOOPBACK_SGMII] = "SGMII", 51 [LOOPBACK_XGBR] = "XGBR", 52 [LOOPBACK_XFI] = "XFI", 53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR", 54 [LOOPBACK_GMII_FAR] = "GMII_FAR", 55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR", 56 [LOOPBACK_XFI_FAR] = "XFI_FAR", 57 [LOOPBACK_GPHY] = "GPHY", 58 [LOOPBACK_PHYXS] = "PHYXS", 59 [LOOPBACK_PCS] = "PCS", 60 [LOOPBACK_PMAPMD] = "PMA/PMD", 61 [LOOPBACK_XPORT] = "XPORT", 62 [LOOPBACK_XGMII_WS] = "XGMII_WS", 63 [LOOPBACK_XAUI_WS] = "XAUI_WS", 64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR", 65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR", 66 [LOOPBACK_GMII_WS] = "GMII_WS", 67 [LOOPBACK_XFI_WS] = "XFI_WS", 68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR", 69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS", 70 }; 71 72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX; 73 const char *const efx_reset_type_names[] = { 74 [RESET_TYPE_INVISIBLE] = "INVISIBLE", 75 [RESET_TYPE_ALL] = "ALL", 76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", 77 [RESET_TYPE_WORLD] = "WORLD", 78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", 79 [RESET_TYPE_MC_BIST] = "MC_BIST", 80 [RESET_TYPE_DISABLE] = "DISABLE", 81 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", 82 [RESET_TYPE_INT_ERROR] = "INT_ERROR", 83 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY", 84 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR", 85 [RESET_TYPE_TX_SKIP] = "TX_SKIP", 86 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", 87 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)", 88 }; 89 90 /* Reset workqueue. If any NIC has a hardware failure then a reset will be 91 * queued onto this work queue. This is not a per-nic work queue, because 92 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. 93 */ 94 static struct workqueue_struct *reset_workqueue; 95 96 /* How often and how many times to poll for a reset while waiting for a 97 * BIST that another function started to complete. 98 */ 99 #define BIST_WAIT_DELAY_MS 100 100 #define BIST_WAIT_DELAY_COUNT 100 101 102 /************************************************************************** 103 * 104 * Configurable values 105 * 106 *************************************************************************/ 107 108 /* 109 * Use separate channels for TX and RX events 110 * 111 * Set this to 1 to use separate channels for TX and RX. It allows us 112 * to control interrupt affinity separately for TX and RX. 113 * 114 * This is only used in MSI-X interrupt mode 115 */ 116 static bool separate_tx_channels; 117 module_param(separate_tx_channels, bool, 0444); 118 MODULE_PARM_DESC(separate_tx_channels, 119 "Use separate channels for TX and RX"); 120 121 /* This is the weight assigned to each of the (per-channel) virtual 122 * NAPI devices. 123 */ 124 static int napi_weight = 64; 125 126 /* This is the time (in jiffies) between invocations of the hardware 127 * monitor. 128 * On Falcon-based NICs, this will: 129 * - Check the on-board hardware monitor; 130 * - Poll the link state and reconfigure the hardware as necessary. 131 * On Siena-based NICs for power systems with EEH support, this will give EEH a 132 * chance to start. 133 */ 134 static unsigned int efx_monitor_interval = 1 * HZ; 135 136 /* Initial interrupt moderation settings. They can be modified after 137 * module load with ethtool. 138 * 139 * The default for RX should strike a balance between increasing the 140 * round-trip latency and reducing overhead. 141 */ 142 static unsigned int rx_irq_mod_usec = 60; 143 144 /* Initial interrupt moderation settings. They can be modified after 145 * module load with ethtool. 146 * 147 * This default is chosen to ensure that a 10G link does not go idle 148 * while a TX queue is stopped after it has become full. A queue is 149 * restarted when it drops below half full. The time this takes (assuming 150 * worst case 3 descriptors per packet and 1024 descriptors) is 151 * 512 / 3 * 1.2 = 205 usec. 152 */ 153 static unsigned int tx_irq_mod_usec = 150; 154 155 /* This is the first interrupt mode to try out of: 156 * 0 => MSI-X 157 * 1 => MSI 158 * 2 => legacy 159 */ 160 static unsigned int interrupt_mode; 161 162 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS), 163 * i.e. the number of CPUs among which we may distribute simultaneous 164 * interrupt handling. 165 * 166 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt. 167 * The default (0) means to assign an interrupt to each core. 168 */ 169 static unsigned int rss_cpus; 170 module_param(rss_cpus, uint, 0444); 171 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling"); 172 173 static bool phy_flash_cfg; 174 module_param(phy_flash_cfg, bool, 0644); 175 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially"); 176 177 static unsigned irq_adapt_low_thresh = 8000; 178 module_param(irq_adapt_low_thresh, uint, 0644); 179 MODULE_PARM_DESC(irq_adapt_low_thresh, 180 "Threshold score for reducing IRQ moderation"); 181 182 static unsigned irq_adapt_high_thresh = 16000; 183 module_param(irq_adapt_high_thresh, uint, 0644); 184 MODULE_PARM_DESC(irq_adapt_high_thresh, 185 "Threshold score for increasing IRQ moderation"); 186 187 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE | 188 NETIF_MSG_LINK | NETIF_MSG_IFDOWN | 189 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR | 190 NETIF_MSG_TX_ERR | NETIF_MSG_HW); 191 module_param(debug, uint, 0); 192 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value"); 193 194 /************************************************************************** 195 * 196 * Utility functions and prototypes 197 * 198 *************************************************************************/ 199 200 static int efx_soft_enable_interrupts(struct efx_nic *efx); 201 static void efx_soft_disable_interrupts(struct efx_nic *efx); 202 static void efx_remove_channel(struct efx_channel *channel); 203 static void efx_remove_channels(struct efx_nic *efx); 204 static const struct efx_channel_type efx_default_channel_type; 205 static void efx_remove_port(struct efx_nic *efx); 206 static void efx_init_napi_channel(struct efx_channel *channel); 207 static void efx_fini_napi(struct efx_nic *efx); 208 static void efx_fini_napi_channel(struct efx_channel *channel); 209 static void efx_fini_struct(struct efx_nic *efx); 210 static void efx_start_all(struct efx_nic *efx); 211 static void efx_stop_all(struct efx_nic *efx); 212 213 #define EFX_ASSERT_RESET_SERIALISED(efx) \ 214 do { \ 215 if ((efx->state == STATE_READY) || \ 216 (efx->state == STATE_RECOVERY) || \ 217 (efx->state == STATE_DISABLED)) \ 218 ASSERT_RTNL(); \ 219 } while (0) 220 221 static int efx_check_disabled(struct efx_nic *efx) 222 { 223 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) { 224 netif_err(efx, drv, efx->net_dev, 225 "device is disabled due to earlier errors\n"); 226 return -EIO; 227 } 228 return 0; 229 } 230 231 /************************************************************************** 232 * 233 * Event queue processing 234 * 235 *************************************************************************/ 236 237 /* Process channel's event queue 238 * 239 * This function is responsible for processing the event queue of a 240 * single channel. The caller must guarantee that this function will 241 * never be concurrently called more than once on the same channel, 242 * though different channels may be being processed concurrently. 243 */ 244 static int efx_process_channel(struct efx_channel *channel, int budget) 245 { 246 int spent; 247 248 if (unlikely(!channel->enabled)) 249 return 0; 250 251 spent = efx_nic_process_eventq(channel, budget); 252 if (spent && efx_channel_has_rx_queue(channel)) { 253 struct efx_rx_queue *rx_queue = 254 efx_channel_get_rx_queue(channel); 255 256 efx_rx_flush_packet(channel); 257 efx_fast_push_rx_descriptors(rx_queue, true); 258 } 259 260 return spent; 261 } 262 263 /* NAPI poll handler 264 * 265 * NAPI guarantees serialisation of polls of the same device, which 266 * provides the guarantee required by efx_process_channel(). 267 */ 268 static int efx_poll(struct napi_struct *napi, int budget) 269 { 270 struct efx_channel *channel = 271 container_of(napi, struct efx_channel, napi_str); 272 struct efx_nic *efx = channel->efx; 273 int spent; 274 275 if (!efx_channel_lock_napi(channel)) 276 return budget; 277 278 netif_vdbg(efx, intr, efx->net_dev, 279 "channel %d NAPI poll executing on CPU %d\n", 280 channel->channel, raw_smp_processor_id()); 281 282 spent = efx_process_channel(channel, budget); 283 284 if (spent < budget) { 285 if (efx_channel_has_rx_queue(channel) && 286 efx->irq_rx_adaptive && 287 unlikely(++channel->irq_count == 1000)) { 288 if (unlikely(channel->irq_mod_score < 289 irq_adapt_low_thresh)) { 290 if (channel->irq_moderation > 1) { 291 channel->irq_moderation -= 1; 292 efx->type->push_irq_moderation(channel); 293 } 294 } else if (unlikely(channel->irq_mod_score > 295 irq_adapt_high_thresh)) { 296 if (channel->irq_moderation < 297 efx->irq_rx_moderation) { 298 channel->irq_moderation += 1; 299 efx->type->push_irq_moderation(channel); 300 } 301 } 302 channel->irq_count = 0; 303 channel->irq_mod_score = 0; 304 } 305 306 efx_filter_rfs_expire(channel); 307 308 /* There is no race here; although napi_disable() will 309 * only wait for napi_complete(), this isn't a problem 310 * since efx_nic_eventq_read_ack() will have no effect if 311 * interrupts have already been disabled. 312 */ 313 napi_complete(napi); 314 efx_nic_eventq_read_ack(channel); 315 } 316 317 efx_channel_unlock_napi(channel); 318 return spent; 319 } 320 321 /* Create event queue 322 * Event queue memory allocations are done only once. If the channel 323 * is reset, the memory buffer will be reused; this guards against 324 * errors during channel reset and also simplifies interrupt handling. 325 */ 326 static int efx_probe_eventq(struct efx_channel *channel) 327 { 328 struct efx_nic *efx = channel->efx; 329 unsigned long entries; 330 331 netif_dbg(efx, probe, efx->net_dev, 332 "chan %d create event queue\n", channel->channel); 333 334 /* Build an event queue with room for one event per tx and rx buffer, 335 * plus some extra for link state events and MCDI completions. */ 336 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128); 337 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE); 338 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1; 339 340 return efx_nic_probe_eventq(channel); 341 } 342 343 /* Prepare channel's event queue */ 344 static int efx_init_eventq(struct efx_channel *channel) 345 { 346 struct efx_nic *efx = channel->efx; 347 int rc; 348 349 EFX_WARN_ON_PARANOID(channel->eventq_init); 350 351 netif_dbg(efx, drv, efx->net_dev, 352 "chan %d init event queue\n", channel->channel); 353 354 rc = efx_nic_init_eventq(channel); 355 if (rc == 0) { 356 efx->type->push_irq_moderation(channel); 357 channel->eventq_read_ptr = 0; 358 channel->eventq_init = true; 359 } 360 return rc; 361 } 362 363 /* Enable event queue processing and NAPI */ 364 void efx_start_eventq(struct efx_channel *channel) 365 { 366 netif_dbg(channel->efx, ifup, channel->efx->net_dev, 367 "chan %d start event queue\n", channel->channel); 368 369 /* Make sure the NAPI handler sees the enabled flag set */ 370 channel->enabled = true; 371 smp_wmb(); 372 373 efx_channel_enable(channel); 374 napi_enable(&channel->napi_str); 375 efx_nic_eventq_read_ack(channel); 376 } 377 378 /* Disable event queue processing and NAPI */ 379 void efx_stop_eventq(struct efx_channel *channel) 380 { 381 if (!channel->enabled) 382 return; 383 384 napi_disable(&channel->napi_str); 385 while (!efx_channel_disable(channel)) 386 usleep_range(1000, 20000); 387 channel->enabled = false; 388 } 389 390 static void efx_fini_eventq(struct efx_channel *channel) 391 { 392 if (!channel->eventq_init) 393 return; 394 395 netif_dbg(channel->efx, drv, channel->efx->net_dev, 396 "chan %d fini event queue\n", channel->channel); 397 398 efx_nic_fini_eventq(channel); 399 channel->eventq_init = false; 400 } 401 402 static void efx_remove_eventq(struct efx_channel *channel) 403 { 404 netif_dbg(channel->efx, drv, channel->efx->net_dev, 405 "chan %d remove event queue\n", channel->channel); 406 407 efx_nic_remove_eventq(channel); 408 } 409 410 /************************************************************************** 411 * 412 * Channel handling 413 * 414 *************************************************************************/ 415 416 /* Allocate and initialise a channel structure. */ 417 static struct efx_channel * 418 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel) 419 { 420 struct efx_channel *channel; 421 struct efx_rx_queue *rx_queue; 422 struct efx_tx_queue *tx_queue; 423 int j; 424 425 channel = kzalloc(sizeof(*channel), GFP_KERNEL); 426 if (!channel) 427 return NULL; 428 429 channel->efx = efx; 430 channel->channel = i; 431 channel->type = &efx_default_channel_type; 432 433 for (j = 0; j < EFX_TXQ_TYPES; j++) { 434 tx_queue = &channel->tx_queue[j]; 435 tx_queue->efx = efx; 436 tx_queue->queue = i * EFX_TXQ_TYPES + j; 437 tx_queue->channel = channel; 438 } 439 440 rx_queue = &channel->rx_queue; 441 rx_queue->efx = efx; 442 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 443 (unsigned long)rx_queue); 444 445 return channel; 446 } 447 448 /* Allocate and initialise a channel structure, copying parameters 449 * (but not resources) from an old channel structure. 450 */ 451 static struct efx_channel * 452 efx_copy_channel(const struct efx_channel *old_channel) 453 { 454 struct efx_channel *channel; 455 struct efx_rx_queue *rx_queue; 456 struct efx_tx_queue *tx_queue; 457 int j; 458 459 channel = kmalloc(sizeof(*channel), GFP_KERNEL); 460 if (!channel) 461 return NULL; 462 463 *channel = *old_channel; 464 465 channel->napi_dev = NULL; 466 memset(&channel->eventq, 0, sizeof(channel->eventq)); 467 468 for (j = 0; j < EFX_TXQ_TYPES; j++) { 469 tx_queue = &channel->tx_queue[j]; 470 if (tx_queue->channel) 471 tx_queue->channel = channel; 472 tx_queue->buffer = NULL; 473 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd)); 474 } 475 476 rx_queue = &channel->rx_queue; 477 rx_queue->buffer = NULL; 478 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd)); 479 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 480 (unsigned long)rx_queue); 481 482 return channel; 483 } 484 485 static int efx_probe_channel(struct efx_channel *channel) 486 { 487 struct efx_tx_queue *tx_queue; 488 struct efx_rx_queue *rx_queue; 489 int rc; 490 491 netif_dbg(channel->efx, probe, channel->efx->net_dev, 492 "creating channel %d\n", channel->channel); 493 494 rc = channel->type->pre_probe(channel); 495 if (rc) 496 goto fail; 497 498 rc = efx_probe_eventq(channel); 499 if (rc) 500 goto fail; 501 502 efx_for_each_channel_tx_queue(tx_queue, channel) { 503 rc = efx_probe_tx_queue(tx_queue); 504 if (rc) 505 goto fail; 506 } 507 508 efx_for_each_channel_rx_queue(rx_queue, channel) { 509 rc = efx_probe_rx_queue(rx_queue); 510 if (rc) 511 goto fail; 512 } 513 514 return 0; 515 516 fail: 517 efx_remove_channel(channel); 518 return rc; 519 } 520 521 static void 522 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len) 523 { 524 struct efx_nic *efx = channel->efx; 525 const char *type; 526 int number; 527 528 number = channel->channel; 529 if (efx->tx_channel_offset == 0) { 530 type = ""; 531 } else if (channel->channel < efx->tx_channel_offset) { 532 type = "-rx"; 533 } else { 534 type = "-tx"; 535 number -= efx->tx_channel_offset; 536 } 537 snprintf(buf, len, "%s%s-%d", efx->name, type, number); 538 } 539 540 static void efx_set_channel_names(struct efx_nic *efx) 541 { 542 struct efx_channel *channel; 543 544 efx_for_each_channel(channel, efx) 545 channel->type->get_name(channel, 546 efx->msi_context[channel->channel].name, 547 sizeof(efx->msi_context[0].name)); 548 } 549 550 static int efx_probe_channels(struct efx_nic *efx) 551 { 552 struct efx_channel *channel; 553 int rc; 554 555 /* Restart special buffer allocation */ 556 efx->next_buffer_table = 0; 557 558 /* Probe channels in reverse, so that any 'extra' channels 559 * use the start of the buffer table. This allows the traffic 560 * channels to be resized without moving them or wasting the 561 * entries before them. 562 */ 563 efx_for_each_channel_rev(channel, efx) { 564 rc = efx_probe_channel(channel); 565 if (rc) { 566 netif_err(efx, probe, efx->net_dev, 567 "failed to create channel %d\n", 568 channel->channel); 569 goto fail; 570 } 571 } 572 efx_set_channel_names(efx); 573 574 return 0; 575 576 fail: 577 efx_remove_channels(efx); 578 return rc; 579 } 580 581 /* Channels are shutdown and reinitialised whilst the NIC is running 582 * to propagate configuration changes (mtu, checksum offload), or 583 * to clear hardware error conditions 584 */ 585 static void efx_start_datapath(struct efx_nic *efx) 586 { 587 bool old_rx_scatter = efx->rx_scatter; 588 struct efx_tx_queue *tx_queue; 589 struct efx_rx_queue *rx_queue; 590 struct efx_channel *channel; 591 size_t rx_buf_len; 592 593 /* Calculate the rx buffer allocation parameters required to 594 * support the current MTU, including padding for header 595 * alignment and overruns. 596 */ 597 efx->rx_dma_len = (efx->rx_prefix_size + 598 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + 599 efx->type->rx_buffer_padding); 600 rx_buf_len = (sizeof(struct efx_rx_page_state) + 601 efx->rx_ip_align + efx->rx_dma_len); 602 if (rx_buf_len <= PAGE_SIZE) { 603 efx->rx_scatter = efx->type->always_rx_scatter; 604 efx->rx_buffer_order = 0; 605 } else if (efx->type->can_rx_scatter) { 606 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES); 607 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) + 608 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE, 609 EFX_RX_BUF_ALIGNMENT) > 610 PAGE_SIZE); 611 efx->rx_scatter = true; 612 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE; 613 efx->rx_buffer_order = 0; 614 } else { 615 efx->rx_scatter = false; 616 efx->rx_buffer_order = get_order(rx_buf_len); 617 } 618 619 efx_rx_config_page_split(efx); 620 if (efx->rx_buffer_order) 621 netif_dbg(efx, drv, efx->net_dev, 622 "RX buf len=%u; page order=%u batch=%u\n", 623 efx->rx_dma_len, efx->rx_buffer_order, 624 efx->rx_pages_per_batch); 625 else 626 netif_dbg(efx, drv, efx->net_dev, 627 "RX buf len=%u step=%u bpp=%u; page batch=%u\n", 628 efx->rx_dma_len, efx->rx_page_buf_step, 629 efx->rx_bufs_per_page, efx->rx_pages_per_batch); 630 631 /* RX filters may also have scatter-enabled flags */ 632 if (efx->rx_scatter != old_rx_scatter) 633 efx->type->filter_update_rx_scatter(efx); 634 635 /* We must keep at least one descriptor in a TX ring empty. 636 * We could avoid this when the queue size does not exactly 637 * match the hardware ring size, but it's not that important. 638 * Therefore we stop the queue when one more skb might fill 639 * the ring completely. We wake it when half way back to 640 * empty. 641 */ 642 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx); 643 efx->txq_wake_thresh = efx->txq_stop_thresh / 2; 644 645 /* Initialise the channels */ 646 efx_for_each_channel(channel, efx) { 647 efx_for_each_channel_tx_queue(tx_queue, channel) { 648 efx_init_tx_queue(tx_queue); 649 atomic_inc(&efx->active_queues); 650 } 651 652 efx_for_each_channel_rx_queue(rx_queue, channel) { 653 efx_init_rx_queue(rx_queue); 654 atomic_inc(&efx->active_queues); 655 efx_stop_eventq(channel); 656 efx_fast_push_rx_descriptors(rx_queue, false); 657 efx_start_eventq(channel); 658 } 659 660 WARN_ON(channel->rx_pkt_n_frags); 661 } 662 663 efx_ptp_start_datapath(efx); 664 665 if (netif_device_present(efx->net_dev)) 666 netif_tx_wake_all_queues(efx->net_dev); 667 } 668 669 static void efx_stop_datapath(struct efx_nic *efx) 670 { 671 struct efx_channel *channel; 672 struct efx_tx_queue *tx_queue; 673 struct efx_rx_queue *rx_queue; 674 int rc; 675 676 EFX_ASSERT_RESET_SERIALISED(efx); 677 BUG_ON(efx->port_enabled); 678 679 efx_ptp_stop_datapath(efx); 680 681 /* Stop RX refill */ 682 efx_for_each_channel(channel, efx) { 683 efx_for_each_channel_rx_queue(rx_queue, channel) 684 rx_queue->refill_enabled = false; 685 } 686 687 efx_for_each_channel(channel, efx) { 688 /* RX packet processing is pipelined, so wait for the 689 * NAPI handler to complete. At least event queue 0 690 * might be kept active by non-data events, so don't 691 * use napi_synchronize() but actually disable NAPI 692 * temporarily. 693 */ 694 if (efx_channel_has_rx_queue(channel)) { 695 efx_stop_eventq(channel); 696 efx_start_eventq(channel); 697 } 698 } 699 700 rc = efx->type->fini_dmaq(efx); 701 if (rc && EFX_WORKAROUND_7803(efx)) { 702 /* Schedule a reset to recover from the flush failure. The 703 * descriptor caches reference memory we're about to free, 704 * but falcon_reconfigure_mac_wrapper() won't reconnect 705 * the MACs because of the pending reset. 706 */ 707 netif_err(efx, drv, efx->net_dev, 708 "Resetting to recover from flush failure\n"); 709 efx_schedule_reset(efx, RESET_TYPE_ALL); 710 } else if (rc) { 711 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); 712 } else { 713 netif_dbg(efx, drv, efx->net_dev, 714 "successfully flushed all queues\n"); 715 } 716 717 efx_for_each_channel(channel, efx) { 718 efx_for_each_channel_rx_queue(rx_queue, channel) 719 efx_fini_rx_queue(rx_queue); 720 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 721 efx_fini_tx_queue(tx_queue); 722 } 723 } 724 725 static void efx_remove_channel(struct efx_channel *channel) 726 { 727 struct efx_tx_queue *tx_queue; 728 struct efx_rx_queue *rx_queue; 729 730 netif_dbg(channel->efx, drv, channel->efx->net_dev, 731 "destroy chan %d\n", channel->channel); 732 733 efx_for_each_channel_rx_queue(rx_queue, channel) 734 efx_remove_rx_queue(rx_queue); 735 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 736 efx_remove_tx_queue(tx_queue); 737 efx_remove_eventq(channel); 738 channel->type->post_remove(channel); 739 } 740 741 static void efx_remove_channels(struct efx_nic *efx) 742 { 743 struct efx_channel *channel; 744 745 efx_for_each_channel(channel, efx) 746 efx_remove_channel(channel); 747 } 748 749 int 750 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries) 751 { 752 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; 753 u32 old_rxq_entries, old_txq_entries; 754 unsigned i, next_buffer_table = 0; 755 int rc, rc2; 756 757 rc = efx_check_disabled(efx); 758 if (rc) 759 return rc; 760 761 /* Not all channels should be reallocated. We must avoid 762 * reallocating their buffer table entries. 763 */ 764 efx_for_each_channel(channel, efx) { 765 struct efx_rx_queue *rx_queue; 766 struct efx_tx_queue *tx_queue; 767 768 if (channel->type->copy) 769 continue; 770 next_buffer_table = max(next_buffer_table, 771 channel->eventq.index + 772 channel->eventq.entries); 773 efx_for_each_channel_rx_queue(rx_queue, channel) 774 next_buffer_table = max(next_buffer_table, 775 rx_queue->rxd.index + 776 rx_queue->rxd.entries); 777 efx_for_each_channel_tx_queue(tx_queue, channel) 778 next_buffer_table = max(next_buffer_table, 779 tx_queue->txd.index + 780 tx_queue->txd.entries); 781 } 782 783 efx_device_detach_sync(efx); 784 efx_stop_all(efx); 785 efx_soft_disable_interrupts(efx); 786 787 /* Clone channels (where possible) */ 788 memset(other_channel, 0, sizeof(other_channel)); 789 for (i = 0; i < efx->n_channels; i++) { 790 channel = efx->channel[i]; 791 if (channel->type->copy) 792 channel = channel->type->copy(channel); 793 if (!channel) { 794 rc = -ENOMEM; 795 goto out; 796 } 797 other_channel[i] = channel; 798 } 799 800 /* Swap entry counts and channel pointers */ 801 old_rxq_entries = efx->rxq_entries; 802 old_txq_entries = efx->txq_entries; 803 efx->rxq_entries = rxq_entries; 804 efx->txq_entries = txq_entries; 805 for (i = 0; i < efx->n_channels; i++) { 806 channel = efx->channel[i]; 807 efx->channel[i] = other_channel[i]; 808 other_channel[i] = channel; 809 } 810 811 /* Restart buffer table allocation */ 812 efx->next_buffer_table = next_buffer_table; 813 814 for (i = 0; i < efx->n_channels; i++) { 815 channel = efx->channel[i]; 816 if (!channel->type->copy) 817 continue; 818 rc = efx_probe_channel(channel); 819 if (rc) 820 goto rollback; 821 efx_init_napi_channel(efx->channel[i]); 822 } 823 824 out: 825 /* Destroy unused channel structures */ 826 for (i = 0; i < efx->n_channels; i++) { 827 channel = other_channel[i]; 828 if (channel && channel->type->copy) { 829 efx_fini_napi_channel(channel); 830 efx_remove_channel(channel); 831 kfree(channel); 832 } 833 } 834 835 rc2 = efx_soft_enable_interrupts(efx); 836 if (rc2) { 837 rc = rc ? rc : rc2; 838 netif_err(efx, drv, efx->net_dev, 839 "unable to restart interrupts on channel reallocation\n"); 840 efx_schedule_reset(efx, RESET_TYPE_DISABLE); 841 } else { 842 efx_start_all(efx); 843 netif_device_attach(efx->net_dev); 844 } 845 return rc; 846 847 rollback: 848 /* Swap back */ 849 efx->rxq_entries = old_rxq_entries; 850 efx->txq_entries = old_txq_entries; 851 for (i = 0; i < efx->n_channels; i++) { 852 channel = efx->channel[i]; 853 efx->channel[i] = other_channel[i]; 854 other_channel[i] = channel; 855 } 856 goto out; 857 } 858 859 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue) 860 { 861 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); 862 } 863 864 static const struct efx_channel_type efx_default_channel_type = { 865 .pre_probe = efx_channel_dummy_op_int, 866 .post_remove = efx_channel_dummy_op_void, 867 .get_name = efx_get_channel_name, 868 .copy = efx_copy_channel, 869 .keep_eventq = false, 870 }; 871 872 int efx_channel_dummy_op_int(struct efx_channel *channel) 873 { 874 return 0; 875 } 876 877 void efx_channel_dummy_op_void(struct efx_channel *channel) 878 { 879 } 880 881 /************************************************************************** 882 * 883 * Port handling 884 * 885 **************************************************************************/ 886 887 /* This ensures that the kernel is kept informed (via 888 * netif_carrier_on/off) of the link status, and also maintains the 889 * link status's stop on the port's TX queue. 890 */ 891 void efx_link_status_changed(struct efx_nic *efx) 892 { 893 struct efx_link_state *link_state = &efx->link_state; 894 895 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure 896 * that no events are triggered between unregister_netdev() and the 897 * driver unloading. A more general condition is that NETDEV_CHANGE 898 * can only be generated between NETDEV_UP and NETDEV_DOWN */ 899 if (!netif_running(efx->net_dev)) 900 return; 901 902 if (link_state->up != netif_carrier_ok(efx->net_dev)) { 903 efx->n_link_state_changes++; 904 905 if (link_state->up) 906 netif_carrier_on(efx->net_dev); 907 else 908 netif_carrier_off(efx->net_dev); 909 } 910 911 /* Status message for kernel log */ 912 if (link_state->up) 913 netif_info(efx, link, efx->net_dev, 914 "link up at %uMbps %s-duplex (MTU %d)\n", 915 link_state->speed, link_state->fd ? "full" : "half", 916 efx->net_dev->mtu); 917 else 918 netif_info(efx, link, efx->net_dev, "link down\n"); 919 } 920 921 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising) 922 { 923 efx->link_advertising = advertising; 924 if (advertising) { 925 if (advertising & ADVERTISED_Pause) 926 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX); 927 else 928 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); 929 if (advertising & ADVERTISED_Asym_Pause) 930 efx->wanted_fc ^= EFX_FC_TX; 931 } 932 } 933 934 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc) 935 { 936 efx->wanted_fc = wanted_fc; 937 if (efx->link_advertising) { 938 if (wanted_fc & EFX_FC_RX) 939 efx->link_advertising |= (ADVERTISED_Pause | 940 ADVERTISED_Asym_Pause); 941 else 942 efx->link_advertising &= ~(ADVERTISED_Pause | 943 ADVERTISED_Asym_Pause); 944 if (wanted_fc & EFX_FC_TX) 945 efx->link_advertising ^= ADVERTISED_Asym_Pause; 946 } 947 } 948 949 static void efx_fini_port(struct efx_nic *efx); 950 951 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure 952 * the MAC appropriately. All other PHY configuration changes are pushed 953 * through phy_op->set_settings(), and pushed asynchronously to the MAC 954 * through efx_monitor(). 955 * 956 * Callers must hold the mac_lock 957 */ 958 int __efx_reconfigure_port(struct efx_nic *efx) 959 { 960 enum efx_phy_mode phy_mode; 961 int rc; 962 963 WARN_ON(!mutex_is_locked(&efx->mac_lock)); 964 965 /* Disable PHY transmit in mac level loopbacks */ 966 phy_mode = efx->phy_mode; 967 if (LOOPBACK_INTERNAL(efx)) 968 efx->phy_mode |= PHY_MODE_TX_DISABLED; 969 else 970 efx->phy_mode &= ~PHY_MODE_TX_DISABLED; 971 972 rc = efx->type->reconfigure_port(efx); 973 974 if (rc) 975 efx->phy_mode = phy_mode; 976 977 return rc; 978 } 979 980 /* Reinitialise the MAC to pick up new PHY settings, even if the port is 981 * disabled. */ 982 int efx_reconfigure_port(struct efx_nic *efx) 983 { 984 int rc; 985 986 EFX_ASSERT_RESET_SERIALISED(efx); 987 988 mutex_lock(&efx->mac_lock); 989 rc = __efx_reconfigure_port(efx); 990 mutex_unlock(&efx->mac_lock); 991 992 return rc; 993 } 994 995 /* Asynchronous work item for changing MAC promiscuity and multicast 996 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current 997 * MAC directly. */ 998 static void efx_mac_work(struct work_struct *data) 999 { 1000 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work); 1001 1002 mutex_lock(&efx->mac_lock); 1003 if (efx->port_enabled) 1004 efx->type->reconfigure_mac(efx); 1005 mutex_unlock(&efx->mac_lock); 1006 } 1007 1008 static int efx_probe_port(struct efx_nic *efx) 1009 { 1010 int rc; 1011 1012 netif_dbg(efx, probe, efx->net_dev, "create port\n"); 1013 1014 if (phy_flash_cfg) 1015 efx->phy_mode = PHY_MODE_SPECIAL; 1016 1017 /* Connect up MAC/PHY operations table */ 1018 rc = efx->type->probe_port(efx); 1019 if (rc) 1020 return rc; 1021 1022 /* Initialise MAC address to permanent address */ 1023 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr); 1024 1025 return 0; 1026 } 1027 1028 static int efx_init_port(struct efx_nic *efx) 1029 { 1030 int rc; 1031 1032 netif_dbg(efx, drv, efx->net_dev, "init port\n"); 1033 1034 mutex_lock(&efx->mac_lock); 1035 1036 rc = efx->phy_op->init(efx); 1037 if (rc) 1038 goto fail1; 1039 1040 efx->port_initialized = true; 1041 1042 /* Reconfigure the MAC before creating dma queues (required for 1043 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */ 1044 efx->type->reconfigure_mac(efx); 1045 1046 /* Ensure the PHY advertises the correct flow control settings */ 1047 rc = efx->phy_op->reconfigure(efx); 1048 if (rc) 1049 goto fail2; 1050 1051 mutex_unlock(&efx->mac_lock); 1052 return 0; 1053 1054 fail2: 1055 efx->phy_op->fini(efx); 1056 fail1: 1057 mutex_unlock(&efx->mac_lock); 1058 return rc; 1059 } 1060 1061 static void efx_start_port(struct efx_nic *efx) 1062 { 1063 netif_dbg(efx, ifup, efx->net_dev, "start port\n"); 1064 BUG_ON(efx->port_enabled); 1065 1066 mutex_lock(&efx->mac_lock); 1067 efx->port_enabled = true; 1068 1069 /* Ensure MAC ingress/egress is enabled */ 1070 efx->type->reconfigure_mac(efx); 1071 1072 mutex_unlock(&efx->mac_lock); 1073 } 1074 1075 /* Cancel work for MAC reconfiguration, periodic hardware monitoring 1076 * and the async self-test, wait for them to finish and prevent them 1077 * being scheduled again. This doesn't cover online resets, which 1078 * should only be cancelled when removing the device. 1079 */ 1080 static void efx_stop_port(struct efx_nic *efx) 1081 { 1082 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); 1083 1084 EFX_ASSERT_RESET_SERIALISED(efx); 1085 1086 mutex_lock(&efx->mac_lock); 1087 efx->port_enabled = false; 1088 mutex_unlock(&efx->mac_lock); 1089 1090 /* Serialise against efx_set_multicast_list() */ 1091 netif_addr_lock_bh(efx->net_dev); 1092 netif_addr_unlock_bh(efx->net_dev); 1093 1094 cancel_delayed_work_sync(&efx->monitor_work); 1095 efx_selftest_async_cancel(efx); 1096 cancel_work_sync(&efx->mac_work); 1097 } 1098 1099 static void efx_fini_port(struct efx_nic *efx) 1100 { 1101 netif_dbg(efx, drv, efx->net_dev, "shut down port\n"); 1102 1103 if (!efx->port_initialized) 1104 return; 1105 1106 efx->phy_op->fini(efx); 1107 efx->port_initialized = false; 1108 1109 efx->link_state.up = false; 1110 efx_link_status_changed(efx); 1111 } 1112 1113 static void efx_remove_port(struct efx_nic *efx) 1114 { 1115 netif_dbg(efx, drv, efx->net_dev, "destroying port\n"); 1116 1117 efx->type->remove_port(efx); 1118 } 1119 1120 /************************************************************************** 1121 * 1122 * NIC handling 1123 * 1124 **************************************************************************/ 1125 1126 static LIST_HEAD(efx_primary_list); 1127 static LIST_HEAD(efx_unassociated_list); 1128 1129 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right) 1130 { 1131 return left->type == right->type && 1132 left->vpd_sn && right->vpd_sn && 1133 !strcmp(left->vpd_sn, right->vpd_sn); 1134 } 1135 1136 static void efx_associate(struct efx_nic *efx) 1137 { 1138 struct efx_nic *other, *next; 1139 1140 if (efx->primary == efx) { 1141 /* Adding primary function; look for secondaries */ 1142 1143 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n"); 1144 list_add_tail(&efx->node, &efx_primary_list); 1145 1146 list_for_each_entry_safe(other, next, &efx_unassociated_list, 1147 node) { 1148 if (efx_same_controller(efx, other)) { 1149 list_del(&other->node); 1150 netif_dbg(other, probe, other->net_dev, 1151 "moving to secondary list of %s %s\n", 1152 pci_name(efx->pci_dev), 1153 efx->net_dev->name); 1154 list_add_tail(&other->node, 1155 &efx->secondary_list); 1156 other->primary = efx; 1157 } 1158 } 1159 } else { 1160 /* Adding secondary function; look for primary */ 1161 1162 list_for_each_entry(other, &efx_primary_list, node) { 1163 if (efx_same_controller(efx, other)) { 1164 netif_dbg(efx, probe, efx->net_dev, 1165 "adding to secondary list of %s %s\n", 1166 pci_name(other->pci_dev), 1167 other->net_dev->name); 1168 list_add_tail(&efx->node, 1169 &other->secondary_list); 1170 efx->primary = other; 1171 return; 1172 } 1173 } 1174 1175 netif_dbg(efx, probe, efx->net_dev, 1176 "adding to unassociated list\n"); 1177 list_add_tail(&efx->node, &efx_unassociated_list); 1178 } 1179 } 1180 1181 static void efx_dissociate(struct efx_nic *efx) 1182 { 1183 struct efx_nic *other, *next; 1184 1185 list_del(&efx->node); 1186 efx->primary = NULL; 1187 1188 list_for_each_entry_safe(other, next, &efx->secondary_list, node) { 1189 list_del(&other->node); 1190 netif_dbg(other, probe, other->net_dev, 1191 "moving to unassociated list\n"); 1192 list_add_tail(&other->node, &efx_unassociated_list); 1193 other->primary = NULL; 1194 } 1195 } 1196 1197 /* This configures the PCI device to enable I/O and DMA. */ 1198 static int efx_init_io(struct efx_nic *efx) 1199 { 1200 struct pci_dev *pci_dev = efx->pci_dev; 1201 dma_addr_t dma_mask = efx->type->max_dma_mask; 1202 unsigned int mem_map_size = efx->type->mem_map_size(efx); 1203 int rc; 1204 1205 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); 1206 1207 rc = pci_enable_device(pci_dev); 1208 if (rc) { 1209 netif_err(efx, probe, efx->net_dev, 1210 "failed to enable PCI device\n"); 1211 goto fail1; 1212 } 1213 1214 pci_set_master(pci_dev); 1215 1216 /* Set the PCI DMA mask. Try all possibilities from our 1217 * genuine mask down to 32 bits, because some architectures 1218 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit 1219 * masks event though they reject 46 bit masks. 1220 */ 1221 while (dma_mask > 0x7fffffffUL) { 1222 if (dma_supported(&pci_dev->dev, dma_mask)) { 1223 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask); 1224 if (rc == 0) 1225 break; 1226 } 1227 dma_mask >>= 1; 1228 } 1229 if (rc) { 1230 netif_err(efx, probe, efx->net_dev, 1231 "could not find a suitable DMA mask\n"); 1232 goto fail2; 1233 } 1234 netif_dbg(efx, probe, efx->net_dev, 1235 "using DMA mask %llx\n", (unsigned long long) dma_mask); 1236 1237 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR); 1238 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc"); 1239 if (rc) { 1240 netif_err(efx, probe, efx->net_dev, 1241 "request for memory BAR failed\n"); 1242 rc = -EIO; 1243 goto fail3; 1244 } 1245 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size); 1246 if (!efx->membase) { 1247 netif_err(efx, probe, efx->net_dev, 1248 "could not map memory BAR at %llx+%x\n", 1249 (unsigned long long)efx->membase_phys, mem_map_size); 1250 rc = -ENOMEM; 1251 goto fail4; 1252 } 1253 netif_dbg(efx, probe, efx->net_dev, 1254 "memory BAR at %llx+%x (virtual %p)\n", 1255 (unsigned long long)efx->membase_phys, mem_map_size, 1256 efx->membase); 1257 1258 return 0; 1259 1260 fail4: 1261 pci_release_region(efx->pci_dev, EFX_MEM_BAR); 1262 fail3: 1263 efx->membase_phys = 0; 1264 fail2: 1265 pci_disable_device(efx->pci_dev); 1266 fail1: 1267 return rc; 1268 } 1269 1270 static void efx_fini_io(struct efx_nic *efx) 1271 { 1272 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); 1273 1274 if (efx->membase) { 1275 iounmap(efx->membase); 1276 efx->membase = NULL; 1277 } 1278 1279 if (efx->membase_phys) { 1280 pci_release_region(efx->pci_dev, EFX_MEM_BAR); 1281 efx->membase_phys = 0; 1282 } 1283 1284 pci_disable_device(efx->pci_dev); 1285 } 1286 1287 static unsigned int efx_wanted_parallelism(struct efx_nic *efx) 1288 { 1289 cpumask_var_t thread_mask; 1290 unsigned int count; 1291 int cpu; 1292 1293 if (rss_cpus) { 1294 count = rss_cpus; 1295 } else { 1296 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) { 1297 netif_warn(efx, probe, efx->net_dev, 1298 "RSS disabled due to allocation failure\n"); 1299 return 1; 1300 } 1301 1302 count = 0; 1303 for_each_online_cpu(cpu) { 1304 if (!cpumask_test_cpu(cpu, thread_mask)) { 1305 ++count; 1306 cpumask_or(thread_mask, thread_mask, 1307 topology_thread_cpumask(cpu)); 1308 } 1309 } 1310 1311 free_cpumask_var(thread_mask); 1312 } 1313 1314 /* If RSS is requested for the PF *and* VFs then we can't write RSS 1315 * table entries that are inaccessible to VFs 1316 */ 1317 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 && 1318 count > efx_vf_size(efx)) { 1319 netif_warn(efx, probe, efx->net_dev, 1320 "Reducing number of RSS channels from %u to %u for " 1321 "VF support. Increase vf-msix-limit to use more " 1322 "channels on the PF.\n", 1323 count, efx_vf_size(efx)); 1324 count = efx_vf_size(efx); 1325 } 1326 1327 return count; 1328 } 1329 1330 /* Probe the number and type of interrupts we are able to obtain, and 1331 * the resulting numbers of channels and RX queues. 1332 */ 1333 static int efx_probe_interrupts(struct efx_nic *efx) 1334 { 1335 unsigned int extra_channels = 0; 1336 unsigned int i, j; 1337 int rc; 1338 1339 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) 1340 if (efx->extra_channel_type[i]) 1341 ++extra_channels; 1342 1343 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) { 1344 struct msix_entry xentries[EFX_MAX_CHANNELS]; 1345 unsigned int n_channels; 1346 1347 n_channels = efx_wanted_parallelism(efx); 1348 if (separate_tx_channels) 1349 n_channels *= 2; 1350 n_channels += extra_channels; 1351 n_channels = min(n_channels, efx->max_channels); 1352 1353 for (i = 0; i < n_channels; i++) 1354 xentries[i].entry = i; 1355 rc = pci_enable_msix_range(efx->pci_dev, 1356 xentries, 1, n_channels); 1357 if (rc < 0) { 1358 /* Fall back to single channel MSI */ 1359 efx->interrupt_mode = EFX_INT_MODE_MSI; 1360 netif_err(efx, drv, efx->net_dev, 1361 "could not enable MSI-X\n"); 1362 } else if (rc < n_channels) { 1363 netif_err(efx, drv, efx->net_dev, 1364 "WARNING: Insufficient MSI-X vectors" 1365 " available (%d < %u).\n", rc, n_channels); 1366 netif_err(efx, drv, efx->net_dev, 1367 "WARNING: Performance may be reduced.\n"); 1368 n_channels = rc; 1369 } 1370 1371 if (rc > 0) { 1372 efx->n_channels = n_channels; 1373 if (n_channels > extra_channels) 1374 n_channels -= extra_channels; 1375 if (separate_tx_channels) { 1376 efx->n_tx_channels = max(n_channels / 2, 1U); 1377 efx->n_rx_channels = max(n_channels - 1378 efx->n_tx_channels, 1379 1U); 1380 } else { 1381 efx->n_tx_channels = n_channels; 1382 efx->n_rx_channels = n_channels; 1383 } 1384 for (i = 0; i < efx->n_channels; i++) 1385 efx_get_channel(efx, i)->irq = 1386 xentries[i].vector; 1387 } 1388 } 1389 1390 /* Try single interrupt MSI */ 1391 if (efx->interrupt_mode == EFX_INT_MODE_MSI) { 1392 efx->n_channels = 1; 1393 efx->n_rx_channels = 1; 1394 efx->n_tx_channels = 1; 1395 rc = pci_enable_msi(efx->pci_dev); 1396 if (rc == 0) { 1397 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq; 1398 } else { 1399 netif_err(efx, drv, efx->net_dev, 1400 "could not enable MSI\n"); 1401 efx->interrupt_mode = EFX_INT_MODE_LEGACY; 1402 } 1403 } 1404 1405 /* Assume legacy interrupts */ 1406 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) { 1407 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0); 1408 efx->n_rx_channels = 1; 1409 efx->n_tx_channels = 1; 1410 efx->legacy_irq = efx->pci_dev->irq; 1411 } 1412 1413 /* Assign extra channels if possible */ 1414 j = efx->n_channels; 1415 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) { 1416 if (!efx->extra_channel_type[i]) 1417 continue; 1418 if (efx->interrupt_mode != EFX_INT_MODE_MSIX || 1419 efx->n_channels <= extra_channels) { 1420 efx->extra_channel_type[i]->handle_no_channel(efx); 1421 } else { 1422 --j; 1423 efx_get_channel(efx, j)->type = 1424 efx->extra_channel_type[i]; 1425 } 1426 } 1427 1428 /* RSS might be usable on VFs even if it is disabled on the PF */ 1429 1430 efx->rss_spread = ((efx->n_rx_channels > 1 || 1431 !efx->type->sriov_wanted(efx)) ? 1432 efx->n_rx_channels : efx_vf_size(efx)); 1433 1434 return 0; 1435 } 1436 1437 static int efx_soft_enable_interrupts(struct efx_nic *efx) 1438 { 1439 struct efx_channel *channel, *end_channel; 1440 int rc; 1441 1442 BUG_ON(efx->state == STATE_DISABLED); 1443 1444 efx->irq_soft_enabled = true; 1445 smp_wmb(); 1446 1447 efx_for_each_channel(channel, efx) { 1448 if (!channel->type->keep_eventq) { 1449 rc = efx_init_eventq(channel); 1450 if (rc) 1451 goto fail; 1452 } 1453 efx_start_eventq(channel); 1454 } 1455 1456 efx_mcdi_mode_event(efx); 1457 1458 return 0; 1459 fail: 1460 end_channel = channel; 1461 efx_for_each_channel(channel, efx) { 1462 if (channel == end_channel) 1463 break; 1464 efx_stop_eventq(channel); 1465 if (!channel->type->keep_eventq) 1466 efx_fini_eventq(channel); 1467 } 1468 1469 return rc; 1470 } 1471 1472 static void efx_soft_disable_interrupts(struct efx_nic *efx) 1473 { 1474 struct efx_channel *channel; 1475 1476 if (efx->state == STATE_DISABLED) 1477 return; 1478 1479 efx_mcdi_mode_poll(efx); 1480 1481 efx->irq_soft_enabled = false; 1482 smp_wmb(); 1483 1484 if (efx->legacy_irq) 1485 synchronize_irq(efx->legacy_irq); 1486 1487 efx_for_each_channel(channel, efx) { 1488 if (channel->irq) 1489 synchronize_irq(channel->irq); 1490 1491 efx_stop_eventq(channel); 1492 if (!channel->type->keep_eventq) 1493 efx_fini_eventq(channel); 1494 } 1495 1496 /* Flush the asynchronous MCDI request queue */ 1497 efx_mcdi_flush_async(efx); 1498 } 1499 1500 static int efx_enable_interrupts(struct efx_nic *efx) 1501 { 1502 struct efx_channel *channel, *end_channel; 1503 int rc; 1504 1505 BUG_ON(efx->state == STATE_DISABLED); 1506 1507 if (efx->eeh_disabled_legacy_irq) { 1508 enable_irq(efx->legacy_irq); 1509 efx->eeh_disabled_legacy_irq = false; 1510 } 1511 1512 efx->type->irq_enable_master(efx); 1513 1514 efx_for_each_channel(channel, efx) { 1515 if (channel->type->keep_eventq) { 1516 rc = efx_init_eventq(channel); 1517 if (rc) 1518 goto fail; 1519 } 1520 } 1521 1522 rc = efx_soft_enable_interrupts(efx); 1523 if (rc) 1524 goto fail; 1525 1526 return 0; 1527 1528 fail: 1529 end_channel = channel; 1530 efx_for_each_channel(channel, efx) { 1531 if (channel == end_channel) 1532 break; 1533 if (channel->type->keep_eventq) 1534 efx_fini_eventq(channel); 1535 } 1536 1537 efx->type->irq_disable_non_ev(efx); 1538 1539 return rc; 1540 } 1541 1542 static void efx_disable_interrupts(struct efx_nic *efx) 1543 { 1544 struct efx_channel *channel; 1545 1546 efx_soft_disable_interrupts(efx); 1547 1548 efx_for_each_channel(channel, efx) { 1549 if (channel->type->keep_eventq) 1550 efx_fini_eventq(channel); 1551 } 1552 1553 efx->type->irq_disable_non_ev(efx); 1554 } 1555 1556 static void efx_remove_interrupts(struct efx_nic *efx) 1557 { 1558 struct efx_channel *channel; 1559 1560 /* Remove MSI/MSI-X interrupts */ 1561 efx_for_each_channel(channel, efx) 1562 channel->irq = 0; 1563 pci_disable_msi(efx->pci_dev); 1564 pci_disable_msix(efx->pci_dev); 1565 1566 /* Remove legacy interrupt */ 1567 efx->legacy_irq = 0; 1568 } 1569 1570 static void efx_set_channels(struct efx_nic *efx) 1571 { 1572 struct efx_channel *channel; 1573 struct efx_tx_queue *tx_queue; 1574 1575 efx->tx_channel_offset = 1576 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0; 1577 1578 /* We need to mark which channels really have RX and TX 1579 * queues, and adjust the TX queue numbers if we have separate 1580 * RX-only and TX-only channels. 1581 */ 1582 efx_for_each_channel(channel, efx) { 1583 if (channel->channel < efx->n_rx_channels) 1584 channel->rx_queue.core_index = channel->channel; 1585 else 1586 channel->rx_queue.core_index = -1; 1587 1588 efx_for_each_channel_tx_queue(tx_queue, channel) 1589 tx_queue->queue -= (efx->tx_channel_offset * 1590 EFX_TXQ_TYPES); 1591 } 1592 } 1593 1594 static int efx_probe_nic(struct efx_nic *efx) 1595 { 1596 size_t i; 1597 int rc; 1598 1599 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n"); 1600 1601 /* Carry out hardware-type specific initialisation */ 1602 rc = efx->type->probe(efx); 1603 if (rc) 1604 return rc; 1605 1606 /* Determine the number of channels and queues by trying to hook 1607 * in MSI-X interrupts. */ 1608 rc = efx_probe_interrupts(efx); 1609 if (rc) 1610 goto fail1; 1611 1612 efx_set_channels(efx); 1613 1614 rc = efx->type->dimension_resources(efx); 1615 if (rc) 1616 goto fail2; 1617 1618 if (efx->n_channels > 1) 1619 netdev_rss_key_fill(&efx->rx_hash_key, sizeof(efx->rx_hash_key)); 1620 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++) 1621 efx->rx_indir_table[i] = 1622 ethtool_rxfh_indir_default(i, efx->rss_spread); 1623 1624 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels); 1625 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels); 1626 1627 /* Initialise the interrupt moderation settings */ 1628 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true, 1629 true); 1630 1631 return 0; 1632 1633 fail2: 1634 efx_remove_interrupts(efx); 1635 fail1: 1636 efx->type->remove(efx); 1637 return rc; 1638 } 1639 1640 static void efx_remove_nic(struct efx_nic *efx) 1641 { 1642 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n"); 1643 1644 efx_remove_interrupts(efx); 1645 efx->type->remove(efx); 1646 } 1647 1648 static int efx_probe_filters(struct efx_nic *efx) 1649 { 1650 int rc; 1651 1652 spin_lock_init(&efx->filter_lock); 1653 1654 rc = efx->type->filter_table_probe(efx); 1655 if (rc) 1656 return rc; 1657 1658 #ifdef CONFIG_RFS_ACCEL 1659 if (efx->type->offload_features & NETIF_F_NTUPLE) { 1660 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters, 1661 sizeof(*efx->rps_flow_id), 1662 GFP_KERNEL); 1663 if (!efx->rps_flow_id) { 1664 efx->type->filter_table_remove(efx); 1665 return -ENOMEM; 1666 } 1667 } 1668 #endif 1669 1670 return 0; 1671 } 1672 1673 static void efx_remove_filters(struct efx_nic *efx) 1674 { 1675 #ifdef CONFIG_RFS_ACCEL 1676 kfree(efx->rps_flow_id); 1677 #endif 1678 efx->type->filter_table_remove(efx); 1679 } 1680 1681 static void efx_restore_filters(struct efx_nic *efx) 1682 { 1683 efx->type->filter_table_restore(efx); 1684 } 1685 1686 /************************************************************************** 1687 * 1688 * NIC startup/shutdown 1689 * 1690 *************************************************************************/ 1691 1692 static int efx_probe_all(struct efx_nic *efx) 1693 { 1694 int rc; 1695 1696 rc = efx_probe_nic(efx); 1697 if (rc) { 1698 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n"); 1699 goto fail1; 1700 } 1701 1702 rc = efx_probe_port(efx); 1703 if (rc) { 1704 netif_err(efx, probe, efx->net_dev, "failed to create port\n"); 1705 goto fail2; 1706 } 1707 1708 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT); 1709 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) { 1710 rc = -EINVAL; 1711 goto fail3; 1712 } 1713 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE; 1714 1715 rc = efx_probe_filters(efx); 1716 if (rc) { 1717 netif_err(efx, probe, efx->net_dev, 1718 "failed to create filter tables\n"); 1719 goto fail3; 1720 } 1721 1722 rc = efx_probe_channels(efx); 1723 if (rc) 1724 goto fail4; 1725 1726 return 0; 1727 1728 fail4: 1729 efx_remove_filters(efx); 1730 fail3: 1731 efx_remove_port(efx); 1732 fail2: 1733 efx_remove_nic(efx); 1734 fail1: 1735 return rc; 1736 } 1737 1738 /* If the interface is supposed to be running but is not, start 1739 * the hardware and software data path, regular activity for the port 1740 * (MAC statistics, link polling, etc.) and schedule the port to be 1741 * reconfigured. Interrupts must already be enabled. This function 1742 * is safe to call multiple times, so long as the NIC is not disabled. 1743 * Requires the RTNL lock. 1744 */ 1745 static void efx_start_all(struct efx_nic *efx) 1746 { 1747 EFX_ASSERT_RESET_SERIALISED(efx); 1748 BUG_ON(efx->state == STATE_DISABLED); 1749 1750 /* Check that it is appropriate to restart the interface. All 1751 * of these flags are safe to read under just the rtnl lock */ 1752 if (efx->port_enabled || !netif_running(efx->net_dev) || 1753 efx->reset_pending) 1754 return; 1755 1756 efx_start_port(efx); 1757 efx_start_datapath(efx); 1758 1759 /* Start the hardware monitor if there is one */ 1760 if (efx->type->monitor != NULL) 1761 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1762 efx_monitor_interval); 1763 1764 /* If link state detection is normally event-driven, we have 1765 * to poll now because we could have missed a change 1766 */ 1767 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) { 1768 mutex_lock(&efx->mac_lock); 1769 if (efx->phy_op->poll(efx)) 1770 efx_link_status_changed(efx); 1771 mutex_unlock(&efx->mac_lock); 1772 } 1773 1774 efx->type->start_stats(efx); 1775 efx->type->pull_stats(efx); 1776 spin_lock_bh(&efx->stats_lock); 1777 efx->type->update_stats(efx, NULL, NULL); 1778 spin_unlock_bh(&efx->stats_lock); 1779 } 1780 1781 /* Quiesce the hardware and software data path, and regular activity 1782 * for the port without bringing the link down. Safe to call multiple 1783 * times with the NIC in almost any state, but interrupts should be 1784 * enabled. Requires the RTNL lock. 1785 */ 1786 static void efx_stop_all(struct efx_nic *efx) 1787 { 1788 EFX_ASSERT_RESET_SERIALISED(efx); 1789 1790 /* port_enabled can be read safely under the rtnl lock */ 1791 if (!efx->port_enabled) 1792 return; 1793 1794 /* update stats before we go down so we can accurately count 1795 * rx_nodesc_drops 1796 */ 1797 efx->type->pull_stats(efx); 1798 spin_lock_bh(&efx->stats_lock); 1799 efx->type->update_stats(efx, NULL, NULL); 1800 spin_unlock_bh(&efx->stats_lock); 1801 efx->type->stop_stats(efx); 1802 efx_stop_port(efx); 1803 1804 /* Stop the kernel transmit interface. This is only valid if 1805 * the device is stopped or detached; otherwise the watchdog 1806 * may fire immediately. 1807 */ 1808 WARN_ON(netif_running(efx->net_dev) && 1809 netif_device_present(efx->net_dev)); 1810 netif_tx_disable(efx->net_dev); 1811 1812 efx_stop_datapath(efx); 1813 } 1814 1815 static void efx_remove_all(struct efx_nic *efx) 1816 { 1817 efx_remove_channels(efx); 1818 efx_remove_filters(efx); 1819 efx_remove_port(efx); 1820 efx_remove_nic(efx); 1821 } 1822 1823 /************************************************************************** 1824 * 1825 * Interrupt moderation 1826 * 1827 **************************************************************************/ 1828 1829 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns) 1830 { 1831 if (usecs == 0) 1832 return 0; 1833 if (usecs * 1000 < quantum_ns) 1834 return 1; /* never round down to 0 */ 1835 return usecs * 1000 / quantum_ns; 1836 } 1837 1838 /* Set interrupt moderation parameters */ 1839 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, 1840 unsigned int rx_usecs, bool rx_adaptive, 1841 bool rx_may_override_tx) 1842 { 1843 struct efx_channel *channel; 1844 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max * 1845 efx->timer_quantum_ns, 1846 1000); 1847 unsigned int tx_ticks; 1848 unsigned int rx_ticks; 1849 1850 EFX_ASSERT_RESET_SERIALISED(efx); 1851 1852 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max) 1853 return -EINVAL; 1854 1855 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns); 1856 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns); 1857 1858 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 && 1859 !rx_may_override_tx) { 1860 netif_err(efx, drv, efx->net_dev, "Channels are shared. " 1861 "RX and TX IRQ moderation must be equal\n"); 1862 return -EINVAL; 1863 } 1864 1865 efx->irq_rx_adaptive = rx_adaptive; 1866 efx->irq_rx_moderation = rx_ticks; 1867 efx_for_each_channel(channel, efx) { 1868 if (efx_channel_has_rx_queue(channel)) 1869 channel->irq_moderation = rx_ticks; 1870 else if (efx_channel_has_tx_queues(channel)) 1871 channel->irq_moderation = tx_ticks; 1872 } 1873 1874 return 0; 1875 } 1876 1877 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, 1878 unsigned int *rx_usecs, bool *rx_adaptive) 1879 { 1880 /* We must round up when converting ticks to microseconds 1881 * because we round down when converting the other way. 1882 */ 1883 1884 *rx_adaptive = efx->irq_rx_adaptive; 1885 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation * 1886 efx->timer_quantum_ns, 1887 1000); 1888 1889 /* If channels are shared between RX and TX, so is IRQ 1890 * moderation. Otherwise, IRQ moderation is the same for all 1891 * TX channels and is not adaptive. 1892 */ 1893 if (efx->tx_channel_offset == 0) 1894 *tx_usecs = *rx_usecs; 1895 else 1896 *tx_usecs = DIV_ROUND_UP( 1897 efx->channel[efx->tx_channel_offset]->irq_moderation * 1898 efx->timer_quantum_ns, 1899 1000); 1900 } 1901 1902 /************************************************************************** 1903 * 1904 * Hardware monitor 1905 * 1906 **************************************************************************/ 1907 1908 /* Run periodically off the general workqueue */ 1909 static void efx_monitor(struct work_struct *data) 1910 { 1911 struct efx_nic *efx = container_of(data, struct efx_nic, 1912 monitor_work.work); 1913 1914 netif_vdbg(efx, timer, efx->net_dev, 1915 "hardware monitor executing on CPU %d\n", 1916 raw_smp_processor_id()); 1917 BUG_ON(efx->type->monitor == NULL); 1918 1919 /* If the mac_lock is already held then it is likely a port 1920 * reconfiguration is already in place, which will likely do 1921 * most of the work of monitor() anyway. */ 1922 if (mutex_trylock(&efx->mac_lock)) { 1923 if (efx->port_enabled) 1924 efx->type->monitor(efx); 1925 mutex_unlock(&efx->mac_lock); 1926 } 1927 1928 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1929 efx_monitor_interval); 1930 } 1931 1932 /************************************************************************** 1933 * 1934 * ioctls 1935 * 1936 *************************************************************************/ 1937 1938 /* Net device ioctl 1939 * Context: process, rtnl_lock() held. 1940 */ 1941 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) 1942 { 1943 struct efx_nic *efx = netdev_priv(net_dev); 1944 struct mii_ioctl_data *data = if_mii(ifr); 1945 1946 if (cmd == SIOCSHWTSTAMP) 1947 return efx_ptp_set_ts_config(efx, ifr); 1948 if (cmd == SIOCGHWTSTAMP) 1949 return efx_ptp_get_ts_config(efx, ifr); 1950 1951 /* Convert phy_id from older PRTAD/DEVAD format */ 1952 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) && 1953 (data->phy_id & 0xfc00) == 0x0400) 1954 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400; 1955 1956 return mdio_mii_ioctl(&efx->mdio, data, cmd); 1957 } 1958 1959 /************************************************************************** 1960 * 1961 * NAPI interface 1962 * 1963 **************************************************************************/ 1964 1965 static void efx_init_napi_channel(struct efx_channel *channel) 1966 { 1967 struct efx_nic *efx = channel->efx; 1968 1969 channel->napi_dev = efx->net_dev; 1970 netif_napi_add(channel->napi_dev, &channel->napi_str, 1971 efx_poll, napi_weight); 1972 napi_hash_add(&channel->napi_str); 1973 efx_channel_init_lock(channel); 1974 } 1975 1976 static void efx_init_napi(struct efx_nic *efx) 1977 { 1978 struct efx_channel *channel; 1979 1980 efx_for_each_channel(channel, efx) 1981 efx_init_napi_channel(channel); 1982 } 1983 1984 static void efx_fini_napi_channel(struct efx_channel *channel) 1985 { 1986 if (channel->napi_dev) { 1987 netif_napi_del(&channel->napi_str); 1988 napi_hash_del(&channel->napi_str); 1989 } 1990 channel->napi_dev = NULL; 1991 } 1992 1993 static void efx_fini_napi(struct efx_nic *efx) 1994 { 1995 struct efx_channel *channel; 1996 1997 efx_for_each_channel(channel, efx) 1998 efx_fini_napi_channel(channel); 1999 } 2000 2001 /************************************************************************** 2002 * 2003 * Kernel netpoll interface 2004 * 2005 *************************************************************************/ 2006 2007 #ifdef CONFIG_NET_POLL_CONTROLLER 2008 2009 /* Although in the common case interrupts will be disabled, this is not 2010 * guaranteed. However, all our work happens inside the NAPI callback, 2011 * so no locking is required. 2012 */ 2013 static void efx_netpoll(struct net_device *net_dev) 2014 { 2015 struct efx_nic *efx = netdev_priv(net_dev); 2016 struct efx_channel *channel; 2017 2018 efx_for_each_channel(channel, efx) 2019 efx_schedule_channel(channel); 2020 } 2021 2022 #endif 2023 2024 #ifdef CONFIG_NET_RX_BUSY_POLL 2025 static int efx_busy_poll(struct napi_struct *napi) 2026 { 2027 struct efx_channel *channel = 2028 container_of(napi, struct efx_channel, napi_str); 2029 struct efx_nic *efx = channel->efx; 2030 int budget = 4; 2031 int old_rx_packets, rx_packets; 2032 2033 if (!netif_running(efx->net_dev)) 2034 return LL_FLUSH_FAILED; 2035 2036 if (!efx_channel_lock_poll(channel)) 2037 return LL_FLUSH_BUSY; 2038 2039 old_rx_packets = channel->rx_queue.rx_packets; 2040 efx_process_channel(channel, budget); 2041 2042 rx_packets = channel->rx_queue.rx_packets - old_rx_packets; 2043 2044 /* There is no race condition with NAPI here. 2045 * NAPI will automatically be rescheduled if it yielded during busy 2046 * polling, because it was not able to take the lock and thus returned 2047 * the full budget. 2048 */ 2049 efx_channel_unlock_poll(channel); 2050 2051 return rx_packets; 2052 } 2053 #endif 2054 2055 /************************************************************************** 2056 * 2057 * Kernel net device interface 2058 * 2059 *************************************************************************/ 2060 2061 /* Context: process, rtnl_lock() held. */ 2062 static int efx_net_open(struct net_device *net_dev) 2063 { 2064 struct efx_nic *efx = netdev_priv(net_dev); 2065 int rc; 2066 2067 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n", 2068 raw_smp_processor_id()); 2069 2070 rc = efx_check_disabled(efx); 2071 if (rc) 2072 return rc; 2073 if (efx->phy_mode & PHY_MODE_SPECIAL) 2074 return -EBUSY; 2075 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL)) 2076 return -EIO; 2077 2078 /* Notify the kernel of the link state polled during driver load, 2079 * before the monitor starts running */ 2080 efx_link_status_changed(efx); 2081 2082 efx_start_all(efx); 2083 efx_selftest_async_start(efx); 2084 return 0; 2085 } 2086 2087 /* Context: process, rtnl_lock() held. 2088 * Note that the kernel will ignore our return code; this method 2089 * should really be a void. 2090 */ 2091 static int efx_net_stop(struct net_device *net_dev) 2092 { 2093 struct efx_nic *efx = netdev_priv(net_dev); 2094 2095 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n", 2096 raw_smp_processor_id()); 2097 2098 /* Stop the device and flush all the channels */ 2099 efx_stop_all(efx); 2100 2101 return 0; 2102 } 2103 2104 /* Context: process, dev_base_lock or RTNL held, non-blocking. */ 2105 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, 2106 struct rtnl_link_stats64 *stats) 2107 { 2108 struct efx_nic *efx = netdev_priv(net_dev); 2109 2110 spin_lock_bh(&efx->stats_lock); 2111 efx->type->update_stats(efx, NULL, stats); 2112 spin_unlock_bh(&efx->stats_lock); 2113 2114 return stats; 2115 } 2116 2117 /* Context: netif_tx_lock held, BHs disabled. */ 2118 static void efx_watchdog(struct net_device *net_dev) 2119 { 2120 struct efx_nic *efx = netdev_priv(net_dev); 2121 2122 netif_err(efx, tx_err, efx->net_dev, 2123 "TX stuck with port_enabled=%d: resetting channels\n", 2124 efx->port_enabled); 2125 2126 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG); 2127 } 2128 2129 2130 /* Context: process, rtnl_lock() held. */ 2131 static int efx_change_mtu(struct net_device *net_dev, int new_mtu) 2132 { 2133 struct efx_nic *efx = netdev_priv(net_dev); 2134 int rc; 2135 2136 rc = efx_check_disabled(efx); 2137 if (rc) 2138 return rc; 2139 if (new_mtu > EFX_MAX_MTU) 2140 return -EINVAL; 2141 2142 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); 2143 2144 efx_device_detach_sync(efx); 2145 efx_stop_all(efx); 2146 2147 mutex_lock(&efx->mac_lock); 2148 net_dev->mtu = new_mtu; 2149 efx->type->reconfigure_mac(efx); 2150 mutex_unlock(&efx->mac_lock); 2151 2152 efx_start_all(efx); 2153 netif_device_attach(efx->net_dev); 2154 return 0; 2155 } 2156 2157 static int efx_set_mac_address(struct net_device *net_dev, void *data) 2158 { 2159 struct efx_nic *efx = netdev_priv(net_dev); 2160 struct sockaddr *addr = data; 2161 u8 *new_addr = addr->sa_data; 2162 2163 if (!is_valid_ether_addr(new_addr)) { 2164 netif_err(efx, drv, efx->net_dev, 2165 "invalid ethernet MAC address requested: %pM\n", 2166 new_addr); 2167 return -EADDRNOTAVAIL; 2168 } 2169 2170 ether_addr_copy(net_dev->dev_addr, new_addr); 2171 efx->type->sriov_mac_address_changed(efx); 2172 2173 /* Reconfigure the MAC */ 2174 mutex_lock(&efx->mac_lock); 2175 efx->type->reconfigure_mac(efx); 2176 mutex_unlock(&efx->mac_lock); 2177 2178 return 0; 2179 } 2180 2181 /* Context: netif_addr_lock held, BHs disabled. */ 2182 static void efx_set_rx_mode(struct net_device *net_dev) 2183 { 2184 struct efx_nic *efx = netdev_priv(net_dev); 2185 2186 if (efx->port_enabled) 2187 queue_work(efx->workqueue, &efx->mac_work); 2188 /* Otherwise efx_start_port() will do this */ 2189 } 2190 2191 static int efx_set_features(struct net_device *net_dev, netdev_features_t data) 2192 { 2193 struct efx_nic *efx = netdev_priv(net_dev); 2194 2195 /* If disabling RX n-tuple filtering, clear existing filters */ 2196 if (net_dev->features & ~data & NETIF_F_NTUPLE) 2197 return efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL); 2198 2199 return 0; 2200 } 2201 2202 static const struct net_device_ops efx_farch_netdev_ops = { 2203 .ndo_open = efx_net_open, 2204 .ndo_stop = efx_net_stop, 2205 .ndo_get_stats64 = efx_net_stats, 2206 .ndo_tx_timeout = efx_watchdog, 2207 .ndo_start_xmit = efx_hard_start_xmit, 2208 .ndo_validate_addr = eth_validate_addr, 2209 .ndo_do_ioctl = efx_ioctl, 2210 .ndo_change_mtu = efx_change_mtu, 2211 .ndo_set_mac_address = efx_set_mac_address, 2212 .ndo_set_rx_mode = efx_set_rx_mode, 2213 .ndo_set_features = efx_set_features, 2214 #ifdef CONFIG_SFC_SRIOV 2215 .ndo_set_vf_mac = efx_siena_sriov_set_vf_mac, 2216 .ndo_set_vf_vlan = efx_siena_sriov_set_vf_vlan, 2217 .ndo_set_vf_spoofchk = efx_siena_sriov_set_vf_spoofchk, 2218 .ndo_get_vf_config = efx_siena_sriov_get_vf_config, 2219 #endif 2220 #ifdef CONFIG_NET_POLL_CONTROLLER 2221 .ndo_poll_controller = efx_netpoll, 2222 #endif 2223 .ndo_setup_tc = efx_setup_tc, 2224 #ifdef CONFIG_NET_RX_BUSY_POLL 2225 .ndo_busy_poll = efx_busy_poll, 2226 #endif 2227 #ifdef CONFIG_RFS_ACCEL 2228 .ndo_rx_flow_steer = efx_filter_rfs, 2229 #endif 2230 }; 2231 2232 static const struct net_device_ops efx_ef10_netdev_ops = { 2233 .ndo_open = efx_net_open, 2234 .ndo_stop = efx_net_stop, 2235 .ndo_get_stats64 = efx_net_stats, 2236 .ndo_tx_timeout = efx_watchdog, 2237 .ndo_start_xmit = efx_hard_start_xmit, 2238 .ndo_validate_addr = eth_validate_addr, 2239 .ndo_do_ioctl = efx_ioctl, 2240 .ndo_change_mtu = efx_change_mtu, 2241 .ndo_set_mac_address = efx_set_mac_address, 2242 .ndo_set_rx_mode = efx_set_rx_mode, 2243 .ndo_set_features = efx_set_features, 2244 #ifdef CONFIG_NET_POLL_CONTROLLER 2245 .ndo_poll_controller = efx_netpoll, 2246 #endif 2247 #ifdef CONFIG_NET_RX_BUSY_POLL 2248 .ndo_busy_poll = efx_busy_poll, 2249 #endif 2250 #ifdef CONFIG_RFS_ACCEL 2251 .ndo_rx_flow_steer = efx_filter_rfs, 2252 #endif 2253 }; 2254 2255 static void efx_update_name(struct efx_nic *efx) 2256 { 2257 strcpy(efx->name, efx->net_dev->name); 2258 efx_mtd_rename(efx); 2259 efx_set_channel_names(efx); 2260 } 2261 2262 static int efx_netdev_event(struct notifier_block *this, 2263 unsigned long event, void *ptr) 2264 { 2265 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr); 2266 2267 if ((net_dev->netdev_ops == &efx_farch_netdev_ops || 2268 net_dev->netdev_ops == &efx_ef10_netdev_ops) && 2269 event == NETDEV_CHANGENAME) 2270 efx_update_name(netdev_priv(net_dev)); 2271 2272 return NOTIFY_DONE; 2273 } 2274 2275 static struct notifier_block efx_netdev_notifier = { 2276 .notifier_call = efx_netdev_event, 2277 }; 2278 2279 static ssize_t 2280 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf) 2281 { 2282 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2283 return sprintf(buf, "%d\n", efx->phy_type); 2284 } 2285 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL); 2286 2287 static int efx_register_netdev(struct efx_nic *efx) 2288 { 2289 struct net_device *net_dev = efx->net_dev; 2290 struct efx_channel *channel; 2291 int rc; 2292 2293 net_dev->watchdog_timeo = 5 * HZ; 2294 net_dev->irq = efx->pci_dev->irq; 2295 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) { 2296 net_dev->netdev_ops = &efx_ef10_netdev_ops; 2297 net_dev->priv_flags |= IFF_UNICAST_FLT; 2298 } else { 2299 net_dev->netdev_ops = &efx_farch_netdev_ops; 2300 } 2301 net_dev->ethtool_ops = &efx_ethtool_ops; 2302 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS; 2303 2304 rtnl_lock(); 2305 2306 /* Enable resets to be scheduled and check whether any were 2307 * already requested. If so, the NIC is probably hosed so we 2308 * abort. 2309 */ 2310 efx->state = STATE_READY; 2311 smp_mb(); /* ensure we change state before checking reset_pending */ 2312 if (efx->reset_pending) { 2313 netif_err(efx, probe, efx->net_dev, 2314 "aborting probe due to scheduled reset\n"); 2315 rc = -EIO; 2316 goto fail_locked; 2317 } 2318 2319 rc = dev_alloc_name(net_dev, net_dev->name); 2320 if (rc < 0) 2321 goto fail_locked; 2322 efx_update_name(efx); 2323 2324 /* Always start with carrier off; PHY events will detect the link */ 2325 netif_carrier_off(net_dev); 2326 2327 rc = register_netdevice(net_dev); 2328 if (rc) 2329 goto fail_locked; 2330 2331 efx_for_each_channel(channel, efx) { 2332 struct efx_tx_queue *tx_queue; 2333 efx_for_each_channel_tx_queue(tx_queue, channel) 2334 efx_init_tx_queue_core_txq(tx_queue); 2335 } 2336 2337 efx_associate(efx); 2338 2339 rtnl_unlock(); 2340 2341 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2342 if (rc) { 2343 netif_err(efx, drv, efx->net_dev, 2344 "failed to init net dev attributes\n"); 2345 goto fail_registered; 2346 } 2347 2348 return 0; 2349 2350 fail_registered: 2351 rtnl_lock(); 2352 efx_dissociate(efx); 2353 unregister_netdevice(net_dev); 2354 fail_locked: 2355 efx->state = STATE_UNINIT; 2356 rtnl_unlock(); 2357 netif_err(efx, drv, efx->net_dev, "could not register net dev\n"); 2358 return rc; 2359 } 2360 2361 static void efx_unregister_netdev(struct efx_nic *efx) 2362 { 2363 if (!efx->net_dev) 2364 return; 2365 2366 BUG_ON(netdev_priv(efx->net_dev) != efx); 2367 2368 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name)); 2369 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2370 2371 rtnl_lock(); 2372 unregister_netdevice(efx->net_dev); 2373 efx->state = STATE_UNINIT; 2374 rtnl_unlock(); 2375 } 2376 2377 /************************************************************************** 2378 * 2379 * Device reset and suspend 2380 * 2381 **************************************************************************/ 2382 2383 /* Tears down the entire software state and most of the hardware state 2384 * before reset. */ 2385 void efx_reset_down(struct efx_nic *efx, enum reset_type method) 2386 { 2387 EFX_ASSERT_RESET_SERIALISED(efx); 2388 2389 if (method == RESET_TYPE_MCDI_TIMEOUT) 2390 efx->type->prepare_flr(efx); 2391 2392 efx_stop_all(efx); 2393 efx_disable_interrupts(efx); 2394 2395 mutex_lock(&efx->mac_lock); 2396 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) 2397 efx->phy_op->fini(efx); 2398 efx->type->fini(efx); 2399 } 2400 2401 /* This function will always ensure that the locks acquired in 2402 * efx_reset_down() are released. A failure return code indicates 2403 * that we were unable to reinitialise the hardware, and the 2404 * driver should be disabled. If ok is false, then the rx and tx 2405 * engines are not restarted, pending a RESET_DISABLE. */ 2406 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok) 2407 { 2408 int rc; 2409 2410 EFX_ASSERT_RESET_SERIALISED(efx); 2411 2412 if (method == RESET_TYPE_MCDI_TIMEOUT) 2413 efx->type->finish_flr(efx); 2414 2415 /* Ensure that SRAM is initialised even if we're disabling the device */ 2416 rc = efx->type->init(efx); 2417 if (rc) { 2418 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); 2419 goto fail; 2420 } 2421 2422 if (!ok) 2423 goto fail; 2424 2425 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) { 2426 rc = efx->phy_op->init(efx); 2427 if (rc) 2428 goto fail; 2429 if (efx->phy_op->reconfigure(efx)) 2430 netif_err(efx, drv, efx->net_dev, 2431 "could not restore PHY settings\n"); 2432 } 2433 2434 rc = efx_enable_interrupts(efx); 2435 if (rc) 2436 goto fail; 2437 efx_restore_filters(efx); 2438 efx->type->sriov_reset(efx); 2439 2440 mutex_unlock(&efx->mac_lock); 2441 2442 efx_start_all(efx); 2443 2444 return 0; 2445 2446 fail: 2447 efx->port_initialized = false; 2448 2449 mutex_unlock(&efx->mac_lock); 2450 2451 return rc; 2452 } 2453 2454 /* Reset the NIC using the specified method. Note that the reset may 2455 * fail, in which case the card will be left in an unusable state. 2456 * 2457 * Caller must hold the rtnl_lock. 2458 */ 2459 int efx_reset(struct efx_nic *efx, enum reset_type method) 2460 { 2461 int rc, rc2; 2462 bool disabled; 2463 2464 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", 2465 RESET_TYPE(method)); 2466 2467 efx_device_detach_sync(efx); 2468 efx_reset_down(efx, method); 2469 2470 rc = efx->type->reset(efx, method); 2471 if (rc) { 2472 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); 2473 goto out; 2474 } 2475 2476 /* Clear flags for the scopes we covered. We assume the NIC and 2477 * driver are now quiescent so that there is no race here. 2478 */ 2479 if (method < RESET_TYPE_MAX_METHOD) 2480 efx->reset_pending &= -(1 << (method + 1)); 2481 else /* it doesn't fit into the well-ordered scope hierarchy */ 2482 __clear_bit(method, &efx->reset_pending); 2483 2484 /* Reinitialise bus-mastering, which may have been turned off before 2485 * the reset was scheduled. This is still appropriate, even in the 2486 * RESET_TYPE_DISABLE since this driver generally assumes the hardware 2487 * can respond to requests. */ 2488 pci_set_master(efx->pci_dev); 2489 2490 out: 2491 /* Leave device stopped if necessary */ 2492 disabled = rc || 2493 method == RESET_TYPE_DISABLE || 2494 method == RESET_TYPE_RECOVER_OR_DISABLE; 2495 rc2 = efx_reset_up(efx, method, !disabled); 2496 if (rc2) { 2497 disabled = true; 2498 if (!rc) 2499 rc = rc2; 2500 } 2501 2502 if (disabled) { 2503 dev_close(efx->net_dev); 2504 netif_err(efx, drv, efx->net_dev, "has been disabled\n"); 2505 efx->state = STATE_DISABLED; 2506 } else { 2507 netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); 2508 netif_device_attach(efx->net_dev); 2509 } 2510 return rc; 2511 } 2512 2513 /* Try recovery mechanisms. 2514 * For now only EEH is supported. 2515 * Returns 0 if the recovery mechanisms are unsuccessful. 2516 * Returns a non-zero value otherwise. 2517 */ 2518 int efx_try_recovery(struct efx_nic *efx) 2519 { 2520 #ifdef CONFIG_EEH 2521 /* A PCI error can occur and not be seen by EEH because nothing 2522 * happens on the PCI bus. In this case the driver may fail and 2523 * schedule a 'recover or reset', leading to this recovery handler. 2524 * Manually call the eeh failure check function. 2525 */ 2526 struct eeh_dev *eehdev = 2527 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev)); 2528 2529 if (eeh_dev_check_failure(eehdev)) { 2530 /* The EEH mechanisms will handle the error and reset the 2531 * device if necessary. 2532 */ 2533 return 1; 2534 } 2535 #endif 2536 return 0; 2537 } 2538 2539 static void efx_wait_for_bist_end(struct efx_nic *efx) 2540 { 2541 int i; 2542 2543 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) { 2544 if (efx_mcdi_poll_reboot(efx)) 2545 goto out; 2546 msleep(BIST_WAIT_DELAY_MS); 2547 } 2548 2549 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n"); 2550 out: 2551 /* Either way unset the BIST flag. If we found no reboot we probably 2552 * won't recover, but we should try. 2553 */ 2554 efx->mc_bist_for_other_fn = false; 2555 } 2556 2557 /* The worker thread exists so that code that cannot sleep can 2558 * schedule a reset for later. 2559 */ 2560 static void efx_reset_work(struct work_struct *data) 2561 { 2562 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); 2563 unsigned long pending; 2564 enum reset_type method; 2565 2566 pending = ACCESS_ONCE(efx->reset_pending); 2567 method = fls(pending) - 1; 2568 2569 if (method == RESET_TYPE_MC_BIST) 2570 efx_wait_for_bist_end(efx); 2571 2572 if ((method == RESET_TYPE_RECOVER_OR_DISABLE || 2573 method == RESET_TYPE_RECOVER_OR_ALL) && 2574 efx_try_recovery(efx)) 2575 return; 2576 2577 if (!pending) 2578 return; 2579 2580 rtnl_lock(); 2581 2582 /* We checked the state in efx_schedule_reset() but it may 2583 * have changed by now. Now that we have the RTNL lock, 2584 * it cannot change again. 2585 */ 2586 if (efx->state == STATE_READY) 2587 (void)efx_reset(efx, method); 2588 2589 rtnl_unlock(); 2590 } 2591 2592 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) 2593 { 2594 enum reset_type method; 2595 2596 if (efx->state == STATE_RECOVERY) { 2597 netif_dbg(efx, drv, efx->net_dev, 2598 "recovering: skip scheduling %s reset\n", 2599 RESET_TYPE(type)); 2600 return; 2601 } 2602 2603 switch (type) { 2604 case RESET_TYPE_INVISIBLE: 2605 case RESET_TYPE_ALL: 2606 case RESET_TYPE_RECOVER_OR_ALL: 2607 case RESET_TYPE_WORLD: 2608 case RESET_TYPE_DISABLE: 2609 case RESET_TYPE_RECOVER_OR_DISABLE: 2610 case RESET_TYPE_MC_BIST: 2611 case RESET_TYPE_MCDI_TIMEOUT: 2612 method = type; 2613 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", 2614 RESET_TYPE(method)); 2615 break; 2616 default: 2617 method = efx->type->map_reset_reason(type); 2618 netif_dbg(efx, drv, efx->net_dev, 2619 "scheduling %s reset for %s\n", 2620 RESET_TYPE(method), RESET_TYPE(type)); 2621 break; 2622 } 2623 2624 set_bit(method, &efx->reset_pending); 2625 smp_mb(); /* ensure we change reset_pending before checking state */ 2626 2627 /* If we're not READY then just leave the flags set as the cue 2628 * to abort probing or reschedule the reset later. 2629 */ 2630 if (ACCESS_ONCE(efx->state) != STATE_READY) 2631 return; 2632 2633 /* efx_process_channel() will no longer read events once a 2634 * reset is scheduled. So switch back to poll'd MCDI completions. */ 2635 efx_mcdi_mode_poll(efx); 2636 2637 queue_work(reset_workqueue, &efx->reset_work); 2638 } 2639 2640 /************************************************************************** 2641 * 2642 * List of NICs we support 2643 * 2644 **************************************************************************/ 2645 2646 /* PCI device ID table */ 2647 static const struct pci_device_id efx_pci_table[] = { 2648 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2649 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0), 2650 .driver_data = (unsigned long) &falcon_a1_nic_type}, 2651 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2652 PCI_DEVICE_ID_SOLARFLARE_SFC4000B), 2653 .driver_data = (unsigned long) &falcon_b0_nic_type}, 2654 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */ 2655 .driver_data = (unsigned long) &siena_a0_nic_type}, 2656 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */ 2657 .driver_data = (unsigned long) &siena_a0_nic_type}, 2658 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */ 2659 .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, 2660 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */ 2661 .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, 2662 {0} /* end of list */ 2663 }; 2664 2665 /************************************************************************** 2666 * 2667 * Dummy PHY/MAC operations 2668 * 2669 * Can be used for some unimplemented operations 2670 * Needed so all function pointers are valid and do not have to be tested 2671 * before use 2672 * 2673 **************************************************************************/ 2674 int efx_port_dummy_op_int(struct efx_nic *efx) 2675 { 2676 return 0; 2677 } 2678 void efx_port_dummy_op_void(struct efx_nic *efx) {} 2679 2680 static bool efx_port_dummy_op_poll(struct efx_nic *efx) 2681 { 2682 return false; 2683 } 2684 2685 static const struct efx_phy_operations efx_dummy_phy_operations = { 2686 .init = efx_port_dummy_op_int, 2687 .reconfigure = efx_port_dummy_op_int, 2688 .poll = efx_port_dummy_op_poll, 2689 .fini = efx_port_dummy_op_void, 2690 }; 2691 2692 /************************************************************************** 2693 * 2694 * Data housekeeping 2695 * 2696 **************************************************************************/ 2697 2698 /* This zeroes out and then fills in the invariants in a struct 2699 * efx_nic (including all sub-structures). 2700 */ 2701 static int efx_init_struct(struct efx_nic *efx, 2702 struct pci_dev *pci_dev, struct net_device *net_dev) 2703 { 2704 int i; 2705 2706 /* Initialise common structures */ 2707 INIT_LIST_HEAD(&efx->node); 2708 INIT_LIST_HEAD(&efx->secondary_list); 2709 spin_lock_init(&efx->biu_lock); 2710 #ifdef CONFIG_SFC_MTD 2711 INIT_LIST_HEAD(&efx->mtd_list); 2712 #endif 2713 INIT_WORK(&efx->reset_work, efx_reset_work); 2714 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor); 2715 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work); 2716 efx->pci_dev = pci_dev; 2717 efx->msg_enable = debug; 2718 efx->state = STATE_UNINIT; 2719 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); 2720 2721 efx->net_dev = net_dev; 2722 efx->rx_prefix_size = efx->type->rx_prefix_size; 2723 efx->rx_ip_align = 2724 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0; 2725 efx->rx_packet_hash_offset = 2726 efx->type->rx_hash_offset - efx->type->rx_prefix_size; 2727 efx->rx_packet_ts_offset = 2728 efx->type->rx_ts_offset - efx->type->rx_prefix_size; 2729 spin_lock_init(&efx->stats_lock); 2730 mutex_init(&efx->mac_lock); 2731 efx->phy_op = &efx_dummy_phy_operations; 2732 efx->mdio.dev = net_dev; 2733 INIT_WORK(&efx->mac_work, efx_mac_work); 2734 init_waitqueue_head(&efx->flush_wq); 2735 2736 for (i = 0; i < EFX_MAX_CHANNELS; i++) { 2737 efx->channel[i] = efx_alloc_channel(efx, i, NULL); 2738 if (!efx->channel[i]) 2739 goto fail; 2740 efx->msi_context[i].efx = efx; 2741 efx->msi_context[i].index = i; 2742 } 2743 2744 /* Higher numbered interrupt modes are less capable! */ 2745 efx->interrupt_mode = max(efx->type->max_interrupt_mode, 2746 interrupt_mode); 2747 2748 /* Would be good to use the net_dev name, but we're too early */ 2749 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", 2750 pci_name(pci_dev)); 2751 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); 2752 if (!efx->workqueue) 2753 goto fail; 2754 2755 return 0; 2756 2757 fail: 2758 efx_fini_struct(efx); 2759 return -ENOMEM; 2760 } 2761 2762 static void efx_fini_struct(struct efx_nic *efx) 2763 { 2764 int i; 2765 2766 for (i = 0; i < EFX_MAX_CHANNELS; i++) 2767 kfree(efx->channel[i]); 2768 2769 kfree(efx->vpd_sn); 2770 2771 if (efx->workqueue) { 2772 destroy_workqueue(efx->workqueue); 2773 efx->workqueue = NULL; 2774 } 2775 } 2776 2777 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats) 2778 { 2779 u64 n_rx_nodesc_trunc = 0; 2780 struct efx_channel *channel; 2781 2782 efx_for_each_channel(channel, efx) 2783 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc; 2784 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc; 2785 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops); 2786 } 2787 2788 /************************************************************************** 2789 * 2790 * PCI interface 2791 * 2792 **************************************************************************/ 2793 2794 /* Main body of final NIC shutdown code 2795 * This is called only at module unload (or hotplug removal). 2796 */ 2797 static void efx_pci_remove_main(struct efx_nic *efx) 2798 { 2799 /* Flush reset_work. It can no longer be scheduled since we 2800 * are not READY. 2801 */ 2802 BUG_ON(efx->state == STATE_READY); 2803 cancel_work_sync(&efx->reset_work); 2804 2805 efx_disable_interrupts(efx); 2806 efx_nic_fini_interrupt(efx); 2807 efx_fini_port(efx); 2808 efx->type->fini(efx); 2809 efx_fini_napi(efx); 2810 efx_remove_all(efx); 2811 } 2812 2813 /* Final NIC shutdown 2814 * This is called only at module unload (or hotplug removal). 2815 */ 2816 static void efx_pci_remove(struct pci_dev *pci_dev) 2817 { 2818 struct efx_nic *efx; 2819 2820 efx = pci_get_drvdata(pci_dev); 2821 if (!efx) 2822 return; 2823 2824 /* Mark the NIC as fini, then stop the interface */ 2825 rtnl_lock(); 2826 efx_dissociate(efx); 2827 dev_close(efx->net_dev); 2828 efx_disable_interrupts(efx); 2829 rtnl_unlock(); 2830 2831 efx->type->sriov_fini(efx); 2832 efx_unregister_netdev(efx); 2833 2834 efx_mtd_remove(efx); 2835 2836 efx_pci_remove_main(efx); 2837 2838 efx_fini_io(efx); 2839 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n"); 2840 2841 efx_fini_struct(efx); 2842 free_netdev(efx->net_dev); 2843 2844 pci_disable_pcie_error_reporting(pci_dev); 2845 }; 2846 2847 /* NIC VPD information 2848 * Called during probe to display the part number of the 2849 * installed NIC. VPD is potentially very large but this should 2850 * always appear within the first 512 bytes. 2851 */ 2852 #define SFC_VPD_LEN 512 2853 static void efx_probe_vpd_strings(struct efx_nic *efx) 2854 { 2855 struct pci_dev *dev = efx->pci_dev; 2856 char vpd_data[SFC_VPD_LEN]; 2857 ssize_t vpd_size; 2858 int ro_start, ro_size, i, j; 2859 2860 /* Get the vpd data from the device */ 2861 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data); 2862 if (vpd_size <= 0) { 2863 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n"); 2864 return; 2865 } 2866 2867 /* Get the Read only section */ 2868 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA); 2869 if (ro_start < 0) { 2870 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n"); 2871 return; 2872 } 2873 2874 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); 2875 j = ro_size; 2876 i = ro_start + PCI_VPD_LRDT_TAG_SIZE; 2877 if (i + j > vpd_size) 2878 j = vpd_size - i; 2879 2880 /* Get the Part number */ 2881 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN"); 2882 if (i < 0) { 2883 netif_err(efx, drv, efx->net_dev, "Part number not found\n"); 2884 return; 2885 } 2886 2887 j = pci_vpd_info_field_size(&vpd_data[i]); 2888 i += PCI_VPD_INFO_FLD_HDR_SIZE; 2889 if (i + j > vpd_size) { 2890 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n"); 2891 return; 2892 } 2893 2894 netif_info(efx, drv, efx->net_dev, 2895 "Part Number : %.*s\n", j, &vpd_data[i]); 2896 2897 i = ro_start + PCI_VPD_LRDT_TAG_SIZE; 2898 j = ro_size; 2899 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN"); 2900 if (i < 0) { 2901 netif_err(efx, drv, efx->net_dev, "Serial number not found\n"); 2902 return; 2903 } 2904 2905 j = pci_vpd_info_field_size(&vpd_data[i]); 2906 i += PCI_VPD_INFO_FLD_HDR_SIZE; 2907 if (i + j > vpd_size) { 2908 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n"); 2909 return; 2910 } 2911 2912 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL); 2913 if (!efx->vpd_sn) 2914 return; 2915 2916 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]); 2917 } 2918 2919 2920 /* Main body of NIC initialisation 2921 * This is called at module load (or hotplug insertion, theoretically). 2922 */ 2923 static int efx_pci_probe_main(struct efx_nic *efx) 2924 { 2925 int rc; 2926 2927 /* Do start-of-day initialisation */ 2928 rc = efx_probe_all(efx); 2929 if (rc) 2930 goto fail1; 2931 2932 efx_init_napi(efx); 2933 2934 rc = efx->type->init(efx); 2935 if (rc) { 2936 netif_err(efx, probe, efx->net_dev, 2937 "failed to initialise NIC\n"); 2938 goto fail3; 2939 } 2940 2941 rc = efx_init_port(efx); 2942 if (rc) { 2943 netif_err(efx, probe, efx->net_dev, 2944 "failed to initialise port\n"); 2945 goto fail4; 2946 } 2947 2948 rc = efx_nic_init_interrupt(efx); 2949 if (rc) 2950 goto fail5; 2951 rc = efx_enable_interrupts(efx); 2952 if (rc) 2953 goto fail6; 2954 2955 return 0; 2956 2957 fail6: 2958 efx_nic_fini_interrupt(efx); 2959 fail5: 2960 efx_fini_port(efx); 2961 fail4: 2962 efx->type->fini(efx); 2963 fail3: 2964 efx_fini_napi(efx); 2965 efx_remove_all(efx); 2966 fail1: 2967 return rc; 2968 } 2969 2970 /* NIC initialisation 2971 * 2972 * This is called at module load (or hotplug insertion, 2973 * theoretically). It sets up PCI mappings, resets the NIC, 2974 * sets up and registers the network devices with the kernel and hooks 2975 * the interrupt service routine. It does not prepare the device for 2976 * transmission; this is left to the first time one of the network 2977 * interfaces is brought up (i.e. efx_net_open). 2978 */ 2979 static int efx_pci_probe(struct pci_dev *pci_dev, 2980 const struct pci_device_id *entry) 2981 { 2982 struct net_device *net_dev; 2983 struct efx_nic *efx; 2984 int rc; 2985 2986 /* Allocate and initialise a struct net_device and struct efx_nic */ 2987 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES, 2988 EFX_MAX_RX_QUEUES); 2989 if (!net_dev) 2990 return -ENOMEM; 2991 efx = netdev_priv(net_dev); 2992 efx->type = (const struct efx_nic_type *) entry->driver_data; 2993 net_dev->features |= (efx->type->offload_features | NETIF_F_SG | 2994 NETIF_F_HIGHDMA | NETIF_F_TSO | 2995 NETIF_F_RXCSUM); 2996 if (efx->type->offload_features & NETIF_F_V6_CSUM) 2997 net_dev->features |= NETIF_F_TSO6; 2998 /* Mask for features that also apply to VLAN devices */ 2999 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG | 3000 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO | 3001 NETIF_F_RXCSUM); 3002 /* All offloads can be toggled */ 3003 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA; 3004 pci_set_drvdata(pci_dev, efx); 3005 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 3006 rc = efx_init_struct(efx, pci_dev, net_dev); 3007 if (rc) 3008 goto fail1; 3009 3010 netif_info(efx, probe, efx->net_dev, 3011 "Solarflare NIC detected\n"); 3012 3013 efx_probe_vpd_strings(efx); 3014 3015 /* Set up basic I/O (BAR mappings etc) */ 3016 rc = efx_init_io(efx); 3017 if (rc) 3018 goto fail2; 3019 3020 rc = efx_pci_probe_main(efx); 3021 if (rc) 3022 goto fail3; 3023 3024 rc = efx_register_netdev(efx); 3025 if (rc) 3026 goto fail4; 3027 3028 rc = efx->type->sriov_init(efx); 3029 if (rc) 3030 netif_err(efx, probe, efx->net_dev, 3031 "SR-IOV can't be enabled rc %d\n", rc); 3032 3033 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n"); 3034 3035 /* Try to create MTDs, but allow this to fail */ 3036 rtnl_lock(); 3037 rc = efx_mtd_probe(efx); 3038 rtnl_unlock(); 3039 if (rc) 3040 netif_warn(efx, probe, efx->net_dev, 3041 "failed to create MTDs (%d)\n", rc); 3042 3043 rc = pci_enable_pcie_error_reporting(pci_dev); 3044 if (rc && rc != -EINVAL) 3045 netif_warn(efx, probe, efx->net_dev, 3046 "pci_enable_pcie_error_reporting failed (%d)\n", rc); 3047 3048 return 0; 3049 3050 fail4: 3051 efx_pci_remove_main(efx); 3052 fail3: 3053 efx_fini_io(efx); 3054 fail2: 3055 efx_fini_struct(efx); 3056 fail1: 3057 WARN_ON(rc > 0); 3058 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc); 3059 free_netdev(net_dev); 3060 return rc; 3061 } 3062 3063 static int efx_pm_freeze(struct device *dev) 3064 { 3065 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 3066 3067 rtnl_lock(); 3068 3069 if (efx->state != STATE_DISABLED) { 3070 efx->state = STATE_UNINIT; 3071 3072 efx_device_detach_sync(efx); 3073 3074 efx_stop_all(efx); 3075 efx_disable_interrupts(efx); 3076 } 3077 3078 rtnl_unlock(); 3079 3080 return 0; 3081 } 3082 3083 static int efx_pm_thaw(struct device *dev) 3084 { 3085 int rc; 3086 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 3087 3088 rtnl_lock(); 3089 3090 if (efx->state != STATE_DISABLED) { 3091 rc = efx_enable_interrupts(efx); 3092 if (rc) 3093 goto fail; 3094 3095 mutex_lock(&efx->mac_lock); 3096 efx->phy_op->reconfigure(efx); 3097 mutex_unlock(&efx->mac_lock); 3098 3099 efx_start_all(efx); 3100 3101 netif_device_attach(efx->net_dev); 3102 3103 efx->state = STATE_READY; 3104 3105 efx->type->resume_wol(efx); 3106 } 3107 3108 rtnl_unlock(); 3109 3110 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */ 3111 queue_work(reset_workqueue, &efx->reset_work); 3112 3113 return 0; 3114 3115 fail: 3116 rtnl_unlock(); 3117 3118 return rc; 3119 } 3120 3121 static int efx_pm_poweroff(struct device *dev) 3122 { 3123 struct pci_dev *pci_dev = to_pci_dev(dev); 3124 struct efx_nic *efx = pci_get_drvdata(pci_dev); 3125 3126 efx->type->fini(efx); 3127 3128 efx->reset_pending = 0; 3129 3130 pci_save_state(pci_dev); 3131 return pci_set_power_state(pci_dev, PCI_D3hot); 3132 } 3133 3134 /* Used for both resume and restore */ 3135 static int efx_pm_resume(struct device *dev) 3136 { 3137 struct pci_dev *pci_dev = to_pci_dev(dev); 3138 struct efx_nic *efx = pci_get_drvdata(pci_dev); 3139 int rc; 3140 3141 rc = pci_set_power_state(pci_dev, PCI_D0); 3142 if (rc) 3143 return rc; 3144 pci_restore_state(pci_dev); 3145 rc = pci_enable_device(pci_dev); 3146 if (rc) 3147 return rc; 3148 pci_set_master(efx->pci_dev); 3149 rc = efx->type->reset(efx, RESET_TYPE_ALL); 3150 if (rc) 3151 return rc; 3152 rc = efx->type->init(efx); 3153 if (rc) 3154 return rc; 3155 rc = efx_pm_thaw(dev); 3156 return rc; 3157 } 3158 3159 static int efx_pm_suspend(struct device *dev) 3160 { 3161 int rc; 3162 3163 efx_pm_freeze(dev); 3164 rc = efx_pm_poweroff(dev); 3165 if (rc) 3166 efx_pm_resume(dev); 3167 return rc; 3168 } 3169 3170 static const struct dev_pm_ops efx_pm_ops = { 3171 .suspend = efx_pm_suspend, 3172 .resume = efx_pm_resume, 3173 .freeze = efx_pm_freeze, 3174 .thaw = efx_pm_thaw, 3175 .poweroff = efx_pm_poweroff, 3176 .restore = efx_pm_resume, 3177 }; 3178 3179 /* A PCI error affecting this device was detected. 3180 * At this point MMIO and DMA may be disabled. 3181 * Stop the software path and request a slot reset. 3182 */ 3183 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev, 3184 enum pci_channel_state state) 3185 { 3186 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 3187 struct efx_nic *efx = pci_get_drvdata(pdev); 3188 3189 if (state == pci_channel_io_perm_failure) 3190 return PCI_ERS_RESULT_DISCONNECT; 3191 3192 rtnl_lock(); 3193 3194 if (efx->state != STATE_DISABLED) { 3195 efx->state = STATE_RECOVERY; 3196 efx->reset_pending = 0; 3197 3198 efx_device_detach_sync(efx); 3199 3200 efx_stop_all(efx); 3201 efx_disable_interrupts(efx); 3202 3203 status = PCI_ERS_RESULT_NEED_RESET; 3204 } else { 3205 /* If the interface is disabled we don't want to do anything 3206 * with it. 3207 */ 3208 status = PCI_ERS_RESULT_RECOVERED; 3209 } 3210 3211 rtnl_unlock(); 3212 3213 pci_disable_device(pdev); 3214 3215 return status; 3216 } 3217 3218 /* Fake a successfull reset, which will be performed later in efx_io_resume. */ 3219 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev) 3220 { 3221 struct efx_nic *efx = pci_get_drvdata(pdev); 3222 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 3223 int rc; 3224 3225 if (pci_enable_device(pdev)) { 3226 netif_err(efx, hw, efx->net_dev, 3227 "Cannot re-enable PCI device after reset.\n"); 3228 status = PCI_ERS_RESULT_DISCONNECT; 3229 } 3230 3231 rc = pci_cleanup_aer_uncorrect_error_status(pdev); 3232 if (rc) { 3233 netif_err(efx, hw, efx->net_dev, 3234 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc); 3235 /* Non-fatal error. Continue. */ 3236 } 3237 3238 return status; 3239 } 3240 3241 /* Perform the actual reset and resume I/O operations. */ 3242 static void efx_io_resume(struct pci_dev *pdev) 3243 { 3244 struct efx_nic *efx = pci_get_drvdata(pdev); 3245 int rc; 3246 3247 rtnl_lock(); 3248 3249 if (efx->state == STATE_DISABLED) 3250 goto out; 3251 3252 rc = efx_reset(efx, RESET_TYPE_ALL); 3253 if (rc) { 3254 netif_err(efx, hw, efx->net_dev, 3255 "efx_reset failed after PCI error (%d)\n", rc); 3256 } else { 3257 efx->state = STATE_READY; 3258 netif_dbg(efx, hw, efx->net_dev, 3259 "Done resetting and resuming IO after PCI error.\n"); 3260 } 3261 3262 out: 3263 rtnl_unlock(); 3264 } 3265 3266 /* For simplicity and reliability, we always require a slot reset and try to 3267 * reset the hardware when a pci error affecting the device is detected. 3268 * We leave both the link_reset and mmio_enabled callback unimplemented: 3269 * with our request for slot reset the mmio_enabled callback will never be 3270 * called, and the link_reset callback is not used by AER or EEH mechanisms. 3271 */ 3272 static struct pci_error_handlers efx_err_handlers = { 3273 .error_detected = efx_io_error_detected, 3274 .slot_reset = efx_io_slot_reset, 3275 .resume = efx_io_resume, 3276 }; 3277 3278 static struct pci_driver efx_pci_driver = { 3279 .name = KBUILD_MODNAME, 3280 .id_table = efx_pci_table, 3281 .probe = efx_pci_probe, 3282 .remove = efx_pci_remove, 3283 .driver.pm = &efx_pm_ops, 3284 .err_handler = &efx_err_handlers, 3285 }; 3286 3287 /************************************************************************** 3288 * 3289 * Kernel module interface 3290 * 3291 *************************************************************************/ 3292 3293 module_param(interrupt_mode, uint, 0444); 3294 MODULE_PARM_DESC(interrupt_mode, 3295 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)"); 3296 3297 static int __init efx_init_module(void) 3298 { 3299 int rc; 3300 3301 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n"); 3302 3303 rc = register_netdevice_notifier(&efx_netdev_notifier); 3304 if (rc) 3305 goto err_notifier; 3306 3307 rc = efx_init_sriov(); 3308 if (rc) 3309 goto err_sriov; 3310 3311 reset_workqueue = create_singlethread_workqueue("sfc_reset"); 3312 if (!reset_workqueue) { 3313 rc = -ENOMEM; 3314 goto err_reset; 3315 } 3316 3317 rc = pci_register_driver(&efx_pci_driver); 3318 if (rc < 0) 3319 goto err_pci; 3320 3321 return 0; 3322 3323 err_pci: 3324 destroy_workqueue(reset_workqueue); 3325 err_reset: 3326 efx_fini_sriov(); 3327 err_sriov: 3328 unregister_netdevice_notifier(&efx_netdev_notifier); 3329 err_notifier: 3330 return rc; 3331 } 3332 3333 static void __exit efx_exit_module(void) 3334 { 3335 printk(KERN_INFO "Solarflare NET driver unloading\n"); 3336 3337 pci_unregister_driver(&efx_pci_driver); 3338 destroy_workqueue(reset_workqueue); 3339 efx_fini_sriov(); 3340 unregister_netdevice_notifier(&efx_netdev_notifier); 3341 3342 } 3343 3344 module_init(efx_init_module); 3345 module_exit(efx_exit_module); 3346 3347 MODULE_AUTHOR("Solarflare Communications and " 3348 "Michael Brown <mbrown@fensystems.co.uk>"); 3349 MODULE_DESCRIPTION("Solarflare network driver"); 3350 MODULE_LICENSE("GPL"); 3351 MODULE_DEVICE_TABLE(pci, efx_pci_table); 3352