11f4d4ed6SAlexander Lobakin /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
3e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
4663eacd8SAlexander Lobakin  * Copyright (c) 2019-2020 Marvell International Ltd.
5fe56b9e6SYuval Mintz  */
6fe56b9e6SYuval Mintz 
7fe56b9e6SYuval Mintz #ifndef _QED_CXT_H
8fe56b9e6SYuval Mintz #define _QED_CXT_H
9fe56b9e6SYuval Mintz 
10fe56b9e6SYuval Mintz #include <linux/types.h>
11fe56b9e6SYuval Mintz #include <linux/slab.h>
12fe56b9e6SYuval Mintz #include <linux/qed/qed_if.h>
13fe56b9e6SYuval Mintz #include "qed_hsi.h"
14fe56b9e6SYuval Mintz #include "qed.h"
15fe56b9e6SYuval Mintz 
16fe56b9e6SYuval Mintz struct qed_cxt_info {
17fe56b9e6SYuval Mintz 	void			*p_cxt;
18fe56b9e6SYuval Mintz 	u32			iid;
19fe56b9e6SYuval Mintz 	enum protocol_type	type;
20fe56b9e6SYuval Mintz };
21fe56b9e6SYuval Mintz 
22dbb799c3SYuval Mintz #define MAX_TID_BLOCKS                  512
23dbb799c3SYuval Mintz struct qed_tid_mem {
24dbb799c3SYuval Mintz 	u32 tid_size;
25dbb799c3SYuval Mintz 	u32 num_tids_per_block;
26dbb799c3SYuval Mintz 	u32 waste;
27dbb799c3SYuval Mintz 	u8 *blocks[MAX_TID_BLOCKS];	/* 4K */
28dbb799c3SYuval Mintz };
29dbb799c3SYuval Mintz 
30fe56b9e6SYuval Mintz /**
31fe56b9e6SYuval Mintz  * @brief qedo_cid_get_cxt_info - Returns the context info for a specific cid
32fe56b9e6SYuval Mintz  *
33fe56b9e6SYuval Mintz  *
34fe56b9e6SYuval Mintz  * @param p_hwfn
35fe56b9e6SYuval Mintz  * @param p_info in/out
36fe56b9e6SYuval Mintz  *
37fe56b9e6SYuval Mintz  * @return int
38fe56b9e6SYuval Mintz  */
39fe56b9e6SYuval Mintz int qed_cxt_get_cid_info(struct qed_hwfn *p_hwfn,
40fe56b9e6SYuval Mintz 			 struct qed_cxt_info *p_info);
41fe56b9e6SYuval Mintz 
42dbb799c3SYuval Mintz /**
43dbb799c3SYuval Mintz  * @brief qed_cxt_get_tid_mem_info
44dbb799c3SYuval Mintz  *
45dbb799c3SYuval Mintz  * @param p_hwfn
46dbb799c3SYuval Mintz  * @param p_info
47dbb799c3SYuval Mintz  *
48dbb799c3SYuval Mintz  * @return int
49dbb799c3SYuval Mintz  */
50dbb799c3SYuval Mintz int qed_cxt_get_tid_mem_info(struct qed_hwfn *p_hwfn,
51dbb799c3SYuval Mintz 			     struct qed_tid_mem *p_info);
52dbb799c3SYuval Mintz 
53dbb799c3SYuval Mintz #define QED_CXT_ISCSI_TID_SEG	PROTOCOLID_ISCSI
54dbb799c3SYuval Mintz #define QED_CXT_ROCE_TID_SEG	PROTOCOLID_ROCE
551e128c81SArun Easi #define QED_CXT_FCOE_TID_SEG	PROTOCOLID_FCOE
56fe56b9e6SYuval Mintz enum qed_cxt_elem_type {
57fe56b9e6SYuval Mintz 	QED_ELEM_CXT,
58dbb799c3SYuval Mintz 	QED_ELEM_SRQ,
59b8204ad8SYuval Basson 	QED_ELEM_TASK,
60b8204ad8SYuval Basson 	QED_ELEM_XRC_SRQ,
61fe56b9e6SYuval Mintz };
62fe56b9e6SYuval Mintz 
631408cc1fSYuval Mintz u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn,
641408cc1fSYuval Mintz 				enum protocol_type type, u32 *vf_cid);
651408cc1fSYuval Mintz 
66fe56b9e6SYuval Mintz /**
67fe56b9e6SYuval Mintz  * @brief qed_cxt_set_pf_params - Set the PF params for cxt init
68fe56b9e6SYuval Mintz  *
69fe56b9e6SYuval Mintz  * @param p_hwfn
70f9dc4d1fSRam Amrani  * @param rdma_tasks - requested maximum
71fe56b9e6SYuval Mintz  * @return int
72fe56b9e6SYuval Mintz  */
73f9dc4d1fSRam Amrani int qed_cxt_set_pf_params(struct qed_hwfn *p_hwfn, u32 rdma_tasks);
74fe56b9e6SYuval Mintz 
75fe56b9e6SYuval Mintz /**
76fe56b9e6SYuval Mintz  * @brief qed_cxt_cfg_ilt_compute - compute ILT init parameters
77fe56b9e6SYuval Mintz  *
78fe56b9e6SYuval Mintz  * @param p_hwfn
79f9dc4d1fSRam Amrani  * @param last_line
80fe56b9e6SYuval Mintz  *
81fe56b9e6SYuval Mintz  * @return int
82fe56b9e6SYuval Mintz  */
83f9dc4d1fSRam Amrani int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn, u32 *last_line);
84f9dc4d1fSRam Amrani 
85f9dc4d1fSRam Amrani /**
86f9dc4d1fSRam Amrani  * @brief qed_cxt_cfg_ilt_compute_excess - how many lines can be decreased
87f9dc4d1fSRam Amrani  *
88f9dc4d1fSRam Amrani  * @param p_hwfn
89f9dc4d1fSRam Amrani  * @param used_lines
90f9dc4d1fSRam Amrani  */
91f9dc4d1fSRam Amrani u32 qed_cxt_cfg_ilt_compute_excess(struct qed_hwfn *p_hwfn, u32 used_lines);
92fe56b9e6SYuval Mintz 
93fe56b9e6SYuval Mintz /**
94fe56b9e6SYuval Mintz  * @brief qed_cxt_mngr_alloc - Allocate and init the context manager struct
95fe56b9e6SYuval Mintz  *
96fe56b9e6SYuval Mintz  * @param p_hwfn
97fe56b9e6SYuval Mintz  *
98fe56b9e6SYuval Mintz  * @return int
99fe56b9e6SYuval Mintz  */
100fe56b9e6SYuval Mintz int qed_cxt_mngr_alloc(struct qed_hwfn *p_hwfn);
101fe56b9e6SYuval Mintz 
102fe56b9e6SYuval Mintz /**
103fe56b9e6SYuval Mintz  * @brief qed_cxt_mngr_free
104fe56b9e6SYuval Mintz  *
105fe56b9e6SYuval Mintz  * @param p_hwfn
106fe56b9e6SYuval Mintz  */
107fe56b9e6SYuval Mintz void qed_cxt_mngr_free(struct qed_hwfn *p_hwfn);
108fe56b9e6SYuval Mintz 
109fe56b9e6SYuval Mintz /**
110fe56b9e6SYuval Mintz  * @brief qed_cxt_tables_alloc - Allocate ILT shadow, Searcher T2, acquired map
111fe56b9e6SYuval Mintz  *
112fe56b9e6SYuval Mintz  * @param p_hwfn
113fe56b9e6SYuval Mintz  *
114fe56b9e6SYuval Mintz  * @return int
115fe56b9e6SYuval Mintz  */
116fe56b9e6SYuval Mintz int qed_cxt_tables_alloc(struct qed_hwfn *p_hwfn);
117fe56b9e6SYuval Mintz 
118fe56b9e6SYuval Mintz /**
119fe56b9e6SYuval Mintz  * @brief qed_cxt_mngr_setup - Reset the acquired CIDs
120fe56b9e6SYuval Mintz  *
121fe56b9e6SYuval Mintz  * @param p_hwfn
122fe56b9e6SYuval Mintz  */
123fe56b9e6SYuval Mintz void qed_cxt_mngr_setup(struct qed_hwfn *p_hwfn);
124fe56b9e6SYuval Mintz 
125fe56b9e6SYuval Mintz /**
126fe56b9e6SYuval Mintz  * @brief qed_cxt_hw_init_common - Initailze ILT and DQ, common phase, per path.
127fe56b9e6SYuval Mintz  *
128fe56b9e6SYuval Mintz  *
129fe56b9e6SYuval Mintz  *
130fe56b9e6SYuval Mintz  * @param p_hwfn
131fe56b9e6SYuval Mintz  */
132fe56b9e6SYuval Mintz void qed_cxt_hw_init_common(struct qed_hwfn *p_hwfn);
133fe56b9e6SYuval Mintz 
134fe56b9e6SYuval Mintz /**
135fe56b9e6SYuval Mintz  * @brief qed_cxt_hw_init_pf - Initailze ILT and DQ, PF phase, per path.
136fe56b9e6SYuval Mintz  *
137fe56b9e6SYuval Mintz  * @param p_hwfn
13815582962SRahul Verma  * @param p_ptt
139fe56b9e6SYuval Mintz  */
14015582962SRahul Verma void qed_cxt_hw_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
141fe56b9e6SYuval Mintz 
142fe56b9e6SYuval Mintz /**
143fe56b9e6SYuval Mintz  * @brief qed_qm_init_pf - Initailze the QM PF phase, per path
144fe56b9e6SYuval Mintz  *
145fe56b9e6SYuval Mintz  * @param p_hwfn
14615582962SRahul Verma  * @param p_ptt
147da090917STomer Tayar  * @param is_pf_loading
148fe56b9e6SYuval Mintz  */
149da090917STomer Tayar void qed_qm_init_pf(struct qed_hwfn *p_hwfn,
150da090917STomer Tayar 		    struct qed_ptt *p_ptt, bool is_pf_loading);
151fe56b9e6SYuval Mintz 
152fe56b9e6SYuval Mintz /**
15339651abdSSudarsana Reddy Kalluru  * @brief Reconfigures QM pf on the fly
15439651abdSSudarsana Reddy Kalluru  *
15539651abdSSudarsana Reddy Kalluru  * @param p_hwfn
15639651abdSSudarsana Reddy Kalluru  * @param p_ptt
15739651abdSSudarsana Reddy Kalluru  *
15839651abdSSudarsana Reddy Kalluru  * @return int
15939651abdSSudarsana Reddy Kalluru  */
16039651abdSSudarsana Reddy Kalluru int qed_qm_reconf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
16139651abdSSudarsana Reddy Kalluru 
1626bea61daSMintz, Yuval #define QED_CXT_PF_CID (0xff)
1636bea61daSMintz, Yuval 
16439651abdSSudarsana Reddy Kalluru /**
165fe56b9e6SYuval Mintz  * @brief qed_cxt_release - Release a cid
166fe56b9e6SYuval Mintz  *
167fe56b9e6SYuval Mintz  * @param p_hwfn
168fe56b9e6SYuval Mintz  * @param cid
169fe56b9e6SYuval Mintz  */
1706bea61daSMintz, Yuval void qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid);
1716bea61daSMintz, Yuval 
1726bea61daSMintz, Yuval /**
1736bea61daSMintz, Yuval  * @brief qed_cxt_release - Release a cid belonging to a vf-queue
1746bea61daSMintz, Yuval  *
1756bea61daSMintz, Yuval  * @param p_hwfn
1766bea61daSMintz, Yuval  * @param cid
1776bea61daSMintz, Yuval  * @param vfid - engine relative index. QED_CXT_PF_CID if belongs to PF
1786bea61daSMintz, Yuval  */
1796bea61daSMintz, Yuval void _qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid, u8 vfid);
1806bea61daSMintz, Yuval 
1816bea61daSMintz, Yuval /**
1826bea61daSMintz, Yuval  * @brief qed_cxt_acquire - Acquire a new cid of a specific protocol type
1836bea61daSMintz, Yuval  *
1846bea61daSMintz, Yuval  * @param p_hwfn
1856bea61daSMintz, Yuval  * @param type
1866bea61daSMintz, Yuval  * @param p_cid
1876bea61daSMintz, Yuval  *
1886bea61daSMintz, Yuval  * @return int
1896bea61daSMintz, Yuval  */
1906bea61daSMintz, Yuval int qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn,
1916bea61daSMintz, Yuval 			enum protocol_type type, u32 *p_cid);
1926bea61daSMintz, Yuval 
1936bea61daSMintz, Yuval /**
1946bea61daSMintz, Yuval  * @brief _qed_cxt_acquire - Acquire a new cid of a specific protocol type
1956bea61daSMintz, Yuval  *                           for a vf-queue
1966bea61daSMintz, Yuval  *
1976bea61daSMintz, Yuval  * @param p_hwfn
1986bea61daSMintz, Yuval  * @param type
1996bea61daSMintz, Yuval  * @param p_cid
2006bea61daSMintz, Yuval  * @param vfid - engine relative index. QED_CXT_PF_CID if belongs to PF
2016bea61daSMintz, Yuval  *
2026bea61daSMintz, Yuval  * @return int
2036bea61daSMintz, Yuval  */
2046bea61daSMintz, Yuval int _qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn,
2056bea61daSMintz, Yuval 			 enum protocol_type type, u32 *p_cid, u8 vfid);
2066bea61daSMintz, Yuval 
20751ff1725SRam Amrani int qed_cxt_dynamic_ilt_alloc(struct qed_hwfn *p_hwfn,
20851ff1725SRam Amrani 			      enum qed_cxt_elem_type elem_type, u32 iid);
20951ff1725SRam Amrani u32 qed_cxt_get_proto_tid_count(struct qed_hwfn *p_hwfn,
21051ff1725SRam Amrani 				enum protocol_type type);
21151ff1725SRam Amrani u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn,
21251ff1725SRam Amrani 				enum protocol_type type);
213f1093940SRam Amrani int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto);
214fe56b9e6SYuval Mintz 
215dbb799c3SYuval Mintz #define QED_CTX_WORKING_MEM 0
216dbb799c3SYuval Mintz #define QED_CTX_FL_MEM 1
2171e128c81SArun Easi int qed_cxt_get_task_ctx(struct qed_hwfn *p_hwfn,
2181e128c81SArun Easi 			 u32 tid, u8 ctx_type, void **task_ctx);
2198a52bbabSMichal Kalderon 
2208a52bbabSMichal Kalderon /* Max number of connection types in HW (DQ/CDU etc.) */
2218a52bbabSMichal Kalderon #define MAX_CONN_TYPES          PROTOCOLID_COMMON
2228a52bbabSMichal Kalderon #define NUM_TASK_TYPES          2
2238a52bbabSMichal Kalderon #define NUM_TASK_PF_SEGMENTS    4
2248a52bbabSMichal Kalderon #define NUM_TASK_VF_SEGMENTS    1
2258a52bbabSMichal Kalderon 
2268a52bbabSMichal Kalderon /* PF per protocl configuration object */
2278a52bbabSMichal Kalderon #define TASK_SEGMENTS   (NUM_TASK_PF_SEGMENTS + NUM_TASK_VF_SEGMENTS)
2288a52bbabSMichal Kalderon #define TASK_SEGMENT_VF (NUM_TASK_PF_SEGMENTS)
2298a52bbabSMichal Kalderon 
2308a52bbabSMichal Kalderon struct qed_tid_seg {
2318a52bbabSMichal Kalderon 	u32 count;
2328a52bbabSMichal Kalderon 	u8 type;
2338a52bbabSMichal Kalderon 	bool has_fl_mem;
2348a52bbabSMichal Kalderon };
2358a52bbabSMichal Kalderon 
2368a52bbabSMichal Kalderon struct qed_conn_type_cfg {
2378a52bbabSMichal Kalderon 	u32 cid_count;
2388a52bbabSMichal Kalderon 	u32 cids_per_vf;
2398a52bbabSMichal Kalderon 	struct qed_tid_seg tid_seg[TASK_SEGMENTS];
2408a52bbabSMichal Kalderon };
2418a52bbabSMichal Kalderon 
2428a52bbabSMichal Kalderon /* ILT Client configuration,
2438a52bbabSMichal Kalderon  * Per connection type (protocol) resources (cids, tis, vf cids etc.)
2448a52bbabSMichal Kalderon  * 1 - for connection context (CDUC) and for each task context we need two
2458a52bbabSMichal Kalderon  * values, for regular task context and for force load memory
2468a52bbabSMichal Kalderon  */
2478a52bbabSMichal Kalderon #define ILT_CLI_PF_BLOCKS       (1 + NUM_TASK_PF_SEGMENTS * 2)
2488a52bbabSMichal Kalderon #define ILT_CLI_VF_BLOCKS       (1 + NUM_TASK_VF_SEGMENTS * 2)
2498a52bbabSMichal Kalderon #define CDUC_BLK                (0)
2508a52bbabSMichal Kalderon #define SRQ_BLK                 (0)
2518a52bbabSMichal Kalderon #define CDUT_SEG_BLK(n)         (1 + (u8)(n))
2528a52bbabSMichal Kalderon #define CDUT_FL_SEG_BLK(n, X)   (1 + (n) + NUM_TASK_ ## X ## _SEGMENTS)
2538a52bbabSMichal Kalderon 
2548a52bbabSMichal Kalderon struct ilt_cfg_pair {
2558a52bbabSMichal Kalderon 	u32 reg;
2568a52bbabSMichal Kalderon 	u32 val;
2578a52bbabSMichal Kalderon };
2588a52bbabSMichal Kalderon 
2598a52bbabSMichal Kalderon struct qed_ilt_cli_blk {
2608a52bbabSMichal Kalderon 	u32 total_size;		/* 0 means not active */
2618a52bbabSMichal Kalderon 	u32 real_size_in_page;
2628a52bbabSMichal Kalderon 	u32 start_line;
2638a52bbabSMichal Kalderon 	u32 dynamic_line_offset;
2648a52bbabSMichal Kalderon 	u32 dynamic_line_cnt;
2658a52bbabSMichal Kalderon };
2668a52bbabSMichal Kalderon 
2678a52bbabSMichal Kalderon struct qed_ilt_client_cfg {
2688a52bbabSMichal Kalderon 	bool active;
2698a52bbabSMichal Kalderon 
2708a52bbabSMichal Kalderon 	/* ILT boundaries */
2718a52bbabSMichal Kalderon 	struct ilt_cfg_pair first;
2728a52bbabSMichal Kalderon 	struct ilt_cfg_pair last;
2738a52bbabSMichal Kalderon 	struct ilt_cfg_pair p_size;
2748a52bbabSMichal Kalderon 
2758a52bbabSMichal Kalderon 	/* ILT client blocks for PF */
2768a52bbabSMichal Kalderon 	struct qed_ilt_cli_blk pf_blks[ILT_CLI_PF_BLOCKS];
2778a52bbabSMichal Kalderon 	u32 pf_total_lines;
2788a52bbabSMichal Kalderon 
2798a52bbabSMichal Kalderon 	/* ILT client blocks for VFs */
2808a52bbabSMichal Kalderon 	struct qed_ilt_cli_blk vf_blks[ILT_CLI_VF_BLOCKS];
2818a52bbabSMichal Kalderon 	u32 vf_total_lines;
2828a52bbabSMichal Kalderon };
2838a52bbabSMichal Kalderon 
2848a52bbabSMichal Kalderon struct qed_cid_acquired_map {
2858a52bbabSMichal Kalderon 	u32		start_cid;
2868a52bbabSMichal Kalderon 	u32		max_count;
2878a52bbabSMichal Kalderon 	unsigned long	*cid_map;
2888a52bbabSMichal Kalderon };
2898a52bbabSMichal Kalderon 
2908a52bbabSMichal Kalderon struct qed_src_t2 {
2918a52bbabSMichal Kalderon 	struct phys_mem_desc *dma_mem;
2928a52bbabSMichal Kalderon 	u32 num_pages;
2938a52bbabSMichal Kalderon 	u64 first_free;
2948a52bbabSMichal Kalderon 	u64 last_free;
2958a52bbabSMichal Kalderon };
2968a52bbabSMichal Kalderon 
2978a52bbabSMichal Kalderon struct qed_cxt_mngr {
2988a52bbabSMichal Kalderon 	/* Per protocl configuration */
2998a52bbabSMichal Kalderon 	struct qed_conn_type_cfg	conn_cfg[MAX_CONN_TYPES];
3008a52bbabSMichal Kalderon 
3018a52bbabSMichal Kalderon 	/* computed ILT structure */
3028a52bbabSMichal Kalderon 	struct qed_ilt_client_cfg	clients[MAX_ILT_CLIENTS];
3038a52bbabSMichal Kalderon 
3048a52bbabSMichal Kalderon 	/* Task type sizes */
3058a52bbabSMichal Kalderon 	u32 task_type_size[NUM_TASK_TYPES];
3068a52bbabSMichal Kalderon 
3078a52bbabSMichal Kalderon 	/* total number of VFs for this hwfn -
3088a52bbabSMichal Kalderon 	 * ALL VFs are symmetric in terms of HW resources
3098a52bbabSMichal Kalderon 	 */
3108a52bbabSMichal Kalderon 	u32 vf_count;
3118a52bbabSMichal Kalderon 	u32 first_vf_in_pf;
3128a52bbabSMichal Kalderon 
3138a52bbabSMichal Kalderon 	/* Acquired CIDs */
3148a52bbabSMichal Kalderon 	struct qed_cid_acquired_map	acquired[MAX_CONN_TYPES];
3158a52bbabSMichal Kalderon 
3168a52bbabSMichal Kalderon 	struct qed_cid_acquired_map
3178a52bbabSMichal Kalderon 	acquired_vf[MAX_CONN_TYPES][MAX_NUM_VFS];
3188a52bbabSMichal Kalderon 
3198a52bbabSMichal Kalderon 	/* ILT  shadow table */
3208a52bbabSMichal Kalderon 	struct phys_mem_desc *ilt_shadow;
3218a52bbabSMichal Kalderon 	u32 ilt_shadow_size;
3228a52bbabSMichal Kalderon 	u32 pf_start_line;
3238a52bbabSMichal Kalderon 
3248a52bbabSMichal Kalderon 	/* Mutex for a dynamic ILT allocation */
3258a52bbabSMichal Kalderon 	struct mutex mutex;
3268a52bbabSMichal Kalderon 
3278a52bbabSMichal Kalderon 	/* SRC T2 */
3288a52bbabSMichal Kalderon 	struct qed_src_t2 src_t2;
3298a52bbabSMichal Kalderon 	u32 t2_num_pages;
3308a52bbabSMichal Kalderon 	u64 first_free;
3318a52bbabSMichal Kalderon 	u64 last_free;
3328a52bbabSMichal Kalderon 
3338a52bbabSMichal Kalderon 	/* total number of SRQ's for this hwfn */
3348a52bbabSMichal Kalderon 	u32 srq_count;
335b8204ad8SYuval Basson 	u32 xrc_srq_count;
3368a52bbabSMichal Kalderon 
3378a52bbabSMichal Kalderon 	/* Maximal number of L2 steering filters */
3388a52bbabSMichal Kalderon 	u32 arfs_count;
3398a52bbabSMichal Kalderon 
3408a52bbabSMichal Kalderon 	u8 task_type_id;
3418a52bbabSMichal Kalderon 	u16 task_ctx_size;
3428a52bbabSMichal Kalderon 	u16 conn_ctx_size;
3438a52bbabSMichal Kalderon };
3448a52bbabSMichal Kalderon 
3458a52bbabSMichal Kalderon u16 qed_get_cdut_num_pf_init_pages(struct qed_hwfn *p_hwfn);
3468a52bbabSMichal Kalderon u16 qed_get_cdut_num_vf_init_pages(struct qed_hwfn *p_hwfn);
3478a52bbabSMichal Kalderon u16 qed_get_cdut_num_pf_work_pages(struct qed_hwfn *p_hwfn);
3488a52bbabSMichal Kalderon u16 qed_get_cdut_num_vf_work_pages(struct qed_hwfn *p_hwfn);
3498a52bbabSMichal Kalderon 
350b8204ad8SYuval Basson u32 qed_cxt_get_ilt_page_size(struct qed_hwfn *p_hwfn,
351b8204ad8SYuval Basson 			      enum ilt_clients ilt_client);
352b8204ad8SYuval Basson 
353b8204ad8SYuval Basson u32 qed_cxt_get_total_srq_count(struct qed_hwfn *p_hwfn);
354b8204ad8SYuval Basson 
355fe56b9e6SYuval Mintz #endif
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