1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/module.h> 5 #include <linux/netdevice.h> 6 #include <linux/sfp.h> 7 8 #include "ionic.h" 9 #include "ionic_bus.h" 10 #include "ionic_lif.h" 11 #include "ionic_ethtool.h" 12 #include "ionic_stats.h" 13 14 static const char ionic_priv_flags_strings[][ETH_GSTRING_LEN] = { 15 #define IONIC_PRIV_F_SW_DBG_STATS BIT(0) 16 "sw-dbg-stats", 17 }; 18 19 #define IONIC_PRIV_FLAGS_COUNT ARRAY_SIZE(ionic_priv_flags_strings) 20 21 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf) 22 { 23 u32 i; 24 25 for (i = 0; i < ionic_num_stats_grps; i++) 26 ionic_stats_groups[i].get_strings(lif, &buf); 27 } 28 29 static void ionic_get_stats(struct net_device *netdev, 30 struct ethtool_stats *stats, u64 *buf) 31 { 32 struct ionic_lif *lif = netdev_priv(netdev); 33 u32 i; 34 35 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 36 return; 37 38 memset(buf, 0, stats->n_stats * sizeof(*buf)); 39 for (i = 0; i < ionic_num_stats_grps; i++) 40 ionic_stats_groups[i].get_values(lif, &buf); 41 } 42 43 static int ionic_get_stats_count(struct ionic_lif *lif) 44 { 45 int i, num_stats = 0; 46 47 for (i = 0; i < ionic_num_stats_grps; i++) 48 num_stats += ionic_stats_groups[i].get_count(lif); 49 50 return num_stats; 51 } 52 53 static int ionic_get_sset_count(struct net_device *netdev, int sset) 54 { 55 struct ionic_lif *lif = netdev_priv(netdev); 56 int count = 0; 57 58 switch (sset) { 59 case ETH_SS_STATS: 60 count = ionic_get_stats_count(lif); 61 break; 62 case ETH_SS_PRIV_FLAGS: 63 count = IONIC_PRIV_FLAGS_COUNT; 64 break; 65 } 66 return count; 67 } 68 69 static void ionic_get_strings(struct net_device *netdev, 70 u32 sset, u8 *buf) 71 { 72 struct ionic_lif *lif = netdev_priv(netdev); 73 74 switch (sset) { 75 case ETH_SS_STATS: 76 ionic_get_stats_strings(lif, buf); 77 break; 78 case ETH_SS_PRIV_FLAGS: 79 memcpy(buf, ionic_priv_flags_strings, 80 IONIC_PRIV_FLAGS_COUNT * ETH_GSTRING_LEN); 81 break; 82 } 83 } 84 85 static void ionic_get_drvinfo(struct net_device *netdev, 86 struct ethtool_drvinfo *drvinfo) 87 { 88 struct ionic_lif *lif = netdev_priv(netdev); 89 struct ionic *ionic = lif->ionic; 90 91 strlcpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver)); 92 strlcpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version, 93 sizeof(drvinfo->fw_version)); 94 strlcpy(drvinfo->bus_info, ionic_bus_info(ionic), 95 sizeof(drvinfo->bus_info)); 96 } 97 98 static int ionic_get_regs_len(struct net_device *netdev) 99 { 100 return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32); 101 } 102 103 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 104 void *p) 105 { 106 struct ionic_lif *lif = netdev_priv(netdev); 107 unsigned int offset; 108 unsigned int size; 109 110 regs->version = IONIC_DEV_CMD_REG_VERSION; 111 112 offset = 0; 113 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32); 114 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size); 115 116 offset += size; 117 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32); 118 memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size); 119 } 120 121 static int ionic_get_link_ksettings(struct net_device *netdev, 122 struct ethtool_link_ksettings *ks) 123 { 124 struct ionic_lif *lif = netdev_priv(netdev); 125 struct ionic_dev *idev = &lif->ionic->idev; 126 int copper_seen = 0; 127 128 ethtool_link_ksettings_zero_link_mode(ks, supported); 129 130 if (!idev->port_info) { 131 netdev_err(netdev, "port_info not initialized\n"); 132 return -EOPNOTSUPP; 133 } 134 135 /* The port_info data is found in a DMA space that the NIC keeps 136 * up-to-date, so there's no need to request the data from the 137 * NIC, we already have it in our memory space. 138 */ 139 140 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) { 141 /* Copper */ 142 case IONIC_XCVR_PID_QSFP_100G_CR4: 143 ethtool_link_ksettings_add_link_mode(ks, supported, 144 100000baseCR4_Full); 145 copper_seen++; 146 break; 147 case IONIC_XCVR_PID_QSFP_40GBASE_CR4: 148 ethtool_link_ksettings_add_link_mode(ks, supported, 149 40000baseCR4_Full); 150 copper_seen++; 151 break; 152 case IONIC_XCVR_PID_SFP_25GBASE_CR_S: 153 case IONIC_XCVR_PID_SFP_25GBASE_CR_L: 154 case IONIC_XCVR_PID_SFP_25GBASE_CR_N: 155 ethtool_link_ksettings_add_link_mode(ks, supported, 156 25000baseCR_Full); 157 copper_seen++; 158 break; 159 case IONIC_XCVR_PID_SFP_10GBASE_AOC: 160 case IONIC_XCVR_PID_SFP_10GBASE_CU: 161 ethtool_link_ksettings_add_link_mode(ks, supported, 162 10000baseCR_Full); 163 copper_seen++; 164 break; 165 166 /* Fibre */ 167 case IONIC_XCVR_PID_QSFP_100G_SR4: 168 case IONIC_XCVR_PID_QSFP_100G_AOC: 169 ethtool_link_ksettings_add_link_mode(ks, supported, 170 100000baseSR4_Full); 171 break; 172 case IONIC_XCVR_PID_QSFP_100G_CWDM4: 173 case IONIC_XCVR_PID_QSFP_100G_PSM4: 174 case IONIC_XCVR_PID_QSFP_100G_LR4: 175 ethtool_link_ksettings_add_link_mode(ks, supported, 176 100000baseLR4_ER4_Full); 177 break; 178 case IONIC_XCVR_PID_QSFP_100G_ER4: 179 ethtool_link_ksettings_add_link_mode(ks, supported, 180 100000baseLR4_ER4_Full); 181 break; 182 case IONIC_XCVR_PID_QSFP_40GBASE_SR4: 183 case IONIC_XCVR_PID_QSFP_40GBASE_AOC: 184 ethtool_link_ksettings_add_link_mode(ks, supported, 185 40000baseSR4_Full); 186 break; 187 case IONIC_XCVR_PID_QSFP_40GBASE_LR4: 188 ethtool_link_ksettings_add_link_mode(ks, supported, 189 40000baseLR4_Full); 190 break; 191 case IONIC_XCVR_PID_SFP_25GBASE_SR: 192 case IONIC_XCVR_PID_SFP_25GBASE_AOC: 193 case IONIC_XCVR_PID_SFP_25GBASE_ACC: 194 ethtool_link_ksettings_add_link_mode(ks, supported, 195 25000baseSR_Full); 196 break; 197 case IONIC_XCVR_PID_SFP_10GBASE_SR: 198 ethtool_link_ksettings_add_link_mode(ks, supported, 199 10000baseSR_Full); 200 break; 201 case IONIC_XCVR_PID_SFP_10GBASE_LR: 202 ethtool_link_ksettings_add_link_mode(ks, supported, 203 10000baseLR_Full); 204 break; 205 case IONIC_XCVR_PID_SFP_10GBASE_LRM: 206 ethtool_link_ksettings_add_link_mode(ks, supported, 207 10000baseLRM_Full); 208 break; 209 case IONIC_XCVR_PID_SFP_10GBASE_ER: 210 ethtool_link_ksettings_add_link_mode(ks, supported, 211 10000baseER_Full); 212 break; 213 case IONIC_XCVR_PID_SFP_10GBASE_T: 214 ethtool_link_ksettings_add_link_mode(ks, supported, 215 10000baseT_Full); 216 break; 217 case IONIC_XCVR_PID_SFP_1000BASE_T: 218 ethtool_link_ksettings_add_link_mode(ks, supported, 219 1000baseT_Full); 220 break; 221 case IONIC_XCVR_PID_UNKNOWN: 222 /* This means there's no module plugged in */ 223 break; 224 default: 225 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n", 226 idev->port_info->status.xcvr.pid, 227 idev->port_info->status.xcvr.pid); 228 break; 229 } 230 231 bitmap_copy(ks->link_modes.advertising, ks->link_modes.supported, 232 __ETHTOOL_LINK_MODE_MASK_NBITS); 233 234 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 235 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 236 if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC) 237 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER); 238 else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS) 239 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 240 241 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 242 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 243 244 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER || 245 copper_seen) 246 ks->base.port = PORT_DA; 247 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER) 248 ks->base.port = PORT_FIBRE; 249 else 250 ks->base.port = PORT_NONE; 251 252 if (ks->base.port != PORT_NONE) { 253 ks->base.speed = le32_to_cpu(lif->info->status.link_speed); 254 255 if (le16_to_cpu(lif->info->status.link_status)) 256 ks->base.duplex = DUPLEX_FULL; 257 else 258 ks->base.duplex = DUPLEX_UNKNOWN; 259 260 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 261 262 if (idev->port_info->config.an_enable) { 263 ethtool_link_ksettings_add_link_mode(ks, advertising, 264 Autoneg); 265 ks->base.autoneg = AUTONEG_ENABLE; 266 } 267 } 268 269 return 0; 270 } 271 272 static int ionic_set_link_ksettings(struct net_device *netdev, 273 const struct ethtool_link_ksettings *ks) 274 { 275 struct ionic_lif *lif = netdev_priv(netdev); 276 struct ionic_dev *idev = &lif->ionic->idev; 277 struct ionic *ionic = lif->ionic; 278 int err = 0; 279 280 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 281 return -EBUSY; 282 283 /* set autoneg */ 284 if (ks->base.autoneg != idev->port_info->config.an_enable) { 285 mutex_lock(&ionic->dev_cmd_lock); 286 ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg); 287 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 288 mutex_unlock(&ionic->dev_cmd_lock); 289 if (err) 290 return err; 291 } 292 293 /* set speed */ 294 if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) { 295 mutex_lock(&ionic->dev_cmd_lock); 296 ionic_dev_cmd_port_speed(idev, ks->base.speed); 297 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 298 mutex_unlock(&ionic->dev_cmd_lock); 299 if (err) 300 return err; 301 } 302 303 return 0; 304 } 305 306 static void ionic_get_pauseparam(struct net_device *netdev, 307 struct ethtool_pauseparam *pause) 308 { 309 struct ionic_lif *lif = netdev_priv(netdev); 310 u8 pause_type; 311 312 pause->autoneg = 0; 313 314 pause_type = lif->ionic->idev.port_info->config.pause_type; 315 if (pause_type) { 316 pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0; 317 pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0; 318 } 319 } 320 321 static int ionic_set_pauseparam(struct net_device *netdev, 322 struct ethtool_pauseparam *pause) 323 { 324 struct ionic_lif *lif = netdev_priv(netdev); 325 struct ionic *ionic = lif->ionic; 326 u32 requested_pause; 327 int err; 328 329 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 330 return -EBUSY; 331 332 if (pause->autoneg) 333 return -EOPNOTSUPP; 334 335 /* change both at the same time */ 336 requested_pause = IONIC_PORT_PAUSE_TYPE_LINK; 337 if (pause->rx_pause) 338 requested_pause |= IONIC_PAUSE_F_RX; 339 if (pause->tx_pause) 340 requested_pause |= IONIC_PAUSE_F_TX; 341 342 if (requested_pause == lif->ionic->idev.port_info->config.pause_type) 343 return 0; 344 345 mutex_lock(&ionic->dev_cmd_lock); 346 ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause); 347 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 348 mutex_unlock(&ionic->dev_cmd_lock); 349 if (err) 350 return err; 351 352 return 0; 353 } 354 355 static int ionic_get_fecparam(struct net_device *netdev, 356 struct ethtool_fecparam *fec) 357 { 358 struct ionic_lif *lif = netdev_priv(netdev); 359 360 switch (lif->ionic->idev.port_info->config.fec_type) { 361 case IONIC_PORT_FEC_TYPE_NONE: 362 fec->active_fec = ETHTOOL_FEC_OFF; 363 break; 364 case IONIC_PORT_FEC_TYPE_RS: 365 fec->active_fec = ETHTOOL_FEC_RS; 366 break; 367 case IONIC_PORT_FEC_TYPE_FC: 368 fec->active_fec = ETHTOOL_FEC_BASER; 369 break; 370 } 371 372 fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER; 373 374 return 0; 375 } 376 377 static int ionic_set_fecparam(struct net_device *netdev, 378 struct ethtool_fecparam *fec) 379 { 380 struct ionic_lif *lif = netdev_priv(netdev); 381 u8 fec_type; 382 int ret = 0; 383 384 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 385 return -EBUSY; 386 387 if (lif->ionic->idev.port_info->config.an_enable) { 388 netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n"); 389 return -EINVAL; 390 } 391 392 switch (fec->fec) { 393 case ETHTOOL_FEC_NONE: 394 fec_type = IONIC_PORT_FEC_TYPE_NONE; 395 break; 396 case ETHTOOL_FEC_OFF: 397 fec_type = IONIC_PORT_FEC_TYPE_NONE; 398 break; 399 case ETHTOOL_FEC_RS: 400 fec_type = IONIC_PORT_FEC_TYPE_RS; 401 break; 402 case ETHTOOL_FEC_BASER: 403 fec_type = IONIC_PORT_FEC_TYPE_FC; 404 break; 405 case ETHTOOL_FEC_AUTO: 406 default: 407 netdev_err(netdev, "FEC request 0x%04x not supported\n", 408 fec->fec); 409 return -EINVAL; 410 } 411 412 if (fec_type != lif->ionic->idev.port_info->config.fec_type) { 413 mutex_lock(&lif->ionic->dev_cmd_lock); 414 ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type); 415 ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT); 416 mutex_unlock(&lif->ionic->dev_cmd_lock); 417 } 418 419 return ret; 420 } 421 422 static int ionic_get_coalesce(struct net_device *netdev, 423 struct ethtool_coalesce *coalesce, 424 struct kernel_ethtool_coalesce *kernel_coal, 425 struct netlink_ext_ack *extack) 426 { 427 struct ionic_lif *lif = netdev_priv(netdev); 428 429 coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs; 430 coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs; 431 432 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 433 coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 434 else 435 coalesce->use_adaptive_tx_coalesce = 0; 436 437 coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 438 439 return 0; 440 } 441 442 static int ionic_set_coalesce(struct net_device *netdev, 443 struct ethtool_coalesce *coalesce, 444 struct kernel_ethtool_coalesce *kernel_coal, 445 struct netlink_ext_ack *extack) 446 { 447 struct ionic_lif *lif = netdev_priv(netdev); 448 struct ionic_identity *ident; 449 u32 rx_coal, rx_dim; 450 u32 tx_coal, tx_dim; 451 unsigned int i; 452 453 ident = &lif->ionic->ident; 454 if (ident->dev.intr_coal_div == 0) { 455 netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n", 456 ident->dev.intr_coal_div); 457 return -EIO; 458 } 459 460 /* Tx normally shares Rx interrupt, so only change Rx if not split */ 461 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) && 462 (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs || 463 coalesce->use_adaptive_tx_coalesce)) { 464 netdev_warn(netdev, "only rx parameters can be changed\n"); 465 return -EINVAL; 466 } 467 468 /* Convert the usec request to a HW usable value. If they asked 469 * for non-zero and it resolved to zero, bump it up 470 */ 471 rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs); 472 if (!rx_coal && coalesce->rx_coalesce_usecs) 473 rx_coal = 1; 474 tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs); 475 if (!tx_coal && coalesce->tx_coalesce_usecs) 476 tx_coal = 1; 477 478 if (rx_coal > IONIC_INTR_CTRL_COAL_MAX || 479 tx_coal > IONIC_INTR_CTRL_COAL_MAX) 480 return -ERANGE; 481 482 /* Save the new values */ 483 lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs; 484 lif->rx_coalesce_hw = rx_coal; 485 486 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 487 lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs; 488 else 489 lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs; 490 lif->tx_coalesce_hw = tx_coal; 491 492 if (coalesce->use_adaptive_rx_coalesce) { 493 set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 494 rx_dim = rx_coal; 495 } else { 496 clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 497 rx_dim = 0; 498 } 499 500 if (coalesce->use_adaptive_tx_coalesce) { 501 set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 502 tx_dim = tx_coal; 503 } else { 504 clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 505 tx_dim = 0; 506 } 507 508 if (test_bit(IONIC_LIF_F_UP, lif->state)) { 509 for (i = 0; i < lif->nxqs; i++) { 510 if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) { 511 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl, 512 lif->rxqcqs[i]->intr.index, 513 lif->rx_coalesce_hw); 514 lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim; 515 } 516 517 if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) { 518 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl, 519 lif->txqcqs[i]->intr.index, 520 lif->tx_coalesce_hw); 521 lif->txqcqs[i]->intr.dim_coal_hw = tx_dim; 522 } 523 } 524 } 525 526 return 0; 527 } 528 529 static void ionic_get_ringparam(struct net_device *netdev, 530 struct ethtool_ringparam *ring) 531 { 532 struct ionic_lif *lif = netdev_priv(netdev); 533 534 ring->tx_max_pending = IONIC_MAX_TX_DESC; 535 ring->tx_pending = lif->ntxq_descs; 536 ring->rx_max_pending = IONIC_MAX_RX_DESC; 537 ring->rx_pending = lif->nrxq_descs; 538 } 539 540 static int ionic_set_ringparam(struct net_device *netdev, 541 struct ethtool_ringparam *ring) 542 { 543 struct ionic_lif *lif = netdev_priv(netdev); 544 struct ionic_queue_params qparam; 545 int err; 546 547 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 548 return -EBUSY; 549 550 ionic_init_queue_params(lif, &qparam); 551 552 if (ring->rx_mini_pending || ring->rx_jumbo_pending) { 553 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n"); 554 return -EINVAL; 555 } 556 557 if (!is_power_of_2(ring->tx_pending) || 558 !is_power_of_2(ring->rx_pending)) { 559 netdev_info(netdev, "Descriptor count must be a power of 2\n"); 560 return -EINVAL; 561 } 562 563 /* if nothing to do return success */ 564 if (ring->tx_pending == lif->ntxq_descs && 565 ring->rx_pending == lif->nrxq_descs) 566 return 0; 567 568 if (ring->tx_pending != lif->ntxq_descs) 569 netdev_info(netdev, "Changing Tx ring size from %d to %d\n", 570 lif->ntxq_descs, ring->tx_pending); 571 572 if (ring->rx_pending != lif->nrxq_descs) 573 netdev_info(netdev, "Changing Rx ring size from %d to %d\n", 574 lif->nrxq_descs, ring->rx_pending); 575 576 /* if we're not running, just set the values and return */ 577 if (!netif_running(lif->netdev)) { 578 lif->ntxq_descs = ring->tx_pending; 579 lif->nrxq_descs = ring->rx_pending; 580 return 0; 581 } 582 583 qparam.ntxq_descs = ring->tx_pending; 584 qparam.nrxq_descs = ring->rx_pending; 585 err = ionic_reconfigure_queues(lif, &qparam); 586 if (err) 587 netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err); 588 589 return err; 590 } 591 592 static void ionic_get_channels(struct net_device *netdev, 593 struct ethtool_channels *ch) 594 { 595 struct ionic_lif *lif = netdev_priv(netdev); 596 597 /* report maximum channels */ 598 ch->max_combined = lif->ionic->ntxqs_per_lif; 599 ch->max_rx = lif->ionic->ntxqs_per_lif / 2; 600 ch->max_tx = lif->ionic->ntxqs_per_lif / 2; 601 602 /* report current channels */ 603 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) { 604 ch->rx_count = lif->nxqs; 605 ch->tx_count = lif->nxqs; 606 } else { 607 ch->combined_count = lif->nxqs; 608 } 609 } 610 611 static int ionic_set_channels(struct net_device *netdev, 612 struct ethtool_channels *ch) 613 { 614 struct ionic_lif *lif = netdev_priv(netdev); 615 struct ionic_queue_params qparam; 616 int max_cnt; 617 int err; 618 619 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 620 return -EBUSY; 621 622 ionic_init_queue_params(lif, &qparam); 623 624 if (ch->rx_count != ch->tx_count) { 625 netdev_info(netdev, "The rx and tx count must be equal\n"); 626 return -EINVAL; 627 } 628 629 if (ch->combined_count && ch->rx_count) { 630 netdev_info(netdev, "Use either combined or rx and tx, not both\n"); 631 return -EINVAL; 632 } 633 634 max_cnt = lif->ionic->ntxqs_per_lif; 635 if (ch->combined_count) { 636 if (ch->combined_count > max_cnt) 637 return -EINVAL; 638 639 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 640 netdev_info(lif->netdev, "Sharing queue interrupts\n"); 641 else if (ch->combined_count == lif->nxqs) 642 return 0; 643 644 if (lif->nxqs != ch->combined_count) 645 netdev_info(netdev, "Changing queue count from %d to %d\n", 646 lif->nxqs, ch->combined_count); 647 648 qparam.nxqs = ch->combined_count; 649 qparam.intr_split = 0; 650 } else { 651 max_cnt /= 2; 652 if (ch->rx_count > max_cnt) 653 return -EINVAL; 654 655 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 656 netdev_info(lif->netdev, "Splitting queue interrupts\n"); 657 else if (ch->rx_count == lif->nxqs) 658 return 0; 659 660 if (lif->nxqs != ch->rx_count) 661 netdev_info(netdev, "Changing queue count from %d to %d\n", 662 lif->nxqs, ch->rx_count); 663 664 qparam.nxqs = ch->rx_count; 665 qparam.intr_split = 1; 666 } 667 668 /* if we're not running, just set the values and return */ 669 if (!netif_running(lif->netdev)) { 670 lif->nxqs = qparam.nxqs; 671 672 if (qparam.intr_split) { 673 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 674 } else { 675 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 676 lif->tx_coalesce_usecs = lif->rx_coalesce_usecs; 677 lif->tx_coalesce_hw = lif->rx_coalesce_hw; 678 } 679 return 0; 680 } 681 682 err = ionic_reconfigure_queues(lif, &qparam); 683 if (err) 684 netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err); 685 686 return err; 687 } 688 689 static u32 ionic_get_priv_flags(struct net_device *netdev) 690 { 691 struct ionic_lif *lif = netdev_priv(netdev); 692 u32 priv_flags = 0; 693 694 if (test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state)) 695 priv_flags |= IONIC_PRIV_F_SW_DBG_STATS; 696 697 return priv_flags; 698 } 699 700 static int ionic_set_priv_flags(struct net_device *netdev, u32 priv_flags) 701 { 702 struct ionic_lif *lif = netdev_priv(netdev); 703 704 clear_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state); 705 if (priv_flags & IONIC_PRIV_F_SW_DBG_STATS) 706 set_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state); 707 708 return 0; 709 } 710 711 static int ionic_get_rxnfc(struct net_device *netdev, 712 struct ethtool_rxnfc *info, u32 *rules) 713 { 714 struct ionic_lif *lif = netdev_priv(netdev); 715 int err = 0; 716 717 switch (info->cmd) { 718 case ETHTOOL_GRXRINGS: 719 info->data = lif->nxqs; 720 break; 721 default: 722 netdev_err(netdev, "Command parameter %d is not supported\n", 723 info->cmd); 724 err = -EOPNOTSUPP; 725 } 726 727 return err; 728 } 729 730 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev) 731 { 732 struct ionic_lif *lif = netdev_priv(netdev); 733 734 return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz); 735 } 736 737 static u32 ionic_get_rxfh_key_size(struct net_device *netdev) 738 { 739 return IONIC_RSS_HASH_KEY_SIZE; 740 } 741 742 static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 743 u8 *hfunc) 744 { 745 struct ionic_lif *lif = netdev_priv(netdev); 746 unsigned int i, tbl_sz; 747 748 if (indir) { 749 tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz); 750 for (i = 0; i < tbl_sz; i++) 751 indir[i] = lif->rss_ind_tbl[i]; 752 } 753 754 if (key) 755 memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE); 756 757 if (hfunc) 758 *hfunc = ETH_RSS_HASH_TOP; 759 760 return 0; 761 } 762 763 static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir, 764 const u8 *key, const u8 hfunc) 765 { 766 struct ionic_lif *lif = netdev_priv(netdev); 767 768 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 769 return -EOPNOTSUPP; 770 771 return ionic_lif_rss_config(lif, lif->rss_types, key, indir); 772 } 773 774 static int ionic_set_tunable(struct net_device *dev, 775 const struct ethtool_tunable *tuna, 776 const void *data) 777 { 778 struct ionic_lif *lif = netdev_priv(dev); 779 780 switch (tuna->id) { 781 case ETHTOOL_RX_COPYBREAK: 782 lif->rx_copybreak = *(u32 *)data; 783 break; 784 default: 785 return -EOPNOTSUPP; 786 } 787 788 return 0; 789 } 790 791 static int ionic_get_tunable(struct net_device *netdev, 792 const struct ethtool_tunable *tuna, void *data) 793 { 794 struct ionic_lif *lif = netdev_priv(netdev); 795 796 switch (tuna->id) { 797 case ETHTOOL_RX_COPYBREAK: 798 *(u32 *)data = lif->rx_copybreak; 799 break; 800 default: 801 return -EOPNOTSUPP; 802 } 803 804 return 0; 805 } 806 807 static int ionic_get_module_info(struct net_device *netdev, 808 struct ethtool_modinfo *modinfo) 809 810 { 811 struct ionic_lif *lif = netdev_priv(netdev); 812 struct ionic_dev *idev = &lif->ionic->idev; 813 struct ionic_xcvr_status *xcvr; 814 struct sfp_eeprom_base *sfp; 815 816 xcvr = &idev->port_info->status.xcvr; 817 sfp = (struct sfp_eeprom_base *) xcvr->sprom; 818 819 /* report the module data type and length */ 820 switch (sfp->phys_id) { 821 case SFF8024_ID_SFP: 822 modinfo->type = ETH_MODULE_SFF_8079; 823 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 824 break; 825 case SFF8024_ID_QSFP_8436_8636: 826 case SFF8024_ID_QSFP28_8636: 827 modinfo->type = ETH_MODULE_SFF_8436; 828 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 829 break; 830 default: 831 netdev_info(netdev, "unknown xcvr type 0x%02x\n", 832 xcvr->sprom[0]); 833 modinfo->type = 0; 834 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 835 break; 836 } 837 838 return 0; 839 } 840 841 static int ionic_get_module_eeprom(struct net_device *netdev, 842 struct ethtool_eeprom *ee, 843 u8 *data) 844 { 845 struct ionic_lif *lif = netdev_priv(netdev); 846 struct ionic_dev *idev = &lif->ionic->idev; 847 struct ionic_xcvr_status *xcvr; 848 char tbuf[sizeof(xcvr->sprom)]; 849 int count = 10; 850 u32 len; 851 852 /* The NIC keeps the module prom up-to-date in the DMA space 853 * so we can simply copy the module bytes into the data buffer. 854 */ 855 xcvr = &idev->port_info->status.xcvr; 856 len = min_t(u32, sizeof(xcvr->sprom), ee->len); 857 858 do { 859 memcpy(data, xcvr->sprom, len); 860 memcpy(tbuf, xcvr->sprom, len); 861 862 /* Let's make sure we got a consistent copy */ 863 if (!memcmp(data, tbuf, len)) 864 break; 865 866 } while (--count); 867 868 if (!count) 869 return -ETIMEDOUT; 870 871 return 0; 872 } 873 874 static int ionic_get_ts_info(struct net_device *netdev, 875 struct ethtool_ts_info *info) 876 { 877 struct ionic_lif *lif = netdev_priv(netdev); 878 struct ionic *ionic = lif->ionic; 879 __le64 mask; 880 881 if (!lif->phc || !lif->phc->ptp) 882 return ethtool_op_get_ts_info(netdev, info); 883 884 info->phc_index = ptp_clock_index(lif->phc->ptp); 885 886 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 887 SOF_TIMESTAMPING_RX_SOFTWARE | 888 SOF_TIMESTAMPING_SOFTWARE | 889 SOF_TIMESTAMPING_TX_HARDWARE | 890 SOF_TIMESTAMPING_RX_HARDWARE | 891 SOF_TIMESTAMPING_RAW_HARDWARE; 892 893 /* tx modes */ 894 895 info->tx_types = BIT(HWTSTAMP_TX_OFF) | 896 BIT(HWTSTAMP_TX_ON); 897 898 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC)); 899 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask) 900 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC); 901 902 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P)); 903 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask) 904 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P); 905 906 /* rx filters */ 907 908 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 909 BIT(HWTSTAMP_FILTER_ALL); 910 911 mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL); 912 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 913 info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL); 914 915 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC); 916 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 917 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC); 918 919 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ); 920 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 921 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ); 922 923 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL); 924 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 925 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT); 926 927 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC); 928 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 929 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC); 930 931 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ); 932 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 933 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 934 935 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL); 936 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 937 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT); 938 939 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC); 940 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 941 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC); 942 943 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ); 944 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 945 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 946 947 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL); 948 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 949 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT); 950 951 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC); 952 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 953 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC); 954 955 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ); 956 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 957 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ); 958 959 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL); 960 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 961 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); 962 963 return 0; 964 } 965 966 static int ionic_nway_reset(struct net_device *netdev) 967 { 968 struct ionic_lif *lif = netdev_priv(netdev); 969 struct ionic *ionic = lif->ionic; 970 int err = 0; 971 972 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 973 return -EBUSY; 974 975 /* flap the link to force auto-negotiation */ 976 977 mutex_lock(&ionic->dev_cmd_lock); 978 979 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN); 980 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 981 982 if (!err) { 983 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP); 984 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 985 } 986 987 mutex_unlock(&ionic->dev_cmd_lock); 988 989 return err; 990 } 991 992 static const struct ethtool_ops ionic_ethtool_ops = { 993 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 994 ETHTOOL_COALESCE_USE_ADAPTIVE_RX | 995 ETHTOOL_COALESCE_USE_ADAPTIVE_TX, 996 .get_drvinfo = ionic_get_drvinfo, 997 .get_regs_len = ionic_get_regs_len, 998 .get_regs = ionic_get_regs, 999 .get_link = ethtool_op_get_link, 1000 .get_link_ksettings = ionic_get_link_ksettings, 1001 .set_link_ksettings = ionic_set_link_ksettings, 1002 .get_coalesce = ionic_get_coalesce, 1003 .set_coalesce = ionic_set_coalesce, 1004 .get_ringparam = ionic_get_ringparam, 1005 .set_ringparam = ionic_set_ringparam, 1006 .get_channels = ionic_get_channels, 1007 .set_channels = ionic_set_channels, 1008 .get_strings = ionic_get_strings, 1009 .get_ethtool_stats = ionic_get_stats, 1010 .get_sset_count = ionic_get_sset_count, 1011 .get_priv_flags = ionic_get_priv_flags, 1012 .set_priv_flags = ionic_set_priv_flags, 1013 .get_rxnfc = ionic_get_rxnfc, 1014 .get_rxfh_indir_size = ionic_get_rxfh_indir_size, 1015 .get_rxfh_key_size = ionic_get_rxfh_key_size, 1016 .get_rxfh = ionic_get_rxfh, 1017 .set_rxfh = ionic_set_rxfh, 1018 .get_tunable = ionic_get_tunable, 1019 .set_tunable = ionic_set_tunable, 1020 .get_module_info = ionic_get_module_info, 1021 .get_module_eeprom = ionic_get_module_eeprom, 1022 .get_pauseparam = ionic_get_pauseparam, 1023 .set_pauseparam = ionic_set_pauseparam, 1024 .get_fecparam = ionic_get_fecparam, 1025 .set_fecparam = ionic_set_fecparam, 1026 .get_ts_info = ionic_get_ts_info, 1027 .nway_reset = ionic_nway_reset, 1028 }; 1029 1030 void ionic_ethtool_set_ops(struct net_device *netdev) 1031 { 1032 netdev->ethtool_ops = &ionic_ethtool_ops; 1033 } 1034