1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3
4 #include <linux/module.h>
5 #include <linux/netdevice.h>
6 #include <linux/sfp.h>
7
8 #include "ionic.h"
9 #include "ionic_bus.h"
10 #include "ionic_lif.h"
11 #include "ionic_ethtool.h"
12 #include "ionic_stats.h"
13
ionic_get_stats_strings(struct ionic_lif * lif,u8 * buf)14 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf)
15 {
16 u32 i;
17
18 for (i = 0; i < ionic_num_stats_grps; i++)
19 ionic_stats_groups[i].get_strings(lif, &buf);
20 }
21
ionic_get_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * buf)22 static void ionic_get_stats(struct net_device *netdev,
23 struct ethtool_stats *stats, u64 *buf)
24 {
25 struct ionic_lif *lif = netdev_priv(netdev);
26 u32 i;
27
28 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
29 return;
30
31 memset(buf, 0, stats->n_stats * sizeof(*buf));
32 for (i = 0; i < ionic_num_stats_grps; i++)
33 ionic_stats_groups[i].get_values(lif, &buf);
34 }
35
ionic_get_stats_count(struct ionic_lif * lif)36 static int ionic_get_stats_count(struct ionic_lif *lif)
37 {
38 int i, num_stats = 0;
39
40 for (i = 0; i < ionic_num_stats_grps; i++)
41 num_stats += ionic_stats_groups[i].get_count(lif);
42
43 return num_stats;
44 }
45
ionic_get_sset_count(struct net_device * netdev,int sset)46 static int ionic_get_sset_count(struct net_device *netdev, int sset)
47 {
48 struct ionic_lif *lif = netdev_priv(netdev);
49 int count = 0;
50
51 switch (sset) {
52 case ETH_SS_STATS:
53 count = ionic_get_stats_count(lif);
54 break;
55 }
56 return count;
57 }
58
ionic_get_strings(struct net_device * netdev,u32 sset,u8 * buf)59 static void ionic_get_strings(struct net_device *netdev,
60 u32 sset, u8 *buf)
61 {
62 struct ionic_lif *lif = netdev_priv(netdev);
63
64 switch (sset) {
65 case ETH_SS_STATS:
66 ionic_get_stats_strings(lif, buf);
67 break;
68 }
69 }
70
ionic_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * drvinfo)71 static void ionic_get_drvinfo(struct net_device *netdev,
72 struct ethtool_drvinfo *drvinfo)
73 {
74 struct ionic_lif *lif = netdev_priv(netdev);
75 struct ionic *ionic = lif->ionic;
76
77 strscpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver));
78 strscpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version,
79 sizeof(drvinfo->fw_version));
80 strscpy(drvinfo->bus_info, ionic_bus_info(ionic),
81 sizeof(drvinfo->bus_info));
82 }
83
ionic_get_regs_len(struct net_device * netdev)84 static int ionic_get_regs_len(struct net_device *netdev)
85 {
86 return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32);
87 }
88
ionic_get_regs(struct net_device * netdev,struct ethtool_regs * regs,void * p)89 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
90 void *p)
91 {
92 struct ionic_lif *lif = netdev_priv(netdev);
93 unsigned int offset;
94 unsigned int size;
95
96 regs->version = IONIC_DEV_CMD_REG_VERSION;
97
98 offset = 0;
99 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
100 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
101
102 offset += size;
103 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
104 memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size);
105 }
106
ionic_get_link_ext_stats(struct net_device * netdev,struct ethtool_link_ext_stats * stats)107 static void ionic_get_link_ext_stats(struct net_device *netdev,
108 struct ethtool_link_ext_stats *stats)
109 {
110 struct ionic_lif *lif = netdev_priv(netdev);
111
112 if (lif->ionic->pdev->is_physfn)
113 stats->link_down_events = lif->link_down_count;
114 }
115
ionic_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * ks)116 static int ionic_get_link_ksettings(struct net_device *netdev,
117 struct ethtool_link_ksettings *ks)
118 {
119 struct ionic_lif *lif = netdev_priv(netdev);
120 struct ionic_dev *idev = &lif->ionic->idev;
121 int copper_seen = 0;
122
123 ethtool_link_ksettings_zero_link_mode(ks, supported);
124
125 if (!idev->port_info) {
126 netdev_err(netdev, "port_info not initialized\n");
127 return -EOPNOTSUPP;
128 }
129
130 /* The port_info data is found in a DMA space that the NIC keeps
131 * up-to-date, so there's no need to request the data from the
132 * NIC, we already have it in our memory space.
133 */
134
135 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) {
136 /* Copper */
137 case IONIC_XCVR_PID_QSFP_100G_CR4:
138 ethtool_link_ksettings_add_link_mode(ks, supported,
139 100000baseCR4_Full);
140 copper_seen++;
141 break;
142 case IONIC_XCVR_PID_QSFP_40GBASE_CR4:
143 ethtool_link_ksettings_add_link_mode(ks, supported,
144 40000baseCR4_Full);
145 copper_seen++;
146 break;
147 case IONIC_XCVR_PID_SFP_25GBASE_CR_S:
148 case IONIC_XCVR_PID_SFP_25GBASE_CR_L:
149 case IONIC_XCVR_PID_SFP_25GBASE_CR_N:
150 ethtool_link_ksettings_add_link_mode(ks, supported,
151 25000baseCR_Full);
152 copper_seen++;
153 break;
154 case IONIC_XCVR_PID_SFP_10GBASE_AOC:
155 case IONIC_XCVR_PID_SFP_10GBASE_CU:
156 ethtool_link_ksettings_add_link_mode(ks, supported,
157 10000baseCR_Full);
158 copper_seen++;
159 break;
160
161 /* Fibre */
162 case IONIC_XCVR_PID_QSFP_100G_SR4:
163 case IONIC_XCVR_PID_QSFP_100G_AOC:
164 ethtool_link_ksettings_add_link_mode(ks, supported,
165 100000baseSR4_Full);
166 break;
167 case IONIC_XCVR_PID_QSFP_100G_CWDM4:
168 case IONIC_XCVR_PID_QSFP_100G_PSM4:
169 case IONIC_XCVR_PID_QSFP_100G_LR4:
170 ethtool_link_ksettings_add_link_mode(ks, supported,
171 100000baseLR4_ER4_Full);
172 break;
173 case IONIC_XCVR_PID_QSFP_100G_ER4:
174 ethtool_link_ksettings_add_link_mode(ks, supported,
175 100000baseLR4_ER4_Full);
176 break;
177 case IONIC_XCVR_PID_QSFP_40GBASE_SR4:
178 case IONIC_XCVR_PID_QSFP_40GBASE_AOC:
179 ethtool_link_ksettings_add_link_mode(ks, supported,
180 40000baseSR4_Full);
181 break;
182 case IONIC_XCVR_PID_QSFP_40GBASE_LR4:
183 ethtool_link_ksettings_add_link_mode(ks, supported,
184 40000baseLR4_Full);
185 break;
186 case IONIC_XCVR_PID_SFP_25GBASE_SR:
187 case IONIC_XCVR_PID_SFP_25GBASE_AOC:
188 case IONIC_XCVR_PID_SFP_25GBASE_ACC:
189 ethtool_link_ksettings_add_link_mode(ks, supported,
190 25000baseSR_Full);
191 break;
192 case IONIC_XCVR_PID_SFP_10GBASE_SR:
193 ethtool_link_ksettings_add_link_mode(ks, supported,
194 10000baseSR_Full);
195 break;
196 case IONIC_XCVR_PID_SFP_10GBASE_LR:
197 ethtool_link_ksettings_add_link_mode(ks, supported,
198 10000baseLR_Full);
199 break;
200 case IONIC_XCVR_PID_SFP_10GBASE_LRM:
201 ethtool_link_ksettings_add_link_mode(ks, supported,
202 10000baseLRM_Full);
203 break;
204 case IONIC_XCVR_PID_SFP_10GBASE_ER:
205 ethtool_link_ksettings_add_link_mode(ks, supported,
206 10000baseER_Full);
207 break;
208 case IONIC_XCVR_PID_SFP_10GBASE_T:
209 ethtool_link_ksettings_add_link_mode(ks, supported,
210 10000baseT_Full);
211 break;
212 case IONIC_XCVR_PID_SFP_1000BASE_T:
213 ethtool_link_ksettings_add_link_mode(ks, supported,
214 1000baseT_Full);
215 break;
216 case IONIC_XCVR_PID_UNKNOWN:
217 /* This means there's no module plugged in */
218 break;
219 default:
220 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n",
221 idev->port_info->status.xcvr.pid,
222 idev->port_info->status.xcvr.pid);
223 break;
224 }
225
226 linkmode_copy(ks->link_modes.advertising, ks->link_modes.supported);
227
228 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
229 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
230 if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC)
231 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER);
232 else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS)
233 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
234
235 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
236 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
237
238 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER ||
239 copper_seen)
240 ks->base.port = PORT_DA;
241 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER)
242 ks->base.port = PORT_FIBRE;
243 else
244 ks->base.port = PORT_NONE;
245
246 if (ks->base.port != PORT_NONE) {
247 ks->base.speed = le32_to_cpu(lif->info->status.link_speed);
248
249 if (le16_to_cpu(lif->info->status.link_status))
250 ks->base.duplex = DUPLEX_FULL;
251 else
252 ks->base.duplex = DUPLEX_UNKNOWN;
253
254 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
255
256 if (idev->port_info->config.an_enable) {
257 ethtool_link_ksettings_add_link_mode(ks, advertising,
258 Autoneg);
259 ks->base.autoneg = AUTONEG_ENABLE;
260 }
261 }
262
263 return 0;
264 }
265
ionic_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * ks)266 static int ionic_set_link_ksettings(struct net_device *netdev,
267 const struct ethtool_link_ksettings *ks)
268 {
269 struct ionic_lif *lif = netdev_priv(netdev);
270 struct ionic_dev *idev = &lif->ionic->idev;
271 struct ionic *ionic = lif->ionic;
272 int err = 0;
273
274 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
275 return -EBUSY;
276
277 /* set autoneg */
278 if (ks->base.autoneg != idev->port_info->config.an_enable) {
279 mutex_lock(&ionic->dev_cmd_lock);
280 ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg);
281 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
282 mutex_unlock(&ionic->dev_cmd_lock);
283 if (err)
284 return err;
285 }
286
287 /* set speed */
288 if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) {
289 mutex_lock(&ionic->dev_cmd_lock);
290 ionic_dev_cmd_port_speed(idev, ks->base.speed);
291 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
292 mutex_unlock(&ionic->dev_cmd_lock);
293 if (err)
294 return err;
295 }
296
297 return 0;
298 }
299
ionic_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)300 static void ionic_get_pauseparam(struct net_device *netdev,
301 struct ethtool_pauseparam *pause)
302 {
303 struct ionic_lif *lif = netdev_priv(netdev);
304 u8 pause_type;
305
306 pause->autoneg = 0;
307
308 pause_type = lif->ionic->idev.port_info->config.pause_type;
309 if (pause_type) {
310 pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0;
311 pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0;
312 }
313 }
314
ionic_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)315 static int ionic_set_pauseparam(struct net_device *netdev,
316 struct ethtool_pauseparam *pause)
317 {
318 struct ionic_lif *lif = netdev_priv(netdev);
319 struct ionic *ionic = lif->ionic;
320 u32 requested_pause;
321 int err;
322
323 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
324 return -EBUSY;
325
326 if (pause->autoneg)
327 return -EOPNOTSUPP;
328
329 /* change both at the same time */
330 requested_pause = IONIC_PORT_PAUSE_TYPE_LINK;
331 if (pause->rx_pause)
332 requested_pause |= IONIC_PAUSE_F_RX;
333 if (pause->tx_pause)
334 requested_pause |= IONIC_PAUSE_F_TX;
335
336 if (requested_pause == lif->ionic->idev.port_info->config.pause_type)
337 return 0;
338
339 mutex_lock(&ionic->dev_cmd_lock);
340 ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause);
341 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
342 mutex_unlock(&ionic->dev_cmd_lock);
343 if (err)
344 return err;
345
346 return 0;
347 }
348
ionic_get_fecparam(struct net_device * netdev,struct ethtool_fecparam * fec)349 static int ionic_get_fecparam(struct net_device *netdev,
350 struct ethtool_fecparam *fec)
351 {
352 struct ionic_lif *lif = netdev_priv(netdev);
353
354 switch (lif->ionic->idev.port_info->config.fec_type) {
355 case IONIC_PORT_FEC_TYPE_NONE:
356 fec->active_fec = ETHTOOL_FEC_OFF;
357 break;
358 case IONIC_PORT_FEC_TYPE_RS:
359 fec->active_fec = ETHTOOL_FEC_RS;
360 break;
361 case IONIC_PORT_FEC_TYPE_FC:
362 fec->active_fec = ETHTOOL_FEC_BASER;
363 break;
364 }
365
366 fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER;
367
368 return 0;
369 }
370
ionic_set_fecparam(struct net_device * netdev,struct ethtool_fecparam * fec)371 static int ionic_set_fecparam(struct net_device *netdev,
372 struct ethtool_fecparam *fec)
373 {
374 struct ionic_lif *lif = netdev_priv(netdev);
375 u8 fec_type;
376 int ret = 0;
377
378 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
379 return -EBUSY;
380
381 if (lif->ionic->idev.port_info->config.an_enable) {
382 netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n");
383 return -EINVAL;
384 }
385
386 switch (fec->fec) {
387 case ETHTOOL_FEC_NONE:
388 fec_type = IONIC_PORT_FEC_TYPE_NONE;
389 break;
390 case ETHTOOL_FEC_OFF:
391 fec_type = IONIC_PORT_FEC_TYPE_NONE;
392 break;
393 case ETHTOOL_FEC_RS:
394 fec_type = IONIC_PORT_FEC_TYPE_RS;
395 break;
396 case ETHTOOL_FEC_BASER:
397 fec_type = IONIC_PORT_FEC_TYPE_FC;
398 break;
399 case ETHTOOL_FEC_AUTO:
400 default:
401 netdev_err(netdev, "FEC request 0x%04x not supported\n",
402 fec->fec);
403 return -EINVAL;
404 }
405
406 if (fec_type != lif->ionic->idev.port_info->config.fec_type) {
407 mutex_lock(&lif->ionic->dev_cmd_lock);
408 ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type);
409 ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT);
410 mutex_unlock(&lif->ionic->dev_cmd_lock);
411 }
412
413 return ret;
414 }
415
ionic_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * coalesce,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)416 static int ionic_get_coalesce(struct net_device *netdev,
417 struct ethtool_coalesce *coalesce,
418 struct kernel_ethtool_coalesce *kernel_coal,
419 struct netlink_ext_ack *extack)
420 {
421 struct ionic_lif *lif = netdev_priv(netdev);
422
423 coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs;
424 coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs;
425
426 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
427 coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
428 else
429 coalesce->use_adaptive_tx_coalesce = 0;
430
431 coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
432
433 return 0;
434 }
435
ionic_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * coalesce,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)436 static int ionic_set_coalesce(struct net_device *netdev,
437 struct ethtool_coalesce *coalesce,
438 struct kernel_ethtool_coalesce *kernel_coal,
439 struct netlink_ext_ack *extack)
440 {
441 struct ionic_lif *lif = netdev_priv(netdev);
442 struct ionic_identity *ident;
443 u32 rx_coal, rx_dim;
444 u32 tx_coal, tx_dim;
445 unsigned int i;
446
447 ident = &lif->ionic->ident;
448 if (ident->dev.intr_coal_div == 0) {
449 netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n",
450 ident->dev.intr_coal_div);
451 return -EIO;
452 }
453
454 /* Tx normally shares Rx interrupt, so only change Rx if not split */
455 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) &&
456 (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs ||
457 coalesce->use_adaptive_tx_coalesce)) {
458 netdev_warn(netdev, "only rx parameters can be changed\n");
459 return -EINVAL;
460 }
461
462 /* Convert the usec request to a HW usable value. If they asked
463 * for non-zero and it resolved to zero, bump it up
464 */
465 rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs);
466 if (!rx_coal && coalesce->rx_coalesce_usecs)
467 rx_coal = 1;
468 tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs);
469 if (!tx_coal && coalesce->tx_coalesce_usecs)
470 tx_coal = 1;
471
472 if (rx_coal > IONIC_INTR_CTRL_COAL_MAX ||
473 tx_coal > IONIC_INTR_CTRL_COAL_MAX)
474 return -ERANGE;
475
476 /* Save the new values */
477 lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs;
478 lif->rx_coalesce_hw = rx_coal;
479
480 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
481 lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs;
482 else
483 lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs;
484 lif->tx_coalesce_hw = tx_coal;
485
486 if (coalesce->use_adaptive_rx_coalesce) {
487 set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
488 rx_dim = rx_coal;
489 } else {
490 clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
491 rx_dim = 0;
492 }
493
494 if (coalesce->use_adaptive_tx_coalesce) {
495 set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
496 tx_dim = tx_coal;
497 } else {
498 clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
499 tx_dim = 0;
500 }
501
502 if (test_bit(IONIC_LIF_F_UP, lif->state)) {
503 for (i = 0; i < lif->nxqs; i++) {
504 if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) {
505 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
506 lif->rxqcqs[i]->intr.index,
507 lif->rx_coalesce_hw);
508 lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim;
509 }
510
511 if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) {
512 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
513 lif->txqcqs[i]->intr.index,
514 lif->tx_coalesce_hw);
515 lif->txqcqs[i]->intr.dim_coal_hw = tx_dim;
516 }
517 }
518 }
519
520 return 0;
521 }
522
ionic_validate_cmb_config(struct ionic_lif * lif,struct ionic_queue_params * qparam)523 static int ionic_validate_cmb_config(struct ionic_lif *lif,
524 struct ionic_queue_params *qparam)
525 {
526 int pages_have, pages_required = 0;
527 unsigned long sz;
528
529 if (!lif->ionic->idev.cmb_inuse &&
530 (qparam->cmb_tx || qparam->cmb_rx)) {
531 netdev_info(lif->netdev, "CMB rings are not supported on this device\n");
532 return -EOPNOTSUPP;
533 }
534
535 if (qparam->cmb_tx) {
536 if (!(lif->qtype_info[IONIC_QTYPE_TXQ].features & IONIC_QIDENT_F_CMB)) {
537 netdev_info(lif->netdev,
538 "CMB rings for tx-push are not supported on this device\n");
539 return -EOPNOTSUPP;
540 }
541
542 sz = sizeof(struct ionic_txq_desc) * qparam->ntxq_descs * qparam->nxqs;
543 pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
544 }
545
546 if (qparam->cmb_rx) {
547 if (!(lif->qtype_info[IONIC_QTYPE_RXQ].features & IONIC_QIDENT_F_CMB)) {
548 netdev_info(lif->netdev,
549 "CMB rings for rx-push are not supported on this device\n");
550 return -EOPNOTSUPP;
551 }
552
553 sz = sizeof(struct ionic_rxq_desc) * qparam->nrxq_descs * qparam->nxqs;
554 pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
555 }
556
557 pages_have = lif->ionic->bars[IONIC_PCI_BAR_CMB].len / PAGE_SIZE;
558 if (pages_required > pages_have) {
559 netdev_info(lif->netdev,
560 "Not enough CMB pages for number of queues and size of descriptor rings, need %d have %d",
561 pages_required, pages_have);
562 return -ENOMEM;
563 }
564
565 return pages_required;
566 }
567
ionic_cmb_rings_toggle(struct ionic_lif * lif,bool cmb_tx,bool cmb_rx)568 static int ionic_cmb_rings_toggle(struct ionic_lif *lif, bool cmb_tx, bool cmb_rx)
569 {
570 struct ionic_queue_params qparam;
571 int pages_used;
572
573 if (netif_running(lif->netdev)) {
574 netdev_info(lif->netdev, "Please stop device to toggle CMB for tx/rx-push\n");
575 return -EBUSY;
576 }
577
578 ionic_init_queue_params(lif, &qparam);
579 qparam.cmb_tx = cmb_tx;
580 qparam.cmb_rx = cmb_rx;
581 pages_used = ionic_validate_cmb_config(lif, &qparam);
582 if (pages_used < 0)
583 return pages_used;
584
585 if (cmb_tx)
586 set_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
587 else
588 clear_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
589
590 if (cmb_rx)
591 set_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
592 else
593 clear_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
594
595 if (cmb_tx || cmb_rx)
596 netdev_info(lif->netdev, "Enabling CMB %s %s rings - %d pages\n",
597 cmb_tx ? "TX" : "", cmb_rx ? "RX" : "", pages_used);
598 else
599 netdev_info(lif->netdev, "Disabling CMB rings\n");
600
601 return 0;
602 }
603
ionic_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)604 static void ionic_get_ringparam(struct net_device *netdev,
605 struct ethtool_ringparam *ring,
606 struct kernel_ethtool_ringparam *kernel_ring,
607 struct netlink_ext_ack *extack)
608 {
609 struct ionic_lif *lif = netdev_priv(netdev);
610
611 ring->tx_max_pending = IONIC_MAX_TX_DESC;
612 ring->tx_pending = lif->ntxq_descs;
613 ring->rx_max_pending = IONIC_MAX_RX_DESC;
614 ring->rx_pending = lif->nrxq_descs;
615 kernel_ring->tx_push = test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
616 kernel_ring->rx_push = test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
617 }
618
ionic_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)619 static int ionic_set_ringparam(struct net_device *netdev,
620 struct ethtool_ringparam *ring,
621 struct kernel_ethtool_ringparam *kernel_ring,
622 struct netlink_ext_ack *extack)
623 {
624 struct ionic_lif *lif = netdev_priv(netdev);
625 struct ionic_queue_params qparam;
626 int err;
627
628 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
629 return -EBUSY;
630
631 ionic_init_queue_params(lif, &qparam);
632
633 if (ring->rx_mini_pending || ring->rx_jumbo_pending) {
634 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");
635 return -EINVAL;
636 }
637
638 if (!is_power_of_2(ring->tx_pending) ||
639 !is_power_of_2(ring->rx_pending)) {
640 netdev_info(netdev, "Descriptor count must be a power of 2\n");
641 return -EINVAL;
642 }
643
644 /* if nothing to do return success */
645 if (ring->tx_pending == lif->ntxq_descs &&
646 ring->rx_pending == lif->nrxq_descs &&
647 kernel_ring->tx_push == test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state) &&
648 kernel_ring->rx_push == test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state))
649 return 0;
650
651 qparam.ntxq_descs = ring->tx_pending;
652 qparam.nrxq_descs = ring->rx_pending;
653 qparam.cmb_tx = kernel_ring->tx_push;
654 qparam.cmb_rx = kernel_ring->rx_push;
655
656 err = ionic_validate_cmb_config(lif, &qparam);
657 if (err < 0)
658 return err;
659
660 if (kernel_ring->tx_push != test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state) ||
661 kernel_ring->rx_push != test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state)) {
662 err = ionic_cmb_rings_toggle(lif, kernel_ring->tx_push,
663 kernel_ring->rx_push);
664 if (err < 0)
665 return err;
666 }
667
668 if (ring->tx_pending != lif->ntxq_descs)
669 netdev_info(netdev, "Changing Tx ring size from %d to %d\n",
670 lif->ntxq_descs, ring->tx_pending);
671
672 if (ring->rx_pending != lif->nrxq_descs)
673 netdev_info(netdev, "Changing Rx ring size from %d to %d\n",
674 lif->nrxq_descs, ring->rx_pending);
675
676 /* if we're not running, just set the values and return */
677 if (!netif_running(lif->netdev)) {
678 lif->ntxq_descs = ring->tx_pending;
679 lif->nrxq_descs = ring->rx_pending;
680 return 0;
681 }
682
683 mutex_lock(&lif->queue_lock);
684 err = ionic_reconfigure_queues(lif, &qparam);
685 mutex_unlock(&lif->queue_lock);
686 if (err)
687 netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err);
688
689 return err;
690 }
691
ionic_get_channels(struct net_device * netdev,struct ethtool_channels * ch)692 static void ionic_get_channels(struct net_device *netdev,
693 struct ethtool_channels *ch)
694 {
695 struct ionic_lif *lif = netdev_priv(netdev);
696
697 /* report maximum channels */
698 ch->max_combined = lif->ionic->ntxqs_per_lif;
699 ch->max_rx = lif->ionic->ntxqs_per_lif / 2;
700 ch->max_tx = lif->ionic->ntxqs_per_lif / 2;
701
702 /* report current channels */
703 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) {
704 ch->rx_count = lif->nxqs;
705 ch->tx_count = lif->nxqs;
706 } else {
707 ch->combined_count = lif->nxqs;
708 }
709 }
710
ionic_set_channels(struct net_device * netdev,struct ethtool_channels * ch)711 static int ionic_set_channels(struct net_device *netdev,
712 struct ethtool_channels *ch)
713 {
714 struct ionic_lif *lif = netdev_priv(netdev);
715 struct ionic_queue_params qparam;
716 int max_cnt;
717 int err;
718
719 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
720 return -EBUSY;
721
722 ionic_init_queue_params(lif, &qparam);
723
724 if (ch->rx_count != ch->tx_count) {
725 netdev_info(netdev, "The rx and tx count must be equal\n");
726 return -EINVAL;
727 }
728
729 if (ch->combined_count && ch->rx_count) {
730 netdev_info(netdev, "Use either combined or rx and tx, not both\n");
731 return -EINVAL;
732 }
733
734 max_cnt = lif->ionic->ntxqs_per_lif;
735 if (ch->combined_count) {
736 if (ch->combined_count > max_cnt)
737 return -EINVAL;
738
739 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
740 netdev_info(lif->netdev, "Sharing queue interrupts\n");
741 else if (ch->combined_count == lif->nxqs)
742 return 0;
743
744 if (lif->nxqs != ch->combined_count)
745 netdev_info(netdev, "Changing queue count from %d to %d\n",
746 lif->nxqs, ch->combined_count);
747
748 qparam.nxqs = ch->combined_count;
749 qparam.intr_split = false;
750 } else {
751 max_cnt /= 2;
752 if (ch->rx_count > max_cnt)
753 return -EINVAL;
754
755 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
756 netdev_info(lif->netdev, "Splitting queue interrupts\n");
757 else if (ch->rx_count == lif->nxqs)
758 return 0;
759
760 if (lif->nxqs != ch->rx_count)
761 netdev_info(netdev, "Changing queue count from %d to %d\n",
762 lif->nxqs, ch->rx_count);
763
764 qparam.nxqs = ch->rx_count;
765 qparam.intr_split = true;
766 }
767
768 err = ionic_validate_cmb_config(lif, &qparam);
769 if (err < 0)
770 return err;
771
772 /* if we're not running, just set the values and return */
773 if (!netif_running(lif->netdev)) {
774 lif->nxqs = qparam.nxqs;
775
776 if (qparam.intr_split) {
777 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
778 } else {
779 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
780 lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
781 lif->tx_coalesce_hw = lif->rx_coalesce_hw;
782 }
783 return 0;
784 }
785
786 mutex_lock(&lif->queue_lock);
787 err = ionic_reconfigure_queues(lif, &qparam);
788 mutex_unlock(&lif->queue_lock);
789 if (err)
790 netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err);
791
792 return err;
793 }
794
ionic_get_rxnfc(struct net_device * netdev,struct ethtool_rxnfc * info,u32 * rules)795 static int ionic_get_rxnfc(struct net_device *netdev,
796 struct ethtool_rxnfc *info, u32 *rules)
797 {
798 struct ionic_lif *lif = netdev_priv(netdev);
799 int err = 0;
800
801 switch (info->cmd) {
802 case ETHTOOL_GRXRINGS:
803 info->data = lif->nxqs;
804 break;
805 default:
806 netdev_dbg(netdev, "Command parameter %d is not supported\n",
807 info->cmd);
808 err = -EOPNOTSUPP;
809 }
810
811 return err;
812 }
813
ionic_get_rxfh_indir_size(struct net_device * netdev)814 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev)
815 {
816 struct ionic_lif *lif = netdev_priv(netdev);
817
818 return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
819 }
820
ionic_get_rxfh_key_size(struct net_device * netdev)821 static u32 ionic_get_rxfh_key_size(struct net_device *netdev)
822 {
823 return IONIC_RSS_HASH_KEY_SIZE;
824 }
825
ionic_get_rxfh(struct net_device * netdev,u32 * indir,u8 * key,u8 * hfunc)826 static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
827 u8 *hfunc)
828 {
829 struct ionic_lif *lif = netdev_priv(netdev);
830 unsigned int i, tbl_sz;
831
832 if (indir) {
833 tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
834 for (i = 0; i < tbl_sz; i++)
835 indir[i] = lif->rss_ind_tbl[i];
836 }
837
838 if (key)
839 memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE);
840
841 if (hfunc)
842 *hfunc = ETH_RSS_HASH_TOP;
843
844 return 0;
845 }
846
ionic_set_rxfh(struct net_device * netdev,const u32 * indir,const u8 * key,const u8 hfunc)847 static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir,
848 const u8 *key, const u8 hfunc)
849 {
850 struct ionic_lif *lif = netdev_priv(netdev);
851
852 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
853 return -EOPNOTSUPP;
854
855 return ionic_lif_rss_config(lif, lif->rss_types, key, indir);
856 }
857
ionic_set_tunable(struct net_device * dev,const struct ethtool_tunable * tuna,const void * data)858 static int ionic_set_tunable(struct net_device *dev,
859 const struct ethtool_tunable *tuna,
860 const void *data)
861 {
862 struct ionic_lif *lif = netdev_priv(dev);
863
864 switch (tuna->id) {
865 case ETHTOOL_RX_COPYBREAK:
866 lif->rx_copybreak = *(u32 *)data;
867 break;
868 default:
869 return -EOPNOTSUPP;
870 }
871
872 return 0;
873 }
874
ionic_get_tunable(struct net_device * netdev,const struct ethtool_tunable * tuna,void * data)875 static int ionic_get_tunable(struct net_device *netdev,
876 const struct ethtool_tunable *tuna, void *data)
877 {
878 struct ionic_lif *lif = netdev_priv(netdev);
879
880 switch (tuna->id) {
881 case ETHTOOL_RX_COPYBREAK:
882 *(u32 *)data = lif->rx_copybreak;
883 break;
884 default:
885 return -EOPNOTSUPP;
886 }
887
888 return 0;
889 }
890
ionic_get_module_info(struct net_device * netdev,struct ethtool_modinfo * modinfo)891 static int ionic_get_module_info(struct net_device *netdev,
892 struct ethtool_modinfo *modinfo)
893
894 {
895 struct ionic_lif *lif = netdev_priv(netdev);
896 struct ionic_dev *idev = &lif->ionic->idev;
897 struct ionic_xcvr_status *xcvr;
898 struct sfp_eeprom_base *sfp;
899
900 xcvr = &idev->port_info->status.xcvr;
901 sfp = (struct sfp_eeprom_base *) xcvr->sprom;
902
903 /* report the module data type and length */
904 switch (sfp->phys_id) {
905 case SFF8024_ID_SFP:
906 modinfo->type = ETH_MODULE_SFF_8079;
907 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
908 break;
909 case SFF8024_ID_QSFP_8436_8636:
910 case SFF8024_ID_QSFP28_8636:
911 modinfo->type = ETH_MODULE_SFF_8436;
912 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
913 break;
914 default:
915 netdev_info(netdev, "unknown xcvr type 0x%02x\n",
916 xcvr->sprom[0]);
917 modinfo->type = 0;
918 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
919 break;
920 }
921
922 return 0;
923 }
924
ionic_get_module_eeprom(struct net_device * netdev,struct ethtool_eeprom * ee,u8 * data)925 static int ionic_get_module_eeprom(struct net_device *netdev,
926 struct ethtool_eeprom *ee,
927 u8 *data)
928 {
929 struct ionic_lif *lif = netdev_priv(netdev);
930 struct ionic_dev *idev = &lif->ionic->idev;
931 struct ionic_xcvr_status *xcvr;
932 char tbuf[sizeof(xcvr->sprom)];
933 int count = 10;
934 u32 len;
935
936 /* The NIC keeps the module prom up-to-date in the DMA space
937 * so we can simply copy the module bytes into the data buffer.
938 */
939 xcvr = &idev->port_info->status.xcvr;
940 len = min_t(u32, sizeof(xcvr->sprom), ee->len);
941
942 do {
943 memcpy(data, xcvr->sprom, len);
944 memcpy(tbuf, xcvr->sprom, len);
945
946 /* Let's make sure we got a consistent copy */
947 if (!memcmp(data, tbuf, len))
948 break;
949
950 } while (--count);
951
952 if (!count)
953 return -ETIMEDOUT;
954
955 return 0;
956 }
957
ionic_get_ts_info(struct net_device * netdev,struct ethtool_ts_info * info)958 static int ionic_get_ts_info(struct net_device *netdev,
959 struct ethtool_ts_info *info)
960 {
961 struct ionic_lif *lif = netdev_priv(netdev);
962 struct ionic *ionic = lif->ionic;
963 __le64 mask;
964
965 if (!lif->phc || !lif->phc->ptp)
966 return ethtool_op_get_ts_info(netdev, info);
967
968 info->phc_index = ptp_clock_index(lif->phc->ptp);
969
970 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
971 SOF_TIMESTAMPING_RX_SOFTWARE |
972 SOF_TIMESTAMPING_SOFTWARE |
973 SOF_TIMESTAMPING_TX_HARDWARE |
974 SOF_TIMESTAMPING_RX_HARDWARE |
975 SOF_TIMESTAMPING_RAW_HARDWARE;
976
977 /* tx modes */
978
979 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
980 BIT(HWTSTAMP_TX_ON);
981
982 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC));
983 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
984 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
985
986 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P));
987 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
988 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P);
989
990 /* rx filters */
991
992 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
993 BIT(HWTSTAMP_FILTER_ALL);
994
995 mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL);
996 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
997 info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL);
998
999 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC);
1000 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1001 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC);
1002
1003 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ);
1004 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1005 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);
1006
1007 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL);
1008 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1009 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT);
1010
1011 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC);
1012 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1013 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC);
1014
1015 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ);
1016 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1017 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1018
1019 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL);
1020 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1021 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
1022
1023 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC);
1024 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1025 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC);
1026
1027 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ);
1028 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1029 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1030
1031 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL);
1032 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1033 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
1034
1035 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC);
1036 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1037 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC);
1038
1039 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ);
1040 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1041 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
1042
1043 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL);
1044 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1045 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
1046
1047 return 0;
1048 }
1049
ionic_nway_reset(struct net_device * netdev)1050 static int ionic_nway_reset(struct net_device *netdev)
1051 {
1052 struct ionic_lif *lif = netdev_priv(netdev);
1053 struct ionic *ionic = lif->ionic;
1054 int err = 0;
1055
1056 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
1057 return -EBUSY;
1058
1059 /* flap the link to force auto-negotiation */
1060
1061 mutex_lock(&ionic->dev_cmd_lock);
1062
1063 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN);
1064 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
1065
1066 if (!err) {
1067 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
1068 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
1069 }
1070
1071 mutex_unlock(&ionic->dev_cmd_lock);
1072
1073 return err;
1074 }
1075
1076 static const struct ethtool_ops ionic_ethtool_ops = {
1077 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1078 ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
1079 ETHTOOL_COALESCE_USE_ADAPTIVE_TX,
1080 .supported_ring_params = ETHTOOL_RING_USE_TX_PUSH |
1081 ETHTOOL_RING_USE_RX_PUSH,
1082 .get_drvinfo = ionic_get_drvinfo,
1083 .get_regs_len = ionic_get_regs_len,
1084 .get_regs = ionic_get_regs,
1085 .get_link = ethtool_op_get_link,
1086 .get_link_ext_stats = ionic_get_link_ext_stats,
1087 .get_link_ksettings = ionic_get_link_ksettings,
1088 .set_link_ksettings = ionic_set_link_ksettings,
1089 .get_coalesce = ionic_get_coalesce,
1090 .set_coalesce = ionic_set_coalesce,
1091 .get_ringparam = ionic_get_ringparam,
1092 .set_ringparam = ionic_set_ringparam,
1093 .get_channels = ionic_get_channels,
1094 .set_channels = ionic_set_channels,
1095 .get_strings = ionic_get_strings,
1096 .get_ethtool_stats = ionic_get_stats,
1097 .get_sset_count = ionic_get_sset_count,
1098 .get_rxnfc = ionic_get_rxnfc,
1099 .get_rxfh_indir_size = ionic_get_rxfh_indir_size,
1100 .get_rxfh_key_size = ionic_get_rxfh_key_size,
1101 .get_rxfh = ionic_get_rxfh,
1102 .set_rxfh = ionic_set_rxfh,
1103 .get_tunable = ionic_get_tunable,
1104 .set_tunable = ionic_set_tunable,
1105 .get_module_info = ionic_get_module_info,
1106 .get_module_eeprom = ionic_get_module_eeprom,
1107 .get_pauseparam = ionic_get_pauseparam,
1108 .set_pauseparam = ionic_set_pauseparam,
1109 .get_fecparam = ionic_get_fecparam,
1110 .set_fecparam = ionic_set_fecparam,
1111 .get_ts_info = ionic_get_ts_info,
1112 .nway_reset = ionic_nway_reset,
1113 };
1114
ionic_ethtool_set_ops(struct net_device * netdev)1115 void ionic_ethtool_set_ops(struct net_device *netdev)
1116 {
1117 netdev->ethtool_ops = &ionic_ethtool_ops;
1118 }
1119