1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3 
4 #include <linux/module.h>
5 #include <linux/netdevice.h>
6 #include <linux/sfp.h>
7 
8 #include "ionic.h"
9 #include "ionic_bus.h"
10 #include "ionic_lif.h"
11 #include "ionic_ethtool.h"
12 #include "ionic_stats.h"
13 
14 static const char ionic_priv_flags_strings[][ETH_GSTRING_LEN] = {
15 #define IONIC_PRIV_F_SW_DBG_STATS	BIT(0)
16 	"sw-dbg-stats",
17 };
18 
19 #define IONIC_PRIV_FLAGS_COUNT ARRAY_SIZE(ionic_priv_flags_strings)
20 
21 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf)
22 {
23 	u32 i;
24 
25 	for (i = 0; i < ionic_num_stats_grps; i++)
26 		ionic_stats_groups[i].get_strings(lif, &buf);
27 }
28 
29 static void ionic_get_stats(struct net_device *netdev,
30 			    struct ethtool_stats *stats, u64 *buf)
31 {
32 	struct ionic_lif *lif = netdev_priv(netdev);
33 	u32 i;
34 
35 	memset(buf, 0, stats->n_stats * sizeof(*buf));
36 	for (i = 0; i < ionic_num_stats_grps; i++)
37 		ionic_stats_groups[i].get_values(lif, &buf);
38 }
39 
40 static int ionic_get_stats_count(struct ionic_lif *lif)
41 {
42 	int i, num_stats = 0;
43 
44 	for (i = 0; i < ionic_num_stats_grps; i++)
45 		num_stats += ionic_stats_groups[i].get_count(lif);
46 
47 	return num_stats;
48 }
49 
50 static int ionic_get_sset_count(struct net_device *netdev, int sset)
51 {
52 	struct ionic_lif *lif = netdev_priv(netdev);
53 	int count = 0;
54 
55 	switch (sset) {
56 	case ETH_SS_STATS:
57 		count = ionic_get_stats_count(lif);
58 		break;
59 	case ETH_SS_PRIV_FLAGS:
60 		count = IONIC_PRIV_FLAGS_COUNT;
61 		break;
62 	}
63 	return count;
64 }
65 
66 static void ionic_get_strings(struct net_device *netdev,
67 			      u32 sset, u8 *buf)
68 {
69 	struct ionic_lif *lif = netdev_priv(netdev);
70 
71 	switch (sset) {
72 	case ETH_SS_STATS:
73 		ionic_get_stats_strings(lif, buf);
74 		break;
75 	case ETH_SS_PRIV_FLAGS:
76 		memcpy(buf, ionic_priv_flags_strings,
77 		       IONIC_PRIV_FLAGS_COUNT * ETH_GSTRING_LEN);
78 		break;
79 	}
80 }
81 
82 static void ionic_get_drvinfo(struct net_device *netdev,
83 			      struct ethtool_drvinfo *drvinfo)
84 {
85 	struct ionic_lif *lif = netdev_priv(netdev);
86 	struct ionic *ionic = lif->ionic;
87 
88 	strlcpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver));
89 	strlcpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version,
90 		sizeof(drvinfo->fw_version));
91 	strlcpy(drvinfo->bus_info, ionic_bus_info(ionic),
92 		sizeof(drvinfo->bus_info));
93 }
94 
95 static int ionic_get_regs_len(struct net_device *netdev)
96 {
97 	return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32);
98 }
99 
100 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
101 			   void *p)
102 {
103 	struct ionic_lif *lif = netdev_priv(netdev);
104 	unsigned int offset;
105 	unsigned int size;
106 
107 	regs->version = IONIC_DEV_CMD_REG_VERSION;
108 
109 	offset = 0;
110 	size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
111 	memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
112 
113 	offset += size;
114 	size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
115 	memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size);
116 }
117 
118 static int ionic_get_link_ksettings(struct net_device *netdev,
119 				    struct ethtool_link_ksettings *ks)
120 {
121 	struct ionic_lif *lif = netdev_priv(netdev);
122 	struct ionic_dev *idev = &lif->ionic->idev;
123 	int copper_seen = 0;
124 
125 	ethtool_link_ksettings_zero_link_mode(ks, supported);
126 
127 	if (!idev->port_info) {
128 		netdev_err(netdev, "port_info not initialized\n");
129 		return -EOPNOTSUPP;
130 	}
131 
132 	/* The port_info data is found in a DMA space that the NIC keeps
133 	 * up-to-date, so there's no need to request the data from the
134 	 * NIC, we already have it in our memory space.
135 	 */
136 
137 	switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) {
138 		/* Copper */
139 	case IONIC_XCVR_PID_QSFP_100G_CR4:
140 		ethtool_link_ksettings_add_link_mode(ks, supported,
141 						     100000baseCR4_Full);
142 		copper_seen++;
143 		break;
144 	case IONIC_XCVR_PID_QSFP_40GBASE_CR4:
145 		ethtool_link_ksettings_add_link_mode(ks, supported,
146 						     40000baseCR4_Full);
147 		copper_seen++;
148 		break;
149 	case IONIC_XCVR_PID_SFP_25GBASE_CR_S:
150 	case IONIC_XCVR_PID_SFP_25GBASE_CR_L:
151 	case IONIC_XCVR_PID_SFP_25GBASE_CR_N:
152 		ethtool_link_ksettings_add_link_mode(ks, supported,
153 						     25000baseCR_Full);
154 		copper_seen++;
155 		break;
156 	case IONIC_XCVR_PID_SFP_10GBASE_AOC:
157 	case IONIC_XCVR_PID_SFP_10GBASE_CU:
158 		ethtool_link_ksettings_add_link_mode(ks, supported,
159 						     10000baseCR_Full);
160 		copper_seen++;
161 		break;
162 
163 		/* Fibre */
164 	case IONIC_XCVR_PID_QSFP_100G_SR4:
165 	case IONIC_XCVR_PID_QSFP_100G_AOC:
166 		ethtool_link_ksettings_add_link_mode(ks, supported,
167 						     100000baseSR4_Full);
168 		break;
169 	case IONIC_XCVR_PID_QSFP_100G_CWDM4:
170 	case IONIC_XCVR_PID_QSFP_100G_PSM4:
171 	case IONIC_XCVR_PID_QSFP_100G_LR4:
172 		ethtool_link_ksettings_add_link_mode(ks, supported,
173 						     100000baseLR4_ER4_Full);
174 		break;
175 	case IONIC_XCVR_PID_QSFP_100G_ER4:
176 		ethtool_link_ksettings_add_link_mode(ks, supported,
177 						     100000baseLR4_ER4_Full);
178 		break;
179 	case IONIC_XCVR_PID_QSFP_40GBASE_SR4:
180 	case IONIC_XCVR_PID_QSFP_40GBASE_AOC:
181 		ethtool_link_ksettings_add_link_mode(ks, supported,
182 						     40000baseSR4_Full);
183 		break;
184 	case IONIC_XCVR_PID_QSFP_40GBASE_LR4:
185 		ethtool_link_ksettings_add_link_mode(ks, supported,
186 						     40000baseLR4_Full);
187 		break;
188 	case IONIC_XCVR_PID_SFP_25GBASE_SR:
189 	case IONIC_XCVR_PID_SFP_25GBASE_AOC:
190 	case IONIC_XCVR_PID_SFP_25GBASE_ACC:
191 		ethtool_link_ksettings_add_link_mode(ks, supported,
192 						     25000baseSR_Full);
193 		break;
194 	case IONIC_XCVR_PID_SFP_10GBASE_SR:
195 		ethtool_link_ksettings_add_link_mode(ks, supported,
196 						     10000baseSR_Full);
197 		break;
198 	case IONIC_XCVR_PID_SFP_10GBASE_LR:
199 		ethtool_link_ksettings_add_link_mode(ks, supported,
200 						     10000baseLR_Full);
201 		break;
202 	case IONIC_XCVR_PID_SFP_10GBASE_LRM:
203 		ethtool_link_ksettings_add_link_mode(ks, supported,
204 						     10000baseLRM_Full);
205 		break;
206 	case IONIC_XCVR_PID_SFP_10GBASE_ER:
207 		ethtool_link_ksettings_add_link_mode(ks, supported,
208 						     10000baseER_Full);
209 		break;
210 	case IONIC_XCVR_PID_SFP_10GBASE_T:
211 		ethtool_link_ksettings_add_link_mode(ks, supported,
212 						     10000baseT_Full);
213 		break;
214 	case IONIC_XCVR_PID_SFP_1000BASE_T:
215 		ethtool_link_ksettings_add_link_mode(ks, supported,
216 						     1000baseT_Full);
217 		break;
218 	case IONIC_XCVR_PID_UNKNOWN:
219 		/* This means there's no module plugged in */
220 		break;
221 	default:
222 		dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n",
223 			 idev->port_info->status.xcvr.pid,
224 			 idev->port_info->status.xcvr.pid);
225 		break;
226 	}
227 
228 	bitmap_copy(ks->link_modes.advertising, ks->link_modes.supported,
229 		    __ETHTOOL_LINK_MODE_MASK_NBITS);
230 
231 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
232 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
233 	if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC)
234 		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER);
235 	else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS)
236 		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
237 
238 	ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
239 	ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
240 
241 	if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER ||
242 	    copper_seen)
243 		ks->base.port = PORT_DA;
244 	else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER)
245 		ks->base.port = PORT_FIBRE;
246 	else
247 		ks->base.port = PORT_NONE;
248 
249 	if (ks->base.port != PORT_NONE) {
250 		ks->base.speed = le32_to_cpu(lif->info->status.link_speed);
251 
252 		if (le16_to_cpu(lif->info->status.link_status))
253 			ks->base.duplex = DUPLEX_FULL;
254 		else
255 			ks->base.duplex = DUPLEX_UNKNOWN;
256 
257 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
258 
259 		if (idev->port_info->config.an_enable) {
260 			ethtool_link_ksettings_add_link_mode(ks, advertising,
261 							     Autoneg);
262 			ks->base.autoneg = AUTONEG_ENABLE;
263 		}
264 	}
265 
266 	return 0;
267 }
268 
269 static int ionic_set_link_ksettings(struct net_device *netdev,
270 				    const struct ethtool_link_ksettings *ks)
271 {
272 	struct ionic_lif *lif = netdev_priv(netdev);
273 	struct ionic_dev *idev = &lif->ionic->idev;
274 	struct ionic *ionic = lif->ionic;
275 	int err = 0;
276 
277 	/* set autoneg */
278 	if (ks->base.autoneg != idev->port_info->config.an_enable) {
279 		mutex_lock(&ionic->dev_cmd_lock);
280 		ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg);
281 		err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
282 		mutex_unlock(&ionic->dev_cmd_lock);
283 		if (err)
284 			return err;
285 	}
286 
287 	/* set speed */
288 	if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) {
289 		mutex_lock(&ionic->dev_cmd_lock);
290 		ionic_dev_cmd_port_speed(idev, ks->base.speed);
291 		err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
292 		mutex_unlock(&ionic->dev_cmd_lock);
293 		if (err)
294 			return err;
295 	}
296 
297 	return 0;
298 }
299 
300 static void ionic_get_pauseparam(struct net_device *netdev,
301 				 struct ethtool_pauseparam *pause)
302 {
303 	struct ionic_lif *lif = netdev_priv(netdev);
304 	u8 pause_type;
305 
306 	pause->autoneg = 0;
307 
308 	pause_type = lif->ionic->idev.port_info->config.pause_type;
309 	if (pause_type) {
310 		pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0;
311 		pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0;
312 	}
313 }
314 
315 static int ionic_set_pauseparam(struct net_device *netdev,
316 				struct ethtool_pauseparam *pause)
317 {
318 	struct ionic_lif *lif = netdev_priv(netdev);
319 	struct ionic *ionic = lif->ionic;
320 	u32 requested_pause;
321 	int err;
322 
323 	if (pause->autoneg)
324 		return -EOPNOTSUPP;
325 
326 	/* change both at the same time */
327 	requested_pause = IONIC_PORT_PAUSE_TYPE_LINK;
328 	if (pause->rx_pause)
329 		requested_pause |= IONIC_PAUSE_F_RX;
330 	if (pause->tx_pause)
331 		requested_pause |= IONIC_PAUSE_F_TX;
332 
333 	if (requested_pause == lif->ionic->idev.port_info->config.pause_type)
334 		return 0;
335 
336 	mutex_lock(&ionic->dev_cmd_lock);
337 	ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause);
338 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
339 	mutex_unlock(&ionic->dev_cmd_lock);
340 	if (err)
341 		return err;
342 
343 	return 0;
344 }
345 
346 static int ionic_get_fecparam(struct net_device *netdev,
347 			      struct ethtool_fecparam *fec)
348 {
349 	struct ionic_lif *lif = netdev_priv(netdev);
350 
351 	switch (lif->ionic->idev.port_info->config.fec_type) {
352 	case IONIC_PORT_FEC_TYPE_NONE:
353 		fec->active_fec = ETHTOOL_FEC_OFF;
354 		break;
355 	case IONIC_PORT_FEC_TYPE_RS:
356 		fec->active_fec = ETHTOOL_FEC_RS;
357 		break;
358 	case IONIC_PORT_FEC_TYPE_FC:
359 		fec->active_fec = ETHTOOL_FEC_BASER;
360 		break;
361 	}
362 
363 	fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER;
364 
365 	return 0;
366 }
367 
368 static int ionic_set_fecparam(struct net_device *netdev,
369 			      struct ethtool_fecparam *fec)
370 {
371 	struct ionic_lif *lif = netdev_priv(netdev);
372 	u8 fec_type;
373 	int ret = 0;
374 
375 	if (lif->ionic->idev.port_info->config.an_enable) {
376 		netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n");
377 		return -EINVAL;
378 	}
379 
380 	switch (fec->fec) {
381 	case ETHTOOL_FEC_NONE:
382 		fec_type = IONIC_PORT_FEC_TYPE_NONE;
383 		break;
384 	case ETHTOOL_FEC_OFF:
385 		fec_type = IONIC_PORT_FEC_TYPE_NONE;
386 		break;
387 	case ETHTOOL_FEC_RS:
388 		fec_type = IONIC_PORT_FEC_TYPE_RS;
389 		break;
390 	case ETHTOOL_FEC_BASER:
391 		fec_type = IONIC_PORT_FEC_TYPE_FC;
392 		break;
393 	case ETHTOOL_FEC_AUTO:
394 	default:
395 		netdev_err(netdev, "FEC request 0x%04x not supported\n",
396 			   fec->fec);
397 		return -EINVAL;
398 	}
399 
400 	if (fec_type != lif->ionic->idev.port_info->config.fec_type) {
401 		mutex_lock(&lif->ionic->dev_cmd_lock);
402 		ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type);
403 		ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT);
404 		mutex_unlock(&lif->ionic->dev_cmd_lock);
405 	}
406 
407 	return ret;
408 }
409 
410 static int ionic_get_coalesce(struct net_device *netdev,
411 			      struct ethtool_coalesce *coalesce)
412 {
413 	struct ionic_lif *lif = netdev_priv(netdev);
414 
415 	coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs;
416 	coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs;
417 
418 	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
419 		coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
420 	else
421 		coalesce->use_adaptive_tx_coalesce = 0;
422 
423 	coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
424 
425 	return 0;
426 }
427 
428 static int ionic_set_coalesce(struct net_device *netdev,
429 			      struct ethtool_coalesce *coalesce)
430 {
431 	struct ionic_lif *lif = netdev_priv(netdev);
432 	struct ionic_identity *ident;
433 	u32 rx_coal, rx_dim;
434 	u32 tx_coal, tx_dim;
435 	unsigned int i;
436 
437 	ident = &lif->ionic->ident;
438 	if (ident->dev.intr_coal_div == 0) {
439 		netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n",
440 			    ident->dev.intr_coal_div);
441 		return -EIO;
442 	}
443 
444 	/* Tx normally shares Rx interrupt, so only change Rx if not split */
445 	if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) &&
446 	    (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs ||
447 	     coalesce->use_adaptive_tx_coalesce)) {
448 		netdev_warn(netdev, "only rx parameters can be changed\n");
449 		return -EINVAL;
450 	}
451 
452 	/* Convert the usec request to a HW usable value.  If they asked
453 	 * for non-zero and it resolved to zero, bump it up
454 	 */
455 	rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs);
456 	if (!rx_coal && coalesce->rx_coalesce_usecs)
457 		rx_coal = 1;
458 	tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs);
459 	if (!tx_coal && coalesce->tx_coalesce_usecs)
460 		tx_coal = 1;
461 
462 	if (rx_coal > IONIC_INTR_CTRL_COAL_MAX ||
463 	    tx_coal > IONIC_INTR_CTRL_COAL_MAX)
464 		return -ERANGE;
465 
466 	/* Save the new values */
467 	lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs;
468 	lif->rx_coalesce_hw = rx_coal;
469 
470 	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
471 		lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs;
472 	else
473 		lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs;
474 	lif->tx_coalesce_hw = tx_coal;
475 
476 	if (coalesce->use_adaptive_rx_coalesce) {
477 		set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
478 		rx_dim = rx_coal;
479 	} else {
480 		clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
481 		rx_dim = 0;
482 	}
483 
484 	if (coalesce->use_adaptive_tx_coalesce) {
485 		set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
486 		tx_dim = tx_coal;
487 	} else {
488 		clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
489 		tx_dim = 0;
490 	}
491 
492 	if (test_bit(IONIC_LIF_F_UP, lif->state)) {
493 		for (i = 0; i < lif->nxqs; i++) {
494 			if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) {
495 				ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
496 						     lif->rxqcqs[i]->intr.index,
497 						     lif->rx_coalesce_hw);
498 				lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim;
499 			}
500 
501 			if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) {
502 				ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
503 						     lif->txqcqs[i]->intr.index,
504 						     lif->tx_coalesce_hw);
505 				lif->txqcqs[i]->intr.dim_coal_hw = tx_dim;
506 			}
507 		}
508 	}
509 
510 	return 0;
511 }
512 
513 static void ionic_get_ringparam(struct net_device *netdev,
514 				struct ethtool_ringparam *ring)
515 {
516 	struct ionic_lif *lif = netdev_priv(netdev);
517 
518 	ring->tx_max_pending = IONIC_MAX_TX_DESC;
519 	ring->tx_pending = lif->ntxq_descs;
520 	ring->rx_max_pending = IONIC_MAX_RX_DESC;
521 	ring->rx_pending = lif->nrxq_descs;
522 }
523 
524 static int ionic_set_ringparam(struct net_device *netdev,
525 			       struct ethtool_ringparam *ring)
526 {
527 	struct ionic_lif *lif = netdev_priv(netdev);
528 	struct ionic_queue_params qparam;
529 	int err;
530 
531 	ionic_init_queue_params(lif, &qparam);
532 
533 	if (ring->rx_mini_pending || ring->rx_jumbo_pending) {
534 		netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");
535 		return -EINVAL;
536 	}
537 
538 	if (!is_power_of_2(ring->tx_pending) ||
539 	    !is_power_of_2(ring->rx_pending)) {
540 		netdev_info(netdev, "Descriptor count must be a power of 2\n");
541 		return -EINVAL;
542 	}
543 
544 	/* if nothing to do return success */
545 	if (ring->tx_pending == lif->ntxq_descs &&
546 	    ring->rx_pending == lif->nrxq_descs)
547 		return 0;
548 
549 	if (ring->tx_pending != lif->ntxq_descs)
550 		netdev_info(netdev, "Changing Tx ring size from %d to %d\n",
551 			    lif->ntxq_descs, ring->tx_pending);
552 
553 	if (ring->rx_pending != lif->nrxq_descs)
554 		netdev_info(netdev, "Changing Rx ring size from %d to %d\n",
555 			    lif->nrxq_descs, ring->rx_pending);
556 
557 	/* if we're not running, just set the values and return */
558 	if (!netif_running(lif->netdev)) {
559 		lif->ntxq_descs = ring->tx_pending;
560 		lif->nrxq_descs = ring->rx_pending;
561 		return 0;
562 	}
563 
564 	qparam.ntxq_descs = ring->tx_pending;
565 	qparam.nrxq_descs = ring->rx_pending;
566 	err = ionic_reconfigure_queues(lif, &qparam);
567 	if (err)
568 		netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err);
569 
570 	return err;
571 }
572 
573 static void ionic_get_channels(struct net_device *netdev,
574 			       struct ethtool_channels *ch)
575 {
576 	struct ionic_lif *lif = netdev_priv(netdev);
577 
578 	/* report maximum channels */
579 	ch->max_combined = lif->ionic->ntxqs_per_lif;
580 	ch->max_rx = lif->ionic->ntxqs_per_lif / 2;
581 	ch->max_tx = lif->ionic->ntxqs_per_lif / 2;
582 
583 	/* report current channels */
584 	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) {
585 		ch->rx_count = lif->nxqs;
586 		ch->tx_count = lif->nxqs;
587 	} else {
588 		ch->combined_count = lif->nxqs;
589 	}
590 }
591 
592 static int ionic_set_channels(struct net_device *netdev,
593 			      struct ethtool_channels *ch)
594 {
595 	struct ionic_lif *lif = netdev_priv(netdev);
596 	struct ionic_queue_params qparam;
597 	int max_cnt;
598 	int err;
599 
600 	ionic_init_queue_params(lif, &qparam);
601 
602 	if (ch->rx_count != ch->tx_count) {
603 		netdev_info(netdev, "The rx and tx count must be equal\n");
604 		return -EINVAL;
605 	}
606 
607 	if (ch->combined_count && ch->rx_count) {
608 		netdev_info(netdev, "Use either combined or rx and tx, not both\n");
609 		return -EINVAL;
610 	}
611 
612 	max_cnt = lif->ionic->ntxqs_per_lif;
613 	if (ch->combined_count) {
614 		if (ch->combined_count > max_cnt)
615 			return -EINVAL;
616 
617 		if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
618 			netdev_info(lif->netdev, "Sharing queue interrupts\n");
619 		else if (ch->combined_count == lif->nxqs)
620 			return 0;
621 
622 		if (lif->nxqs != ch->combined_count)
623 			netdev_info(netdev, "Changing queue count from %d to %d\n",
624 				    lif->nxqs, ch->combined_count);
625 
626 		qparam.nxqs = ch->combined_count;
627 		qparam.intr_split = 0;
628 	} else {
629 		max_cnt /= 2;
630 		if (ch->rx_count > max_cnt)
631 			return -EINVAL;
632 
633 		if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
634 			netdev_info(lif->netdev, "Splitting queue interrupts\n");
635 		else if (ch->rx_count == lif->nxqs)
636 			return 0;
637 
638 		if (lif->nxqs != ch->rx_count)
639 			netdev_info(netdev, "Changing queue count from %d to %d\n",
640 				    lif->nxqs, ch->rx_count);
641 
642 		qparam.nxqs = ch->rx_count;
643 		qparam.intr_split = 1;
644 	}
645 
646 	/* if we're not running, just set the values and return */
647 	if (!netif_running(lif->netdev)) {
648 		lif->nxqs = qparam.nxqs;
649 
650 		if (qparam.intr_split) {
651 			set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
652 		} else {
653 			clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
654 			lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
655 			lif->tx_coalesce_hw = lif->rx_coalesce_hw;
656 		}
657 		return 0;
658 	}
659 
660 	err = ionic_reconfigure_queues(lif, &qparam);
661 	if (err)
662 		netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err);
663 
664 	return err;
665 }
666 
667 static u32 ionic_get_priv_flags(struct net_device *netdev)
668 {
669 	struct ionic_lif *lif = netdev_priv(netdev);
670 	u32 priv_flags = 0;
671 
672 	if (test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state))
673 		priv_flags |= IONIC_PRIV_F_SW_DBG_STATS;
674 
675 	return priv_flags;
676 }
677 
678 static int ionic_set_priv_flags(struct net_device *netdev, u32 priv_flags)
679 {
680 	struct ionic_lif *lif = netdev_priv(netdev);
681 
682 	clear_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state);
683 	if (priv_flags & IONIC_PRIV_F_SW_DBG_STATS)
684 		set_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state);
685 
686 	return 0;
687 }
688 
689 static int ionic_get_rxnfc(struct net_device *netdev,
690 			   struct ethtool_rxnfc *info, u32 *rules)
691 {
692 	struct ionic_lif *lif = netdev_priv(netdev);
693 	int err = 0;
694 
695 	switch (info->cmd) {
696 	case ETHTOOL_GRXRINGS:
697 		info->data = lif->nxqs;
698 		break;
699 	default:
700 		netdev_err(netdev, "Command parameter %d is not supported\n",
701 			   info->cmd);
702 		err = -EOPNOTSUPP;
703 	}
704 
705 	return err;
706 }
707 
708 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev)
709 {
710 	struct ionic_lif *lif = netdev_priv(netdev);
711 
712 	return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
713 }
714 
715 static u32 ionic_get_rxfh_key_size(struct net_device *netdev)
716 {
717 	return IONIC_RSS_HASH_KEY_SIZE;
718 }
719 
720 static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
721 			  u8 *hfunc)
722 {
723 	struct ionic_lif *lif = netdev_priv(netdev);
724 	unsigned int i, tbl_sz;
725 
726 	if (indir) {
727 		tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
728 		for (i = 0; i < tbl_sz; i++)
729 			indir[i] = lif->rss_ind_tbl[i];
730 	}
731 
732 	if (key)
733 		memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE);
734 
735 	if (hfunc)
736 		*hfunc = ETH_RSS_HASH_TOP;
737 
738 	return 0;
739 }
740 
741 static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir,
742 			  const u8 *key, const u8 hfunc)
743 {
744 	struct ionic_lif *lif = netdev_priv(netdev);
745 
746 	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
747 		return -EOPNOTSUPP;
748 
749 	return ionic_lif_rss_config(lif, lif->rss_types, key, indir);
750 }
751 
752 static int ionic_set_tunable(struct net_device *dev,
753 			     const struct ethtool_tunable *tuna,
754 			     const void *data)
755 {
756 	struct ionic_lif *lif = netdev_priv(dev);
757 
758 	switch (tuna->id) {
759 	case ETHTOOL_RX_COPYBREAK:
760 		lif->rx_copybreak = *(u32 *)data;
761 		break;
762 	default:
763 		return -EOPNOTSUPP;
764 	}
765 
766 	return 0;
767 }
768 
769 static int ionic_get_tunable(struct net_device *netdev,
770 			     const struct ethtool_tunable *tuna, void *data)
771 {
772 	struct ionic_lif *lif = netdev_priv(netdev);
773 
774 	switch (tuna->id) {
775 	case ETHTOOL_RX_COPYBREAK:
776 		*(u32 *)data = lif->rx_copybreak;
777 		break;
778 	default:
779 		return -EOPNOTSUPP;
780 	}
781 
782 	return 0;
783 }
784 
785 static int ionic_get_module_info(struct net_device *netdev,
786 				 struct ethtool_modinfo *modinfo)
787 
788 {
789 	struct ionic_lif *lif = netdev_priv(netdev);
790 	struct ionic_dev *idev = &lif->ionic->idev;
791 	struct ionic_xcvr_status *xcvr;
792 	struct sfp_eeprom_base *sfp;
793 
794 	xcvr = &idev->port_info->status.xcvr;
795 	sfp = (struct sfp_eeprom_base *) xcvr->sprom;
796 
797 	/* report the module data type and length */
798 	switch (sfp->phys_id) {
799 	case SFF8024_ID_SFP:
800 		modinfo->type = ETH_MODULE_SFF_8079;
801 		modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
802 		break;
803 	case SFF8024_ID_QSFP_8436_8636:
804 	case SFF8024_ID_QSFP28_8636:
805 		modinfo->type = ETH_MODULE_SFF_8436;
806 		modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
807 		break;
808 	default:
809 		netdev_info(netdev, "unknown xcvr type 0x%02x\n",
810 			    xcvr->sprom[0]);
811 		modinfo->type = 0;
812 		modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
813 		break;
814 	}
815 
816 	return 0;
817 }
818 
819 static int ionic_get_module_eeprom(struct net_device *netdev,
820 				   struct ethtool_eeprom *ee,
821 				   u8 *data)
822 {
823 	struct ionic_lif *lif = netdev_priv(netdev);
824 	struct ionic_dev *idev = &lif->ionic->idev;
825 	struct ionic_xcvr_status *xcvr;
826 	char tbuf[sizeof(xcvr->sprom)];
827 	int count = 10;
828 	u32 len;
829 
830 	/* The NIC keeps the module prom up-to-date in the DMA space
831 	 * so we can simply copy the module bytes into the data buffer.
832 	 */
833 	xcvr = &idev->port_info->status.xcvr;
834 	len = min_t(u32, sizeof(xcvr->sprom), ee->len);
835 
836 	do {
837 		memcpy(data, xcvr->sprom, len);
838 		memcpy(tbuf, xcvr->sprom, len);
839 
840 		/* Let's make sure we got a consistent copy */
841 		if (!memcmp(data, tbuf, len))
842 			break;
843 
844 	} while (--count);
845 
846 	if (!count)
847 		return -ETIMEDOUT;
848 
849 	return 0;
850 }
851 
852 static int ionic_get_ts_info(struct net_device *netdev,
853 			     struct ethtool_ts_info *info)
854 {
855 	struct ionic_lif *lif = netdev_priv(netdev);
856 	struct ionic *ionic = lif->ionic;
857 	__le64 mask;
858 
859 	if (!lif->phc || !lif->phc->ptp)
860 		return ethtool_op_get_ts_info(netdev, info);
861 
862 	info->phc_index = ptp_clock_index(lif->phc->ptp);
863 
864 	info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
865 				SOF_TIMESTAMPING_RX_SOFTWARE |
866 				SOF_TIMESTAMPING_SOFTWARE |
867 				SOF_TIMESTAMPING_TX_HARDWARE |
868 				SOF_TIMESTAMPING_RX_HARDWARE |
869 				SOF_TIMESTAMPING_RAW_HARDWARE;
870 
871 	/* tx modes */
872 
873 	info->tx_types = BIT(HWTSTAMP_TX_OFF) |
874 			 BIT(HWTSTAMP_TX_ON);
875 
876 	mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC));
877 	if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
878 		info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
879 
880 	mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P));
881 	if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
882 		info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P);
883 
884 	/* rx filters */
885 
886 	info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
887 			   BIT(HWTSTAMP_FILTER_ALL);
888 
889 	mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL);
890 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
891 		info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL);
892 
893 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC);
894 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
895 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC);
896 
897 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ);
898 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
899 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);
900 
901 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL);
902 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
903 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT);
904 
905 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC);
906 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
907 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC);
908 
909 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ);
910 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
911 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
912 
913 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL);
914 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
915 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
916 
917 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC);
918 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
919 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC);
920 
921 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ);
922 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
923 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
924 
925 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL);
926 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
927 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
928 
929 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC);
930 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
931 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC);
932 
933 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ);
934 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
935 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
936 
937 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL);
938 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
939 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
940 
941 	return 0;
942 }
943 
944 static int ionic_nway_reset(struct net_device *netdev)
945 {
946 	struct ionic_lif *lif = netdev_priv(netdev);
947 	struct ionic *ionic = lif->ionic;
948 	int err = 0;
949 
950 	/* flap the link to force auto-negotiation */
951 
952 	mutex_lock(&ionic->dev_cmd_lock);
953 
954 	ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN);
955 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
956 
957 	if (!err) {
958 		ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
959 		err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
960 	}
961 
962 	mutex_unlock(&ionic->dev_cmd_lock);
963 
964 	return err;
965 }
966 
967 static const struct ethtool_ops ionic_ethtool_ops = {
968 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
969 				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
970 				     ETHTOOL_COALESCE_USE_ADAPTIVE_TX,
971 	.get_drvinfo		= ionic_get_drvinfo,
972 	.get_regs_len		= ionic_get_regs_len,
973 	.get_regs		= ionic_get_regs,
974 	.get_link		= ethtool_op_get_link,
975 	.get_link_ksettings	= ionic_get_link_ksettings,
976 	.set_link_ksettings	= ionic_set_link_ksettings,
977 	.get_coalesce		= ionic_get_coalesce,
978 	.set_coalesce		= ionic_set_coalesce,
979 	.get_ringparam		= ionic_get_ringparam,
980 	.set_ringparam		= ionic_set_ringparam,
981 	.get_channels		= ionic_get_channels,
982 	.set_channels		= ionic_set_channels,
983 	.get_strings		= ionic_get_strings,
984 	.get_ethtool_stats	= ionic_get_stats,
985 	.get_sset_count		= ionic_get_sset_count,
986 	.get_priv_flags		= ionic_get_priv_flags,
987 	.set_priv_flags		= ionic_set_priv_flags,
988 	.get_rxnfc		= ionic_get_rxnfc,
989 	.get_rxfh_indir_size	= ionic_get_rxfh_indir_size,
990 	.get_rxfh_key_size	= ionic_get_rxfh_key_size,
991 	.get_rxfh		= ionic_get_rxfh,
992 	.set_rxfh		= ionic_set_rxfh,
993 	.get_tunable		= ionic_get_tunable,
994 	.set_tunable		= ionic_set_tunable,
995 	.get_module_info	= ionic_get_module_info,
996 	.get_module_eeprom	= ionic_get_module_eeprom,
997 	.get_pauseparam		= ionic_get_pauseparam,
998 	.set_pauseparam		= ionic_set_pauseparam,
999 	.get_fecparam		= ionic_get_fecparam,
1000 	.set_fecparam		= ionic_set_fecparam,
1001 	.get_ts_info		= ionic_get_ts_info,
1002 	.nway_reset		= ionic_nway_reset,
1003 };
1004 
1005 void ionic_ethtool_set_ops(struct net_device *netdev)
1006 {
1007 	netdev->ethtool_ops = &ionic_ethtool_ops;
1008 }
1009