1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/module.h> 5 #include <linux/netdevice.h> 6 #include <linux/sfp.h> 7 8 #include "ionic.h" 9 #include "ionic_bus.h" 10 #include "ionic_lif.h" 11 #include "ionic_ethtool.h" 12 #include "ionic_stats.h" 13 14 static const char ionic_priv_flags_strings[][ETH_GSTRING_LEN] = { 15 #define IONIC_PRIV_F_SW_DBG_STATS BIT(0) 16 "sw-dbg-stats", 17 }; 18 19 #define IONIC_PRIV_FLAGS_COUNT ARRAY_SIZE(ionic_priv_flags_strings) 20 21 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf) 22 { 23 u32 i; 24 25 for (i = 0; i < ionic_num_stats_grps; i++) 26 ionic_stats_groups[i].get_strings(lif, &buf); 27 } 28 29 static void ionic_get_stats(struct net_device *netdev, 30 struct ethtool_stats *stats, u64 *buf) 31 { 32 struct ionic_lif *lif; 33 u32 i; 34 35 lif = netdev_priv(netdev); 36 37 memset(buf, 0, stats->n_stats * sizeof(*buf)); 38 for (i = 0; i < ionic_num_stats_grps; i++) 39 ionic_stats_groups[i].get_values(lif, &buf); 40 } 41 42 static int ionic_get_stats_count(struct ionic_lif *lif) 43 { 44 int i, num_stats = 0; 45 46 for (i = 0; i < ionic_num_stats_grps; i++) 47 num_stats += ionic_stats_groups[i].get_count(lif); 48 49 return num_stats; 50 } 51 52 static int ionic_get_sset_count(struct net_device *netdev, int sset) 53 { 54 struct ionic_lif *lif = netdev_priv(netdev); 55 int count = 0; 56 57 switch (sset) { 58 case ETH_SS_STATS: 59 count = ionic_get_stats_count(lif); 60 break; 61 case ETH_SS_PRIV_FLAGS: 62 count = IONIC_PRIV_FLAGS_COUNT; 63 break; 64 } 65 return count; 66 } 67 68 static void ionic_get_strings(struct net_device *netdev, 69 u32 sset, u8 *buf) 70 { 71 struct ionic_lif *lif = netdev_priv(netdev); 72 73 switch (sset) { 74 case ETH_SS_STATS: 75 ionic_get_stats_strings(lif, buf); 76 break; 77 case ETH_SS_PRIV_FLAGS: 78 memcpy(buf, ionic_priv_flags_strings, 79 IONIC_PRIV_FLAGS_COUNT * ETH_GSTRING_LEN); 80 break; 81 } 82 } 83 84 static void ionic_get_drvinfo(struct net_device *netdev, 85 struct ethtool_drvinfo *drvinfo) 86 { 87 struct ionic_lif *lif = netdev_priv(netdev); 88 struct ionic *ionic = lif->ionic; 89 90 strlcpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver)); 91 strlcpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version, 92 sizeof(drvinfo->fw_version)); 93 strlcpy(drvinfo->bus_info, ionic_bus_info(ionic), 94 sizeof(drvinfo->bus_info)); 95 } 96 97 static int ionic_get_regs_len(struct net_device *netdev) 98 { 99 return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32); 100 } 101 102 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 103 void *p) 104 { 105 struct ionic_lif *lif = netdev_priv(netdev); 106 unsigned int offset; 107 unsigned int size; 108 109 regs->version = IONIC_DEV_CMD_REG_VERSION; 110 111 offset = 0; 112 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32); 113 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size); 114 115 offset += size; 116 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32); 117 memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size); 118 } 119 120 static int ionic_get_link_ksettings(struct net_device *netdev, 121 struct ethtool_link_ksettings *ks) 122 { 123 struct ionic_lif *lif = netdev_priv(netdev); 124 struct ionic_dev *idev = &lif->ionic->idev; 125 int copper_seen = 0; 126 127 ethtool_link_ksettings_zero_link_mode(ks, supported); 128 129 /* The port_info data is found in a DMA space that the NIC keeps 130 * up-to-date, so there's no need to request the data from the 131 * NIC, we already have it in our memory space. 132 */ 133 134 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) { 135 /* Copper */ 136 case IONIC_XCVR_PID_QSFP_100G_CR4: 137 ethtool_link_ksettings_add_link_mode(ks, supported, 138 100000baseCR4_Full); 139 copper_seen++; 140 break; 141 case IONIC_XCVR_PID_QSFP_40GBASE_CR4: 142 ethtool_link_ksettings_add_link_mode(ks, supported, 143 40000baseCR4_Full); 144 copper_seen++; 145 break; 146 case IONIC_XCVR_PID_SFP_25GBASE_CR_S: 147 case IONIC_XCVR_PID_SFP_25GBASE_CR_L: 148 case IONIC_XCVR_PID_SFP_25GBASE_CR_N: 149 ethtool_link_ksettings_add_link_mode(ks, supported, 150 25000baseCR_Full); 151 copper_seen++; 152 break; 153 case IONIC_XCVR_PID_SFP_10GBASE_AOC: 154 case IONIC_XCVR_PID_SFP_10GBASE_CU: 155 ethtool_link_ksettings_add_link_mode(ks, supported, 156 10000baseCR_Full); 157 copper_seen++; 158 break; 159 160 /* Fibre */ 161 case IONIC_XCVR_PID_QSFP_100G_SR4: 162 case IONIC_XCVR_PID_QSFP_100G_AOC: 163 ethtool_link_ksettings_add_link_mode(ks, supported, 164 100000baseSR4_Full); 165 break; 166 case IONIC_XCVR_PID_QSFP_100G_CWDM4: 167 case IONIC_XCVR_PID_QSFP_100G_PSM4: 168 case IONIC_XCVR_PID_QSFP_100G_LR4: 169 ethtool_link_ksettings_add_link_mode(ks, supported, 170 100000baseLR4_ER4_Full); 171 break; 172 case IONIC_XCVR_PID_QSFP_100G_ER4: 173 ethtool_link_ksettings_add_link_mode(ks, supported, 174 100000baseLR4_ER4_Full); 175 break; 176 case IONIC_XCVR_PID_QSFP_40GBASE_SR4: 177 case IONIC_XCVR_PID_QSFP_40GBASE_AOC: 178 ethtool_link_ksettings_add_link_mode(ks, supported, 179 40000baseSR4_Full); 180 break; 181 case IONIC_XCVR_PID_QSFP_40GBASE_LR4: 182 ethtool_link_ksettings_add_link_mode(ks, supported, 183 40000baseLR4_Full); 184 break; 185 case IONIC_XCVR_PID_SFP_25GBASE_SR: 186 case IONIC_XCVR_PID_SFP_25GBASE_AOC: 187 case IONIC_XCVR_PID_SFP_25GBASE_ACC: 188 ethtool_link_ksettings_add_link_mode(ks, supported, 189 25000baseSR_Full); 190 break; 191 case IONIC_XCVR_PID_SFP_10GBASE_SR: 192 ethtool_link_ksettings_add_link_mode(ks, supported, 193 10000baseSR_Full); 194 break; 195 case IONIC_XCVR_PID_SFP_10GBASE_LR: 196 ethtool_link_ksettings_add_link_mode(ks, supported, 197 10000baseLR_Full); 198 break; 199 case IONIC_XCVR_PID_SFP_10GBASE_LRM: 200 ethtool_link_ksettings_add_link_mode(ks, supported, 201 10000baseLRM_Full); 202 break; 203 case IONIC_XCVR_PID_SFP_10GBASE_ER: 204 ethtool_link_ksettings_add_link_mode(ks, supported, 205 10000baseER_Full); 206 break; 207 case IONIC_XCVR_PID_UNKNOWN: 208 /* This means there's no module plugged in */ 209 break; 210 default: 211 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n", 212 idev->port_info->status.xcvr.pid, 213 idev->port_info->status.xcvr.pid); 214 break; 215 } 216 217 bitmap_copy(ks->link_modes.advertising, ks->link_modes.supported, 218 __ETHTOOL_LINK_MODE_MASK_NBITS); 219 220 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 221 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 222 if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC) 223 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER); 224 else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS) 225 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 226 227 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 228 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 229 230 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER || 231 copper_seen) 232 ks->base.port = PORT_DA; 233 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER) 234 ks->base.port = PORT_FIBRE; 235 else 236 ks->base.port = PORT_NONE; 237 238 if (ks->base.port != PORT_NONE) { 239 ks->base.speed = le32_to_cpu(lif->info->status.link_speed); 240 241 if (le16_to_cpu(lif->info->status.link_status)) 242 ks->base.duplex = DUPLEX_FULL; 243 else 244 ks->base.duplex = DUPLEX_UNKNOWN; 245 246 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 247 248 if (idev->port_info->config.an_enable) { 249 ethtool_link_ksettings_add_link_mode(ks, advertising, 250 Autoneg); 251 ks->base.autoneg = AUTONEG_ENABLE; 252 } 253 } 254 255 return 0; 256 } 257 258 static int ionic_set_link_ksettings(struct net_device *netdev, 259 const struct ethtool_link_ksettings *ks) 260 { 261 struct ionic_lif *lif = netdev_priv(netdev); 262 struct ionic *ionic = lif->ionic; 263 struct ionic_dev *idev; 264 int err = 0; 265 266 idev = &lif->ionic->idev; 267 268 /* set autoneg */ 269 if (ks->base.autoneg != idev->port_info->config.an_enable) { 270 mutex_lock(&ionic->dev_cmd_lock); 271 ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg); 272 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 273 mutex_unlock(&ionic->dev_cmd_lock); 274 if (err) 275 return err; 276 } 277 278 /* set speed */ 279 if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) { 280 mutex_lock(&ionic->dev_cmd_lock); 281 ionic_dev_cmd_port_speed(idev, ks->base.speed); 282 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 283 mutex_unlock(&ionic->dev_cmd_lock); 284 if (err) 285 return err; 286 } 287 288 return 0; 289 } 290 291 static void ionic_get_pauseparam(struct net_device *netdev, 292 struct ethtool_pauseparam *pause) 293 { 294 struct ionic_lif *lif = netdev_priv(netdev); 295 u8 pause_type; 296 297 pause->autoneg = 0; 298 299 pause_type = lif->ionic->idev.port_info->config.pause_type; 300 if (pause_type) { 301 pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0; 302 pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0; 303 } 304 } 305 306 static int ionic_set_pauseparam(struct net_device *netdev, 307 struct ethtool_pauseparam *pause) 308 { 309 struct ionic_lif *lif = netdev_priv(netdev); 310 struct ionic *ionic = lif->ionic; 311 u32 requested_pause; 312 int err; 313 314 if (pause->autoneg) 315 return -EOPNOTSUPP; 316 317 /* change both at the same time */ 318 requested_pause = IONIC_PORT_PAUSE_TYPE_LINK; 319 if (pause->rx_pause) 320 requested_pause |= IONIC_PAUSE_F_RX; 321 if (pause->tx_pause) 322 requested_pause |= IONIC_PAUSE_F_TX; 323 324 if (requested_pause == lif->ionic->idev.port_info->config.pause_type) 325 return 0; 326 327 mutex_lock(&ionic->dev_cmd_lock); 328 ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause); 329 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 330 mutex_unlock(&ionic->dev_cmd_lock); 331 if (err) 332 return err; 333 334 return 0; 335 } 336 337 static int ionic_get_fecparam(struct net_device *netdev, 338 struct ethtool_fecparam *fec) 339 { 340 struct ionic_lif *lif = netdev_priv(netdev); 341 342 switch (lif->ionic->idev.port_info->config.fec_type) { 343 case IONIC_PORT_FEC_TYPE_NONE: 344 fec->active_fec = ETHTOOL_FEC_OFF; 345 break; 346 case IONIC_PORT_FEC_TYPE_RS: 347 fec->active_fec = ETHTOOL_FEC_RS; 348 break; 349 case IONIC_PORT_FEC_TYPE_FC: 350 fec->active_fec = ETHTOOL_FEC_BASER; 351 break; 352 } 353 354 fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER; 355 356 return 0; 357 } 358 359 static int ionic_set_fecparam(struct net_device *netdev, 360 struct ethtool_fecparam *fec) 361 { 362 struct ionic_lif *lif = netdev_priv(netdev); 363 u8 fec_type; 364 int ret = 0; 365 366 if (lif->ionic->idev.port_info->config.an_enable) { 367 netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n"); 368 return -EINVAL; 369 } 370 371 switch (fec->fec) { 372 case ETHTOOL_FEC_NONE: 373 fec_type = IONIC_PORT_FEC_TYPE_NONE; 374 break; 375 case ETHTOOL_FEC_OFF: 376 fec_type = IONIC_PORT_FEC_TYPE_NONE; 377 break; 378 case ETHTOOL_FEC_RS: 379 fec_type = IONIC_PORT_FEC_TYPE_RS; 380 break; 381 case ETHTOOL_FEC_BASER: 382 fec_type = IONIC_PORT_FEC_TYPE_FC; 383 break; 384 case ETHTOOL_FEC_AUTO: 385 default: 386 netdev_err(netdev, "FEC request 0x%04x not supported\n", 387 fec->fec); 388 return -EINVAL; 389 } 390 391 if (fec_type != lif->ionic->idev.port_info->config.fec_type) { 392 mutex_lock(&lif->ionic->dev_cmd_lock); 393 ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type); 394 ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT); 395 mutex_unlock(&lif->ionic->dev_cmd_lock); 396 } 397 398 return ret; 399 } 400 401 static int ionic_get_coalesce(struct net_device *netdev, 402 struct ethtool_coalesce *coalesce) 403 { 404 struct ionic_lif *lif = netdev_priv(netdev); 405 406 coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs; 407 coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs; 408 409 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 410 coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 411 else 412 coalesce->use_adaptive_tx_coalesce = 0; 413 414 coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 415 416 return 0; 417 } 418 419 static int ionic_set_coalesce(struct net_device *netdev, 420 struct ethtool_coalesce *coalesce) 421 { 422 struct ionic_lif *lif = netdev_priv(netdev); 423 struct ionic_identity *ident; 424 u32 rx_coal, rx_dim; 425 u32 tx_coal, tx_dim; 426 unsigned int i; 427 428 ident = &lif->ionic->ident; 429 if (ident->dev.intr_coal_div == 0) { 430 netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n", 431 ident->dev.intr_coal_div); 432 return -EIO; 433 } 434 435 /* Tx normally shares Rx interrupt, so only change Rx if not split */ 436 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) && 437 (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs || 438 coalesce->use_adaptive_tx_coalesce)) { 439 netdev_warn(netdev, "only rx parameters can be changed\n"); 440 return -EINVAL; 441 } 442 443 /* Convert the usec request to a HW usable value. If they asked 444 * for non-zero and it resolved to zero, bump it up 445 */ 446 rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs); 447 if (!rx_coal && coalesce->rx_coalesce_usecs) 448 rx_coal = 1; 449 tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs); 450 if (!tx_coal && coalesce->tx_coalesce_usecs) 451 tx_coal = 1; 452 453 if (rx_coal > IONIC_INTR_CTRL_COAL_MAX || 454 tx_coal > IONIC_INTR_CTRL_COAL_MAX) 455 return -ERANGE; 456 457 /* Save the new values */ 458 lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs; 459 lif->rx_coalesce_hw = rx_coal; 460 461 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 462 lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs; 463 else 464 lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs; 465 lif->tx_coalesce_hw = tx_coal; 466 467 if (coalesce->use_adaptive_rx_coalesce) { 468 set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 469 rx_dim = rx_coal; 470 } else { 471 clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 472 rx_dim = 0; 473 } 474 475 if (coalesce->use_adaptive_tx_coalesce) { 476 set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 477 tx_dim = tx_coal; 478 } else { 479 clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 480 tx_dim = 0; 481 } 482 483 if (test_bit(IONIC_LIF_F_UP, lif->state)) { 484 for (i = 0; i < lif->nxqs; i++) { 485 if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) { 486 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl, 487 lif->rxqcqs[i]->intr.index, 488 lif->rx_coalesce_hw); 489 lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim; 490 } 491 492 if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) { 493 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl, 494 lif->txqcqs[i]->intr.index, 495 lif->tx_coalesce_hw); 496 lif->txqcqs[i]->intr.dim_coal_hw = tx_dim; 497 } 498 } 499 } 500 501 return 0; 502 } 503 504 static void ionic_get_ringparam(struct net_device *netdev, 505 struct ethtool_ringparam *ring) 506 { 507 struct ionic_lif *lif = netdev_priv(netdev); 508 509 ring->tx_max_pending = IONIC_MAX_TX_DESC; 510 ring->tx_pending = lif->ntxq_descs; 511 ring->rx_max_pending = IONIC_MAX_RX_DESC; 512 ring->rx_pending = lif->nrxq_descs; 513 } 514 515 static int ionic_set_ringparam(struct net_device *netdev, 516 struct ethtool_ringparam *ring) 517 { 518 struct ionic_lif *lif = netdev_priv(netdev); 519 struct ionic_queue_params qparam; 520 int err; 521 522 ionic_init_queue_params(lif, &qparam); 523 524 if (ring->rx_mini_pending || ring->rx_jumbo_pending) { 525 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n"); 526 return -EINVAL; 527 } 528 529 if (!is_power_of_2(ring->tx_pending) || 530 !is_power_of_2(ring->rx_pending)) { 531 netdev_info(netdev, "Descriptor count must be a power of 2\n"); 532 return -EINVAL; 533 } 534 535 /* if nothing to do return success */ 536 if (ring->tx_pending == lif->ntxq_descs && 537 ring->rx_pending == lif->nrxq_descs) 538 return 0; 539 540 if (ring->tx_pending != lif->ntxq_descs) 541 netdev_info(netdev, "Changing Tx ring size from %d to %d\n", 542 lif->ntxq_descs, ring->tx_pending); 543 544 if (ring->rx_pending != lif->nrxq_descs) 545 netdev_info(netdev, "Changing Rx ring size from %d to %d\n", 546 lif->nrxq_descs, ring->rx_pending); 547 548 /* if we're not running, just set the values and return */ 549 if (!netif_running(lif->netdev)) { 550 lif->ntxq_descs = ring->tx_pending; 551 lif->nrxq_descs = ring->rx_pending; 552 return 0; 553 } 554 555 qparam.ntxq_descs = ring->tx_pending; 556 qparam.nrxq_descs = ring->rx_pending; 557 err = ionic_reconfigure_queues(lif, &qparam); 558 if (err) 559 netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err); 560 561 return err; 562 } 563 564 static void ionic_get_channels(struct net_device *netdev, 565 struct ethtool_channels *ch) 566 { 567 struct ionic_lif *lif = netdev_priv(netdev); 568 569 /* report maximum channels */ 570 ch->max_combined = lif->ionic->ntxqs_per_lif; 571 ch->max_rx = lif->ionic->ntxqs_per_lif / 2; 572 ch->max_tx = lif->ionic->ntxqs_per_lif / 2; 573 574 /* report current channels */ 575 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) { 576 ch->rx_count = lif->nxqs; 577 ch->tx_count = lif->nxqs; 578 } else { 579 ch->combined_count = lif->nxqs; 580 } 581 } 582 583 static int ionic_set_channels(struct net_device *netdev, 584 struct ethtool_channels *ch) 585 { 586 struct ionic_lif *lif = netdev_priv(netdev); 587 struct ionic_queue_params qparam; 588 int max_cnt; 589 int err; 590 591 ionic_init_queue_params(lif, &qparam); 592 593 if (ch->rx_count != ch->tx_count) { 594 netdev_info(netdev, "The rx and tx count must be equal\n"); 595 return -EINVAL; 596 } 597 598 if (ch->combined_count && ch->rx_count) { 599 netdev_info(netdev, "Use either combined or rx and tx, not both\n"); 600 return -EINVAL; 601 } 602 603 max_cnt = lif->ionic->ntxqs_per_lif; 604 if (ch->combined_count) { 605 if (ch->combined_count > max_cnt) 606 return -EINVAL; 607 608 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 609 netdev_info(lif->netdev, "Sharing queue interrupts\n"); 610 else if (ch->combined_count == lif->nxqs) 611 return 0; 612 613 if (lif->nxqs != ch->combined_count) 614 netdev_info(netdev, "Changing queue count from %d to %d\n", 615 lif->nxqs, ch->combined_count); 616 617 qparam.nxqs = ch->combined_count; 618 qparam.intr_split = 0; 619 } else { 620 max_cnt /= 2; 621 if (ch->rx_count > max_cnt) 622 return -EINVAL; 623 624 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 625 netdev_info(lif->netdev, "Splitting queue interrupts\n"); 626 else if (ch->rx_count == lif->nxqs) 627 return 0; 628 629 if (lif->nxqs != ch->rx_count) 630 netdev_info(netdev, "Changing queue count from %d to %d\n", 631 lif->nxqs, ch->rx_count); 632 633 qparam.nxqs = ch->rx_count; 634 qparam.intr_split = 1; 635 } 636 637 /* if we're not running, just set the values and return */ 638 if (!netif_running(lif->netdev)) { 639 lif->nxqs = qparam.nxqs; 640 641 if (qparam.intr_split) { 642 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 643 } else { 644 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 645 lif->tx_coalesce_usecs = lif->rx_coalesce_usecs; 646 lif->tx_coalesce_hw = lif->rx_coalesce_hw; 647 } 648 return 0; 649 } 650 651 err = ionic_reconfigure_queues(lif, &qparam); 652 if (err) 653 netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err); 654 655 return err; 656 } 657 658 static u32 ionic_get_priv_flags(struct net_device *netdev) 659 { 660 struct ionic_lif *lif = netdev_priv(netdev); 661 u32 priv_flags = 0; 662 663 if (test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state)) 664 priv_flags |= IONIC_PRIV_F_SW_DBG_STATS; 665 666 return priv_flags; 667 } 668 669 static int ionic_set_priv_flags(struct net_device *netdev, u32 priv_flags) 670 { 671 struct ionic_lif *lif = netdev_priv(netdev); 672 673 clear_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state); 674 if (priv_flags & IONIC_PRIV_F_SW_DBG_STATS) 675 set_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state); 676 677 return 0; 678 } 679 680 static int ionic_get_rxnfc(struct net_device *netdev, 681 struct ethtool_rxnfc *info, u32 *rules) 682 { 683 struct ionic_lif *lif = netdev_priv(netdev); 684 int err = 0; 685 686 switch (info->cmd) { 687 case ETHTOOL_GRXRINGS: 688 info->data = lif->nxqs; 689 break; 690 default: 691 netdev_err(netdev, "Command parameter %d is not supported\n", 692 info->cmd); 693 err = -EOPNOTSUPP; 694 } 695 696 return err; 697 } 698 699 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev) 700 { 701 struct ionic_lif *lif = netdev_priv(netdev); 702 703 return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz); 704 } 705 706 static u32 ionic_get_rxfh_key_size(struct net_device *netdev) 707 { 708 return IONIC_RSS_HASH_KEY_SIZE; 709 } 710 711 static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 712 u8 *hfunc) 713 { 714 struct ionic_lif *lif = netdev_priv(netdev); 715 unsigned int i, tbl_sz; 716 717 if (indir) { 718 tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz); 719 for (i = 0; i < tbl_sz; i++) 720 indir[i] = lif->rss_ind_tbl[i]; 721 } 722 723 if (key) 724 memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE); 725 726 if (hfunc) 727 *hfunc = ETH_RSS_HASH_TOP; 728 729 return 0; 730 } 731 732 static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir, 733 const u8 *key, const u8 hfunc) 734 { 735 struct ionic_lif *lif = netdev_priv(netdev); 736 int err; 737 738 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 739 return -EOPNOTSUPP; 740 741 err = ionic_lif_rss_config(lif, lif->rss_types, key, indir); 742 if (err) 743 return err; 744 745 return 0; 746 } 747 748 static int ionic_set_tunable(struct net_device *dev, 749 const struct ethtool_tunable *tuna, 750 const void *data) 751 { 752 struct ionic_lif *lif = netdev_priv(dev); 753 754 switch (tuna->id) { 755 case ETHTOOL_RX_COPYBREAK: 756 lif->rx_copybreak = *(u32 *)data; 757 break; 758 default: 759 return -EOPNOTSUPP; 760 } 761 762 return 0; 763 } 764 765 static int ionic_get_tunable(struct net_device *netdev, 766 const struct ethtool_tunable *tuna, void *data) 767 { 768 struct ionic_lif *lif = netdev_priv(netdev); 769 770 switch (tuna->id) { 771 case ETHTOOL_RX_COPYBREAK: 772 *(u32 *)data = lif->rx_copybreak; 773 break; 774 default: 775 return -EOPNOTSUPP; 776 } 777 778 return 0; 779 } 780 781 static int ionic_get_module_info(struct net_device *netdev, 782 struct ethtool_modinfo *modinfo) 783 784 { 785 struct ionic_lif *lif = netdev_priv(netdev); 786 struct ionic_dev *idev = &lif->ionic->idev; 787 struct ionic_xcvr_status *xcvr; 788 struct sfp_eeprom_base *sfp; 789 790 xcvr = &idev->port_info->status.xcvr; 791 sfp = (struct sfp_eeprom_base *) xcvr->sprom; 792 793 /* report the module data type and length */ 794 switch (sfp->phys_id) { 795 case SFF8024_ID_SFP: 796 modinfo->type = ETH_MODULE_SFF_8079; 797 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 798 break; 799 case SFF8024_ID_QSFP_8436_8636: 800 case SFF8024_ID_QSFP28_8636: 801 modinfo->type = ETH_MODULE_SFF_8436; 802 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 803 break; 804 default: 805 netdev_info(netdev, "unknown xcvr type 0x%02x\n", 806 xcvr->sprom[0]); 807 modinfo->type = 0; 808 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 809 break; 810 } 811 812 return 0; 813 } 814 815 static int ionic_get_module_eeprom(struct net_device *netdev, 816 struct ethtool_eeprom *ee, 817 u8 *data) 818 { 819 struct ionic_lif *lif = netdev_priv(netdev); 820 struct ionic_dev *idev = &lif->ionic->idev; 821 struct ionic_xcvr_status *xcvr; 822 char tbuf[sizeof(xcvr->sprom)]; 823 int count = 10; 824 u32 len; 825 826 /* The NIC keeps the module prom up-to-date in the DMA space 827 * so we can simply copy the module bytes into the data buffer. 828 */ 829 xcvr = &idev->port_info->status.xcvr; 830 len = min_t(u32, sizeof(xcvr->sprom), ee->len); 831 832 do { 833 memcpy(data, xcvr->sprom, len); 834 memcpy(tbuf, xcvr->sprom, len); 835 836 /* Let's make sure we got a consistent copy */ 837 if (!memcmp(data, tbuf, len)) 838 break; 839 840 } while (--count); 841 842 if (!count) 843 return -ETIMEDOUT; 844 845 return 0; 846 } 847 848 static int ionic_nway_reset(struct net_device *netdev) 849 { 850 struct ionic_lif *lif = netdev_priv(netdev); 851 struct ionic *ionic = lif->ionic; 852 int err = 0; 853 854 /* flap the link to force auto-negotiation */ 855 856 mutex_lock(&ionic->dev_cmd_lock); 857 858 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN); 859 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 860 861 if (!err) { 862 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP); 863 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 864 } 865 866 mutex_unlock(&ionic->dev_cmd_lock); 867 868 return err; 869 } 870 871 static const struct ethtool_ops ionic_ethtool_ops = { 872 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 873 ETHTOOL_COALESCE_USE_ADAPTIVE_RX | 874 ETHTOOL_COALESCE_USE_ADAPTIVE_TX, 875 .get_drvinfo = ionic_get_drvinfo, 876 .get_regs_len = ionic_get_regs_len, 877 .get_regs = ionic_get_regs, 878 .get_link = ethtool_op_get_link, 879 .get_link_ksettings = ionic_get_link_ksettings, 880 .set_link_ksettings = ionic_set_link_ksettings, 881 .get_coalesce = ionic_get_coalesce, 882 .set_coalesce = ionic_set_coalesce, 883 .get_ringparam = ionic_get_ringparam, 884 .set_ringparam = ionic_set_ringparam, 885 .get_channels = ionic_get_channels, 886 .set_channels = ionic_set_channels, 887 .get_strings = ionic_get_strings, 888 .get_ethtool_stats = ionic_get_stats, 889 .get_sset_count = ionic_get_sset_count, 890 .get_priv_flags = ionic_get_priv_flags, 891 .set_priv_flags = ionic_set_priv_flags, 892 .get_rxnfc = ionic_get_rxnfc, 893 .get_rxfh_indir_size = ionic_get_rxfh_indir_size, 894 .get_rxfh_key_size = ionic_get_rxfh_key_size, 895 .get_rxfh = ionic_get_rxfh, 896 .set_rxfh = ionic_set_rxfh, 897 .get_tunable = ionic_get_tunable, 898 .set_tunable = ionic_set_tunable, 899 .get_module_info = ionic_get_module_info, 900 .get_module_eeprom = ionic_get_module_eeprom, 901 .get_pauseparam = ionic_get_pauseparam, 902 .set_pauseparam = ionic_set_pauseparam, 903 .get_fecparam = ionic_get_fecparam, 904 .set_fecparam = ionic_set_fecparam, 905 .nway_reset = ionic_nway_reset, 906 }; 907 908 void ionic_ethtool_set_ops(struct net_device *netdev) 909 { 910 netdev->ethtool_ops = &ionic_ethtool_ops; 911 } 912