1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/module.h> 5 #include <linux/netdevice.h> 6 #include <linux/sfp.h> 7 8 #include "ionic.h" 9 #include "ionic_bus.h" 10 #include "ionic_lif.h" 11 #include "ionic_ethtool.h" 12 #include "ionic_stats.h" 13 14 static const char ionic_priv_flags_strings[][ETH_GSTRING_LEN] = { 15 #define IONIC_PRIV_F_SW_DBG_STATS BIT(0) 16 "sw-dbg-stats", 17 }; 18 19 #define IONIC_PRIV_FLAGS_COUNT ARRAY_SIZE(ionic_priv_flags_strings) 20 21 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf) 22 { 23 u32 i; 24 25 for (i = 0; i < ionic_num_stats_grps; i++) 26 ionic_stats_groups[i].get_strings(lif, &buf); 27 } 28 29 static void ionic_get_stats(struct net_device *netdev, 30 struct ethtool_stats *stats, u64 *buf) 31 { 32 struct ionic_lif *lif; 33 u32 i; 34 35 lif = netdev_priv(netdev); 36 37 memset(buf, 0, stats->n_stats * sizeof(*buf)); 38 for (i = 0; i < ionic_num_stats_grps; i++) 39 ionic_stats_groups[i].get_values(lif, &buf); 40 } 41 42 static int ionic_get_stats_count(struct ionic_lif *lif) 43 { 44 int i, num_stats = 0; 45 46 for (i = 0; i < ionic_num_stats_grps; i++) 47 num_stats += ionic_stats_groups[i].get_count(lif); 48 49 return num_stats; 50 } 51 52 static int ionic_get_sset_count(struct net_device *netdev, int sset) 53 { 54 struct ionic_lif *lif = netdev_priv(netdev); 55 int count = 0; 56 57 switch (sset) { 58 case ETH_SS_STATS: 59 count = ionic_get_stats_count(lif); 60 break; 61 case ETH_SS_PRIV_FLAGS: 62 count = IONIC_PRIV_FLAGS_COUNT; 63 break; 64 } 65 return count; 66 } 67 68 static void ionic_get_strings(struct net_device *netdev, 69 u32 sset, u8 *buf) 70 { 71 struct ionic_lif *lif = netdev_priv(netdev); 72 73 switch (sset) { 74 case ETH_SS_STATS: 75 ionic_get_stats_strings(lif, buf); 76 break; 77 case ETH_SS_PRIV_FLAGS: 78 memcpy(buf, ionic_priv_flags_strings, 79 IONIC_PRIV_FLAGS_COUNT * ETH_GSTRING_LEN); 80 break; 81 } 82 } 83 84 static void ionic_get_drvinfo(struct net_device *netdev, 85 struct ethtool_drvinfo *drvinfo) 86 { 87 struct ionic_lif *lif = netdev_priv(netdev); 88 struct ionic *ionic = lif->ionic; 89 90 strlcpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver)); 91 strlcpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version, 92 sizeof(drvinfo->fw_version)); 93 strlcpy(drvinfo->bus_info, ionic_bus_info(ionic), 94 sizeof(drvinfo->bus_info)); 95 } 96 97 static int ionic_get_regs_len(struct net_device *netdev) 98 { 99 return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32); 100 } 101 102 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 103 void *p) 104 { 105 struct ionic_lif *lif = netdev_priv(netdev); 106 unsigned int offset; 107 unsigned int size; 108 109 regs->version = IONIC_DEV_CMD_REG_VERSION; 110 111 offset = 0; 112 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32); 113 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size); 114 115 offset += size; 116 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32); 117 memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size); 118 } 119 120 static int ionic_get_link_ksettings(struct net_device *netdev, 121 struct ethtool_link_ksettings *ks) 122 { 123 struct ionic_lif *lif = netdev_priv(netdev); 124 struct ionic_dev *idev = &lif->ionic->idev; 125 int copper_seen = 0; 126 127 ethtool_link_ksettings_zero_link_mode(ks, supported); 128 129 /* The port_info data is found in a DMA space that the NIC keeps 130 * up-to-date, so there's no need to request the data from the 131 * NIC, we already have it in our memory space. 132 */ 133 134 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) { 135 /* Copper */ 136 case IONIC_XCVR_PID_QSFP_100G_CR4: 137 ethtool_link_ksettings_add_link_mode(ks, supported, 138 100000baseCR4_Full); 139 copper_seen++; 140 break; 141 case IONIC_XCVR_PID_QSFP_40GBASE_CR4: 142 ethtool_link_ksettings_add_link_mode(ks, supported, 143 40000baseCR4_Full); 144 copper_seen++; 145 break; 146 case IONIC_XCVR_PID_SFP_25GBASE_CR_S: 147 case IONIC_XCVR_PID_SFP_25GBASE_CR_L: 148 case IONIC_XCVR_PID_SFP_25GBASE_CR_N: 149 ethtool_link_ksettings_add_link_mode(ks, supported, 150 25000baseCR_Full); 151 copper_seen++; 152 break; 153 case IONIC_XCVR_PID_SFP_10GBASE_AOC: 154 case IONIC_XCVR_PID_SFP_10GBASE_CU: 155 ethtool_link_ksettings_add_link_mode(ks, supported, 156 10000baseCR_Full); 157 copper_seen++; 158 break; 159 160 /* Fibre */ 161 case IONIC_XCVR_PID_QSFP_100G_SR4: 162 case IONIC_XCVR_PID_QSFP_100G_AOC: 163 ethtool_link_ksettings_add_link_mode(ks, supported, 164 100000baseSR4_Full); 165 break; 166 case IONIC_XCVR_PID_QSFP_100G_CWDM4: 167 case IONIC_XCVR_PID_QSFP_100G_PSM4: 168 case IONIC_XCVR_PID_QSFP_100G_LR4: 169 ethtool_link_ksettings_add_link_mode(ks, supported, 170 100000baseLR4_ER4_Full); 171 break; 172 case IONIC_XCVR_PID_QSFP_100G_ER4: 173 ethtool_link_ksettings_add_link_mode(ks, supported, 174 100000baseLR4_ER4_Full); 175 break; 176 case IONIC_XCVR_PID_QSFP_40GBASE_SR4: 177 case IONIC_XCVR_PID_QSFP_40GBASE_AOC: 178 ethtool_link_ksettings_add_link_mode(ks, supported, 179 40000baseSR4_Full); 180 break; 181 case IONIC_XCVR_PID_QSFP_40GBASE_LR4: 182 ethtool_link_ksettings_add_link_mode(ks, supported, 183 40000baseLR4_Full); 184 break; 185 case IONIC_XCVR_PID_SFP_25GBASE_SR: 186 case IONIC_XCVR_PID_SFP_25GBASE_AOC: 187 case IONIC_XCVR_PID_SFP_25GBASE_ACC: 188 ethtool_link_ksettings_add_link_mode(ks, supported, 189 25000baseSR_Full); 190 break; 191 case IONIC_XCVR_PID_SFP_10GBASE_SR: 192 ethtool_link_ksettings_add_link_mode(ks, supported, 193 10000baseSR_Full); 194 break; 195 case IONIC_XCVR_PID_SFP_10GBASE_LR: 196 ethtool_link_ksettings_add_link_mode(ks, supported, 197 10000baseLR_Full); 198 break; 199 case IONIC_XCVR_PID_SFP_10GBASE_LRM: 200 ethtool_link_ksettings_add_link_mode(ks, supported, 201 10000baseLRM_Full); 202 break; 203 case IONIC_XCVR_PID_SFP_10GBASE_ER: 204 ethtool_link_ksettings_add_link_mode(ks, supported, 205 10000baseER_Full); 206 break; 207 case IONIC_XCVR_PID_UNKNOWN: 208 /* This means there's no module plugged in */ 209 break; 210 default: 211 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n", 212 idev->port_info->status.xcvr.pid, 213 idev->port_info->status.xcvr.pid); 214 break; 215 } 216 217 bitmap_copy(ks->link_modes.advertising, ks->link_modes.supported, 218 __ETHTOOL_LINK_MODE_MASK_NBITS); 219 220 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 221 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 222 if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC) 223 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER); 224 else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS) 225 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 226 227 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 228 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 229 230 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER || 231 copper_seen) 232 ks->base.port = PORT_DA; 233 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER) 234 ks->base.port = PORT_FIBRE; 235 else 236 ks->base.port = PORT_NONE; 237 238 if (ks->base.port != PORT_NONE) { 239 ks->base.speed = le32_to_cpu(lif->info->status.link_speed); 240 241 if (le16_to_cpu(lif->info->status.link_status)) 242 ks->base.duplex = DUPLEX_FULL; 243 else 244 ks->base.duplex = DUPLEX_UNKNOWN; 245 246 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 247 248 if (idev->port_info->config.an_enable) { 249 ethtool_link_ksettings_add_link_mode(ks, advertising, 250 Autoneg); 251 ks->base.autoneg = AUTONEG_ENABLE; 252 } 253 } 254 255 return 0; 256 } 257 258 static int ionic_set_link_ksettings(struct net_device *netdev, 259 const struct ethtool_link_ksettings *ks) 260 { 261 struct ionic_lif *lif = netdev_priv(netdev); 262 struct ionic *ionic = lif->ionic; 263 struct ionic_dev *idev; 264 int err = 0; 265 266 idev = &lif->ionic->idev; 267 268 /* set autoneg */ 269 if (ks->base.autoneg != idev->port_info->config.an_enable) { 270 mutex_lock(&ionic->dev_cmd_lock); 271 ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg); 272 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 273 mutex_unlock(&ionic->dev_cmd_lock); 274 if (err) 275 return err; 276 } 277 278 /* set speed */ 279 if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) { 280 mutex_lock(&ionic->dev_cmd_lock); 281 ionic_dev_cmd_port_speed(idev, ks->base.speed); 282 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 283 mutex_unlock(&ionic->dev_cmd_lock); 284 if (err) 285 return err; 286 } 287 288 return 0; 289 } 290 291 static void ionic_get_pauseparam(struct net_device *netdev, 292 struct ethtool_pauseparam *pause) 293 { 294 struct ionic_lif *lif = netdev_priv(netdev); 295 u8 pause_type; 296 297 pause->autoneg = 0; 298 299 pause_type = lif->ionic->idev.port_info->config.pause_type; 300 if (pause_type) { 301 pause->rx_pause = pause_type & IONIC_PAUSE_F_RX ? 1 : 0; 302 pause->tx_pause = pause_type & IONIC_PAUSE_F_TX ? 1 : 0; 303 } 304 } 305 306 static int ionic_set_pauseparam(struct net_device *netdev, 307 struct ethtool_pauseparam *pause) 308 { 309 struct ionic_lif *lif = netdev_priv(netdev); 310 struct ionic *ionic = lif->ionic; 311 u32 requested_pause; 312 int err; 313 314 if (pause->autoneg) 315 return -EOPNOTSUPP; 316 317 /* change both at the same time */ 318 requested_pause = IONIC_PORT_PAUSE_TYPE_LINK; 319 if (pause->rx_pause) 320 requested_pause |= IONIC_PAUSE_F_RX; 321 if (pause->tx_pause) 322 requested_pause |= IONIC_PAUSE_F_TX; 323 324 if (requested_pause == lif->ionic->idev.port_info->config.pause_type) 325 return 0; 326 327 mutex_lock(&ionic->dev_cmd_lock); 328 ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause); 329 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 330 mutex_unlock(&ionic->dev_cmd_lock); 331 if (err) 332 return err; 333 334 return 0; 335 } 336 337 static int ionic_get_fecparam(struct net_device *netdev, 338 struct ethtool_fecparam *fec) 339 { 340 struct ionic_lif *lif = netdev_priv(netdev); 341 342 switch (lif->ionic->idev.port_info->config.fec_type) { 343 case IONIC_PORT_FEC_TYPE_NONE: 344 fec->active_fec = ETHTOOL_FEC_OFF; 345 break; 346 case IONIC_PORT_FEC_TYPE_RS: 347 fec->active_fec = ETHTOOL_FEC_RS; 348 break; 349 case IONIC_PORT_FEC_TYPE_FC: 350 fec->active_fec = ETHTOOL_FEC_BASER; 351 break; 352 } 353 354 fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER; 355 356 return 0; 357 } 358 359 static int ionic_set_fecparam(struct net_device *netdev, 360 struct ethtool_fecparam *fec) 361 { 362 struct ionic_lif *lif = netdev_priv(netdev); 363 u8 fec_type; 364 int ret = 0; 365 366 if (lif->ionic->idev.port_info->config.an_enable) { 367 netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n"); 368 return -EINVAL; 369 } 370 371 switch (fec->fec) { 372 case ETHTOOL_FEC_NONE: 373 fec_type = IONIC_PORT_FEC_TYPE_NONE; 374 break; 375 case ETHTOOL_FEC_OFF: 376 fec_type = IONIC_PORT_FEC_TYPE_NONE; 377 break; 378 case ETHTOOL_FEC_RS: 379 fec_type = IONIC_PORT_FEC_TYPE_RS; 380 break; 381 case ETHTOOL_FEC_BASER: 382 fec_type = IONIC_PORT_FEC_TYPE_FC; 383 break; 384 case ETHTOOL_FEC_AUTO: 385 default: 386 netdev_err(netdev, "FEC request 0x%04x not supported\n", 387 fec->fec); 388 return -EINVAL; 389 } 390 391 if (fec_type != lif->ionic->idev.port_info->config.fec_type) { 392 mutex_lock(&lif->ionic->dev_cmd_lock); 393 ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type); 394 ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT); 395 mutex_unlock(&lif->ionic->dev_cmd_lock); 396 } 397 398 return ret; 399 } 400 401 static int ionic_get_coalesce(struct net_device *netdev, 402 struct ethtool_coalesce *coalesce) 403 { 404 struct ionic_lif *lif = netdev_priv(netdev); 405 406 coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs; 407 coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs; 408 409 return 0; 410 } 411 412 static int ionic_set_coalesce(struct net_device *netdev, 413 struct ethtool_coalesce *coalesce) 414 { 415 struct ionic_lif *lif = netdev_priv(netdev); 416 struct ionic_identity *ident; 417 struct ionic_qcq *qcq; 418 unsigned int i; 419 u32 rx_coal; 420 u32 tx_coal; 421 422 ident = &lif->ionic->ident; 423 if (ident->dev.intr_coal_div == 0) { 424 netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n", 425 ident->dev.intr_coal_div); 426 return -EIO; 427 } 428 429 /* Tx normally shares Rx interrupt, so only change Rx */ 430 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) && 431 coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs) { 432 netdev_warn(netdev, "only the rx-usecs can be changed\n"); 433 return -EINVAL; 434 } 435 436 /* Convert the usec request to a HW usable value. If they asked 437 * for non-zero and it resolved to zero, bump it up 438 */ 439 rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs); 440 if (!rx_coal && coalesce->rx_coalesce_usecs) 441 rx_coal = 1; 442 tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs); 443 if (!tx_coal && coalesce->tx_coalesce_usecs) 444 tx_coal = 1; 445 446 if (rx_coal > IONIC_INTR_CTRL_COAL_MAX || 447 tx_coal > IONIC_INTR_CTRL_COAL_MAX) 448 return -ERANGE; 449 450 /* Save the new values */ 451 lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs; 452 if (rx_coal != lif->rx_coalesce_hw) { 453 lif->rx_coalesce_hw = rx_coal; 454 455 if (test_bit(IONIC_LIF_F_UP, lif->state)) { 456 for (i = 0; i < lif->nxqs; i++) { 457 qcq = lif->rxqcqs[i].qcq; 458 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl, 459 qcq->intr.index, 460 lif->rx_coalesce_hw); 461 } 462 } 463 } 464 465 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 466 lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs; 467 else 468 lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs; 469 if (tx_coal != lif->tx_coalesce_hw) { 470 lif->tx_coalesce_hw = tx_coal; 471 472 if (test_bit(IONIC_LIF_F_UP, lif->state)) { 473 for (i = 0; i < lif->nxqs; i++) { 474 qcq = lif->txqcqs[i].qcq; 475 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl, 476 qcq->intr.index, 477 lif->tx_coalesce_hw); 478 } 479 } 480 } 481 482 return 0; 483 } 484 485 static void ionic_get_ringparam(struct net_device *netdev, 486 struct ethtool_ringparam *ring) 487 { 488 struct ionic_lif *lif = netdev_priv(netdev); 489 490 ring->tx_max_pending = IONIC_MAX_TX_DESC; 491 ring->tx_pending = lif->ntxq_descs; 492 ring->rx_max_pending = IONIC_MAX_RX_DESC; 493 ring->rx_pending = lif->nrxq_descs; 494 } 495 496 static void ionic_set_ringsize(struct ionic_lif *lif, void *arg) 497 { 498 struct ethtool_ringparam *ring = arg; 499 500 lif->ntxq_descs = ring->tx_pending; 501 lif->nrxq_descs = ring->rx_pending; 502 } 503 504 static int ionic_set_ringparam(struct net_device *netdev, 505 struct ethtool_ringparam *ring) 506 { 507 struct ionic_lif *lif = netdev_priv(netdev); 508 509 if (ring->rx_mini_pending || ring->rx_jumbo_pending) { 510 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n"); 511 return -EINVAL; 512 } 513 514 if (!is_power_of_2(ring->tx_pending) || 515 !is_power_of_2(ring->rx_pending)) { 516 netdev_info(netdev, "Descriptor count must be a power of 2\n"); 517 return -EINVAL; 518 } 519 520 /* if nothing to do return success */ 521 if (ring->tx_pending == lif->ntxq_descs && 522 ring->rx_pending == lif->nrxq_descs) 523 return 0; 524 525 return ionic_reset_queues(lif, ionic_set_ringsize, ring); 526 } 527 528 static void ionic_get_channels(struct net_device *netdev, 529 struct ethtool_channels *ch) 530 { 531 struct ionic_lif *lif = netdev_priv(netdev); 532 533 /* report maximum channels */ 534 ch->max_combined = lif->ionic->ntxqs_per_lif; 535 ch->max_rx = lif->ionic->ntxqs_per_lif / 2; 536 ch->max_tx = lif->ionic->ntxqs_per_lif / 2; 537 538 /* report current channels */ 539 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) { 540 ch->rx_count = lif->nxqs; 541 ch->tx_count = lif->nxqs; 542 } else { 543 ch->combined_count = lif->nxqs; 544 } 545 } 546 547 static void ionic_set_queuecount(struct ionic_lif *lif, void *arg) 548 { 549 struct ethtool_channels *ch = arg; 550 551 if (ch->combined_count) { 552 lif->nxqs = ch->combined_count; 553 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) { 554 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 555 lif->tx_coalesce_usecs = lif->rx_coalesce_usecs; 556 lif->tx_coalesce_hw = lif->rx_coalesce_hw; 557 netdev_info(lif->netdev, "Sharing queue interrupts\n"); 558 } 559 } else { 560 lif->nxqs = ch->rx_count; 561 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) { 562 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 563 netdev_info(lif->netdev, "Splitting queue interrupts\n"); 564 } 565 } 566 } 567 568 static int ionic_set_channels(struct net_device *netdev, 569 struct ethtool_channels *ch) 570 { 571 struct ionic_lif *lif = netdev_priv(netdev); 572 int new_cnt; 573 574 if (ch->rx_count != ch->tx_count) { 575 netdev_info(netdev, "The rx and tx count must be equal\n"); 576 return -EINVAL; 577 } 578 579 if (ch->combined_count && ch->rx_count) { 580 netdev_info(netdev, "Use either combined_count or rx/tx_count, not both\n"); 581 return -EINVAL; 582 } 583 584 if (ch->combined_count) 585 new_cnt = ch->combined_count; 586 else 587 new_cnt = ch->rx_count; 588 589 if (lif->nxqs != new_cnt) 590 netdev_info(netdev, "Changing queue count from %d to %d\n", 591 lif->nxqs, new_cnt); 592 593 return ionic_reset_queues(lif, ionic_set_queuecount, ch); 594 } 595 596 static u32 ionic_get_priv_flags(struct net_device *netdev) 597 { 598 struct ionic_lif *lif = netdev_priv(netdev); 599 u32 priv_flags = 0; 600 601 if (test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state)) 602 priv_flags |= IONIC_PRIV_F_SW_DBG_STATS; 603 604 return priv_flags; 605 } 606 607 static int ionic_set_priv_flags(struct net_device *netdev, u32 priv_flags) 608 { 609 struct ionic_lif *lif = netdev_priv(netdev); 610 611 clear_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state); 612 if (priv_flags & IONIC_PRIV_F_SW_DBG_STATS) 613 set_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state); 614 615 return 0; 616 } 617 618 static int ionic_get_rxnfc(struct net_device *netdev, 619 struct ethtool_rxnfc *info, u32 *rules) 620 { 621 struct ionic_lif *lif = netdev_priv(netdev); 622 int err = 0; 623 624 switch (info->cmd) { 625 case ETHTOOL_GRXRINGS: 626 info->data = lif->nxqs; 627 break; 628 default: 629 netdev_err(netdev, "Command parameter %d is not supported\n", 630 info->cmd); 631 err = -EOPNOTSUPP; 632 } 633 634 return err; 635 } 636 637 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev) 638 { 639 struct ionic_lif *lif = netdev_priv(netdev); 640 641 return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz); 642 } 643 644 static u32 ionic_get_rxfh_key_size(struct net_device *netdev) 645 { 646 return IONIC_RSS_HASH_KEY_SIZE; 647 } 648 649 static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 650 u8 *hfunc) 651 { 652 struct ionic_lif *lif = netdev_priv(netdev); 653 unsigned int i, tbl_sz; 654 655 if (indir) { 656 tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz); 657 for (i = 0; i < tbl_sz; i++) 658 indir[i] = lif->rss_ind_tbl[i]; 659 } 660 661 if (key) 662 memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE); 663 664 if (hfunc) 665 *hfunc = ETH_RSS_HASH_TOP; 666 667 return 0; 668 } 669 670 static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir, 671 const u8 *key, const u8 hfunc) 672 { 673 struct ionic_lif *lif = netdev_priv(netdev); 674 int err; 675 676 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 677 return -EOPNOTSUPP; 678 679 err = ionic_lif_rss_config(lif, lif->rss_types, key, indir); 680 if (err) 681 return err; 682 683 return 0; 684 } 685 686 static int ionic_set_tunable(struct net_device *dev, 687 const struct ethtool_tunable *tuna, 688 const void *data) 689 { 690 struct ionic_lif *lif = netdev_priv(dev); 691 692 switch (tuna->id) { 693 case ETHTOOL_RX_COPYBREAK: 694 lif->rx_copybreak = *(u32 *)data; 695 break; 696 default: 697 return -EOPNOTSUPP; 698 } 699 700 return 0; 701 } 702 703 static int ionic_get_tunable(struct net_device *netdev, 704 const struct ethtool_tunable *tuna, void *data) 705 { 706 struct ionic_lif *lif = netdev_priv(netdev); 707 708 switch (tuna->id) { 709 case ETHTOOL_RX_COPYBREAK: 710 *(u32 *)data = lif->rx_copybreak; 711 break; 712 default: 713 return -EOPNOTSUPP; 714 } 715 716 return 0; 717 } 718 719 static int ionic_get_module_info(struct net_device *netdev, 720 struct ethtool_modinfo *modinfo) 721 722 { 723 struct ionic_lif *lif = netdev_priv(netdev); 724 struct ionic_dev *idev = &lif->ionic->idev; 725 struct ionic_xcvr_status *xcvr; 726 struct sfp_eeprom_base *sfp; 727 728 xcvr = &idev->port_info->status.xcvr; 729 sfp = (struct sfp_eeprom_base *) xcvr->sprom; 730 731 /* report the module data type and length */ 732 switch (sfp->phys_id) { 733 case SFF8024_ID_SFP: 734 modinfo->type = ETH_MODULE_SFF_8079; 735 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 736 break; 737 case SFF8024_ID_QSFP_8436_8636: 738 case SFF8024_ID_QSFP28_8636: 739 modinfo->type = ETH_MODULE_SFF_8436; 740 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 741 break; 742 default: 743 netdev_info(netdev, "unknown xcvr type 0x%02x\n", 744 xcvr->sprom[0]); 745 modinfo->type = 0; 746 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 747 break; 748 } 749 750 return 0; 751 } 752 753 static int ionic_get_module_eeprom(struct net_device *netdev, 754 struct ethtool_eeprom *ee, 755 u8 *data) 756 { 757 struct ionic_lif *lif = netdev_priv(netdev); 758 struct ionic_dev *idev = &lif->ionic->idev; 759 struct ionic_xcvr_status *xcvr; 760 char tbuf[sizeof(xcvr->sprom)]; 761 int count = 10; 762 u32 len; 763 764 /* The NIC keeps the module prom up-to-date in the DMA space 765 * so we can simply copy the module bytes into the data buffer. 766 */ 767 xcvr = &idev->port_info->status.xcvr; 768 len = min_t(u32, sizeof(xcvr->sprom), ee->len); 769 770 do { 771 memcpy(data, xcvr->sprom, len); 772 memcpy(tbuf, xcvr->sprom, len); 773 774 /* Let's make sure we got a consistent copy */ 775 if (!memcmp(data, tbuf, len)) 776 break; 777 778 } while (--count); 779 780 if (!count) 781 return -ETIMEDOUT; 782 783 return 0; 784 } 785 786 static int ionic_nway_reset(struct net_device *netdev) 787 { 788 struct ionic_lif *lif = netdev_priv(netdev); 789 struct ionic *ionic = lif->ionic; 790 int err = 0; 791 792 /* flap the link to force auto-negotiation */ 793 794 mutex_lock(&ionic->dev_cmd_lock); 795 796 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN); 797 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 798 799 if (!err) { 800 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP); 801 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 802 } 803 804 mutex_unlock(&ionic->dev_cmd_lock); 805 806 return err; 807 } 808 809 static const struct ethtool_ops ionic_ethtool_ops = { 810 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 811 .get_drvinfo = ionic_get_drvinfo, 812 .get_regs_len = ionic_get_regs_len, 813 .get_regs = ionic_get_regs, 814 .get_link = ethtool_op_get_link, 815 .get_link_ksettings = ionic_get_link_ksettings, 816 .set_link_ksettings = ionic_set_link_ksettings, 817 .get_coalesce = ionic_get_coalesce, 818 .set_coalesce = ionic_set_coalesce, 819 .get_ringparam = ionic_get_ringparam, 820 .set_ringparam = ionic_set_ringparam, 821 .get_channels = ionic_get_channels, 822 .set_channels = ionic_set_channels, 823 .get_strings = ionic_get_strings, 824 .get_ethtool_stats = ionic_get_stats, 825 .get_sset_count = ionic_get_sset_count, 826 .get_priv_flags = ionic_get_priv_flags, 827 .set_priv_flags = ionic_set_priv_flags, 828 .get_rxnfc = ionic_get_rxnfc, 829 .get_rxfh_indir_size = ionic_get_rxfh_indir_size, 830 .get_rxfh_key_size = ionic_get_rxfh_key_size, 831 .get_rxfh = ionic_get_rxfh, 832 .set_rxfh = ionic_set_rxfh, 833 .get_tunable = ionic_get_tunable, 834 .set_tunable = ionic_set_tunable, 835 .get_module_info = ionic_get_module_info, 836 .get_module_eeprom = ionic_get_module_eeprom, 837 .get_pauseparam = ionic_get_pauseparam, 838 .set_pauseparam = ionic_set_pauseparam, 839 .get_fecparam = ionic_get_fecparam, 840 .set_fecparam = ionic_set_fecparam, 841 .nway_reset = ionic_nway_reset, 842 }; 843 844 void ionic_ethtool_set_ops(struct net_device *netdev) 845 { 846 netdev->ethtool_ops = &ionic_ethtool_ops; 847 } 848