1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3 
4 #include <linux/module.h>
5 #include <linux/netdevice.h>
6 #include <linux/sfp.h>
7 
8 #include "ionic.h"
9 #include "ionic_bus.h"
10 #include "ionic_lif.h"
11 #include "ionic_ethtool.h"
12 #include "ionic_stats.h"
13 
14 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf)
15 {
16 	u32 i;
17 
18 	for (i = 0; i < ionic_num_stats_grps; i++)
19 		ionic_stats_groups[i].get_strings(lif, &buf);
20 }
21 
22 static void ionic_get_stats(struct net_device *netdev,
23 			    struct ethtool_stats *stats, u64 *buf)
24 {
25 	struct ionic_lif *lif = netdev_priv(netdev);
26 	u32 i;
27 
28 	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
29 		return;
30 
31 	memset(buf, 0, stats->n_stats * sizeof(*buf));
32 	for (i = 0; i < ionic_num_stats_grps; i++)
33 		ionic_stats_groups[i].get_values(lif, &buf);
34 }
35 
36 static int ionic_get_stats_count(struct ionic_lif *lif)
37 {
38 	int i, num_stats = 0;
39 
40 	for (i = 0; i < ionic_num_stats_grps; i++)
41 		num_stats += ionic_stats_groups[i].get_count(lif);
42 
43 	return num_stats;
44 }
45 
46 static int ionic_get_sset_count(struct net_device *netdev, int sset)
47 {
48 	struct ionic_lif *lif = netdev_priv(netdev);
49 	int count = 0;
50 
51 	switch (sset) {
52 	case ETH_SS_STATS:
53 		count = ionic_get_stats_count(lif);
54 		break;
55 	}
56 	return count;
57 }
58 
59 static void ionic_get_strings(struct net_device *netdev,
60 			      u32 sset, u8 *buf)
61 {
62 	struct ionic_lif *lif = netdev_priv(netdev);
63 
64 	switch (sset) {
65 	case ETH_SS_STATS:
66 		ionic_get_stats_strings(lif, buf);
67 		break;
68 	}
69 }
70 
71 static void ionic_get_drvinfo(struct net_device *netdev,
72 			      struct ethtool_drvinfo *drvinfo)
73 {
74 	struct ionic_lif *lif = netdev_priv(netdev);
75 	struct ionic *ionic = lif->ionic;
76 
77 	strscpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver));
78 	strscpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version,
79 		sizeof(drvinfo->fw_version));
80 	strscpy(drvinfo->bus_info, ionic_bus_info(ionic),
81 		sizeof(drvinfo->bus_info));
82 }
83 
84 static int ionic_get_regs_len(struct net_device *netdev)
85 {
86 	return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32);
87 }
88 
89 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
90 			   void *p)
91 {
92 	struct ionic_lif *lif = netdev_priv(netdev);
93 	unsigned int offset;
94 	unsigned int size;
95 
96 	regs->version = IONIC_DEV_CMD_REG_VERSION;
97 
98 	offset = 0;
99 	size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
100 	memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
101 
102 	offset += size;
103 	size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
104 	memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size);
105 }
106 
107 static int ionic_get_link_ksettings(struct net_device *netdev,
108 				    struct ethtool_link_ksettings *ks)
109 {
110 	struct ionic_lif *lif = netdev_priv(netdev);
111 	struct ionic_dev *idev = &lif->ionic->idev;
112 	int copper_seen = 0;
113 
114 	ethtool_link_ksettings_zero_link_mode(ks, supported);
115 
116 	if (!idev->port_info) {
117 		netdev_err(netdev, "port_info not initialized\n");
118 		return -EOPNOTSUPP;
119 	}
120 
121 	/* The port_info data is found in a DMA space that the NIC keeps
122 	 * up-to-date, so there's no need to request the data from the
123 	 * NIC, we already have it in our memory space.
124 	 */
125 
126 	switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) {
127 		/* Copper */
128 	case IONIC_XCVR_PID_QSFP_100G_CR4:
129 		ethtool_link_ksettings_add_link_mode(ks, supported,
130 						     100000baseCR4_Full);
131 		copper_seen++;
132 		break;
133 	case IONIC_XCVR_PID_QSFP_40GBASE_CR4:
134 		ethtool_link_ksettings_add_link_mode(ks, supported,
135 						     40000baseCR4_Full);
136 		copper_seen++;
137 		break;
138 	case IONIC_XCVR_PID_SFP_25GBASE_CR_S:
139 	case IONIC_XCVR_PID_SFP_25GBASE_CR_L:
140 	case IONIC_XCVR_PID_SFP_25GBASE_CR_N:
141 		ethtool_link_ksettings_add_link_mode(ks, supported,
142 						     25000baseCR_Full);
143 		copper_seen++;
144 		break;
145 	case IONIC_XCVR_PID_SFP_10GBASE_AOC:
146 	case IONIC_XCVR_PID_SFP_10GBASE_CU:
147 		ethtool_link_ksettings_add_link_mode(ks, supported,
148 						     10000baseCR_Full);
149 		copper_seen++;
150 		break;
151 
152 		/* Fibre */
153 	case IONIC_XCVR_PID_QSFP_100G_SR4:
154 	case IONIC_XCVR_PID_QSFP_100G_AOC:
155 		ethtool_link_ksettings_add_link_mode(ks, supported,
156 						     100000baseSR4_Full);
157 		break;
158 	case IONIC_XCVR_PID_QSFP_100G_CWDM4:
159 	case IONIC_XCVR_PID_QSFP_100G_PSM4:
160 	case IONIC_XCVR_PID_QSFP_100G_LR4:
161 		ethtool_link_ksettings_add_link_mode(ks, supported,
162 						     100000baseLR4_ER4_Full);
163 		break;
164 	case IONIC_XCVR_PID_QSFP_100G_ER4:
165 		ethtool_link_ksettings_add_link_mode(ks, supported,
166 						     100000baseLR4_ER4_Full);
167 		break;
168 	case IONIC_XCVR_PID_QSFP_40GBASE_SR4:
169 	case IONIC_XCVR_PID_QSFP_40GBASE_AOC:
170 		ethtool_link_ksettings_add_link_mode(ks, supported,
171 						     40000baseSR4_Full);
172 		break;
173 	case IONIC_XCVR_PID_QSFP_40GBASE_LR4:
174 		ethtool_link_ksettings_add_link_mode(ks, supported,
175 						     40000baseLR4_Full);
176 		break;
177 	case IONIC_XCVR_PID_SFP_25GBASE_SR:
178 	case IONIC_XCVR_PID_SFP_25GBASE_AOC:
179 	case IONIC_XCVR_PID_SFP_25GBASE_ACC:
180 		ethtool_link_ksettings_add_link_mode(ks, supported,
181 						     25000baseSR_Full);
182 		break;
183 	case IONIC_XCVR_PID_SFP_10GBASE_SR:
184 		ethtool_link_ksettings_add_link_mode(ks, supported,
185 						     10000baseSR_Full);
186 		break;
187 	case IONIC_XCVR_PID_SFP_10GBASE_LR:
188 		ethtool_link_ksettings_add_link_mode(ks, supported,
189 						     10000baseLR_Full);
190 		break;
191 	case IONIC_XCVR_PID_SFP_10GBASE_LRM:
192 		ethtool_link_ksettings_add_link_mode(ks, supported,
193 						     10000baseLRM_Full);
194 		break;
195 	case IONIC_XCVR_PID_SFP_10GBASE_ER:
196 		ethtool_link_ksettings_add_link_mode(ks, supported,
197 						     10000baseER_Full);
198 		break;
199 	case IONIC_XCVR_PID_SFP_10GBASE_T:
200 		ethtool_link_ksettings_add_link_mode(ks, supported,
201 						     10000baseT_Full);
202 		break;
203 	case IONIC_XCVR_PID_SFP_1000BASE_T:
204 		ethtool_link_ksettings_add_link_mode(ks, supported,
205 						     1000baseT_Full);
206 		break;
207 	case IONIC_XCVR_PID_UNKNOWN:
208 		/* This means there's no module plugged in */
209 		break;
210 	default:
211 		dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n",
212 			 idev->port_info->status.xcvr.pid,
213 			 idev->port_info->status.xcvr.pid);
214 		break;
215 	}
216 
217 	linkmode_copy(ks->link_modes.advertising, ks->link_modes.supported);
218 
219 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
220 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
221 	if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC)
222 		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER);
223 	else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS)
224 		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
225 
226 	ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
227 	ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
228 
229 	if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER ||
230 	    copper_seen)
231 		ks->base.port = PORT_DA;
232 	else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER)
233 		ks->base.port = PORT_FIBRE;
234 	else
235 		ks->base.port = PORT_NONE;
236 
237 	if (ks->base.port != PORT_NONE) {
238 		ks->base.speed = le32_to_cpu(lif->info->status.link_speed);
239 
240 		if (le16_to_cpu(lif->info->status.link_status))
241 			ks->base.duplex = DUPLEX_FULL;
242 		else
243 			ks->base.duplex = DUPLEX_UNKNOWN;
244 
245 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
246 
247 		if (idev->port_info->config.an_enable) {
248 			ethtool_link_ksettings_add_link_mode(ks, advertising,
249 							     Autoneg);
250 			ks->base.autoneg = AUTONEG_ENABLE;
251 		}
252 	}
253 
254 	return 0;
255 }
256 
257 static int ionic_set_link_ksettings(struct net_device *netdev,
258 				    const struct ethtool_link_ksettings *ks)
259 {
260 	struct ionic_lif *lif = netdev_priv(netdev);
261 	struct ionic_dev *idev = &lif->ionic->idev;
262 	struct ionic *ionic = lif->ionic;
263 	int err = 0;
264 
265 	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
266 		return -EBUSY;
267 
268 	/* set autoneg */
269 	if (ks->base.autoneg != idev->port_info->config.an_enable) {
270 		mutex_lock(&ionic->dev_cmd_lock);
271 		ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg);
272 		err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
273 		mutex_unlock(&ionic->dev_cmd_lock);
274 		if (err)
275 			return err;
276 	}
277 
278 	/* set speed */
279 	if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) {
280 		mutex_lock(&ionic->dev_cmd_lock);
281 		ionic_dev_cmd_port_speed(idev, ks->base.speed);
282 		err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
283 		mutex_unlock(&ionic->dev_cmd_lock);
284 		if (err)
285 			return err;
286 	}
287 
288 	return 0;
289 }
290 
291 static void ionic_get_pauseparam(struct net_device *netdev,
292 				 struct ethtool_pauseparam *pause)
293 {
294 	struct ionic_lif *lif = netdev_priv(netdev);
295 	u8 pause_type;
296 
297 	pause->autoneg = 0;
298 
299 	pause_type = lif->ionic->idev.port_info->config.pause_type;
300 	if (pause_type) {
301 		pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0;
302 		pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0;
303 	}
304 }
305 
306 static int ionic_set_pauseparam(struct net_device *netdev,
307 				struct ethtool_pauseparam *pause)
308 {
309 	struct ionic_lif *lif = netdev_priv(netdev);
310 	struct ionic *ionic = lif->ionic;
311 	u32 requested_pause;
312 	int err;
313 
314 	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
315 		return -EBUSY;
316 
317 	if (pause->autoneg)
318 		return -EOPNOTSUPP;
319 
320 	/* change both at the same time */
321 	requested_pause = IONIC_PORT_PAUSE_TYPE_LINK;
322 	if (pause->rx_pause)
323 		requested_pause |= IONIC_PAUSE_F_RX;
324 	if (pause->tx_pause)
325 		requested_pause |= IONIC_PAUSE_F_TX;
326 
327 	if (requested_pause == lif->ionic->idev.port_info->config.pause_type)
328 		return 0;
329 
330 	mutex_lock(&ionic->dev_cmd_lock);
331 	ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause);
332 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
333 	mutex_unlock(&ionic->dev_cmd_lock);
334 	if (err)
335 		return err;
336 
337 	return 0;
338 }
339 
340 static int ionic_get_fecparam(struct net_device *netdev,
341 			      struct ethtool_fecparam *fec)
342 {
343 	struct ionic_lif *lif = netdev_priv(netdev);
344 
345 	switch (lif->ionic->idev.port_info->config.fec_type) {
346 	case IONIC_PORT_FEC_TYPE_NONE:
347 		fec->active_fec = ETHTOOL_FEC_OFF;
348 		break;
349 	case IONIC_PORT_FEC_TYPE_RS:
350 		fec->active_fec = ETHTOOL_FEC_RS;
351 		break;
352 	case IONIC_PORT_FEC_TYPE_FC:
353 		fec->active_fec = ETHTOOL_FEC_BASER;
354 		break;
355 	}
356 
357 	fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER;
358 
359 	return 0;
360 }
361 
362 static int ionic_set_fecparam(struct net_device *netdev,
363 			      struct ethtool_fecparam *fec)
364 {
365 	struct ionic_lif *lif = netdev_priv(netdev);
366 	u8 fec_type;
367 	int ret = 0;
368 
369 	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
370 		return -EBUSY;
371 
372 	if (lif->ionic->idev.port_info->config.an_enable) {
373 		netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n");
374 		return -EINVAL;
375 	}
376 
377 	switch (fec->fec) {
378 	case ETHTOOL_FEC_NONE:
379 		fec_type = IONIC_PORT_FEC_TYPE_NONE;
380 		break;
381 	case ETHTOOL_FEC_OFF:
382 		fec_type = IONIC_PORT_FEC_TYPE_NONE;
383 		break;
384 	case ETHTOOL_FEC_RS:
385 		fec_type = IONIC_PORT_FEC_TYPE_RS;
386 		break;
387 	case ETHTOOL_FEC_BASER:
388 		fec_type = IONIC_PORT_FEC_TYPE_FC;
389 		break;
390 	case ETHTOOL_FEC_AUTO:
391 	default:
392 		netdev_err(netdev, "FEC request 0x%04x not supported\n",
393 			   fec->fec);
394 		return -EINVAL;
395 	}
396 
397 	if (fec_type != lif->ionic->idev.port_info->config.fec_type) {
398 		mutex_lock(&lif->ionic->dev_cmd_lock);
399 		ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type);
400 		ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT);
401 		mutex_unlock(&lif->ionic->dev_cmd_lock);
402 	}
403 
404 	return ret;
405 }
406 
407 static int ionic_get_coalesce(struct net_device *netdev,
408 			      struct ethtool_coalesce *coalesce,
409 			      struct kernel_ethtool_coalesce *kernel_coal,
410 			      struct netlink_ext_ack *extack)
411 {
412 	struct ionic_lif *lif = netdev_priv(netdev);
413 
414 	coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs;
415 	coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs;
416 
417 	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
418 		coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
419 	else
420 		coalesce->use_adaptive_tx_coalesce = 0;
421 
422 	coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
423 
424 	return 0;
425 }
426 
427 static int ionic_set_coalesce(struct net_device *netdev,
428 			      struct ethtool_coalesce *coalesce,
429 			      struct kernel_ethtool_coalesce *kernel_coal,
430 			      struct netlink_ext_ack *extack)
431 {
432 	struct ionic_lif *lif = netdev_priv(netdev);
433 	struct ionic_identity *ident;
434 	u32 rx_coal, rx_dim;
435 	u32 tx_coal, tx_dim;
436 	unsigned int i;
437 
438 	ident = &lif->ionic->ident;
439 	if (ident->dev.intr_coal_div == 0) {
440 		netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n",
441 			    ident->dev.intr_coal_div);
442 		return -EIO;
443 	}
444 
445 	/* Tx normally shares Rx interrupt, so only change Rx if not split */
446 	if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) &&
447 	    (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs ||
448 	     coalesce->use_adaptive_tx_coalesce)) {
449 		netdev_warn(netdev, "only rx parameters can be changed\n");
450 		return -EINVAL;
451 	}
452 
453 	/* Convert the usec request to a HW usable value.  If they asked
454 	 * for non-zero and it resolved to zero, bump it up
455 	 */
456 	rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs);
457 	if (!rx_coal && coalesce->rx_coalesce_usecs)
458 		rx_coal = 1;
459 	tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs);
460 	if (!tx_coal && coalesce->tx_coalesce_usecs)
461 		tx_coal = 1;
462 
463 	if (rx_coal > IONIC_INTR_CTRL_COAL_MAX ||
464 	    tx_coal > IONIC_INTR_CTRL_COAL_MAX)
465 		return -ERANGE;
466 
467 	/* Save the new values */
468 	lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs;
469 	lif->rx_coalesce_hw = rx_coal;
470 
471 	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
472 		lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs;
473 	else
474 		lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs;
475 	lif->tx_coalesce_hw = tx_coal;
476 
477 	if (coalesce->use_adaptive_rx_coalesce) {
478 		set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
479 		rx_dim = rx_coal;
480 	} else {
481 		clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
482 		rx_dim = 0;
483 	}
484 
485 	if (coalesce->use_adaptive_tx_coalesce) {
486 		set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
487 		tx_dim = tx_coal;
488 	} else {
489 		clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
490 		tx_dim = 0;
491 	}
492 
493 	if (test_bit(IONIC_LIF_F_UP, lif->state)) {
494 		for (i = 0; i < lif->nxqs; i++) {
495 			if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) {
496 				ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
497 						     lif->rxqcqs[i]->intr.index,
498 						     lif->rx_coalesce_hw);
499 				lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim;
500 			}
501 
502 			if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) {
503 				ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
504 						     lif->txqcqs[i]->intr.index,
505 						     lif->tx_coalesce_hw);
506 				lif->txqcqs[i]->intr.dim_coal_hw = tx_dim;
507 			}
508 		}
509 	}
510 
511 	return 0;
512 }
513 
514 static int ionic_validate_cmb_config(struct ionic_lif *lif,
515 				     struct ionic_queue_params *qparam)
516 {
517 	int pages_have, pages_required = 0;
518 	unsigned long sz;
519 
520 	if (!lif->ionic->idev.cmb_inuse &&
521 	    (qparam->cmb_tx || qparam->cmb_rx)) {
522 		netdev_info(lif->netdev, "CMB rings are not supported on this device\n");
523 		return -EOPNOTSUPP;
524 	}
525 
526 	if (qparam->cmb_tx) {
527 		if (!(lif->qtype_info[IONIC_QTYPE_TXQ].features & IONIC_QIDENT_F_CMB)) {
528 			netdev_info(lif->netdev,
529 				    "CMB rings for tx-push are not supported on this device\n");
530 			return -EOPNOTSUPP;
531 		}
532 
533 		sz = sizeof(struct ionic_txq_desc) * qparam->ntxq_descs * qparam->nxqs;
534 		pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
535 	}
536 
537 	if (qparam->cmb_rx) {
538 		if (!(lif->qtype_info[IONIC_QTYPE_RXQ].features & IONIC_QIDENT_F_CMB)) {
539 			netdev_info(lif->netdev,
540 				    "CMB rings for rx-push are not supported on this device\n");
541 			return -EOPNOTSUPP;
542 		}
543 
544 		sz = sizeof(struct ionic_rxq_desc) * qparam->nrxq_descs * qparam->nxqs;
545 		pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
546 	}
547 
548 	pages_have = lif->ionic->bars[IONIC_PCI_BAR_CMB].len / PAGE_SIZE;
549 	if (pages_required > pages_have) {
550 		netdev_info(lif->netdev,
551 			    "Not enough CMB pages for number of queues and size of descriptor rings, need %d have %d",
552 			    pages_required, pages_have);
553 		return -ENOMEM;
554 	}
555 
556 	return pages_required;
557 }
558 
559 static int ionic_cmb_rings_toggle(struct ionic_lif *lif, bool cmb_tx, bool cmb_rx)
560 {
561 	struct ionic_queue_params qparam;
562 	int pages_used;
563 
564 	if (netif_running(lif->netdev)) {
565 		netdev_info(lif->netdev, "Please stop device to toggle CMB for tx/rx-push\n");
566 		return -EBUSY;
567 	}
568 
569 	ionic_init_queue_params(lif, &qparam);
570 	qparam.cmb_tx = cmb_tx;
571 	qparam.cmb_rx = cmb_rx;
572 	pages_used = ionic_validate_cmb_config(lif, &qparam);
573 	if (pages_used < 0)
574 		return pages_used;
575 
576 	if (cmb_tx)
577 		set_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
578 	else
579 		clear_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
580 
581 	if (cmb_rx)
582 		set_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
583 	else
584 		clear_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
585 
586 	if (cmb_tx || cmb_rx)
587 		netdev_info(lif->netdev, "Enabling CMB %s %s rings - %d pages\n",
588 			    cmb_tx ? "TX" : "", cmb_rx ? "RX" : "", pages_used);
589 	else
590 		netdev_info(lif->netdev, "Disabling CMB rings\n");
591 
592 	return 0;
593 }
594 
595 static void ionic_get_ringparam(struct net_device *netdev,
596 				struct ethtool_ringparam *ring,
597 				struct kernel_ethtool_ringparam *kernel_ring,
598 				struct netlink_ext_ack *extack)
599 {
600 	struct ionic_lif *lif = netdev_priv(netdev);
601 
602 	ring->tx_max_pending = IONIC_MAX_TX_DESC;
603 	ring->tx_pending = lif->ntxq_descs;
604 	ring->rx_max_pending = IONIC_MAX_RX_DESC;
605 	ring->rx_pending = lif->nrxq_descs;
606 	kernel_ring->tx_push = test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
607 	kernel_ring->rx_push = test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
608 }
609 
610 static int ionic_set_ringparam(struct net_device *netdev,
611 			       struct ethtool_ringparam *ring,
612 			       struct kernel_ethtool_ringparam *kernel_ring,
613 			       struct netlink_ext_ack *extack)
614 {
615 	struct ionic_lif *lif = netdev_priv(netdev);
616 	struct ionic_queue_params qparam;
617 	int err;
618 
619 	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
620 		return -EBUSY;
621 
622 	ionic_init_queue_params(lif, &qparam);
623 
624 	if (ring->rx_mini_pending || ring->rx_jumbo_pending) {
625 		netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");
626 		return -EINVAL;
627 	}
628 
629 	if (!is_power_of_2(ring->tx_pending) ||
630 	    !is_power_of_2(ring->rx_pending)) {
631 		netdev_info(netdev, "Descriptor count must be a power of 2\n");
632 		return -EINVAL;
633 	}
634 
635 	/* if nothing to do return success */
636 	if (ring->tx_pending == lif->ntxq_descs &&
637 	    ring->rx_pending == lif->nrxq_descs &&
638 	    kernel_ring->tx_push == test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state) &&
639 	    kernel_ring->rx_push == test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state))
640 		return 0;
641 
642 	qparam.ntxq_descs = ring->tx_pending;
643 	qparam.nrxq_descs = ring->rx_pending;
644 	qparam.cmb_tx = kernel_ring->tx_push;
645 	qparam.cmb_rx = kernel_ring->rx_push;
646 
647 	err = ionic_validate_cmb_config(lif, &qparam);
648 	if (err < 0)
649 		return err;
650 
651 	if (kernel_ring->tx_push != test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state) ||
652 	    kernel_ring->rx_push != test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state)) {
653 		err = ionic_cmb_rings_toggle(lif, kernel_ring->tx_push,
654 					     kernel_ring->rx_push);
655 		if (err < 0)
656 			return err;
657 	}
658 
659 	if (ring->tx_pending != lif->ntxq_descs)
660 		netdev_info(netdev, "Changing Tx ring size from %d to %d\n",
661 			    lif->ntxq_descs, ring->tx_pending);
662 
663 	if (ring->rx_pending != lif->nrxq_descs)
664 		netdev_info(netdev, "Changing Rx ring size from %d to %d\n",
665 			    lif->nrxq_descs, ring->rx_pending);
666 
667 	/* if we're not running, just set the values and return */
668 	if (!netif_running(lif->netdev)) {
669 		lif->ntxq_descs = ring->tx_pending;
670 		lif->nrxq_descs = ring->rx_pending;
671 		return 0;
672 	}
673 
674 	mutex_lock(&lif->queue_lock);
675 	err = ionic_reconfigure_queues(lif, &qparam);
676 	mutex_unlock(&lif->queue_lock);
677 	if (err)
678 		netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err);
679 
680 	return err;
681 }
682 
683 static void ionic_get_channels(struct net_device *netdev,
684 			       struct ethtool_channels *ch)
685 {
686 	struct ionic_lif *lif = netdev_priv(netdev);
687 
688 	/* report maximum channels */
689 	ch->max_combined = lif->ionic->ntxqs_per_lif;
690 	ch->max_rx = lif->ionic->ntxqs_per_lif / 2;
691 	ch->max_tx = lif->ionic->ntxqs_per_lif / 2;
692 
693 	/* report current channels */
694 	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) {
695 		ch->rx_count = lif->nxqs;
696 		ch->tx_count = lif->nxqs;
697 	} else {
698 		ch->combined_count = lif->nxqs;
699 	}
700 }
701 
702 static int ionic_set_channels(struct net_device *netdev,
703 			      struct ethtool_channels *ch)
704 {
705 	struct ionic_lif *lif = netdev_priv(netdev);
706 	struct ionic_queue_params qparam;
707 	int max_cnt;
708 	int err;
709 
710 	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
711 		return -EBUSY;
712 
713 	ionic_init_queue_params(lif, &qparam);
714 
715 	if (ch->rx_count != ch->tx_count) {
716 		netdev_info(netdev, "The rx and tx count must be equal\n");
717 		return -EINVAL;
718 	}
719 
720 	if (ch->combined_count && ch->rx_count) {
721 		netdev_info(netdev, "Use either combined or rx and tx, not both\n");
722 		return -EINVAL;
723 	}
724 
725 	max_cnt = lif->ionic->ntxqs_per_lif;
726 	if (ch->combined_count) {
727 		if (ch->combined_count > max_cnt)
728 			return -EINVAL;
729 
730 		if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
731 			netdev_info(lif->netdev, "Sharing queue interrupts\n");
732 		else if (ch->combined_count == lif->nxqs)
733 			return 0;
734 
735 		if (lif->nxqs != ch->combined_count)
736 			netdev_info(netdev, "Changing queue count from %d to %d\n",
737 				    lif->nxqs, ch->combined_count);
738 
739 		qparam.nxqs = ch->combined_count;
740 		qparam.intr_split = false;
741 	} else {
742 		max_cnt /= 2;
743 		if (ch->rx_count > max_cnt)
744 			return -EINVAL;
745 
746 		if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
747 			netdev_info(lif->netdev, "Splitting queue interrupts\n");
748 		else if (ch->rx_count == lif->nxqs)
749 			return 0;
750 
751 		if (lif->nxqs != ch->rx_count)
752 			netdev_info(netdev, "Changing queue count from %d to %d\n",
753 				    lif->nxqs, ch->rx_count);
754 
755 		qparam.nxqs = ch->rx_count;
756 		qparam.intr_split = true;
757 	}
758 
759 	err = ionic_validate_cmb_config(lif, &qparam);
760 	if (err < 0)
761 		return err;
762 
763 	/* if we're not running, just set the values and return */
764 	if (!netif_running(lif->netdev)) {
765 		lif->nxqs = qparam.nxqs;
766 
767 		if (qparam.intr_split) {
768 			set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
769 		} else {
770 			clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
771 			lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
772 			lif->tx_coalesce_hw = lif->rx_coalesce_hw;
773 		}
774 		return 0;
775 	}
776 
777 	mutex_lock(&lif->queue_lock);
778 	err = ionic_reconfigure_queues(lif, &qparam);
779 	mutex_unlock(&lif->queue_lock);
780 	if (err)
781 		netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err);
782 
783 	return err;
784 }
785 
786 static int ionic_get_rxnfc(struct net_device *netdev,
787 			   struct ethtool_rxnfc *info, u32 *rules)
788 {
789 	struct ionic_lif *lif = netdev_priv(netdev);
790 	int err = 0;
791 
792 	switch (info->cmd) {
793 	case ETHTOOL_GRXRINGS:
794 		info->data = lif->nxqs;
795 		break;
796 	default:
797 		netdev_dbg(netdev, "Command parameter %d is not supported\n",
798 			   info->cmd);
799 		err = -EOPNOTSUPP;
800 	}
801 
802 	return err;
803 }
804 
805 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev)
806 {
807 	struct ionic_lif *lif = netdev_priv(netdev);
808 
809 	return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
810 }
811 
812 static u32 ionic_get_rxfh_key_size(struct net_device *netdev)
813 {
814 	return IONIC_RSS_HASH_KEY_SIZE;
815 }
816 
817 static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
818 			  u8 *hfunc)
819 {
820 	struct ionic_lif *lif = netdev_priv(netdev);
821 	unsigned int i, tbl_sz;
822 
823 	if (indir) {
824 		tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
825 		for (i = 0; i < tbl_sz; i++)
826 			indir[i] = lif->rss_ind_tbl[i];
827 	}
828 
829 	if (key)
830 		memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE);
831 
832 	if (hfunc)
833 		*hfunc = ETH_RSS_HASH_TOP;
834 
835 	return 0;
836 }
837 
838 static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir,
839 			  const u8 *key, const u8 hfunc)
840 {
841 	struct ionic_lif *lif = netdev_priv(netdev);
842 
843 	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
844 		return -EOPNOTSUPP;
845 
846 	return ionic_lif_rss_config(lif, lif->rss_types, key, indir);
847 }
848 
849 static int ionic_set_tunable(struct net_device *dev,
850 			     const struct ethtool_tunable *tuna,
851 			     const void *data)
852 {
853 	struct ionic_lif *lif = netdev_priv(dev);
854 
855 	switch (tuna->id) {
856 	case ETHTOOL_RX_COPYBREAK:
857 		lif->rx_copybreak = *(u32 *)data;
858 		break;
859 	default:
860 		return -EOPNOTSUPP;
861 	}
862 
863 	return 0;
864 }
865 
866 static int ionic_get_tunable(struct net_device *netdev,
867 			     const struct ethtool_tunable *tuna, void *data)
868 {
869 	struct ionic_lif *lif = netdev_priv(netdev);
870 
871 	switch (tuna->id) {
872 	case ETHTOOL_RX_COPYBREAK:
873 		*(u32 *)data = lif->rx_copybreak;
874 		break;
875 	default:
876 		return -EOPNOTSUPP;
877 	}
878 
879 	return 0;
880 }
881 
882 static int ionic_get_module_info(struct net_device *netdev,
883 				 struct ethtool_modinfo *modinfo)
884 
885 {
886 	struct ionic_lif *lif = netdev_priv(netdev);
887 	struct ionic_dev *idev = &lif->ionic->idev;
888 	struct ionic_xcvr_status *xcvr;
889 	struct sfp_eeprom_base *sfp;
890 
891 	xcvr = &idev->port_info->status.xcvr;
892 	sfp = (struct sfp_eeprom_base *) xcvr->sprom;
893 
894 	/* report the module data type and length */
895 	switch (sfp->phys_id) {
896 	case SFF8024_ID_SFP:
897 		modinfo->type = ETH_MODULE_SFF_8079;
898 		modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
899 		break;
900 	case SFF8024_ID_QSFP_8436_8636:
901 	case SFF8024_ID_QSFP28_8636:
902 		modinfo->type = ETH_MODULE_SFF_8436;
903 		modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
904 		break;
905 	default:
906 		netdev_info(netdev, "unknown xcvr type 0x%02x\n",
907 			    xcvr->sprom[0]);
908 		modinfo->type = 0;
909 		modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
910 		break;
911 	}
912 
913 	return 0;
914 }
915 
916 static int ionic_get_module_eeprom(struct net_device *netdev,
917 				   struct ethtool_eeprom *ee,
918 				   u8 *data)
919 {
920 	struct ionic_lif *lif = netdev_priv(netdev);
921 	struct ionic_dev *idev = &lif->ionic->idev;
922 	struct ionic_xcvr_status *xcvr;
923 	char tbuf[sizeof(xcvr->sprom)];
924 	int count = 10;
925 	u32 len;
926 
927 	/* The NIC keeps the module prom up-to-date in the DMA space
928 	 * so we can simply copy the module bytes into the data buffer.
929 	 */
930 	xcvr = &idev->port_info->status.xcvr;
931 	len = min_t(u32, sizeof(xcvr->sprom), ee->len);
932 
933 	do {
934 		memcpy(data, xcvr->sprom, len);
935 		memcpy(tbuf, xcvr->sprom, len);
936 
937 		/* Let's make sure we got a consistent copy */
938 		if (!memcmp(data, tbuf, len))
939 			break;
940 
941 	} while (--count);
942 
943 	if (!count)
944 		return -ETIMEDOUT;
945 
946 	return 0;
947 }
948 
949 static int ionic_get_ts_info(struct net_device *netdev,
950 			     struct ethtool_ts_info *info)
951 {
952 	struct ionic_lif *lif = netdev_priv(netdev);
953 	struct ionic *ionic = lif->ionic;
954 	__le64 mask;
955 
956 	if (!lif->phc || !lif->phc->ptp)
957 		return ethtool_op_get_ts_info(netdev, info);
958 
959 	info->phc_index = ptp_clock_index(lif->phc->ptp);
960 
961 	info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
962 				SOF_TIMESTAMPING_RX_SOFTWARE |
963 				SOF_TIMESTAMPING_SOFTWARE |
964 				SOF_TIMESTAMPING_TX_HARDWARE |
965 				SOF_TIMESTAMPING_RX_HARDWARE |
966 				SOF_TIMESTAMPING_RAW_HARDWARE;
967 
968 	/* tx modes */
969 
970 	info->tx_types = BIT(HWTSTAMP_TX_OFF) |
971 			 BIT(HWTSTAMP_TX_ON);
972 
973 	mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC));
974 	if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
975 		info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
976 
977 	mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P));
978 	if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
979 		info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P);
980 
981 	/* rx filters */
982 
983 	info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
984 			   BIT(HWTSTAMP_FILTER_ALL);
985 
986 	mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL);
987 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
988 		info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL);
989 
990 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC);
991 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
992 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC);
993 
994 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ);
995 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
996 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);
997 
998 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL);
999 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1000 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT);
1001 
1002 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC);
1003 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1004 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC);
1005 
1006 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ);
1007 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1008 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1009 
1010 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL);
1011 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1012 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
1013 
1014 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC);
1015 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1016 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC);
1017 
1018 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ);
1019 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1020 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1021 
1022 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL);
1023 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1024 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
1025 
1026 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC);
1027 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1028 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC);
1029 
1030 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ);
1031 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1032 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
1033 
1034 	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL);
1035 	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1036 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
1037 
1038 	return 0;
1039 }
1040 
1041 static int ionic_nway_reset(struct net_device *netdev)
1042 {
1043 	struct ionic_lif *lif = netdev_priv(netdev);
1044 	struct ionic *ionic = lif->ionic;
1045 	int err = 0;
1046 
1047 	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
1048 		return -EBUSY;
1049 
1050 	/* flap the link to force auto-negotiation */
1051 
1052 	mutex_lock(&ionic->dev_cmd_lock);
1053 
1054 	ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN);
1055 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
1056 
1057 	if (!err) {
1058 		ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
1059 		err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
1060 	}
1061 
1062 	mutex_unlock(&ionic->dev_cmd_lock);
1063 
1064 	return err;
1065 }
1066 
1067 static const struct ethtool_ops ionic_ethtool_ops = {
1068 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1069 				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
1070 				     ETHTOOL_COALESCE_USE_ADAPTIVE_TX,
1071 	.supported_ring_params = ETHTOOL_RING_USE_TX_PUSH |
1072 				 ETHTOOL_RING_USE_RX_PUSH,
1073 	.get_drvinfo		= ionic_get_drvinfo,
1074 	.get_regs_len		= ionic_get_regs_len,
1075 	.get_regs		= ionic_get_regs,
1076 	.get_link		= ethtool_op_get_link,
1077 	.get_link_ksettings	= ionic_get_link_ksettings,
1078 	.set_link_ksettings	= ionic_set_link_ksettings,
1079 	.get_coalesce		= ionic_get_coalesce,
1080 	.set_coalesce		= ionic_set_coalesce,
1081 	.get_ringparam		= ionic_get_ringparam,
1082 	.set_ringparam		= ionic_set_ringparam,
1083 	.get_channels		= ionic_get_channels,
1084 	.set_channels		= ionic_set_channels,
1085 	.get_strings		= ionic_get_strings,
1086 	.get_ethtool_stats	= ionic_get_stats,
1087 	.get_sset_count		= ionic_get_sset_count,
1088 	.get_rxnfc		= ionic_get_rxnfc,
1089 	.get_rxfh_indir_size	= ionic_get_rxfh_indir_size,
1090 	.get_rxfh_key_size	= ionic_get_rxfh_key_size,
1091 	.get_rxfh		= ionic_get_rxfh,
1092 	.set_rxfh		= ionic_set_rxfh,
1093 	.get_tunable		= ionic_get_tunable,
1094 	.set_tunable		= ionic_set_tunable,
1095 	.get_module_info	= ionic_get_module_info,
1096 	.get_module_eeprom	= ionic_get_module_eeprom,
1097 	.get_pauseparam		= ionic_get_pauseparam,
1098 	.set_pauseparam		= ionic_set_pauseparam,
1099 	.get_fecparam		= ionic_get_fecparam,
1100 	.set_fecparam		= ionic_set_fecparam,
1101 	.get_ts_info		= ionic_get_ts_info,
1102 	.nway_reset		= ionic_nway_reset,
1103 };
1104 
1105 void ionic_ethtool_set_ops(struct net_device *netdev)
1106 {
1107 	netdev->ethtool_ops = &ionic_ethtool_ops;
1108 }
1109