1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/interrupt.h> 15 #include <linux/pci.h> 16 #include <linux/etherdevice.h> 17 #include <linux/crc32.h> 18 #include <linux/firmware.h> 19 #include <linux/utsname.h> 20 #include <linux/time.h> 21 #include "bnxt_hsi.h" 22 #include "bnxt.h" 23 #include "bnxt_xdp.h" 24 #include "bnxt_ethtool.h" 25 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 26 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 27 #include "bnxt_coredump.h" 28 #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100) 29 #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 30 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 31 32 static u32 bnxt_get_msglevel(struct net_device *dev) 33 { 34 struct bnxt *bp = netdev_priv(dev); 35 36 return bp->msg_enable; 37 } 38 39 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 40 { 41 struct bnxt *bp = netdev_priv(dev); 42 43 bp->msg_enable = value; 44 } 45 46 static int bnxt_get_coalesce(struct net_device *dev, 47 struct ethtool_coalesce *coal) 48 { 49 struct bnxt *bp = netdev_priv(dev); 50 struct bnxt_coal *hw_coal; 51 u16 mult; 52 53 memset(coal, 0, sizeof(*coal)); 54 55 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; 56 57 hw_coal = &bp->rx_coal; 58 mult = hw_coal->bufs_per_record; 59 coal->rx_coalesce_usecs = hw_coal->coal_ticks; 60 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; 61 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 62 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 63 64 hw_coal = &bp->tx_coal; 65 mult = hw_coal->bufs_per_record; 66 coal->tx_coalesce_usecs = hw_coal->coal_ticks; 67 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult; 68 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 69 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 70 71 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 72 73 return 0; 74 } 75 76 static int bnxt_set_coalesce(struct net_device *dev, 77 struct ethtool_coalesce *coal) 78 { 79 struct bnxt *bp = netdev_priv(dev); 80 bool update_stats = false; 81 struct bnxt_coal *hw_coal; 82 int rc = 0; 83 u16 mult; 84 85 if (coal->use_adaptive_rx_coalesce) { 86 bp->flags |= BNXT_FLAG_DIM; 87 } else { 88 if (bp->flags & BNXT_FLAG_DIM) { 89 bp->flags &= ~(BNXT_FLAG_DIM); 90 goto reset_coalesce; 91 } 92 } 93 94 hw_coal = &bp->rx_coal; 95 mult = hw_coal->bufs_per_record; 96 hw_coal->coal_ticks = coal->rx_coalesce_usecs; 97 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult; 98 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq; 99 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult; 100 101 hw_coal = &bp->tx_coal; 102 mult = hw_coal->bufs_per_record; 103 hw_coal->coal_ticks = coal->tx_coalesce_usecs; 104 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult; 105 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq; 106 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult; 107 108 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 109 u32 stats_ticks = coal->stats_block_coalesce_usecs; 110 111 /* Allow 0, which means disable. */ 112 if (stats_ticks) 113 stats_ticks = clamp_t(u32, stats_ticks, 114 BNXT_MIN_STATS_COAL_TICKS, 115 BNXT_MAX_STATS_COAL_TICKS); 116 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 117 bp->stats_coal_ticks = stats_ticks; 118 if (bp->stats_coal_ticks) 119 bp->current_interval = 120 bp->stats_coal_ticks * HZ / 1000000; 121 else 122 bp->current_interval = BNXT_TIMER_INTERVAL; 123 update_stats = true; 124 } 125 126 reset_coalesce: 127 if (netif_running(dev)) { 128 if (update_stats) { 129 rc = bnxt_close_nic(bp, true, false); 130 if (!rc) 131 rc = bnxt_open_nic(bp, true, false); 132 } else { 133 rc = bnxt_hwrm_set_coal(bp); 134 } 135 } 136 137 return rc; 138 } 139 140 #define BNXT_NUM_STATS 22 141 142 #define BNXT_RX_STATS_ENTRY(counter) \ 143 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 144 145 #define BNXT_TX_STATS_ENTRY(counter) \ 146 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 147 148 #define BNXT_RX_STATS_EXT_ENTRY(counter) \ 149 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) } 150 151 #define BNXT_TX_STATS_EXT_ENTRY(counter) \ 152 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) } 153 154 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \ 155 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \ 156 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions) 157 158 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \ 159 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \ 160 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions) 161 162 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \ 163 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \ 164 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \ 165 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \ 166 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \ 167 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \ 168 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \ 169 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \ 170 BNXT_RX_STATS_EXT_PFC_ENTRY(7) 171 172 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \ 173 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \ 174 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \ 175 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \ 176 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \ 177 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \ 178 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \ 179 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \ 180 BNXT_TX_STATS_EXT_PFC_ENTRY(7) 181 182 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \ 183 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \ 184 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n) 185 186 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \ 187 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \ 188 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n) 189 190 #define BNXT_RX_STATS_EXT_COS_ENTRIES \ 191 BNXT_RX_STATS_EXT_COS_ENTRY(0), \ 192 BNXT_RX_STATS_EXT_COS_ENTRY(1), \ 193 BNXT_RX_STATS_EXT_COS_ENTRY(2), \ 194 BNXT_RX_STATS_EXT_COS_ENTRY(3), \ 195 BNXT_RX_STATS_EXT_COS_ENTRY(4), \ 196 BNXT_RX_STATS_EXT_COS_ENTRY(5), \ 197 BNXT_RX_STATS_EXT_COS_ENTRY(6), \ 198 BNXT_RX_STATS_EXT_COS_ENTRY(7) \ 199 200 #define BNXT_TX_STATS_EXT_COS_ENTRIES \ 201 BNXT_TX_STATS_EXT_COS_ENTRY(0), \ 202 BNXT_TX_STATS_EXT_COS_ENTRY(1), \ 203 BNXT_TX_STATS_EXT_COS_ENTRY(2), \ 204 BNXT_TX_STATS_EXT_COS_ENTRY(3), \ 205 BNXT_TX_STATS_EXT_COS_ENTRY(4), \ 206 BNXT_TX_STATS_EXT_COS_ENTRY(5), \ 207 BNXT_TX_STATS_EXT_COS_ENTRY(6), \ 208 BNXT_TX_STATS_EXT_COS_ENTRY(7) \ 209 210 enum { 211 RX_TOTAL_DISCARDS, 212 TX_TOTAL_DISCARDS, 213 }; 214 215 static struct { 216 u64 counter; 217 char string[ETH_GSTRING_LEN]; 218 } bnxt_sw_func_stats[] = { 219 {0, "rx_total_discard_pkts"}, 220 {0, "tx_total_discard_pkts"}, 221 }; 222 223 static const struct { 224 long offset; 225 char string[ETH_GSTRING_LEN]; 226 } bnxt_port_stats_arr[] = { 227 BNXT_RX_STATS_ENTRY(rx_64b_frames), 228 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 229 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 230 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 231 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 232 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames), 233 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 234 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 235 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 236 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 237 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 238 BNXT_RX_STATS_ENTRY(rx_total_frames), 239 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 240 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 241 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 242 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 243 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 244 BNXT_RX_STATS_ENTRY(rx_pause_frames), 245 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 246 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 247 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 248 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 249 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 250 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 251 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 252 BNXT_RX_STATS_ENTRY(rx_good_frames), 253 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 254 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 255 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 256 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 257 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 258 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 259 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 260 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 261 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 262 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 263 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 264 BNXT_RX_STATS_ENTRY(rx_bytes), 265 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 266 BNXT_RX_STATS_ENTRY(rx_runt_frames), 267 BNXT_RX_STATS_ENTRY(rx_stat_discard), 268 BNXT_RX_STATS_ENTRY(rx_stat_err), 269 270 BNXT_TX_STATS_ENTRY(tx_64b_frames), 271 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 272 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 273 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 274 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 275 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames), 276 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 277 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames), 278 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 279 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 280 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 281 BNXT_TX_STATS_ENTRY(tx_good_frames), 282 BNXT_TX_STATS_ENTRY(tx_total_frames), 283 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 284 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 285 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 286 BNXT_TX_STATS_ENTRY(tx_pause_frames), 287 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 288 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 289 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 290 BNXT_TX_STATS_ENTRY(tx_err), 291 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 292 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 293 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 294 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 295 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 296 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 297 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 298 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 299 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 300 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 301 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 302 BNXT_TX_STATS_ENTRY(tx_total_collisions), 303 BNXT_TX_STATS_ENTRY(tx_bytes), 304 BNXT_TX_STATS_ENTRY(tx_xthol_frames), 305 BNXT_TX_STATS_ENTRY(tx_stat_discard), 306 BNXT_TX_STATS_ENTRY(tx_stat_error), 307 }; 308 309 static const struct { 310 long offset; 311 char string[ETH_GSTRING_LEN]; 312 } bnxt_port_stats_ext_arr[] = { 313 BNXT_RX_STATS_EXT_ENTRY(link_down_events), 314 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events), 315 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events), 316 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events), 317 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events), 318 BNXT_RX_STATS_EXT_COS_ENTRIES, 319 BNXT_RX_STATS_EXT_PFC_ENTRIES, 320 }; 321 322 static const struct { 323 long offset; 324 char string[ETH_GSTRING_LEN]; 325 } bnxt_tx_port_stats_ext_arr[] = { 326 BNXT_TX_STATS_EXT_COS_ENTRIES, 327 BNXT_TX_STATS_EXT_PFC_ENTRIES, 328 }; 329 330 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats) 331 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 332 333 static int bnxt_get_num_stats(struct bnxt *bp) 334 { 335 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings; 336 337 num_stats += BNXT_NUM_SW_FUNC_STATS; 338 339 if (bp->flags & BNXT_FLAG_PORT_STATS) 340 num_stats += BNXT_NUM_PORT_STATS; 341 342 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) 343 num_stats += bp->fw_rx_stats_ext_size + 344 bp->fw_tx_stats_ext_size; 345 346 return num_stats; 347 } 348 349 static int bnxt_get_sset_count(struct net_device *dev, int sset) 350 { 351 struct bnxt *bp = netdev_priv(dev); 352 353 switch (sset) { 354 case ETH_SS_STATS: 355 return bnxt_get_num_stats(bp); 356 case ETH_SS_TEST: 357 if (!bp->num_tests) 358 return -EOPNOTSUPP; 359 return bp->num_tests; 360 default: 361 return -EOPNOTSUPP; 362 } 363 } 364 365 static void bnxt_get_ethtool_stats(struct net_device *dev, 366 struct ethtool_stats *stats, u64 *buf) 367 { 368 u32 i, j = 0; 369 struct bnxt *bp = netdev_priv(dev); 370 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8; 371 372 if (!bp->bnapi) 373 return; 374 375 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) 376 bnxt_sw_func_stats[i].counter = 0; 377 378 for (i = 0; i < bp->cp_nr_rings; i++) { 379 struct bnxt_napi *bnapi = bp->bnapi[i]; 380 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 381 __le64 *hw_stats = (__le64 *)cpr->hw_stats; 382 int k; 383 384 for (k = 0; k < stat_fields; j++, k++) 385 buf[j] = le64_to_cpu(hw_stats[k]); 386 buf[j++] = cpr->rx_l4_csum_errors; 387 buf[j++] = cpr->missed_irqs; 388 389 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter += 390 le64_to_cpu(cpr->hw_stats->rx_discard_pkts); 391 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter += 392 le64_to_cpu(cpr->hw_stats->tx_discard_pkts); 393 } 394 395 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++) 396 buf[j] = bnxt_sw_func_stats[i].counter; 397 398 if (bp->flags & BNXT_FLAG_PORT_STATS) { 399 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats; 400 401 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) { 402 buf[j] = le64_to_cpu(*(port_stats + 403 bnxt_port_stats_arr[i].offset)); 404 } 405 } 406 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 407 __le64 *rx_port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext; 408 __le64 *tx_port_stats_ext = (__le64 *)bp->hw_tx_port_stats_ext; 409 410 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) { 411 buf[j] = le64_to_cpu(*(rx_port_stats_ext + 412 bnxt_port_stats_ext_arr[i].offset)); 413 } 414 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) { 415 buf[j] = le64_to_cpu(*(tx_port_stats_ext + 416 bnxt_tx_port_stats_ext_arr[i].offset)); 417 } 418 } 419 } 420 421 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 422 { 423 struct bnxt *bp = netdev_priv(dev); 424 u32 i; 425 426 switch (stringset) { 427 /* The number of strings must match BNXT_NUM_STATS defined above. */ 428 case ETH_SS_STATS: 429 for (i = 0; i < bp->cp_nr_rings; i++) { 430 sprintf(buf, "[%d]: rx_ucast_packets", i); 431 buf += ETH_GSTRING_LEN; 432 sprintf(buf, "[%d]: rx_mcast_packets", i); 433 buf += ETH_GSTRING_LEN; 434 sprintf(buf, "[%d]: rx_bcast_packets", i); 435 buf += ETH_GSTRING_LEN; 436 sprintf(buf, "[%d]: rx_discards", i); 437 buf += ETH_GSTRING_LEN; 438 sprintf(buf, "[%d]: rx_drops", i); 439 buf += ETH_GSTRING_LEN; 440 sprintf(buf, "[%d]: rx_ucast_bytes", i); 441 buf += ETH_GSTRING_LEN; 442 sprintf(buf, "[%d]: rx_mcast_bytes", i); 443 buf += ETH_GSTRING_LEN; 444 sprintf(buf, "[%d]: rx_bcast_bytes", i); 445 buf += ETH_GSTRING_LEN; 446 sprintf(buf, "[%d]: tx_ucast_packets", i); 447 buf += ETH_GSTRING_LEN; 448 sprintf(buf, "[%d]: tx_mcast_packets", i); 449 buf += ETH_GSTRING_LEN; 450 sprintf(buf, "[%d]: tx_bcast_packets", i); 451 buf += ETH_GSTRING_LEN; 452 sprintf(buf, "[%d]: tx_discards", i); 453 buf += ETH_GSTRING_LEN; 454 sprintf(buf, "[%d]: tx_drops", i); 455 buf += ETH_GSTRING_LEN; 456 sprintf(buf, "[%d]: tx_ucast_bytes", i); 457 buf += ETH_GSTRING_LEN; 458 sprintf(buf, "[%d]: tx_mcast_bytes", i); 459 buf += ETH_GSTRING_LEN; 460 sprintf(buf, "[%d]: tx_bcast_bytes", i); 461 buf += ETH_GSTRING_LEN; 462 sprintf(buf, "[%d]: tpa_packets", i); 463 buf += ETH_GSTRING_LEN; 464 sprintf(buf, "[%d]: tpa_bytes", i); 465 buf += ETH_GSTRING_LEN; 466 sprintf(buf, "[%d]: tpa_events", i); 467 buf += ETH_GSTRING_LEN; 468 sprintf(buf, "[%d]: tpa_aborts", i); 469 buf += ETH_GSTRING_LEN; 470 sprintf(buf, "[%d]: rx_l4_csum_errors", i); 471 buf += ETH_GSTRING_LEN; 472 sprintf(buf, "[%d]: missed_irqs", i); 473 buf += ETH_GSTRING_LEN; 474 } 475 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) { 476 strcpy(buf, bnxt_sw_func_stats[i].string); 477 buf += ETH_GSTRING_LEN; 478 } 479 480 if (bp->flags & BNXT_FLAG_PORT_STATS) { 481 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 482 strcpy(buf, bnxt_port_stats_arr[i].string); 483 buf += ETH_GSTRING_LEN; 484 } 485 } 486 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 487 for (i = 0; i < bp->fw_rx_stats_ext_size; i++) { 488 strcpy(buf, bnxt_port_stats_ext_arr[i].string); 489 buf += ETH_GSTRING_LEN; 490 } 491 for (i = 0; i < bp->fw_tx_stats_ext_size; i++) { 492 strcpy(buf, 493 bnxt_tx_port_stats_ext_arr[i].string); 494 buf += ETH_GSTRING_LEN; 495 } 496 } 497 break; 498 case ETH_SS_TEST: 499 if (bp->num_tests) 500 memcpy(buf, bp->test_info->string, 501 bp->num_tests * ETH_GSTRING_LEN); 502 break; 503 default: 504 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 505 stringset); 506 break; 507 } 508 } 509 510 static void bnxt_get_ringparam(struct net_device *dev, 511 struct ethtool_ringparam *ering) 512 { 513 struct bnxt *bp = netdev_priv(dev); 514 515 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 516 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 517 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 518 519 ering->rx_pending = bp->rx_ring_size; 520 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 521 ering->tx_pending = bp->tx_ring_size; 522 } 523 524 static int bnxt_set_ringparam(struct net_device *dev, 525 struct ethtool_ringparam *ering) 526 { 527 struct bnxt *bp = netdev_priv(dev); 528 529 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 530 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 531 (ering->tx_pending <= MAX_SKB_FRAGS)) 532 return -EINVAL; 533 534 if (netif_running(dev)) 535 bnxt_close_nic(bp, false, false); 536 537 bp->rx_ring_size = ering->rx_pending; 538 bp->tx_ring_size = ering->tx_pending; 539 bnxt_set_ring_params(bp); 540 541 if (netif_running(dev)) 542 return bnxt_open_nic(bp, false, false); 543 544 return 0; 545 } 546 547 static void bnxt_get_channels(struct net_device *dev, 548 struct ethtool_channels *channel) 549 { 550 struct bnxt *bp = netdev_priv(dev); 551 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; 552 int max_rx_rings, max_tx_rings, tcs; 553 int max_tx_sch_inputs; 554 555 /* Get the most up-to-date max_tx_sch_inputs. */ 556 if (BNXT_NEW_RM(bp)) 557 bnxt_hwrm_func_resc_qcaps(bp, false); 558 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs; 559 560 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 561 if (max_tx_sch_inputs) 562 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 563 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 564 565 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 566 max_rx_rings = 0; 567 max_tx_rings = 0; 568 } 569 if (max_tx_sch_inputs) 570 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 571 572 tcs = netdev_get_num_tc(dev); 573 if (tcs > 1) 574 max_tx_rings /= tcs; 575 576 channel->max_rx = max_rx_rings; 577 channel->max_tx = max_tx_rings; 578 channel->max_other = 0; 579 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 580 channel->combined_count = bp->rx_nr_rings; 581 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 582 channel->combined_count--; 583 } else { 584 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 585 channel->rx_count = bp->rx_nr_rings; 586 channel->tx_count = bp->tx_nr_rings_per_tc; 587 } 588 } 589 } 590 591 static int bnxt_set_channels(struct net_device *dev, 592 struct ethtool_channels *channel) 593 { 594 struct bnxt *bp = netdev_priv(dev); 595 int req_tx_rings, req_rx_rings, tcs; 596 bool sh = false; 597 int tx_xdp = 0; 598 int rc = 0; 599 600 if (channel->other_count) 601 return -EINVAL; 602 603 if (!channel->combined_count && 604 (!channel->rx_count || !channel->tx_count)) 605 return -EINVAL; 606 607 if (channel->combined_count && 608 (channel->rx_count || channel->tx_count)) 609 return -EINVAL; 610 611 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 612 channel->tx_count)) 613 return -EINVAL; 614 615 if (channel->combined_count) 616 sh = true; 617 618 tcs = netdev_get_num_tc(dev); 619 620 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 621 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 622 if (bp->tx_nr_rings_xdp) { 623 if (!sh) { 624 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 625 return -EINVAL; 626 } 627 tx_xdp = req_rx_rings; 628 } 629 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); 630 if (rc) { 631 netdev_warn(dev, "Unable to allocate the requested rings\n"); 632 return rc; 633 } 634 635 if (netif_running(dev)) { 636 if (BNXT_PF(bp)) { 637 /* TODO CHIMP_FW: Send message to all VF's 638 * before PF unload 639 */ 640 } 641 rc = bnxt_close_nic(bp, true, false); 642 if (rc) { 643 netdev_err(bp->dev, "Set channel failure rc :%x\n", 644 rc); 645 return rc; 646 } 647 } 648 649 if (sh) { 650 bp->flags |= BNXT_FLAG_SHARED_RINGS; 651 bp->rx_nr_rings = channel->combined_count; 652 bp->tx_nr_rings_per_tc = channel->combined_count; 653 } else { 654 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 655 bp->rx_nr_rings = channel->rx_count; 656 bp->tx_nr_rings_per_tc = channel->tx_count; 657 } 658 bp->tx_nr_rings_xdp = tx_xdp; 659 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 660 if (tcs > 1) 661 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 662 663 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 664 bp->tx_nr_rings + bp->rx_nr_rings; 665 666 bp->num_stat_ctxs = bp->cp_nr_rings; 667 668 /* After changing number of rx channels, update NTUPLE feature. */ 669 netdev_update_features(dev); 670 if (netif_running(dev)) { 671 rc = bnxt_open_nic(bp, true, false); 672 if ((!rc) && BNXT_PF(bp)) { 673 /* TODO CHIMP_FW: Send message to all VF's 674 * to renable 675 */ 676 } 677 } else { 678 rc = bnxt_reserve_rings(bp); 679 } 680 681 return rc; 682 } 683 684 #ifdef CONFIG_RFS_ACCEL 685 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 686 u32 *rule_locs) 687 { 688 int i, j = 0; 689 690 cmd->data = bp->ntp_fltr_count; 691 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 692 struct hlist_head *head; 693 struct bnxt_ntuple_filter *fltr; 694 695 head = &bp->ntp_fltr_hash_tbl[i]; 696 rcu_read_lock(); 697 hlist_for_each_entry_rcu(fltr, head, hash) { 698 if (j == cmd->rule_cnt) 699 break; 700 rule_locs[j++] = fltr->sw_id; 701 } 702 rcu_read_unlock(); 703 if (j == cmd->rule_cnt) 704 break; 705 } 706 cmd->rule_cnt = j; 707 return 0; 708 } 709 710 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 711 { 712 struct ethtool_rx_flow_spec *fs = 713 (struct ethtool_rx_flow_spec *)&cmd->fs; 714 struct bnxt_ntuple_filter *fltr; 715 struct flow_keys *fkeys; 716 int i, rc = -EINVAL; 717 718 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 719 return rc; 720 721 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 722 struct hlist_head *head; 723 724 head = &bp->ntp_fltr_hash_tbl[i]; 725 rcu_read_lock(); 726 hlist_for_each_entry_rcu(fltr, head, hash) { 727 if (fltr->sw_id == fs->location) 728 goto fltr_found; 729 } 730 rcu_read_unlock(); 731 } 732 return rc; 733 734 fltr_found: 735 fkeys = &fltr->fkeys; 736 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 737 if (fkeys->basic.ip_proto == IPPROTO_TCP) 738 fs->flow_type = TCP_V4_FLOW; 739 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 740 fs->flow_type = UDP_V4_FLOW; 741 else 742 goto fltr_err; 743 744 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 745 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 746 747 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 748 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 749 750 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 751 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 752 753 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 754 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 755 } else { 756 int i; 757 758 if (fkeys->basic.ip_proto == IPPROTO_TCP) 759 fs->flow_type = TCP_V6_FLOW; 760 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 761 fs->flow_type = UDP_V6_FLOW; 762 else 763 goto fltr_err; 764 765 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 766 fkeys->addrs.v6addrs.src; 767 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 768 fkeys->addrs.v6addrs.dst; 769 for (i = 0; i < 4; i++) { 770 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 771 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 772 } 773 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 774 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 775 776 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 777 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 778 } 779 780 fs->ring_cookie = fltr->rxq; 781 rc = 0; 782 783 fltr_err: 784 rcu_read_unlock(); 785 786 return rc; 787 } 788 #endif 789 790 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 791 { 792 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 793 return RXH_IP_SRC | RXH_IP_DST; 794 return 0; 795 } 796 797 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 798 { 799 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 800 return RXH_IP_SRC | RXH_IP_DST; 801 return 0; 802 } 803 804 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 805 { 806 cmd->data = 0; 807 switch (cmd->flow_type) { 808 case TCP_V4_FLOW: 809 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 810 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 811 RXH_L4_B_0_1 | RXH_L4_B_2_3; 812 cmd->data |= get_ethtool_ipv4_rss(bp); 813 break; 814 case UDP_V4_FLOW: 815 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 816 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 817 RXH_L4_B_0_1 | RXH_L4_B_2_3; 818 /* fall through */ 819 case SCTP_V4_FLOW: 820 case AH_ESP_V4_FLOW: 821 case AH_V4_FLOW: 822 case ESP_V4_FLOW: 823 case IPV4_FLOW: 824 cmd->data |= get_ethtool_ipv4_rss(bp); 825 break; 826 827 case TCP_V6_FLOW: 828 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 829 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 830 RXH_L4_B_0_1 | RXH_L4_B_2_3; 831 cmd->data |= get_ethtool_ipv6_rss(bp); 832 break; 833 case UDP_V6_FLOW: 834 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 835 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 836 RXH_L4_B_0_1 | RXH_L4_B_2_3; 837 /* fall through */ 838 case SCTP_V6_FLOW: 839 case AH_ESP_V6_FLOW: 840 case AH_V6_FLOW: 841 case ESP_V6_FLOW: 842 case IPV6_FLOW: 843 cmd->data |= get_ethtool_ipv6_rss(bp); 844 break; 845 } 846 return 0; 847 } 848 849 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 850 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 851 852 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 853 { 854 u32 rss_hash_cfg = bp->rss_hash_cfg; 855 int tuple, rc = 0; 856 857 if (cmd->data == RXH_4TUPLE) 858 tuple = 4; 859 else if (cmd->data == RXH_2TUPLE) 860 tuple = 2; 861 else if (!cmd->data) 862 tuple = 0; 863 else 864 return -EINVAL; 865 866 if (cmd->flow_type == TCP_V4_FLOW) { 867 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 868 if (tuple == 4) 869 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 870 } else if (cmd->flow_type == UDP_V4_FLOW) { 871 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 872 return -EINVAL; 873 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 874 if (tuple == 4) 875 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 876 } else if (cmd->flow_type == TCP_V6_FLOW) { 877 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 878 if (tuple == 4) 879 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 880 } else if (cmd->flow_type == UDP_V6_FLOW) { 881 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 882 return -EINVAL; 883 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 884 if (tuple == 4) 885 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 886 } else if (tuple == 4) { 887 return -EINVAL; 888 } 889 890 switch (cmd->flow_type) { 891 case TCP_V4_FLOW: 892 case UDP_V4_FLOW: 893 case SCTP_V4_FLOW: 894 case AH_ESP_V4_FLOW: 895 case AH_V4_FLOW: 896 case ESP_V4_FLOW: 897 case IPV4_FLOW: 898 if (tuple == 2) 899 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 900 else if (!tuple) 901 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 902 break; 903 904 case TCP_V6_FLOW: 905 case UDP_V6_FLOW: 906 case SCTP_V6_FLOW: 907 case AH_ESP_V6_FLOW: 908 case AH_V6_FLOW: 909 case ESP_V6_FLOW: 910 case IPV6_FLOW: 911 if (tuple == 2) 912 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 913 else if (!tuple) 914 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 915 break; 916 } 917 918 if (bp->rss_hash_cfg == rss_hash_cfg) 919 return 0; 920 921 bp->rss_hash_cfg = rss_hash_cfg; 922 if (netif_running(bp->dev)) { 923 bnxt_close_nic(bp, false, false); 924 rc = bnxt_open_nic(bp, false, false); 925 } 926 return rc; 927 } 928 929 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 930 u32 *rule_locs) 931 { 932 struct bnxt *bp = netdev_priv(dev); 933 int rc = 0; 934 935 switch (cmd->cmd) { 936 #ifdef CONFIG_RFS_ACCEL 937 case ETHTOOL_GRXRINGS: 938 cmd->data = bp->rx_nr_rings; 939 break; 940 941 case ETHTOOL_GRXCLSRLCNT: 942 cmd->rule_cnt = bp->ntp_fltr_count; 943 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 944 break; 945 946 case ETHTOOL_GRXCLSRLALL: 947 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 948 break; 949 950 case ETHTOOL_GRXCLSRULE: 951 rc = bnxt_grxclsrule(bp, cmd); 952 break; 953 #endif 954 955 case ETHTOOL_GRXFH: 956 rc = bnxt_grxfh(bp, cmd); 957 break; 958 959 default: 960 rc = -EOPNOTSUPP; 961 break; 962 } 963 964 return rc; 965 } 966 967 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 968 { 969 struct bnxt *bp = netdev_priv(dev); 970 int rc; 971 972 switch (cmd->cmd) { 973 case ETHTOOL_SRXFH: 974 rc = bnxt_srxfh(bp, cmd); 975 break; 976 977 default: 978 rc = -EOPNOTSUPP; 979 break; 980 } 981 return rc; 982 } 983 984 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 985 { 986 return HW_HASH_INDEX_SIZE; 987 } 988 989 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 990 { 991 return HW_HASH_KEY_SIZE; 992 } 993 994 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 995 u8 *hfunc) 996 { 997 struct bnxt *bp = netdev_priv(dev); 998 struct bnxt_vnic_info *vnic; 999 int i = 0; 1000 1001 if (hfunc) 1002 *hfunc = ETH_RSS_HASH_TOP; 1003 1004 if (!bp->vnic_info) 1005 return 0; 1006 1007 vnic = &bp->vnic_info[0]; 1008 if (indir && vnic->rss_table) { 1009 for (i = 0; i < HW_HASH_INDEX_SIZE; i++) 1010 indir[i] = le16_to_cpu(vnic->rss_table[i]); 1011 } 1012 1013 if (key && vnic->rss_hash_key) 1014 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 1015 1016 return 0; 1017 } 1018 1019 static void bnxt_get_drvinfo(struct net_device *dev, 1020 struct ethtool_drvinfo *info) 1021 { 1022 struct bnxt *bp = netdev_priv(dev); 1023 1024 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 1025 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 1026 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version)); 1027 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 1028 info->n_stats = bnxt_get_num_stats(bp); 1029 info->testinfo_len = bp->num_tests; 1030 /* TODO CHIMP_FW: eeprom dump details */ 1031 info->eedump_len = 0; 1032 /* TODO CHIMP FW: reg dump details */ 1033 info->regdump_len = 0; 1034 } 1035 1036 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1037 { 1038 struct bnxt *bp = netdev_priv(dev); 1039 1040 wol->supported = 0; 1041 wol->wolopts = 0; 1042 memset(&wol->sopass, 0, sizeof(wol->sopass)); 1043 if (bp->flags & BNXT_FLAG_WOL_CAP) { 1044 wol->supported = WAKE_MAGIC; 1045 if (bp->wol) 1046 wol->wolopts = WAKE_MAGIC; 1047 } 1048 } 1049 1050 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1051 { 1052 struct bnxt *bp = netdev_priv(dev); 1053 1054 if (wol->wolopts & ~WAKE_MAGIC) 1055 return -EINVAL; 1056 1057 if (wol->wolopts & WAKE_MAGIC) { 1058 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 1059 return -EINVAL; 1060 if (!bp->wol) { 1061 if (bnxt_hwrm_alloc_wol_fltr(bp)) 1062 return -EBUSY; 1063 bp->wol = 1; 1064 } 1065 } else { 1066 if (bp->wol) { 1067 if (bnxt_hwrm_free_wol_fltr(bp)) 1068 return -EBUSY; 1069 bp->wol = 0; 1070 } 1071 } 1072 return 0; 1073 } 1074 1075 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 1076 { 1077 u32 speed_mask = 0; 1078 1079 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 1080 /* set the advertised speeds */ 1081 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 1082 speed_mask |= ADVERTISED_100baseT_Full; 1083 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 1084 speed_mask |= ADVERTISED_1000baseT_Full; 1085 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 1086 speed_mask |= ADVERTISED_2500baseX_Full; 1087 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 1088 speed_mask |= ADVERTISED_10000baseT_Full; 1089 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 1090 speed_mask |= ADVERTISED_40000baseCR4_Full; 1091 1092 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 1093 speed_mask |= ADVERTISED_Pause; 1094 else if (fw_pause & BNXT_LINK_PAUSE_TX) 1095 speed_mask |= ADVERTISED_Asym_Pause; 1096 else if (fw_pause & BNXT_LINK_PAUSE_RX) 1097 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 1098 1099 return speed_mask; 1100 } 1101 1102 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 1103 { \ 1104 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 1105 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1106 100baseT_Full); \ 1107 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 1108 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1109 1000baseT_Full); \ 1110 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 1111 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1112 10000baseT_Full); \ 1113 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 1114 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1115 25000baseCR_Full); \ 1116 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 1117 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1118 40000baseCR4_Full);\ 1119 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 1120 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1121 50000baseCR2_Full);\ 1122 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 1123 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1124 100000baseCR4_Full);\ 1125 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 1126 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1127 Pause); \ 1128 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 1129 ethtool_link_ksettings_add_link_mode( \ 1130 lk_ksettings, name, Asym_Pause);\ 1131 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 1132 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1133 Asym_Pause); \ 1134 } \ 1135 } 1136 1137 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 1138 { \ 1139 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1140 100baseT_Full) || \ 1141 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1142 100baseT_Half)) \ 1143 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 1144 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1145 1000baseT_Full) || \ 1146 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1147 1000baseT_Half)) \ 1148 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 1149 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1150 10000baseT_Full)) \ 1151 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 1152 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1153 25000baseCR_Full)) \ 1154 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 1155 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1156 40000baseCR4_Full)) \ 1157 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 1158 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1159 50000baseCR2_Full)) \ 1160 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 1161 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1162 100000baseCR4_Full)) \ 1163 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 1164 } 1165 1166 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 1167 struct ethtool_link_ksettings *lk_ksettings) 1168 { 1169 u16 fw_speeds = link_info->advertising; 1170 u8 fw_pause = 0; 1171 1172 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1173 fw_pause = link_info->auto_pause_setting; 1174 1175 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 1176 } 1177 1178 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 1179 struct ethtool_link_ksettings *lk_ksettings) 1180 { 1181 u16 fw_speeds = link_info->lp_auto_link_speeds; 1182 u8 fw_pause = 0; 1183 1184 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1185 fw_pause = link_info->lp_pause; 1186 1187 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 1188 lp_advertising); 1189 } 1190 1191 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1192 struct ethtool_link_ksettings *lk_ksettings) 1193 { 1194 u16 fw_speeds = link_info->support_speeds; 1195 1196 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1197 1198 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); 1199 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1200 Asym_Pause); 1201 1202 if (link_info->support_auto_speeds) 1203 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1204 Autoneg); 1205 } 1206 1207 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1208 { 1209 switch (fw_link_speed) { 1210 case BNXT_LINK_SPEED_100MB: 1211 return SPEED_100; 1212 case BNXT_LINK_SPEED_1GB: 1213 return SPEED_1000; 1214 case BNXT_LINK_SPEED_2_5GB: 1215 return SPEED_2500; 1216 case BNXT_LINK_SPEED_10GB: 1217 return SPEED_10000; 1218 case BNXT_LINK_SPEED_20GB: 1219 return SPEED_20000; 1220 case BNXT_LINK_SPEED_25GB: 1221 return SPEED_25000; 1222 case BNXT_LINK_SPEED_40GB: 1223 return SPEED_40000; 1224 case BNXT_LINK_SPEED_50GB: 1225 return SPEED_50000; 1226 case BNXT_LINK_SPEED_100GB: 1227 return SPEED_100000; 1228 default: 1229 return SPEED_UNKNOWN; 1230 } 1231 } 1232 1233 static int bnxt_get_link_ksettings(struct net_device *dev, 1234 struct ethtool_link_ksettings *lk_ksettings) 1235 { 1236 struct bnxt *bp = netdev_priv(dev); 1237 struct bnxt_link_info *link_info = &bp->link_info; 1238 struct ethtool_link_settings *base = &lk_ksettings->base; 1239 u32 ethtool_speed; 1240 1241 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1242 mutex_lock(&bp->link_lock); 1243 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1244 1245 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1246 if (link_info->autoneg) { 1247 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1248 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1249 advertising, Autoneg); 1250 base->autoneg = AUTONEG_ENABLE; 1251 if (link_info->phy_link_status == BNXT_LINK_LINK) 1252 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1253 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1254 if (!netif_carrier_ok(dev)) 1255 base->duplex = DUPLEX_UNKNOWN; 1256 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1257 base->duplex = DUPLEX_FULL; 1258 else 1259 base->duplex = DUPLEX_HALF; 1260 } else { 1261 base->autoneg = AUTONEG_DISABLE; 1262 ethtool_speed = 1263 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1264 base->duplex = DUPLEX_HALF; 1265 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1266 base->duplex = DUPLEX_FULL; 1267 } 1268 base->speed = ethtool_speed; 1269 1270 base->port = PORT_NONE; 1271 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1272 base->port = PORT_TP; 1273 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1274 TP); 1275 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1276 TP); 1277 } else { 1278 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1279 FIBRE); 1280 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1281 FIBRE); 1282 1283 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1284 base->port = PORT_DA; 1285 else if (link_info->media_type == 1286 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1287 base->port = PORT_FIBRE; 1288 } 1289 base->phy_address = link_info->phy_addr; 1290 mutex_unlock(&bp->link_lock); 1291 1292 return 0; 1293 } 1294 1295 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed) 1296 { 1297 struct bnxt *bp = netdev_priv(dev); 1298 struct bnxt_link_info *link_info = &bp->link_info; 1299 u16 support_spds = link_info->support_speeds; 1300 u32 fw_speed = 0; 1301 1302 switch (ethtool_speed) { 1303 case SPEED_100: 1304 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1305 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB; 1306 break; 1307 case SPEED_1000: 1308 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1309 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB; 1310 break; 1311 case SPEED_2500: 1312 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1313 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB; 1314 break; 1315 case SPEED_10000: 1316 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1317 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB; 1318 break; 1319 case SPEED_20000: 1320 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1321 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB; 1322 break; 1323 case SPEED_25000: 1324 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1325 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB; 1326 break; 1327 case SPEED_40000: 1328 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1329 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB; 1330 break; 1331 case SPEED_50000: 1332 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) 1333 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB; 1334 break; 1335 case SPEED_100000: 1336 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) 1337 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB; 1338 break; 1339 default: 1340 netdev_err(dev, "unsupported speed!\n"); 1341 break; 1342 } 1343 return fw_speed; 1344 } 1345 1346 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1347 { 1348 u16 fw_speed_mask = 0; 1349 1350 /* only support autoneg at speed 100, 1000, and 10000 */ 1351 if (advertising & (ADVERTISED_100baseT_Full | 1352 ADVERTISED_100baseT_Half)) { 1353 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1354 } 1355 if (advertising & (ADVERTISED_1000baseT_Full | 1356 ADVERTISED_1000baseT_Half)) { 1357 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1358 } 1359 if (advertising & ADVERTISED_10000baseT_Full) 1360 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1361 1362 if (advertising & ADVERTISED_40000baseCR4_Full) 1363 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1364 1365 return fw_speed_mask; 1366 } 1367 1368 static int bnxt_set_link_ksettings(struct net_device *dev, 1369 const struct ethtool_link_ksettings *lk_ksettings) 1370 { 1371 struct bnxt *bp = netdev_priv(dev); 1372 struct bnxt_link_info *link_info = &bp->link_info; 1373 const struct ethtool_link_settings *base = &lk_ksettings->base; 1374 bool set_pause = false; 1375 u16 fw_advertising = 0; 1376 u32 speed; 1377 int rc = 0; 1378 1379 if (!BNXT_SINGLE_PF(bp)) 1380 return -EOPNOTSUPP; 1381 1382 mutex_lock(&bp->link_lock); 1383 if (base->autoneg == AUTONEG_ENABLE) { 1384 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings, 1385 advertising); 1386 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1387 if (!fw_advertising) 1388 link_info->advertising = link_info->support_auto_speeds; 1389 else 1390 link_info->advertising = fw_advertising; 1391 /* any change to autoneg will cause link change, therefore the 1392 * driver should put back the original pause setting in autoneg 1393 */ 1394 set_pause = true; 1395 } else { 1396 u16 fw_speed; 1397 u8 phy_type = link_info->phy_type; 1398 1399 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1400 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1401 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1402 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1403 rc = -EINVAL; 1404 goto set_setting_exit; 1405 } 1406 if (base->duplex == DUPLEX_HALF) { 1407 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1408 rc = -EINVAL; 1409 goto set_setting_exit; 1410 } 1411 speed = base->speed; 1412 fw_speed = bnxt_get_fw_speed(dev, speed); 1413 if (!fw_speed) { 1414 rc = -EINVAL; 1415 goto set_setting_exit; 1416 } 1417 link_info->req_link_speed = fw_speed; 1418 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1419 link_info->autoneg = 0; 1420 link_info->advertising = 0; 1421 } 1422 1423 if (netif_running(dev)) 1424 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1425 1426 set_setting_exit: 1427 mutex_unlock(&bp->link_lock); 1428 return rc; 1429 } 1430 1431 static void bnxt_get_pauseparam(struct net_device *dev, 1432 struct ethtool_pauseparam *epause) 1433 { 1434 struct bnxt *bp = netdev_priv(dev); 1435 struct bnxt_link_info *link_info = &bp->link_info; 1436 1437 if (BNXT_VF(bp)) 1438 return; 1439 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 1440 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 1441 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 1442 } 1443 1444 static int bnxt_set_pauseparam(struct net_device *dev, 1445 struct ethtool_pauseparam *epause) 1446 { 1447 int rc = 0; 1448 struct bnxt *bp = netdev_priv(dev); 1449 struct bnxt_link_info *link_info = &bp->link_info; 1450 1451 if (!BNXT_SINGLE_PF(bp)) 1452 return -EOPNOTSUPP; 1453 1454 if (epause->autoneg) { 1455 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 1456 return -EINVAL; 1457 1458 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 1459 if (bp->hwrm_spec_code >= 0x10201) 1460 link_info->req_flow_ctrl = 1461 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; 1462 } else { 1463 /* when transition from auto pause to force pause, 1464 * force a link change 1465 */ 1466 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1467 link_info->force_link_chng = true; 1468 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 1469 link_info->req_flow_ctrl = 0; 1470 } 1471 if (epause->rx_pause) 1472 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 1473 1474 if (epause->tx_pause) 1475 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 1476 1477 if (netif_running(dev)) 1478 rc = bnxt_hwrm_set_pause(bp); 1479 return rc; 1480 } 1481 1482 static u32 bnxt_get_link(struct net_device *dev) 1483 { 1484 struct bnxt *bp = netdev_priv(dev); 1485 1486 /* TODO: handle MF, VF, driver close case */ 1487 return bp->link_info.link_up; 1488 } 1489 1490 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1491 u16 ext, u16 *index, u32 *item_length, 1492 u32 *data_length); 1493 1494 static int bnxt_flash_nvram(struct net_device *dev, 1495 u16 dir_type, 1496 u16 dir_ordinal, 1497 u16 dir_ext, 1498 u16 dir_attr, 1499 const u8 *data, 1500 size_t data_len) 1501 { 1502 struct bnxt *bp = netdev_priv(dev); 1503 int rc; 1504 struct hwrm_nvm_write_input req = {0}; 1505 dma_addr_t dma_handle; 1506 u8 *kmem; 1507 1508 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1); 1509 1510 req.dir_type = cpu_to_le16(dir_type); 1511 req.dir_ordinal = cpu_to_le16(dir_ordinal); 1512 req.dir_ext = cpu_to_le16(dir_ext); 1513 req.dir_attr = cpu_to_le16(dir_attr); 1514 req.dir_data_length = cpu_to_le32(data_len); 1515 1516 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle, 1517 GFP_KERNEL); 1518 if (!kmem) { 1519 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1520 (unsigned)data_len); 1521 return -ENOMEM; 1522 } 1523 memcpy(kmem, data, data_len); 1524 req.host_src_addr = cpu_to_le64(dma_handle); 1525 1526 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT); 1527 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle); 1528 1529 return rc; 1530 } 1531 1532 static int bnxt_firmware_reset(struct net_device *dev, 1533 u16 dir_type) 1534 { 1535 struct bnxt *bp = netdev_priv(dev); 1536 struct hwrm_fw_reset_input req = {0}; 1537 1538 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1); 1539 1540 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 1541 /* (e.g. when firmware isn't already running) */ 1542 switch (dir_type) { 1543 case BNX_DIR_TYPE_CHIMP_PATCH: 1544 case BNX_DIR_TYPE_BOOTCODE: 1545 case BNX_DIR_TYPE_BOOTCODE_2: 1546 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 1547 /* Self-reset ChiMP upon next PCIe reset: */ 1548 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1549 break; 1550 case BNX_DIR_TYPE_APE_FW: 1551 case BNX_DIR_TYPE_APE_PATCH: 1552 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 1553 /* Self-reset APE upon next PCIe reset: */ 1554 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1555 break; 1556 case BNX_DIR_TYPE_KONG_FW: 1557 case BNX_DIR_TYPE_KONG_PATCH: 1558 req.embedded_proc_type = 1559 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 1560 break; 1561 case BNX_DIR_TYPE_BONO_FW: 1562 case BNX_DIR_TYPE_BONO_PATCH: 1563 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 1564 break; 1565 case BNXT_FW_RESET_CHIP: 1566 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP; 1567 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP; 1568 break; 1569 case BNXT_FW_RESET_AP: 1570 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP; 1571 break; 1572 default: 1573 return -EINVAL; 1574 } 1575 1576 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1577 } 1578 1579 static int bnxt_flash_firmware(struct net_device *dev, 1580 u16 dir_type, 1581 const u8 *fw_data, 1582 size_t fw_size) 1583 { 1584 int rc = 0; 1585 u16 code_type; 1586 u32 stored_crc; 1587 u32 calculated_crc; 1588 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 1589 1590 switch (dir_type) { 1591 case BNX_DIR_TYPE_BOOTCODE: 1592 case BNX_DIR_TYPE_BOOTCODE_2: 1593 code_type = CODE_BOOT; 1594 break; 1595 case BNX_DIR_TYPE_CHIMP_PATCH: 1596 code_type = CODE_CHIMP_PATCH; 1597 break; 1598 case BNX_DIR_TYPE_APE_FW: 1599 code_type = CODE_MCTP_PASSTHRU; 1600 break; 1601 case BNX_DIR_TYPE_APE_PATCH: 1602 code_type = CODE_APE_PATCH; 1603 break; 1604 case BNX_DIR_TYPE_KONG_FW: 1605 code_type = CODE_KONG_FW; 1606 break; 1607 case BNX_DIR_TYPE_KONG_PATCH: 1608 code_type = CODE_KONG_PATCH; 1609 break; 1610 case BNX_DIR_TYPE_BONO_FW: 1611 code_type = CODE_BONO_FW; 1612 break; 1613 case BNX_DIR_TYPE_BONO_PATCH: 1614 code_type = CODE_BONO_PATCH; 1615 break; 1616 default: 1617 netdev_err(dev, "Unsupported directory entry type: %u\n", 1618 dir_type); 1619 return -EINVAL; 1620 } 1621 if (fw_size < sizeof(struct bnxt_fw_header)) { 1622 netdev_err(dev, "Invalid firmware file size: %u\n", 1623 (unsigned int)fw_size); 1624 return -EINVAL; 1625 } 1626 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 1627 netdev_err(dev, "Invalid firmware signature: %08X\n", 1628 le32_to_cpu(header->signature)); 1629 return -EINVAL; 1630 } 1631 if (header->code_type != code_type) { 1632 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 1633 code_type, header->code_type); 1634 return -EINVAL; 1635 } 1636 if (header->device != DEVICE_CUMULUS_FAMILY) { 1637 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 1638 DEVICE_CUMULUS_FAMILY, header->device); 1639 return -EINVAL; 1640 } 1641 /* Confirm the CRC32 checksum of the file: */ 1642 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1643 sizeof(stored_crc))); 1644 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1645 if (calculated_crc != stored_crc) { 1646 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 1647 (unsigned long)stored_crc, 1648 (unsigned long)calculated_crc); 1649 return -EINVAL; 1650 } 1651 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1652 0, 0, fw_data, fw_size); 1653 if (rc == 0) /* Firmware update successful */ 1654 rc = bnxt_firmware_reset(dev, dir_type); 1655 1656 return rc; 1657 } 1658 1659 static int bnxt_flash_microcode(struct net_device *dev, 1660 u16 dir_type, 1661 const u8 *fw_data, 1662 size_t fw_size) 1663 { 1664 struct bnxt_ucode_trailer *trailer; 1665 u32 calculated_crc; 1666 u32 stored_crc; 1667 int rc = 0; 1668 1669 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 1670 netdev_err(dev, "Invalid microcode file size: %u\n", 1671 (unsigned int)fw_size); 1672 return -EINVAL; 1673 } 1674 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 1675 sizeof(*trailer))); 1676 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 1677 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 1678 le32_to_cpu(trailer->sig)); 1679 return -EINVAL; 1680 } 1681 if (le16_to_cpu(trailer->dir_type) != dir_type) { 1682 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 1683 dir_type, le16_to_cpu(trailer->dir_type)); 1684 return -EINVAL; 1685 } 1686 if (le16_to_cpu(trailer->trailer_length) < 1687 sizeof(struct bnxt_ucode_trailer)) { 1688 netdev_err(dev, "Invalid microcode trailer length: %d\n", 1689 le16_to_cpu(trailer->trailer_length)); 1690 return -EINVAL; 1691 } 1692 1693 /* Confirm the CRC32 checksum of the file: */ 1694 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1695 sizeof(stored_crc))); 1696 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1697 if (calculated_crc != stored_crc) { 1698 netdev_err(dev, 1699 "CRC32 (%08lX) does not match calculated: %08lX\n", 1700 (unsigned long)stored_crc, 1701 (unsigned long)calculated_crc); 1702 return -EINVAL; 1703 } 1704 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1705 0, 0, fw_data, fw_size); 1706 1707 return rc; 1708 } 1709 1710 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 1711 { 1712 switch (dir_type) { 1713 case BNX_DIR_TYPE_CHIMP_PATCH: 1714 case BNX_DIR_TYPE_BOOTCODE: 1715 case BNX_DIR_TYPE_BOOTCODE_2: 1716 case BNX_DIR_TYPE_APE_FW: 1717 case BNX_DIR_TYPE_APE_PATCH: 1718 case BNX_DIR_TYPE_KONG_FW: 1719 case BNX_DIR_TYPE_KONG_PATCH: 1720 case BNX_DIR_TYPE_BONO_FW: 1721 case BNX_DIR_TYPE_BONO_PATCH: 1722 return true; 1723 } 1724 1725 return false; 1726 } 1727 1728 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 1729 { 1730 switch (dir_type) { 1731 case BNX_DIR_TYPE_AVS: 1732 case BNX_DIR_TYPE_EXP_ROM_MBA: 1733 case BNX_DIR_TYPE_PCIE: 1734 case BNX_DIR_TYPE_TSCF_UCODE: 1735 case BNX_DIR_TYPE_EXT_PHY: 1736 case BNX_DIR_TYPE_CCM: 1737 case BNX_DIR_TYPE_ISCSI_BOOT: 1738 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 1739 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 1740 return true; 1741 } 1742 1743 return false; 1744 } 1745 1746 static bool bnxt_dir_type_is_executable(u16 dir_type) 1747 { 1748 return bnxt_dir_type_is_ape_bin_format(dir_type) || 1749 bnxt_dir_type_is_other_exec_format(dir_type); 1750 } 1751 1752 static int bnxt_flash_firmware_from_file(struct net_device *dev, 1753 u16 dir_type, 1754 const char *filename) 1755 { 1756 const struct firmware *fw; 1757 int rc; 1758 1759 rc = request_firmware(&fw, filename, &dev->dev); 1760 if (rc != 0) { 1761 netdev_err(dev, "Error %d requesting firmware file: %s\n", 1762 rc, filename); 1763 return rc; 1764 } 1765 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true) 1766 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 1767 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true) 1768 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 1769 else 1770 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1771 0, 0, fw->data, fw->size); 1772 release_firmware(fw); 1773 return rc; 1774 } 1775 1776 static int bnxt_flash_package_from_file(struct net_device *dev, 1777 char *filename, u32 install_type) 1778 { 1779 struct bnxt *bp = netdev_priv(dev); 1780 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr; 1781 struct hwrm_nvm_install_update_input install = {0}; 1782 const struct firmware *fw; 1783 u32 item_len; 1784 u16 index; 1785 int rc; 1786 1787 bnxt_hwrm_fw_set_time(bp); 1788 1789 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 1790 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1791 &index, &item_len, NULL) != 0) { 1792 netdev_err(dev, "PKG update area not created in nvram\n"); 1793 return -ENOBUFS; 1794 } 1795 1796 rc = request_firmware(&fw, filename, &dev->dev); 1797 if (rc != 0) { 1798 netdev_err(dev, "PKG error %d requesting file: %s\n", 1799 rc, filename); 1800 return rc; 1801 } 1802 1803 if (fw->size > item_len) { 1804 netdev_err(dev, "PKG insufficient update area in nvram: %lu", 1805 (unsigned long)fw->size); 1806 rc = -EFBIG; 1807 } else { 1808 dma_addr_t dma_handle; 1809 u8 *kmem; 1810 struct hwrm_nvm_modify_input modify = {0}; 1811 1812 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1); 1813 1814 modify.dir_idx = cpu_to_le16(index); 1815 modify.len = cpu_to_le32(fw->size); 1816 1817 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size, 1818 &dma_handle, GFP_KERNEL); 1819 if (!kmem) { 1820 netdev_err(dev, 1821 "dma_alloc_coherent failure, length = %u\n", 1822 (unsigned int)fw->size); 1823 rc = -ENOMEM; 1824 } else { 1825 memcpy(kmem, fw->data, fw->size); 1826 modify.host_src_addr = cpu_to_le64(dma_handle); 1827 1828 rc = hwrm_send_message(bp, &modify, sizeof(modify), 1829 FLASH_PACKAGE_TIMEOUT); 1830 dma_free_coherent(&bp->pdev->dev, fw->size, kmem, 1831 dma_handle); 1832 } 1833 } 1834 release_firmware(fw); 1835 if (rc) 1836 return rc; 1837 1838 if ((install_type & 0xffff) == 0) 1839 install_type >>= 16; 1840 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1); 1841 install.install_type = cpu_to_le32(install_type); 1842 1843 mutex_lock(&bp->hwrm_cmd_lock); 1844 rc = _hwrm_send_message(bp, &install, sizeof(install), 1845 INSTALL_PACKAGE_TIMEOUT); 1846 if (rc) { 1847 rc = -EOPNOTSUPP; 1848 goto flash_pkg_exit; 1849 } 1850 1851 if (resp->error_code) { 1852 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err; 1853 1854 if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { 1855 install.flags |= cpu_to_le16( 1856 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 1857 rc = _hwrm_send_message(bp, &install, sizeof(install), 1858 INSTALL_PACKAGE_TIMEOUT); 1859 if (rc) { 1860 rc = -EOPNOTSUPP; 1861 goto flash_pkg_exit; 1862 } 1863 } 1864 } 1865 1866 if (resp->result) { 1867 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 1868 (s8)resp->result, (int)resp->problem_item); 1869 rc = -ENOPKG; 1870 } 1871 flash_pkg_exit: 1872 mutex_unlock(&bp->hwrm_cmd_lock); 1873 return rc; 1874 } 1875 1876 static int bnxt_flash_device(struct net_device *dev, 1877 struct ethtool_flash *flash) 1878 { 1879 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 1880 netdev_err(dev, "flashdev not supported from a virtual function\n"); 1881 return -EINVAL; 1882 } 1883 1884 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 1885 flash->region > 0xffff) 1886 return bnxt_flash_package_from_file(dev, flash->data, 1887 flash->region); 1888 1889 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 1890 } 1891 1892 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 1893 { 1894 struct bnxt *bp = netdev_priv(dev); 1895 int rc; 1896 struct hwrm_nvm_get_dir_info_input req = {0}; 1897 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr; 1898 1899 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1); 1900 1901 mutex_lock(&bp->hwrm_cmd_lock); 1902 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1903 if (!rc) { 1904 *entries = le32_to_cpu(output->entries); 1905 *length = le32_to_cpu(output->entry_length); 1906 } 1907 mutex_unlock(&bp->hwrm_cmd_lock); 1908 return rc; 1909 } 1910 1911 static int bnxt_get_eeprom_len(struct net_device *dev) 1912 { 1913 struct bnxt *bp = netdev_priv(dev); 1914 1915 if (BNXT_VF(bp)) 1916 return 0; 1917 1918 /* The -1 return value allows the entire 32-bit range of offsets to be 1919 * passed via the ethtool command-line utility. 1920 */ 1921 return -1; 1922 } 1923 1924 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 1925 { 1926 struct bnxt *bp = netdev_priv(dev); 1927 int rc; 1928 u32 dir_entries; 1929 u32 entry_length; 1930 u8 *buf; 1931 size_t buflen; 1932 dma_addr_t dma_handle; 1933 struct hwrm_nvm_get_dir_entries_input req = {0}; 1934 1935 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 1936 if (rc != 0) 1937 return rc; 1938 1939 /* Insert 2 bytes of directory info (count and size of entries) */ 1940 if (len < 2) 1941 return -EINVAL; 1942 1943 *data++ = dir_entries; 1944 *data++ = entry_length; 1945 len -= 2; 1946 memset(data, 0xff, len); 1947 1948 buflen = dir_entries * entry_length; 1949 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle, 1950 GFP_KERNEL); 1951 if (!buf) { 1952 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1953 (unsigned)buflen); 1954 return -ENOMEM; 1955 } 1956 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1); 1957 req.host_dest_addr = cpu_to_le64(dma_handle); 1958 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1959 if (rc == 0) 1960 memcpy(data, buf, len > buflen ? buflen : len); 1961 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle); 1962 return rc; 1963 } 1964 1965 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 1966 u32 length, u8 *data) 1967 { 1968 struct bnxt *bp = netdev_priv(dev); 1969 int rc; 1970 u8 *buf; 1971 dma_addr_t dma_handle; 1972 struct hwrm_nvm_read_input req = {0}; 1973 1974 if (!length) 1975 return -EINVAL; 1976 1977 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle, 1978 GFP_KERNEL); 1979 if (!buf) { 1980 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1981 (unsigned)length); 1982 return -ENOMEM; 1983 } 1984 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1); 1985 req.host_dest_addr = cpu_to_le64(dma_handle); 1986 req.dir_idx = cpu_to_le16(index); 1987 req.offset = cpu_to_le32(offset); 1988 req.len = cpu_to_le32(length); 1989 1990 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1991 if (rc == 0) 1992 memcpy(data, buf, length); 1993 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle); 1994 return rc; 1995 } 1996 1997 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1998 u16 ext, u16 *index, u32 *item_length, 1999 u32 *data_length) 2000 { 2001 struct bnxt *bp = netdev_priv(dev); 2002 int rc; 2003 struct hwrm_nvm_find_dir_entry_input req = {0}; 2004 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr; 2005 2006 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1); 2007 req.enables = 0; 2008 req.dir_idx = 0; 2009 req.dir_type = cpu_to_le16(type); 2010 req.dir_ordinal = cpu_to_le16(ordinal); 2011 req.dir_ext = cpu_to_le16(ext); 2012 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 2013 mutex_lock(&bp->hwrm_cmd_lock); 2014 rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2015 if (rc == 0) { 2016 if (index) 2017 *index = le16_to_cpu(output->dir_idx); 2018 if (item_length) 2019 *item_length = le32_to_cpu(output->dir_item_length); 2020 if (data_length) 2021 *data_length = le32_to_cpu(output->dir_data_length); 2022 } 2023 mutex_unlock(&bp->hwrm_cmd_lock); 2024 return rc; 2025 } 2026 2027 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 2028 { 2029 char *retval = NULL; 2030 char *p; 2031 char *value; 2032 int field = 0; 2033 2034 if (datalen < 1) 2035 return NULL; 2036 /* null-terminate the log data (removing last '\n'): */ 2037 data[datalen - 1] = 0; 2038 for (p = data; *p != 0; p++) { 2039 field = 0; 2040 retval = NULL; 2041 while (*p != 0 && *p != '\n') { 2042 value = p; 2043 while (*p != 0 && *p != '\t' && *p != '\n') 2044 p++; 2045 if (field == desired_field) 2046 retval = value; 2047 if (*p != '\t') 2048 break; 2049 *p = 0; 2050 field++; 2051 p++; 2052 } 2053 if (*p == 0) 2054 break; 2055 *p = 0; 2056 } 2057 return retval; 2058 } 2059 2060 static void bnxt_get_pkgver(struct net_device *dev) 2061 { 2062 struct bnxt *bp = netdev_priv(dev); 2063 u16 index = 0; 2064 char *pkgver; 2065 u32 pkglen; 2066 u8 *pkgbuf; 2067 int len; 2068 2069 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 2070 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 2071 &index, NULL, &pkglen) != 0) 2072 return; 2073 2074 pkgbuf = kzalloc(pkglen, GFP_KERNEL); 2075 if (!pkgbuf) { 2076 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n", 2077 pkglen); 2078 return; 2079 } 2080 2081 if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf)) 2082 goto err; 2083 2084 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf, 2085 pkglen); 2086 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) { 2087 len = strlen(bp->fw_ver_str); 2088 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1, 2089 "/pkg %s", pkgver); 2090 } 2091 err: 2092 kfree(pkgbuf); 2093 } 2094 2095 static int bnxt_get_eeprom(struct net_device *dev, 2096 struct ethtool_eeprom *eeprom, 2097 u8 *data) 2098 { 2099 u32 index; 2100 u32 offset; 2101 2102 if (eeprom->offset == 0) /* special offset value to get directory */ 2103 return bnxt_get_nvram_directory(dev, eeprom->len, data); 2104 2105 index = eeprom->offset >> 24; 2106 offset = eeprom->offset & 0xffffff; 2107 2108 if (index == 0) { 2109 netdev_err(dev, "unsupported index value: %d\n", index); 2110 return -EINVAL; 2111 } 2112 2113 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 2114 } 2115 2116 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 2117 { 2118 struct bnxt *bp = netdev_priv(dev); 2119 struct hwrm_nvm_erase_dir_entry_input req = {0}; 2120 2121 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1); 2122 req.dir_idx = cpu_to_le16(index); 2123 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2124 } 2125 2126 static int bnxt_set_eeprom(struct net_device *dev, 2127 struct ethtool_eeprom *eeprom, 2128 u8 *data) 2129 { 2130 struct bnxt *bp = netdev_priv(dev); 2131 u8 index, dir_op; 2132 u16 type, ext, ordinal, attr; 2133 2134 if (!BNXT_PF(bp)) { 2135 netdev_err(dev, "NVM write not supported from a virtual function\n"); 2136 return -EINVAL; 2137 } 2138 2139 type = eeprom->magic >> 16; 2140 2141 if (type == 0xffff) { /* special value for directory operations */ 2142 index = eeprom->magic & 0xff; 2143 dir_op = eeprom->magic >> 8; 2144 if (index == 0) 2145 return -EINVAL; 2146 switch (dir_op) { 2147 case 0x0e: /* erase */ 2148 if (eeprom->offset != ~eeprom->magic) 2149 return -EINVAL; 2150 return bnxt_erase_nvram_directory(dev, index - 1); 2151 default: 2152 return -EINVAL; 2153 } 2154 } 2155 2156 /* Create or re-write an NVM item: */ 2157 if (bnxt_dir_type_is_executable(type) == true) 2158 return -EOPNOTSUPP; 2159 ext = eeprom->magic & 0xffff; 2160 ordinal = eeprom->offset >> 16; 2161 attr = eeprom->offset & 0xffff; 2162 2163 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data, 2164 eeprom->len); 2165 } 2166 2167 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 2168 { 2169 struct bnxt *bp = netdev_priv(dev); 2170 struct ethtool_eee *eee = &bp->eee; 2171 struct bnxt_link_info *link_info = &bp->link_info; 2172 u32 advertising = 2173 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 2174 int rc = 0; 2175 2176 if (!BNXT_SINGLE_PF(bp)) 2177 return -EOPNOTSUPP; 2178 2179 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 2180 return -EOPNOTSUPP; 2181 2182 if (!edata->eee_enabled) 2183 goto eee_ok; 2184 2185 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 2186 netdev_warn(dev, "EEE requires autoneg\n"); 2187 return -EINVAL; 2188 } 2189 if (edata->tx_lpi_enabled) { 2190 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 2191 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 2192 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 2193 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 2194 return -EINVAL; 2195 } else if (!bp->lpi_tmr_hi) { 2196 edata->tx_lpi_timer = eee->tx_lpi_timer; 2197 } 2198 } 2199 if (!edata->advertised) { 2200 edata->advertised = advertising & eee->supported; 2201 } else if (edata->advertised & ~advertising) { 2202 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 2203 edata->advertised, advertising); 2204 return -EINVAL; 2205 } 2206 2207 eee->advertised = edata->advertised; 2208 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 2209 eee->tx_lpi_timer = edata->tx_lpi_timer; 2210 eee_ok: 2211 eee->eee_enabled = edata->eee_enabled; 2212 2213 if (netif_running(dev)) 2214 rc = bnxt_hwrm_set_link_setting(bp, false, true); 2215 2216 return rc; 2217 } 2218 2219 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 2220 { 2221 struct bnxt *bp = netdev_priv(dev); 2222 2223 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 2224 return -EOPNOTSUPP; 2225 2226 *edata = bp->eee; 2227 if (!bp->eee.eee_enabled) { 2228 /* Preserve tx_lpi_timer so that the last value will be used 2229 * by default when it is re-enabled. 2230 */ 2231 edata->advertised = 0; 2232 edata->tx_lpi_enabled = 0; 2233 } 2234 2235 if (!bp->eee.eee_active) 2236 edata->lp_advertised = 0; 2237 2238 return 0; 2239 } 2240 2241 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 2242 u16 page_number, u16 start_addr, 2243 u16 data_length, u8 *buf) 2244 { 2245 struct hwrm_port_phy_i2c_read_input req = {0}; 2246 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; 2247 int rc, byte_offset = 0; 2248 2249 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); 2250 req.i2c_slave_addr = i2c_addr; 2251 req.page_number = cpu_to_le16(page_number); 2252 req.port_id = cpu_to_le16(bp->pf.port_id); 2253 do { 2254 u16 xfer_size; 2255 2256 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 2257 data_length -= xfer_size; 2258 req.page_offset = cpu_to_le16(start_addr + byte_offset); 2259 req.data_length = xfer_size; 2260 req.enables = cpu_to_le32(start_addr + byte_offset ? 2261 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); 2262 mutex_lock(&bp->hwrm_cmd_lock); 2263 rc = _hwrm_send_message(bp, &req, sizeof(req), 2264 HWRM_CMD_TIMEOUT); 2265 if (!rc) 2266 memcpy(buf + byte_offset, output->data, xfer_size); 2267 mutex_unlock(&bp->hwrm_cmd_lock); 2268 byte_offset += xfer_size; 2269 } while (!rc && data_length > 0); 2270 2271 return rc; 2272 } 2273 2274 static int bnxt_get_module_info(struct net_device *dev, 2275 struct ethtool_modinfo *modinfo) 2276 { 2277 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1]; 2278 struct bnxt *bp = netdev_priv(dev); 2279 int rc; 2280 2281 /* No point in going further if phy status indicates 2282 * module is not inserted or if it is powered down or 2283 * if it is of type 10GBase-T 2284 */ 2285 if (bp->link_info.module_status > 2286 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 2287 return -EOPNOTSUPP; 2288 2289 /* This feature is not supported in older firmware versions */ 2290 if (bp->hwrm_spec_code < 0x10202) 2291 return -EOPNOTSUPP; 2292 2293 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 2294 SFF_DIAG_SUPPORT_OFFSET + 1, 2295 data); 2296 if (!rc) { 2297 u8 module_id = data[0]; 2298 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET]; 2299 2300 switch (module_id) { 2301 case SFF_MODULE_ID_SFP: 2302 modinfo->type = ETH_MODULE_SFF_8472; 2303 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 2304 if (!diag_supported) 2305 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2306 break; 2307 case SFF_MODULE_ID_QSFP: 2308 case SFF_MODULE_ID_QSFP_PLUS: 2309 modinfo->type = ETH_MODULE_SFF_8436; 2310 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2311 break; 2312 case SFF_MODULE_ID_QSFP28: 2313 modinfo->type = ETH_MODULE_SFF_8636; 2314 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 2315 break; 2316 default: 2317 rc = -EOPNOTSUPP; 2318 break; 2319 } 2320 } 2321 return rc; 2322 } 2323 2324 static int bnxt_get_module_eeprom(struct net_device *dev, 2325 struct ethtool_eeprom *eeprom, 2326 u8 *data) 2327 { 2328 struct bnxt *bp = netdev_priv(dev); 2329 u16 start = eeprom->offset, length = eeprom->len; 2330 int rc = 0; 2331 2332 memset(data, 0, eeprom->len); 2333 2334 /* Read A0 portion of the EEPROM */ 2335 if (start < ETH_MODULE_SFF_8436_LEN) { 2336 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 2337 length = ETH_MODULE_SFF_8436_LEN - start; 2338 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 2339 start, length, data); 2340 if (rc) 2341 return rc; 2342 start += length; 2343 data += length; 2344 length = eeprom->len - length; 2345 } 2346 2347 /* Read A2 portion of the EEPROM */ 2348 if (length) { 2349 start -= ETH_MODULE_SFF_8436_LEN; 2350 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, 2351 start, length, data); 2352 } 2353 return rc; 2354 } 2355 2356 static int bnxt_nway_reset(struct net_device *dev) 2357 { 2358 int rc = 0; 2359 2360 struct bnxt *bp = netdev_priv(dev); 2361 struct bnxt_link_info *link_info = &bp->link_info; 2362 2363 if (!BNXT_SINGLE_PF(bp)) 2364 return -EOPNOTSUPP; 2365 2366 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 2367 return -EINVAL; 2368 2369 if (netif_running(dev)) 2370 rc = bnxt_hwrm_set_link_setting(bp, true, false); 2371 2372 return rc; 2373 } 2374 2375 static int bnxt_set_phys_id(struct net_device *dev, 2376 enum ethtool_phys_id_state state) 2377 { 2378 struct hwrm_port_led_cfg_input req = {0}; 2379 struct bnxt *bp = netdev_priv(dev); 2380 struct bnxt_pf_info *pf = &bp->pf; 2381 struct bnxt_led_cfg *led_cfg; 2382 u8 led_state; 2383 __le16 duration; 2384 int i, rc; 2385 2386 if (!bp->num_leds || BNXT_VF(bp)) 2387 return -EOPNOTSUPP; 2388 2389 if (state == ETHTOOL_ID_ACTIVE) { 2390 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 2391 duration = cpu_to_le16(500); 2392 } else if (state == ETHTOOL_ID_INACTIVE) { 2393 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 2394 duration = cpu_to_le16(0); 2395 } else { 2396 return -EINVAL; 2397 } 2398 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1); 2399 req.port_id = cpu_to_le16(pf->port_id); 2400 req.num_leds = bp->num_leds; 2401 led_cfg = (struct bnxt_led_cfg *)&req.led0_id; 2402 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 2403 req.enables |= BNXT_LED_DFLT_ENABLES(i); 2404 led_cfg->led_id = bp->leds[i].led_id; 2405 led_cfg->led_state = led_state; 2406 led_cfg->led_blink_on = duration; 2407 led_cfg->led_blink_off = duration; 2408 led_cfg->led_group_id = bp->leds[i].led_group_id; 2409 } 2410 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2411 if (rc) 2412 rc = -EIO; 2413 return rc; 2414 } 2415 2416 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 2417 { 2418 struct hwrm_selftest_irq_input req = {0}; 2419 2420 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1); 2421 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2422 } 2423 2424 static int bnxt_test_irq(struct bnxt *bp) 2425 { 2426 int i; 2427 2428 for (i = 0; i < bp->cp_nr_rings; i++) { 2429 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 2430 int rc; 2431 2432 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 2433 if (rc) 2434 return rc; 2435 } 2436 return 0; 2437 } 2438 2439 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 2440 { 2441 struct hwrm_port_mac_cfg_input req = {0}; 2442 2443 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1); 2444 2445 req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 2446 if (enable) 2447 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 2448 else 2449 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 2450 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2451 } 2452 2453 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 2454 struct hwrm_port_phy_cfg_input *req) 2455 { 2456 struct bnxt_link_info *link_info = &bp->link_info; 2457 u16 fw_advertising = link_info->advertising; 2458 u16 fw_speed; 2459 int rc; 2460 2461 if (!link_info->autoneg) 2462 return 0; 2463 2464 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 2465 if (netif_carrier_ok(bp->dev)) 2466 fw_speed = bp->link_info.link_speed; 2467 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 2468 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 2469 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 2470 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 2471 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 2472 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 2473 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 2474 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 2475 2476 req->force_link_speed = cpu_to_le16(fw_speed); 2477 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 2478 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2479 rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT); 2480 req->flags = 0; 2481 req->force_link_speed = cpu_to_le16(0); 2482 return rc; 2483 } 2484 2485 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext) 2486 { 2487 struct hwrm_port_phy_cfg_input req = {0}; 2488 2489 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1); 2490 2491 if (enable) { 2492 bnxt_disable_an_for_lpbk(bp, &req); 2493 if (ext) 2494 req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL; 2495 else 2496 req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 2497 } else { 2498 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 2499 } 2500 req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 2501 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2502 } 2503 2504 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 2505 u32 raw_cons, int pkt_size) 2506 { 2507 struct bnxt_napi *bnapi = cpr->bnapi; 2508 struct bnxt_rx_ring_info *rxr; 2509 struct bnxt_sw_rx_bd *rx_buf; 2510 struct rx_cmp *rxcmp; 2511 u16 cp_cons, cons; 2512 u8 *data; 2513 u32 len; 2514 int i; 2515 2516 rxr = bnapi->rx_ring; 2517 cp_cons = RING_CMP(raw_cons); 2518 rxcmp = (struct rx_cmp *) 2519 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 2520 cons = rxcmp->rx_cmp_opaque; 2521 rx_buf = &rxr->rx_buf_ring[cons]; 2522 data = rx_buf->data_ptr; 2523 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 2524 if (len != pkt_size) 2525 return -EIO; 2526 i = ETH_ALEN; 2527 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 2528 return -EIO; 2529 i += ETH_ALEN; 2530 for ( ; i < pkt_size; i++) { 2531 if (data[i] != (u8)(i & 0xff)) 2532 return -EIO; 2533 } 2534 return 0; 2535 } 2536 2537 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 2538 int pkt_size) 2539 { 2540 struct tx_cmp *txcmp; 2541 int rc = -EIO; 2542 u32 raw_cons; 2543 u32 cons; 2544 int i; 2545 2546 raw_cons = cpr->cp_raw_cons; 2547 for (i = 0; i < 200; i++) { 2548 cons = RING_CMP(raw_cons); 2549 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 2550 2551 if (!TX_CMP_VALID(txcmp, raw_cons)) { 2552 udelay(5); 2553 continue; 2554 } 2555 2556 /* The valid test of the entry must be done first before 2557 * reading any further. 2558 */ 2559 dma_rmb(); 2560 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 2561 rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size); 2562 raw_cons = NEXT_RAW_CMP(raw_cons); 2563 raw_cons = NEXT_RAW_CMP(raw_cons); 2564 break; 2565 } 2566 raw_cons = NEXT_RAW_CMP(raw_cons); 2567 } 2568 cpr->cp_raw_cons = raw_cons; 2569 return rc; 2570 } 2571 2572 static int bnxt_run_loopback(struct bnxt *bp) 2573 { 2574 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 2575 struct bnxt_cp_ring_info *cpr; 2576 int pkt_size, i = 0; 2577 struct sk_buff *skb; 2578 dma_addr_t map; 2579 u8 *data; 2580 int rc; 2581 2582 cpr = &txr->bnapi->cp_ring; 2583 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 2584 skb = netdev_alloc_skb(bp->dev, pkt_size); 2585 if (!skb) 2586 return -ENOMEM; 2587 data = skb_put(skb, pkt_size); 2588 eth_broadcast_addr(data); 2589 i += ETH_ALEN; 2590 ether_addr_copy(&data[i], bp->dev->dev_addr); 2591 i += ETH_ALEN; 2592 for ( ; i < pkt_size; i++) 2593 data[i] = (u8)(i & 0xff); 2594 2595 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 2596 PCI_DMA_TODEVICE); 2597 if (dma_mapping_error(&bp->pdev->dev, map)) { 2598 dev_kfree_skb(skb); 2599 return -EIO; 2600 } 2601 bnxt_xmit_xdp(bp, txr, map, pkt_size, 0); 2602 2603 /* Sync BD data before updating doorbell */ 2604 wmb(); 2605 2606 bnxt_db_write(bp, &txr->tx_db, txr->tx_prod); 2607 rc = bnxt_poll_loopback(bp, cpr, pkt_size); 2608 2609 dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE); 2610 dev_kfree_skb(skb); 2611 return rc; 2612 } 2613 2614 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 2615 { 2616 struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr; 2617 struct hwrm_selftest_exec_input req = {0}; 2618 int rc; 2619 2620 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1); 2621 mutex_lock(&bp->hwrm_cmd_lock); 2622 resp->test_success = 0; 2623 req.flags = test_mask; 2624 rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout); 2625 *test_results = resp->test_success; 2626 mutex_unlock(&bp->hwrm_cmd_lock); 2627 return rc; 2628 } 2629 2630 #define BNXT_DRV_TESTS 4 2631 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 2632 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 2633 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 2634 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3) 2635 2636 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 2637 u64 *buf) 2638 { 2639 struct bnxt *bp = netdev_priv(dev); 2640 bool do_ext_lpbk = false; 2641 bool offline = false; 2642 u8 test_results = 0; 2643 u8 test_mask = 0; 2644 int rc, i; 2645 2646 if (!bp->num_tests || !BNXT_SINGLE_PF(bp)) 2647 return; 2648 memset(buf, 0, sizeof(u64) * bp->num_tests); 2649 if (!netif_running(dev)) { 2650 etest->flags |= ETH_TEST_FL_FAILED; 2651 return; 2652 } 2653 2654 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) && 2655 (bp->test_info->flags & BNXT_TEST_FL_EXT_LPBK)) 2656 do_ext_lpbk = true; 2657 2658 if (etest->flags & ETH_TEST_FL_OFFLINE) { 2659 if (bp->pf.active_vfs) { 2660 etest->flags |= ETH_TEST_FL_FAILED; 2661 netdev_warn(dev, "Offline tests cannot be run with active VFs\n"); 2662 return; 2663 } 2664 offline = true; 2665 } 2666 2667 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2668 u8 bit_val = 1 << i; 2669 2670 if (!(bp->test_info->offline_mask & bit_val)) 2671 test_mask |= bit_val; 2672 else if (offline) 2673 test_mask |= bit_val; 2674 } 2675 if (!offline) { 2676 bnxt_run_fw_tests(bp, test_mask, &test_results); 2677 } else { 2678 rc = bnxt_close_nic(bp, false, false); 2679 if (rc) 2680 return; 2681 bnxt_run_fw_tests(bp, test_mask, &test_results); 2682 2683 buf[BNXT_MACLPBK_TEST_IDX] = 1; 2684 bnxt_hwrm_mac_loopback(bp, true); 2685 msleep(250); 2686 rc = bnxt_half_open_nic(bp); 2687 if (rc) { 2688 bnxt_hwrm_mac_loopback(bp, false); 2689 etest->flags |= ETH_TEST_FL_FAILED; 2690 return; 2691 } 2692 if (bnxt_run_loopback(bp)) 2693 etest->flags |= ETH_TEST_FL_FAILED; 2694 else 2695 buf[BNXT_MACLPBK_TEST_IDX] = 0; 2696 2697 bnxt_hwrm_mac_loopback(bp, false); 2698 bnxt_hwrm_phy_loopback(bp, true, false); 2699 msleep(1000); 2700 if (bnxt_run_loopback(bp)) { 2701 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 2702 etest->flags |= ETH_TEST_FL_FAILED; 2703 } 2704 if (do_ext_lpbk) { 2705 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; 2706 bnxt_hwrm_phy_loopback(bp, true, true); 2707 msleep(1000); 2708 if (bnxt_run_loopback(bp)) { 2709 buf[BNXT_EXTLPBK_TEST_IDX] = 1; 2710 etest->flags |= ETH_TEST_FL_FAILED; 2711 } 2712 } 2713 bnxt_hwrm_phy_loopback(bp, false, false); 2714 bnxt_half_close_nic(bp); 2715 bnxt_open_nic(bp, false, true); 2716 } 2717 if (bnxt_test_irq(bp)) { 2718 buf[BNXT_IRQ_TEST_IDX] = 1; 2719 etest->flags |= ETH_TEST_FL_FAILED; 2720 } 2721 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2722 u8 bit_val = 1 << i; 2723 2724 if ((test_mask & bit_val) && !(test_results & bit_val)) { 2725 buf[i] = 1; 2726 etest->flags |= ETH_TEST_FL_FAILED; 2727 } 2728 } 2729 } 2730 2731 static int bnxt_reset(struct net_device *dev, u32 *flags) 2732 { 2733 struct bnxt *bp = netdev_priv(dev); 2734 int rc = 0; 2735 2736 if (!BNXT_PF(bp)) { 2737 netdev_err(dev, "Reset is not supported from a VF\n"); 2738 return -EOPNOTSUPP; 2739 } 2740 2741 if (pci_vfs_assigned(bp->pdev)) { 2742 netdev_err(dev, 2743 "Reset not allowed when VFs are assigned to VMs\n"); 2744 return -EBUSY; 2745 } 2746 2747 if (*flags == ETH_RESET_ALL) { 2748 /* This feature is not supported in older firmware versions */ 2749 if (bp->hwrm_spec_code < 0x10803) 2750 return -EOPNOTSUPP; 2751 2752 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP); 2753 if (!rc) { 2754 netdev_info(dev, "Reset request successful. Reload driver to complete reset\n"); 2755 *flags = 0; 2756 } 2757 } else if (*flags == ETH_RESET_AP) { 2758 /* This feature is not supported in older firmware versions */ 2759 if (bp->hwrm_spec_code < 0x10803) 2760 return -EOPNOTSUPP; 2761 2762 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP); 2763 if (!rc) { 2764 netdev_info(dev, "Reset Application Processor request successful.\n"); 2765 *flags = 0; 2766 } 2767 } else { 2768 rc = -EINVAL; 2769 } 2770 2771 return rc; 2772 } 2773 2774 static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len, 2775 struct bnxt_hwrm_dbg_dma_info *info) 2776 { 2777 struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr; 2778 struct hwrm_dbg_cmn_input *cmn_req = msg; 2779 __le16 *seq_ptr = msg + info->seq_off; 2780 u16 seq = 0, len, segs_off; 2781 void *resp = cmn_resp; 2782 dma_addr_t dma_handle; 2783 int rc, off = 0; 2784 void *dma_buf; 2785 2786 dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle, 2787 GFP_KERNEL); 2788 if (!dma_buf) 2789 return -ENOMEM; 2790 2791 segs_off = offsetof(struct hwrm_dbg_coredump_list_output, 2792 total_segments); 2793 cmn_req->host_dest_addr = cpu_to_le64(dma_handle); 2794 cmn_req->host_buf_len = cpu_to_le32(info->dma_len); 2795 mutex_lock(&bp->hwrm_cmd_lock); 2796 while (1) { 2797 *seq_ptr = cpu_to_le16(seq); 2798 rc = _hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT); 2799 if (rc) 2800 break; 2801 2802 len = le16_to_cpu(*((__le16 *)(resp + info->data_len_off))); 2803 if (!seq && 2804 cmn_req->req_type == cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) { 2805 info->segs = le16_to_cpu(*((__le16 *)(resp + 2806 segs_off))); 2807 if (!info->segs) { 2808 rc = -EIO; 2809 break; 2810 } 2811 2812 info->dest_buf_size = info->segs * 2813 sizeof(struct coredump_segment_record); 2814 info->dest_buf = kmalloc(info->dest_buf_size, 2815 GFP_KERNEL); 2816 if (!info->dest_buf) { 2817 rc = -ENOMEM; 2818 break; 2819 } 2820 } 2821 2822 if (info->dest_buf) 2823 memcpy(info->dest_buf + off, dma_buf, len); 2824 2825 if (cmn_req->req_type == 2826 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE)) 2827 info->dest_buf_size += len; 2828 2829 if (!(cmn_resp->flags & HWRM_DBG_CMN_FLAGS_MORE)) 2830 break; 2831 2832 seq++; 2833 off += len; 2834 } 2835 mutex_unlock(&bp->hwrm_cmd_lock); 2836 dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle); 2837 return rc; 2838 } 2839 2840 static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp, 2841 struct bnxt_coredump *coredump) 2842 { 2843 struct hwrm_dbg_coredump_list_input req = {0}; 2844 struct bnxt_hwrm_dbg_dma_info info = {NULL}; 2845 int rc; 2846 2847 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1); 2848 2849 info.dma_len = COREDUMP_LIST_BUF_LEN; 2850 info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no); 2851 info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output, 2852 data_len); 2853 2854 rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info); 2855 if (!rc) { 2856 coredump->data = info.dest_buf; 2857 coredump->data_size = info.dest_buf_size; 2858 coredump->total_segs = info.segs; 2859 } 2860 return rc; 2861 } 2862 2863 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id, 2864 u16 segment_id) 2865 { 2866 struct hwrm_dbg_coredump_initiate_input req = {0}; 2867 2868 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1); 2869 req.component_id = cpu_to_le16(component_id); 2870 req.segment_id = cpu_to_le16(segment_id); 2871 2872 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2873 } 2874 2875 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id, 2876 u16 segment_id, u32 *seg_len, 2877 void *buf, u32 offset) 2878 { 2879 struct hwrm_dbg_coredump_retrieve_input req = {0}; 2880 struct bnxt_hwrm_dbg_dma_info info = {NULL}; 2881 int rc; 2882 2883 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1); 2884 req.component_id = cpu_to_le16(component_id); 2885 req.segment_id = cpu_to_le16(segment_id); 2886 2887 info.dma_len = COREDUMP_RETRIEVE_BUF_LEN; 2888 info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input, 2889 seq_no); 2890 info.data_len_off = offsetof(struct hwrm_dbg_coredump_retrieve_output, 2891 data_len); 2892 if (buf) 2893 info.dest_buf = buf + offset; 2894 2895 rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info); 2896 if (!rc) 2897 *seg_len = info.dest_buf_size; 2898 2899 return rc; 2900 } 2901 2902 static void 2903 bnxt_fill_coredump_seg_hdr(struct bnxt *bp, 2904 struct bnxt_coredump_segment_hdr *seg_hdr, 2905 struct coredump_segment_record *seg_rec, u32 seg_len, 2906 int status, u32 duration, u32 instance) 2907 { 2908 memset(seg_hdr, 0, sizeof(*seg_hdr)); 2909 memcpy(seg_hdr->signature, "sEgM", 4); 2910 if (seg_rec) { 2911 seg_hdr->component_id = (__force __le32)seg_rec->component_id; 2912 seg_hdr->segment_id = (__force __le32)seg_rec->segment_id; 2913 seg_hdr->low_version = seg_rec->version_low; 2914 seg_hdr->high_version = seg_rec->version_hi; 2915 } else { 2916 /* For hwrm_ver_get response Component id = 2 2917 * and Segment id = 0 2918 */ 2919 seg_hdr->component_id = cpu_to_le32(2); 2920 seg_hdr->segment_id = 0; 2921 } 2922 seg_hdr->function_id = cpu_to_le16(bp->pdev->devfn); 2923 seg_hdr->length = cpu_to_le32(seg_len); 2924 seg_hdr->status = cpu_to_le32(status); 2925 seg_hdr->duration = cpu_to_le32(duration); 2926 seg_hdr->data_offset = cpu_to_le32(sizeof(*seg_hdr)); 2927 seg_hdr->instance = cpu_to_le32(instance); 2928 } 2929 2930 static void 2931 bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record, 2932 time64_t start, s16 start_utc, u16 total_segs, 2933 int status) 2934 { 2935 time64_t end = ktime_get_real_seconds(); 2936 u32 os_ver_major = 0, os_ver_minor = 0; 2937 struct tm tm; 2938 2939 time64_to_tm(start, 0, &tm); 2940 memset(record, 0, sizeof(*record)); 2941 memcpy(record->signature, "cOrE", 4); 2942 record->flags = 0; 2943 record->low_version = 0; 2944 record->high_version = 1; 2945 record->asic_state = 0; 2946 strlcpy(record->system_name, utsname()->nodename, 2947 sizeof(record->system_name)); 2948 record->year = cpu_to_le16(tm.tm_year + 1900); 2949 record->month = cpu_to_le16(tm.tm_mon + 1); 2950 record->day = cpu_to_le16(tm.tm_mday); 2951 record->hour = cpu_to_le16(tm.tm_hour); 2952 record->minute = cpu_to_le16(tm.tm_min); 2953 record->second = cpu_to_le16(tm.tm_sec); 2954 record->utc_bias = cpu_to_le16(start_utc); 2955 strcpy(record->commandline, "ethtool -w"); 2956 record->total_segments = cpu_to_le32(total_segs); 2957 2958 sscanf(utsname()->release, "%u.%u", &os_ver_major, &os_ver_minor); 2959 record->os_ver_major = cpu_to_le32(os_ver_major); 2960 record->os_ver_minor = cpu_to_le32(os_ver_minor); 2961 2962 strlcpy(record->os_name, utsname()->sysname, 32); 2963 time64_to_tm(end, 0, &tm); 2964 record->end_year = cpu_to_le16(tm.tm_year + 1900); 2965 record->end_month = cpu_to_le16(tm.tm_mon + 1); 2966 record->end_day = cpu_to_le16(tm.tm_mday); 2967 record->end_hour = cpu_to_le16(tm.tm_hour); 2968 record->end_minute = cpu_to_le16(tm.tm_min); 2969 record->end_second = cpu_to_le16(tm.tm_sec); 2970 record->end_utc_bias = cpu_to_le16(sys_tz.tz_minuteswest * 60); 2971 record->asic_id1 = cpu_to_le32(bp->chip_num << 16 | 2972 bp->ver_resp.chip_rev << 8 | 2973 bp->ver_resp.chip_metal); 2974 record->asic_id2 = 0; 2975 record->coredump_status = cpu_to_le32(status); 2976 record->ioctl_low_version = 0; 2977 record->ioctl_high_version = 0; 2978 } 2979 2980 static int bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len) 2981 { 2982 u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output); 2983 struct coredump_segment_record *seg_record = NULL; 2984 u32 offset = 0, seg_hdr_len, seg_record_len; 2985 struct bnxt_coredump_segment_hdr seg_hdr; 2986 struct bnxt_coredump coredump = {NULL}; 2987 time64_t start_time; 2988 u16 start_utc; 2989 int rc = 0, i; 2990 2991 start_time = ktime_get_real_seconds(); 2992 start_utc = sys_tz.tz_minuteswest * 60; 2993 seg_hdr_len = sizeof(seg_hdr); 2994 2995 /* First segment should be hwrm_ver_get response */ 2996 *dump_len = seg_hdr_len + ver_get_resp_len; 2997 if (buf) { 2998 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, NULL, ver_get_resp_len, 2999 0, 0, 0); 3000 memcpy(buf + offset, &seg_hdr, seg_hdr_len); 3001 offset += seg_hdr_len; 3002 memcpy(buf + offset, &bp->ver_resp, ver_get_resp_len); 3003 offset += ver_get_resp_len; 3004 } 3005 3006 rc = bnxt_hwrm_dbg_coredump_list(bp, &coredump); 3007 if (rc) { 3008 netdev_err(bp->dev, "Failed to get coredump segment list\n"); 3009 goto err; 3010 } 3011 3012 *dump_len += seg_hdr_len * coredump.total_segs; 3013 3014 seg_record = (struct coredump_segment_record *)coredump.data; 3015 seg_record_len = sizeof(*seg_record); 3016 3017 for (i = 0; i < coredump.total_segs; i++) { 3018 u16 comp_id = le16_to_cpu(seg_record->component_id); 3019 u16 seg_id = le16_to_cpu(seg_record->segment_id); 3020 u32 duration = 0, seg_len = 0; 3021 unsigned long start, end; 3022 3023 start = jiffies; 3024 3025 rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id); 3026 if (rc) { 3027 netdev_err(bp->dev, 3028 "Failed to initiate coredump for seg = %d\n", 3029 seg_record->segment_id); 3030 goto next_seg; 3031 } 3032 3033 /* Write segment data into the buffer */ 3034 rc = bnxt_hwrm_dbg_coredump_retrieve(bp, comp_id, seg_id, 3035 &seg_len, buf, 3036 offset + seg_hdr_len); 3037 if (rc) 3038 netdev_err(bp->dev, 3039 "Failed to retrieve coredump for seg = %d\n", 3040 seg_record->segment_id); 3041 3042 next_seg: 3043 end = jiffies; 3044 duration = jiffies_to_msecs(end - start); 3045 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, seg_record, seg_len, 3046 rc, duration, 0); 3047 3048 if (buf) { 3049 /* Write segment header into the buffer */ 3050 memcpy(buf + offset, &seg_hdr, seg_hdr_len); 3051 offset += seg_hdr_len + seg_len; 3052 } 3053 3054 *dump_len += seg_len; 3055 seg_record = 3056 (struct coredump_segment_record *)((u8 *)seg_record + 3057 seg_record_len); 3058 } 3059 3060 err: 3061 if (buf) 3062 bnxt_fill_coredump_record(bp, buf + offset, start_time, 3063 start_utc, coredump.total_segs + 1, 3064 rc); 3065 kfree(coredump.data); 3066 *dump_len += sizeof(struct bnxt_coredump_record); 3067 3068 return rc; 3069 } 3070 3071 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump) 3072 { 3073 struct bnxt *bp = netdev_priv(dev); 3074 3075 if (bp->hwrm_spec_code < 0x10801) 3076 return -EOPNOTSUPP; 3077 3078 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 | 3079 bp->ver_resp.hwrm_fw_min_8b << 16 | 3080 bp->ver_resp.hwrm_fw_bld_8b << 8 | 3081 bp->ver_resp.hwrm_fw_rsvd_8b; 3082 3083 return bnxt_get_coredump(bp, NULL, &dump->len); 3084 } 3085 3086 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump, 3087 void *buf) 3088 { 3089 struct bnxt *bp = netdev_priv(dev); 3090 3091 if (bp->hwrm_spec_code < 0x10801) 3092 return -EOPNOTSUPP; 3093 3094 memset(buf, 0, dump->len); 3095 3096 return bnxt_get_coredump(bp, buf, &dump->len); 3097 } 3098 3099 void bnxt_ethtool_init(struct bnxt *bp) 3100 { 3101 struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr; 3102 struct hwrm_selftest_qlist_input req = {0}; 3103 struct bnxt_test_info *test_info; 3104 struct net_device *dev = bp->dev; 3105 int i, rc; 3106 3107 bnxt_get_pkgver(dev); 3108 3109 if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp)) 3110 return; 3111 3112 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1); 3113 mutex_lock(&bp->hwrm_cmd_lock); 3114 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 3115 if (rc) 3116 goto ethtool_init_exit; 3117 3118 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 3119 if (!test_info) 3120 goto ethtool_init_exit; 3121 3122 bp->test_info = test_info; 3123 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 3124 if (bp->num_tests > BNXT_MAX_TEST) 3125 bp->num_tests = BNXT_MAX_TEST; 3126 3127 test_info->offline_mask = resp->offline_tests; 3128 test_info->timeout = le16_to_cpu(resp->test_timeout); 3129 if (!test_info->timeout) 3130 test_info->timeout = HWRM_CMD_TIMEOUT; 3131 for (i = 0; i < bp->num_tests; i++) { 3132 char *str = test_info->string[i]; 3133 char *fw_str = resp->test0_name + i * 32; 3134 3135 if (i == BNXT_MACLPBK_TEST_IDX) { 3136 strcpy(str, "Mac loopback test (offline)"); 3137 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 3138 strcpy(str, "Phy loopback test (offline)"); 3139 } else if (i == BNXT_EXTLPBK_TEST_IDX) { 3140 strcpy(str, "Ext loopback test (offline)"); 3141 } else if (i == BNXT_IRQ_TEST_IDX) { 3142 strcpy(str, "Interrupt_test (offline)"); 3143 } else { 3144 strlcpy(str, fw_str, ETH_GSTRING_LEN); 3145 strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); 3146 if (test_info->offline_mask & (1 << i)) 3147 strncat(str, " (offline)", 3148 ETH_GSTRING_LEN - strlen(str)); 3149 else 3150 strncat(str, " (online)", 3151 ETH_GSTRING_LEN - strlen(str)); 3152 } 3153 } 3154 3155 ethtool_init_exit: 3156 mutex_unlock(&bp->hwrm_cmd_lock); 3157 } 3158 3159 void bnxt_ethtool_free(struct bnxt *bp) 3160 { 3161 kfree(bp->test_info); 3162 bp->test_info = NULL; 3163 } 3164 3165 const struct ethtool_ops bnxt_ethtool_ops = { 3166 .get_link_ksettings = bnxt_get_link_ksettings, 3167 .set_link_ksettings = bnxt_set_link_ksettings, 3168 .get_pauseparam = bnxt_get_pauseparam, 3169 .set_pauseparam = bnxt_set_pauseparam, 3170 .get_drvinfo = bnxt_get_drvinfo, 3171 .get_wol = bnxt_get_wol, 3172 .set_wol = bnxt_set_wol, 3173 .get_coalesce = bnxt_get_coalesce, 3174 .set_coalesce = bnxt_set_coalesce, 3175 .get_msglevel = bnxt_get_msglevel, 3176 .set_msglevel = bnxt_set_msglevel, 3177 .get_sset_count = bnxt_get_sset_count, 3178 .get_strings = bnxt_get_strings, 3179 .get_ethtool_stats = bnxt_get_ethtool_stats, 3180 .set_ringparam = bnxt_set_ringparam, 3181 .get_ringparam = bnxt_get_ringparam, 3182 .get_channels = bnxt_get_channels, 3183 .set_channels = bnxt_set_channels, 3184 .get_rxnfc = bnxt_get_rxnfc, 3185 .set_rxnfc = bnxt_set_rxnfc, 3186 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 3187 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 3188 .get_rxfh = bnxt_get_rxfh, 3189 .flash_device = bnxt_flash_device, 3190 .get_eeprom_len = bnxt_get_eeprom_len, 3191 .get_eeprom = bnxt_get_eeprom, 3192 .set_eeprom = bnxt_set_eeprom, 3193 .get_link = bnxt_get_link, 3194 .get_eee = bnxt_get_eee, 3195 .set_eee = bnxt_set_eee, 3196 .get_module_info = bnxt_get_module_info, 3197 .get_module_eeprom = bnxt_get_module_eeprom, 3198 .nway_reset = bnxt_nway_reset, 3199 .set_phys_id = bnxt_set_phys_id, 3200 .self_test = bnxt_self_test, 3201 .reset = bnxt_reset, 3202 .get_dump_flag = bnxt_get_dump_flag, 3203 .get_dump_data = bnxt_get_dump_data, 3204 }; 3205