1 /* Broadcom NetXtreme-C/E network driver.
2  *
3  * Copyright (c) 2014-2016 Broadcom Corporation
4  * Copyright (c) 2016-2017 Broadcom Limited
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation.
9  */
10 
11 #include <linux/ctype.h>
12 #include <linux/stringify.h>
13 #include <linux/ethtool.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/etherdevice.h>
17 #include <linux/crc32.h>
18 #include <linux/firmware.h>
19 #include "bnxt_hsi.h"
20 #include "bnxt.h"
21 #include "bnxt_xdp.h"
22 #include "bnxt_ethtool.h"
23 #include "bnxt_nvm_defs.h"	/* NVRAM content constant and structure defs */
24 #include "bnxt_fw_hdr.h"	/* Firmware hdr constant and structure defs */
25 #define FLASH_NVRAM_TIMEOUT	((HWRM_CMD_TIMEOUT) * 100)
26 #define FLASH_PACKAGE_TIMEOUT	((HWRM_CMD_TIMEOUT) * 200)
27 #define INSTALL_PACKAGE_TIMEOUT	((HWRM_CMD_TIMEOUT) * 200)
28 
29 static u32 bnxt_get_msglevel(struct net_device *dev)
30 {
31 	struct bnxt *bp = netdev_priv(dev);
32 
33 	return bp->msg_enable;
34 }
35 
36 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
37 {
38 	struct bnxt *bp = netdev_priv(dev);
39 
40 	bp->msg_enable = value;
41 }
42 
43 static int bnxt_get_coalesce(struct net_device *dev,
44 			     struct ethtool_coalesce *coal)
45 {
46 	struct bnxt *bp = netdev_priv(dev);
47 	struct bnxt_coal *hw_coal;
48 	u16 mult;
49 
50 	memset(coal, 0, sizeof(*coal));
51 
52 	hw_coal = &bp->rx_coal;
53 	mult = hw_coal->bufs_per_record;
54 	coal->rx_coalesce_usecs = hw_coal->coal_ticks;
55 	coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
56 	coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
57 	coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
58 
59 	hw_coal = &bp->tx_coal;
60 	mult = hw_coal->bufs_per_record;
61 	coal->tx_coalesce_usecs = hw_coal->coal_ticks;
62 	coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
63 	coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
64 	coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
65 
66 	coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
67 
68 	return 0;
69 }
70 
71 static int bnxt_set_coalesce(struct net_device *dev,
72 			     struct ethtool_coalesce *coal)
73 {
74 	struct bnxt *bp = netdev_priv(dev);
75 	bool update_stats = false;
76 	struct bnxt_coal *hw_coal;
77 	int rc = 0;
78 	u16 mult;
79 
80 	hw_coal = &bp->rx_coal;
81 	mult = hw_coal->bufs_per_record;
82 	hw_coal->coal_ticks = coal->rx_coalesce_usecs;
83 	hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
84 	hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
85 	hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
86 
87 	hw_coal = &bp->tx_coal;
88 	mult = hw_coal->bufs_per_record;
89 	hw_coal->coal_ticks = coal->tx_coalesce_usecs;
90 	hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
91 	hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
92 	hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
93 
94 	if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
95 		u32 stats_ticks = coal->stats_block_coalesce_usecs;
96 
97 		/* Allow 0, which means disable. */
98 		if (stats_ticks)
99 			stats_ticks = clamp_t(u32, stats_ticks,
100 					      BNXT_MIN_STATS_COAL_TICKS,
101 					      BNXT_MAX_STATS_COAL_TICKS);
102 		stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
103 		bp->stats_coal_ticks = stats_ticks;
104 		update_stats = true;
105 	}
106 
107 	if (netif_running(dev)) {
108 		if (update_stats) {
109 			rc = bnxt_close_nic(bp, true, false);
110 			if (!rc)
111 				rc = bnxt_open_nic(bp, true, false);
112 		} else {
113 			rc = bnxt_hwrm_set_coal(bp);
114 		}
115 	}
116 
117 	return rc;
118 }
119 
120 #define BNXT_NUM_STATS	21
121 
122 #define BNXT_RX_STATS_ENTRY(counter)	\
123 	{ BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
124 
125 #define BNXT_TX_STATS_ENTRY(counter)	\
126 	{ BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
127 
128 static const struct {
129 	long offset;
130 	char string[ETH_GSTRING_LEN];
131 } bnxt_port_stats_arr[] = {
132 	BNXT_RX_STATS_ENTRY(rx_64b_frames),
133 	BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
134 	BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
135 	BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
136 	BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
137 	BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
138 	BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
139 	BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
140 	BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
141 	BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
142 	BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
143 	BNXT_RX_STATS_ENTRY(rx_total_frames),
144 	BNXT_RX_STATS_ENTRY(rx_ucast_frames),
145 	BNXT_RX_STATS_ENTRY(rx_mcast_frames),
146 	BNXT_RX_STATS_ENTRY(rx_bcast_frames),
147 	BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
148 	BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
149 	BNXT_RX_STATS_ENTRY(rx_pause_frames),
150 	BNXT_RX_STATS_ENTRY(rx_pfc_frames),
151 	BNXT_RX_STATS_ENTRY(rx_align_err_frames),
152 	BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
153 	BNXT_RX_STATS_ENTRY(rx_jbr_frames),
154 	BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
155 	BNXT_RX_STATS_ENTRY(rx_tagged_frames),
156 	BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
157 	BNXT_RX_STATS_ENTRY(rx_good_frames),
158 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
159 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
160 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
161 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
162 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
163 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
164 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
165 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
166 	BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
167 	BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
168 	BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
169 	BNXT_RX_STATS_ENTRY(rx_bytes),
170 	BNXT_RX_STATS_ENTRY(rx_runt_bytes),
171 	BNXT_RX_STATS_ENTRY(rx_runt_frames),
172 
173 	BNXT_TX_STATS_ENTRY(tx_64b_frames),
174 	BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
175 	BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
176 	BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
177 	BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
178 	BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
179 	BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
180 	BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
181 	BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
182 	BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
183 	BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
184 	BNXT_TX_STATS_ENTRY(tx_good_frames),
185 	BNXT_TX_STATS_ENTRY(tx_total_frames),
186 	BNXT_TX_STATS_ENTRY(tx_ucast_frames),
187 	BNXT_TX_STATS_ENTRY(tx_mcast_frames),
188 	BNXT_TX_STATS_ENTRY(tx_bcast_frames),
189 	BNXT_TX_STATS_ENTRY(tx_pause_frames),
190 	BNXT_TX_STATS_ENTRY(tx_pfc_frames),
191 	BNXT_TX_STATS_ENTRY(tx_jabber_frames),
192 	BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
193 	BNXT_TX_STATS_ENTRY(tx_err),
194 	BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
195 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
196 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
197 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
198 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
199 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
200 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
201 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
202 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
203 	BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
204 	BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
205 	BNXT_TX_STATS_ENTRY(tx_total_collisions),
206 	BNXT_TX_STATS_ENTRY(tx_bytes),
207 };
208 
209 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
210 
211 static int bnxt_get_num_stats(struct bnxt *bp)
212 {
213 	int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
214 
215 	if (bp->flags & BNXT_FLAG_PORT_STATS)
216 		num_stats += BNXT_NUM_PORT_STATS;
217 
218 	return num_stats;
219 }
220 
221 static int bnxt_get_sset_count(struct net_device *dev, int sset)
222 {
223 	struct bnxt *bp = netdev_priv(dev);
224 
225 	switch (sset) {
226 	case ETH_SS_STATS:
227 		return bnxt_get_num_stats(bp);
228 	case ETH_SS_TEST:
229 		if (!bp->num_tests)
230 			return -EOPNOTSUPP;
231 		return bp->num_tests;
232 	default:
233 		return -EOPNOTSUPP;
234 	}
235 }
236 
237 static void bnxt_get_ethtool_stats(struct net_device *dev,
238 				   struct ethtool_stats *stats, u64 *buf)
239 {
240 	u32 i, j = 0;
241 	struct bnxt *bp = netdev_priv(dev);
242 	u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
243 
244 	if (!bp->bnapi)
245 		return;
246 
247 	for (i = 0; i < bp->cp_nr_rings; i++) {
248 		struct bnxt_napi *bnapi = bp->bnapi[i];
249 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
250 		__le64 *hw_stats = (__le64 *)cpr->hw_stats;
251 		int k;
252 
253 		for (k = 0; k < stat_fields; j++, k++)
254 			buf[j] = le64_to_cpu(hw_stats[k]);
255 		buf[j++] = cpr->rx_l4_csum_errors;
256 	}
257 	if (bp->flags & BNXT_FLAG_PORT_STATS) {
258 		__le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
259 
260 		for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
261 			buf[j] = le64_to_cpu(*(port_stats +
262 					       bnxt_port_stats_arr[i].offset));
263 		}
264 	}
265 }
266 
267 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
268 {
269 	struct bnxt *bp = netdev_priv(dev);
270 	u32 i;
271 
272 	switch (stringset) {
273 	/* The number of strings must match BNXT_NUM_STATS defined above. */
274 	case ETH_SS_STATS:
275 		for (i = 0; i < bp->cp_nr_rings; i++) {
276 			sprintf(buf, "[%d]: rx_ucast_packets", i);
277 			buf += ETH_GSTRING_LEN;
278 			sprintf(buf, "[%d]: rx_mcast_packets", i);
279 			buf += ETH_GSTRING_LEN;
280 			sprintf(buf, "[%d]: rx_bcast_packets", i);
281 			buf += ETH_GSTRING_LEN;
282 			sprintf(buf, "[%d]: rx_discards", i);
283 			buf += ETH_GSTRING_LEN;
284 			sprintf(buf, "[%d]: rx_drops", i);
285 			buf += ETH_GSTRING_LEN;
286 			sprintf(buf, "[%d]: rx_ucast_bytes", i);
287 			buf += ETH_GSTRING_LEN;
288 			sprintf(buf, "[%d]: rx_mcast_bytes", i);
289 			buf += ETH_GSTRING_LEN;
290 			sprintf(buf, "[%d]: rx_bcast_bytes", i);
291 			buf += ETH_GSTRING_LEN;
292 			sprintf(buf, "[%d]: tx_ucast_packets", i);
293 			buf += ETH_GSTRING_LEN;
294 			sprintf(buf, "[%d]: tx_mcast_packets", i);
295 			buf += ETH_GSTRING_LEN;
296 			sprintf(buf, "[%d]: tx_bcast_packets", i);
297 			buf += ETH_GSTRING_LEN;
298 			sprintf(buf, "[%d]: tx_discards", i);
299 			buf += ETH_GSTRING_LEN;
300 			sprintf(buf, "[%d]: tx_drops", i);
301 			buf += ETH_GSTRING_LEN;
302 			sprintf(buf, "[%d]: tx_ucast_bytes", i);
303 			buf += ETH_GSTRING_LEN;
304 			sprintf(buf, "[%d]: tx_mcast_bytes", i);
305 			buf += ETH_GSTRING_LEN;
306 			sprintf(buf, "[%d]: tx_bcast_bytes", i);
307 			buf += ETH_GSTRING_LEN;
308 			sprintf(buf, "[%d]: tpa_packets", i);
309 			buf += ETH_GSTRING_LEN;
310 			sprintf(buf, "[%d]: tpa_bytes", i);
311 			buf += ETH_GSTRING_LEN;
312 			sprintf(buf, "[%d]: tpa_events", i);
313 			buf += ETH_GSTRING_LEN;
314 			sprintf(buf, "[%d]: tpa_aborts", i);
315 			buf += ETH_GSTRING_LEN;
316 			sprintf(buf, "[%d]: rx_l4_csum_errors", i);
317 			buf += ETH_GSTRING_LEN;
318 		}
319 		if (bp->flags & BNXT_FLAG_PORT_STATS) {
320 			for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
321 				strcpy(buf, bnxt_port_stats_arr[i].string);
322 				buf += ETH_GSTRING_LEN;
323 			}
324 		}
325 		break;
326 	case ETH_SS_TEST:
327 		if (bp->num_tests)
328 			memcpy(buf, bp->test_info->string,
329 			       bp->num_tests * ETH_GSTRING_LEN);
330 		break;
331 	default:
332 		netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
333 			   stringset);
334 		break;
335 	}
336 }
337 
338 static void bnxt_get_ringparam(struct net_device *dev,
339 			       struct ethtool_ringparam *ering)
340 {
341 	struct bnxt *bp = netdev_priv(dev);
342 
343 	ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
344 	ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
345 	ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
346 
347 	ering->rx_pending = bp->rx_ring_size;
348 	ering->rx_jumbo_pending = bp->rx_agg_ring_size;
349 	ering->tx_pending = bp->tx_ring_size;
350 }
351 
352 static int bnxt_set_ringparam(struct net_device *dev,
353 			      struct ethtool_ringparam *ering)
354 {
355 	struct bnxt *bp = netdev_priv(dev);
356 
357 	if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
358 	    (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
359 	    (ering->tx_pending <= MAX_SKB_FRAGS))
360 		return -EINVAL;
361 
362 	if (netif_running(dev))
363 		bnxt_close_nic(bp, false, false);
364 
365 	bp->rx_ring_size = ering->rx_pending;
366 	bp->tx_ring_size = ering->tx_pending;
367 	bnxt_set_ring_params(bp);
368 
369 	if (netif_running(dev))
370 		return bnxt_open_nic(bp, false, false);
371 
372 	return 0;
373 }
374 
375 static void bnxt_get_channels(struct net_device *dev,
376 			      struct ethtool_channels *channel)
377 {
378 	struct bnxt *bp = netdev_priv(dev);
379 	int max_rx_rings, max_tx_rings, tcs;
380 
381 	bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
382 	channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
383 
384 	if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
385 		max_rx_rings = 0;
386 		max_tx_rings = 0;
387 	}
388 
389 	tcs = netdev_get_num_tc(dev);
390 	if (tcs > 1)
391 		max_tx_rings /= tcs;
392 
393 	channel->max_rx = max_rx_rings;
394 	channel->max_tx = max_tx_rings;
395 	channel->max_other = 0;
396 	if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
397 		channel->combined_count = bp->rx_nr_rings;
398 		if (BNXT_CHIP_TYPE_NITRO_A0(bp))
399 			channel->combined_count--;
400 	} else {
401 		if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
402 			channel->rx_count = bp->rx_nr_rings;
403 			channel->tx_count = bp->tx_nr_rings_per_tc;
404 		}
405 	}
406 }
407 
408 static int bnxt_set_channels(struct net_device *dev,
409 			     struct ethtool_channels *channel)
410 {
411 	struct bnxt *bp = netdev_priv(dev);
412 	int req_tx_rings, req_rx_rings, tcs;
413 	bool sh = false;
414 	int tx_xdp = 0;
415 	int rc = 0;
416 
417 	if (channel->other_count)
418 		return -EINVAL;
419 
420 	if (!channel->combined_count &&
421 	    (!channel->rx_count || !channel->tx_count))
422 		return -EINVAL;
423 
424 	if (channel->combined_count &&
425 	    (channel->rx_count || channel->tx_count))
426 		return -EINVAL;
427 
428 	if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
429 					    channel->tx_count))
430 		return -EINVAL;
431 
432 	if (channel->combined_count)
433 		sh = true;
434 
435 	tcs = netdev_get_num_tc(dev);
436 
437 	req_tx_rings = sh ? channel->combined_count : channel->tx_count;
438 	req_rx_rings = sh ? channel->combined_count : channel->rx_count;
439 	if (bp->tx_nr_rings_xdp) {
440 		if (!sh) {
441 			netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
442 			return -EINVAL;
443 		}
444 		tx_xdp = req_rx_rings;
445 	}
446 	rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
447 	if (rc) {
448 		netdev_warn(dev, "Unable to allocate the requested rings\n");
449 		return rc;
450 	}
451 
452 	if (netif_running(dev)) {
453 		if (BNXT_PF(bp)) {
454 			/* TODO CHIMP_FW: Send message to all VF's
455 			 * before PF unload
456 			 */
457 		}
458 		rc = bnxt_close_nic(bp, true, false);
459 		if (rc) {
460 			netdev_err(bp->dev, "Set channel failure rc :%x\n",
461 				   rc);
462 			return rc;
463 		}
464 	}
465 
466 	if (sh) {
467 		bp->flags |= BNXT_FLAG_SHARED_RINGS;
468 		bp->rx_nr_rings = channel->combined_count;
469 		bp->tx_nr_rings_per_tc = channel->combined_count;
470 	} else {
471 		bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
472 		bp->rx_nr_rings = channel->rx_count;
473 		bp->tx_nr_rings_per_tc = channel->tx_count;
474 	}
475 	bp->tx_nr_rings_xdp = tx_xdp;
476 	bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
477 	if (tcs > 1)
478 		bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
479 
480 	bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
481 			       bp->tx_nr_rings + bp->rx_nr_rings;
482 
483 	bp->num_stat_ctxs = bp->cp_nr_rings;
484 
485 	/* After changing number of rx channels, update NTUPLE feature. */
486 	netdev_update_features(dev);
487 	if (netif_running(dev)) {
488 		rc = bnxt_open_nic(bp, true, false);
489 		if ((!rc) && BNXT_PF(bp)) {
490 			/* TODO CHIMP_FW: Send message to all VF's
491 			 * to renable
492 			 */
493 		}
494 	}
495 
496 	return rc;
497 }
498 
499 #ifdef CONFIG_RFS_ACCEL
500 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
501 			    u32 *rule_locs)
502 {
503 	int i, j = 0;
504 
505 	cmd->data = bp->ntp_fltr_count;
506 	for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
507 		struct hlist_head *head;
508 		struct bnxt_ntuple_filter *fltr;
509 
510 		head = &bp->ntp_fltr_hash_tbl[i];
511 		rcu_read_lock();
512 		hlist_for_each_entry_rcu(fltr, head, hash) {
513 			if (j == cmd->rule_cnt)
514 				break;
515 			rule_locs[j++] = fltr->sw_id;
516 		}
517 		rcu_read_unlock();
518 		if (j == cmd->rule_cnt)
519 			break;
520 	}
521 	cmd->rule_cnt = j;
522 	return 0;
523 }
524 
525 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
526 {
527 	struct ethtool_rx_flow_spec *fs =
528 		(struct ethtool_rx_flow_spec *)&cmd->fs;
529 	struct bnxt_ntuple_filter *fltr;
530 	struct flow_keys *fkeys;
531 	int i, rc = -EINVAL;
532 
533 	if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
534 		return rc;
535 
536 	for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
537 		struct hlist_head *head;
538 
539 		head = &bp->ntp_fltr_hash_tbl[i];
540 		rcu_read_lock();
541 		hlist_for_each_entry_rcu(fltr, head, hash) {
542 			if (fltr->sw_id == fs->location)
543 				goto fltr_found;
544 		}
545 		rcu_read_unlock();
546 	}
547 	return rc;
548 
549 fltr_found:
550 	fkeys = &fltr->fkeys;
551 	if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
552 		if (fkeys->basic.ip_proto == IPPROTO_TCP)
553 			fs->flow_type = TCP_V4_FLOW;
554 		else if (fkeys->basic.ip_proto == IPPROTO_UDP)
555 			fs->flow_type = UDP_V4_FLOW;
556 		else
557 			goto fltr_err;
558 
559 		fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
560 		fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
561 
562 		fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
563 		fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
564 
565 		fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
566 		fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
567 
568 		fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
569 		fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
570 	} else {
571 		int i;
572 
573 		if (fkeys->basic.ip_proto == IPPROTO_TCP)
574 			fs->flow_type = TCP_V6_FLOW;
575 		else if (fkeys->basic.ip_proto == IPPROTO_UDP)
576 			fs->flow_type = UDP_V6_FLOW;
577 		else
578 			goto fltr_err;
579 
580 		*(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
581 			fkeys->addrs.v6addrs.src;
582 		*(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
583 			fkeys->addrs.v6addrs.dst;
584 		for (i = 0; i < 4; i++) {
585 			fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
586 			fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
587 		}
588 		fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
589 		fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
590 
591 		fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
592 		fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
593 	}
594 
595 	fs->ring_cookie = fltr->rxq;
596 	rc = 0;
597 
598 fltr_err:
599 	rcu_read_unlock();
600 
601 	return rc;
602 }
603 #endif
604 
605 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
606 {
607 	if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
608 		return RXH_IP_SRC | RXH_IP_DST;
609 	return 0;
610 }
611 
612 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
613 {
614 	if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
615 		return RXH_IP_SRC | RXH_IP_DST;
616 	return 0;
617 }
618 
619 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
620 {
621 	cmd->data = 0;
622 	switch (cmd->flow_type) {
623 	case TCP_V4_FLOW:
624 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
625 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
626 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
627 		cmd->data |= get_ethtool_ipv4_rss(bp);
628 		break;
629 	case UDP_V4_FLOW:
630 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
631 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
632 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
633 		/* fall through */
634 	case SCTP_V4_FLOW:
635 	case AH_ESP_V4_FLOW:
636 	case AH_V4_FLOW:
637 	case ESP_V4_FLOW:
638 	case IPV4_FLOW:
639 		cmd->data |= get_ethtool_ipv4_rss(bp);
640 		break;
641 
642 	case TCP_V6_FLOW:
643 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
644 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
645 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
646 		cmd->data |= get_ethtool_ipv6_rss(bp);
647 		break;
648 	case UDP_V6_FLOW:
649 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
650 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
651 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
652 		/* fall through */
653 	case SCTP_V6_FLOW:
654 	case AH_ESP_V6_FLOW:
655 	case AH_V6_FLOW:
656 	case ESP_V6_FLOW:
657 	case IPV6_FLOW:
658 		cmd->data |= get_ethtool_ipv6_rss(bp);
659 		break;
660 	}
661 	return 0;
662 }
663 
664 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
665 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
666 
667 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
668 {
669 	u32 rss_hash_cfg = bp->rss_hash_cfg;
670 	int tuple, rc = 0;
671 
672 	if (cmd->data == RXH_4TUPLE)
673 		tuple = 4;
674 	else if (cmd->data == RXH_2TUPLE)
675 		tuple = 2;
676 	else if (!cmd->data)
677 		tuple = 0;
678 	else
679 		return -EINVAL;
680 
681 	if (cmd->flow_type == TCP_V4_FLOW) {
682 		rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
683 		if (tuple == 4)
684 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
685 	} else if (cmd->flow_type == UDP_V4_FLOW) {
686 		if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
687 			return -EINVAL;
688 		rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
689 		if (tuple == 4)
690 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
691 	} else if (cmd->flow_type == TCP_V6_FLOW) {
692 		rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
693 		if (tuple == 4)
694 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
695 	} else if (cmd->flow_type == UDP_V6_FLOW) {
696 		if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
697 			return -EINVAL;
698 		rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
699 		if (tuple == 4)
700 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
701 	} else if (tuple == 4) {
702 		return -EINVAL;
703 	}
704 
705 	switch (cmd->flow_type) {
706 	case TCP_V4_FLOW:
707 	case UDP_V4_FLOW:
708 	case SCTP_V4_FLOW:
709 	case AH_ESP_V4_FLOW:
710 	case AH_V4_FLOW:
711 	case ESP_V4_FLOW:
712 	case IPV4_FLOW:
713 		if (tuple == 2)
714 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
715 		else if (!tuple)
716 			rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
717 		break;
718 
719 	case TCP_V6_FLOW:
720 	case UDP_V6_FLOW:
721 	case SCTP_V6_FLOW:
722 	case AH_ESP_V6_FLOW:
723 	case AH_V6_FLOW:
724 	case ESP_V6_FLOW:
725 	case IPV6_FLOW:
726 		if (tuple == 2)
727 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
728 		else if (!tuple)
729 			rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
730 		break;
731 	}
732 
733 	if (bp->rss_hash_cfg == rss_hash_cfg)
734 		return 0;
735 
736 	bp->rss_hash_cfg = rss_hash_cfg;
737 	if (netif_running(bp->dev)) {
738 		bnxt_close_nic(bp, false, false);
739 		rc = bnxt_open_nic(bp, false, false);
740 	}
741 	return rc;
742 }
743 
744 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
745 			  u32 *rule_locs)
746 {
747 	struct bnxt *bp = netdev_priv(dev);
748 	int rc = 0;
749 
750 	switch (cmd->cmd) {
751 #ifdef CONFIG_RFS_ACCEL
752 	case ETHTOOL_GRXRINGS:
753 		cmd->data = bp->rx_nr_rings;
754 		break;
755 
756 	case ETHTOOL_GRXCLSRLCNT:
757 		cmd->rule_cnt = bp->ntp_fltr_count;
758 		cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
759 		break;
760 
761 	case ETHTOOL_GRXCLSRLALL:
762 		rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
763 		break;
764 
765 	case ETHTOOL_GRXCLSRULE:
766 		rc = bnxt_grxclsrule(bp, cmd);
767 		break;
768 #endif
769 
770 	case ETHTOOL_GRXFH:
771 		rc = bnxt_grxfh(bp, cmd);
772 		break;
773 
774 	default:
775 		rc = -EOPNOTSUPP;
776 		break;
777 	}
778 
779 	return rc;
780 }
781 
782 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
783 {
784 	struct bnxt *bp = netdev_priv(dev);
785 	int rc;
786 
787 	switch (cmd->cmd) {
788 	case ETHTOOL_SRXFH:
789 		rc = bnxt_srxfh(bp, cmd);
790 		break;
791 
792 	default:
793 		rc = -EOPNOTSUPP;
794 		break;
795 	}
796 	return rc;
797 }
798 
799 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
800 {
801 	return HW_HASH_INDEX_SIZE;
802 }
803 
804 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
805 {
806 	return HW_HASH_KEY_SIZE;
807 }
808 
809 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
810 			 u8 *hfunc)
811 {
812 	struct bnxt *bp = netdev_priv(dev);
813 	struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
814 	int i = 0;
815 
816 	if (hfunc)
817 		*hfunc = ETH_RSS_HASH_TOP;
818 
819 	if (indir)
820 		for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
821 			indir[i] = le16_to_cpu(vnic->rss_table[i]);
822 
823 	if (key)
824 		memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
825 
826 	return 0;
827 }
828 
829 static void bnxt_get_drvinfo(struct net_device *dev,
830 			     struct ethtool_drvinfo *info)
831 {
832 	struct bnxt *bp = netdev_priv(dev);
833 
834 	strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
835 	strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
836 	strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
837 	strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
838 	info->n_stats = bnxt_get_num_stats(bp);
839 	info->testinfo_len = bp->num_tests;
840 	/* TODO CHIMP_FW: eeprom dump details */
841 	info->eedump_len = 0;
842 	/* TODO CHIMP FW: reg dump details */
843 	info->regdump_len = 0;
844 }
845 
846 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
847 {
848 	struct bnxt *bp = netdev_priv(dev);
849 
850 	wol->supported = 0;
851 	wol->wolopts = 0;
852 	memset(&wol->sopass, 0, sizeof(wol->sopass));
853 	if (bp->flags & BNXT_FLAG_WOL_CAP) {
854 		wol->supported = WAKE_MAGIC;
855 		if (bp->wol)
856 			wol->wolopts = WAKE_MAGIC;
857 	}
858 }
859 
860 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
861 {
862 	struct bnxt *bp = netdev_priv(dev);
863 
864 	if (wol->wolopts & ~WAKE_MAGIC)
865 		return -EINVAL;
866 
867 	if (wol->wolopts & WAKE_MAGIC) {
868 		if (!(bp->flags & BNXT_FLAG_WOL_CAP))
869 			return -EINVAL;
870 		if (!bp->wol) {
871 			if (bnxt_hwrm_alloc_wol_fltr(bp))
872 				return -EBUSY;
873 			bp->wol = 1;
874 		}
875 	} else {
876 		if (bp->wol) {
877 			if (bnxt_hwrm_free_wol_fltr(bp))
878 				return -EBUSY;
879 			bp->wol = 0;
880 		}
881 	}
882 	return 0;
883 }
884 
885 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
886 {
887 	u32 speed_mask = 0;
888 
889 	/* TODO: support 25GB, 40GB, 50GB with different cable type */
890 	/* set the advertised speeds */
891 	if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
892 		speed_mask |= ADVERTISED_100baseT_Full;
893 	if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
894 		speed_mask |= ADVERTISED_1000baseT_Full;
895 	if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
896 		speed_mask |= ADVERTISED_2500baseX_Full;
897 	if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
898 		speed_mask |= ADVERTISED_10000baseT_Full;
899 	if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
900 		speed_mask |= ADVERTISED_40000baseCR4_Full;
901 
902 	if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
903 		speed_mask |= ADVERTISED_Pause;
904 	else if (fw_pause & BNXT_LINK_PAUSE_TX)
905 		speed_mask |= ADVERTISED_Asym_Pause;
906 	else if (fw_pause & BNXT_LINK_PAUSE_RX)
907 		speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
908 
909 	return speed_mask;
910 }
911 
912 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
913 {									\
914 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB)			\
915 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
916 						     100baseT_Full);	\
917 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB)			\
918 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
919 						     1000baseT_Full);	\
920 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB)			\
921 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
922 						     10000baseT_Full);	\
923 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB)			\
924 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
925 						     25000baseCR_Full);	\
926 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB)			\
927 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
928 						     40000baseCR4_Full);\
929 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB)			\
930 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
931 						     50000baseCR2_Full);\
932 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB)			\
933 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
934 						     100000baseCR4_Full);\
935 	if ((fw_pause) & BNXT_LINK_PAUSE_RX) {				\
936 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
937 						     Pause);		\
938 		if (!((fw_pause) & BNXT_LINK_PAUSE_TX))			\
939 			ethtool_link_ksettings_add_link_mode(		\
940 					lk_ksettings, name, Asym_Pause);\
941 	} else if ((fw_pause) & BNXT_LINK_PAUSE_TX) {			\
942 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
943 						     Asym_Pause);	\
944 	}								\
945 }
946 
947 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name)		\
948 {									\
949 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
950 						  100baseT_Full) ||	\
951 	    ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
952 						  100baseT_Half))	\
953 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB;		\
954 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
955 						  1000baseT_Full) ||	\
956 	    ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
957 						  1000baseT_Half))	\
958 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB;			\
959 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
960 						  10000baseT_Full))	\
961 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB;		\
962 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
963 						  25000baseCR_Full))	\
964 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB;		\
965 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
966 						  40000baseCR4_Full))	\
967 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB;		\
968 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
969 						  50000baseCR2_Full))	\
970 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB;		\
971 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
972 						  100000baseCR4_Full))	\
973 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB;		\
974 }
975 
976 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
977 				struct ethtool_link_ksettings *lk_ksettings)
978 {
979 	u16 fw_speeds = link_info->advertising;
980 	u8 fw_pause = 0;
981 
982 	if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
983 		fw_pause = link_info->auto_pause_setting;
984 
985 	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
986 }
987 
988 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
989 				struct ethtool_link_ksettings *lk_ksettings)
990 {
991 	u16 fw_speeds = link_info->lp_auto_link_speeds;
992 	u8 fw_pause = 0;
993 
994 	if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
995 		fw_pause = link_info->lp_pause;
996 
997 	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
998 				lp_advertising);
999 }
1000 
1001 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1002 				struct ethtool_link_ksettings *lk_ksettings)
1003 {
1004 	u16 fw_speeds = link_info->support_speeds;
1005 
1006 	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1007 
1008 	ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1009 	ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1010 					     Asym_Pause);
1011 
1012 	if (link_info->support_auto_speeds)
1013 		ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1014 						     Autoneg);
1015 }
1016 
1017 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1018 {
1019 	switch (fw_link_speed) {
1020 	case BNXT_LINK_SPEED_100MB:
1021 		return SPEED_100;
1022 	case BNXT_LINK_SPEED_1GB:
1023 		return SPEED_1000;
1024 	case BNXT_LINK_SPEED_2_5GB:
1025 		return SPEED_2500;
1026 	case BNXT_LINK_SPEED_10GB:
1027 		return SPEED_10000;
1028 	case BNXT_LINK_SPEED_20GB:
1029 		return SPEED_20000;
1030 	case BNXT_LINK_SPEED_25GB:
1031 		return SPEED_25000;
1032 	case BNXT_LINK_SPEED_40GB:
1033 		return SPEED_40000;
1034 	case BNXT_LINK_SPEED_50GB:
1035 		return SPEED_50000;
1036 	case BNXT_LINK_SPEED_100GB:
1037 		return SPEED_100000;
1038 	default:
1039 		return SPEED_UNKNOWN;
1040 	}
1041 }
1042 
1043 static int bnxt_get_link_ksettings(struct net_device *dev,
1044 				   struct ethtool_link_ksettings *lk_ksettings)
1045 {
1046 	struct bnxt *bp = netdev_priv(dev);
1047 	struct bnxt_link_info *link_info = &bp->link_info;
1048 	struct ethtool_link_settings *base = &lk_ksettings->base;
1049 	u32 ethtool_speed;
1050 
1051 	ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1052 	mutex_lock(&bp->link_lock);
1053 	bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1054 
1055 	ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1056 	if (link_info->autoneg) {
1057 		bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1058 		ethtool_link_ksettings_add_link_mode(lk_ksettings,
1059 						     advertising, Autoneg);
1060 		base->autoneg = AUTONEG_ENABLE;
1061 		if (link_info->phy_link_status == BNXT_LINK_LINK)
1062 			bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1063 		ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1064 		if (!netif_carrier_ok(dev))
1065 			base->duplex = DUPLEX_UNKNOWN;
1066 		else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1067 			base->duplex = DUPLEX_FULL;
1068 		else
1069 			base->duplex = DUPLEX_HALF;
1070 	} else {
1071 		base->autoneg = AUTONEG_DISABLE;
1072 		ethtool_speed =
1073 			bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1074 		base->duplex = DUPLEX_HALF;
1075 		if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1076 			base->duplex = DUPLEX_FULL;
1077 	}
1078 	base->speed = ethtool_speed;
1079 
1080 	base->port = PORT_NONE;
1081 	if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1082 		base->port = PORT_TP;
1083 		ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1084 						     TP);
1085 		ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1086 						     TP);
1087 	} else {
1088 		ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1089 						     FIBRE);
1090 		ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1091 						     FIBRE);
1092 
1093 		if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1094 			base->port = PORT_DA;
1095 		else if (link_info->media_type ==
1096 			 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1097 			base->port = PORT_FIBRE;
1098 	}
1099 	base->phy_address = link_info->phy_addr;
1100 	mutex_unlock(&bp->link_lock);
1101 
1102 	return 0;
1103 }
1104 
1105 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
1106 {
1107 	struct bnxt *bp = netdev_priv(dev);
1108 	struct bnxt_link_info *link_info = &bp->link_info;
1109 	u16 support_spds = link_info->support_speeds;
1110 	u32 fw_speed = 0;
1111 
1112 	switch (ethtool_speed) {
1113 	case SPEED_100:
1114 		if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1115 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1116 		break;
1117 	case SPEED_1000:
1118 		if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1119 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1120 		break;
1121 	case SPEED_2500:
1122 		if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1123 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1124 		break;
1125 	case SPEED_10000:
1126 		if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1127 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1128 		break;
1129 	case SPEED_20000:
1130 		if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1131 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1132 		break;
1133 	case SPEED_25000:
1134 		if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1135 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1136 		break;
1137 	case SPEED_40000:
1138 		if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1139 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1140 		break;
1141 	case SPEED_50000:
1142 		if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1143 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1144 		break;
1145 	case SPEED_100000:
1146 		if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1147 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
1148 		break;
1149 	default:
1150 		netdev_err(dev, "unsupported speed!\n");
1151 		break;
1152 	}
1153 	return fw_speed;
1154 }
1155 
1156 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1157 {
1158 	u16 fw_speed_mask = 0;
1159 
1160 	/* only support autoneg at speed 100, 1000, and 10000 */
1161 	if (advertising & (ADVERTISED_100baseT_Full |
1162 			   ADVERTISED_100baseT_Half)) {
1163 		fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1164 	}
1165 	if (advertising & (ADVERTISED_1000baseT_Full |
1166 			   ADVERTISED_1000baseT_Half)) {
1167 		fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1168 	}
1169 	if (advertising & ADVERTISED_10000baseT_Full)
1170 		fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1171 
1172 	if (advertising & ADVERTISED_40000baseCR4_Full)
1173 		fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1174 
1175 	return fw_speed_mask;
1176 }
1177 
1178 static int bnxt_set_link_ksettings(struct net_device *dev,
1179 			   const struct ethtool_link_ksettings *lk_ksettings)
1180 {
1181 	struct bnxt *bp = netdev_priv(dev);
1182 	struct bnxt_link_info *link_info = &bp->link_info;
1183 	const struct ethtool_link_settings *base = &lk_ksettings->base;
1184 	bool set_pause = false;
1185 	u16 fw_advertising = 0;
1186 	u32 speed;
1187 	int rc = 0;
1188 
1189 	if (!BNXT_SINGLE_PF(bp))
1190 		return -EOPNOTSUPP;
1191 
1192 	mutex_lock(&bp->link_lock);
1193 	if (base->autoneg == AUTONEG_ENABLE) {
1194 		BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1195 					advertising);
1196 		link_info->autoneg |= BNXT_AUTONEG_SPEED;
1197 		if (!fw_advertising)
1198 			link_info->advertising = link_info->support_auto_speeds;
1199 		else
1200 			link_info->advertising = fw_advertising;
1201 		/* any change to autoneg will cause link change, therefore the
1202 		 * driver should put back the original pause setting in autoneg
1203 		 */
1204 		set_pause = true;
1205 	} else {
1206 		u16 fw_speed;
1207 		u8 phy_type = link_info->phy_type;
1208 
1209 		if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET  ||
1210 		    phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1211 		    link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1212 			netdev_err(dev, "10GBase-T devices must autoneg\n");
1213 			rc = -EINVAL;
1214 			goto set_setting_exit;
1215 		}
1216 		if (base->duplex == DUPLEX_HALF) {
1217 			netdev_err(dev, "HALF DUPLEX is not supported!\n");
1218 			rc = -EINVAL;
1219 			goto set_setting_exit;
1220 		}
1221 		speed = base->speed;
1222 		fw_speed = bnxt_get_fw_speed(dev, speed);
1223 		if (!fw_speed) {
1224 			rc = -EINVAL;
1225 			goto set_setting_exit;
1226 		}
1227 		link_info->req_link_speed = fw_speed;
1228 		link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1229 		link_info->autoneg = 0;
1230 		link_info->advertising = 0;
1231 	}
1232 
1233 	if (netif_running(dev))
1234 		rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1235 
1236 set_setting_exit:
1237 	mutex_unlock(&bp->link_lock);
1238 	return rc;
1239 }
1240 
1241 static void bnxt_get_pauseparam(struct net_device *dev,
1242 				struct ethtool_pauseparam *epause)
1243 {
1244 	struct bnxt *bp = netdev_priv(dev);
1245 	struct bnxt_link_info *link_info = &bp->link_info;
1246 
1247 	if (BNXT_VF(bp))
1248 		return;
1249 	epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
1250 	epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1251 	epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1252 }
1253 
1254 static int bnxt_set_pauseparam(struct net_device *dev,
1255 			       struct ethtool_pauseparam *epause)
1256 {
1257 	int rc = 0;
1258 	struct bnxt *bp = netdev_priv(dev);
1259 	struct bnxt_link_info *link_info = &bp->link_info;
1260 
1261 	if (!BNXT_SINGLE_PF(bp))
1262 		return -EOPNOTSUPP;
1263 
1264 	if (epause->autoneg) {
1265 		if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1266 			return -EINVAL;
1267 
1268 		link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1269 		if (bp->hwrm_spec_code >= 0x10201)
1270 			link_info->req_flow_ctrl =
1271 				PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
1272 	} else {
1273 		/* when transition from auto pause to force pause,
1274 		 * force a link change
1275 		 */
1276 		if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1277 			link_info->force_link_chng = true;
1278 		link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
1279 		link_info->req_flow_ctrl = 0;
1280 	}
1281 	if (epause->rx_pause)
1282 		link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
1283 
1284 	if (epause->tx_pause)
1285 		link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1286 
1287 	if (netif_running(dev))
1288 		rc = bnxt_hwrm_set_pause(bp);
1289 	return rc;
1290 }
1291 
1292 static u32 bnxt_get_link(struct net_device *dev)
1293 {
1294 	struct bnxt *bp = netdev_priv(dev);
1295 
1296 	/* TODO: handle MF, VF, driver close case */
1297 	return bp->link_info.link_up;
1298 }
1299 
1300 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1301 				u16 ext, u16 *index, u32 *item_length,
1302 				u32 *data_length);
1303 
1304 static int bnxt_flash_nvram(struct net_device *dev,
1305 			    u16 dir_type,
1306 			    u16 dir_ordinal,
1307 			    u16 dir_ext,
1308 			    u16 dir_attr,
1309 			    const u8 *data,
1310 			    size_t data_len)
1311 {
1312 	struct bnxt *bp = netdev_priv(dev);
1313 	int rc;
1314 	struct hwrm_nvm_write_input req = {0};
1315 	dma_addr_t dma_handle;
1316 	u8 *kmem;
1317 
1318 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1319 
1320 	req.dir_type = cpu_to_le16(dir_type);
1321 	req.dir_ordinal = cpu_to_le16(dir_ordinal);
1322 	req.dir_ext = cpu_to_le16(dir_ext);
1323 	req.dir_attr = cpu_to_le16(dir_attr);
1324 	req.dir_data_length = cpu_to_le32(data_len);
1325 
1326 	kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1327 				  GFP_KERNEL);
1328 	if (!kmem) {
1329 		netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1330 			   (unsigned)data_len);
1331 		return -ENOMEM;
1332 	}
1333 	memcpy(kmem, data, data_len);
1334 	req.host_src_addr = cpu_to_le64(dma_handle);
1335 
1336 	rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1337 	dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1338 
1339 	return rc;
1340 }
1341 
1342 static int bnxt_firmware_reset(struct net_device *dev,
1343 			       u16 dir_type)
1344 {
1345 	struct bnxt *bp = netdev_priv(dev);
1346 	struct hwrm_fw_reset_input req = {0};
1347 
1348 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1349 
1350 	/* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1351 	/*       (e.g. when firmware isn't already running) */
1352 	switch (dir_type) {
1353 	case BNX_DIR_TYPE_CHIMP_PATCH:
1354 	case BNX_DIR_TYPE_BOOTCODE:
1355 	case BNX_DIR_TYPE_BOOTCODE_2:
1356 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1357 		/* Self-reset ChiMP upon next PCIe reset: */
1358 		req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1359 		break;
1360 	case BNX_DIR_TYPE_APE_FW:
1361 	case BNX_DIR_TYPE_APE_PATCH:
1362 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1363 		/* Self-reset APE upon next PCIe reset: */
1364 		req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1365 		break;
1366 	case BNX_DIR_TYPE_KONG_FW:
1367 	case BNX_DIR_TYPE_KONG_PATCH:
1368 		req.embedded_proc_type =
1369 			FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1370 		break;
1371 	case BNX_DIR_TYPE_BONO_FW:
1372 	case BNX_DIR_TYPE_BONO_PATCH:
1373 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1374 		break;
1375 	case BNXT_FW_RESET_CHIP:
1376 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
1377 		req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
1378 		break;
1379 	default:
1380 		return -EINVAL;
1381 	}
1382 
1383 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1384 }
1385 
1386 static int bnxt_flash_firmware(struct net_device *dev,
1387 			       u16 dir_type,
1388 			       const u8 *fw_data,
1389 			       size_t fw_size)
1390 {
1391 	int	rc = 0;
1392 	u16	code_type;
1393 	u32	stored_crc;
1394 	u32	calculated_crc;
1395 	struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1396 
1397 	switch (dir_type) {
1398 	case BNX_DIR_TYPE_BOOTCODE:
1399 	case BNX_DIR_TYPE_BOOTCODE_2:
1400 		code_type = CODE_BOOT;
1401 		break;
1402 	case BNX_DIR_TYPE_CHIMP_PATCH:
1403 		code_type = CODE_CHIMP_PATCH;
1404 		break;
1405 	case BNX_DIR_TYPE_APE_FW:
1406 		code_type = CODE_MCTP_PASSTHRU;
1407 		break;
1408 	case BNX_DIR_TYPE_APE_PATCH:
1409 		code_type = CODE_APE_PATCH;
1410 		break;
1411 	case BNX_DIR_TYPE_KONG_FW:
1412 		code_type = CODE_KONG_FW;
1413 		break;
1414 	case BNX_DIR_TYPE_KONG_PATCH:
1415 		code_type = CODE_KONG_PATCH;
1416 		break;
1417 	case BNX_DIR_TYPE_BONO_FW:
1418 		code_type = CODE_BONO_FW;
1419 		break;
1420 	case BNX_DIR_TYPE_BONO_PATCH:
1421 		code_type = CODE_BONO_PATCH;
1422 		break;
1423 	default:
1424 		netdev_err(dev, "Unsupported directory entry type: %u\n",
1425 			   dir_type);
1426 		return -EINVAL;
1427 	}
1428 	if (fw_size < sizeof(struct bnxt_fw_header)) {
1429 		netdev_err(dev, "Invalid firmware file size: %u\n",
1430 			   (unsigned int)fw_size);
1431 		return -EINVAL;
1432 	}
1433 	if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1434 		netdev_err(dev, "Invalid firmware signature: %08X\n",
1435 			   le32_to_cpu(header->signature));
1436 		return -EINVAL;
1437 	}
1438 	if (header->code_type != code_type) {
1439 		netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1440 			   code_type, header->code_type);
1441 		return -EINVAL;
1442 	}
1443 	if (header->device != DEVICE_CUMULUS_FAMILY) {
1444 		netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1445 			   DEVICE_CUMULUS_FAMILY, header->device);
1446 		return -EINVAL;
1447 	}
1448 	/* Confirm the CRC32 checksum of the file: */
1449 	stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1450 					     sizeof(stored_crc)));
1451 	calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1452 	if (calculated_crc != stored_crc) {
1453 		netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1454 			   (unsigned long)stored_crc,
1455 			   (unsigned long)calculated_crc);
1456 		return -EINVAL;
1457 	}
1458 	rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1459 			      0, 0, fw_data, fw_size);
1460 	if (rc == 0)	/* Firmware update successful */
1461 		rc = bnxt_firmware_reset(dev, dir_type);
1462 
1463 	return rc;
1464 }
1465 
1466 static int bnxt_flash_microcode(struct net_device *dev,
1467 				u16 dir_type,
1468 				const u8 *fw_data,
1469 				size_t fw_size)
1470 {
1471 	struct bnxt_ucode_trailer *trailer;
1472 	u32 calculated_crc;
1473 	u32 stored_crc;
1474 	int rc = 0;
1475 
1476 	if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1477 		netdev_err(dev, "Invalid microcode file size: %u\n",
1478 			   (unsigned int)fw_size);
1479 		return -EINVAL;
1480 	}
1481 	trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1482 						sizeof(*trailer)));
1483 	if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1484 		netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1485 			   le32_to_cpu(trailer->sig));
1486 		return -EINVAL;
1487 	}
1488 	if (le16_to_cpu(trailer->dir_type) != dir_type) {
1489 		netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1490 			   dir_type, le16_to_cpu(trailer->dir_type));
1491 		return -EINVAL;
1492 	}
1493 	if (le16_to_cpu(trailer->trailer_length) <
1494 		sizeof(struct bnxt_ucode_trailer)) {
1495 		netdev_err(dev, "Invalid microcode trailer length: %d\n",
1496 			   le16_to_cpu(trailer->trailer_length));
1497 		return -EINVAL;
1498 	}
1499 
1500 	/* Confirm the CRC32 checksum of the file: */
1501 	stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1502 					     sizeof(stored_crc)));
1503 	calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1504 	if (calculated_crc != stored_crc) {
1505 		netdev_err(dev,
1506 			   "CRC32 (%08lX) does not match calculated: %08lX\n",
1507 			   (unsigned long)stored_crc,
1508 			   (unsigned long)calculated_crc);
1509 		return -EINVAL;
1510 	}
1511 	rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1512 			      0, 0, fw_data, fw_size);
1513 
1514 	return rc;
1515 }
1516 
1517 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1518 {
1519 	switch (dir_type) {
1520 	case BNX_DIR_TYPE_CHIMP_PATCH:
1521 	case BNX_DIR_TYPE_BOOTCODE:
1522 	case BNX_DIR_TYPE_BOOTCODE_2:
1523 	case BNX_DIR_TYPE_APE_FW:
1524 	case BNX_DIR_TYPE_APE_PATCH:
1525 	case BNX_DIR_TYPE_KONG_FW:
1526 	case BNX_DIR_TYPE_KONG_PATCH:
1527 	case BNX_DIR_TYPE_BONO_FW:
1528 	case BNX_DIR_TYPE_BONO_PATCH:
1529 		return true;
1530 	}
1531 
1532 	return false;
1533 }
1534 
1535 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
1536 {
1537 	switch (dir_type) {
1538 	case BNX_DIR_TYPE_AVS:
1539 	case BNX_DIR_TYPE_EXP_ROM_MBA:
1540 	case BNX_DIR_TYPE_PCIE:
1541 	case BNX_DIR_TYPE_TSCF_UCODE:
1542 	case BNX_DIR_TYPE_EXT_PHY:
1543 	case BNX_DIR_TYPE_CCM:
1544 	case BNX_DIR_TYPE_ISCSI_BOOT:
1545 	case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1546 	case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1547 		return true;
1548 	}
1549 
1550 	return false;
1551 }
1552 
1553 static bool bnxt_dir_type_is_executable(u16 dir_type)
1554 {
1555 	return bnxt_dir_type_is_ape_bin_format(dir_type) ||
1556 		bnxt_dir_type_is_other_exec_format(dir_type);
1557 }
1558 
1559 static int bnxt_flash_firmware_from_file(struct net_device *dev,
1560 					 u16 dir_type,
1561 					 const char *filename)
1562 {
1563 	const struct firmware  *fw;
1564 	int			rc;
1565 
1566 	rc = request_firmware(&fw, filename, &dev->dev);
1567 	if (rc != 0) {
1568 		netdev_err(dev, "Error %d requesting firmware file: %s\n",
1569 			   rc, filename);
1570 		return rc;
1571 	}
1572 	if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1573 		rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
1574 	else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1575 		rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
1576 	else
1577 		rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1578 				      0, 0, fw->data, fw->size);
1579 	release_firmware(fw);
1580 	return rc;
1581 }
1582 
1583 static int bnxt_flash_package_from_file(struct net_device *dev,
1584 					char *filename, u32 install_type)
1585 {
1586 	struct bnxt *bp = netdev_priv(dev);
1587 	struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1588 	struct hwrm_nvm_install_update_input install = {0};
1589 	const struct firmware *fw;
1590 	u32 item_len;
1591 	u16 index;
1592 	int rc;
1593 
1594 	bnxt_hwrm_fw_set_time(bp);
1595 
1596 	if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1597 				 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1598 				 &index, &item_len, NULL) != 0) {
1599 		netdev_err(dev, "PKG update area not created in nvram\n");
1600 		return -ENOBUFS;
1601 	}
1602 
1603 	rc = request_firmware(&fw, filename, &dev->dev);
1604 	if (rc != 0) {
1605 		netdev_err(dev, "PKG error %d requesting file: %s\n",
1606 			   rc, filename);
1607 		return rc;
1608 	}
1609 
1610 	if (fw->size > item_len) {
1611 		netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1612 			   (unsigned long)fw->size);
1613 		rc = -EFBIG;
1614 	} else {
1615 		dma_addr_t dma_handle;
1616 		u8 *kmem;
1617 		struct hwrm_nvm_modify_input modify = {0};
1618 
1619 		bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1620 
1621 		modify.dir_idx = cpu_to_le16(index);
1622 		modify.len = cpu_to_le32(fw->size);
1623 
1624 		kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1625 					  &dma_handle, GFP_KERNEL);
1626 		if (!kmem) {
1627 			netdev_err(dev,
1628 				   "dma_alloc_coherent failure, length = %u\n",
1629 				   (unsigned int)fw->size);
1630 			rc = -ENOMEM;
1631 		} else {
1632 			memcpy(kmem, fw->data, fw->size);
1633 			modify.host_src_addr = cpu_to_le64(dma_handle);
1634 
1635 			rc = hwrm_send_message(bp, &modify, sizeof(modify),
1636 					       FLASH_PACKAGE_TIMEOUT);
1637 			dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1638 					  dma_handle);
1639 		}
1640 	}
1641 	release_firmware(fw);
1642 	if (rc)
1643 		return rc;
1644 
1645 	if ((install_type & 0xffff) == 0)
1646 		install_type >>= 16;
1647 	bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
1648 	install.install_type = cpu_to_le32(install_type);
1649 
1650 	mutex_lock(&bp->hwrm_cmd_lock);
1651 	rc = _hwrm_send_message(bp, &install, sizeof(install),
1652 				INSTALL_PACKAGE_TIMEOUT);
1653 	if (rc) {
1654 		rc = -EOPNOTSUPP;
1655 		goto flash_pkg_exit;
1656 	}
1657 
1658 	if (resp->error_code) {
1659 		u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
1660 
1661 		if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
1662 			install.flags |= cpu_to_le16(
1663 			       NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
1664 			rc = _hwrm_send_message(bp, &install, sizeof(install),
1665 						INSTALL_PACKAGE_TIMEOUT);
1666 			if (rc) {
1667 				rc = -EOPNOTSUPP;
1668 				goto flash_pkg_exit;
1669 			}
1670 		}
1671 	}
1672 
1673 	if (resp->result) {
1674 		netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
1675 			   (s8)resp->result, (int)resp->problem_item);
1676 		rc = -ENOPKG;
1677 	}
1678 flash_pkg_exit:
1679 	mutex_unlock(&bp->hwrm_cmd_lock);
1680 	return rc;
1681 }
1682 
1683 static int bnxt_flash_device(struct net_device *dev,
1684 			     struct ethtool_flash *flash)
1685 {
1686 	if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
1687 		netdev_err(dev, "flashdev not supported from a virtual function\n");
1688 		return -EINVAL;
1689 	}
1690 
1691 	if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
1692 	    flash->region > 0xffff)
1693 		return bnxt_flash_package_from_file(dev, flash->data,
1694 						    flash->region);
1695 
1696 	return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
1697 }
1698 
1699 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
1700 {
1701 	struct bnxt *bp = netdev_priv(dev);
1702 	int rc;
1703 	struct hwrm_nvm_get_dir_info_input req = {0};
1704 	struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
1705 
1706 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
1707 
1708 	mutex_lock(&bp->hwrm_cmd_lock);
1709 	rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1710 	if (!rc) {
1711 		*entries = le32_to_cpu(output->entries);
1712 		*length = le32_to_cpu(output->entry_length);
1713 	}
1714 	mutex_unlock(&bp->hwrm_cmd_lock);
1715 	return rc;
1716 }
1717 
1718 static int bnxt_get_eeprom_len(struct net_device *dev)
1719 {
1720 	/* The -1 return value allows the entire 32-bit range of offsets to be
1721 	 * passed via the ethtool command-line utility.
1722 	 */
1723 	return -1;
1724 }
1725 
1726 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
1727 {
1728 	struct bnxt *bp = netdev_priv(dev);
1729 	int rc;
1730 	u32 dir_entries;
1731 	u32 entry_length;
1732 	u8 *buf;
1733 	size_t buflen;
1734 	dma_addr_t dma_handle;
1735 	struct hwrm_nvm_get_dir_entries_input req = {0};
1736 
1737 	rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
1738 	if (rc != 0)
1739 		return rc;
1740 
1741 	/* Insert 2 bytes of directory info (count and size of entries) */
1742 	if (len < 2)
1743 		return -EINVAL;
1744 
1745 	*data++ = dir_entries;
1746 	*data++ = entry_length;
1747 	len -= 2;
1748 	memset(data, 0xff, len);
1749 
1750 	buflen = dir_entries * entry_length;
1751 	buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
1752 				 GFP_KERNEL);
1753 	if (!buf) {
1754 		netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1755 			   (unsigned)buflen);
1756 		return -ENOMEM;
1757 	}
1758 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
1759 	req.host_dest_addr = cpu_to_le64(dma_handle);
1760 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1761 	if (rc == 0)
1762 		memcpy(data, buf, len > buflen ? buflen : len);
1763 	dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
1764 	return rc;
1765 }
1766 
1767 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
1768 			       u32 length, u8 *data)
1769 {
1770 	struct bnxt *bp = netdev_priv(dev);
1771 	int rc;
1772 	u8 *buf;
1773 	dma_addr_t dma_handle;
1774 	struct hwrm_nvm_read_input req = {0};
1775 
1776 	if (!length)
1777 		return -EINVAL;
1778 
1779 	buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
1780 				 GFP_KERNEL);
1781 	if (!buf) {
1782 		netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1783 			   (unsigned)length);
1784 		return -ENOMEM;
1785 	}
1786 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
1787 	req.host_dest_addr = cpu_to_le64(dma_handle);
1788 	req.dir_idx = cpu_to_le16(index);
1789 	req.offset = cpu_to_le32(offset);
1790 	req.len = cpu_to_le32(length);
1791 
1792 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1793 	if (rc == 0)
1794 		memcpy(data, buf, length);
1795 	dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
1796 	return rc;
1797 }
1798 
1799 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1800 				u16 ext, u16 *index, u32 *item_length,
1801 				u32 *data_length)
1802 {
1803 	struct bnxt *bp = netdev_priv(dev);
1804 	int rc;
1805 	struct hwrm_nvm_find_dir_entry_input req = {0};
1806 	struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
1807 
1808 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
1809 	req.enables = 0;
1810 	req.dir_idx = 0;
1811 	req.dir_type = cpu_to_le16(type);
1812 	req.dir_ordinal = cpu_to_le16(ordinal);
1813 	req.dir_ext = cpu_to_le16(ext);
1814 	req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
1815 	mutex_lock(&bp->hwrm_cmd_lock);
1816 	rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1817 	if (rc == 0) {
1818 		if (index)
1819 			*index = le16_to_cpu(output->dir_idx);
1820 		if (item_length)
1821 			*item_length = le32_to_cpu(output->dir_item_length);
1822 		if (data_length)
1823 			*data_length = le32_to_cpu(output->dir_data_length);
1824 	}
1825 	mutex_unlock(&bp->hwrm_cmd_lock);
1826 	return rc;
1827 }
1828 
1829 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
1830 {
1831 	char	*retval = NULL;
1832 	char	*p;
1833 	char	*value;
1834 	int	field = 0;
1835 
1836 	if (datalen < 1)
1837 		return NULL;
1838 	/* null-terminate the log data (removing last '\n'): */
1839 	data[datalen - 1] = 0;
1840 	for (p = data; *p != 0; p++) {
1841 		field = 0;
1842 		retval = NULL;
1843 		while (*p != 0 && *p != '\n') {
1844 			value = p;
1845 			while (*p != 0 && *p != '\t' && *p != '\n')
1846 				p++;
1847 			if (field == desired_field)
1848 				retval = value;
1849 			if (*p != '\t')
1850 				break;
1851 			*p = 0;
1852 			field++;
1853 			p++;
1854 		}
1855 		if (*p == 0)
1856 			break;
1857 		*p = 0;
1858 	}
1859 	return retval;
1860 }
1861 
1862 static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
1863 {
1864 	u16 index = 0;
1865 	u32 datalen;
1866 
1867 	if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
1868 				 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1869 				 &index, NULL, &datalen) != 0)
1870 		return NULL;
1871 
1872 	memset(buf, 0, buflen);
1873 	if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
1874 		return NULL;
1875 
1876 	return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
1877 		datalen);
1878 }
1879 
1880 static int bnxt_get_eeprom(struct net_device *dev,
1881 			   struct ethtool_eeprom *eeprom,
1882 			   u8 *data)
1883 {
1884 	u32 index;
1885 	u32 offset;
1886 
1887 	if (eeprom->offset == 0) /* special offset value to get directory */
1888 		return bnxt_get_nvram_directory(dev, eeprom->len, data);
1889 
1890 	index = eeprom->offset >> 24;
1891 	offset = eeprom->offset & 0xffffff;
1892 
1893 	if (index == 0) {
1894 		netdev_err(dev, "unsupported index value: %d\n", index);
1895 		return -EINVAL;
1896 	}
1897 
1898 	return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
1899 }
1900 
1901 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
1902 {
1903 	struct bnxt *bp = netdev_priv(dev);
1904 	struct hwrm_nvm_erase_dir_entry_input req = {0};
1905 
1906 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
1907 	req.dir_idx = cpu_to_le16(index);
1908 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1909 }
1910 
1911 static int bnxt_set_eeprom(struct net_device *dev,
1912 			   struct ethtool_eeprom *eeprom,
1913 			   u8 *data)
1914 {
1915 	struct bnxt *bp = netdev_priv(dev);
1916 	u8 index, dir_op;
1917 	u16 type, ext, ordinal, attr;
1918 
1919 	if (!BNXT_PF(bp)) {
1920 		netdev_err(dev, "NVM write not supported from a virtual function\n");
1921 		return -EINVAL;
1922 	}
1923 
1924 	type = eeprom->magic >> 16;
1925 
1926 	if (type == 0xffff) { /* special value for directory operations */
1927 		index = eeprom->magic & 0xff;
1928 		dir_op = eeprom->magic >> 8;
1929 		if (index == 0)
1930 			return -EINVAL;
1931 		switch (dir_op) {
1932 		case 0x0e: /* erase */
1933 			if (eeprom->offset != ~eeprom->magic)
1934 				return -EINVAL;
1935 			return bnxt_erase_nvram_directory(dev, index - 1);
1936 		default:
1937 			return -EINVAL;
1938 		}
1939 	}
1940 
1941 	/* Create or re-write an NVM item: */
1942 	if (bnxt_dir_type_is_executable(type) == true)
1943 		return -EOPNOTSUPP;
1944 	ext = eeprom->magic & 0xffff;
1945 	ordinal = eeprom->offset >> 16;
1946 	attr = eeprom->offset & 0xffff;
1947 
1948 	return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
1949 				eeprom->len);
1950 }
1951 
1952 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1953 {
1954 	struct bnxt *bp = netdev_priv(dev);
1955 	struct ethtool_eee *eee = &bp->eee;
1956 	struct bnxt_link_info *link_info = &bp->link_info;
1957 	u32 advertising =
1958 		 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
1959 	int rc = 0;
1960 
1961 	if (!BNXT_SINGLE_PF(bp))
1962 		return -EOPNOTSUPP;
1963 
1964 	if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1965 		return -EOPNOTSUPP;
1966 
1967 	if (!edata->eee_enabled)
1968 		goto eee_ok;
1969 
1970 	if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
1971 		netdev_warn(dev, "EEE requires autoneg\n");
1972 		return -EINVAL;
1973 	}
1974 	if (edata->tx_lpi_enabled) {
1975 		if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
1976 				       edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
1977 			netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
1978 				    bp->lpi_tmr_lo, bp->lpi_tmr_hi);
1979 			return -EINVAL;
1980 		} else if (!bp->lpi_tmr_hi) {
1981 			edata->tx_lpi_timer = eee->tx_lpi_timer;
1982 		}
1983 	}
1984 	if (!edata->advertised) {
1985 		edata->advertised = advertising & eee->supported;
1986 	} else if (edata->advertised & ~advertising) {
1987 		netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
1988 			    edata->advertised, advertising);
1989 		return -EINVAL;
1990 	}
1991 
1992 	eee->advertised = edata->advertised;
1993 	eee->tx_lpi_enabled = edata->tx_lpi_enabled;
1994 	eee->tx_lpi_timer = edata->tx_lpi_timer;
1995 eee_ok:
1996 	eee->eee_enabled = edata->eee_enabled;
1997 
1998 	if (netif_running(dev))
1999 		rc = bnxt_hwrm_set_link_setting(bp, false, true);
2000 
2001 	return rc;
2002 }
2003 
2004 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2005 {
2006 	struct bnxt *bp = netdev_priv(dev);
2007 
2008 	if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2009 		return -EOPNOTSUPP;
2010 
2011 	*edata = bp->eee;
2012 	if (!bp->eee.eee_enabled) {
2013 		/* Preserve tx_lpi_timer so that the last value will be used
2014 		 * by default when it is re-enabled.
2015 		 */
2016 		edata->advertised = 0;
2017 		edata->tx_lpi_enabled = 0;
2018 	}
2019 
2020 	if (!bp->eee.eee_active)
2021 		edata->lp_advertised = 0;
2022 
2023 	return 0;
2024 }
2025 
2026 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2027 					    u16 page_number, u16 start_addr,
2028 					    u16 data_length, u8 *buf)
2029 {
2030 	struct hwrm_port_phy_i2c_read_input req = {0};
2031 	struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2032 	int rc, byte_offset = 0;
2033 
2034 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2035 	req.i2c_slave_addr = i2c_addr;
2036 	req.page_number = cpu_to_le16(page_number);
2037 	req.port_id = cpu_to_le16(bp->pf.port_id);
2038 	do {
2039 		u16 xfer_size;
2040 
2041 		xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2042 		data_length -= xfer_size;
2043 		req.page_offset = cpu_to_le16(start_addr + byte_offset);
2044 		req.data_length = xfer_size;
2045 		req.enables = cpu_to_le32(start_addr + byte_offset ?
2046 				 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2047 		mutex_lock(&bp->hwrm_cmd_lock);
2048 		rc = _hwrm_send_message(bp, &req, sizeof(req),
2049 					HWRM_CMD_TIMEOUT);
2050 		if (!rc)
2051 			memcpy(buf + byte_offset, output->data, xfer_size);
2052 		mutex_unlock(&bp->hwrm_cmd_lock);
2053 		byte_offset += xfer_size;
2054 	} while (!rc && data_length > 0);
2055 
2056 	return rc;
2057 }
2058 
2059 static int bnxt_get_module_info(struct net_device *dev,
2060 				struct ethtool_modinfo *modinfo)
2061 {
2062 	struct bnxt *bp = netdev_priv(dev);
2063 	struct hwrm_port_phy_i2c_read_input req = {0};
2064 	struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2065 	int rc;
2066 
2067 	/* No point in going further if phy status indicates
2068 	 * module is not inserted or if it is powered down or
2069 	 * if it is of type 10GBase-T
2070 	 */
2071 	if (bp->link_info.module_status >
2072 		PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2073 		return -EOPNOTSUPP;
2074 
2075 	/* This feature is not supported in older firmware versions */
2076 	if (bp->hwrm_spec_code < 0x10202)
2077 		return -EOPNOTSUPP;
2078 
2079 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2080 	req.i2c_slave_addr = I2C_DEV_ADDR_A0;
2081 	req.page_number = 0;
2082 	req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
2083 	req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
2084 	req.port_id = cpu_to_le16(bp->pf.port_id);
2085 	mutex_lock(&bp->hwrm_cmd_lock);
2086 	rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2087 	if (!rc) {
2088 		u32 module_id = le32_to_cpu(output->data[0]);
2089 
2090 		switch (module_id) {
2091 		case SFF_MODULE_ID_SFP:
2092 			modinfo->type = ETH_MODULE_SFF_8472;
2093 			modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2094 			break;
2095 		case SFF_MODULE_ID_QSFP:
2096 		case SFF_MODULE_ID_QSFP_PLUS:
2097 			modinfo->type = ETH_MODULE_SFF_8436;
2098 			modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2099 			break;
2100 		case SFF_MODULE_ID_QSFP28:
2101 			modinfo->type = ETH_MODULE_SFF_8636;
2102 			modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2103 			break;
2104 		default:
2105 			rc = -EOPNOTSUPP;
2106 			break;
2107 		}
2108 	}
2109 	mutex_unlock(&bp->hwrm_cmd_lock);
2110 	return rc;
2111 }
2112 
2113 static int bnxt_get_module_eeprom(struct net_device *dev,
2114 				  struct ethtool_eeprom *eeprom,
2115 				  u8 *data)
2116 {
2117 	struct bnxt *bp = netdev_priv(dev);
2118 	u16  start = eeprom->offset, length = eeprom->len;
2119 	int rc = 0;
2120 
2121 	memset(data, 0, eeprom->len);
2122 
2123 	/* Read A0 portion of the EEPROM */
2124 	if (start < ETH_MODULE_SFF_8436_LEN) {
2125 		if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2126 			length = ETH_MODULE_SFF_8436_LEN - start;
2127 		rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2128 						      start, length, data);
2129 		if (rc)
2130 			return rc;
2131 		start += length;
2132 		data += length;
2133 		length = eeprom->len - length;
2134 	}
2135 
2136 	/* Read A2 portion of the EEPROM */
2137 	if (length) {
2138 		start -= ETH_MODULE_SFF_8436_LEN;
2139 		rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
2140 						      start, length, data);
2141 	}
2142 	return rc;
2143 }
2144 
2145 static int bnxt_nway_reset(struct net_device *dev)
2146 {
2147 	int rc = 0;
2148 
2149 	struct bnxt *bp = netdev_priv(dev);
2150 	struct bnxt_link_info *link_info = &bp->link_info;
2151 
2152 	if (!BNXT_SINGLE_PF(bp))
2153 		return -EOPNOTSUPP;
2154 
2155 	if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2156 		return -EINVAL;
2157 
2158 	if (netif_running(dev))
2159 		rc = bnxt_hwrm_set_link_setting(bp, true, false);
2160 
2161 	return rc;
2162 }
2163 
2164 static int bnxt_set_phys_id(struct net_device *dev,
2165 			    enum ethtool_phys_id_state state)
2166 {
2167 	struct hwrm_port_led_cfg_input req = {0};
2168 	struct bnxt *bp = netdev_priv(dev);
2169 	struct bnxt_pf_info *pf = &bp->pf;
2170 	struct bnxt_led_cfg *led_cfg;
2171 	u8 led_state;
2172 	__le16 duration;
2173 	int i, rc;
2174 
2175 	if (!bp->num_leds || BNXT_VF(bp))
2176 		return -EOPNOTSUPP;
2177 
2178 	if (state == ETHTOOL_ID_ACTIVE) {
2179 		led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2180 		duration = cpu_to_le16(500);
2181 	} else if (state == ETHTOOL_ID_INACTIVE) {
2182 		led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2183 		duration = cpu_to_le16(0);
2184 	} else {
2185 		return -EINVAL;
2186 	}
2187 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2188 	req.port_id = cpu_to_le16(pf->port_id);
2189 	req.num_leds = bp->num_leds;
2190 	led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2191 	for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2192 		req.enables |= BNXT_LED_DFLT_ENABLES(i);
2193 		led_cfg->led_id = bp->leds[i].led_id;
2194 		led_cfg->led_state = led_state;
2195 		led_cfg->led_blink_on = duration;
2196 		led_cfg->led_blink_off = duration;
2197 		led_cfg->led_group_id = bp->leds[i].led_group_id;
2198 	}
2199 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2200 	if (rc)
2201 		rc = -EIO;
2202 	return rc;
2203 }
2204 
2205 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2206 {
2207 	struct hwrm_selftest_irq_input req = {0};
2208 
2209 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2210 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2211 }
2212 
2213 static int bnxt_test_irq(struct bnxt *bp)
2214 {
2215 	int i;
2216 
2217 	for (i = 0; i < bp->cp_nr_rings; i++) {
2218 		u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2219 		int rc;
2220 
2221 		rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2222 		if (rc)
2223 			return rc;
2224 	}
2225 	return 0;
2226 }
2227 
2228 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2229 {
2230 	struct hwrm_port_mac_cfg_input req = {0};
2231 
2232 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2233 
2234 	req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2235 	if (enable)
2236 		req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2237 	else
2238 		req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2239 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2240 }
2241 
2242 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2243 				    struct hwrm_port_phy_cfg_input *req)
2244 {
2245 	struct bnxt_link_info *link_info = &bp->link_info;
2246 	u16 fw_advertising = link_info->advertising;
2247 	u16 fw_speed;
2248 	int rc;
2249 
2250 	if (!link_info->autoneg)
2251 		return 0;
2252 
2253 	fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2254 	if (netif_carrier_ok(bp->dev))
2255 		fw_speed = bp->link_info.link_speed;
2256 	else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2257 		fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2258 	else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2259 		fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2260 	else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2261 		fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2262 	else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2263 		fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2264 
2265 	req->force_link_speed = cpu_to_le16(fw_speed);
2266 	req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2267 				  PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2268 	rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2269 	req->flags = 0;
2270 	req->force_link_speed = cpu_to_le16(0);
2271 	return rc;
2272 }
2273 
2274 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
2275 {
2276 	struct hwrm_port_phy_cfg_input req = {0};
2277 
2278 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2279 
2280 	if (enable) {
2281 		bnxt_disable_an_for_lpbk(bp, &req);
2282 		req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2283 	} else {
2284 		req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2285 	}
2286 	req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2287 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2288 }
2289 
2290 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
2291 			    u32 raw_cons, int pkt_size)
2292 {
2293 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
2294 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
2295 	struct bnxt_sw_rx_bd *rx_buf;
2296 	struct rx_cmp *rxcmp;
2297 	u16 cp_cons, cons;
2298 	u8 *data;
2299 	u32 len;
2300 	int i;
2301 
2302 	cp_cons = RING_CMP(raw_cons);
2303 	rxcmp = (struct rx_cmp *)
2304 		&cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2305 	cons = rxcmp->rx_cmp_opaque;
2306 	rx_buf = &rxr->rx_buf_ring[cons];
2307 	data = rx_buf->data_ptr;
2308 	len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2309 	if (len != pkt_size)
2310 		return -EIO;
2311 	i = ETH_ALEN;
2312 	if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2313 		return -EIO;
2314 	i += ETH_ALEN;
2315 	for (  ; i < pkt_size; i++) {
2316 		if (data[i] != (u8)(i & 0xff))
2317 			return -EIO;
2318 	}
2319 	return 0;
2320 }
2321 
2322 static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
2323 {
2324 	struct bnxt_napi *bnapi = bp->bnapi[0];
2325 	struct bnxt_cp_ring_info *cpr;
2326 	struct tx_cmp *txcmp;
2327 	int rc = -EIO;
2328 	u32 raw_cons;
2329 	u32 cons;
2330 	int i;
2331 
2332 	cpr = &bnapi->cp_ring;
2333 	raw_cons = cpr->cp_raw_cons;
2334 	for (i = 0; i < 200; i++) {
2335 		cons = RING_CMP(raw_cons);
2336 		txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2337 
2338 		if (!TX_CMP_VALID(txcmp, raw_cons)) {
2339 			udelay(5);
2340 			continue;
2341 		}
2342 
2343 		/* The valid test of the entry must be done first before
2344 		 * reading any further.
2345 		 */
2346 		dma_rmb();
2347 		if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2348 			rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
2349 			raw_cons = NEXT_RAW_CMP(raw_cons);
2350 			raw_cons = NEXT_RAW_CMP(raw_cons);
2351 			break;
2352 		}
2353 		raw_cons = NEXT_RAW_CMP(raw_cons);
2354 	}
2355 	cpr->cp_raw_cons = raw_cons;
2356 	return rc;
2357 }
2358 
2359 static int bnxt_run_loopback(struct bnxt *bp)
2360 {
2361 	struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2362 	int pkt_size, i = 0;
2363 	struct sk_buff *skb;
2364 	dma_addr_t map;
2365 	u8 *data;
2366 	int rc;
2367 
2368 	pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2369 	skb = netdev_alloc_skb(bp->dev, pkt_size);
2370 	if (!skb)
2371 		return -ENOMEM;
2372 	data = skb_put(skb, pkt_size);
2373 	eth_broadcast_addr(data);
2374 	i += ETH_ALEN;
2375 	ether_addr_copy(&data[i], bp->dev->dev_addr);
2376 	i += ETH_ALEN;
2377 	for ( ; i < pkt_size; i++)
2378 		data[i] = (u8)(i & 0xff);
2379 
2380 	map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
2381 			     PCI_DMA_TODEVICE);
2382 	if (dma_mapping_error(&bp->pdev->dev, map)) {
2383 		dev_kfree_skb(skb);
2384 		return -EIO;
2385 	}
2386 	bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
2387 
2388 	/* Sync BD data before updating doorbell */
2389 	wmb();
2390 
2391 	bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod);
2392 	rc = bnxt_poll_loopback(bp, pkt_size);
2393 
2394 	dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
2395 	dev_kfree_skb(skb);
2396 	return rc;
2397 }
2398 
2399 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
2400 {
2401 	struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
2402 	struct hwrm_selftest_exec_input req = {0};
2403 	int rc;
2404 
2405 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
2406 	mutex_lock(&bp->hwrm_cmd_lock);
2407 	resp->test_success = 0;
2408 	req.flags = test_mask;
2409 	rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
2410 	*test_results = resp->test_success;
2411 	mutex_unlock(&bp->hwrm_cmd_lock);
2412 	return rc;
2413 }
2414 
2415 #define BNXT_DRV_TESTS			3
2416 #define BNXT_MACLPBK_TEST_IDX		(bp->num_tests - BNXT_DRV_TESTS)
2417 #define BNXT_PHYLPBK_TEST_IDX		(BNXT_MACLPBK_TEST_IDX + 1)
2418 #define BNXT_IRQ_TEST_IDX		(BNXT_MACLPBK_TEST_IDX + 2)
2419 
2420 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
2421 			   u64 *buf)
2422 {
2423 	struct bnxt *bp = netdev_priv(dev);
2424 	bool offline = false;
2425 	u8 test_results = 0;
2426 	u8 test_mask = 0;
2427 	int rc, i;
2428 
2429 	if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
2430 		return;
2431 	memset(buf, 0, sizeof(u64) * bp->num_tests);
2432 	if (!netif_running(dev)) {
2433 		etest->flags |= ETH_TEST_FL_FAILED;
2434 		return;
2435 	}
2436 
2437 	if (etest->flags & ETH_TEST_FL_OFFLINE) {
2438 		if (bp->pf.active_vfs) {
2439 			etest->flags |= ETH_TEST_FL_FAILED;
2440 			netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
2441 			return;
2442 		}
2443 		offline = true;
2444 	}
2445 
2446 	for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2447 		u8 bit_val = 1 << i;
2448 
2449 		if (!(bp->test_info->offline_mask & bit_val))
2450 			test_mask |= bit_val;
2451 		else if (offline)
2452 			test_mask |= bit_val;
2453 	}
2454 	if (!offline) {
2455 		bnxt_run_fw_tests(bp, test_mask, &test_results);
2456 	} else {
2457 		rc = bnxt_close_nic(bp, false, false);
2458 		if (rc)
2459 			return;
2460 		bnxt_run_fw_tests(bp, test_mask, &test_results);
2461 
2462 		buf[BNXT_MACLPBK_TEST_IDX] = 1;
2463 		bnxt_hwrm_mac_loopback(bp, true);
2464 		msleep(250);
2465 		rc = bnxt_half_open_nic(bp);
2466 		if (rc) {
2467 			bnxt_hwrm_mac_loopback(bp, false);
2468 			etest->flags |= ETH_TEST_FL_FAILED;
2469 			return;
2470 		}
2471 		if (bnxt_run_loopback(bp))
2472 			etest->flags |= ETH_TEST_FL_FAILED;
2473 		else
2474 			buf[BNXT_MACLPBK_TEST_IDX] = 0;
2475 
2476 		bnxt_hwrm_mac_loopback(bp, false);
2477 		bnxt_hwrm_phy_loopback(bp, true);
2478 		msleep(1000);
2479 		if (bnxt_run_loopback(bp)) {
2480 			buf[BNXT_PHYLPBK_TEST_IDX] = 1;
2481 			etest->flags |= ETH_TEST_FL_FAILED;
2482 		}
2483 		bnxt_hwrm_phy_loopback(bp, false);
2484 		bnxt_half_close_nic(bp);
2485 		bnxt_open_nic(bp, false, true);
2486 	}
2487 	if (bnxt_test_irq(bp)) {
2488 		buf[BNXT_IRQ_TEST_IDX] = 1;
2489 		etest->flags |= ETH_TEST_FL_FAILED;
2490 	}
2491 	for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2492 		u8 bit_val = 1 << i;
2493 
2494 		if ((test_mask & bit_val) && !(test_results & bit_val)) {
2495 			buf[i] = 1;
2496 			etest->flags |= ETH_TEST_FL_FAILED;
2497 		}
2498 	}
2499 }
2500 
2501 static int bnxt_reset(struct net_device *dev, u32 *flags)
2502 {
2503 	struct bnxt *bp = netdev_priv(dev);
2504 	int rc = 0;
2505 
2506 	if (!BNXT_PF(bp)) {
2507 		netdev_err(dev, "Reset is not supported from a VF\n");
2508 		return -EOPNOTSUPP;
2509 	}
2510 
2511 	if (pci_vfs_assigned(bp->pdev)) {
2512 		netdev_err(dev,
2513 			   "Reset not allowed when VFs are assigned to VMs\n");
2514 		return -EBUSY;
2515 	}
2516 
2517 	if (*flags == ETH_RESET_ALL) {
2518 		/* This feature is not supported in older firmware versions */
2519 		if (bp->hwrm_spec_code < 0x10803)
2520 			return -EOPNOTSUPP;
2521 
2522 		rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
2523 		if (!rc)
2524 			netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
2525 	} else {
2526 		rc = -EINVAL;
2527 	}
2528 
2529 	return rc;
2530 }
2531 
2532 void bnxt_ethtool_init(struct bnxt *bp)
2533 {
2534 	struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
2535 	struct hwrm_selftest_qlist_input req = {0};
2536 	struct bnxt_test_info *test_info;
2537 	struct net_device *dev = bp->dev;
2538 	char *pkglog;
2539 	int i, rc;
2540 
2541 	pkglog = kzalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
2542 	if (pkglog) {
2543 		char *pkgver;
2544 		int len;
2545 
2546 		pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
2547 		if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
2548 			len = strlen(bp->fw_ver_str);
2549 			snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
2550 				 "/pkg %s", pkgver);
2551 		}
2552 		kfree(pkglog);
2553 	}
2554 	if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
2555 		return;
2556 
2557 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
2558 	mutex_lock(&bp->hwrm_cmd_lock);
2559 	rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2560 	if (rc)
2561 		goto ethtool_init_exit;
2562 
2563 	test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
2564 	if (!test_info)
2565 		goto ethtool_init_exit;
2566 
2567 	bp->test_info = test_info;
2568 	bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
2569 	if (bp->num_tests > BNXT_MAX_TEST)
2570 		bp->num_tests = BNXT_MAX_TEST;
2571 
2572 	test_info->offline_mask = resp->offline_tests;
2573 	test_info->timeout = le16_to_cpu(resp->test_timeout);
2574 	if (!test_info->timeout)
2575 		test_info->timeout = HWRM_CMD_TIMEOUT;
2576 	for (i = 0; i < bp->num_tests; i++) {
2577 		char *str = test_info->string[i];
2578 		char *fw_str = resp->test0_name + i * 32;
2579 
2580 		if (i == BNXT_MACLPBK_TEST_IDX) {
2581 			strcpy(str, "Mac loopback test (offline)");
2582 		} else if (i == BNXT_PHYLPBK_TEST_IDX) {
2583 			strcpy(str, "Phy loopback test (offline)");
2584 		} else if (i == BNXT_IRQ_TEST_IDX) {
2585 			strcpy(str, "Interrupt_test (offline)");
2586 		} else {
2587 			strlcpy(str, fw_str, ETH_GSTRING_LEN);
2588 			strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
2589 			if (test_info->offline_mask & (1 << i))
2590 				strncat(str, " (offline)",
2591 					ETH_GSTRING_LEN - strlen(str));
2592 			else
2593 				strncat(str, " (online)",
2594 					ETH_GSTRING_LEN - strlen(str));
2595 		}
2596 	}
2597 
2598 ethtool_init_exit:
2599 	mutex_unlock(&bp->hwrm_cmd_lock);
2600 }
2601 
2602 void bnxt_ethtool_free(struct bnxt *bp)
2603 {
2604 	kfree(bp->test_info);
2605 	bp->test_info = NULL;
2606 }
2607 
2608 const struct ethtool_ops bnxt_ethtool_ops = {
2609 	.get_link_ksettings	= bnxt_get_link_ksettings,
2610 	.set_link_ksettings	= bnxt_set_link_ksettings,
2611 	.get_pauseparam		= bnxt_get_pauseparam,
2612 	.set_pauseparam		= bnxt_set_pauseparam,
2613 	.get_drvinfo		= bnxt_get_drvinfo,
2614 	.get_wol		= bnxt_get_wol,
2615 	.set_wol		= bnxt_set_wol,
2616 	.get_coalesce		= bnxt_get_coalesce,
2617 	.set_coalesce		= bnxt_set_coalesce,
2618 	.get_msglevel		= bnxt_get_msglevel,
2619 	.set_msglevel		= bnxt_set_msglevel,
2620 	.get_sset_count		= bnxt_get_sset_count,
2621 	.get_strings		= bnxt_get_strings,
2622 	.get_ethtool_stats	= bnxt_get_ethtool_stats,
2623 	.set_ringparam		= bnxt_set_ringparam,
2624 	.get_ringparam		= bnxt_get_ringparam,
2625 	.get_channels		= bnxt_get_channels,
2626 	.set_channels		= bnxt_set_channels,
2627 	.get_rxnfc		= bnxt_get_rxnfc,
2628 	.set_rxnfc		= bnxt_set_rxnfc,
2629 	.get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,
2630 	.get_rxfh_key_size      = bnxt_get_rxfh_key_size,
2631 	.get_rxfh               = bnxt_get_rxfh,
2632 	.flash_device		= bnxt_flash_device,
2633 	.get_eeprom_len         = bnxt_get_eeprom_len,
2634 	.get_eeprom             = bnxt_get_eeprom,
2635 	.set_eeprom		= bnxt_set_eeprom,
2636 	.get_link		= bnxt_get_link,
2637 	.get_eee		= bnxt_get_eee,
2638 	.set_eee		= bnxt_set_eee,
2639 	.get_module_info	= bnxt_get_module_info,
2640 	.get_module_eeprom	= bnxt_get_module_eeprom,
2641 	.nway_reset		= bnxt_nway_reset,
2642 	.set_phys_id		= bnxt_set_phys_id,
2643 	.self_test		= bnxt_self_test,
2644 	.reset			= bnxt_reset,
2645 };
2646