1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/interrupt.h> 15 #include <linux/pci.h> 16 #include <linux/etherdevice.h> 17 #include <linux/crc32.h> 18 #include <linux/firmware.h> 19 #include <linux/utsname.h> 20 #include <linux/time.h> 21 #include "bnxt_hsi.h" 22 #include "bnxt.h" 23 #include "bnxt_xdp.h" 24 #include "bnxt_ethtool.h" 25 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 26 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 27 #include "bnxt_coredump.h" 28 #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100) 29 #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 30 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 31 32 static u32 bnxt_get_msglevel(struct net_device *dev) 33 { 34 struct bnxt *bp = netdev_priv(dev); 35 36 return bp->msg_enable; 37 } 38 39 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 40 { 41 struct bnxt *bp = netdev_priv(dev); 42 43 bp->msg_enable = value; 44 } 45 46 static int bnxt_get_coalesce(struct net_device *dev, 47 struct ethtool_coalesce *coal) 48 { 49 struct bnxt *bp = netdev_priv(dev); 50 struct bnxt_coal *hw_coal; 51 u16 mult; 52 53 memset(coal, 0, sizeof(*coal)); 54 55 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; 56 57 hw_coal = &bp->rx_coal; 58 mult = hw_coal->bufs_per_record; 59 coal->rx_coalesce_usecs = hw_coal->coal_ticks; 60 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; 61 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 62 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 63 64 hw_coal = &bp->tx_coal; 65 mult = hw_coal->bufs_per_record; 66 coal->tx_coalesce_usecs = hw_coal->coal_ticks; 67 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult; 68 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 69 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 70 71 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 72 73 return 0; 74 } 75 76 static int bnxt_set_coalesce(struct net_device *dev, 77 struct ethtool_coalesce *coal) 78 { 79 struct bnxt *bp = netdev_priv(dev); 80 bool update_stats = false; 81 struct bnxt_coal *hw_coal; 82 int rc = 0; 83 u16 mult; 84 85 if (coal->use_adaptive_rx_coalesce) { 86 bp->flags |= BNXT_FLAG_DIM; 87 } else { 88 if (bp->flags & BNXT_FLAG_DIM) { 89 bp->flags &= ~(BNXT_FLAG_DIM); 90 goto reset_coalesce; 91 } 92 } 93 94 hw_coal = &bp->rx_coal; 95 mult = hw_coal->bufs_per_record; 96 hw_coal->coal_ticks = coal->rx_coalesce_usecs; 97 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult; 98 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq; 99 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult; 100 101 hw_coal = &bp->tx_coal; 102 mult = hw_coal->bufs_per_record; 103 hw_coal->coal_ticks = coal->tx_coalesce_usecs; 104 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult; 105 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq; 106 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult; 107 108 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 109 u32 stats_ticks = coal->stats_block_coalesce_usecs; 110 111 /* Allow 0, which means disable. */ 112 if (stats_ticks) 113 stats_ticks = clamp_t(u32, stats_ticks, 114 BNXT_MIN_STATS_COAL_TICKS, 115 BNXT_MAX_STATS_COAL_TICKS); 116 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 117 bp->stats_coal_ticks = stats_ticks; 118 if (bp->stats_coal_ticks) 119 bp->current_interval = 120 bp->stats_coal_ticks * HZ / 1000000; 121 else 122 bp->current_interval = BNXT_TIMER_INTERVAL; 123 update_stats = true; 124 } 125 126 reset_coalesce: 127 if (netif_running(dev)) { 128 if (update_stats) { 129 rc = bnxt_close_nic(bp, true, false); 130 if (!rc) 131 rc = bnxt_open_nic(bp, true, false); 132 } else { 133 rc = bnxt_hwrm_set_coal(bp); 134 } 135 } 136 137 return rc; 138 } 139 140 #define BNXT_NUM_STATS 21 141 142 #define BNXT_RX_STATS_ENTRY(counter) \ 143 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 144 145 #define BNXT_TX_STATS_ENTRY(counter) \ 146 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 147 148 #define BNXT_RX_STATS_EXT_ENTRY(counter) \ 149 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) } 150 151 enum { 152 RX_TOTAL_DISCARDS, 153 TX_TOTAL_DISCARDS, 154 }; 155 156 static struct { 157 u64 counter; 158 char string[ETH_GSTRING_LEN]; 159 } bnxt_sw_func_stats[] = { 160 {0, "rx_total_discard_pkts"}, 161 {0, "tx_total_discard_pkts"}, 162 }; 163 164 static const struct { 165 long offset; 166 char string[ETH_GSTRING_LEN]; 167 } bnxt_port_stats_arr[] = { 168 BNXT_RX_STATS_ENTRY(rx_64b_frames), 169 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 170 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 171 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 172 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 173 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames), 174 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 175 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 176 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 177 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 178 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 179 BNXT_RX_STATS_ENTRY(rx_total_frames), 180 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 181 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 182 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 183 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 184 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 185 BNXT_RX_STATS_ENTRY(rx_pause_frames), 186 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 187 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 188 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 189 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 190 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 191 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 192 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 193 BNXT_RX_STATS_ENTRY(rx_good_frames), 194 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 195 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 196 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 197 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 198 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 199 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 200 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 201 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 202 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 203 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 204 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 205 BNXT_RX_STATS_ENTRY(rx_bytes), 206 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 207 BNXT_RX_STATS_ENTRY(rx_runt_frames), 208 BNXT_RX_STATS_ENTRY(rx_stat_discard), 209 BNXT_RX_STATS_ENTRY(rx_stat_err), 210 211 BNXT_TX_STATS_ENTRY(tx_64b_frames), 212 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 213 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 214 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 215 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 216 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames), 217 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 218 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames), 219 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 220 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 221 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 222 BNXT_TX_STATS_ENTRY(tx_good_frames), 223 BNXT_TX_STATS_ENTRY(tx_total_frames), 224 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 225 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 226 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 227 BNXT_TX_STATS_ENTRY(tx_pause_frames), 228 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 229 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 230 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 231 BNXT_TX_STATS_ENTRY(tx_err), 232 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 233 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 234 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 235 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 236 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 237 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 238 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 239 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 240 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 241 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 242 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 243 BNXT_TX_STATS_ENTRY(tx_total_collisions), 244 BNXT_TX_STATS_ENTRY(tx_bytes), 245 BNXT_TX_STATS_ENTRY(tx_xthol_frames), 246 BNXT_TX_STATS_ENTRY(tx_stat_discard), 247 BNXT_TX_STATS_ENTRY(tx_stat_error), 248 }; 249 250 static const struct { 251 long offset; 252 char string[ETH_GSTRING_LEN]; 253 } bnxt_port_stats_ext_arr[] = { 254 BNXT_RX_STATS_EXT_ENTRY(link_down_events), 255 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events), 256 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events), 257 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events), 258 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events), 259 }; 260 261 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats) 262 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 263 #define BNXT_NUM_PORT_STATS_EXT ARRAY_SIZE(bnxt_port_stats_ext_arr) 264 265 static int bnxt_get_num_stats(struct bnxt *bp) 266 { 267 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings; 268 269 num_stats += BNXT_NUM_SW_FUNC_STATS; 270 271 if (bp->flags & BNXT_FLAG_PORT_STATS) 272 num_stats += BNXT_NUM_PORT_STATS; 273 274 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) 275 num_stats += BNXT_NUM_PORT_STATS_EXT; 276 277 return num_stats; 278 } 279 280 static int bnxt_get_sset_count(struct net_device *dev, int sset) 281 { 282 struct bnxt *bp = netdev_priv(dev); 283 284 switch (sset) { 285 case ETH_SS_STATS: 286 return bnxt_get_num_stats(bp); 287 case ETH_SS_TEST: 288 if (!bp->num_tests) 289 return -EOPNOTSUPP; 290 return bp->num_tests; 291 default: 292 return -EOPNOTSUPP; 293 } 294 } 295 296 static void bnxt_get_ethtool_stats(struct net_device *dev, 297 struct ethtool_stats *stats, u64 *buf) 298 { 299 u32 i, j = 0; 300 struct bnxt *bp = netdev_priv(dev); 301 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8; 302 303 if (!bp->bnapi) 304 return; 305 306 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) 307 bnxt_sw_func_stats[i].counter = 0; 308 309 for (i = 0; i < bp->cp_nr_rings; i++) { 310 struct bnxt_napi *bnapi = bp->bnapi[i]; 311 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 312 __le64 *hw_stats = (__le64 *)cpr->hw_stats; 313 int k; 314 315 for (k = 0; k < stat_fields; j++, k++) 316 buf[j] = le64_to_cpu(hw_stats[k]); 317 buf[j++] = cpr->rx_l4_csum_errors; 318 319 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter += 320 le64_to_cpu(cpr->hw_stats->rx_discard_pkts); 321 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter += 322 le64_to_cpu(cpr->hw_stats->tx_discard_pkts); 323 } 324 325 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++) 326 buf[j] = bnxt_sw_func_stats[i].counter; 327 328 if (bp->flags & BNXT_FLAG_PORT_STATS) { 329 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats; 330 331 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) { 332 buf[j] = le64_to_cpu(*(port_stats + 333 bnxt_port_stats_arr[i].offset)); 334 } 335 } 336 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 337 __le64 *port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext; 338 339 for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++, j++) { 340 buf[j] = le64_to_cpu(*(port_stats_ext + 341 bnxt_port_stats_ext_arr[i].offset)); 342 } 343 } 344 } 345 346 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 347 { 348 struct bnxt *bp = netdev_priv(dev); 349 u32 i; 350 351 switch (stringset) { 352 /* The number of strings must match BNXT_NUM_STATS defined above. */ 353 case ETH_SS_STATS: 354 for (i = 0; i < bp->cp_nr_rings; i++) { 355 sprintf(buf, "[%d]: rx_ucast_packets", i); 356 buf += ETH_GSTRING_LEN; 357 sprintf(buf, "[%d]: rx_mcast_packets", i); 358 buf += ETH_GSTRING_LEN; 359 sprintf(buf, "[%d]: rx_bcast_packets", i); 360 buf += ETH_GSTRING_LEN; 361 sprintf(buf, "[%d]: rx_discards", i); 362 buf += ETH_GSTRING_LEN; 363 sprintf(buf, "[%d]: rx_drops", i); 364 buf += ETH_GSTRING_LEN; 365 sprintf(buf, "[%d]: rx_ucast_bytes", i); 366 buf += ETH_GSTRING_LEN; 367 sprintf(buf, "[%d]: rx_mcast_bytes", i); 368 buf += ETH_GSTRING_LEN; 369 sprintf(buf, "[%d]: rx_bcast_bytes", i); 370 buf += ETH_GSTRING_LEN; 371 sprintf(buf, "[%d]: tx_ucast_packets", i); 372 buf += ETH_GSTRING_LEN; 373 sprintf(buf, "[%d]: tx_mcast_packets", i); 374 buf += ETH_GSTRING_LEN; 375 sprintf(buf, "[%d]: tx_bcast_packets", i); 376 buf += ETH_GSTRING_LEN; 377 sprintf(buf, "[%d]: tx_discards", i); 378 buf += ETH_GSTRING_LEN; 379 sprintf(buf, "[%d]: tx_drops", i); 380 buf += ETH_GSTRING_LEN; 381 sprintf(buf, "[%d]: tx_ucast_bytes", i); 382 buf += ETH_GSTRING_LEN; 383 sprintf(buf, "[%d]: tx_mcast_bytes", i); 384 buf += ETH_GSTRING_LEN; 385 sprintf(buf, "[%d]: tx_bcast_bytes", i); 386 buf += ETH_GSTRING_LEN; 387 sprintf(buf, "[%d]: tpa_packets", i); 388 buf += ETH_GSTRING_LEN; 389 sprintf(buf, "[%d]: tpa_bytes", i); 390 buf += ETH_GSTRING_LEN; 391 sprintf(buf, "[%d]: tpa_events", i); 392 buf += ETH_GSTRING_LEN; 393 sprintf(buf, "[%d]: tpa_aborts", i); 394 buf += ETH_GSTRING_LEN; 395 sprintf(buf, "[%d]: rx_l4_csum_errors", i); 396 buf += ETH_GSTRING_LEN; 397 } 398 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) { 399 strcpy(buf, bnxt_sw_func_stats[i].string); 400 buf += ETH_GSTRING_LEN; 401 } 402 403 if (bp->flags & BNXT_FLAG_PORT_STATS) { 404 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 405 strcpy(buf, bnxt_port_stats_arr[i].string); 406 buf += ETH_GSTRING_LEN; 407 } 408 } 409 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 410 for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++) { 411 strcpy(buf, bnxt_port_stats_ext_arr[i].string); 412 buf += ETH_GSTRING_LEN; 413 } 414 } 415 break; 416 case ETH_SS_TEST: 417 if (bp->num_tests) 418 memcpy(buf, bp->test_info->string, 419 bp->num_tests * ETH_GSTRING_LEN); 420 break; 421 default: 422 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 423 stringset); 424 break; 425 } 426 } 427 428 static void bnxt_get_ringparam(struct net_device *dev, 429 struct ethtool_ringparam *ering) 430 { 431 struct bnxt *bp = netdev_priv(dev); 432 433 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 434 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 435 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 436 437 ering->rx_pending = bp->rx_ring_size; 438 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 439 ering->tx_pending = bp->tx_ring_size; 440 } 441 442 static int bnxt_set_ringparam(struct net_device *dev, 443 struct ethtool_ringparam *ering) 444 { 445 struct bnxt *bp = netdev_priv(dev); 446 447 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 448 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 449 (ering->tx_pending <= MAX_SKB_FRAGS)) 450 return -EINVAL; 451 452 if (netif_running(dev)) 453 bnxt_close_nic(bp, false, false); 454 455 bp->rx_ring_size = ering->rx_pending; 456 bp->tx_ring_size = ering->tx_pending; 457 bnxt_set_ring_params(bp); 458 459 if (netif_running(dev)) 460 return bnxt_open_nic(bp, false, false); 461 462 return 0; 463 } 464 465 static void bnxt_get_channels(struct net_device *dev, 466 struct ethtool_channels *channel) 467 { 468 struct bnxt *bp = netdev_priv(dev); 469 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; 470 int max_rx_rings, max_tx_rings, tcs; 471 int max_tx_sch_inputs; 472 473 /* Get the most up-to-date max_tx_sch_inputs. */ 474 if (BNXT_NEW_RM(bp)) 475 bnxt_hwrm_func_resc_qcaps(bp, false); 476 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs; 477 478 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 479 if (max_tx_sch_inputs) 480 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 481 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 482 483 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 484 max_rx_rings = 0; 485 max_tx_rings = 0; 486 } 487 if (max_tx_sch_inputs) 488 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 489 490 tcs = netdev_get_num_tc(dev); 491 if (tcs > 1) 492 max_tx_rings /= tcs; 493 494 channel->max_rx = max_rx_rings; 495 channel->max_tx = max_tx_rings; 496 channel->max_other = 0; 497 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 498 channel->combined_count = bp->rx_nr_rings; 499 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 500 channel->combined_count--; 501 } else { 502 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 503 channel->rx_count = bp->rx_nr_rings; 504 channel->tx_count = bp->tx_nr_rings_per_tc; 505 } 506 } 507 } 508 509 static int bnxt_set_channels(struct net_device *dev, 510 struct ethtool_channels *channel) 511 { 512 struct bnxt *bp = netdev_priv(dev); 513 int req_tx_rings, req_rx_rings, tcs; 514 bool sh = false; 515 int tx_xdp = 0; 516 int rc = 0; 517 518 if (channel->other_count) 519 return -EINVAL; 520 521 if (!channel->combined_count && 522 (!channel->rx_count || !channel->tx_count)) 523 return -EINVAL; 524 525 if (channel->combined_count && 526 (channel->rx_count || channel->tx_count)) 527 return -EINVAL; 528 529 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 530 channel->tx_count)) 531 return -EINVAL; 532 533 if (channel->combined_count) 534 sh = true; 535 536 tcs = netdev_get_num_tc(dev); 537 538 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 539 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 540 if (bp->tx_nr_rings_xdp) { 541 if (!sh) { 542 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 543 return -EINVAL; 544 } 545 tx_xdp = req_rx_rings; 546 } 547 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); 548 if (rc) { 549 netdev_warn(dev, "Unable to allocate the requested rings\n"); 550 return rc; 551 } 552 553 if (netif_running(dev)) { 554 if (BNXT_PF(bp)) { 555 /* TODO CHIMP_FW: Send message to all VF's 556 * before PF unload 557 */ 558 } 559 rc = bnxt_close_nic(bp, true, false); 560 if (rc) { 561 netdev_err(bp->dev, "Set channel failure rc :%x\n", 562 rc); 563 return rc; 564 } 565 } 566 567 if (sh) { 568 bp->flags |= BNXT_FLAG_SHARED_RINGS; 569 bp->rx_nr_rings = channel->combined_count; 570 bp->tx_nr_rings_per_tc = channel->combined_count; 571 } else { 572 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 573 bp->rx_nr_rings = channel->rx_count; 574 bp->tx_nr_rings_per_tc = channel->tx_count; 575 } 576 bp->tx_nr_rings_xdp = tx_xdp; 577 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 578 if (tcs > 1) 579 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 580 581 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 582 bp->tx_nr_rings + bp->rx_nr_rings; 583 584 bp->num_stat_ctxs = bp->cp_nr_rings; 585 586 /* After changing number of rx channels, update NTUPLE feature. */ 587 netdev_update_features(dev); 588 if (netif_running(dev)) { 589 rc = bnxt_open_nic(bp, true, false); 590 if ((!rc) && BNXT_PF(bp)) { 591 /* TODO CHIMP_FW: Send message to all VF's 592 * to renable 593 */ 594 } 595 } else { 596 rc = bnxt_reserve_rings(bp); 597 } 598 599 return rc; 600 } 601 602 #ifdef CONFIG_RFS_ACCEL 603 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 604 u32 *rule_locs) 605 { 606 int i, j = 0; 607 608 cmd->data = bp->ntp_fltr_count; 609 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 610 struct hlist_head *head; 611 struct bnxt_ntuple_filter *fltr; 612 613 head = &bp->ntp_fltr_hash_tbl[i]; 614 rcu_read_lock(); 615 hlist_for_each_entry_rcu(fltr, head, hash) { 616 if (j == cmd->rule_cnt) 617 break; 618 rule_locs[j++] = fltr->sw_id; 619 } 620 rcu_read_unlock(); 621 if (j == cmd->rule_cnt) 622 break; 623 } 624 cmd->rule_cnt = j; 625 return 0; 626 } 627 628 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 629 { 630 struct ethtool_rx_flow_spec *fs = 631 (struct ethtool_rx_flow_spec *)&cmd->fs; 632 struct bnxt_ntuple_filter *fltr; 633 struct flow_keys *fkeys; 634 int i, rc = -EINVAL; 635 636 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 637 return rc; 638 639 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 640 struct hlist_head *head; 641 642 head = &bp->ntp_fltr_hash_tbl[i]; 643 rcu_read_lock(); 644 hlist_for_each_entry_rcu(fltr, head, hash) { 645 if (fltr->sw_id == fs->location) 646 goto fltr_found; 647 } 648 rcu_read_unlock(); 649 } 650 return rc; 651 652 fltr_found: 653 fkeys = &fltr->fkeys; 654 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 655 if (fkeys->basic.ip_proto == IPPROTO_TCP) 656 fs->flow_type = TCP_V4_FLOW; 657 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 658 fs->flow_type = UDP_V4_FLOW; 659 else 660 goto fltr_err; 661 662 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 663 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 664 665 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 666 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 667 668 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 669 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 670 671 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 672 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 673 } else { 674 int i; 675 676 if (fkeys->basic.ip_proto == IPPROTO_TCP) 677 fs->flow_type = TCP_V6_FLOW; 678 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 679 fs->flow_type = UDP_V6_FLOW; 680 else 681 goto fltr_err; 682 683 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 684 fkeys->addrs.v6addrs.src; 685 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 686 fkeys->addrs.v6addrs.dst; 687 for (i = 0; i < 4; i++) { 688 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 689 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 690 } 691 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 692 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 693 694 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 695 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 696 } 697 698 fs->ring_cookie = fltr->rxq; 699 rc = 0; 700 701 fltr_err: 702 rcu_read_unlock(); 703 704 return rc; 705 } 706 #endif 707 708 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 709 { 710 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 711 return RXH_IP_SRC | RXH_IP_DST; 712 return 0; 713 } 714 715 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 716 { 717 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 718 return RXH_IP_SRC | RXH_IP_DST; 719 return 0; 720 } 721 722 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 723 { 724 cmd->data = 0; 725 switch (cmd->flow_type) { 726 case TCP_V4_FLOW: 727 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 728 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 729 RXH_L4_B_0_1 | RXH_L4_B_2_3; 730 cmd->data |= get_ethtool_ipv4_rss(bp); 731 break; 732 case UDP_V4_FLOW: 733 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 734 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 735 RXH_L4_B_0_1 | RXH_L4_B_2_3; 736 /* fall through */ 737 case SCTP_V4_FLOW: 738 case AH_ESP_V4_FLOW: 739 case AH_V4_FLOW: 740 case ESP_V4_FLOW: 741 case IPV4_FLOW: 742 cmd->data |= get_ethtool_ipv4_rss(bp); 743 break; 744 745 case TCP_V6_FLOW: 746 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 747 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 748 RXH_L4_B_0_1 | RXH_L4_B_2_3; 749 cmd->data |= get_ethtool_ipv6_rss(bp); 750 break; 751 case UDP_V6_FLOW: 752 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 753 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 754 RXH_L4_B_0_1 | RXH_L4_B_2_3; 755 /* fall through */ 756 case SCTP_V6_FLOW: 757 case AH_ESP_V6_FLOW: 758 case AH_V6_FLOW: 759 case ESP_V6_FLOW: 760 case IPV6_FLOW: 761 cmd->data |= get_ethtool_ipv6_rss(bp); 762 break; 763 } 764 return 0; 765 } 766 767 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 768 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 769 770 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 771 { 772 u32 rss_hash_cfg = bp->rss_hash_cfg; 773 int tuple, rc = 0; 774 775 if (cmd->data == RXH_4TUPLE) 776 tuple = 4; 777 else if (cmd->data == RXH_2TUPLE) 778 tuple = 2; 779 else if (!cmd->data) 780 tuple = 0; 781 else 782 return -EINVAL; 783 784 if (cmd->flow_type == TCP_V4_FLOW) { 785 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 786 if (tuple == 4) 787 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 788 } else if (cmd->flow_type == UDP_V4_FLOW) { 789 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 790 return -EINVAL; 791 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 792 if (tuple == 4) 793 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 794 } else if (cmd->flow_type == TCP_V6_FLOW) { 795 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 796 if (tuple == 4) 797 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 798 } else if (cmd->flow_type == UDP_V6_FLOW) { 799 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 800 return -EINVAL; 801 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 802 if (tuple == 4) 803 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 804 } else if (tuple == 4) { 805 return -EINVAL; 806 } 807 808 switch (cmd->flow_type) { 809 case TCP_V4_FLOW: 810 case UDP_V4_FLOW: 811 case SCTP_V4_FLOW: 812 case AH_ESP_V4_FLOW: 813 case AH_V4_FLOW: 814 case ESP_V4_FLOW: 815 case IPV4_FLOW: 816 if (tuple == 2) 817 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 818 else if (!tuple) 819 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 820 break; 821 822 case TCP_V6_FLOW: 823 case UDP_V6_FLOW: 824 case SCTP_V6_FLOW: 825 case AH_ESP_V6_FLOW: 826 case AH_V6_FLOW: 827 case ESP_V6_FLOW: 828 case IPV6_FLOW: 829 if (tuple == 2) 830 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 831 else if (!tuple) 832 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 833 break; 834 } 835 836 if (bp->rss_hash_cfg == rss_hash_cfg) 837 return 0; 838 839 bp->rss_hash_cfg = rss_hash_cfg; 840 if (netif_running(bp->dev)) { 841 bnxt_close_nic(bp, false, false); 842 rc = bnxt_open_nic(bp, false, false); 843 } 844 return rc; 845 } 846 847 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 848 u32 *rule_locs) 849 { 850 struct bnxt *bp = netdev_priv(dev); 851 int rc = 0; 852 853 switch (cmd->cmd) { 854 #ifdef CONFIG_RFS_ACCEL 855 case ETHTOOL_GRXRINGS: 856 cmd->data = bp->rx_nr_rings; 857 break; 858 859 case ETHTOOL_GRXCLSRLCNT: 860 cmd->rule_cnt = bp->ntp_fltr_count; 861 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 862 break; 863 864 case ETHTOOL_GRXCLSRLALL: 865 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 866 break; 867 868 case ETHTOOL_GRXCLSRULE: 869 rc = bnxt_grxclsrule(bp, cmd); 870 break; 871 #endif 872 873 case ETHTOOL_GRXFH: 874 rc = bnxt_grxfh(bp, cmd); 875 break; 876 877 default: 878 rc = -EOPNOTSUPP; 879 break; 880 } 881 882 return rc; 883 } 884 885 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 886 { 887 struct bnxt *bp = netdev_priv(dev); 888 int rc; 889 890 switch (cmd->cmd) { 891 case ETHTOOL_SRXFH: 892 rc = bnxt_srxfh(bp, cmd); 893 break; 894 895 default: 896 rc = -EOPNOTSUPP; 897 break; 898 } 899 return rc; 900 } 901 902 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 903 { 904 return HW_HASH_INDEX_SIZE; 905 } 906 907 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 908 { 909 return HW_HASH_KEY_SIZE; 910 } 911 912 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 913 u8 *hfunc) 914 { 915 struct bnxt *bp = netdev_priv(dev); 916 struct bnxt_vnic_info *vnic; 917 int i = 0; 918 919 if (hfunc) 920 *hfunc = ETH_RSS_HASH_TOP; 921 922 if (!bp->vnic_info) 923 return 0; 924 925 vnic = &bp->vnic_info[0]; 926 if (indir && vnic->rss_table) { 927 for (i = 0; i < HW_HASH_INDEX_SIZE; i++) 928 indir[i] = le16_to_cpu(vnic->rss_table[i]); 929 } 930 931 if (key && vnic->rss_hash_key) 932 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 933 934 return 0; 935 } 936 937 static void bnxt_get_drvinfo(struct net_device *dev, 938 struct ethtool_drvinfo *info) 939 { 940 struct bnxt *bp = netdev_priv(dev); 941 942 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 943 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 944 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version)); 945 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 946 info->n_stats = bnxt_get_num_stats(bp); 947 info->testinfo_len = bp->num_tests; 948 /* TODO CHIMP_FW: eeprom dump details */ 949 info->eedump_len = 0; 950 /* TODO CHIMP FW: reg dump details */ 951 info->regdump_len = 0; 952 } 953 954 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 955 { 956 struct bnxt *bp = netdev_priv(dev); 957 958 wol->supported = 0; 959 wol->wolopts = 0; 960 memset(&wol->sopass, 0, sizeof(wol->sopass)); 961 if (bp->flags & BNXT_FLAG_WOL_CAP) { 962 wol->supported = WAKE_MAGIC; 963 if (bp->wol) 964 wol->wolopts = WAKE_MAGIC; 965 } 966 } 967 968 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 969 { 970 struct bnxt *bp = netdev_priv(dev); 971 972 if (wol->wolopts & ~WAKE_MAGIC) 973 return -EINVAL; 974 975 if (wol->wolopts & WAKE_MAGIC) { 976 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 977 return -EINVAL; 978 if (!bp->wol) { 979 if (bnxt_hwrm_alloc_wol_fltr(bp)) 980 return -EBUSY; 981 bp->wol = 1; 982 } 983 } else { 984 if (bp->wol) { 985 if (bnxt_hwrm_free_wol_fltr(bp)) 986 return -EBUSY; 987 bp->wol = 0; 988 } 989 } 990 return 0; 991 } 992 993 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 994 { 995 u32 speed_mask = 0; 996 997 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 998 /* set the advertised speeds */ 999 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 1000 speed_mask |= ADVERTISED_100baseT_Full; 1001 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 1002 speed_mask |= ADVERTISED_1000baseT_Full; 1003 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 1004 speed_mask |= ADVERTISED_2500baseX_Full; 1005 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 1006 speed_mask |= ADVERTISED_10000baseT_Full; 1007 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 1008 speed_mask |= ADVERTISED_40000baseCR4_Full; 1009 1010 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 1011 speed_mask |= ADVERTISED_Pause; 1012 else if (fw_pause & BNXT_LINK_PAUSE_TX) 1013 speed_mask |= ADVERTISED_Asym_Pause; 1014 else if (fw_pause & BNXT_LINK_PAUSE_RX) 1015 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 1016 1017 return speed_mask; 1018 } 1019 1020 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 1021 { \ 1022 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 1023 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1024 100baseT_Full); \ 1025 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 1026 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1027 1000baseT_Full); \ 1028 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 1029 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1030 10000baseT_Full); \ 1031 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 1032 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1033 25000baseCR_Full); \ 1034 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 1035 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1036 40000baseCR4_Full);\ 1037 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 1038 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1039 50000baseCR2_Full);\ 1040 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 1041 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1042 100000baseCR4_Full);\ 1043 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 1044 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1045 Pause); \ 1046 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 1047 ethtool_link_ksettings_add_link_mode( \ 1048 lk_ksettings, name, Asym_Pause);\ 1049 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 1050 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1051 Asym_Pause); \ 1052 } \ 1053 } 1054 1055 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 1056 { \ 1057 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1058 100baseT_Full) || \ 1059 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1060 100baseT_Half)) \ 1061 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 1062 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1063 1000baseT_Full) || \ 1064 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1065 1000baseT_Half)) \ 1066 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 1067 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1068 10000baseT_Full)) \ 1069 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 1070 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1071 25000baseCR_Full)) \ 1072 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 1073 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1074 40000baseCR4_Full)) \ 1075 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 1076 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1077 50000baseCR2_Full)) \ 1078 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 1079 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1080 100000baseCR4_Full)) \ 1081 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 1082 } 1083 1084 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 1085 struct ethtool_link_ksettings *lk_ksettings) 1086 { 1087 u16 fw_speeds = link_info->advertising; 1088 u8 fw_pause = 0; 1089 1090 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1091 fw_pause = link_info->auto_pause_setting; 1092 1093 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 1094 } 1095 1096 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 1097 struct ethtool_link_ksettings *lk_ksettings) 1098 { 1099 u16 fw_speeds = link_info->lp_auto_link_speeds; 1100 u8 fw_pause = 0; 1101 1102 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1103 fw_pause = link_info->lp_pause; 1104 1105 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 1106 lp_advertising); 1107 } 1108 1109 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1110 struct ethtool_link_ksettings *lk_ksettings) 1111 { 1112 u16 fw_speeds = link_info->support_speeds; 1113 1114 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1115 1116 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); 1117 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1118 Asym_Pause); 1119 1120 if (link_info->support_auto_speeds) 1121 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1122 Autoneg); 1123 } 1124 1125 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1126 { 1127 switch (fw_link_speed) { 1128 case BNXT_LINK_SPEED_100MB: 1129 return SPEED_100; 1130 case BNXT_LINK_SPEED_1GB: 1131 return SPEED_1000; 1132 case BNXT_LINK_SPEED_2_5GB: 1133 return SPEED_2500; 1134 case BNXT_LINK_SPEED_10GB: 1135 return SPEED_10000; 1136 case BNXT_LINK_SPEED_20GB: 1137 return SPEED_20000; 1138 case BNXT_LINK_SPEED_25GB: 1139 return SPEED_25000; 1140 case BNXT_LINK_SPEED_40GB: 1141 return SPEED_40000; 1142 case BNXT_LINK_SPEED_50GB: 1143 return SPEED_50000; 1144 case BNXT_LINK_SPEED_100GB: 1145 return SPEED_100000; 1146 default: 1147 return SPEED_UNKNOWN; 1148 } 1149 } 1150 1151 static int bnxt_get_link_ksettings(struct net_device *dev, 1152 struct ethtool_link_ksettings *lk_ksettings) 1153 { 1154 struct bnxt *bp = netdev_priv(dev); 1155 struct bnxt_link_info *link_info = &bp->link_info; 1156 struct ethtool_link_settings *base = &lk_ksettings->base; 1157 u32 ethtool_speed; 1158 1159 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1160 mutex_lock(&bp->link_lock); 1161 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1162 1163 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1164 if (link_info->autoneg) { 1165 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1166 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1167 advertising, Autoneg); 1168 base->autoneg = AUTONEG_ENABLE; 1169 if (link_info->phy_link_status == BNXT_LINK_LINK) 1170 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1171 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1172 if (!netif_carrier_ok(dev)) 1173 base->duplex = DUPLEX_UNKNOWN; 1174 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1175 base->duplex = DUPLEX_FULL; 1176 else 1177 base->duplex = DUPLEX_HALF; 1178 } else { 1179 base->autoneg = AUTONEG_DISABLE; 1180 ethtool_speed = 1181 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1182 base->duplex = DUPLEX_HALF; 1183 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1184 base->duplex = DUPLEX_FULL; 1185 } 1186 base->speed = ethtool_speed; 1187 1188 base->port = PORT_NONE; 1189 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1190 base->port = PORT_TP; 1191 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1192 TP); 1193 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1194 TP); 1195 } else { 1196 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1197 FIBRE); 1198 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1199 FIBRE); 1200 1201 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1202 base->port = PORT_DA; 1203 else if (link_info->media_type == 1204 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1205 base->port = PORT_FIBRE; 1206 } 1207 base->phy_address = link_info->phy_addr; 1208 mutex_unlock(&bp->link_lock); 1209 1210 return 0; 1211 } 1212 1213 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed) 1214 { 1215 struct bnxt *bp = netdev_priv(dev); 1216 struct bnxt_link_info *link_info = &bp->link_info; 1217 u16 support_spds = link_info->support_speeds; 1218 u32 fw_speed = 0; 1219 1220 switch (ethtool_speed) { 1221 case SPEED_100: 1222 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1223 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB; 1224 break; 1225 case SPEED_1000: 1226 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1227 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB; 1228 break; 1229 case SPEED_2500: 1230 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1231 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB; 1232 break; 1233 case SPEED_10000: 1234 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1235 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB; 1236 break; 1237 case SPEED_20000: 1238 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1239 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB; 1240 break; 1241 case SPEED_25000: 1242 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1243 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB; 1244 break; 1245 case SPEED_40000: 1246 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1247 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB; 1248 break; 1249 case SPEED_50000: 1250 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) 1251 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB; 1252 break; 1253 case SPEED_100000: 1254 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) 1255 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB; 1256 break; 1257 default: 1258 netdev_err(dev, "unsupported speed!\n"); 1259 break; 1260 } 1261 return fw_speed; 1262 } 1263 1264 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1265 { 1266 u16 fw_speed_mask = 0; 1267 1268 /* only support autoneg at speed 100, 1000, and 10000 */ 1269 if (advertising & (ADVERTISED_100baseT_Full | 1270 ADVERTISED_100baseT_Half)) { 1271 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1272 } 1273 if (advertising & (ADVERTISED_1000baseT_Full | 1274 ADVERTISED_1000baseT_Half)) { 1275 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1276 } 1277 if (advertising & ADVERTISED_10000baseT_Full) 1278 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1279 1280 if (advertising & ADVERTISED_40000baseCR4_Full) 1281 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1282 1283 return fw_speed_mask; 1284 } 1285 1286 static int bnxt_set_link_ksettings(struct net_device *dev, 1287 const struct ethtool_link_ksettings *lk_ksettings) 1288 { 1289 struct bnxt *bp = netdev_priv(dev); 1290 struct bnxt_link_info *link_info = &bp->link_info; 1291 const struct ethtool_link_settings *base = &lk_ksettings->base; 1292 bool set_pause = false; 1293 u16 fw_advertising = 0; 1294 u32 speed; 1295 int rc = 0; 1296 1297 if (!BNXT_SINGLE_PF(bp)) 1298 return -EOPNOTSUPP; 1299 1300 mutex_lock(&bp->link_lock); 1301 if (base->autoneg == AUTONEG_ENABLE) { 1302 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings, 1303 advertising); 1304 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1305 if (!fw_advertising) 1306 link_info->advertising = link_info->support_auto_speeds; 1307 else 1308 link_info->advertising = fw_advertising; 1309 /* any change to autoneg will cause link change, therefore the 1310 * driver should put back the original pause setting in autoneg 1311 */ 1312 set_pause = true; 1313 } else { 1314 u16 fw_speed; 1315 u8 phy_type = link_info->phy_type; 1316 1317 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1318 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1319 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1320 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1321 rc = -EINVAL; 1322 goto set_setting_exit; 1323 } 1324 if (base->duplex == DUPLEX_HALF) { 1325 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1326 rc = -EINVAL; 1327 goto set_setting_exit; 1328 } 1329 speed = base->speed; 1330 fw_speed = bnxt_get_fw_speed(dev, speed); 1331 if (!fw_speed) { 1332 rc = -EINVAL; 1333 goto set_setting_exit; 1334 } 1335 link_info->req_link_speed = fw_speed; 1336 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1337 link_info->autoneg = 0; 1338 link_info->advertising = 0; 1339 } 1340 1341 if (netif_running(dev)) 1342 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1343 1344 set_setting_exit: 1345 mutex_unlock(&bp->link_lock); 1346 return rc; 1347 } 1348 1349 static void bnxt_get_pauseparam(struct net_device *dev, 1350 struct ethtool_pauseparam *epause) 1351 { 1352 struct bnxt *bp = netdev_priv(dev); 1353 struct bnxt_link_info *link_info = &bp->link_info; 1354 1355 if (BNXT_VF(bp)) 1356 return; 1357 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 1358 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 1359 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 1360 } 1361 1362 static int bnxt_set_pauseparam(struct net_device *dev, 1363 struct ethtool_pauseparam *epause) 1364 { 1365 int rc = 0; 1366 struct bnxt *bp = netdev_priv(dev); 1367 struct bnxt_link_info *link_info = &bp->link_info; 1368 1369 if (!BNXT_SINGLE_PF(bp)) 1370 return -EOPNOTSUPP; 1371 1372 if (epause->autoneg) { 1373 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 1374 return -EINVAL; 1375 1376 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 1377 if (bp->hwrm_spec_code >= 0x10201) 1378 link_info->req_flow_ctrl = 1379 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; 1380 } else { 1381 /* when transition from auto pause to force pause, 1382 * force a link change 1383 */ 1384 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1385 link_info->force_link_chng = true; 1386 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 1387 link_info->req_flow_ctrl = 0; 1388 } 1389 if (epause->rx_pause) 1390 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 1391 1392 if (epause->tx_pause) 1393 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 1394 1395 if (netif_running(dev)) 1396 rc = bnxt_hwrm_set_pause(bp); 1397 return rc; 1398 } 1399 1400 static u32 bnxt_get_link(struct net_device *dev) 1401 { 1402 struct bnxt *bp = netdev_priv(dev); 1403 1404 /* TODO: handle MF, VF, driver close case */ 1405 return bp->link_info.link_up; 1406 } 1407 1408 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1409 u16 ext, u16 *index, u32 *item_length, 1410 u32 *data_length); 1411 1412 static int bnxt_flash_nvram(struct net_device *dev, 1413 u16 dir_type, 1414 u16 dir_ordinal, 1415 u16 dir_ext, 1416 u16 dir_attr, 1417 const u8 *data, 1418 size_t data_len) 1419 { 1420 struct bnxt *bp = netdev_priv(dev); 1421 int rc; 1422 struct hwrm_nvm_write_input req = {0}; 1423 dma_addr_t dma_handle; 1424 u8 *kmem; 1425 1426 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1); 1427 1428 req.dir_type = cpu_to_le16(dir_type); 1429 req.dir_ordinal = cpu_to_le16(dir_ordinal); 1430 req.dir_ext = cpu_to_le16(dir_ext); 1431 req.dir_attr = cpu_to_le16(dir_attr); 1432 req.dir_data_length = cpu_to_le32(data_len); 1433 1434 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle, 1435 GFP_KERNEL); 1436 if (!kmem) { 1437 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1438 (unsigned)data_len); 1439 return -ENOMEM; 1440 } 1441 memcpy(kmem, data, data_len); 1442 req.host_src_addr = cpu_to_le64(dma_handle); 1443 1444 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT); 1445 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle); 1446 1447 return rc; 1448 } 1449 1450 static int bnxt_firmware_reset(struct net_device *dev, 1451 u16 dir_type) 1452 { 1453 struct bnxt *bp = netdev_priv(dev); 1454 struct hwrm_fw_reset_input req = {0}; 1455 1456 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1); 1457 1458 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 1459 /* (e.g. when firmware isn't already running) */ 1460 switch (dir_type) { 1461 case BNX_DIR_TYPE_CHIMP_PATCH: 1462 case BNX_DIR_TYPE_BOOTCODE: 1463 case BNX_DIR_TYPE_BOOTCODE_2: 1464 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 1465 /* Self-reset ChiMP upon next PCIe reset: */ 1466 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1467 break; 1468 case BNX_DIR_TYPE_APE_FW: 1469 case BNX_DIR_TYPE_APE_PATCH: 1470 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 1471 /* Self-reset APE upon next PCIe reset: */ 1472 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1473 break; 1474 case BNX_DIR_TYPE_KONG_FW: 1475 case BNX_DIR_TYPE_KONG_PATCH: 1476 req.embedded_proc_type = 1477 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 1478 break; 1479 case BNX_DIR_TYPE_BONO_FW: 1480 case BNX_DIR_TYPE_BONO_PATCH: 1481 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 1482 break; 1483 case BNXT_FW_RESET_CHIP: 1484 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP; 1485 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP; 1486 break; 1487 case BNXT_FW_RESET_AP: 1488 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP; 1489 break; 1490 default: 1491 return -EINVAL; 1492 } 1493 1494 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1495 } 1496 1497 static int bnxt_flash_firmware(struct net_device *dev, 1498 u16 dir_type, 1499 const u8 *fw_data, 1500 size_t fw_size) 1501 { 1502 int rc = 0; 1503 u16 code_type; 1504 u32 stored_crc; 1505 u32 calculated_crc; 1506 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 1507 1508 switch (dir_type) { 1509 case BNX_DIR_TYPE_BOOTCODE: 1510 case BNX_DIR_TYPE_BOOTCODE_2: 1511 code_type = CODE_BOOT; 1512 break; 1513 case BNX_DIR_TYPE_CHIMP_PATCH: 1514 code_type = CODE_CHIMP_PATCH; 1515 break; 1516 case BNX_DIR_TYPE_APE_FW: 1517 code_type = CODE_MCTP_PASSTHRU; 1518 break; 1519 case BNX_DIR_TYPE_APE_PATCH: 1520 code_type = CODE_APE_PATCH; 1521 break; 1522 case BNX_DIR_TYPE_KONG_FW: 1523 code_type = CODE_KONG_FW; 1524 break; 1525 case BNX_DIR_TYPE_KONG_PATCH: 1526 code_type = CODE_KONG_PATCH; 1527 break; 1528 case BNX_DIR_TYPE_BONO_FW: 1529 code_type = CODE_BONO_FW; 1530 break; 1531 case BNX_DIR_TYPE_BONO_PATCH: 1532 code_type = CODE_BONO_PATCH; 1533 break; 1534 default: 1535 netdev_err(dev, "Unsupported directory entry type: %u\n", 1536 dir_type); 1537 return -EINVAL; 1538 } 1539 if (fw_size < sizeof(struct bnxt_fw_header)) { 1540 netdev_err(dev, "Invalid firmware file size: %u\n", 1541 (unsigned int)fw_size); 1542 return -EINVAL; 1543 } 1544 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 1545 netdev_err(dev, "Invalid firmware signature: %08X\n", 1546 le32_to_cpu(header->signature)); 1547 return -EINVAL; 1548 } 1549 if (header->code_type != code_type) { 1550 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 1551 code_type, header->code_type); 1552 return -EINVAL; 1553 } 1554 if (header->device != DEVICE_CUMULUS_FAMILY) { 1555 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 1556 DEVICE_CUMULUS_FAMILY, header->device); 1557 return -EINVAL; 1558 } 1559 /* Confirm the CRC32 checksum of the file: */ 1560 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1561 sizeof(stored_crc))); 1562 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1563 if (calculated_crc != stored_crc) { 1564 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 1565 (unsigned long)stored_crc, 1566 (unsigned long)calculated_crc); 1567 return -EINVAL; 1568 } 1569 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1570 0, 0, fw_data, fw_size); 1571 if (rc == 0) /* Firmware update successful */ 1572 rc = bnxt_firmware_reset(dev, dir_type); 1573 1574 return rc; 1575 } 1576 1577 static int bnxt_flash_microcode(struct net_device *dev, 1578 u16 dir_type, 1579 const u8 *fw_data, 1580 size_t fw_size) 1581 { 1582 struct bnxt_ucode_trailer *trailer; 1583 u32 calculated_crc; 1584 u32 stored_crc; 1585 int rc = 0; 1586 1587 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 1588 netdev_err(dev, "Invalid microcode file size: %u\n", 1589 (unsigned int)fw_size); 1590 return -EINVAL; 1591 } 1592 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 1593 sizeof(*trailer))); 1594 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 1595 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 1596 le32_to_cpu(trailer->sig)); 1597 return -EINVAL; 1598 } 1599 if (le16_to_cpu(trailer->dir_type) != dir_type) { 1600 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 1601 dir_type, le16_to_cpu(trailer->dir_type)); 1602 return -EINVAL; 1603 } 1604 if (le16_to_cpu(trailer->trailer_length) < 1605 sizeof(struct bnxt_ucode_trailer)) { 1606 netdev_err(dev, "Invalid microcode trailer length: %d\n", 1607 le16_to_cpu(trailer->trailer_length)); 1608 return -EINVAL; 1609 } 1610 1611 /* Confirm the CRC32 checksum of the file: */ 1612 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1613 sizeof(stored_crc))); 1614 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1615 if (calculated_crc != stored_crc) { 1616 netdev_err(dev, 1617 "CRC32 (%08lX) does not match calculated: %08lX\n", 1618 (unsigned long)stored_crc, 1619 (unsigned long)calculated_crc); 1620 return -EINVAL; 1621 } 1622 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1623 0, 0, fw_data, fw_size); 1624 1625 return rc; 1626 } 1627 1628 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 1629 { 1630 switch (dir_type) { 1631 case BNX_DIR_TYPE_CHIMP_PATCH: 1632 case BNX_DIR_TYPE_BOOTCODE: 1633 case BNX_DIR_TYPE_BOOTCODE_2: 1634 case BNX_DIR_TYPE_APE_FW: 1635 case BNX_DIR_TYPE_APE_PATCH: 1636 case BNX_DIR_TYPE_KONG_FW: 1637 case BNX_DIR_TYPE_KONG_PATCH: 1638 case BNX_DIR_TYPE_BONO_FW: 1639 case BNX_DIR_TYPE_BONO_PATCH: 1640 return true; 1641 } 1642 1643 return false; 1644 } 1645 1646 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 1647 { 1648 switch (dir_type) { 1649 case BNX_DIR_TYPE_AVS: 1650 case BNX_DIR_TYPE_EXP_ROM_MBA: 1651 case BNX_DIR_TYPE_PCIE: 1652 case BNX_DIR_TYPE_TSCF_UCODE: 1653 case BNX_DIR_TYPE_EXT_PHY: 1654 case BNX_DIR_TYPE_CCM: 1655 case BNX_DIR_TYPE_ISCSI_BOOT: 1656 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 1657 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 1658 return true; 1659 } 1660 1661 return false; 1662 } 1663 1664 static bool bnxt_dir_type_is_executable(u16 dir_type) 1665 { 1666 return bnxt_dir_type_is_ape_bin_format(dir_type) || 1667 bnxt_dir_type_is_other_exec_format(dir_type); 1668 } 1669 1670 static int bnxt_flash_firmware_from_file(struct net_device *dev, 1671 u16 dir_type, 1672 const char *filename) 1673 { 1674 const struct firmware *fw; 1675 int rc; 1676 1677 rc = request_firmware(&fw, filename, &dev->dev); 1678 if (rc != 0) { 1679 netdev_err(dev, "Error %d requesting firmware file: %s\n", 1680 rc, filename); 1681 return rc; 1682 } 1683 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true) 1684 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 1685 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true) 1686 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 1687 else 1688 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1689 0, 0, fw->data, fw->size); 1690 release_firmware(fw); 1691 return rc; 1692 } 1693 1694 static int bnxt_flash_package_from_file(struct net_device *dev, 1695 char *filename, u32 install_type) 1696 { 1697 struct bnxt *bp = netdev_priv(dev); 1698 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr; 1699 struct hwrm_nvm_install_update_input install = {0}; 1700 const struct firmware *fw; 1701 u32 item_len; 1702 u16 index; 1703 int rc; 1704 1705 bnxt_hwrm_fw_set_time(bp); 1706 1707 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 1708 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1709 &index, &item_len, NULL) != 0) { 1710 netdev_err(dev, "PKG update area not created in nvram\n"); 1711 return -ENOBUFS; 1712 } 1713 1714 rc = request_firmware(&fw, filename, &dev->dev); 1715 if (rc != 0) { 1716 netdev_err(dev, "PKG error %d requesting file: %s\n", 1717 rc, filename); 1718 return rc; 1719 } 1720 1721 if (fw->size > item_len) { 1722 netdev_err(dev, "PKG insufficient update area in nvram: %lu", 1723 (unsigned long)fw->size); 1724 rc = -EFBIG; 1725 } else { 1726 dma_addr_t dma_handle; 1727 u8 *kmem; 1728 struct hwrm_nvm_modify_input modify = {0}; 1729 1730 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1); 1731 1732 modify.dir_idx = cpu_to_le16(index); 1733 modify.len = cpu_to_le32(fw->size); 1734 1735 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size, 1736 &dma_handle, GFP_KERNEL); 1737 if (!kmem) { 1738 netdev_err(dev, 1739 "dma_alloc_coherent failure, length = %u\n", 1740 (unsigned int)fw->size); 1741 rc = -ENOMEM; 1742 } else { 1743 memcpy(kmem, fw->data, fw->size); 1744 modify.host_src_addr = cpu_to_le64(dma_handle); 1745 1746 rc = hwrm_send_message(bp, &modify, sizeof(modify), 1747 FLASH_PACKAGE_TIMEOUT); 1748 dma_free_coherent(&bp->pdev->dev, fw->size, kmem, 1749 dma_handle); 1750 } 1751 } 1752 release_firmware(fw); 1753 if (rc) 1754 return rc; 1755 1756 if ((install_type & 0xffff) == 0) 1757 install_type >>= 16; 1758 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1); 1759 install.install_type = cpu_to_le32(install_type); 1760 1761 mutex_lock(&bp->hwrm_cmd_lock); 1762 rc = _hwrm_send_message(bp, &install, sizeof(install), 1763 INSTALL_PACKAGE_TIMEOUT); 1764 if (rc) { 1765 rc = -EOPNOTSUPP; 1766 goto flash_pkg_exit; 1767 } 1768 1769 if (resp->error_code) { 1770 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err; 1771 1772 if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { 1773 install.flags |= cpu_to_le16( 1774 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 1775 rc = _hwrm_send_message(bp, &install, sizeof(install), 1776 INSTALL_PACKAGE_TIMEOUT); 1777 if (rc) { 1778 rc = -EOPNOTSUPP; 1779 goto flash_pkg_exit; 1780 } 1781 } 1782 } 1783 1784 if (resp->result) { 1785 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 1786 (s8)resp->result, (int)resp->problem_item); 1787 rc = -ENOPKG; 1788 } 1789 flash_pkg_exit: 1790 mutex_unlock(&bp->hwrm_cmd_lock); 1791 return rc; 1792 } 1793 1794 static int bnxt_flash_device(struct net_device *dev, 1795 struct ethtool_flash *flash) 1796 { 1797 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 1798 netdev_err(dev, "flashdev not supported from a virtual function\n"); 1799 return -EINVAL; 1800 } 1801 1802 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 1803 flash->region > 0xffff) 1804 return bnxt_flash_package_from_file(dev, flash->data, 1805 flash->region); 1806 1807 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 1808 } 1809 1810 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 1811 { 1812 struct bnxt *bp = netdev_priv(dev); 1813 int rc; 1814 struct hwrm_nvm_get_dir_info_input req = {0}; 1815 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr; 1816 1817 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1); 1818 1819 mutex_lock(&bp->hwrm_cmd_lock); 1820 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1821 if (!rc) { 1822 *entries = le32_to_cpu(output->entries); 1823 *length = le32_to_cpu(output->entry_length); 1824 } 1825 mutex_unlock(&bp->hwrm_cmd_lock); 1826 return rc; 1827 } 1828 1829 static int bnxt_get_eeprom_len(struct net_device *dev) 1830 { 1831 struct bnxt *bp = netdev_priv(dev); 1832 1833 if (BNXT_VF(bp)) 1834 return 0; 1835 1836 /* The -1 return value allows the entire 32-bit range of offsets to be 1837 * passed via the ethtool command-line utility. 1838 */ 1839 return -1; 1840 } 1841 1842 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 1843 { 1844 struct bnxt *bp = netdev_priv(dev); 1845 int rc; 1846 u32 dir_entries; 1847 u32 entry_length; 1848 u8 *buf; 1849 size_t buflen; 1850 dma_addr_t dma_handle; 1851 struct hwrm_nvm_get_dir_entries_input req = {0}; 1852 1853 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 1854 if (rc != 0) 1855 return rc; 1856 1857 /* Insert 2 bytes of directory info (count and size of entries) */ 1858 if (len < 2) 1859 return -EINVAL; 1860 1861 *data++ = dir_entries; 1862 *data++ = entry_length; 1863 len -= 2; 1864 memset(data, 0xff, len); 1865 1866 buflen = dir_entries * entry_length; 1867 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle, 1868 GFP_KERNEL); 1869 if (!buf) { 1870 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1871 (unsigned)buflen); 1872 return -ENOMEM; 1873 } 1874 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1); 1875 req.host_dest_addr = cpu_to_le64(dma_handle); 1876 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1877 if (rc == 0) 1878 memcpy(data, buf, len > buflen ? buflen : len); 1879 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle); 1880 return rc; 1881 } 1882 1883 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 1884 u32 length, u8 *data) 1885 { 1886 struct bnxt *bp = netdev_priv(dev); 1887 int rc; 1888 u8 *buf; 1889 dma_addr_t dma_handle; 1890 struct hwrm_nvm_read_input req = {0}; 1891 1892 if (!length) 1893 return -EINVAL; 1894 1895 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle, 1896 GFP_KERNEL); 1897 if (!buf) { 1898 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1899 (unsigned)length); 1900 return -ENOMEM; 1901 } 1902 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1); 1903 req.host_dest_addr = cpu_to_le64(dma_handle); 1904 req.dir_idx = cpu_to_le16(index); 1905 req.offset = cpu_to_le32(offset); 1906 req.len = cpu_to_le32(length); 1907 1908 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1909 if (rc == 0) 1910 memcpy(data, buf, length); 1911 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle); 1912 return rc; 1913 } 1914 1915 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1916 u16 ext, u16 *index, u32 *item_length, 1917 u32 *data_length) 1918 { 1919 struct bnxt *bp = netdev_priv(dev); 1920 int rc; 1921 struct hwrm_nvm_find_dir_entry_input req = {0}; 1922 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr; 1923 1924 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1); 1925 req.enables = 0; 1926 req.dir_idx = 0; 1927 req.dir_type = cpu_to_le16(type); 1928 req.dir_ordinal = cpu_to_le16(ordinal); 1929 req.dir_ext = cpu_to_le16(ext); 1930 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 1931 mutex_lock(&bp->hwrm_cmd_lock); 1932 rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1933 if (rc == 0) { 1934 if (index) 1935 *index = le16_to_cpu(output->dir_idx); 1936 if (item_length) 1937 *item_length = le32_to_cpu(output->dir_item_length); 1938 if (data_length) 1939 *data_length = le32_to_cpu(output->dir_data_length); 1940 } 1941 mutex_unlock(&bp->hwrm_cmd_lock); 1942 return rc; 1943 } 1944 1945 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 1946 { 1947 char *retval = NULL; 1948 char *p; 1949 char *value; 1950 int field = 0; 1951 1952 if (datalen < 1) 1953 return NULL; 1954 /* null-terminate the log data (removing last '\n'): */ 1955 data[datalen - 1] = 0; 1956 for (p = data; *p != 0; p++) { 1957 field = 0; 1958 retval = NULL; 1959 while (*p != 0 && *p != '\n') { 1960 value = p; 1961 while (*p != 0 && *p != '\t' && *p != '\n') 1962 p++; 1963 if (field == desired_field) 1964 retval = value; 1965 if (*p != '\t') 1966 break; 1967 *p = 0; 1968 field++; 1969 p++; 1970 } 1971 if (*p == 0) 1972 break; 1973 *p = 0; 1974 } 1975 return retval; 1976 } 1977 1978 static void bnxt_get_pkgver(struct net_device *dev) 1979 { 1980 struct bnxt *bp = netdev_priv(dev); 1981 u16 index = 0; 1982 char *pkgver; 1983 u32 pkglen; 1984 u8 *pkgbuf; 1985 int len; 1986 1987 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 1988 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1989 &index, NULL, &pkglen) != 0) 1990 return; 1991 1992 pkgbuf = kzalloc(pkglen, GFP_KERNEL); 1993 if (!pkgbuf) { 1994 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n", 1995 pkglen); 1996 return; 1997 } 1998 1999 if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf)) 2000 goto err; 2001 2002 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf, 2003 pkglen); 2004 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) { 2005 len = strlen(bp->fw_ver_str); 2006 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1, 2007 "/pkg %s", pkgver); 2008 } 2009 err: 2010 kfree(pkgbuf); 2011 } 2012 2013 static int bnxt_get_eeprom(struct net_device *dev, 2014 struct ethtool_eeprom *eeprom, 2015 u8 *data) 2016 { 2017 u32 index; 2018 u32 offset; 2019 2020 if (eeprom->offset == 0) /* special offset value to get directory */ 2021 return bnxt_get_nvram_directory(dev, eeprom->len, data); 2022 2023 index = eeprom->offset >> 24; 2024 offset = eeprom->offset & 0xffffff; 2025 2026 if (index == 0) { 2027 netdev_err(dev, "unsupported index value: %d\n", index); 2028 return -EINVAL; 2029 } 2030 2031 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 2032 } 2033 2034 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 2035 { 2036 struct bnxt *bp = netdev_priv(dev); 2037 struct hwrm_nvm_erase_dir_entry_input req = {0}; 2038 2039 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1); 2040 req.dir_idx = cpu_to_le16(index); 2041 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2042 } 2043 2044 static int bnxt_set_eeprom(struct net_device *dev, 2045 struct ethtool_eeprom *eeprom, 2046 u8 *data) 2047 { 2048 struct bnxt *bp = netdev_priv(dev); 2049 u8 index, dir_op; 2050 u16 type, ext, ordinal, attr; 2051 2052 if (!BNXT_PF(bp)) { 2053 netdev_err(dev, "NVM write not supported from a virtual function\n"); 2054 return -EINVAL; 2055 } 2056 2057 type = eeprom->magic >> 16; 2058 2059 if (type == 0xffff) { /* special value for directory operations */ 2060 index = eeprom->magic & 0xff; 2061 dir_op = eeprom->magic >> 8; 2062 if (index == 0) 2063 return -EINVAL; 2064 switch (dir_op) { 2065 case 0x0e: /* erase */ 2066 if (eeprom->offset != ~eeprom->magic) 2067 return -EINVAL; 2068 return bnxt_erase_nvram_directory(dev, index - 1); 2069 default: 2070 return -EINVAL; 2071 } 2072 } 2073 2074 /* Create or re-write an NVM item: */ 2075 if (bnxt_dir_type_is_executable(type) == true) 2076 return -EOPNOTSUPP; 2077 ext = eeprom->magic & 0xffff; 2078 ordinal = eeprom->offset >> 16; 2079 attr = eeprom->offset & 0xffff; 2080 2081 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data, 2082 eeprom->len); 2083 } 2084 2085 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 2086 { 2087 struct bnxt *bp = netdev_priv(dev); 2088 struct ethtool_eee *eee = &bp->eee; 2089 struct bnxt_link_info *link_info = &bp->link_info; 2090 u32 advertising = 2091 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 2092 int rc = 0; 2093 2094 if (!BNXT_SINGLE_PF(bp)) 2095 return -EOPNOTSUPP; 2096 2097 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 2098 return -EOPNOTSUPP; 2099 2100 if (!edata->eee_enabled) 2101 goto eee_ok; 2102 2103 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 2104 netdev_warn(dev, "EEE requires autoneg\n"); 2105 return -EINVAL; 2106 } 2107 if (edata->tx_lpi_enabled) { 2108 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 2109 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 2110 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 2111 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 2112 return -EINVAL; 2113 } else if (!bp->lpi_tmr_hi) { 2114 edata->tx_lpi_timer = eee->tx_lpi_timer; 2115 } 2116 } 2117 if (!edata->advertised) { 2118 edata->advertised = advertising & eee->supported; 2119 } else if (edata->advertised & ~advertising) { 2120 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 2121 edata->advertised, advertising); 2122 return -EINVAL; 2123 } 2124 2125 eee->advertised = edata->advertised; 2126 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 2127 eee->tx_lpi_timer = edata->tx_lpi_timer; 2128 eee_ok: 2129 eee->eee_enabled = edata->eee_enabled; 2130 2131 if (netif_running(dev)) 2132 rc = bnxt_hwrm_set_link_setting(bp, false, true); 2133 2134 return rc; 2135 } 2136 2137 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 2138 { 2139 struct bnxt *bp = netdev_priv(dev); 2140 2141 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 2142 return -EOPNOTSUPP; 2143 2144 *edata = bp->eee; 2145 if (!bp->eee.eee_enabled) { 2146 /* Preserve tx_lpi_timer so that the last value will be used 2147 * by default when it is re-enabled. 2148 */ 2149 edata->advertised = 0; 2150 edata->tx_lpi_enabled = 0; 2151 } 2152 2153 if (!bp->eee.eee_active) 2154 edata->lp_advertised = 0; 2155 2156 return 0; 2157 } 2158 2159 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 2160 u16 page_number, u16 start_addr, 2161 u16 data_length, u8 *buf) 2162 { 2163 struct hwrm_port_phy_i2c_read_input req = {0}; 2164 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; 2165 int rc, byte_offset = 0; 2166 2167 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); 2168 req.i2c_slave_addr = i2c_addr; 2169 req.page_number = cpu_to_le16(page_number); 2170 req.port_id = cpu_to_le16(bp->pf.port_id); 2171 do { 2172 u16 xfer_size; 2173 2174 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 2175 data_length -= xfer_size; 2176 req.page_offset = cpu_to_le16(start_addr + byte_offset); 2177 req.data_length = xfer_size; 2178 req.enables = cpu_to_le32(start_addr + byte_offset ? 2179 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); 2180 mutex_lock(&bp->hwrm_cmd_lock); 2181 rc = _hwrm_send_message(bp, &req, sizeof(req), 2182 HWRM_CMD_TIMEOUT); 2183 if (!rc) 2184 memcpy(buf + byte_offset, output->data, xfer_size); 2185 mutex_unlock(&bp->hwrm_cmd_lock); 2186 byte_offset += xfer_size; 2187 } while (!rc && data_length > 0); 2188 2189 return rc; 2190 } 2191 2192 static int bnxt_get_module_info(struct net_device *dev, 2193 struct ethtool_modinfo *modinfo) 2194 { 2195 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1]; 2196 struct bnxt *bp = netdev_priv(dev); 2197 int rc; 2198 2199 /* No point in going further if phy status indicates 2200 * module is not inserted or if it is powered down or 2201 * if it is of type 10GBase-T 2202 */ 2203 if (bp->link_info.module_status > 2204 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 2205 return -EOPNOTSUPP; 2206 2207 /* This feature is not supported in older firmware versions */ 2208 if (bp->hwrm_spec_code < 0x10202) 2209 return -EOPNOTSUPP; 2210 2211 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 2212 SFF_DIAG_SUPPORT_OFFSET + 1, 2213 data); 2214 if (!rc) { 2215 u8 module_id = data[0]; 2216 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET]; 2217 2218 switch (module_id) { 2219 case SFF_MODULE_ID_SFP: 2220 modinfo->type = ETH_MODULE_SFF_8472; 2221 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 2222 if (!diag_supported) 2223 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2224 break; 2225 case SFF_MODULE_ID_QSFP: 2226 case SFF_MODULE_ID_QSFP_PLUS: 2227 modinfo->type = ETH_MODULE_SFF_8436; 2228 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2229 break; 2230 case SFF_MODULE_ID_QSFP28: 2231 modinfo->type = ETH_MODULE_SFF_8636; 2232 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 2233 break; 2234 default: 2235 rc = -EOPNOTSUPP; 2236 break; 2237 } 2238 } 2239 return rc; 2240 } 2241 2242 static int bnxt_get_module_eeprom(struct net_device *dev, 2243 struct ethtool_eeprom *eeprom, 2244 u8 *data) 2245 { 2246 struct bnxt *bp = netdev_priv(dev); 2247 u16 start = eeprom->offset, length = eeprom->len; 2248 int rc = 0; 2249 2250 memset(data, 0, eeprom->len); 2251 2252 /* Read A0 portion of the EEPROM */ 2253 if (start < ETH_MODULE_SFF_8436_LEN) { 2254 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 2255 length = ETH_MODULE_SFF_8436_LEN - start; 2256 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 2257 start, length, data); 2258 if (rc) 2259 return rc; 2260 start += length; 2261 data += length; 2262 length = eeprom->len - length; 2263 } 2264 2265 /* Read A2 portion of the EEPROM */ 2266 if (length) { 2267 start -= ETH_MODULE_SFF_8436_LEN; 2268 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, 2269 start, length, data); 2270 } 2271 return rc; 2272 } 2273 2274 static int bnxt_nway_reset(struct net_device *dev) 2275 { 2276 int rc = 0; 2277 2278 struct bnxt *bp = netdev_priv(dev); 2279 struct bnxt_link_info *link_info = &bp->link_info; 2280 2281 if (!BNXT_SINGLE_PF(bp)) 2282 return -EOPNOTSUPP; 2283 2284 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 2285 return -EINVAL; 2286 2287 if (netif_running(dev)) 2288 rc = bnxt_hwrm_set_link_setting(bp, true, false); 2289 2290 return rc; 2291 } 2292 2293 static int bnxt_set_phys_id(struct net_device *dev, 2294 enum ethtool_phys_id_state state) 2295 { 2296 struct hwrm_port_led_cfg_input req = {0}; 2297 struct bnxt *bp = netdev_priv(dev); 2298 struct bnxt_pf_info *pf = &bp->pf; 2299 struct bnxt_led_cfg *led_cfg; 2300 u8 led_state; 2301 __le16 duration; 2302 int i, rc; 2303 2304 if (!bp->num_leds || BNXT_VF(bp)) 2305 return -EOPNOTSUPP; 2306 2307 if (state == ETHTOOL_ID_ACTIVE) { 2308 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 2309 duration = cpu_to_le16(500); 2310 } else if (state == ETHTOOL_ID_INACTIVE) { 2311 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 2312 duration = cpu_to_le16(0); 2313 } else { 2314 return -EINVAL; 2315 } 2316 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1); 2317 req.port_id = cpu_to_le16(pf->port_id); 2318 req.num_leds = bp->num_leds; 2319 led_cfg = (struct bnxt_led_cfg *)&req.led0_id; 2320 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 2321 req.enables |= BNXT_LED_DFLT_ENABLES(i); 2322 led_cfg->led_id = bp->leds[i].led_id; 2323 led_cfg->led_state = led_state; 2324 led_cfg->led_blink_on = duration; 2325 led_cfg->led_blink_off = duration; 2326 led_cfg->led_group_id = bp->leds[i].led_group_id; 2327 } 2328 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2329 if (rc) 2330 rc = -EIO; 2331 return rc; 2332 } 2333 2334 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 2335 { 2336 struct hwrm_selftest_irq_input req = {0}; 2337 2338 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1); 2339 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2340 } 2341 2342 static int bnxt_test_irq(struct bnxt *bp) 2343 { 2344 int i; 2345 2346 for (i = 0; i < bp->cp_nr_rings; i++) { 2347 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 2348 int rc; 2349 2350 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 2351 if (rc) 2352 return rc; 2353 } 2354 return 0; 2355 } 2356 2357 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 2358 { 2359 struct hwrm_port_mac_cfg_input req = {0}; 2360 2361 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1); 2362 2363 req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 2364 if (enable) 2365 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 2366 else 2367 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 2368 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2369 } 2370 2371 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 2372 struct hwrm_port_phy_cfg_input *req) 2373 { 2374 struct bnxt_link_info *link_info = &bp->link_info; 2375 u16 fw_advertising = link_info->advertising; 2376 u16 fw_speed; 2377 int rc; 2378 2379 if (!link_info->autoneg) 2380 return 0; 2381 2382 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 2383 if (netif_carrier_ok(bp->dev)) 2384 fw_speed = bp->link_info.link_speed; 2385 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 2386 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 2387 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 2388 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 2389 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 2390 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 2391 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 2392 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 2393 2394 req->force_link_speed = cpu_to_le16(fw_speed); 2395 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 2396 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2397 rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT); 2398 req->flags = 0; 2399 req->force_link_speed = cpu_to_le16(0); 2400 return rc; 2401 } 2402 2403 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext) 2404 { 2405 struct hwrm_port_phy_cfg_input req = {0}; 2406 2407 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1); 2408 2409 if (enable) { 2410 bnxt_disable_an_for_lpbk(bp, &req); 2411 if (ext) 2412 req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL; 2413 else 2414 req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 2415 } else { 2416 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 2417 } 2418 req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 2419 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2420 } 2421 2422 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi, 2423 u32 raw_cons, int pkt_size) 2424 { 2425 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 2426 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; 2427 struct bnxt_sw_rx_bd *rx_buf; 2428 struct rx_cmp *rxcmp; 2429 u16 cp_cons, cons; 2430 u8 *data; 2431 u32 len; 2432 int i; 2433 2434 cp_cons = RING_CMP(raw_cons); 2435 rxcmp = (struct rx_cmp *) 2436 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 2437 cons = rxcmp->rx_cmp_opaque; 2438 rx_buf = &rxr->rx_buf_ring[cons]; 2439 data = rx_buf->data_ptr; 2440 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 2441 if (len != pkt_size) 2442 return -EIO; 2443 i = ETH_ALEN; 2444 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 2445 return -EIO; 2446 i += ETH_ALEN; 2447 for ( ; i < pkt_size; i++) { 2448 if (data[i] != (u8)(i & 0xff)) 2449 return -EIO; 2450 } 2451 return 0; 2452 } 2453 2454 static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size) 2455 { 2456 struct bnxt_napi *bnapi = bp->bnapi[0]; 2457 struct bnxt_cp_ring_info *cpr; 2458 struct tx_cmp *txcmp; 2459 int rc = -EIO; 2460 u32 raw_cons; 2461 u32 cons; 2462 int i; 2463 2464 cpr = &bnapi->cp_ring; 2465 raw_cons = cpr->cp_raw_cons; 2466 for (i = 0; i < 200; i++) { 2467 cons = RING_CMP(raw_cons); 2468 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 2469 2470 if (!TX_CMP_VALID(txcmp, raw_cons)) { 2471 udelay(5); 2472 continue; 2473 } 2474 2475 /* The valid test of the entry must be done first before 2476 * reading any further. 2477 */ 2478 dma_rmb(); 2479 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 2480 rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size); 2481 raw_cons = NEXT_RAW_CMP(raw_cons); 2482 raw_cons = NEXT_RAW_CMP(raw_cons); 2483 break; 2484 } 2485 raw_cons = NEXT_RAW_CMP(raw_cons); 2486 } 2487 cpr->cp_raw_cons = raw_cons; 2488 return rc; 2489 } 2490 2491 static int bnxt_run_loopback(struct bnxt *bp) 2492 { 2493 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 2494 int pkt_size, i = 0; 2495 struct sk_buff *skb; 2496 dma_addr_t map; 2497 u8 *data; 2498 int rc; 2499 2500 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 2501 skb = netdev_alloc_skb(bp->dev, pkt_size); 2502 if (!skb) 2503 return -ENOMEM; 2504 data = skb_put(skb, pkt_size); 2505 eth_broadcast_addr(data); 2506 i += ETH_ALEN; 2507 ether_addr_copy(&data[i], bp->dev->dev_addr); 2508 i += ETH_ALEN; 2509 for ( ; i < pkt_size; i++) 2510 data[i] = (u8)(i & 0xff); 2511 2512 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 2513 PCI_DMA_TODEVICE); 2514 if (dma_mapping_error(&bp->pdev->dev, map)) { 2515 dev_kfree_skb(skb); 2516 return -EIO; 2517 } 2518 bnxt_xmit_xdp(bp, txr, map, pkt_size, 0); 2519 2520 /* Sync BD data before updating doorbell */ 2521 wmb(); 2522 2523 bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod); 2524 rc = bnxt_poll_loopback(bp, pkt_size); 2525 2526 dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE); 2527 dev_kfree_skb(skb); 2528 return rc; 2529 } 2530 2531 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 2532 { 2533 struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr; 2534 struct hwrm_selftest_exec_input req = {0}; 2535 int rc; 2536 2537 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1); 2538 mutex_lock(&bp->hwrm_cmd_lock); 2539 resp->test_success = 0; 2540 req.flags = test_mask; 2541 rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout); 2542 *test_results = resp->test_success; 2543 mutex_unlock(&bp->hwrm_cmd_lock); 2544 return rc; 2545 } 2546 2547 #define BNXT_DRV_TESTS 4 2548 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 2549 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 2550 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 2551 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3) 2552 2553 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 2554 u64 *buf) 2555 { 2556 struct bnxt *bp = netdev_priv(dev); 2557 bool do_ext_lpbk = false; 2558 bool offline = false; 2559 u8 test_results = 0; 2560 u8 test_mask = 0; 2561 int rc, i; 2562 2563 if (!bp->num_tests || !BNXT_SINGLE_PF(bp)) 2564 return; 2565 memset(buf, 0, sizeof(u64) * bp->num_tests); 2566 if (!netif_running(dev)) { 2567 etest->flags |= ETH_TEST_FL_FAILED; 2568 return; 2569 } 2570 2571 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) && 2572 (bp->test_info->flags & BNXT_TEST_FL_EXT_LPBK)) 2573 do_ext_lpbk = true; 2574 2575 if (etest->flags & ETH_TEST_FL_OFFLINE) { 2576 if (bp->pf.active_vfs) { 2577 etest->flags |= ETH_TEST_FL_FAILED; 2578 netdev_warn(dev, "Offline tests cannot be run with active VFs\n"); 2579 return; 2580 } 2581 offline = true; 2582 } 2583 2584 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2585 u8 bit_val = 1 << i; 2586 2587 if (!(bp->test_info->offline_mask & bit_val)) 2588 test_mask |= bit_val; 2589 else if (offline) 2590 test_mask |= bit_val; 2591 } 2592 if (!offline) { 2593 bnxt_run_fw_tests(bp, test_mask, &test_results); 2594 } else { 2595 rc = bnxt_close_nic(bp, false, false); 2596 if (rc) 2597 return; 2598 bnxt_run_fw_tests(bp, test_mask, &test_results); 2599 2600 buf[BNXT_MACLPBK_TEST_IDX] = 1; 2601 bnxt_hwrm_mac_loopback(bp, true); 2602 msleep(250); 2603 rc = bnxt_half_open_nic(bp); 2604 if (rc) { 2605 bnxt_hwrm_mac_loopback(bp, false); 2606 etest->flags |= ETH_TEST_FL_FAILED; 2607 return; 2608 } 2609 if (bnxt_run_loopback(bp)) 2610 etest->flags |= ETH_TEST_FL_FAILED; 2611 else 2612 buf[BNXT_MACLPBK_TEST_IDX] = 0; 2613 2614 bnxt_hwrm_mac_loopback(bp, false); 2615 bnxt_hwrm_phy_loopback(bp, true, false); 2616 msleep(1000); 2617 if (bnxt_run_loopback(bp)) { 2618 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 2619 etest->flags |= ETH_TEST_FL_FAILED; 2620 } 2621 if (do_ext_lpbk) { 2622 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; 2623 bnxt_hwrm_phy_loopback(bp, true, true); 2624 msleep(1000); 2625 if (bnxt_run_loopback(bp)) { 2626 buf[BNXT_EXTLPBK_TEST_IDX] = 1; 2627 etest->flags |= ETH_TEST_FL_FAILED; 2628 } 2629 } 2630 bnxt_hwrm_phy_loopback(bp, false, false); 2631 bnxt_half_close_nic(bp); 2632 bnxt_open_nic(bp, false, true); 2633 } 2634 if (bnxt_test_irq(bp)) { 2635 buf[BNXT_IRQ_TEST_IDX] = 1; 2636 etest->flags |= ETH_TEST_FL_FAILED; 2637 } 2638 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2639 u8 bit_val = 1 << i; 2640 2641 if ((test_mask & bit_val) && !(test_results & bit_val)) { 2642 buf[i] = 1; 2643 etest->flags |= ETH_TEST_FL_FAILED; 2644 } 2645 } 2646 } 2647 2648 static int bnxt_reset(struct net_device *dev, u32 *flags) 2649 { 2650 struct bnxt *bp = netdev_priv(dev); 2651 int rc = 0; 2652 2653 if (!BNXT_PF(bp)) { 2654 netdev_err(dev, "Reset is not supported from a VF\n"); 2655 return -EOPNOTSUPP; 2656 } 2657 2658 if (pci_vfs_assigned(bp->pdev)) { 2659 netdev_err(dev, 2660 "Reset not allowed when VFs are assigned to VMs\n"); 2661 return -EBUSY; 2662 } 2663 2664 if (*flags == ETH_RESET_ALL) { 2665 /* This feature is not supported in older firmware versions */ 2666 if (bp->hwrm_spec_code < 0x10803) 2667 return -EOPNOTSUPP; 2668 2669 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP); 2670 if (!rc) { 2671 netdev_info(dev, "Reset request successful. Reload driver to complete reset\n"); 2672 *flags = 0; 2673 } 2674 } else if (*flags == ETH_RESET_AP) { 2675 /* This feature is not supported in older firmware versions */ 2676 if (bp->hwrm_spec_code < 0x10803) 2677 return -EOPNOTSUPP; 2678 2679 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP); 2680 if (!rc) { 2681 netdev_info(dev, "Reset Application Processor request successful.\n"); 2682 *flags = 0; 2683 } 2684 } else { 2685 rc = -EINVAL; 2686 } 2687 2688 return rc; 2689 } 2690 2691 static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len, 2692 struct bnxt_hwrm_dbg_dma_info *info) 2693 { 2694 struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr; 2695 struct hwrm_dbg_cmn_input *cmn_req = msg; 2696 __le16 *seq_ptr = msg + info->seq_off; 2697 u16 seq = 0, len, segs_off; 2698 void *resp = cmn_resp; 2699 dma_addr_t dma_handle; 2700 int rc, off = 0; 2701 void *dma_buf; 2702 2703 dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle, 2704 GFP_KERNEL); 2705 if (!dma_buf) 2706 return -ENOMEM; 2707 2708 segs_off = offsetof(struct hwrm_dbg_coredump_list_output, 2709 total_segments); 2710 cmn_req->host_dest_addr = cpu_to_le64(dma_handle); 2711 cmn_req->host_buf_len = cpu_to_le32(info->dma_len); 2712 mutex_lock(&bp->hwrm_cmd_lock); 2713 while (1) { 2714 *seq_ptr = cpu_to_le16(seq); 2715 rc = _hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT); 2716 if (rc) 2717 break; 2718 2719 len = le16_to_cpu(*((__le16 *)(resp + info->data_len_off))); 2720 if (!seq && 2721 cmn_req->req_type == cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) { 2722 info->segs = le16_to_cpu(*((__le16 *)(resp + 2723 segs_off))); 2724 if (!info->segs) { 2725 rc = -EIO; 2726 break; 2727 } 2728 2729 info->dest_buf_size = info->segs * 2730 sizeof(struct coredump_segment_record); 2731 info->dest_buf = kmalloc(info->dest_buf_size, 2732 GFP_KERNEL); 2733 if (!info->dest_buf) { 2734 rc = -ENOMEM; 2735 break; 2736 } 2737 } 2738 2739 if (info->dest_buf) 2740 memcpy(info->dest_buf + off, dma_buf, len); 2741 2742 if (cmn_req->req_type == 2743 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE)) 2744 info->dest_buf_size += len; 2745 2746 if (!(cmn_resp->flags & HWRM_DBG_CMN_FLAGS_MORE)) 2747 break; 2748 2749 seq++; 2750 off += len; 2751 } 2752 mutex_unlock(&bp->hwrm_cmd_lock); 2753 dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle); 2754 return rc; 2755 } 2756 2757 static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp, 2758 struct bnxt_coredump *coredump) 2759 { 2760 struct hwrm_dbg_coredump_list_input req = {0}; 2761 struct bnxt_hwrm_dbg_dma_info info = {NULL}; 2762 int rc; 2763 2764 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1); 2765 2766 info.dma_len = COREDUMP_LIST_BUF_LEN; 2767 info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no); 2768 info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output, 2769 data_len); 2770 2771 rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info); 2772 if (!rc) { 2773 coredump->data = info.dest_buf; 2774 coredump->data_size = info.dest_buf_size; 2775 coredump->total_segs = info.segs; 2776 } 2777 return rc; 2778 } 2779 2780 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id, 2781 u16 segment_id) 2782 { 2783 struct hwrm_dbg_coredump_initiate_input req = {0}; 2784 2785 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1); 2786 req.component_id = cpu_to_le16(component_id); 2787 req.segment_id = cpu_to_le16(segment_id); 2788 2789 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2790 } 2791 2792 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id, 2793 u16 segment_id, u32 *seg_len, 2794 void *buf, u32 offset) 2795 { 2796 struct hwrm_dbg_coredump_retrieve_input req = {0}; 2797 struct bnxt_hwrm_dbg_dma_info info = {NULL}; 2798 int rc; 2799 2800 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1); 2801 req.component_id = cpu_to_le16(component_id); 2802 req.segment_id = cpu_to_le16(segment_id); 2803 2804 info.dma_len = COREDUMP_RETRIEVE_BUF_LEN; 2805 info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input, 2806 seq_no); 2807 info.data_len_off = offsetof(struct hwrm_dbg_coredump_retrieve_output, 2808 data_len); 2809 if (buf) 2810 info.dest_buf = buf + offset; 2811 2812 rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info); 2813 if (!rc) 2814 *seg_len = info.dest_buf_size; 2815 2816 return rc; 2817 } 2818 2819 static void 2820 bnxt_fill_coredump_seg_hdr(struct bnxt *bp, 2821 struct bnxt_coredump_segment_hdr *seg_hdr, 2822 struct coredump_segment_record *seg_rec, u32 seg_len, 2823 int status, u32 duration, u32 instance) 2824 { 2825 memset(seg_hdr, 0, sizeof(*seg_hdr)); 2826 memcpy(seg_hdr->signature, "sEgM", 4); 2827 if (seg_rec) { 2828 seg_hdr->component_id = (__force __le32)seg_rec->component_id; 2829 seg_hdr->segment_id = (__force __le32)seg_rec->segment_id; 2830 seg_hdr->low_version = seg_rec->version_low; 2831 seg_hdr->high_version = seg_rec->version_hi; 2832 } else { 2833 /* For hwrm_ver_get response Component id = 2 2834 * and Segment id = 0 2835 */ 2836 seg_hdr->component_id = cpu_to_le32(2); 2837 seg_hdr->segment_id = 0; 2838 } 2839 seg_hdr->function_id = cpu_to_le16(bp->pdev->devfn); 2840 seg_hdr->length = cpu_to_le32(seg_len); 2841 seg_hdr->status = cpu_to_le32(status); 2842 seg_hdr->duration = cpu_to_le32(duration); 2843 seg_hdr->data_offset = cpu_to_le32(sizeof(*seg_hdr)); 2844 seg_hdr->instance = cpu_to_le32(instance); 2845 } 2846 2847 static void 2848 bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record, 2849 time64_t start, s16 start_utc, u16 total_segs, 2850 int status) 2851 { 2852 time64_t end = ktime_get_real_seconds(); 2853 u32 os_ver_major = 0, os_ver_minor = 0; 2854 struct tm tm; 2855 2856 time64_to_tm(start, 0, &tm); 2857 memset(record, 0, sizeof(*record)); 2858 memcpy(record->signature, "cOrE", 4); 2859 record->flags = 0; 2860 record->low_version = 0; 2861 record->high_version = 1; 2862 record->asic_state = 0; 2863 strlcpy(record->system_name, utsname()->nodename, 2864 sizeof(record->system_name)); 2865 record->year = cpu_to_le16(tm.tm_year); 2866 record->month = cpu_to_le16(tm.tm_mon); 2867 record->day = cpu_to_le16(tm.tm_mday); 2868 record->hour = cpu_to_le16(tm.tm_hour); 2869 record->minute = cpu_to_le16(tm.tm_min); 2870 record->second = cpu_to_le16(tm.tm_sec); 2871 record->utc_bias = cpu_to_le16(start_utc); 2872 strcpy(record->commandline, "ethtool -w"); 2873 record->total_segments = cpu_to_le32(total_segs); 2874 2875 sscanf(utsname()->release, "%u.%u", &os_ver_major, &os_ver_minor); 2876 record->os_ver_major = cpu_to_le32(os_ver_major); 2877 record->os_ver_minor = cpu_to_le32(os_ver_minor); 2878 2879 strlcpy(record->os_name, utsname()->sysname, 32); 2880 time64_to_tm(end, 0, &tm); 2881 record->end_year = cpu_to_le16(tm.tm_year + 1900); 2882 record->end_month = cpu_to_le16(tm.tm_mon + 1); 2883 record->end_day = cpu_to_le16(tm.tm_mday); 2884 record->end_hour = cpu_to_le16(tm.tm_hour); 2885 record->end_minute = cpu_to_le16(tm.tm_min); 2886 record->end_second = cpu_to_le16(tm.tm_sec); 2887 record->end_utc_bias = cpu_to_le16(sys_tz.tz_minuteswest * 60); 2888 record->asic_id1 = cpu_to_le32(bp->chip_num << 16 | 2889 bp->ver_resp.chip_rev << 8 | 2890 bp->ver_resp.chip_metal); 2891 record->asic_id2 = 0; 2892 record->coredump_status = cpu_to_le32(status); 2893 record->ioctl_low_version = 0; 2894 record->ioctl_high_version = 0; 2895 } 2896 2897 static int bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len) 2898 { 2899 u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output); 2900 struct coredump_segment_record *seg_record = NULL; 2901 u32 offset = 0, seg_hdr_len, seg_record_len; 2902 struct bnxt_coredump_segment_hdr seg_hdr; 2903 struct bnxt_coredump coredump = {NULL}; 2904 time64_t start_time; 2905 u16 start_utc; 2906 int rc = 0, i; 2907 2908 start_time = ktime_get_real_seconds(); 2909 start_utc = sys_tz.tz_minuteswest * 60; 2910 seg_hdr_len = sizeof(seg_hdr); 2911 2912 /* First segment should be hwrm_ver_get response */ 2913 *dump_len = seg_hdr_len + ver_get_resp_len; 2914 if (buf) { 2915 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, NULL, ver_get_resp_len, 2916 0, 0, 0); 2917 memcpy(buf + offset, &seg_hdr, seg_hdr_len); 2918 offset += seg_hdr_len; 2919 memcpy(buf + offset, &bp->ver_resp, ver_get_resp_len); 2920 offset += ver_get_resp_len; 2921 } 2922 2923 rc = bnxt_hwrm_dbg_coredump_list(bp, &coredump); 2924 if (rc) { 2925 netdev_err(bp->dev, "Failed to get coredump segment list\n"); 2926 goto err; 2927 } 2928 2929 *dump_len += seg_hdr_len * coredump.total_segs; 2930 2931 seg_record = (struct coredump_segment_record *)coredump.data; 2932 seg_record_len = sizeof(*seg_record); 2933 2934 for (i = 0; i < coredump.total_segs; i++) { 2935 u16 comp_id = le16_to_cpu(seg_record->component_id); 2936 u16 seg_id = le16_to_cpu(seg_record->segment_id); 2937 u32 duration = 0, seg_len = 0; 2938 unsigned long start, end; 2939 2940 start = jiffies; 2941 2942 rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id); 2943 if (rc) { 2944 netdev_err(bp->dev, 2945 "Failed to initiate coredump for seg = %d\n", 2946 seg_record->segment_id); 2947 goto next_seg; 2948 } 2949 2950 /* Write segment data into the buffer */ 2951 rc = bnxt_hwrm_dbg_coredump_retrieve(bp, comp_id, seg_id, 2952 &seg_len, buf, 2953 offset + seg_hdr_len); 2954 if (rc) 2955 netdev_err(bp->dev, 2956 "Failed to retrieve coredump for seg = %d\n", 2957 seg_record->segment_id); 2958 2959 next_seg: 2960 end = jiffies; 2961 duration = jiffies_to_msecs(end - start); 2962 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, seg_record, seg_len, 2963 rc, duration, 0); 2964 2965 if (buf) { 2966 /* Write segment header into the buffer */ 2967 memcpy(buf + offset, &seg_hdr, seg_hdr_len); 2968 offset += seg_hdr_len + seg_len; 2969 } 2970 2971 *dump_len += seg_len; 2972 seg_record = 2973 (struct coredump_segment_record *)((u8 *)seg_record + 2974 seg_record_len); 2975 } 2976 2977 err: 2978 if (buf) 2979 bnxt_fill_coredump_record(bp, buf + offset, start_time, 2980 start_utc, coredump.total_segs + 1, 2981 rc); 2982 kfree(coredump.data); 2983 *dump_len += sizeof(struct bnxt_coredump_record); 2984 2985 return rc; 2986 } 2987 2988 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump) 2989 { 2990 struct bnxt *bp = netdev_priv(dev); 2991 2992 if (bp->hwrm_spec_code < 0x10801) 2993 return -EOPNOTSUPP; 2994 2995 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 | 2996 bp->ver_resp.hwrm_fw_min_8b << 16 | 2997 bp->ver_resp.hwrm_fw_bld_8b << 8 | 2998 bp->ver_resp.hwrm_fw_rsvd_8b; 2999 3000 return bnxt_get_coredump(bp, NULL, &dump->len); 3001 } 3002 3003 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump, 3004 void *buf) 3005 { 3006 struct bnxt *bp = netdev_priv(dev); 3007 3008 if (bp->hwrm_spec_code < 0x10801) 3009 return -EOPNOTSUPP; 3010 3011 memset(buf, 0, dump->len); 3012 3013 return bnxt_get_coredump(bp, buf, &dump->len); 3014 } 3015 3016 void bnxt_ethtool_init(struct bnxt *bp) 3017 { 3018 struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr; 3019 struct hwrm_selftest_qlist_input req = {0}; 3020 struct bnxt_test_info *test_info; 3021 struct net_device *dev = bp->dev; 3022 int i, rc; 3023 3024 bnxt_get_pkgver(dev); 3025 3026 if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp)) 3027 return; 3028 3029 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1); 3030 mutex_lock(&bp->hwrm_cmd_lock); 3031 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 3032 if (rc) 3033 goto ethtool_init_exit; 3034 3035 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 3036 if (!test_info) 3037 goto ethtool_init_exit; 3038 3039 bp->test_info = test_info; 3040 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 3041 if (bp->num_tests > BNXT_MAX_TEST) 3042 bp->num_tests = BNXT_MAX_TEST; 3043 3044 test_info->offline_mask = resp->offline_tests; 3045 test_info->timeout = le16_to_cpu(resp->test_timeout); 3046 if (!test_info->timeout) 3047 test_info->timeout = HWRM_CMD_TIMEOUT; 3048 for (i = 0; i < bp->num_tests; i++) { 3049 char *str = test_info->string[i]; 3050 char *fw_str = resp->test0_name + i * 32; 3051 3052 if (i == BNXT_MACLPBK_TEST_IDX) { 3053 strcpy(str, "Mac loopback test (offline)"); 3054 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 3055 strcpy(str, "Phy loopback test (offline)"); 3056 } else if (i == BNXT_EXTLPBK_TEST_IDX) { 3057 strcpy(str, "Ext loopback test (offline)"); 3058 } else if (i == BNXT_IRQ_TEST_IDX) { 3059 strcpy(str, "Interrupt_test (offline)"); 3060 } else { 3061 strlcpy(str, fw_str, ETH_GSTRING_LEN); 3062 strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); 3063 if (test_info->offline_mask & (1 << i)) 3064 strncat(str, " (offline)", 3065 ETH_GSTRING_LEN - strlen(str)); 3066 else 3067 strncat(str, " (online)", 3068 ETH_GSTRING_LEN - strlen(str)); 3069 } 3070 } 3071 3072 ethtool_init_exit: 3073 mutex_unlock(&bp->hwrm_cmd_lock); 3074 } 3075 3076 void bnxt_ethtool_free(struct bnxt *bp) 3077 { 3078 kfree(bp->test_info); 3079 bp->test_info = NULL; 3080 } 3081 3082 const struct ethtool_ops bnxt_ethtool_ops = { 3083 .get_link_ksettings = bnxt_get_link_ksettings, 3084 .set_link_ksettings = bnxt_set_link_ksettings, 3085 .get_pauseparam = bnxt_get_pauseparam, 3086 .set_pauseparam = bnxt_set_pauseparam, 3087 .get_drvinfo = bnxt_get_drvinfo, 3088 .get_wol = bnxt_get_wol, 3089 .set_wol = bnxt_set_wol, 3090 .get_coalesce = bnxt_get_coalesce, 3091 .set_coalesce = bnxt_set_coalesce, 3092 .get_msglevel = bnxt_get_msglevel, 3093 .set_msglevel = bnxt_set_msglevel, 3094 .get_sset_count = bnxt_get_sset_count, 3095 .get_strings = bnxt_get_strings, 3096 .get_ethtool_stats = bnxt_get_ethtool_stats, 3097 .set_ringparam = bnxt_set_ringparam, 3098 .get_ringparam = bnxt_get_ringparam, 3099 .get_channels = bnxt_get_channels, 3100 .set_channels = bnxt_set_channels, 3101 .get_rxnfc = bnxt_get_rxnfc, 3102 .set_rxnfc = bnxt_set_rxnfc, 3103 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 3104 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 3105 .get_rxfh = bnxt_get_rxfh, 3106 .flash_device = bnxt_flash_device, 3107 .get_eeprom_len = bnxt_get_eeprom_len, 3108 .get_eeprom = bnxt_get_eeprom, 3109 .set_eeprom = bnxt_set_eeprom, 3110 .get_link = bnxt_get_link, 3111 .get_eee = bnxt_get_eee, 3112 .set_eee = bnxt_set_eee, 3113 .get_module_info = bnxt_get_module_info, 3114 .get_module_eeprom = bnxt_get_module_eeprom, 3115 .nway_reset = bnxt_nway_reset, 3116 .set_phys_id = bnxt_set_phys_id, 3117 .self_test = bnxt_self_test, 3118 .reset = bnxt_reset, 3119 .get_dump_flag = bnxt_get_dump_flag, 3120 .get_dump_data = bnxt_get_dump_data, 3121 }; 3122