1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/interrupt.h> 15 #include <linux/pci.h> 16 #include <linux/etherdevice.h> 17 #include <linux/crc32.h> 18 #include <linux/firmware.h> 19 #include "bnxt_hsi.h" 20 #include "bnxt.h" 21 #include "bnxt_xdp.h" 22 #include "bnxt_ethtool.h" 23 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 24 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 25 #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100) 26 #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 27 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 28 29 static u32 bnxt_get_msglevel(struct net_device *dev) 30 { 31 struct bnxt *bp = netdev_priv(dev); 32 33 return bp->msg_enable; 34 } 35 36 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 37 { 38 struct bnxt *bp = netdev_priv(dev); 39 40 bp->msg_enable = value; 41 } 42 43 static int bnxt_get_coalesce(struct net_device *dev, 44 struct ethtool_coalesce *coal) 45 { 46 struct bnxt *bp = netdev_priv(dev); 47 struct bnxt_coal *hw_coal; 48 u16 mult; 49 50 memset(coal, 0, sizeof(*coal)); 51 52 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; 53 54 hw_coal = &bp->rx_coal; 55 mult = hw_coal->bufs_per_record; 56 coal->rx_coalesce_usecs = hw_coal->coal_ticks; 57 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; 58 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 59 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 60 61 hw_coal = &bp->tx_coal; 62 mult = hw_coal->bufs_per_record; 63 coal->tx_coalesce_usecs = hw_coal->coal_ticks; 64 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult; 65 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 66 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 67 68 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 69 70 return 0; 71 } 72 73 static int bnxt_set_coalesce(struct net_device *dev, 74 struct ethtool_coalesce *coal) 75 { 76 struct bnxt *bp = netdev_priv(dev); 77 bool update_stats = false; 78 struct bnxt_coal *hw_coal; 79 int rc = 0; 80 u16 mult; 81 82 if (coal->use_adaptive_rx_coalesce) { 83 bp->flags |= BNXT_FLAG_DIM; 84 } else { 85 if (bp->flags & BNXT_FLAG_DIM) { 86 bp->flags &= ~(BNXT_FLAG_DIM); 87 goto reset_coalesce; 88 } 89 } 90 91 hw_coal = &bp->rx_coal; 92 mult = hw_coal->bufs_per_record; 93 hw_coal->coal_ticks = coal->rx_coalesce_usecs; 94 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult; 95 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq; 96 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult; 97 98 hw_coal = &bp->tx_coal; 99 mult = hw_coal->bufs_per_record; 100 hw_coal->coal_ticks = coal->tx_coalesce_usecs; 101 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult; 102 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq; 103 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult; 104 105 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 106 u32 stats_ticks = coal->stats_block_coalesce_usecs; 107 108 /* Allow 0, which means disable. */ 109 if (stats_ticks) 110 stats_ticks = clamp_t(u32, stats_ticks, 111 BNXT_MIN_STATS_COAL_TICKS, 112 BNXT_MAX_STATS_COAL_TICKS); 113 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 114 bp->stats_coal_ticks = stats_ticks; 115 update_stats = true; 116 } 117 118 reset_coalesce: 119 if (netif_running(dev)) { 120 if (update_stats) { 121 rc = bnxt_close_nic(bp, true, false); 122 if (!rc) 123 rc = bnxt_open_nic(bp, true, false); 124 } else { 125 rc = bnxt_hwrm_set_coal(bp); 126 } 127 } 128 129 return rc; 130 } 131 132 #define BNXT_NUM_STATS 21 133 134 #define BNXT_RX_STATS_ENTRY(counter) \ 135 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 136 137 #define BNXT_TX_STATS_ENTRY(counter) \ 138 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 139 140 #define BNXT_RX_STATS_EXT_ENTRY(counter) \ 141 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) } 142 143 static const struct { 144 long offset; 145 char string[ETH_GSTRING_LEN]; 146 } bnxt_port_stats_arr[] = { 147 BNXT_RX_STATS_ENTRY(rx_64b_frames), 148 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 149 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 150 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 151 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 152 BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames), 153 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 154 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 155 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 156 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 157 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 158 BNXT_RX_STATS_ENTRY(rx_total_frames), 159 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 160 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 161 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 162 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 163 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 164 BNXT_RX_STATS_ENTRY(rx_pause_frames), 165 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 166 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 167 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 168 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 169 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 170 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 171 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 172 BNXT_RX_STATS_ENTRY(rx_good_frames), 173 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 174 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 175 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 176 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 177 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 178 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 179 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 180 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 181 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 182 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 183 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 184 BNXT_RX_STATS_ENTRY(rx_bytes), 185 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 186 BNXT_RX_STATS_ENTRY(rx_runt_frames), 187 BNXT_RX_STATS_ENTRY(rx_stat_discard), 188 BNXT_RX_STATS_ENTRY(rx_stat_err), 189 190 BNXT_TX_STATS_ENTRY(tx_64b_frames), 191 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 192 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 193 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 194 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 195 BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames), 196 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 197 BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames), 198 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 199 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 200 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 201 BNXT_TX_STATS_ENTRY(tx_good_frames), 202 BNXT_TX_STATS_ENTRY(tx_total_frames), 203 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 204 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 205 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 206 BNXT_TX_STATS_ENTRY(tx_pause_frames), 207 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 208 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 209 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 210 BNXT_TX_STATS_ENTRY(tx_err), 211 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 212 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 213 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 214 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 215 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 216 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 217 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 218 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 219 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 220 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 221 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 222 BNXT_TX_STATS_ENTRY(tx_total_collisions), 223 BNXT_TX_STATS_ENTRY(tx_bytes), 224 BNXT_TX_STATS_ENTRY(tx_xthol_frames), 225 BNXT_TX_STATS_ENTRY(tx_stat_discard), 226 BNXT_TX_STATS_ENTRY(tx_stat_error), 227 }; 228 229 static const struct { 230 long offset; 231 char string[ETH_GSTRING_LEN]; 232 } bnxt_port_stats_ext_arr[] = { 233 BNXT_RX_STATS_EXT_ENTRY(link_down_events), 234 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events), 235 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events), 236 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events), 237 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events), 238 }; 239 240 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 241 #define BNXT_NUM_PORT_STATS_EXT ARRAY_SIZE(bnxt_port_stats_ext_arr) 242 243 static int bnxt_get_num_stats(struct bnxt *bp) 244 { 245 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings; 246 247 if (bp->flags & BNXT_FLAG_PORT_STATS) 248 num_stats += BNXT_NUM_PORT_STATS; 249 250 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) 251 num_stats += BNXT_NUM_PORT_STATS_EXT; 252 253 return num_stats; 254 } 255 256 static int bnxt_get_sset_count(struct net_device *dev, int sset) 257 { 258 struct bnxt *bp = netdev_priv(dev); 259 260 switch (sset) { 261 case ETH_SS_STATS: 262 return bnxt_get_num_stats(bp); 263 case ETH_SS_TEST: 264 if (!bp->num_tests) 265 return -EOPNOTSUPP; 266 return bp->num_tests; 267 default: 268 return -EOPNOTSUPP; 269 } 270 } 271 272 static void bnxt_get_ethtool_stats(struct net_device *dev, 273 struct ethtool_stats *stats, u64 *buf) 274 { 275 u32 i, j = 0; 276 struct bnxt *bp = netdev_priv(dev); 277 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8; 278 279 if (!bp->bnapi) 280 return; 281 282 for (i = 0; i < bp->cp_nr_rings; i++) { 283 struct bnxt_napi *bnapi = bp->bnapi[i]; 284 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 285 __le64 *hw_stats = (__le64 *)cpr->hw_stats; 286 int k; 287 288 for (k = 0; k < stat_fields; j++, k++) 289 buf[j] = le64_to_cpu(hw_stats[k]); 290 buf[j++] = cpr->rx_l4_csum_errors; 291 } 292 if (bp->flags & BNXT_FLAG_PORT_STATS) { 293 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats; 294 295 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) { 296 buf[j] = le64_to_cpu(*(port_stats + 297 bnxt_port_stats_arr[i].offset)); 298 } 299 } 300 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 301 __le64 *port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext; 302 303 for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++, j++) { 304 buf[j] = le64_to_cpu(*(port_stats_ext + 305 bnxt_port_stats_ext_arr[i].offset)); 306 } 307 } 308 } 309 310 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 311 { 312 struct bnxt *bp = netdev_priv(dev); 313 u32 i; 314 315 switch (stringset) { 316 /* The number of strings must match BNXT_NUM_STATS defined above. */ 317 case ETH_SS_STATS: 318 for (i = 0; i < bp->cp_nr_rings; i++) { 319 sprintf(buf, "[%d]: rx_ucast_packets", i); 320 buf += ETH_GSTRING_LEN; 321 sprintf(buf, "[%d]: rx_mcast_packets", i); 322 buf += ETH_GSTRING_LEN; 323 sprintf(buf, "[%d]: rx_bcast_packets", i); 324 buf += ETH_GSTRING_LEN; 325 sprintf(buf, "[%d]: rx_discards", i); 326 buf += ETH_GSTRING_LEN; 327 sprintf(buf, "[%d]: rx_drops", i); 328 buf += ETH_GSTRING_LEN; 329 sprintf(buf, "[%d]: rx_ucast_bytes", i); 330 buf += ETH_GSTRING_LEN; 331 sprintf(buf, "[%d]: rx_mcast_bytes", i); 332 buf += ETH_GSTRING_LEN; 333 sprintf(buf, "[%d]: rx_bcast_bytes", i); 334 buf += ETH_GSTRING_LEN; 335 sprintf(buf, "[%d]: tx_ucast_packets", i); 336 buf += ETH_GSTRING_LEN; 337 sprintf(buf, "[%d]: tx_mcast_packets", i); 338 buf += ETH_GSTRING_LEN; 339 sprintf(buf, "[%d]: tx_bcast_packets", i); 340 buf += ETH_GSTRING_LEN; 341 sprintf(buf, "[%d]: tx_discards", i); 342 buf += ETH_GSTRING_LEN; 343 sprintf(buf, "[%d]: tx_drops", i); 344 buf += ETH_GSTRING_LEN; 345 sprintf(buf, "[%d]: tx_ucast_bytes", i); 346 buf += ETH_GSTRING_LEN; 347 sprintf(buf, "[%d]: tx_mcast_bytes", i); 348 buf += ETH_GSTRING_LEN; 349 sprintf(buf, "[%d]: tx_bcast_bytes", i); 350 buf += ETH_GSTRING_LEN; 351 sprintf(buf, "[%d]: tpa_packets", i); 352 buf += ETH_GSTRING_LEN; 353 sprintf(buf, "[%d]: tpa_bytes", i); 354 buf += ETH_GSTRING_LEN; 355 sprintf(buf, "[%d]: tpa_events", i); 356 buf += ETH_GSTRING_LEN; 357 sprintf(buf, "[%d]: tpa_aborts", i); 358 buf += ETH_GSTRING_LEN; 359 sprintf(buf, "[%d]: rx_l4_csum_errors", i); 360 buf += ETH_GSTRING_LEN; 361 } 362 if (bp->flags & BNXT_FLAG_PORT_STATS) { 363 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 364 strcpy(buf, bnxt_port_stats_arr[i].string); 365 buf += ETH_GSTRING_LEN; 366 } 367 } 368 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 369 for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++) { 370 strcpy(buf, bnxt_port_stats_ext_arr[i].string); 371 buf += ETH_GSTRING_LEN; 372 } 373 } 374 break; 375 case ETH_SS_TEST: 376 if (bp->num_tests) 377 memcpy(buf, bp->test_info->string, 378 bp->num_tests * ETH_GSTRING_LEN); 379 break; 380 default: 381 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 382 stringset); 383 break; 384 } 385 } 386 387 static void bnxt_get_ringparam(struct net_device *dev, 388 struct ethtool_ringparam *ering) 389 { 390 struct bnxt *bp = netdev_priv(dev); 391 392 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 393 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 394 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 395 396 ering->rx_pending = bp->rx_ring_size; 397 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 398 ering->tx_pending = bp->tx_ring_size; 399 } 400 401 static int bnxt_set_ringparam(struct net_device *dev, 402 struct ethtool_ringparam *ering) 403 { 404 struct bnxt *bp = netdev_priv(dev); 405 406 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 407 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 408 (ering->tx_pending <= MAX_SKB_FRAGS)) 409 return -EINVAL; 410 411 if (netif_running(dev)) 412 bnxt_close_nic(bp, false, false); 413 414 bp->rx_ring_size = ering->rx_pending; 415 bp->tx_ring_size = ering->tx_pending; 416 bnxt_set_ring_params(bp); 417 418 if (netif_running(dev)) 419 return bnxt_open_nic(bp, false, false); 420 421 return 0; 422 } 423 424 static void bnxt_get_channels(struct net_device *dev, 425 struct ethtool_channels *channel) 426 { 427 struct bnxt *bp = netdev_priv(dev); 428 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; 429 int max_rx_rings, max_tx_rings, tcs; 430 int max_tx_sch_inputs; 431 432 /* Get the most up-to-date max_tx_sch_inputs. */ 433 if (bp->flags & BNXT_FLAG_NEW_RM) 434 bnxt_hwrm_func_resc_qcaps(bp, false); 435 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs; 436 437 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 438 if (max_tx_sch_inputs) 439 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 440 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 441 442 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 443 max_rx_rings = 0; 444 max_tx_rings = 0; 445 } 446 if (max_tx_sch_inputs) 447 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 448 449 tcs = netdev_get_num_tc(dev); 450 if (tcs > 1) 451 max_tx_rings /= tcs; 452 453 channel->max_rx = max_rx_rings; 454 channel->max_tx = max_tx_rings; 455 channel->max_other = 0; 456 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 457 channel->combined_count = bp->rx_nr_rings; 458 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 459 channel->combined_count--; 460 } else { 461 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 462 channel->rx_count = bp->rx_nr_rings; 463 channel->tx_count = bp->tx_nr_rings_per_tc; 464 } 465 } 466 } 467 468 static int bnxt_set_channels(struct net_device *dev, 469 struct ethtool_channels *channel) 470 { 471 struct bnxt *bp = netdev_priv(dev); 472 int req_tx_rings, req_rx_rings, tcs; 473 bool sh = false; 474 int tx_xdp = 0; 475 int rc = 0; 476 477 if (channel->other_count) 478 return -EINVAL; 479 480 if (!channel->combined_count && 481 (!channel->rx_count || !channel->tx_count)) 482 return -EINVAL; 483 484 if (channel->combined_count && 485 (channel->rx_count || channel->tx_count)) 486 return -EINVAL; 487 488 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 489 channel->tx_count)) 490 return -EINVAL; 491 492 if (channel->combined_count) 493 sh = true; 494 495 tcs = netdev_get_num_tc(dev); 496 497 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 498 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 499 if (bp->tx_nr_rings_xdp) { 500 if (!sh) { 501 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 502 return -EINVAL; 503 } 504 tx_xdp = req_rx_rings; 505 } 506 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); 507 if (rc) { 508 netdev_warn(dev, "Unable to allocate the requested rings\n"); 509 return rc; 510 } 511 512 if (netif_running(dev)) { 513 if (BNXT_PF(bp)) { 514 /* TODO CHIMP_FW: Send message to all VF's 515 * before PF unload 516 */ 517 } 518 rc = bnxt_close_nic(bp, true, false); 519 if (rc) { 520 netdev_err(bp->dev, "Set channel failure rc :%x\n", 521 rc); 522 return rc; 523 } 524 } 525 526 if (sh) { 527 bp->flags |= BNXT_FLAG_SHARED_RINGS; 528 bp->rx_nr_rings = channel->combined_count; 529 bp->tx_nr_rings_per_tc = channel->combined_count; 530 } else { 531 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 532 bp->rx_nr_rings = channel->rx_count; 533 bp->tx_nr_rings_per_tc = channel->tx_count; 534 } 535 bp->tx_nr_rings_xdp = tx_xdp; 536 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 537 if (tcs > 1) 538 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 539 540 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 541 bp->tx_nr_rings + bp->rx_nr_rings; 542 543 bp->num_stat_ctxs = bp->cp_nr_rings; 544 545 /* After changing number of rx channels, update NTUPLE feature. */ 546 netdev_update_features(dev); 547 if (netif_running(dev)) { 548 rc = bnxt_open_nic(bp, true, false); 549 if ((!rc) && BNXT_PF(bp)) { 550 /* TODO CHIMP_FW: Send message to all VF's 551 * to renable 552 */ 553 } 554 } 555 556 return rc; 557 } 558 559 #ifdef CONFIG_RFS_ACCEL 560 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 561 u32 *rule_locs) 562 { 563 int i, j = 0; 564 565 cmd->data = bp->ntp_fltr_count; 566 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 567 struct hlist_head *head; 568 struct bnxt_ntuple_filter *fltr; 569 570 head = &bp->ntp_fltr_hash_tbl[i]; 571 rcu_read_lock(); 572 hlist_for_each_entry_rcu(fltr, head, hash) { 573 if (j == cmd->rule_cnt) 574 break; 575 rule_locs[j++] = fltr->sw_id; 576 } 577 rcu_read_unlock(); 578 if (j == cmd->rule_cnt) 579 break; 580 } 581 cmd->rule_cnt = j; 582 return 0; 583 } 584 585 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 586 { 587 struct ethtool_rx_flow_spec *fs = 588 (struct ethtool_rx_flow_spec *)&cmd->fs; 589 struct bnxt_ntuple_filter *fltr; 590 struct flow_keys *fkeys; 591 int i, rc = -EINVAL; 592 593 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 594 return rc; 595 596 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 597 struct hlist_head *head; 598 599 head = &bp->ntp_fltr_hash_tbl[i]; 600 rcu_read_lock(); 601 hlist_for_each_entry_rcu(fltr, head, hash) { 602 if (fltr->sw_id == fs->location) 603 goto fltr_found; 604 } 605 rcu_read_unlock(); 606 } 607 return rc; 608 609 fltr_found: 610 fkeys = &fltr->fkeys; 611 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 612 if (fkeys->basic.ip_proto == IPPROTO_TCP) 613 fs->flow_type = TCP_V4_FLOW; 614 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 615 fs->flow_type = UDP_V4_FLOW; 616 else 617 goto fltr_err; 618 619 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 620 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 621 622 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 623 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 624 625 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 626 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 627 628 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 629 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 630 } else { 631 int i; 632 633 if (fkeys->basic.ip_proto == IPPROTO_TCP) 634 fs->flow_type = TCP_V6_FLOW; 635 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 636 fs->flow_type = UDP_V6_FLOW; 637 else 638 goto fltr_err; 639 640 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 641 fkeys->addrs.v6addrs.src; 642 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 643 fkeys->addrs.v6addrs.dst; 644 for (i = 0; i < 4; i++) { 645 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 646 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 647 } 648 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 649 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 650 651 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 652 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 653 } 654 655 fs->ring_cookie = fltr->rxq; 656 rc = 0; 657 658 fltr_err: 659 rcu_read_unlock(); 660 661 return rc; 662 } 663 #endif 664 665 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 666 { 667 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 668 return RXH_IP_SRC | RXH_IP_DST; 669 return 0; 670 } 671 672 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 673 { 674 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 675 return RXH_IP_SRC | RXH_IP_DST; 676 return 0; 677 } 678 679 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 680 { 681 cmd->data = 0; 682 switch (cmd->flow_type) { 683 case TCP_V4_FLOW: 684 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 685 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 686 RXH_L4_B_0_1 | RXH_L4_B_2_3; 687 cmd->data |= get_ethtool_ipv4_rss(bp); 688 break; 689 case UDP_V4_FLOW: 690 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 691 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 692 RXH_L4_B_0_1 | RXH_L4_B_2_3; 693 /* fall through */ 694 case SCTP_V4_FLOW: 695 case AH_ESP_V4_FLOW: 696 case AH_V4_FLOW: 697 case ESP_V4_FLOW: 698 case IPV4_FLOW: 699 cmd->data |= get_ethtool_ipv4_rss(bp); 700 break; 701 702 case TCP_V6_FLOW: 703 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 704 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 705 RXH_L4_B_0_1 | RXH_L4_B_2_3; 706 cmd->data |= get_ethtool_ipv6_rss(bp); 707 break; 708 case UDP_V6_FLOW: 709 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 710 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 711 RXH_L4_B_0_1 | RXH_L4_B_2_3; 712 /* fall through */ 713 case SCTP_V6_FLOW: 714 case AH_ESP_V6_FLOW: 715 case AH_V6_FLOW: 716 case ESP_V6_FLOW: 717 case IPV6_FLOW: 718 cmd->data |= get_ethtool_ipv6_rss(bp); 719 break; 720 } 721 return 0; 722 } 723 724 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 725 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 726 727 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 728 { 729 u32 rss_hash_cfg = bp->rss_hash_cfg; 730 int tuple, rc = 0; 731 732 if (cmd->data == RXH_4TUPLE) 733 tuple = 4; 734 else if (cmd->data == RXH_2TUPLE) 735 tuple = 2; 736 else if (!cmd->data) 737 tuple = 0; 738 else 739 return -EINVAL; 740 741 if (cmd->flow_type == TCP_V4_FLOW) { 742 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 743 if (tuple == 4) 744 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 745 } else if (cmd->flow_type == UDP_V4_FLOW) { 746 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 747 return -EINVAL; 748 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 749 if (tuple == 4) 750 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 751 } else if (cmd->flow_type == TCP_V6_FLOW) { 752 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 753 if (tuple == 4) 754 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 755 } else if (cmd->flow_type == UDP_V6_FLOW) { 756 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 757 return -EINVAL; 758 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 759 if (tuple == 4) 760 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 761 } else if (tuple == 4) { 762 return -EINVAL; 763 } 764 765 switch (cmd->flow_type) { 766 case TCP_V4_FLOW: 767 case UDP_V4_FLOW: 768 case SCTP_V4_FLOW: 769 case AH_ESP_V4_FLOW: 770 case AH_V4_FLOW: 771 case ESP_V4_FLOW: 772 case IPV4_FLOW: 773 if (tuple == 2) 774 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 775 else if (!tuple) 776 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 777 break; 778 779 case TCP_V6_FLOW: 780 case UDP_V6_FLOW: 781 case SCTP_V6_FLOW: 782 case AH_ESP_V6_FLOW: 783 case AH_V6_FLOW: 784 case ESP_V6_FLOW: 785 case IPV6_FLOW: 786 if (tuple == 2) 787 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 788 else if (!tuple) 789 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 790 break; 791 } 792 793 if (bp->rss_hash_cfg == rss_hash_cfg) 794 return 0; 795 796 bp->rss_hash_cfg = rss_hash_cfg; 797 if (netif_running(bp->dev)) { 798 bnxt_close_nic(bp, false, false); 799 rc = bnxt_open_nic(bp, false, false); 800 } 801 return rc; 802 } 803 804 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 805 u32 *rule_locs) 806 { 807 struct bnxt *bp = netdev_priv(dev); 808 int rc = 0; 809 810 switch (cmd->cmd) { 811 #ifdef CONFIG_RFS_ACCEL 812 case ETHTOOL_GRXRINGS: 813 cmd->data = bp->rx_nr_rings; 814 break; 815 816 case ETHTOOL_GRXCLSRLCNT: 817 cmd->rule_cnt = bp->ntp_fltr_count; 818 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 819 break; 820 821 case ETHTOOL_GRXCLSRLALL: 822 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 823 break; 824 825 case ETHTOOL_GRXCLSRULE: 826 rc = bnxt_grxclsrule(bp, cmd); 827 break; 828 #endif 829 830 case ETHTOOL_GRXFH: 831 rc = bnxt_grxfh(bp, cmd); 832 break; 833 834 default: 835 rc = -EOPNOTSUPP; 836 break; 837 } 838 839 return rc; 840 } 841 842 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 843 { 844 struct bnxt *bp = netdev_priv(dev); 845 int rc; 846 847 switch (cmd->cmd) { 848 case ETHTOOL_SRXFH: 849 rc = bnxt_srxfh(bp, cmd); 850 break; 851 852 default: 853 rc = -EOPNOTSUPP; 854 break; 855 } 856 return rc; 857 } 858 859 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 860 { 861 return HW_HASH_INDEX_SIZE; 862 } 863 864 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 865 { 866 return HW_HASH_KEY_SIZE; 867 } 868 869 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 870 u8 *hfunc) 871 { 872 struct bnxt *bp = netdev_priv(dev); 873 struct bnxt_vnic_info *vnic = &bp->vnic_info[0]; 874 int i = 0; 875 876 if (hfunc) 877 *hfunc = ETH_RSS_HASH_TOP; 878 879 if (indir) 880 for (i = 0; i < HW_HASH_INDEX_SIZE; i++) 881 indir[i] = le16_to_cpu(vnic->rss_table[i]); 882 883 if (key) 884 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 885 886 return 0; 887 } 888 889 static void bnxt_get_drvinfo(struct net_device *dev, 890 struct ethtool_drvinfo *info) 891 { 892 struct bnxt *bp = netdev_priv(dev); 893 894 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 895 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 896 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version)); 897 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 898 info->n_stats = bnxt_get_num_stats(bp); 899 info->testinfo_len = bp->num_tests; 900 /* TODO CHIMP_FW: eeprom dump details */ 901 info->eedump_len = 0; 902 /* TODO CHIMP FW: reg dump details */ 903 info->regdump_len = 0; 904 } 905 906 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 907 { 908 struct bnxt *bp = netdev_priv(dev); 909 910 wol->supported = 0; 911 wol->wolopts = 0; 912 memset(&wol->sopass, 0, sizeof(wol->sopass)); 913 if (bp->flags & BNXT_FLAG_WOL_CAP) { 914 wol->supported = WAKE_MAGIC; 915 if (bp->wol) 916 wol->wolopts = WAKE_MAGIC; 917 } 918 } 919 920 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 921 { 922 struct bnxt *bp = netdev_priv(dev); 923 924 if (wol->wolopts & ~WAKE_MAGIC) 925 return -EINVAL; 926 927 if (wol->wolopts & WAKE_MAGIC) { 928 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 929 return -EINVAL; 930 if (!bp->wol) { 931 if (bnxt_hwrm_alloc_wol_fltr(bp)) 932 return -EBUSY; 933 bp->wol = 1; 934 } 935 } else { 936 if (bp->wol) { 937 if (bnxt_hwrm_free_wol_fltr(bp)) 938 return -EBUSY; 939 bp->wol = 0; 940 } 941 } 942 return 0; 943 } 944 945 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 946 { 947 u32 speed_mask = 0; 948 949 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 950 /* set the advertised speeds */ 951 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 952 speed_mask |= ADVERTISED_100baseT_Full; 953 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 954 speed_mask |= ADVERTISED_1000baseT_Full; 955 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 956 speed_mask |= ADVERTISED_2500baseX_Full; 957 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 958 speed_mask |= ADVERTISED_10000baseT_Full; 959 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 960 speed_mask |= ADVERTISED_40000baseCR4_Full; 961 962 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 963 speed_mask |= ADVERTISED_Pause; 964 else if (fw_pause & BNXT_LINK_PAUSE_TX) 965 speed_mask |= ADVERTISED_Asym_Pause; 966 else if (fw_pause & BNXT_LINK_PAUSE_RX) 967 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 968 969 return speed_mask; 970 } 971 972 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 973 { \ 974 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 975 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 976 100baseT_Full); \ 977 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 978 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 979 1000baseT_Full); \ 980 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 981 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 982 10000baseT_Full); \ 983 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 984 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 985 25000baseCR_Full); \ 986 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 987 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 988 40000baseCR4_Full);\ 989 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 990 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 991 50000baseCR2_Full);\ 992 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 993 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 994 100000baseCR4_Full);\ 995 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 996 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 997 Pause); \ 998 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 999 ethtool_link_ksettings_add_link_mode( \ 1000 lk_ksettings, name, Asym_Pause);\ 1001 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 1002 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1003 Asym_Pause); \ 1004 } \ 1005 } 1006 1007 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 1008 { \ 1009 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1010 100baseT_Full) || \ 1011 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1012 100baseT_Half)) \ 1013 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 1014 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1015 1000baseT_Full) || \ 1016 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1017 1000baseT_Half)) \ 1018 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 1019 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1020 10000baseT_Full)) \ 1021 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 1022 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1023 25000baseCR_Full)) \ 1024 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 1025 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1026 40000baseCR4_Full)) \ 1027 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 1028 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1029 50000baseCR2_Full)) \ 1030 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 1031 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1032 100000baseCR4_Full)) \ 1033 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 1034 } 1035 1036 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 1037 struct ethtool_link_ksettings *lk_ksettings) 1038 { 1039 u16 fw_speeds = link_info->advertising; 1040 u8 fw_pause = 0; 1041 1042 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1043 fw_pause = link_info->auto_pause_setting; 1044 1045 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 1046 } 1047 1048 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 1049 struct ethtool_link_ksettings *lk_ksettings) 1050 { 1051 u16 fw_speeds = link_info->lp_auto_link_speeds; 1052 u8 fw_pause = 0; 1053 1054 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1055 fw_pause = link_info->lp_pause; 1056 1057 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 1058 lp_advertising); 1059 } 1060 1061 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1062 struct ethtool_link_ksettings *lk_ksettings) 1063 { 1064 u16 fw_speeds = link_info->support_speeds; 1065 1066 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1067 1068 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); 1069 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1070 Asym_Pause); 1071 1072 if (link_info->support_auto_speeds) 1073 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1074 Autoneg); 1075 } 1076 1077 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1078 { 1079 switch (fw_link_speed) { 1080 case BNXT_LINK_SPEED_100MB: 1081 return SPEED_100; 1082 case BNXT_LINK_SPEED_1GB: 1083 return SPEED_1000; 1084 case BNXT_LINK_SPEED_2_5GB: 1085 return SPEED_2500; 1086 case BNXT_LINK_SPEED_10GB: 1087 return SPEED_10000; 1088 case BNXT_LINK_SPEED_20GB: 1089 return SPEED_20000; 1090 case BNXT_LINK_SPEED_25GB: 1091 return SPEED_25000; 1092 case BNXT_LINK_SPEED_40GB: 1093 return SPEED_40000; 1094 case BNXT_LINK_SPEED_50GB: 1095 return SPEED_50000; 1096 case BNXT_LINK_SPEED_100GB: 1097 return SPEED_100000; 1098 default: 1099 return SPEED_UNKNOWN; 1100 } 1101 } 1102 1103 static int bnxt_get_link_ksettings(struct net_device *dev, 1104 struct ethtool_link_ksettings *lk_ksettings) 1105 { 1106 struct bnxt *bp = netdev_priv(dev); 1107 struct bnxt_link_info *link_info = &bp->link_info; 1108 struct ethtool_link_settings *base = &lk_ksettings->base; 1109 u32 ethtool_speed; 1110 1111 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1112 mutex_lock(&bp->link_lock); 1113 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1114 1115 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1116 if (link_info->autoneg) { 1117 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1118 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1119 advertising, Autoneg); 1120 base->autoneg = AUTONEG_ENABLE; 1121 if (link_info->phy_link_status == BNXT_LINK_LINK) 1122 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1123 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1124 if (!netif_carrier_ok(dev)) 1125 base->duplex = DUPLEX_UNKNOWN; 1126 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1127 base->duplex = DUPLEX_FULL; 1128 else 1129 base->duplex = DUPLEX_HALF; 1130 } else { 1131 base->autoneg = AUTONEG_DISABLE; 1132 ethtool_speed = 1133 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1134 base->duplex = DUPLEX_HALF; 1135 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1136 base->duplex = DUPLEX_FULL; 1137 } 1138 base->speed = ethtool_speed; 1139 1140 base->port = PORT_NONE; 1141 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1142 base->port = PORT_TP; 1143 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1144 TP); 1145 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1146 TP); 1147 } else { 1148 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1149 FIBRE); 1150 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1151 FIBRE); 1152 1153 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1154 base->port = PORT_DA; 1155 else if (link_info->media_type == 1156 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1157 base->port = PORT_FIBRE; 1158 } 1159 base->phy_address = link_info->phy_addr; 1160 mutex_unlock(&bp->link_lock); 1161 1162 return 0; 1163 } 1164 1165 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed) 1166 { 1167 struct bnxt *bp = netdev_priv(dev); 1168 struct bnxt_link_info *link_info = &bp->link_info; 1169 u16 support_spds = link_info->support_speeds; 1170 u32 fw_speed = 0; 1171 1172 switch (ethtool_speed) { 1173 case SPEED_100: 1174 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1175 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB; 1176 break; 1177 case SPEED_1000: 1178 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1179 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB; 1180 break; 1181 case SPEED_2500: 1182 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1183 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB; 1184 break; 1185 case SPEED_10000: 1186 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1187 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB; 1188 break; 1189 case SPEED_20000: 1190 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1191 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB; 1192 break; 1193 case SPEED_25000: 1194 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1195 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB; 1196 break; 1197 case SPEED_40000: 1198 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1199 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB; 1200 break; 1201 case SPEED_50000: 1202 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) 1203 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB; 1204 break; 1205 case SPEED_100000: 1206 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) 1207 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB; 1208 break; 1209 default: 1210 netdev_err(dev, "unsupported speed!\n"); 1211 break; 1212 } 1213 return fw_speed; 1214 } 1215 1216 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1217 { 1218 u16 fw_speed_mask = 0; 1219 1220 /* only support autoneg at speed 100, 1000, and 10000 */ 1221 if (advertising & (ADVERTISED_100baseT_Full | 1222 ADVERTISED_100baseT_Half)) { 1223 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1224 } 1225 if (advertising & (ADVERTISED_1000baseT_Full | 1226 ADVERTISED_1000baseT_Half)) { 1227 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1228 } 1229 if (advertising & ADVERTISED_10000baseT_Full) 1230 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1231 1232 if (advertising & ADVERTISED_40000baseCR4_Full) 1233 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1234 1235 return fw_speed_mask; 1236 } 1237 1238 static int bnxt_set_link_ksettings(struct net_device *dev, 1239 const struct ethtool_link_ksettings *lk_ksettings) 1240 { 1241 struct bnxt *bp = netdev_priv(dev); 1242 struct bnxt_link_info *link_info = &bp->link_info; 1243 const struct ethtool_link_settings *base = &lk_ksettings->base; 1244 bool set_pause = false; 1245 u16 fw_advertising = 0; 1246 u32 speed; 1247 int rc = 0; 1248 1249 if (!BNXT_SINGLE_PF(bp)) 1250 return -EOPNOTSUPP; 1251 1252 mutex_lock(&bp->link_lock); 1253 if (base->autoneg == AUTONEG_ENABLE) { 1254 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings, 1255 advertising); 1256 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1257 if (!fw_advertising) 1258 link_info->advertising = link_info->support_auto_speeds; 1259 else 1260 link_info->advertising = fw_advertising; 1261 /* any change to autoneg will cause link change, therefore the 1262 * driver should put back the original pause setting in autoneg 1263 */ 1264 set_pause = true; 1265 } else { 1266 u16 fw_speed; 1267 u8 phy_type = link_info->phy_type; 1268 1269 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1270 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1271 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1272 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1273 rc = -EINVAL; 1274 goto set_setting_exit; 1275 } 1276 if (base->duplex == DUPLEX_HALF) { 1277 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1278 rc = -EINVAL; 1279 goto set_setting_exit; 1280 } 1281 speed = base->speed; 1282 fw_speed = bnxt_get_fw_speed(dev, speed); 1283 if (!fw_speed) { 1284 rc = -EINVAL; 1285 goto set_setting_exit; 1286 } 1287 link_info->req_link_speed = fw_speed; 1288 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1289 link_info->autoneg = 0; 1290 link_info->advertising = 0; 1291 } 1292 1293 if (netif_running(dev)) 1294 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1295 1296 set_setting_exit: 1297 mutex_unlock(&bp->link_lock); 1298 return rc; 1299 } 1300 1301 static void bnxt_get_pauseparam(struct net_device *dev, 1302 struct ethtool_pauseparam *epause) 1303 { 1304 struct bnxt *bp = netdev_priv(dev); 1305 struct bnxt_link_info *link_info = &bp->link_info; 1306 1307 if (BNXT_VF(bp)) 1308 return; 1309 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 1310 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 1311 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 1312 } 1313 1314 static int bnxt_set_pauseparam(struct net_device *dev, 1315 struct ethtool_pauseparam *epause) 1316 { 1317 int rc = 0; 1318 struct bnxt *bp = netdev_priv(dev); 1319 struct bnxt_link_info *link_info = &bp->link_info; 1320 1321 if (!BNXT_SINGLE_PF(bp)) 1322 return -EOPNOTSUPP; 1323 1324 if (epause->autoneg) { 1325 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 1326 return -EINVAL; 1327 1328 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 1329 if (bp->hwrm_spec_code >= 0x10201) 1330 link_info->req_flow_ctrl = 1331 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; 1332 } else { 1333 /* when transition from auto pause to force pause, 1334 * force a link change 1335 */ 1336 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1337 link_info->force_link_chng = true; 1338 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 1339 link_info->req_flow_ctrl = 0; 1340 } 1341 if (epause->rx_pause) 1342 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 1343 1344 if (epause->tx_pause) 1345 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 1346 1347 if (netif_running(dev)) 1348 rc = bnxt_hwrm_set_pause(bp); 1349 return rc; 1350 } 1351 1352 static u32 bnxt_get_link(struct net_device *dev) 1353 { 1354 struct bnxt *bp = netdev_priv(dev); 1355 1356 /* TODO: handle MF, VF, driver close case */ 1357 return bp->link_info.link_up; 1358 } 1359 1360 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1361 u16 ext, u16 *index, u32 *item_length, 1362 u32 *data_length); 1363 1364 static int bnxt_flash_nvram(struct net_device *dev, 1365 u16 dir_type, 1366 u16 dir_ordinal, 1367 u16 dir_ext, 1368 u16 dir_attr, 1369 const u8 *data, 1370 size_t data_len) 1371 { 1372 struct bnxt *bp = netdev_priv(dev); 1373 int rc; 1374 struct hwrm_nvm_write_input req = {0}; 1375 dma_addr_t dma_handle; 1376 u8 *kmem; 1377 1378 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1); 1379 1380 req.dir_type = cpu_to_le16(dir_type); 1381 req.dir_ordinal = cpu_to_le16(dir_ordinal); 1382 req.dir_ext = cpu_to_le16(dir_ext); 1383 req.dir_attr = cpu_to_le16(dir_attr); 1384 req.dir_data_length = cpu_to_le32(data_len); 1385 1386 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle, 1387 GFP_KERNEL); 1388 if (!kmem) { 1389 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1390 (unsigned)data_len); 1391 return -ENOMEM; 1392 } 1393 memcpy(kmem, data, data_len); 1394 req.host_src_addr = cpu_to_le64(dma_handle); 1395 1396 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT); 1397 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle); 1398 1399 return rc; 1400 } 1401 1402 static int bnxt_firmware_reset(struct net_device *dev, 1403 u16 dir_type) 1404 { 1405 struct bnxt *bp = netdev_priv(dev); 1406 struct hwrm_fw_reset_input req = {0}; 1407 1408 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1); 1409 1410 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 1411 /* (e.g. when firmware isn't already running) */ 1412 switch (dir_type) { 1413 case BNX_DIR_TYPE_CHIMP_PATCH: 1414 case BNX_DIR_TYPE_BOOTCODE: 1415 case BNX_DIR_TYPE_BOOTCODE_2: 1416 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 1417 /* Self-reset ChiMP upon next PCIe reset: */ 1418 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1419 break; 1420 case BNX_DIR_TYPE_APE_FW: 1421 case BNX_DIR_TYPE_APE_PATCH: 1422 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 1423 /* Self-reset APE upon next PCIe reset: */ 1424 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1425 break; 1426 case BNX_DIR_TYPE_KONG_FW: 1427 case BNX_DIR_TYPE_KONG_PATCH: 1428 req.embedded_proc_type = 1429 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 1430 break; 1431 case BNX_DIR_TYPE_BONO_FW: 1432 case BNX_DIR_TYPE_BONO_PATCH: 1433 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 1434 break; 1435 case BNXT_FW_RESET_CHIP: 1436 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP; 1437 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP; 1438 break; 1439 case BNXT_FW_RESET_AP: 1440 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP; 1441 break; 1442 default: 1443 return -EINVAL; 1444 } 1445 1446 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1447 } 1448 1449 static int bnxt_flash_firmware(struct net_device *dev, 1450 u16 dir_type, 1451 const u8 *fw_data, 1452 size_t fw_size) 1453 { 1454 int rc = 0; 1455 u16 code_type; 1456 u32 stored_crc; 1457 u32 calculated_crc; 1458 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 1459 1460 switch (dir_type) { 1461 case BNX_DIR_TYPE_BOOTCODE: 1462 case BNX_DIR_TYPE_BOOTCODE_2: 1463 code_type = CODE_BOOT; 1464 break; 1465 case BNX_DIR_TYPE_CHIMP_PATCH: 1466 code_type = CODE_CHIMP_PATCH; 1467 break; 1468 case BNX_DIR_TYPE_APE_FW: 1469 code_type = CODE_MCTP_PASSTHRU; 1470 break; 1471 case BNX_DIR_TYPE_APE_PATCH: 1472 code_type = CODE_APE_PATCH; 1473 break; 1474 case BNX_DIR_TYPE_KONG_FW: 1475 code_type = CODE_KONG_FW; 1476 break; 1477 case BNX_DIR_TYPE_KONG_PATCH: 1478 code_type = CODE_KONG_PATCH; 1479 break; 1480 case BNX_DIR_TYPE_BONO_FW: 1481 code_type = CODE_BONO_FW; 1482 break; 1483 case BNX_DIR_TYPE_BONO_PATCH: 1484 code_type = CODE_BONO_PATCH; 1485 break; 1486 default: 1487 netdev_err(dev, "Unsupported directory entry type: %u\n", 1488 dir_type); 1489 return -EINVAL; 1490 } 1491 if (fw_size < sizeof(struct bnxt_fw_header)) { 1492 netdev_err(dev, "Invalid firmware file size: %u\n", 1493 (unsigned int)fw_size); 1494 return -EINVAL; 1495 } 1496 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 1497 netdev_err(dev, "Invalid firmware signature: %08X\n", 1498 le32_to_cpu(header->signature)); 1499 return -EINVAL; 1500 } 1501 if (header->code_type != code_type) { 1502 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 1503 code_type, header->code_type); 1504 return -EINVAL; 1505 } 1506 if (header->device != DEVICE_CUMULUS_FAMILY) { 1507 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 1508 DEVICE_CUMULUS_FAMILY, header->device); 1509 return -EINVAL; 1510 } 1511 /* Confirm the CRC32 checksum of the file: */ 1512 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1513 sizeof(stored_crc))); 1514 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1515 if (calculated_crc != stored_crc) { 1516 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 1517 (unsigned long)stored_crc, 1518 (unsigned long)calculated_crc); 1519 return -EINVAL; 1520 } 1521 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1522 0, 0, fw_data, fw_size); 1523 if (rc == 0) /* Firmware update successful */ 1524 rc = bnxt_firmware_reset(dev, dir_type); 1525 1526 return rc; 1527 } 1528 1529 static int bnxt_flash_microcode(struct net_device *dev, 1530 u16 dir_type, 1531 const u8 *fw_data, 1532 size_t fw_size) 1533 { 1534 struct bnxt_ucode_trailer *trailer; 1535 u32 calculated_crc; 1536 u32 stored_crc; 1537 int rc = 0; 1538 1539 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 1540 netdev_err(dev, "Invalid microcode file size: %u\n", 1541 (unsigned int)fw_size); 1542 return -EINVAL; 1543 } 1544 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 1545 sizeof(*trailer))); 1546 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 1547 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 1548 le32_to_cpu(trailer->sig)); 1549 return -EINVAL; 1550 } 1551 if (le16_to_cpu(trailer->dir_type) != dir_type) { 1552 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 1553 dir_type, le16_to_cpu(trailer->dir_type)); 1554 return -EINVAL; 1555 } 1556 if (le16_to_cpu(trailer->trailer_length) < 1557 sizeof(struct bnxt_ucode_trailer)) { 1558 netdev_err(dev, "Invalid microcode trailer length: %d\n", 1559 le16_to_cpu(trailer->trailer_length)); 1560 return -EINVAL; 1561 } 1562 1563 /* Confirm the CRC32 checksum of the file: */ 1564 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1565 sizeof(stored_crc))); 1566 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1567 if (calculated_crc != stored_crc) { 1568 netdev_err(dev, 1569 "CRC32 (%08lX) does not match calculated: %08lX\n", 1570 (unsigned long)stored_crc, 1571 (unsigned long)calculated_crc); 1572 return -EINVAL; 1573 } 1574 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1575 0, 0, fw_data, fw_size); 1576 1577 return rc; 1578 } 1579 1580 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 1581 { 1582 switch (dir_type) { 1583 case BNX_DIR_TYPE_CHIMP_PATCH: 1584 case BNX_DIR_TYPE_BOOTCODE: 1585 case BNX_DIR_TYPE_BOOTCODE_2: 1586 case BNX_DIR_TYPE_APE_FW: 1587 case BNX_DIR_TYPE_APE_PATCH: 1588 case BNX_DIR_TYPE_KONG_FW: 1589 case BNX_DIR_TYPE_KONG_PATCH: 1590 case BNX_DIR_TYPE_BONO_FW: 1591 case BNX_DIR_TYPE_BONO_PATCH: 1592 return true; 1593 } 1594 1595 return false; 1596 } 1597 1598 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 1599 { 1600 switch (dir_type) { 1601 case BNX_DIR_TYPE_AVS: 1602 case BNX_DIR_TYPE_EXP_ROM_MBA: 1603 case BNX_DIR_TYPE_PCIE: 1604 case BNX_DIR_TYPE_TSCF_UCODE: 1605 case BNX_DIR_TYPE_EXT_PHY: 1606 case BNX_DIR_TYPE_CCM: 1607 case BNX_DIR_TYPE_ISCSI_BOOT: 1608 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 1609 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 1610 return true; 1611 } 1612 1613 return false; 1614 } 1615 1616 static bool bnxt_dir_type_is_executable(u16 dir_type) 1617 { 1618 return bnxt_dir_type_is_ape_bin_format(dir_type) || 1619 bnxt_dir_type_is_other_exec_format(dir_type); 1620 } 1621 1622 static int bnxt_flash_firmware_from_file(struct net_device *dev, 1623 u16 dir_type, 1624 const char *filename) 1625 { 1626 const struct firmware *fw; 1627 int rc; 1628 1629 rc = request_firmware(&fw, filename, &dev->dev); 1630 if (rc != 0) { 1631 netdev_err(dev, "Error %d requesting firmware file: %s\n", 1632 rc, filename); 1633 return rc; 1634 } 1635 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true) 1636 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 1637 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true) 1638 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 1639 else 1640 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1641 0, 0, fw->data, fw->size); 1642 release_firmware(fw); 1643 return rc; 1644 } 1645 1646 static int bnxt_flash_package_from_file(struct net_device *dev, 1647 char *filename, u32 install_type) 1648 { 1649 struct bnxt *bp = netdev_priv(dev); 1650 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr; 1651 struct hwrm_nvm_install_update_input install = {0}; 1652 const struct firmware *fw; 1653 u32 item_len; 1654 u16 index; 1655 int rc; 1656 1657 bnxt_hwrm_fw_set_time(bp); 1658 1659 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 1660 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1661 &index, &item_len, NULL) != 0) { 1662 netdev_err(dev, "PKG update area not created in nvram\n"); 1663 return -ENOBUFS; 1664 } 1665 1666 rc = request_firmware(&fw, filename, &dev->dev); 1667 if (rc != 0) { 1668 netdev_err(dev, "PKG error %d requesting file: %s\n", 1669 rc, filename); 1670 return rc; 1671 } 1672 1673 if (fw->size > item_len) { 1674 netdev_err(dev, "PKG insufficient update area in nvram: %lu", 1675 (unsigned long)fw->size); 1676 rc = -EFBIG; 1677 } else { 1678 dma_addr_t dma_handle; 1679 u8 *kmem; 1680 struct hwrm_nvm_modify_input modify = {0}; 1681 1682 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1); 1683 1684 modify.dir_idx = cpu_to_le16(index); 1685 modify.len = cpu_to_le32(fw->size); 1686 1687 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size, 1688 &dma_handle, GFP_KERNEL); 1689 if (!kmem) { 1690 netdev_err(dev, 1691 "dma_alloc_coherent failure, length = %u\n", 1692 (unsigned int)fw->size); 1693 rc = -ENOMEM; 1694 } else { 1695 memcpy(kmem, fw->data, fw->size); 1696 modify.host_src_addr = cpu_to_le64(dma_handle); 1697 1698 rc = hwrm_send_message(bp, &modify, sizeof(modify), 1699 FLASH_PACKAGE_TIMEOUT); 1700 dma_free_coherent(&bp->pdev->dev, fw->size, kmem, 1701 dma_handle); 1702 } 1703 } 1704 release_firmware(fw); 1705 if (rc) 1706 return rc; 1707 1708 if ((install_type & 0xffff) == 0) 1709 install_type >>= 16; 1710 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1); 1711 install.install_type = cpu_to_le32(install_type); 1712 1713 mutex_lock(&bp->hwrm_cmd_lock); 1714 rc = _hwrm_send_message(bp, &install, sizeof(install), 1715 INSTALL_PACKAGE_TIMEOUT); 1716 if (rc) { 1717 rc = -EOPNOTSUPP; 1718 goto flash_pkg_exit; 1719 } 1720 1721 if (resp->error_code) { 1722 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err; 1723 1724 if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { 1725 install.flags |= cpu_to_le16( 1726 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 1727 rc = _hwrm_send_message(bp, &install, sizeof(install), 1728 INSTALL_PACKAGE_TIMEOUT); 1729 if (rc) { 1730 rc = -EOPNOTSUPP; 1731 goto flash_pkg_exit; 1732 } 1733 } 1734 } 1735 1736 if (resp->result) { 1737 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 1738 (s8)resp->result, (int)resp->problem_item); 1739 rc = -ENOPKG; 1740 } 1741 flash_pkg_exit: 1742 mutex_unlock(&bp->hwrm_cmd_lock); 1743 return rc; 1744 } 1745 1746 static int bnxt_flash_device(struct net_device *dev, 1747 struct ethtool_flash *flash) 1748 { 1749 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 1750 netdev_err(dev, "flashdev not supported from a virtual function\n"); 1751 return -EINVAL; 1752 } 1753 1754 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 1755 flash->region > 0xffff) 1756 return bnxt_flash_package_from_file(dev, flash->data, 1757 flash->region); 1758 1759 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 1760 } 1761 1762 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 1763 { 1764 struct bnxt *bp = netdev_priv(dev); 1765 int rc; 1766 struct hwrm_nvm_get_dir_info_input req = {0}; 1767 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr; 1768 1769 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1); 1770 1771 mutex_lock(&bp->hwrm_cmd_lock); 1772 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1773 if (!rc) { 1774 *entries = le32_to_cpu(output->entries); 1775 *length = le32_to_cpu(output->entry_length); 1776 } 1777 mutex_unlock(&bp->hwrm_cmd_lock); 1778 return rc; 1779 } 1780 1781 static int bnxt_get_eeprom_len(struct net_device *dev) 1782 { 1783 /* The -1 return value allows the entire 32-bit range of offsets to be 1784 * passed via the ethtool command-line utility. 1785 */ 1786 return -1; 1787 } 1788 1789 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 1790 { 1791 struct bnxt *bp = netdev_priv(dev); 1792 int rc; 1793 u32 dir_entries; 1794 u32 entry_length; 1795 u8 *buf; 1796 size_t buflen; 1797 dma_addr_t dma_handle; 1798 struct hwrm_nvm_get_dir_entries_input req = {0}; 1799 1800 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 1801 if (rc != 0) 1802 return rc; 1803 1804 /* Insert 2 bytes of directory info (count and size of entries) */ 1805 if (len < 2) 1806 return -EINVAL; 1807 1808 *data++ = dir_entries; 1809 *data++ = entry_length; 1810 len -= 2; 1811 memset(data, 0xff, len); 1812 1813 buflen = dir_entries * entry_length; 1814 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle, 1815 GFP_KERNEL); 1816 if (!buf) { 1817 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1818 (unsigned)buflen); 1819 return -ENOMEM; 1820 } 1821 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1); 1822 req.host_dest_addr = cpu_to_le64(dma_handle); 1823 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1824 if (rc == 0) 1825 memcpy(data, buf, len > buflen ? buflen : len); 1826 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle); 1827 return rc; 1828 } 1829 1830 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 1831 u32 length, u8 *data) 1832 { 1833 struct bnxt *bp = netdev_priv(dev); 1834 int rc; 1835 u8 *buf; 1836 dma_addr_t dma_handle; 1837 struct hwrm_nvm_read_input req = {0}; 1838 1839 if (!length) 1840 return -EINVAL; 1841 1842 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle, 1843 GFP_KERNEL); 1844 if (!buf) { 1845 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1846 (unsigned)length); 1847 return -ENOMEM; 1848 } 1849 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1); 1850 req.host_dest_addr = cpu_to_le64(dma_handle); 1851 req.dir_idx = cpu_to_le16(index); 1852 req.offset = cpu_to_le32(offset); 1853 req.len = cpu_to_le32(length); 1854 1855 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1856 if (rc == 0) 1857 memcpy(data, buf, length); 1858 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle); 1859 return rc; 1860 } 1861 1862 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1863 u16 ext, u16 *index, u32 *item_length, 1864 u32 *data_length) 1865 { 1866 struct bnxt *bp = netdev_priv(dev); 1867 int rc; 1868 struct hwrm_nvm_find_dir_entry_input req = {0}; 1869 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr; 1870 1871 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1); 1872 req.enables = 0; 1873 req.dir_idx = 0; 1874 req.dir_type = cpu_to_le16(type); 1875 req.dir_ordinal = cpu_to_le16(ordinal); 1876 req.dir_ext = cpu_to_le16(ext); 1877 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 1878 mutex_lock(&bp->hwrm_cmd_lock); 1879 rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1880 if (rc == 0) { 1881 if (index) 1882 *index = le16_to_cpu(output->dir_idx); 1883 if (item_length) 1884 *item_length = le32_to_cpu(output->dir_item_length); 1885 if (data_length) 1886 *data_length = le32_to_cpu(output->dir_data_length); 1887 } 1888 mutex_unlock(&bp->hwrm_cmd_lock); 1889 return rc; 1890 } 1891 1892 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 1893 { 1894 char *retval = NULL; 1895 char *p; 1896 char *value; 1897 int field = 0; 1898 1899 if (datalen < 1) 1900 return NULL; 1901 /* null-terminate the log data (removing last '\n'): */ 1902 data[datalen - 1] = 0; 1903 for (p = data; *p != 0; p++) { 1904 field = 0; 1905 retval = NULL; 1906 while (*p != 0 && *p != '\n') { 1907 value = p; 1908 while (*p != 0 && *p != '\t' && *p != '\n') 1909 p++; 1910 if (field == desired_field) 1911 retval = value; 1912 if (*p != '\t') 1913 break; 1914 *p = 0; 1915 field++; 1916 p++; 1917 } 1918 if (*p == 0) 1919 break; 1920 *p = 0; 1921 } 1922 return retval; 1923 } 1924 1925 static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen) 1926 { 1927 u16 index = 0; 1928 u32 datalen; 1929 1930 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 1931 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1932 &index, NULL, &datalen) != 0) 1933 return NULL; 1934 1935 memset(buf, 0, buflen); 1936 if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0) 1937 return NULL; 1938 1939 return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf, 1940 datalen); 1941 } 1942 1943 static int bnxt_get_eeprom(struct net_device *dev, 1944 struct ethtool_eeprom *eeprom, 1945 u8 *data) 1946 { 1947 u32 index; 1948 u32 offset; 1949 1950 if (eeprom->offset == 0) /* special offset value to get directory */ 1951 return bnxt_get_nvram_directory(dev, eeprom->len, data); 1952 1953 index = eeprom->offset >> 24; 1954 offset = eeprom->offset & 0xffffff; 1955 1956 if (index == 0) { 1957 netdev_err(dev, "unsupported index value: %d\n", index); 1958 return -EINVAL; 1959 } 1960 1961 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 1962 } 1963 1964 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 1965 { 1966 struct bnxt *bp = netdev_priv(dev); 1967 struct hwrm_nvm_erase_dir_entry_input req = {0}; 1968 1969 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1); 1970 req.dir_idx = cpu_to_le16(index); 1971 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1972 } 1973 1974 static int bnxt_set_eeprom(struct net_device *dev, 1975 struct ethtool_eeprom *eeprom, 1976 u8 *data) 1977 { 1978 struct bnxt *bp = netdev_priv(dev); 1979 u8 index, dir_op; 1980 u16 type, ext, ordinal, attr; 1981 1982 if (!BNXT_PF(bp)) { 1983 netdev_err(dev, "NVM write not supported from a virtual function\n"); 1984 return -EINVAL; 1985 } 1986 1987 type = eeprom->magic >> 16; 1988 1989 if (type == 0xffff) { /* special value for directory operations */ 1990 index = eeprom->magic & 0xff; 1991 dir_op = eeprom->magic >> 8; 1992 if (index == 0) 1993 return -EINVAL; 1994 switch (dir_op) { 1995 case 0x0e: /* erase */ 1996 if (eeprom->offset != ~eeprom->magic) 1997 return -EINVAL; 1998 return bnxt_erase_nvram_directory(dev, index - 1); 1999 default: 2000 return -EINVAL; 2001 } 2002 } 2003 2004 /* Create or re-write an NVM item: */ 2005 if (bnxt_dir_type_is_executable(type) == true) 2006 return -EOPNOTSUPP; 2007 ext = eeprom->magic & 0xffff; 2008 ordinal = eeprom->offset >> 16; 2009 attr = eeprom->offset & 0xffff; 2010 2011 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data, 2012 eeprom->len); 2013 } 2014 2015 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 2016 { 2017 struct bnxt *bp = netdev_priv(dev); 2018 struct ethtool_eee *eee = &bp->eee; 2019 struct bnxt_link_info *link_info = &bp->link_info; 2020 u32 advertising = 2021 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 2022 int rc = 0; 2023 2024 if (!BNXT_SINGLE_PF(bp)) 2025 return -EOPNOTSUPP; 2026 2027 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 2028 return -EOPNOTSUPP; 2029 2030 if (!edata->eee_enabled) 2031 goto eee_ok; 2032 2033 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 2034 netdev_warn(dev, "EEE requires autoneg\n"); 2035 return -EINVAL; 2036 } 2037 if (edata->tx_lpi_enabled) { 2038 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 2039 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 2040 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 2041 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 2042 return -EINVAL; 2043 } else if (!bp->lpi_tmr_hi) { 2044 edata->tx_lpi_timer = eee->tx_lpi_timer; 2045 } 2046 } 2047 if (!edata->advertised) { 2048 edata->advertised = advertising & eee->supported; 2049 } else if (edata->advertised & ~advertising) { 2050 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 2051 edata->advertised, advertising); 2052 return -EINVAL; 2053 } 2054 2055 eee->advertised = edata->advertised; 2056 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 2057 eee->tx_lpi_timer = edata->tx_lpi_timer; 2058 eee_ok: 2059 eee->eee_enabled = edata->eee_enabled; 2060 2061 if (netif_running(dev)) 2062 rc = bnxt_hwrm_set_link_setting(bp, false, true); 2063 2064 return rc; 2065 } 2066 2067 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 2068 { 2069 struct bnxt *bp = netdev_priv(dev); 2070 2071 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 2072 return -EOPNOTSUPP; 2073 2074 *edata = bp->eee; 2075 if (!bp->eee.eee_enabled) { 2076 /* Preserve tx_lpi_timer so that the last value will be used 2077 * by default when it is re-enabled. 2078 */ 2079 edata->advertised = 0; 2080 edata->tx_lpi_enabled = 0; 2081 } 2082 2083 if (!bp->eee.eee_active) 2084 edata->lp_advertised = 0; 2085 2086 return 0; 2087 } 2088 2089 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 2090 u16 page_number, u16 start_addr, 2091 u16 data_length, u8 *buf) 2092 { 2093 struct hwrm_port_phy_i2c_read_input req = {0}; 2094 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; 2095 int rc, byte_offset = 0; 2096 2097 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); 2098 req.i2c_slave_addr = i2c_addr; 2099 req.page_number = cpu_to_le16(page_number); 2100 req.port_id = cpu_to_le16(bp->pf.port_id); 2101 do { 2102 u16 xfer_size; 2103 2104 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 2105 data_length -= xfer_size; 2106 req.page_offset = cpu_to_le16(start_addr + byte_offset); 2107 req.data_length = xfer_size; 2108 req.enables = cpu_to_le32(start_addr + byte_offset ? 2109 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); 2110 mutex_lock(&bp->hwrm_cmd_lock); 2111 rc = _hwrm_send_message(bp, &req, sizeof(req), 2112 HWRM_CMD_TIMEOUT); 2113 if (!rc) 2114 memcpy(buf + byte_offset, output->data, xfer_size); 2115 mutex_unlock(&bp->hwrm_cmd_lock); 2116 byte_offset += xfer_size; 2117 } while (!rc && data_length > 0); 2118 2119 return rc; 2120 } 2121 2122 static int bnxt_get_module_info(struct net_device *dev, 2123 struct ethtool_modinfo *modinfo) 2124 { 2125 struct bnxt *bp = netdev_priv(dev); 2126 struct hwrm_port_phy_i2c_read_input req = {0}; 2127 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; 2128 int rc; 2129 2130 /* No point in going further if phy status indicates 2131 * module is not inserted or if it is powered down or 2132 * if it is of type 10GBase-T 2133 */ 2134 if (bp->link_info.module_status > 2135 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 2136 return -EOPNOTSUPP; 2137 2138 /* This feature is not supported in older firmware versions */ 2139 if (bp->hwrm_spec_code < 0x10202) 2140 return -EOPNOTSUPP; 2141 2142 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); 2143 req.i2c_slave_addr = I2C_DEV_ADDR_A0; 2144 req.page_number = 0; 2145 req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR); 2146 req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE; 2147 req.port_id = cpu_to_le16(bp->pf.port_id); 2148 mutex_lock(&bp->hwrm_cmd_lock); 2149 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2150 if (!rc) { 2151 u32 module_id = le32_to_cpu(output->data[0]); 2152 2153 switch (module_id) { 2154 case SFF_MODULE_ID_SFP: 2155 modinfo->type = ETH_MODULE_SFF_8472; 2156 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 2157 break; 2158 case SFF_MODULE_ID_QSFP: 2159 case SFF_MODULE_ID_QSFP_PLUS: 2160 modinfo->type = ETH_MODULE_SFF_8436; 2161 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2162 break; 2163 case SFF_MODULE_ID_QSFP28: 2164 modinfo->type = ETH_MODULE_SFF_8636; 2165 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 2166 break; 2167 default: 2168 rc = -EOPNOTSUPP; 2169 break; 2170 } 2171 } 2172 mutex_unlock(&bp->hwrm_cmd_lock); 2173 return rc; 2174 } 2175 2176 static int bnxt_get_module_eeprom(struct net_device *dev, 2177 struct ethtool_eeprom *eeprom, 2178 u8 *data) 2179 { 2180 struct bnxt *bp = netdev_priv(dev); 2181 u16 start = eeprom->offset, length = eeprom->len; 2182 int rc = 0; 2183 2184 memset(data, 0, eeprom->len); 2185 2186 /* Read A0 portion of the EEPROM */ 2187 if (start < ETH_MODULE_SFF_8436_LEN) { 2188 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 2189 length = ETH_MODULE_SFF_8436_LEN - start; 2190 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 2191 start, length, data); 2192 if (rc) 2193 return rc; 2194 start += length; 2195 data += length; 2196 length = eeprom->len - length; 2197 } 2198 2199 /* Read A2 portion of the EEPROM */ 2200 if (length) { 2201 start -= ETH_MODULE_SFF_8436_LEN; 2202 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, 2203 start, length, data); 2204 } 2205 return rc; 2206 } 2207 2208 static int bnxt_nway_reset(struct net_device *dev) 2209 { 2210 int rc = 0; 2211 2212 struct bnxt *bp = netdev_priv(dev); 2213 struct bnxt_link_info *link_info = &bp->link_info; 2214 2215 if (!BNXT_SINGLE_PF(bp)) 2216 return -EOPNOTSUPP; 2217 2218 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 2219 return -EINVAL; 2220 2221 if (netif_running(dev)) 2222 rc = bnxt_hwrm_set_link_setting(bp, true, false); 2223 2224 return rc; 2225 } 2226 2227 static int bnxt_set_phys_id(struct net_device *dev, 2228 enum ethtool_phys_id_state state) 2229 { 2230 struct hwrm_port_led_cfg_input req = {0}; 2231 struct bnxt *bp = netdev_priv(dev); 2232 struct bnxt_pf_info *pf = &bp->pf; 2233 struct bnxt_led_cfg *led_cfg; 2234 u8 led_state; 2235 __le16 duration; 2236 int i, rc; 2237 2238 if (!bp->num_leds || BNXT_VF(bp)) 2239 return -EOPNOTSUPP; 2240 2241 if (state == ETHTOOL_ID_ACTIVE) { 2242 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 2243 duration = cpu_to_le16(500); 2244 } else if (state == ETHTOOL_ID_INACTIVE) { 2245 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 2246 duration = cpu_to_le16(0); 2247 } else { 2248 return -EINVAL; 2249 } 2250 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1); 2251 req.port_id = cpu_to_le16(pf->port_id); 2252 req.num_leds = bp->num_leds; 2253 led_cfg = (struct bnxt_led_cfg *)&req.led0_id; 2254 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 2255 req.enables |= BNXT_LED_DFLT_ENABLES(i); 2256 led_cfg->led_id = bp->leds[i].led_id; 2257 led_cfg->led_state = led_state; 2258 led_cfg->led_blink_on = duration; 2259 led_cfg->led_blink_off = duration; 2260 led_cfg->led_group_id = bp->leds[i].led_group_id; 2261 } 2262 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2263 if (rc) 2264 rc = -EIO; 2265 return rc; 2266 } 2267 2268 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 2269 { 2270 struct hwrm_selftest_irq_input req = {0}; 2271 2272 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1); 2273 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2274 } 2275 2276 static int bnxt_test_irq(struct bnxt *bp) 2277 { 2278 int i; 2279 2280 for (i = 0; i < bp->cp_nr_rings; i++) { 2281 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 2282 int rc; 2283 2284 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 2285 if (rc) 2286 return rc; 2287 } 2288 return 0; 2289 } 2290 2291 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 2292 { 2293 struct hwrm_port_mac_cfg_input req = {0}; 2294 2295 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1); 2296 2297 req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 2298 if (enable) 2299 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 2300 else 2301 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 2302 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2303 } 2304 2305 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 2306 struct hwrm_port_phy_cfg_input *req) 2307 { 2308 struct bnxt_link_info *link_info = &bp->link_info; 2309 u16 fw_advertising = link_info->advertising; 2310 u16 fw_speed; 2311 int rc; 2312 2313 if (!link_info->autoneg) 2314 return 0; 2315 2316 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 2317 if (netif_carrier_ok(bp->dev)) 2318 fw_speed = bp->link_info.link_speed; 2319 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 2320 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 2321 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 2322 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 2323 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 2324 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 2325 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 2326 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 2327 2328 req->force_link_speed = cpu_to_le16(fw_speed); 2329 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 2330 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2331 rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT); 2332 req->flags = 0; 2333 req->force_link_speed = cpu_to_le16(0); 2334 return rc; 2335 } 2336 2337 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable) 2338 { 2339 struct hwrm_port_phy_cfg_input req = {0}; 2340 2341 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1); 2342 2343 if (enable) { 2344 bnxt_disable_an_for_lpbk(bp, &req); 2345 req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 2346 } else { 2347 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 2348 } 2349 req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 2350 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2351 } 2352 2353 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi, 2354 u32 raw_cons, int pkt_size) 2355 { 2356 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 2357 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; 2358 struct bnxt_sw_rx_bd *rx_buf; 2359 struct rx_cmp *rxcmp; 2360 u16 cp_cons, cons; 2361 u8 *data; 2362 u32 len; 2363 int i; 2364 2365 cp_cons = RING_CMP(raw_cons); 2366 rxcmp = (struct rx_cmp *) 2367 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 2368 cons = rxcmp->rx_cmp_opaque; 2369 rx_buf = &rxr->rx_buf_ring[cons]; 2370 data = rx_buf->data_ptr; 2371 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 2372 if (len != pkt_size) 2373 return -EIO; 2374 i = ETH_ALEN; 2375 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 2376 return -EIO; 2377 i += ETH_ALEN; 2378 for ( ; i < pkt_size; i++) { 2379 if (data[i] != (u8)(i & 0xff)) 2380 return -EIO; 2381 } 2382 return 0; 2383 } 2384 2385 static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size) 2386 { 2387 struct bnxt_napi *bnapi = bp->bnapi[0]; 2388 struct bnxt_cp_ring_info *cpr; 2389 struct tx_cmp *txcmp; 2390 int rc = -EIO; 2391 u32 raw_cons; 2392 u32 cons; 2393 int i; 2394 2395 cpr = &bnapi->cp_ring; 2396 raw_cons = cpr->cp_raw_cons; 2397 for (i = 0; i < 200; i++) { 2398 cons = RING_CMP(raw_cons); 2399 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 2400 2401 if (!TX_CMP_VALID(txcmp, raw_cons)) { 2402 udelay(5); 2403 continue; 2404 } 2405 2406 /* The valid test of the entry must be done first before 2407 * reading any further. 2408 */ 2409 dma_rmb(); 2410 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 2411 rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size); 2412 raw_cons = NEXT_RAW_CMP(raw_cons); 2413 raw_cons = NEXT_RAW_CMP(raw_cons); 2414 break; 2415 } 2416 raw_cons = NEXT_RAW_CMP(raw_cons); 2417 } 2418 cpr->cp_raw_cons = raw_cons; 2419 return rc; 2420 } 2421 2422 static int bnxt_run_loopback(struct bnxt *bp) 2423 { 2424 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 2425 int pkt_size, i = 0; 2426 struct sk_buff *skb; 2427 dma_addr_t map; 2428 u8 *data; 2429 int rc; 2430 2431 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 2432 skb = netdev_alloc_skb(bp->dev, pkt_size); 2433 if (!skb) 2434 return -ENOMEM; 2435 data = skb_put(skb, pkt_size); 2436 eth_broadcast_addr(data); 2437 i += ETH_ALEN; 2438 ether_addr_copy(&data[i], bp->dev->dev_addr); 2439 i += ETH_ALEN; 2440 for ( ; i < pkt_size; i++) 2441 data[i] = (u8)(i & 0xff); 2442 2443 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 2444 PCI_DMA_TODEVICE); 2445 if (dma_mapping_error(&bp->pdev->dev, map)) { 2446 dev_kfree_skb(skb); 2447 return -EIO; 2448 } 2449 bnxt_xmit_xdp(bp, txr, map, pkt_size, 0); 2450 2451 /* Sync BD data before updating doorbell */ 2452 wmb(); 2453 2454 bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod); 2455 rc = bnxt_poll_loopback(bp, pkt_size); 2456 2457 dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE); 2458 dev_kfree_skb(skb); 2459 return rc; 2460 } 2461 2462 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 2463 { 2464 struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr; 2465 struct hwrm_selftest_exec_input req = {0}; 2466 int rc; 2467 2468 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1); 2469 mutex_lock(&bp->hwrm_cmd_lock); 2470 resp->test_success = 0; 2471 req.flags = test_mask; 2472 rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout); 2473 *test_results = resp->test_success; 2474 mutex_unlock(&bp->hwrm_cmd_lock); 2475 return rc; 2476 } 2477 2478 #define BNXT_DRV_TESTS 3 2479 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 2480 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 2481 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 2482 2483 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 2484 u64 *buf) 2485 { 2486 struct bnxt *bp = netdev_priv(dev); 2487 bool offline = false; 2488 u8 test_results = 0; 2489 u8 test_mask = 0; 2490 int rc, i; 2491 2492 if (!bp->num_tests || !BNXT_SINGLE_PF(bp)) 2493 return; 2494 memset(buf, 0, sizeof(u64) * bp->num_tests); 2495 if (!netif_running(dev)) { 2496 etest->flags |= ETH_TEST_FL_FAILED; 2497 return; 2498 } 2499 2500 if (etest->flags & ETH_TEST_FL_OFFLINE) { 2501 if (bp->pf.active_vfs) { 2502 etest->flags |= ETH_TEST_FL_FAILED; 2503 netdev_warn(dev, "Offline tests cannot be run with active VFs\n"); 2504 return; 2505 } 2506 offline = true; 2507 } 2508 2509 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2510 u8 bit_val = 1 << i; 2511 2512 if (!(bp->test_info->offline_mask & bit_val)) 2513 test_mask |= bit_val; 2514 else if (offline) 2515 test_mask |= bit_val; 2516 } 2517 if (!offline) { 2518 bnxt_run_fw_tests(bp, test_mask, &test_results); 2519 } else { 2520 rc = bnxt_close_nic(bp, false, false); 2521 if (rc) 2522 return; 2523 bnxt_run_fw_tests(bp, test_mask, &test_results); 2524 2525 buf[BNXT_MACLPBK_TEST_IDX] = 1; 2526 bnxt_hwrm_mac_loopback(bp, true); 2527 msleep(250); 2528 rc = bnxt_half_open_nic(bp); 2529 if (rc) { 2530 bnxt_hwrm_mac_loopback(bp, false); 2531 etest->flags |= ETH_TEST_FL_FAILED; 2532 return; 2533 } 2534 if (bnxt_run_loopback(bp)) 2535 etest->flags |= ETH_TEST_FL_FAILED; 2536 else 2537 buf[BNXT_MACLPBK_TEST_IDX] = 0; 2538 2539 bnxt_hwrm_mac_loopback(bp, false); 2540 bnxt_hwrm_phy_loopback(bp, true); 2541 msleep(1000); 2542 if (bnxt_run_loopback(bp)) { 2543 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 2544 etest->flags |= ETH_TEST_FL_FAILED; 2545 } 2546 bnxt_hwrm_phy_loopback(bp, false); 2547 bnxt_half_close_nic(bp); 2548 bnxt_open_nic(bp, false, true); 2549 } 2550 if (bnxt_test_irq(bp)) { 2551 buf[BNXT_IRQ_TEST_IDX] = 1; 2552 etest->flags |= ETH_TEST_FL_FAILED; 2553 } 2554 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2555 u8 bit_val = 1 << i; 2556 2557 if ((test_mask & bit_val) && !(test_results & bit_val)) { 2558 buf[i] = 1; 2559 etest->flags |= ETH_TEST_FL_FAILED; 2560 } 2561 } 2562 } 2563 2564 static int bnxt_reset(struct net_device *dev, u32 *flags) 2565 { 2566 struct bnxt *bp = netdev_priv(dev); 2567 int rc = 0; 2568 2569 if (!BNXT_PF(bp)) { 2570 netdev_err(dev, "Reset is not supported from a VF\n"); 2571 return -EOPNOTSUPP; 2572 } 2573 2574 if (pci_vfs_assigned(bp->pdev)) { 2575 netdev_err(dev, 2576 "Reset not allowed when VFs are assigned to VMs\n"); 2577 return -EBUSY; 2578 } 2579 2580 if (*flags == ETH_RESET_ALL) { 2581 /* This feature is not supported in older firmware versions */ 2582 if (bp->hwrm_spec_code < 0x10803) 2583 return -EOPNOTSUPP; 2584 2585 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP); 2586 if (!rc) { 2587 netdev_info(dev, "Reset request successful. Reload driver to complete reset\n"); 2588 *flags = 0; 2589 } 2590 } else if (*flags == ETH_RESET_AP) { 2591 /* This feature is not supported in older firmware versions */ 2592 if (bp->hwrm_spec_code < 0x10803) 2593 return -EOPNOTSUPP; 2594 2595 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP); 2596 if (!rc) { 2597 netdev_info(dev, "Reset Application Processor request successful.\n"); 2598 *flags = 0; 2599 } 2600 } else { 2601 rc = -EINVAL; 2602 } 2603 2604 return rc; 2605 } 2606 2607 void bnxt_ethtool_init(struct bnxt *bp) 2608 { 2609 struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr; 2610 struct hwrm_selftest_qlist_input req = {0}; 2611 struct bnxt_test_info *test_info; 2612 struct net_device *dev = bp->dev; 2613 char *pkglog; 2614 int i, rc; 2615 2616 pkglog = kzalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL); 2617 if (pkglog) { 2618 char *pkgver; 2619 int len; 2620 2621 pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH); 2622 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) { 2623 len = strlen(bp->fw_ver_str); 2624 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1, 2625 "/pkg %s", pkgver); 2626 } 2627 kfree(pkglog); 2628 } 2629 if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp)) 2630 return; 2631 2632 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1); 2633 mutex_lock(&bp->hwrm_cmd_lock); 2634 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2635 if (rc) 2636 goto ethtool_init_exit; 2637 2638 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 2639 if (!test_info) 2640 goto ethtool_init_exit; 2641 2642 bp->test_info = test_info; 2643 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 2644 if (bp->num_tests > BNXT_MAX_TEST) 2645 bp->num_tests = BNXT_MAX_TEST; 2646 2647 test_info->offline_mask = resp->offline_tests; 2648 test_info->timeout = le16_to_cpu(resp->test_timeout); 2649 if (!test_info->timeout) 2650 test_info->timeout = HWRM_CMD_TIMEOUT; 2651 for (i = 0; i < bp->num_tests; i++) { 2652 char *str = test_info->string[i]; 2653 char *fw_str = resp->test0_name + i * 32; 2654 2655 if (i == BNXT_MACLPBK_TEST_IDX) { 2656 strcpy(str, "Mac loopback test (offline)"); 2657 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 2658 strcpy(str, "Phy loopback test (offline)"); 2659 } else if (i == BNXT_IRQ_TEST_IDX) { 2660 strcpy(str, "Interrupt_test (offline)"); 2661 } else { 2662 strlcpy(str, fw_str, ETH_GSTRING_LEN); 2663 strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); 2664 if (test_info->offline_mask & (1 << i)) 2665 strncat(str, " (offline)", 2666 ETH_GSTRING_LEN - strlen(str)); 2667 else 2668 strncat(str, " (online)", 2669 ETH_GSTRING_LEN - strlen(str)); 2670 } 2671 } 2672 2673 ethtool_init_exit: 2674 mutex_unlock(&bp->hwrm_cmd_lock); 2675 } 2676 2677 void bnxt_ethtool_free(struct bnxt *bp) 2678 { 2679 kfree(bp->test_info); 2680 bp->test_info = NULL; 2681 } 2682 2683 const struct ethtool_ops bnxt_ethtool_ops = { 2684 .get_link_ksettings = bnxt_get_link_ksettings, 2685 .set_link_ksettings = bnxt_set_link_ksettings, 2686 .get_pauseparam = bnxt_get_pauseparam, 2687 .set_pauseparam = bnxt_set_pauseparam, 2688 .get_drvinfo = bnxt_get_drvinfo, 2689 .get_wol = bnxt_get_wol, 2690 .set_wol = bnxt_set_wol, 2691 .get_coalesce = bnxt_get_coalesce, 2692 .set_coalesce = bnxt_set_coalesce, 2693 .get_msglevel = bnxt_get_msglevel, 2694 .set_msglevel = bnxt_set_msglevel, 2695 .get_sset_count = bnxt_get_sset_count, 2696 .get_strings = bnxt_get_strings, 2697 .get_ethtool_stats = bnxt_get_ethtool_stats, 2698 .set_ringparam = bnxt_set_ringparam, 2699 .get_ringparam = bnxt_get_ringparam, 2700 .get_channels = bnxt_get_channels, 2701 .set_channels = bnxt_set_channels, 2702 .get_rxnfc = bnxt_get_rxnfc, 2703 .set_rxnfc = bnxt_set_rxnfc, 2704 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 2705 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 2706 .get_rxfh = bnxt_get_rxfh, 2707 .flash_device = bnxt_flash_device, 2708 .get_eeprom_len = bnxt_get_eeprom_len, 2709 .get_eeprom = bnxt_get_eeprom, 2710 .set_eeprom = bnxt_set_eeprom, 2711 .get_link = bnxt_get_link, 2712 .get_eee = bnxt_get_eee, 2713 .set_eee = bnxt_set_eee, 2714 .get_module_info = bnxt_get_module_info, 2715 .get_module_eeprom = bnxt_get_module_eeprom, 2716 .nway_reset = bnxt_nway_reset, 2717 .set_phys_id = bnxt_set_phys_id, 2718 .self_test = bnxt_self_test, 2719 .reset = bnxt_reset, 2720 }; 2721