1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/interrupt.h> 15 #include <linux/pci.h> 16 #include <linux/etherdevice.h> 17 #include <linux/crc32.h> 18 #include <linux/firmware.h> 19 #include "bnxt_hsi.h" 20 #include "bnxt.h" 21 #include "bnxt_xdp.h" 22 #include "bnxt_ethtool.h" 23 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 24 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 25 #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100) 26 #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 27 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 28 29 static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen); 30 31 static u32 bnxt_get_msglevel(struct net_device *dev) 32 { 33 struct bnxt *bp = netdev_priv(dev); 34 35 return bp->msg_enable; 36 } 37 38 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 39 { 40 struct bnxt *bp = netdev_priv(dev); 41 42 bp->msg_enable = value; 43 } 44 45 static int bnxt_get_coalesce(struct net_device *dev, 46 struct ethtool_coalesce *coal) 47 { 48 struct bnxt *bp = netdev_priv(dev); 49 50 memset(coal, 0, sizeof(*coal)); 51 52 coal->rx_coalesce_usecs = bp->rx_coal_ticks; 53 /* 2 completion records per rx packet */ 54 coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2; 55 coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq; 56 coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2; 57 58 coal->tx_coalesce_usecs = bp->tx_coal_ticks; 59 coal->tx_max_coalesced_frames = bp->tx_coal_bufs; 60 coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq; 61 coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq; 62 63 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 64 65 return 0; 66 } 67 68 static int bnxt_set_coalesce(struct net_device *dev, 69 struct ethtool_coalesce *coal) 70 { 71 struct bnxt *bp = netdev_priv(dev); 72 bool update_stats = false; 73 int rc = 0; 74 75 bp->rx_coal_ticks = coal->rx_coalesce_usecs; 76 /* 2 completion records per rx packet */ 77 bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2; 78 bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq; 79 bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2; 80 81 bp->tx_coal_ticks = coal->tx_coalesce_usecs; 82 bp->tx_coal_bufs = coal->tx_max_coalesced_frames; 83 bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq; 84 bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq; 85 86 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 87 u32 stats_ticks = coal->stats_block_coalesce_usecs; 88 89 stats_ticks = clamp_t(u32, stats_ticks, 90 BNXT_MIN_STATS_COAL_TICKS, 91 BNXT_MAX_STATS_COAL_TICKS); 92 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 93 bp->stats_coal_ticks = stats_ticks; 94 update_stats = true; 95 } 96 97 if (netif_running(dev)) { 98 if (update_stats) { 99 rc = bnxt_close_nic(bp, true, false); 100 if (!rc) 101 rc = bnxt_open_nic(bp, true, false); 102 } else { 103 rc = bnxt_hwrm_set_coal(bp); 104 } 105 } 106 107 return rc; 108 } 109 110 #define BNXT_NUM_STATS 21 111 112 #define BNXT_RX_STATS_ENTRY(counter) \ 113 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 114 115 #define BNXT_TX_STATS_ENTRY(counter) \ 116 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 117 118 static const struct { 119 long offset; 120 char string[ETH_GSTRING_LEN]; 121 } bnxt_port_stats_arr[] = { 122 BNXT_RX_STATS_ENTRY(rx_64b_frames), 123 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 124 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 125 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 126 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 127 BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames), 128 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 129 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 130 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 131 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 132 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 133 BNXT_RX_STATS_ENTRY(rx_total_frames), 134 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 135 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 136 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 137 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 138 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 139 BNXT_RX_STATS_ENTRY(rx_pause_frames), 140 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 141 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 142 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 143 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 144 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 145 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 146 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 147 BNXT_RX_STATS_ENTRY(rx_good_frames), 148 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 149 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 150 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 151 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 152 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 153 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 154 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 155 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 156 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 157 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 158 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 159 BNXT_RX_STATS_ENTRY(rx_bytes), 160 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 161 BNXT_RX_STATS_ENTRY(rx_runt_frames), 162 163 BNXT_TX_STATS_ENTRY(tx_64b_frames), 164 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 165 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 166 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 167 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 168 BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames), 169 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 170 BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames), 171 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 172 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 173 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 174 BNXT_TX_STATS_ENTRY(tx_good_frames), 175 BNXT_TX_STATS_ENTRY(tx_total_frames), 176 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 177 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 178 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 179 BNXT_TX_STATS_ENTRY(tx_pause_frames), 180 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 181 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 182 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 183 BNXT_TX_STATS_ENTRY(tx_err), 184 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 185 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 186 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 187 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 188 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 189 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 190 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 191 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 192 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 193 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 194 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 195 BNXT_TX_STATS_ENTRY(tx_total_collisions), 196 BNXT_TX_STATS_ENTRY(tx_bytes), 197 }; 198 199 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 200 201 static int bnxt_get_sset_count(struct net_device *dev, int sset) 202 { 203 struct bnxt *bp = netdev_priv(dev); 204 205 switch (sset) { 206 case ETH_SS_STATS: { 207 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings; 208 209 if (bp->flags & BNXT_FLAG_PORT_STATS) 210 num_stats += BNXT_NUM_PORT_STATS; 211 212 return num_stats; 213 } 214 case ETH_SS_TEST: 215 if (!bp->num_tests) 216 return -EOPNOTSUPP; 217 return bp->num_tests; 218 default: 219 return -EOPNOTSUPP; 220 } 221 } 222 223 static void bnxt_get_ethtool_stats(struct net_device *dev, 224 struct ethtool_stats *stats, u64 *buf) 225 { 226 u32 i, j = 0; 227 struct bnxt *bp = netdev_priv(dev); 228 u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings; 229 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8; 230 231 memset(buf, 0, buf_size); 232 233 if (!bp->bnapi) 234 return; 235 236 for (i = 0; i < bp->cp_nr_rings; i++) { 237 struct bnxt_napi *bnapi = bp->bnapi[i]; 238 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 239 __le64 *hw_stats = (__le64 *)cpr->hw_stats; 240 int k; 241 242 for (k = 0; k < stat_fields; j++, k++) 243 buf[j] = le64_to_cpu(hw_stats[k]); 244 buf[j++] = cpr->rx_l4_csum_errors; 245 } 246 if (bp->flags & BNXT_FLAG_PORT_STATS) { 247 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats; 248 249 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) { 250 buf[j] = le64_to_cpu(*(port_stats + 251 bnxt_port_stats_arr[i].offset)); 252 } 253 } 254 } 255 256 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 257 { 258 struct bnxt *bp = netdev_priv(dev); 259 u32 i; 260 261 switch (stringset) { 262 /* The number of strings must match BNXT_NUM_STATS defined above. */ 263 case ETH_SS_STATS: 264 for (i = 0; i < bp->cp_nr_rings; i++) { 265 sprintf(buf, "[%d]: rx_ucast_packets", i); 266 buf += ETH_GSTRING_LEN; 267 sprintf(buf, "[%d]: rx_mcast_packets", i); 268 buf += ETH_GSTRING_LEN; 269 sprintf(buf, "[%d]: rx_bcast_packets", i); 270 buf += ETH_GSTRING_LEN; 271 sprintf(buf, "[%d]: rx_discards", i); 272 buf += ETH_GSTRING_LEN; 273 sprintf(buf, "[%d]: rx_drops", i); 274 buf += ETH_GSTRING_LEN; 275 sprintf(buf, "[%d]: rx_ucast_bytes", i); 276 buf += ETH_GSTRING_LEN; 277 sprintf(buf, "[%d]: rx_mcast_bytes", i); 278 buf += ETH_GSTRING_LEN; 279 sprintf(buf, "[%d]: rx_bcast_bytes", i); 280 buf += ETH_GSTRING_LEN; 281 sprintf(buf, "[%d]: tx_ucast_packets", i); 282 buf += ETH_GSTRING_LEN; 283 sprintf(buf, "[%d]: tx_mcast_packets", i); 284 buf += ETH_GSTRING_LEN; 285 sprintf(buf, "[%d]: tx_bcast_packets", i); 286 buf += ETH_GSTRING_LEN; 287 sprintf(buf, "[%d]: tx_discards", i); 288 buf += ETH_GSTRING_LEN; 289 sprintf(buf, "[%d]: tx_drops", i); 290 buf += ETH_GSTRING_LEN; 291 sprintf(buf, "[%d]: tx_ucast_bytes", i); 292 buf += ETH_GSTRING_LEN; 293 sprintf(buf, "[%d]: tx_mcast_bytes", i); 294 buf += ETH_GSTRING_LEN; 295 sprintf(buf, "[%d]: tx_bcast_bytes", i); 296 buf += ETH_GSTRING_LEN; 297 sprintf(buf, "[%d]: tpa_packets", i); 298 buf += ETH_GSTRING_LEN; 299 sprintf(buf, "[%d]: tpa_bytes", i); 300 buf += ETH_GSTRING_LEN; 301 sprintf(buf, "[%d]: tpa_events", i); 302 buf += ETH_GSTRING_LEN; 303 sprintf(buf, "[%d]: tpa_aborts", i); 304 buf += ETH_GSTRING_LEN; 305 sprintf(buf, "[%d]: rx_l4_csum_errors", i); 306 buf += ETH_GSTRING_LEN; 307 } 308 if (bp->flags & BNXT_FLAG_PORT_STATS) { 309 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 310 strcpy(buf, bnxt_port_stats_arr[i].string); 311 buf += ETH_GSTRING_LEN; 312 } 313 } 314 break; 315 case ETH_SS_TEST: 316 if (bp->num_tests) 317 memcpy(buf, bp->test_info->string, 318 bp->num_tests * ETH_GSTRING_LEN); 319 break; 320 default: 321 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 322 stringset); 323 break; 324 } 325 } 326 327 static void bnxt_get_ringparam(struct net_device *dev, 328 struct ethtool_ringparam *ering) 329 { 330 struct bnxt *bp = netdev_priv(dev); 331 332 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 333 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 334 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 335 336 ering->rx_pending = bp->rx_ring_size; 337 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 338 ering->tx_pending = bp->tx_ring_size; 339 } 340 341 static int bnxt_set_ringparam(struct net_device *dev, 342 struct ethtool_ringparam *ering) 343 { 344 struct bnxt *bp = netdev_priv(dev); 345 346 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 347 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 348 (ering->tx_pending <= MAX_SKB_FRAGS)) 349 return -EINVAL; 350 351 if (netif_running(dev)) 352 bnxt_close_nic(bp, false, false); 353 354 bp->rx_ring_size = ering->rx_pending; 355 bp->tx_ring_size = ering->tx_pending; 356 bnxt_set_ring_params(bp); 357 358 if (netif_running(dev)) 359 return bnxt_open_nic(bp, false, false); 360 361 return 0; 362 } 363 364 static void bnxt_get_channels(struct net_device *dev, 365 struct ethtool_channels *channel) 366 { 367 struct bnxt *bp = netdev_priv(dev); 368 int max_rx_rings, max_tx_rings, tcs; 369 370 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 371 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 372 373 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 374 max_rx_rings = 0; 375 max_tx_rings = 0; 376 } 377 378 tcs = netdev_get_num_tc(dev); 379 if (tcs > 1) 380 max_tx_rings /= tcs; 381 382 channel->max_rx = max_rx_rings; 383 channel->max_tx = max_tx_rings; 384 channel->max_other = 0; 385 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 386 channel->combined_count = bp->rx_nr_rings; 387 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 388 channel->combined_count--; 389 } else { 390 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 391 channel->rx_count = bp->rx_nr_rings; 392 channel->tx_count = bp->tx_nr_rings_per_tc; 393 } 394 } 395 } 396 397 static int bnxt_set_channels(struct net_device *dev, 398 struct ethtool_channels *channel) 399 { 400 struct bnxt *bp = netdev_priv(dev); 401 int req_tx_rings, req_rx_rings, tcs; 402 bool sh = false; 403 int tx_xdp = 0; 404 int rc = 0; 405 406 if (channel->other_count) 407 return -EINVAL; 408 409 if (!channel->combined_count && 410 (!channel->rx_count || !channel->tx_count)) 411 return -EINVAL; 412 413 if (channel->combined_count && 414 (channel->rx_count || channel->tx_count)) 415 return -EINVAL; 416 417 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 418 channel->tx_count)) 419 return -EINVAL; 420 421 if (channel->combined_count) 422 sh = true; 423 424 tcs = netdev_get_num_tc(dev); 425 426 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 427 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 428 if (bp->tx_nr_rings_xdp) { 429 if (!sh) { 430 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 431 return -EINVAL; 432 } 433 tx_xdp = req_rx_rings; 434 } 435 rc = bnxt_reserve_rings(bp, req_tx_rings, req_rx_rings, tcs, tx_xdp); 436 if (rc) { 437 netdev_warn(dev, "Unable to allocate the requested rings\n"); 438 return rc; 439 } 440 441 if (netif_running(dev)) { 442 if (BNXT_PF(bp)) { 443 /* TODO CHIMP_FW: Send message to all VF's 444 * before PF unload 445 */ 446 } 447 rc = bnxt_close_nic(bp, true, false); 448 if (rc) { 449 netdev_err(bp->dev, "Set channel failure rc :%x\n", 450 rc); 451 return rc; 452 } 453 } 454 455 if (sh) { 456 bp->flags |= BNXT_FLAG_SHARED_RINGS; 457 bp->rx_nr_rings = channel->combined_count; 458 bp->tx_nr_rings_per_tc = channel->combined_count; 459 } else { 460 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 461 bp->rx_nr_rings = channel->rx_count; 462 bp->tx_nr_rings_per_tc = channel->tx_count; 463 } 464 bp->tx_nr_rings_xdp = tx_xdp; 465 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 466 if (tcs > 1) 467 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 468 469 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 470 bp->tx_nr_rings + bp->rx_nr_rings; 471 472 bp->num_stat_ctxs = bp->cp_nr_rings; 473 474 /* After changing number of rx channels, update NTUPLE feature. */ 475 netdev_update_features(dev); 476 if (netif_running(dev)) { 477 rc = bnxt_open_nic(bp, true, false); 478 if ((!rc) && BNXT_PF(bp)) { 479 /* TODO CHIMP_FW: Send message to all VF's 480 * to renable 481 */ 482 } 483 } 484 485 return rc; 486 } 487 488 #ifdef CONFIG_RFS_ACCEL 489 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 490 u32 *rule_locs) 491 { 492 int i, j = 0; 493 494 cmd->data = bp->ntp_fltr_count; 495 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 496 struct hlist_head *head; 497 struct bnxt_ntuple_filter *fltr; 498 499 head = &bp->ntp_fltr_hash_tbl[i]; 500 rcu_read_lock(); 501 hlist_for_each_entry_rcu(fltr, head, hash) { 502 if (j == cmd->rule_cnt) 503 break; 504 rule_locs[j++] = fltr->sw_id; 505 } 506 rcu_read_unlock(); 507 if (j == cmd->rule_cnt) 508 break; 509 } 510 cmd->rule_cnt = j; 511 return 0; 512 } 513 514 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 515 { 516 struct ethtool_rx_flow_spec *fs = 517 (struct ethtool_rx_flow_spec *)&cmd->fs; 518 struct bnxt_ntuple_filter *fltr; 519 struct flow_keys *fkeys; 520 int i, rc = -EINVAL; 521 522 if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 523 return rc; 524 525 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 526 struct hlist_head *head; 527 528 head = &bp->ntp_fltr_hash_tbl[i]; 529 rcu_read_lock(); 530 hlist_for_each_entry_rcu(fltr, head, hash) { 531 if (fltr->sw_id == fs->location) 532 goto fltr_found; 533 } 534 rcu_read_unlock(); 535 } 536 return rc; 537 538 fltr_found: 539 fkeys = &fltr->fkeys; 540 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 541 if (fkeys->basic.ip_proto == IPPROTO_TCP) 542 fs->flow_type = TCP_V4_FLOW; 543 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 544 fs->flow_type = UDP_V4_FLOW; 545 else 546 goto fltr_err; 547 548 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 549 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 550 551 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 552 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 553 554 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 555 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 556 557 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 558 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 559 } else { 560 int i; 561 562 if (fkeys->basic.ip_proto == IPPROTO_TCP) 563 fs->flow_type = TCP_V6_FLOW; 564 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 565 fs->flow_type = UDP_V6_FLOW; 566 else 567 goto fltr_err; 568 569 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 570 fkeys->addrs.v6addrs.src; 571 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 572 fkeys->addrs.v6addrs.dst; 573 for (i = 0; i < 4; i++) { 574 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 575 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 576 } 577 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 578 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 579 580 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 581 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 582 } 583 584 fs->ring_cookie = fltr->rxq; 585 rc = 0; 586 587 fltr_err: 588 rcu_read_unlock(); 589 590 return rc; 591 } 592 #endif 593 594 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 595 { 596 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 597 return RXH_IP_SRC | RXH_IP_DST; 598 return 0; 599 } 600 601 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 602 { 603 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 604 return RXH_IP_SRC | RXH_IP_DST; 605 return 0; 606 } 607 608 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 609 { 610 cmd->data = 0; 611 switch (cmd->flow_type) { 612 case TCP_V4_FLOW: 613 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 614 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 615 RXH_L4_B_0_1 | RXH_L4_B_2_3; 616 cmd->data |= get_ethtool_ipv4_rss(bp); 617 break; 618 case UDP_V4_FLOW: 619 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 620 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 621 RXH_L4_B_0_1 | RXH_L4_B_2_3; 622 /* fall through */ 623 case SCTP_V4_FLOW: 624 case AH_ESP_V4_FLOW: 625 case AH_V4_FLOW: 626 case ESP_V4_FLOW: 627 case IPV4_FLOW: 628 cmd->data |= get_ethtool_ipv4_rss(bp); 629 break; 630 631 case TCP_V6_FLOW: 632 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 633 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 634 RXH_L4_B_0_1 | RXH_L4_B_2_3; 635 cmd->data |= get_ethtool_ipv6_rss(bp); 636 break; 637 case UDP_V6_FLOW: 638 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 639 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 640 RXH_L4_B_0_1 | RXH_L4_B_2_3; 641 /* fall through */ 642 case SCTP_V6_FLOW: 643 case AH_ESP_V6_FLOW: 644 case AH_V6_FLOW: 645 case ESP_V6_FLOW: 646 case IPV6_FLOW: 647 cmd->data |= get_ethtool_ipv6_rss(bp); 648 break; 649 } 650 return 0; 651 } 652 653 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 654 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 655 656 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 657 { 658 u32 rss_hash_cfg = bp->rss_hash_cfg; 659 int tuple, rc = 0; 660 661 if (cmd->data == RXH_4TUPLE) 662 tuple = 4; 663 else if (cmd->data == RXH_2TUPLE) 664 tuple = 2; 665 else if (!cmd->data) 666 tuple = 0; 667 else 668 return -EINVAL; 669 670 if (cmd->flow_type == TCP_V4_FLOW) { 671 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 672 if (tuple == 4) 673 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 674 } else if (cmd->flow_type == UDP_V4_FLOW) { 675 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 676 return -EINVAL; 677 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 678 if (tuple == 4) 679 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 680 } else if (cmd->flow_type == TCP_V6_FLOW) { 681 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 682 if (tuple == 4) 683 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 684 } else if (cmd->flow_type == UDP_V6_FLOW) { 685 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 686 return -EINVAL; 687 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 688 if (tuple == 4) 689 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 690 } else if (tuple == 4) { 691 return -EINVAL; 692 } 693 694 switch (cmd->flow_type) { 695 case TCP_V4_FLOW: 696 case UDP_V4_FLOW: 697 case SCTP_V4_FLOW: 698 case AH_ESP_V4_FLOW: 699 case AH_V4_FLOW: 700 case ESP_V4_FLOW: 701 case IPV4_FLOW: 702 if (tuple == 2) 703 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 704 else if (!tuple) 705 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 706 break; 707 708 case TCP_V6_FLOW: 709 case UDP_V6_FLOW: 710 case SCTP_V6_FLOW: 711 case AH_ESP_V6_FLOW: 712 case AH_V6_FLOW: 713 case ESP_V6_FLOW: 714 case IPV6_FLOW: 715 if (tuple == 2) 716 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 717 else if (!tuple) 718 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 719 break; 720 } 721 722 if (bp->rss_hash_cfg == rss_hash_cfg) 723 return 0; 724 725 bp->rss_hash_cfg = rss_hash_cfg; 726 if (netif_running(bp->dev)) { 727 bnxt_close_nic(bp, false, false); 728 rc = bnxt_open_nic(bp, false, false); 729 } 730 return rc; 731 } 732 733 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 734 u32 *rule_locs) 735 { 736 struct bnxt *bp = netdev_priv(dev); 737 int rc = 0; 738 739 switch (cmd->cmd) { 740 #ifdef CONFIG_RFS_ACCEL 741 case ETHTOOL_GRXRINGS: 742 cmd->data = bp->rx_nr_rings; 743 break; 744 745 case ETHTOOL_GRXCLSRLCNT: 746 cmd->rule_cnt = bp->ntp_fltr_count; 747 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 748 break; 749 750 case ETHTOOL_GRXCLSRLALL: 751 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 752 break; 753 754 case ETHTOOL_GRXCLSRULE: 755 rc = bnxt_grxclsrule(bp, cmd); 756 break; 757 #endif 758 759 case ETHTOOL_GRXFH: 760 rc = bnxt_grxfh(bp, cmd); 761 break; 762 763 default: 764 rc = -EOPNOTSUPP; 765 break; 766 } 767 768 return rc; 769 } 770 771 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 772 { 773 struct bnxt *bp = netdev_priv(dev); 774 int rc; 775 776 switch (cmd->cmd) { 777 case ETHTOOL_SRXFH: 778 rc = bnxt_srxfh(bp, cmd); 779 break; 780 781 default: 782 rc = -EOPNOTSUPP; 783 break; 784 } 785 return rc; 786 } 787 788 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 789 { 790 return HW_HASH_INDEX_SIZE; 791 } 792 793 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 794 { 795 return HW_HASH_KEY_SIZE; 796 } 797 798 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 799 u8 *hfunc) 800 { 801 struct bnxt *bp = netdev_priv(dev); 802 struct bnxt_vnic_info *vnic = &bp->vnic_info[0]; 803 int i = 0; 804 805 if (hfunc) 806 *hfunc = ETH_RSS_HASH_TOP; 807 808 if (indir) 809 for (i = 0; i < HW_HASH_INDEX_SIZE; i++) 810 indir[i] = le16_to_cpu(vnic->rss_table[i]); 811 812 if (key) 813 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 814 815 return 0; 816 } 817 818 static void bnxt_get_drvinfo(struct net_device *dev, 819 struct ethtool_drvinfo *info) 820 { 821 struct bnxt *bp = netdev_priv(dev); 822 char *pkglog; 823 char *pkgver = NULL; 824 825 pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL); 826 if (pkglog) 827 pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH); 828 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 829 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 830 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) 831 snprintf(info->fw_version, sizeof(info->fw_version) - 1, 832 "%s pkg %s", bp->fw_ver_str, pkgver); 833 else 834 strlcpy(info->fw_version, bp->fw_ver_str, 835 sizeof(info->fw_version)); 836 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 837 info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings; 838 info->testinfo_len = bp->num_tests; 839 /* TODO CHIMP_FW: eeprom dump details */ 840 info->eedump_len = 0; 841 /* TODO CHIMP FW: reg dump details */ 842 info->regdump_len = 0; 843 kfree(pkglog); 844 } 845 846 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 847 { 848 struct bnxt *bp = netdev_priv(dev); 849 850 wol->supported = 0; 851 wol->wolopts = 0; 852 memset(&wol->sopass, 0, sizeof(wol->sopass)); 853 if (bp->flags & BNXT_FLAG_WOL_CAP) { 854 wol->supported = WAKE_MAGIC; 855 if (bp->wol) 856 wol->wolopts = WAKE_MAGIC; 857 } 858 } 859 860 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 861 { 862 struct bnxt *bp = netdev_priv(dev); 863 864 if (wol->wolopts & ~WAKE_MAGIC) 865 return -EINVAL; 866 867 if (wol->wolopts & WAKE_MAGIC) { 868 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 869 return -EINVAL; 870 if (!bp->wol) { 871 if (bnxt_hwrm_alloc_wol_fltr(bp)) 872 return -EBUSY; 873 bp->wol = 1; 874 } 875 } else { 876 if (bp->wol) { 877 if (bnxt_hwrm_free_wol_fltr(bp)) 878 return -EBUSY; 879 bp->wol = 0; 880 } 881 } 882 return 0; 883 } 884 885 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 886 { 887 u32 speed_mask = 0; 888 889 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 890 /* set the advertised speeds */ 891 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 892 speed_mask |= ADVERTISED_100baseT_Full; 893 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 894 speed_mask |= ADVERTISED_1000baseT_Full; 895 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 896 speed_mask |= ADVERTISED_2500baseX_Full; 897 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 898 speed_mask |= ADVERTISED_10000baseT_Full; 899 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 900 speed_mask |= ADVERTISED_40000baseCR4_Full; 901 902 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 903 speed_mask |= ADVERTISED_Pause; 904 else if (fw_pause & BNXT_LINK_PAUSE_TX) 905 speed_mask |= ADVERTISED_Asym_Pause; 906 else if (fw_pause & BNXT_LINK_PAUSE_RX) 907 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 908 909 return speed_mask; 910 } 911 912 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 913 { \ 914 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 915 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 916 100baseT_Full); \ 917 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 918 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 919 1000baseT_Full); \ 920 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 921 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 922 10000baseT_Full); \ 923 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 924 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 925 25000baseCR_Full); \ 926 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 927 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 928 40000baseCR4_Full);\ 929 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 930 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 931 50000baseCR2_Full);\ 932 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 933 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 934 100000baseCR4_Full);\ 935 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 936 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 937 Pause); \ 938 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 939 ethtool_link_ksettings_add_link_mode( \ 940 lk_ksettings, name, Asym_Pause);\ 941 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 942 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 943 Asym_Pause); \ 944 } \ 945 } 946 947 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 948 { \ 949 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 950 100baseT_Full) || \ 951 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 952 100baseT_Half)) \ 953 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 954 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 955 1000baseT_Full) || \ 956 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 957 1000baseT_Half)) \ 958 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 959 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 960 10000baseT_Full)) \ 961 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 962 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 963 25000baseCR_Full)) \ 964 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 965 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 966 40000baseCR4_Full)) \ 967 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 968 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 969 50000baseCR2_Full)) \ 970 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 971 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 972 100000baseCR4_Full)) \ 973 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 974 } 975 976 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 977 struct ethtool_link_ksettings *lk_ksettings) 978 { 979 u16 fw_speeds = link_info->advertising; 980 u8 fw_pause = 0; 981 982 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 983 fw_pause = link_info->auto_pause_setting; 984 985 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 986 } 987 988 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 989 struct ethtool_link_ksettings *lk_ksettings) 990 { 991 u16 fw_speeds = link_info->lp_auto_link_speeds; 992 u8 fw_pause = 0; 993 994 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 995 fw_pause = link_info->lp_pause; 996 997 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 998 lp_advertising); 999 } 1000 1001 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1002 struct ethtool_link_ksettings *lk_ksettings) 1003 { 1004 u16 fw_speeds = link_info->support_speeds; 1005 1006 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1007 1008 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); 1009 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1010 Asym_Pause); 1011 1012 if (link_info->support_auto_speeds) 1013 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1014 Autoneg); 1015 } 1016 1017 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1018 { 1019 switch (fw_link_speed) { 1020 case BNXT_LINK_SPEED_100MB: 1021 return SPEED_100; 1022 case BNXT_LINK_SPEED_1GB: 1023 return SPEED_1000; 1024 case BNXT_LINK_SPEED_2_5GB: 1025 return SPEED_2500; 1026 case BNXT_LINK_SPEED_10GB: 1027 return SPEED_10000; 1028 case BNXT_LINK_SPEED_20GB: 1029 return SPEED_20000; 1030 case BNXT_LINK_SPEED_25GB: 1031 return SPEED_25000; 1032 case BNXT_LINK_SPEED_40GB: 1033 return SPEED_40000; 1034 case BNXT_LINK_SPEED_50GB: 1035 return SPEED_50000; 1036 case BNXT_LINK_SPEED_100GB: 1037 return SPEED_100000; 1038 default: 1039 return SPEED_UNKNOWN; 1040 } 1041 } 1042 1043 static int bnxt_get_link_ksettings(struct net_device *dev, 1044 struct ethtool_link_ksettings *lk_ksettings) 1045 { 1046 struct bnxt *bp = netdev_priv(dev); 1047 struct bnxt_link_info *link_info = &bp->link_info; 1048 struct ethtool_link_settings *base = &lk_ksettings->base; 1049 u32 ethtool_speed; 1050 1051 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1052 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1053 1054 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1055 if (link_info->autoneg) { 1056 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1057 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1058 advertising, Autoneg); 1059 base->autoneg = AUTONEG_ENABLE; 1060 if (link_info->phy_link_status == BNXT_LINK_LINK) 1061 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1062 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1063 if (!netif_carrier_ok(dev)) 1064 base->duplex = DUPLEX_UNKNOWN; 1065 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1066 base->duplex = DUPLEX_FULL; 1067 else 1068 base->duplex = DUPLEX_HALF; 1069 } else { 1070 base->autoneg = AUTONEG_DISABLE; 1071 ethtool_speed = 1072 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1073 base->duplex = DUPLEX_HALF; 1074 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1075 base->duplex = DUPLEX_FULL; 1076 } 1077 base->speed = ethtool_speed; 1078 1079 base->port = PORT_NONE; 1080 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1081 base->port = PORT_TP; 1082 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1083 TP); 1084 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1085 TP); 1086 } else { 1087 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1088 FIBRE); 1089 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1090 FIBRE); 1091 1092 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1093 base->port = PORT_DA; 1094 else if (link_info->media_type == 1095 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1096 base->port = PORT_FIBRE; 1097 } 1098 base->phy_address = link_info->phy_addr; 1099 1100 return 0; 1101 } 1102 1103 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed) 1104 { 1105 struct bnxt *bp = netdev_priv(dev); 1106 struct bnxt_link_info *link_info = &bp->link_info; 1107 u16 support_spds = link_info->support_speeds; 1108 u32 fw_speed = 0; 1109 1110 switch (ethtool_speed) { 1111 case SPEED_100: 1112 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1113 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB; 1114 break; 1115 case SPEED_1000: 1116 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1117 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB; 1118 break; 1119 case SPEED_2500: 1120 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1121 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB; 1122 break; 1123 case SPEED_10000: 1124 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1125 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB; 1126 break; 1127 case SPEED_20000: 1128 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1129 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB; 1130 break; 1131 case SPEED_25000: 1132 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1133 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB; 1134 break; 1135 case SPEED_40000: 1136 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1137 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB; 1138 break; 1139 case SPEED_50000: 1140 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) 1141 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB; 1142 break; 1143 case SPEED_100000: 1144 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) 1145 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB; 1146 break; 1147 default: 1148 netdev_err(dev, "unsupported speed!\n"); 1149 break; 1150 } 1151 return fw_speed; 1152 } 1153 1154 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1155 { 1156 u16 fw_speed_mask = 0; 1157 1158 /* only support autoneg at speed 100, 1000, and 10000 */ 1159 if (advertising & (ADVERTISED_100baseT_Full | 1160 ADVERTISED_100baseT_Half)) { 1161 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1162 } 1163 if (advertising & (ADVERTISED_1000baseT_Full | 1164 ADVERTISED_1000baseT_Half)) { 1165 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1166 } 1167 if (advertising & ADVERTISED_10000baseT_Full) 1168 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1169 1170 if (advertising & ADVERTISED_40000baseCR4_Full) 1171 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1172 1173 return fw_speed_mask; 1174 } 1175 1176 static int bnxt_set_link_ksettings(struct net_device *dev, 1177 const struct ethtool_link_ksettings *lk_ksettings) 1178 { 1179 struct bnxt *bp = netdev_priv(dev); 1180 struct bnxt_link_info *link_info = &bp->link_info; 1181 const struct ethtool_link_settings *base = &lk_ksettings->base; 1182 bool set_pause = false; 1183 u16 fw_advertising = 0; 1184 u32 speed; 1185 int rc = 0; 1186 1187 if (!BNXT_SINGLE_PF(bp)) 1188 return -EOPNOTSUPP; 1189 1190 if (base->autoneg == AUTONEG_ENABLE) { 1191 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings, 1192 advertising); 1193 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1194 if (!fw_advertising) 1195 link_info->advertising = link_info->support_auto_speeds; 1196 else 1197 link_info->advertising = fw_advertising; 1198 /* any change to autoneg will cause link change, therefore the 1199 * driver should put back the original pause setting in autoneg 1200 */ 1201 set_pause = true; 1202 } else { 1203 u16 fw_speed; 1204 u8 phy_type = link_info->phy_type; 1205 1206 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1207 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1208 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1209 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1210 rc = -EINVAL; 1211 goto set_setting_exit; 1212 } 1213 if (base->duplex == DUPLEX_HALF) { 1214 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1215 rc = -EINVAL; 1216 goto set_setting_exit; 1217 } 1218 speed = base->speed; 1219 fw_speed = bnxt_get_fw_speed(dev, speed); 1220 if (!fw_speed) { 1221 rc = -EINVAL; 1222 goto set_setting_exit; 1223 } 1224 link_info->req_link_speed = fw_speed; 1225 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1226 link_info->autoneg = 0; 1227 link_info->advertising = 0; 1228 } 1229 1230 if (netif_running(dev)) 1231 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1232 1233 set_setting_exit: 1234 return rc; 1235 } 1236 1237 static void bnxt_get_pauseparam(struct net_device *dev, 1238 struct ethtool_pauseparam *epause) 1239 { 1240 struct bnxt *bp = netdev_priv(dev); 1241 struct bnxt_link_info *link_info = &bp->link_info; 1242 1243 if (BNXT_VF(bp)) 1244 return; 1245 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 1246 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 1247 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 1248 } 1249 1250 static int bnxt_set_pauseparam(struct net_device *dev, 1251 struct ethtool_pauseparam *epause) 1252 { 1253 int rc = 0; 1254 struct bnxt *bp = netdev_priv(dev); 1255 struct bnxt_link_info *link_info = &bp->link_info; 1256 1257 if (!BNXT_SINGLE_PF(bp)) 1258 return -EOPNOTSUPP; 1259 1260 if (epause->autoneg) { 1261 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 1262 return -EINVAL; 1263 1264 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 1265 if (bp->hwrm_spec_code >= 0x10201) 1266 link_info->req_flow_ctrl = 1267 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; 1268 } else { 1269 /* when transition from auto pause to force pause, 1270 * force a link change 1271 */ 1272 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1273 link_info->force_link_chng = true; 1274 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 1275 link_info->req_flow_ctrl = 0; 1276 } 1277 if (epause->rx_pause) 1278 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 1279 1280 if (epause->tx_pause) 1281 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 1282 1283 if (netif_running(dev)) 1284 rc = bnxt_hwrm_set_pause(bp); 1285 return rc; 1286 } 1287 1288 static u32 bnxt_get_link(struct net_device *dev) 1289 { 1290 struct bnxt *bp = netdev_priv(dev); 1291 1292 /* TODO: handle MF, VF, driver close case */ 1293 return bp->link_info.link_up; 1294 } 1295 1296 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1297 u16 ext, u16 *index, u32 *item_length, 1298 u32 *data_length); 1299 1300 static int bnxt_flash_nvram(struct net_device *dev, 1301 u16 dir_type, 1302 u16 dir_ordinal, 1303 u16 dir_ext, 1304 u16 dir_attr, 1305 const u8 *data, 1306 size_t data_len) 1307 { 1308 struct bnxt *bp = netdev_priv(dev); 1309 int rc; 1310 struct hwrm_nvm_write_input req = {0}; 1311 dma_addr_t dma_handle; 1312 u8 *kmem; 1313 1314 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1); 1315 1316 req.dir_type = cpu_to_le16(dir_type); 1317 req.dir_ordinal = cpu_to_le16(dir_ordinal); 1318 req.dir_ext = cpu_to_le16(dir_ext); 1319 req.dir_attr = cpu_to_le16(dir_attr); 1320 req.dir_data_length = cpu_to_le32(data_len); 1321 1322 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle, 1323 GFP_KERNEL); 1324 if (!kmem) { 1325 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1326 (unsigned)data_len); 1327 return -ENOMEM; 1328 } 1329 memcpy(kmem, data, data_len); 1330 req.host_src_addr = cpu_to_le64(dma_handle); 1331 1332 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT); 1333 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle); 1334 1335 return rc; 1336 } 1337 1338 static int bnxt_firmware_reset(struct net_device *dev, 1339 u16 dir_type) 1340 { 1341 struct bnxt *bp = netdev_priv(dev); 1342 struct hwrm_fw_reset_input req = {0}; 1343 1344 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1); 1345 1346 /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */ 1347 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 1348 /* (e.g. when firmware isn't already running) */ 1349 switch (dir_type) { 1350 case BNX_DIR_TYPE_CHIMP_PATCH: 1351 case BNX_DIR_TYPE_BOOTCODE: 1352 case BNX_DIR_TYPE_BOOTCODE_2: 1353 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 1354 /* Self-reset ChiMP upon next PCIe reset: */ 1355 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1356 break; 1357 case BNX_DIR_TYPE_APE_FW: 1358 case BNX_DIR_TYPE_APE_PATCH: 1359 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 1360 /* Self-reset APE upon next PCIe reset: */ 1361 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1362 break; 1363 case BNX_DIR_TYPE_KONG_FW: 1364 case BNX_DIR_TYPE_KONG_PATCH: 1365 req.embedded_proc_type = 1366 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 1367 break; 1368 case BNX_DIR_TYPE_BONO_FW: 1369 case BNX_DIR_TYPE_BONO_PATCH: 1370 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 1371 break; 1372 default: 1373 return -EINVAL; 1374 } 1375 1376 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1377 } 1378 1379 static int bnxt_flash_firmware(struct net_device *dev, 1380 u16 dir_type, 1381 const u8 *fw_data, 1382 size_t fw_size) 1383 { 1384 int rc = 0; 1385 u16 code_type; 1386 u32 stored_crc; 1387 u32 calculated_crc; 1388 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 1389 1390 switch (dir_type) { 1391 case BNX_DIR_TYPE_BOOTCODE: 1392 case BNX_DIR_TYPE_BOOTCODE_2: 1393 code_type = CODE_BOOT; 1394 break; 1395 case BNX_DIR_TYPE_CHIMP_PATCH: 1396 code_type = CODE_CHIMP_PATCH; 1397 break; 1398 case BNX_DIR_TYPE_APE_FW: 1399 code_type = CODE_MCTP_PASSTHRU; 1400 break; 1401 case BNX_DIR_TYPE_APE_PATCH: 1402 code_type = CODE_APE_PATCH; 1403 break; 1404 case BNX_DIR_TYPE_KONG_FW: 1405 code_type = CODE_KONG_FW; 1406 break; 1407 case BNX_DIR_TYPE_KONG_PATCH: 1408 code_type = CODE_KONG_PATCH; 1409 break; 1410 case BNX_DIR_TYPE_BONO_FW: 1411 code_type = CODE_BONO_FW; 1412 break; 1413 case BNX_DIR_TYPE_BONO_PATCH: 1414 code_type = CODE_BONO_PATCH; 1415 break; 1416 default: 1417 netdev_err(dev, "Unsupported directory entry type: %u\n", 1418 dir_type); 1419 return -EINVAL; 1420 } 1421 if (fw_size < sizeof(struct bnxt_fw_header)) { 1422 netdev_err(dev, "Invalid firmware file size: %u\n", 1423 (unsigned int)fw_size); 1424 return -EINVAL; 1425 } 1426 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 1427 netdev_err(dev, "Invalid firmware signature: %08X\n", 1428 le32_to_cpu(header->signature)); 1429 return -EINVAL; 1430 } 1431 if (header->code_type != code_type) { 1432 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 1433 code_type, header->code_type); 1434 return -EINVAL; 1435 } 1436 if (header->device != DEVICE_CUMULUS_FAMILY) { 1437 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 1438 DEVICE_CUMULUS_FAMILY, header->device); 1439 return -EINVAL; 1440 } 1441 /* Confirm the CRC32 checksum of the file: */ 1442 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1443 sizeof(stored_crc))); 1444 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1445 if (calculated_crc != stored_crc) { 1446 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 1447 (unsigned long)stored_crc, 1448 (unsigned long)calculated_crc); 1449 return -EINVAL; 1450 } 1451 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1452 0, 0, fw_data, fw_size); 1453 if (rc == 0) /* Firmware update successful */ 1454 rc = bnxt_firmware_reset(dev, dir_type); 1455 1456 return rc; 1457 } 1458 1459 static int bnxt_flash_microcode(struct net_device *dev, 1460 u16 dir_type, 1461 const u8 *fw_data, 1462 size_t fw_size) 1463 { 1464 struct bnxt_ucode_trailer *trailer; 1465 u32 calculated_crc; 1466 u32 stored_crc; 1467 int rc = 0; 1468 1469 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 1470 netdev_err(dev, "Invalid microcode file size: %u\n", 1471 (unsigned int)fw_size); 1472 return -EINVAL; 1473 } 1474 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 1475 sizeof(*trailer))); 1476 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 1477 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 1478 le32_to_cpu(trailer->sig)); 1479 return -EINVAL; 1480 } 1481 if (le16_to_cpu(trailer->dir_type) != dir_type) { 1482 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 1483 dir_type, le16_to_cpu(trailer->dir_type)); 1484 return -EINVAL; 1485 } 1486 if (le16_to_cpu(trailer->trailer_length) < 1487 sizeof(struct bnxt_ucode_trailer)) { 1488 netdev_err(dev, "Invalid microcode trailer length: %d\n", 1489 le16_to_cpu(trailer->trailer_length)); 1490 return -EINVAL; 1491 } 1492 1493 /* Confirm the CRC32 checksum of the file: */ 1494 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1495 sizeof(stored_crc))); 1496 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1497 if (calculated_crc != stored_crc) { 1498 netdev_err(dev, 1499 "CRC32 (%08lX) does not match calculated: %08lX\n", 1500 (unsigned long)stored_crc, 1501 (unsigned long)calculated_crc); 1502 return -EINVAL; 1503 } 1504 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1505 0, 0, fw_data, fw_size); 1506 1507 return rc; 1508 } 1509 1510 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 1511 { 1512 switch (dir_type) { 1513 case BNX_DIR_TYPE_CHIMP_PATCH: 1514 case BNX_DIR_TYPE_BOOTCODE: 1515 case BNX_DIR_TYPE_BOOTCODE_2: 1516 case BNX_DIR_TYPE_APE_FW: 1517 case BNX_DIR_TYPE_APE_PATCH: 1518 case BNX_DIR_TYPE_KONG_FW: 1519 case BNX_DIR_TYPE_KONG_PATCH: 1520 case BNX_DIR_TYPE_BONO_FW: 1521 case BNX_DIR_TYPE_BONO_PATCH: 1522 return true; 1523 } 1524 1525 return false; 1526 } 1527 1528 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 1529 { 1530 switch (dir_type) { 1531 case BNX_DIR_TYPE_AVS: 1532 case BNX_DIR_TYPE_EXP_ROM_MBA: 1533 case BNX_DIR_TYPE_PCIE: 1534 case BNX_DIR_TYPE_TSCF_UCODE: 1535 case BNX_DIR_TYPE_EXT_PHY: 1536 case BNX_DIR_TYPE_CCM: 1537 case BNX_DIR_TYPE_ISCSI_BOOT: 1538 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 1539 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 1540 return true; 1541 } 1542 1543 return false; 1544 } 1545 1546 static bool bnxt_dir_type_is_executable(u16 dir_type) 1547 { 1548 return bnxt_dir_type_is_ape_bin_format(dir_type) || 1549 bnxt_dir_type_is_other_exec_format(dir_type); 1550 } 1551 1552 static int bnxt_flash_firmware_from_file(struct net_device *dev, 1553 u16 dir_type, 1554 const char *filename) 1555 { 1556 const struct firmware *fw; 1557 int rc; 1558 1559 rc = request_firmware(&fw, filename, &dev->dev); 1560 if (rc != 0) { 1561 netdev_err(dev, "Error %d requesting firmware file: %s\n", 1562 rc, filename); 1563 return rc; 1564 } 1565 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true) 1566 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 1567 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true) 1568 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 1569 else 1570 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1571 0, 0, fw->data, fw->size); 1572 release_firmware(fw); 1573 return rc; 1574 } 1575 1576 static int bnxt_flash_package_from_file(struct net_device *dev, 1577 char *filename, u32 install_type) 1578 { 1579 struct bnxt *bp = netdev_priv(dev); 1580 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr; 1581 struct hwrm_nvm_install_update_input install = {0}; 1582 const struct firmware *fw; 1583 u32 item_len; 1584 u16 index; 1585 int rc; 1586 1587 bnxt_hwrm_fw_set_time(bp); 1588 1589 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 1590 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1591 &index, &item_len, NULL) != 0) { 1592 netdev_err(dev, "PKG update area not created in nvram\n"); 1593 return -ENOBUFS; 1594 } 1595 1596 rc = request_firmware(&fw, filename, &dev->dev); 1597 if (rc != 0) { 1598 netdev_err(dev, "PKG error %d requesting file: %s\n", 1599 rc, filename); 1600 return rc; 1601 } 1602 1603 if (fw->size > item_len) { 1604 netdev_err(dev, "PKG insufficient update area in nvram: %lu", 1605 (unsigned long)fw->size); 1606 rc = -EFBIG; 1607 } else { 1608 dma_addr_t dma_handle; 1609 u8 *kmem; 1610 struct hwrm_nvm_modify_input modify = {0}; 1611 1612 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1); 1613 1614 modify.dir_idx = cpu_to_le16(index); 1615 modify.len = cpu_to_le32(fw->size); 1616 1617 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size, 1618 &dma_handle, GFP_KERNEL); 1619 if (!kmem) { 1620 netdev_err(dev, 1621 "dma_alloc_coherent failure, length = %u\n", 1622 (unsigned int)fw->size); 1623 rc = -ENOMEM; 1624 } else { 1625 memcpy(kmem, fw->data, fw->size); 1626 modify.host_src_addr = cpu_to_le64(dma_handle); 1627 1628 rc = hwrm_send_message(bp, &modify, sizeof(modify), 1629 FLASH_PACKAGE_TIMEOUT); 1630 dma_free_coherent(&bp->pdev->dev, fw->size, kmem, 1631 dma_handle); 1632 } 1633 } 1634 release_firmware(fw); 1635 if (rc) 1636 return rc; 1637 1638 if ((install_type & 0xffff) == 0) 1639 install_type >>= 16; 1640 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1); 1641 install.install_type = cpu_to_le32(install_type); 1642 1643 mutex_lock(&bp->hwrm_cmd_lock); 1644 rc = _hwrm_send_message(bp, &install, sizeof(install), 1645 INSTALL_PACKAGE_TIMEOUT); 1646 if (rc) { 1647 rc = -EOPNOTSUPP; 1648 goto flash_pkg_exit; 1649 } 1650 1651 if (resp->error_code) { 1652 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err; 1653 1654 if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { 1655 install.flags |= cpu_to_le16( 1656 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 1657 rc = _hwrm_send_message(bp, &install, sizeof(install), 1658 INSTALL_PACKAGE_TIMEOUT); 1659 if (rc) { 1660 rc = -EOPNOTSUPP; 1661 goto flash_pkg_exit; 1662 } 1663 } 1664 } 1665 1666 if (resp->result) { 1667 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 1668 (s8)resp->result, (int)resp->problem_item); 1669 rc = -ENOPKG; 1670 } 1671 flash_pkg_exit: 1672 mutex_unlock(&bp->hwrm_cmd_lock); 1673 return rc; 1674 } 1675 1676 static int bnxt_flash_device(struct net_device *dev, 1677 struct ethtool_flash *flash) 1678 { 1679 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 1680 netdev_err(dev, "flashdev not supported from a virtual function\n"); 1681 return -EINVAL; 1682 } 1683 1684 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 1685 flash->region > 0xffff) 1686 return bnxt_flash_package_from_file(dev, flash->data, 1687 flash->region); 1688 1689 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 1690 } 1691 1692 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 1693 { 1694 struct bnxt *bp = netdev_priv(dev); 1695 int rc; 1696 struct hwrm_nvm_get_dir_info_input req = {0}; 1697 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr; 1698 1699 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1); 1700 1701 mutex_lock(&bp->hwrm_cmd_lock); 1702 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1703 if (!rc) { 1704 *entries = le32_to_cpu(output->entries); 1705 *length = le32_to_cpu(output->entry_length); 1706 } 1707 mutex_unlock(&bp->hwrm_cmd_lock); 1708 return rc; 1709 } 1710 1711 static int bnxt_get_eeprom_len(struct net_device *dev) 1712 { 1713 /* The -1 return value allows the entire 32-bit range of offsets to be 1714 * passed via the ethtool command-line utility. 1715 */ 1716 return -1; 1717 } 1718 1719 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 1720 { 1721 struct bnxt *bp = netdev_priv(dev); 1722 int rc; 1723 u32 dir_entries; 1724 u32 entry_length; 1725 u8 *buf; 1726 size_t buflen; 1727 dma_addr_t dma_handle; 1728 struct hwrm_nvm_get_dir_entries_input req = {0}; 1729 1730 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 1731 if (rc != 0) 1732 return rc; 1733 1734 /* Insert 2 bytes of directory info (count and size of entries) */ 1735 if (len < 2) 1736 return -EINVAL; 1737 1738 *data++ = dir_entries; 1739 *data++ = entry_length; 1740 len -= 2; 1741 memset(data, 0xff, len); 1742 1743 buflen = dir_entries * entry_length; 1744 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle, 1745 GFP_KERNEL); 1746 if (!buf) { 1747 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1748 (unsigned)buflen); 1749 return -ENOMEM; 1750 } 1751 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1); 1752 req.host_dest_addr = cpu_to_le64(dma_handle); 1753 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1754 if (rc == 0) 1755 memcpy(data, buf, len > buflen ? buflen : len); 1756 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle); 1757 return rc; 1758 } 1759 1760 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 1761 u32 length, u8 *data) 1762 { 1763 struct bnxt *bp = netdev_priv(dev); 1764 int rc; 1765 u8 *buf; 1766 dma_addr_t dma_handle; 1767 struct hwrm_nvm_read_input req = {0}; 1768 1769 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle, 1770 GFP_KERNEL); 1771 if (!buf) { 1772 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1773 (unsigned)length); 1774 return -ENOMEM; 1775 } 1776 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1); 1777 req.host_dest_addr = cpu_to_le64(dma_handle); 1778 req.dir_idx = cpu_to_le16(index); 1779 req.offset = cpu_to_le32(offset); 1780 req.len = cpu_to_le32(length); 1781 1782 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1783 if (rc == 0) 1784 memcpy(data, buf, length); 1785 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle); 1786 return rc; 1787 } 1788 1789 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1790 u16 ext, u16 *index, u32 *item_length, 1791 u32 *data_length) 1792 { 1793 struct bnxt *bp = netdev_priv(dev); 1794 int rc; 1795 struct hwrm_nvm_find_dir_entry_input req = {0}; 1796 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr; 1797 1798 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1); 1799 req.enables = 0; 1800 req.dir_idx = 0; 1801 req.dir_type = cpu_to_le16(type); 1802 req.dir_ordinal = cpu_to_le16(ordinal); 1803 req.dir_ext = cpu_to_le16(ext); 1804 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 1805 rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1806 if (rc == 0) { 1807 if (index) 1808 *index = le16_to_cpu(output->dir_idx); 1809 if (item_length) 1810 *item_length = le32_to_cpu(output->dir_item_length); 1811 if (data_length) 1812 *data_length = le32_to_cpu(output->dir_data_length); 1813 } 1814 return rc; 1815 } 1816 1817 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 1818 { 1819 char *retval = NULL; 1820 char *p; 1821 char *value; 1822 int field = 0; 1823 1824 if (datalen < 1) 1825 return NULL; 1826 /* null-terminate the log data (removing last '\n'): */ 1827 data[datalen - 1] = 0; 1828 for (p = data; *p != 0; p++) { 1829 field = 0; 1830 retval = NULL; 1831 while (*p != 0 && *p != '\n') { 1832 value = p; 1833 while (*p != 0 && *p != '\t' && *p != '\n') 1834 p++; 1835 if (field == desired_field) 1836 retval = value; 1837 if (*p != '\t') 1838 break; 1839 *p = 0; 1840 field++; 1841 p++; 1842 } 1843 if (*p == 0) 1844 break; 1845 *p = 0; 1846 } 1847 return retval; 1848 } 1849 1850 static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen) 1851 { 1852 u16 index = 0; 1853 u32 datalen; 1854 1855 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 1856 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1857 &index, NULL, &datalen) != 0) 1858 return NULL; 1859 1860 memset(buf, 0, buflen); 1861 if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0) 1862 return NULL; 1863 1864 return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf, 1865 datalen); 1866 } 1867 1868 static int bnxt_get_eeprom(struct net_device *dev, 1869 struct ethtool_eeprom *eeprom, 1870 u8 *data) 1871 { 1872 u32 index; 1873 u32 offset; 1874 1875 if (eeprom->offset == 0) /* special offset value to get directory */ 1876 return bnxt_get_nvram_directory(dev, eeprom->len, data); 1877 1878 index = eeprom->offset >> 24; 1879 offset = eeprom->offset & 0xffffff; 1880 1881 if (index == 0) { 1882 netdev_err(dev, "unsupported index value: %d\n", index); 1883 return -EINVAL; 1884 } 1885 1886 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 1887 } 1888 1889 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 1890 { 1891 struct bnxt *bp = netdev_priv(dev); 1892 struct hwrm_nvm_erase_dir_entry_input req = {0}; 1893 1894 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1); 1895 req.dir_idx = cpu_to_le16(index); 1896 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1897 } 1898 1899 static int bnxt_set_eeprom(struct net_device *dev, 1900 struct ethtool_eeprom *eeprom, 1901 u8 *data) 1902 { 1903 struct bnxt *bp = netdev_priv(dev); 1904 u8 index, dir_op; 1905 u16 type, ext, ordinal, attr; 1906 1907 if (!BNXT_PF(bp)) { 1908 netdev_err(dev, "NVM write not supported from a virtual function\n"); 1909 return -EINVAL; 1910 } 1911 1912 type = eeprom->magic >> 16; 1913 1914 if (type == 0xffff) { /* special value for directory operations */ 1915 index = eeprom->magic & 0xff; 1916 dir_op = eeprom->magic >> 8; 1917 if (index == 0) 1918 return -EINVAL; 1919 switch (dir_op) { 1920 case 0x0e: /* erase */ 1921 if (eeprom->offset != ~eeprom->magic) 1922 return -EINVAL; 1923 return bnxt_erase_nvram_directory(dev, index - 1); 1924 default: 1925 return -EINVAL; 1926 } 1927 } 1928 1929 /* Create or re-write an NVM item: */ 1930 if (bnxt_dir_type_is_executable(type) == true) 1931 return -EOPNOTSUPP; 1932 ext = eeprom->magic & 0xffff; 1933 ordinal = eeprom->offset >> 16; 1934 attr = eeprom->offset & 0xffff; 1935 1936 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data, 1937 eeprom->len); 1938 } 1939 1940 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1941 { 1942 struct bnxt *bp = netdev_priv(dev); 1943 struct ethtool_eee *eee = &bp->eee; 1944 struct bnxt_link_info *link_info = &bp->link_info; 1945 u32 advertising = 1946 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 1947 int rc = 0; 1948 1949 if (!BNXT_SINGLE_PF(bp)) 1950 return -EOPNOTSUPP; 1951 1952 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 1953 return -EOPNOTSUPP; 1954 1955 if (!edata->eee_enabled) 1956 goto eee_ok; 1957 1958 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 1959 netdev_warn(dev, "EEE requires autoneg\n"); 1960 return -EINVAL; 1961 } 1962 if (edata->tx_lpi_enabled) { 1963 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 1964 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 1965 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 1966 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 1967 return -EINVAL; 1968 } else if (!bp->lpi_tmr_hi) { 1969 edata->tx_lpi_timer = eee->tx_lpi_timer; 1970 } 1971 } 1972 if (!edata->advertised) { 1973 edata->advertised = advertising & eee->supported; 1974 } else if (edata->advertised & ~advertising) { 1975 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 1976 edata->advertised, advertising); 1977 return -EINVAL; 1978 } 1979 1980 eee->advertised = edata->advertised; 1981 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 1982 eee->tx_lpi_timer = edata->tx_lpi_timer; 1983 eee_ok: 1984 eee->eee_enabled = edata->eee_enabled; 1985 1986 if (netif_running(dev)) 1987 rc = bnxt_hwrm_set_link_setting(bp, false, true); 1988 1989 return rc; 1990 } 1991 1992 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1993 { 1994 struct bnxt *bp = netdev_priv(dev); 1995 1996 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 1997 return -EOPNOTSUPP; 1998 1999 *edata = bp->eee; 2000 if (!bp->eee.eee_enabled) { 2001 /* Preserve tx_lpi_timer so that the last value will be used 2002 * by default when it is re-enabled. 2003 */ 2004 edata->advertised = 0; 2005 edata->tx_lpi_enabled = 0; 2006 } 2007 2008 if (!bp->eee.eee_active) 2009 edata->lp_advertised = 0; 2010 2011 return 0; 2012 } 2013 2014 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 2015 u16 page_number, u16 start_addr, 2016 u16 data_length, u8 *buf) 2017 { 2018 struct hwrm_port_phy_i2c_read_input req = {0}; 2019 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; 2020 int rc, byte_offset = 0; 2021 2022 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); 2023 req.i2c_slave_addr = i2c_addr; 2024 req.page_number = cpu_to_le16(page_number); 2025 req.port_id = cpu_to_le16(bp->pf.port_id); 2026 do { 2027 u16 xfer_size; 2028 2029 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 2030 data_length -= xfer_size; 2031 req.page_offset = cpu_to_le16(start_addr + byte_offset); 2032 req.data_length = xfer_size; 2033 req.enables = cpu_to_le32(start_addr + byte_offset ? 2034 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); 2035 mutex_lock(&bp->hwrm_cmd_lock); 2036 rc = _hwrm_send_message(bp, &req, sizeof(req), 2037 HWRM_CMD_TIMEOUT); 2038 if (!rc) 2039 memcpy(buf + byte_offset, output->data, xfer_size); 2040 mutex_unlock(&bp->hwrm_cmd_lock); 2041 byte_offset += xfer_size; 2042 } while (!rc && data_length > 0); 2043 2044 return rc; 2045 } 2046 2047 static int bnxt_get_module_info(struct net_device *dev, 2048 struct ethtool_modinfo *modinfo) 2049 { 2050 struct bnxt *bp = netdev_priv(dev); 2051 struct hwrm_port_phy_i2c_read_input req = {0}; 2052 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; 2053 int rc; 2054 2055 /* No point in going further if phy status indicates 2056 * module is not inserted or if it is powered down or 2057 * if it is of type 10GBase-T 2058 */ 2059 if (bp->link_info.module_status > 2060 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 2061 return -EOPNOTSUPP; 2062 2063 /* This feature is not supported in older firmware versions */ 2064 if (bp->hwrm_spec_code < 0x10202) 2065 return -EOPNOTSUPP; 2066 2067 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); 2068 req.i2c_slave_addr = I2C_DEV_ADDR_A0; 2069 req.page_number = 0; 2070 req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR); 2071 req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE; 2072 req.port_id = cpu_to_le16(bp->pf.port_id); 2073 mutex_lock(&bp->hwrm_cmd_lock); 2074 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2075 if (!rc) { 2076 u32 module_id = le32_to_cpu(output->data[0]); 2077 2078 switch (module_id) { 2079 case SFF_MODULE_ID_SFP: 2080 modinfo->type = ETH_MODULE_SFF_8472; 2081 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 2082 break; 2083 case SFF_MODULE_ID_QSFP: 2084 case SFF_MODULE_ID_QSFP_PLUS: 2085 modinfo->type = ETH_MODULE_SFF_8436; 2086 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2087 break; 2088 case SFF_MODULE_ID_QSFP28: 2089 modinfo->type = ETH_MODULE_SFF_8636; 2090 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 2091 break; 2092 default: 2093 rc = -EOPNOTSUPP; 2094 break; 2095 } 2096 } 2097 mutex_unlock(&bp->hwrm_cmd_lock); 2098 return rc; 2099 } 2100 2101 static int bnxt_get_module_eeprom(struct net_device *dev, 2102 struct ethtool_eeprom *eeprom, 2103 u8 *data) 2104 { 2105 struct bnxt *bp = netdev_priv(dev); 2106 u16 start = eeprom->offset, length = eeprom->len; 2107 int rc = 0; 2108 2109 memset(data, 0, eeprom->len); 2110 2111 /* Read A0 portion of the EEPROM */ 2112 if (start < ETH_MODULE_SFF_8436_LEN) { 2113 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 2114 length = ETH_MODULE_SFF_8436_LEN - start; 2115 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 2116 start, length, data); 2117 if (rc) 2118 return rc; 2119 start += length; 2120 data += length; 2121 length = eeprom->len - length; 2122 } 2123 2124 /* Read A2 portion of the EEPROM */ 2125 if (length) { 2126 start -= ETH_MODULE_SFF_8436_LEN; 2127 bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start, 2128 length, data); 2129 } 2130 return rc; 2131 } 2132 2133 static int bnxt_nway_reset(struct net_device *dev) 2134 { 2135 int rc = 0; 2136 2137 struct bnxt *bp = netdev_priv(dev); 2138 struct bnxt_link_info *link_info = &bp->link_info; 2139 2140 if (!BNXT_SINGLE_PF(bp)) 2141 return -EOPNOTSUPP; 2142 2143 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 2144 return -EINVAL; 2145 2146 if (netif_running(dev)) 2147 rc = bnxt_hwrm_set_link_setting(bp, true, false); 2148 2149 return rc; 2150 } 2151 2152 static int bnxt_set_phys_id(struct net_device *dev, 2153 enum ethtool_phys_id_state state) 2154 { 2155 struct hwrm_port_led_cfg_input req = {0}; 2156 struct bnxt *bp = netdev_priv(dev); 2157 struct bnxt_pf_info *pf = &bp->pf; 2158 struct bnxt_led_cfg *led_cfg; 2159 u8 led_state; 2160 __le16 duration; 2161 int i, rc; 2162 2163 if (!bp->num_leds || BNXT_VF(bp)) 2164 return -EOPNOTSUPP; 2165 2166 if (state == ETHTOOL_ID_ACTIVE) { 2167 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 2168 duration = cpu_to_le16(500); 2169 } else if (state == ETHTOOL_ID_INACTIVE) { 2170 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 2171 duration = cpu_to_le16(0); 2172 } else { 2173 return -EINVAL; 2174 } 2175 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1); 2176 req.port_id = cpu_to_le16(pf->port_id); 2177 req.num_leds = bp->num_leds; 2178 led_cfg = (struct bnxt_led_cfg *)&req.led0_id; 2179 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 2180 req.enables |= BNXT_LED_DFLT_ENABLES(i); 2181 led_cfg->led_id = bp->leds[i].led_id; 2182 led_cfg->led_state = led_state; 2183 led_cfg->led_blink_on = duration; 2184 led_cfg->led_blink_off = duration; 2185 led_cfg->led_group_id = bp->leds[i].led_group_id; 2186 } 2187 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2188 if (rc) 2189 rc = -EIO; 2190 return rc; 2191 } 2192 2193 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 2194 { 2195 struct hwrm_selftest_irq_input req = {0}; 2196 2197 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1); 2198 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2199 } 2200 2201 static int bnxt_test_irq(struct bnxt *bp) 2202 { 2203 int i; 2204 2205 for (i = 0; i < bp->cp_nr_rings; i++) { 2206 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 2207 int rc; 2208 2209 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 2210 if (rc) 2211 return rc; 2212 } 2213 return 0; 2214 } 2215 2216 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 2217 { 2218 struct hwrm_port_mac_cfg_input req = {0}; 2219 2220 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1); 2221 2222 req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 2223 if (enable) 2224 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 2225 else 2226 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 2227 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2228 } 2229 2230 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 2231 struct hwrm_port_phy_cfg_input *req) 2232 { 2233 struct bnxt_link_info *link_info = &bp->link_info; 2234 u16 fw_advertising = link_info->advertising; 2235 u16 fw_speed; 2236 int rc; 2237 2238 if (!link_info->autoneg) 2239 return 0; 2240 2241 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 2242 if (netif_carrier_ok(bp->dev)) 2243 fw_speed = bp->link_info.link_speed; 2244 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 2245 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 2246 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 2247 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 2248 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 2249 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 2250 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 2251 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 2252 2253 req->force_link_speed = cpu_to_le16(fw_speed); 2254 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 2255 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2256 rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT); 2257 req->flags = 0; 2258 req->force_link_speed = cpu_to_le16(0); 2259 return rc; 2260 } 2261 2262 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable) 2263 { 2264 struct hwrm_port_phy_cfg_input req = {0}; 2265 2266 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1); 2267 2268 if (enable) { 2269 bnxt_disable_an_for_lpbk(bp, &req); 2270 req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 2271 } else { 2272 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 2273 } 2274 req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 2275 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2276 } 2277 2278 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi, 2279 u32 raw_cons, int pkt_size) 2280 { 2281 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 2282 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; 2283 struct bnxt_sw_rx_bd *rx_buf; 2284 struct rx_cmp *rxcmp; 2285 u16 cp_cons, cons; 2286 u8 *data; 2287 u32 len; 2288 int i; 2289 2290 cp_cons = RING_CMP(raw_cons); 2291 rxcmp = (struct rx_cmp *) 2292 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 2293 cons = rxcmp->rx_cmp_opaque; 2294 rx_buf = &rxr->rx_buf_ring[cons]; 2295 data = rx_buf->data_ptr; 2296 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 2297 if (len != pkt_size) 2298 return -EIO; 2299 i = ETH_ALEN; 2300 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 2301 return -EIO; 2302 i += ETH_ALEN; 2303 for ( ; i < pkt_size; i++) { 2304 if (data[i] != (u8)(i & 0xff)) 2305 return -EIO; 2306 } 2307 return 0; 2308 } 2309 2310 static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size) 2311 { 2312 struct bnxt_napi *bnapi = bp->bnapi[0]; 2313 struct bnxt_cp_ring_info *cpr; 2314 struct tx_cmp *txcmp; 2315 int rc = -EIO; 2316 u32 raw_cons; 2317 u32 cons; 2318 int i; 2319 2320 cpr = &bnapi->cp_ring; 2321 raw_cons = cpr->cp_raw_cons; 2322 for (i = 0; i < 200; i++) { 2323 cons = RING_CMP(raw_cons); 2324 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 2325 2326 if (!TX_CMP_VALID(txcmp, raw_cons)) { 2327 udelay(5); 2328 continue; 2329 } 2330 2331 /* The valid test of the entry must be done first before 2332 * reading any further. 2333 */ 2334 dma_rmb(); 2335 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 2336 rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size); 2337 raw_cons = NEXT_RAW_CMP(raw_cons); 2338 raw_cons = NEXT_RAW_CMP(raw_cons); 2339 break; 2340 } 2341 raw_cons = NEXT_RAW_CMP(raw_cons); 2342 } 2343 cpr->cp_raw_cons = raw_cons; 2344 return rc; 2345 } 2346 2347 static int bnxt_run_loopback(struct bnxt *bp) 2348 { 2349 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 2350 int pkt_size, i = 0; 2351 struct sk_buff *skb; 2352 dma_addr_t map; 2353 u8 *data; 2354 int rc; 2355 2356 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 2357 skb = netdev_alloc_skb(bp->dev, pkt_size); 2358 if (!skb) 2359 return -ENOMEM; 2360 data = skb_put(skb, pkt_size); 2361 eth_broadcast_addr(data); 2362 i += ETH_ALEN; 2363 ether_addr_copy(&data[i], bp->dev->dev_addr); 2364 i += ETH_ALEN; 2365 for ( ; i < pkt_size; i++) 2366 data[i] = (u8)(i & 0xff); 2367 2368 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 2369 PCI_DMA_TODEVICE); 2370 if (dma_mapping_error(&bp->pdev->dev, map)) { 2371 dev_kfree_skb(skb); 2372 return -EIO; 2373 } 2374 bnxt_xmit_xdp(bp, txr, map, pkt_size, 0); 2375 2376 /* Sync BD data before updating doorbell */ 2377 wmb(); 2378 2379 writel(DB_KEY_TX | txr->tx_prod, txr->tx_doorbell); 2380 writel(DB_KEY_TX | txr->tx_prod, txr->tx_doorbell); 2381 rc = bnxt_poll_loopback(bp, pkt_size); 2382 2383 dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE); 2384 dev_kfree_skb(skb); 2385 return rc; 2386 } 2387 2388 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 2389 { 2390 struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr; 2391 struct hwrm_selftest_exec_input req = {0}; 2392 int rc; 2393 2394 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1); 2395 mutex_lock(&bp->hwrm_cmd_lock); 2396 resp->test_success = 0; 2397 req.flags = test_mask; 2398 rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout); 2399 *test_results = resp->test_success; 2400 mutex_unlock(&bp->hwrm_cmd_lock); 2401 return rc; 2402 } 2403 2404 #define BNXT_DRV_TESTS 3 2405 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 2406 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 2407 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 2408 2409 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 2410 u64 *buf) 2411 { 2412 struct bnxt *bp = netdev_priv(dev); 2413 bool offline = false; 2414 u8 test_results = 0; 2415 u8 test_mask = 0; 2416 int rc, i; 2417 2418 if (!bp->num_tests || !BNXT_SINGLE_PF(bp)) 2419 return; 2420 memset(buf, 0, sizeof(u64) * bp->num_tests); 2421 if (!netif_running(dev)) { 2422 etest->flags |= ETH_TEST_FL_FAILED; 2423 return; 2424 } 2425 2426 if (etest->flags & ETH_TEST_FL_OFFLINE) { 2427 if (bp->pf.active_vfs) { 2428 etest->flags |= ETH_TEST_FL_FAILED; 2429 netdev_warn(dev, "Offline tests cannot be run with active VFs\n"); 2430 return; 2431 } 2432 offline = true; 2433 } 2434 2435 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2436 u8 bit_val = 1 << i; 2437 2438 if (!(bp->test_info->offline_mask & bit_val)) 2439 test_mask |= bit_val; 2440 else if (offline) 2441 test_mask |= bit_val; 2442 } 2443 if (!offline) { 2444 bnxt_run_fw_tests(bp, test_mask, &test_results); 2445 } else { 2446 rc = bnxt_close_nic(bp, false, false); 2447 if (rc) 2448 return; 2449 bnxt_run_fw_tests(bp, test_mask, &test_results); 2450 2451 buf[BNXT_MACLPBK_TEST_IDX] = 1; 2452 bnxt_hwrm_mac_loopback(bp, true); 2453 msleep(250); 2454 rc = bnxt_half_open_nic(bp); 2455 if (rc) { 2456 bnxt_hwrm_mac_loopback(bp, false); 2457 etest->flags |= ETH_TEST_FL_FAILED; 2458 return; 2459 } 2460 if (bnxt_run_loopback(bp)) 2461 etest->flags |= ETH_TEST_FL_FAILED; 2462 else 2463 buf[BNXT_MACLPBK_TEST_IDX] = 0; 2464 2465 bnxt_hwrm_mac_loopback(bp, false); 2466 bnxt_hwrm_phy_loopback(bp, true); 2467 msleep(1000); 2468 if (bnxt_run_loopback(bp)) { 2469 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 2470 etest->flags |= ETH_TEST_FL_FAILED; 2471 } 2472 bnxt_hwrm_phy_loopback(bp, false); 2473 bnxt_half_close_nic(bp); 2474 bnxt_open_nic(bp, false, true); 2475 } 2476 if (bnxt_test_irq(bp)) { 2477 buf[BNXT_IRQ_TEST_IDX] = 1; 2478 etest->flags |= ETH_TEST_FL_FAILED; 2479 } 2480 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2481 u8 bit_val = 1 << i; 2482 2483 if ((test_mask & bit_val) && !(test_results & bit_val)) { 2484 buf[i] = 1; 2485 etest->flags |= ETH_TEST_FL_FAILED; 2486 } 2487 } 2488 } 2489 2490 void bnxt_ethtool_init(struct bnxt *bp) 2491 { 2492 struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr; 2493 struct hwrm_selftest_qlist_input req = {0}; 2494 struct bnxt_test_info *test_info; 2495 int i, rc; 2496 2497 if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp)) 2498 return; 2499 2500 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1); 2501 mutex_lock(&bp->hwrm_cmd_lock); 2502 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2503 if (rc) 2504 goto ethtool_init_exit; 2505 2506 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 2507 if (!test_info) 2508 goto ethtool_init_exit; 2509 2510 bp->test_info = test_info; 2511 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 2512 if (bp->num_tests > BNXT_MAX_TEST) 2513 bp->num_tests = BNXT_MAX_TEST; 2514 2515 test_info->offline_mask = resp->offline_tests; 2516 test_info->timeout = le16_to_cpu(resp->test_timeout); 2517 if (!test_info->timeout) 2518 test_info->timeout = HWRM_CMD_TIMEOUT; 2519 for (i = 0; i < bp->num_tests; i++) { 2520 char *str = test_info->string[i]; 2521 char *fw_str = resp->test0_name + i * 32; 2522 2523 if (i == BNXT_MACLPBK_TEST_IDX) { 2524 strcpy(str, "Mac loopback test (offline)"); 2525 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 2526 strcpy(str, "Phy loopback test (offline)"); 2527 } else if (i == BNXT_IRQ_TEST_IDX) { 2528 strcpy(str, "Interrupt_test (offline)"); 2529 } else { 2530 strlcpy(str, fw_str, ETH_GSTRING_LEN); 2531 strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); 2532 if (test_info->offline_mask & (1 << i)) 2533 strncat(str, " (offline)", 2534 ETH_GSTRING_LEN - strlen(str)); 2535 else 2536 strncat(str, " (online)", 2537 ETH_GSTRING_LEN - strlen(str)); 2538 } 2539 } 2540 2541 ethtool_init_exit: 2542 mutex_unlock(&bp->hwrm_cmd_lock); 2543 } 2544 2545 void bnxt_ethtool_free(struct bnxt *bp) 2546 { 2547 kfree(bp->test_info); 2548 bp->test_info = NULL; 2549 } 2550 2551 const struct ethtool_ops bnxt_ethtool_ops = { 2552 .get_link_ksettings = bnxt_get_link_ksettings, 2553 .set_link_ksettings = bnxt_set_link_ksettings, 2554 .get_pauseparam = bnxt_get_pauseparam, 2555 .set_pauseparam = bnxt_set_pauseparam, 2556 .get_drvinfo = bnxt_get_drvinfo, 2557 .get_wol = bnxt_get_wol, 2558 .set_wol = bnxt_set_wol, 2559 .get_coalesce = bnxt_get_coalesce, 2560 .set_coalesce = bnxt_set_coalesce, 2561 .get_msglevel = bnxt_get_msglevel, 2562 .set_msglevel = bnxt_set_msglevel, 2563 .get_sset_count = bnxt_get_sset_count, 2564 .get_strings = bnxt_get_strings, 2565 .get_ethtool_stats = bnxt_get_ethtool_stats, 2566 .set_ringparam = bnxt_set_ringparam, 2567 .get_ringparam = bnxt_get_ringparam, 2568 .get_channels = bnxt_get_channels, 2569 .set_channels = bnxt_set_channels, 2570 .get_rxnfc = bnxt_get_rxnfc, 2571 .set_rxnfc = bnxt_set_rxnfc, 2572 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 2573 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 2574 .get_rxfh = bnxt_get_rxfh, 2575 .flash_device = bnxt_flash_device, 2576 .get_eeprom_len = bnxt_get_eeprom_len, 2577 .get_eeprom = bnxt_get_eeprom, 2578 .set_eeprom = bnxt_set_eeprom, 2579 .get_link = bnxt_get_link, 2580 .get_eee = bnxt_get_eee, 2581 .set_eee = bnxt_set_eee, 2582 .get_module_info = bnxt_get_module_info, 2583 .get_module_eeprom = bnxt_get_module_eeprom, 2584 .nway_reset = bnxt_nway_reset, 2585 .set_phys_id = bnxt_set_phys_id, 2586 .self_test = bnxt_self_test, 2587 }; 2588