1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/interrupt.h> 15 #include <linux/pci.h> 16 #include <linux/etherdevice.h> 17 #include <linux/crc32.h> 18 #include <linux/firmware.h> 19 #include "bnxt_hsi.h" 20 #include "bnxt.h" 21 #include "bnxt_xdp.h" 22 #include "bnxt_ethtool.h" 23 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 24 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 25 #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100) 26 #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 27 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) 28 29 static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen); 30 31 static u32 bnxt_get_msglevel(struct net_device *dev) 32 { 33 struct bnxt *bp = netdev_priv(dev); 34 35 return bp->msg_enable; 36 } 37 38 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 39 { 40 struct bnxt *bp = netdev_priv(dev); 41 42 bp->msg_enable = value; 43 } 44 45 static int bnxt_get_coalesce(struct net_device *dev, 46 struct ethtool_coalesce *coal) 47 { 48 struct bnxt *bp = netdev_priv(dev); 49 50 memset(coal, 0, sizeof(*coal)); 51 52 coal->rx_coalesce_usecs = bp->rx_coal_ticks; 53 /* 2 completion records per rx packet */ 54 coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2; 55 coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq; 56 coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2; 57 58 coal->tx_coalesce_usecs = bp->tx_coal_ticks; 59 coal->tx_max_coalesced_frames = bp->tx_coal_bufs; 60 coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq; 61 coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq; 62 63 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 64 65 return 0; 66 } 67 68 static int bnxt_set_coalesce(struct net_device *dev, 69 struct ethtool_coalesce *coal) 70 { 71 struct bnxt *bp = netdev_priv(dev); 72 bool update_stats = false; 73 int rc = 0; 74 75 bp->rx_coal_ticks = coal->rx_coalesce_usecs; 76 /* 2 completion records per rx packet */ 77 bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2; 78 bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq; 79 bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2; 80 81 bp->tx_coal_ticks = coal->tx_coalesce_usecs; 82 bp->tx_coal_bufs = coal->tx_max_coalesced_frames; 83 bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq; 84 bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq; 85 86 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 87 u32 stats_ticks = coal->stats_block_coalesce_usecs; 88 89 stats_ticks = clamp_t(u32, stats_ticks, 90 BNXT_MIN_STATS_COAL_TICKS, 91 BNXT_MAX_STATS_COAL_TICKS); 92 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 93 bp->stats_coal_ticks = stats_ticks; 94 update_stats = true; 95 } 96 97 if (netif_running(dev)) { 98 if (update_stats) { 99 rc = bnxt_close_nic(bp, true, false); 100 if (!rc) 101 rc = bnxt_open_nic(bp, true, false); 102 } else { 103 rc = bnxt_hwrm_set_coal(bp); 104 } 105 } 106 107 return rc; 108 } 109 110 #define BNXT_NUM_STATS 21 111 112 #define BNXT_RX_STATS_ENTRY(counter) \ 113 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 114 115 #define BNXT_TX_STATS_ENTRY(counter) \ 116 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 117 118 static const struct { 119 long offset; 120 char string[ETH_GSTRING_LEN]; 121 } bnxt_port_stats_arr[] = { 122 BNXT_RX_STATS_ENTRY(rx_64b_frames), 123 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 124 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 125 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 126 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 127 BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames), 128 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 129 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 130 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 131 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 132 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 133 BNXT_RX_STATS_ENTRY(rx_total_frames), 134 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 135 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 136 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 137 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 138 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 139 BNXT_RX_STATS_ENTRY(rx_pause_frames), 140 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 141 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 142 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 143 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 144 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 145 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 146 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 147 BNXT_RX_STATS_ENTRY(rx_good_frames), 148 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 149 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 150 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 151 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 152 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 153 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 154 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 155 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 156 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 157 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 158 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 159 BNXT_RX_STATS_ENTRY(rx_bytes), 160 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 161 BNXT_RX_STATS_ENTRY(rx_runt_frames), 162 163 BNXT_TX_STATS_ENTRY(tx_64b_frames), 164 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 165 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 166 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 167 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 168 BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames), 169 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 170 BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames), 171 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 172 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 173 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 174 BNXT_TX_STATS_ENTRY(tx_good_frames), 175 BNXT_TX_STATS_ENTRY(tx_total_frames), 176 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 177 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 178 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 179 BNXT_TX_STATS_ENTRY(tx_pause_frames), 180 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 181 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 182 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 183 BNXT_TX_STATS_ENTRY(tx_err), 184 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 185 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 186 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 187 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 188 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 189 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 190 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 191 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 192 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 193 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 194 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 195 BNXT_TX_STATS_ENTRY(tx_total_collisions), 196 BNXT_TX_STATS_ENTRY(tx_bytes), 197 }; 198 199 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 200 201 static int bnxt_get_sset_count(struct net_device *dev, int sset) 202 { 203 struct bnxt *bp = netdev_priv(dev); 204 205 switch (sset) { 206 case ETH_SS_STATS: { 207 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings; 208 209 if (bp->flags & BNXT_FLAG_PORT_STATS) 210 num_stats += BNXT_NUM_PORT_STATS; 211 212 return num_stats; 213 } 214 case ETH_SS_TEST: 215 if (!bp->num_tests) 216 return -EOPNOTSUPP; 217 return bp->num_tests; 218 default: 219 return -EOPNOTSUPP; 220 } 221 } 222 223 static void bnxt_get_ethtool_stats(struct net_device *dev, 224 struct ethtool_stats *stats, u64 *buf) 225 { 226 u32 i, j = 0; 227 struct bnxt *bp = netdev_priv(dev); 228 u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings; 229 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8; 230 231 memset(buf, 0, buf_size); 232 233 if (!bp->bnapi) 234 return; 235 236 for (i = 0; i < bp->cp_nr_rings; i++) { 237 struct bnxt_napi *bnapi = bp->bnapi[i]; 238 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 239 __le64 *hw_stats = (__le64 *)cpr->hw_stats; 240 int k; 241 242 for (k = 0; k < stat_fields; j++, k++) 243 buf[j] = le64_to_cpu(hw_stats[k]); 244 buf[j++] = cpr->rx_l4_csum_errors; 245 } 246 if (bp->flags & BNXT_FLAG_PORT_STATS) { 247 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats; 248 249 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) { 250 buf[j] = le64_to_cpu(*(port_stats + 251 bnxt_port_stats_arr[i].offset)); 252 } 253 } 254 } 255 256 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 257 { 258 struct bnxt *bp = netdev_priv(dev); 259 u32 i; 260 261 switch (stringset) { 262 /* The number of strings must match BNXT_NUM_STATS defined above. */ 263 case ETH_SS_STATS: 264 for (i = 0; i < bp->cp_nr_rings; i++) { 265 sprintf(buf, "[%d]: rx_ucast_packets", i); 266 buf += ETH_GSTRING_LEN; 267 sprintf(buf, "[%d]: rx_mcast_packets", i); 268 buf += ETH_GSTRING_LEN; 269 sprintf(buf, "[%d]: rx_bcast_packets", i); 270 buf += ETH_GSTRING_LEN; 271 sprintf(buf, "[%d]: rx_discards", i); 272 buf += ETH_GSTRING_LEN; 273 sprintf(buf, "[%d]: rx_drops", i); 274 buf += ETH_GSTRING_LEN; 275 sprintf(buf, "[%d]: rx_ucast_bytes", i); 276 buf += ETH_GSTRING_LEN; 277 sprintf(buf, "[%d]: rx_mcast_bytes", i); 278 buf += ETH_GSTRING_LEN; 279 sprintf(buf, "[%d]: rx_bcast_bytes", i); 280 buf += ETH_GSTRING_LEN; 281 sprintf(buf, "[%d]: tx_ucast_packets", i); 282 buf += ETH_GSTRING_LEN; 283 sprintf(buf, "[%d]: tx_mcast_packets", i); 284 buf += ETH_GSTRING_LEN; 285 sprintf(buf, "[%d]: tx_bcast_packets", i); 286 buf += ETH_GSTRING_LEN; 287 sprintf(buf, "[%d]: tx_discards", i); 288 buf += ETH_GSTRING_LEN; 289 sprintf(buf, "[%d]: tx_drops", i); 290 buf += ETH_GSTRING_LEN; 291 sprintf(buf, "[%d]: tx_ucast_bytes", i); 292 buf += ETH_GSTRING_LEN; 293 sprintf(buf, "[%d]: tx_mcast_bytes", i); 294 buf += ETH_GSTRING_LEN; 295 sprintf(buf, "[%d]: tx_bcast_bytes", i); 296 buf += ETH_GSTRING_LEN; 297 sprintf(buf, "[%d]: tpa_packets", i); 298 buf += ETH_GSTRING_LEN; 299 sprintf(buf, "[%d]: tpa_bytes", i); 300 buf += ETH_GSTRING_LEN; 301 sprintf(buf, "[%d]: tpa_events", i); 302 buf += ETH_GSTRING_LEN; 303 sprintf(buf, "[%d]: tpa_aborts", i); 304 buf += ETH_GSTRING_LEN; 305 sprintf(buf, "[%d]: rx_l4_csum_errors", i); 306 buf += ETH_GSTRING_LEN; 307 } 308 if (bp->flags & BNXT_FLAG_PORT_STATS) { 309 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 310 strcpy(buf, bnxt_port_stats_arr[i].string); 311 buf += ETH_GSTRING_LEN; 312 } 313 } 314 break; 315 case ETH_SS_TEST: 316 if (bp->num_tests) 317 memcpy(buf, bp->test_info->string, 318 bp->num_tests * ETH_GSTRING_LEN); 319 break; 320 default: 321 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 322 stringset); 323 break; 324 } 325 } 326 327 static void bnxt_get_ringparam(struct net_device *dev, 328 struct ethtool_ringparam *ering) 329 { 330 struct bnxt *bp = netdev_priv(dev); 331 332 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 333 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 334 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 335 336 ering->rx_pending = bp->rx_ring_size; 337 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 338 ering->tx_pending = bp->tx_ring_size; 339 } 340 341 static int bnxt_set_ringparam(struct net_device *dev, 342 struct ethtool_ringparam *ering) 343 { 344 struct bnxt *bp = netdev_priv(dev); 345 346 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 347 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 348 (ering->tx_pending <= MAX_SKB_FRAGS)) 349 return -EINVAL; 350 351 if (netif_running(dev)) 352 bnxt_close_nic(bp, false, false); 353 354 bp->rx_ring_size = ering->rx_pending; 355 bp->tx_ring_size = ering->tx_pending; 356 bnxt_set_ring_params(bp); 357 358 if (netif_running(dev)) 359 return bnxt_open_nic(bp, false, false); 360 361 return 0; 362 } 363 364 static void bnxt_get_channels(struct net_device *dev, 365 struct ethtool_channels *channel) 366 { 367 struct bnxt *bp = netdev_priv(dev); 368 int max_rx_rings, max_tx_rings, tcs; 369 370 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 371 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 372 373 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 374 max_rx_rings = 0; 375 max_tx_rings = 0; 376 } 377 378 tcs = netdev_get_num_tc(dev); 379 if (tcs > 1) 380 max_tx_rings /= tcs; 381 382 channel->max_rx = max_rx_rings; 383 channel->max_tx = max_tx_rings; 384 channel->max_other = 0; 385 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 386 channel->combined_count = bp->rx_nr_rings; 387 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 388 channel->combined_count--; 389 } else { 390 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 391 channel->rx_count = bp->rx_nr_rings; 392 channel->tx_count = bp->tx_nr_rings_per_tc; 393 } 394 } 395 } 396 397 static int bnxt_set_channels(struct net_device *dev, 398 struct ethtool_channels *channel) 399 { 400 struct bnxt *bp = netdev_priv(dev); 401 int req_tx_rings, req_rx_rings, tcs; 402 bool sh = false; 403 int tx_xdp = 0; 404 int rc = 0; 405 406 if (channel->other_count) 407 return -EINVAL; 408 409 if (!channel->combined_count && 410 (!channel->rx_count || !channel->tx_count)) 411 return -EINVAL; 412 413 if (channel->combined_count && 414 (channel->rx_count || channel->tx_count)) 415 return -EINVAL; 416 417 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 418 channel->tx_count)) 419 return -EINVAL; 420 421 if (channel->combined_count) 422 sh = true; 423 424 tcs = netdev_get_num_tc(dev); 425 426 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 427 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 428 if (bp->tx_nr_rings_xdp) { 429 if (!sh) { 430 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 431 return -EINVAL; 432 } 433 tx_xdp = req_rx_rings; 434 } 435 rc = bnxt_reserve_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, 436 tx_xdp); 437 if (rc) { 438 netdev_warn(dev, "Unable to allocate the requested rings\n"); 439 return rc; 440 } 441 442 if (netif_running(dev)) { 443 if (BNXT_PF(bp)) { 444 /* TODO CHIMP_FW: Send message to all VF's 445 * before PF unload 446 */ 447 } 448 rc = bnxt_close_nic(bp, true, false); 449 if (rc) { 450 netdev_err(bp->dev, "Set channel failure rc :%x\n", 451 rc); 452 return rc; 453 } 454 } 455 456 if (sh) { 457 bp->flags |= BNXT_FLAG_SHARED_RINGS; 458 bp->rx_nr_rings = channel->combined_count; 459 bp->tx_nr_rings_per_tc = channel->combined_count; 460 } else { 461 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 462 bp->rx_nr_rings = channel->rx_count; 463 bp->tx_nr_rings_per_tc = channel->tx_count; 464 } 465 bp->tx_nr_rings_xdp = tx_xdp; 466 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 467 if (tcs > 1) 468 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 469 470 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 471 bp->tx_nr_rings + bp->rx_nr_rings; 472 473 bp->num_stat_ctxs = bp->cp_nr_rings; 474 475 /* After changing number of rx channels, update NTUPLE feature. */ 476 netdev_update_features(dev); 477 if (netif_running(dev)) { 478 rc = bnxt_open_nic(bp, true, false); 479 if ((!rc) && BNXT_PF(bp)) { 480 /* TODO CHIMP_FW: Send message to all VF's 481 * to renable 482 */ 483 } 484 } 485 486 return rc; 487 } 488 489 #ifdef CONFIG_RFS_ACCEL 490 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 491 u32 *rule_locs) 492 { 493 int i, j = 0; 494 495 cmd->data = bp->ntp_fltr_count; 496 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 497 struct hlist_head *head; 498 struct bnxt_ntuple_filter *fltr; 499 500 head = &bp->ntp_fltr_hash_tbl[i]; 501 rcu_read_lock(); 502 hlist_for_each_entry_rcu(fltr, head, hash) { 503 if (j == cmd->rule_cnt) 504 break; 505 rule_locs[j++] = fltr->sw_id; 506 } 507 rcu_read_unlock(); 508 if (j == cmd->rule_cnt) 509 break; 510 } 511 cmd->rule_cnt = j; 512 return 0; 513 } 514 515 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 516 { 517 struct ethtool_rx_flow_spec *fs = 518 (struct ethtool_rx_flow_spec *)&cmd->fs; 519 struct bnxt_ntuple_filter *fltr; 520 struct flow_keys *fkeys; 521 int i, rc = -EINVAL; 522 523 if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 524 return rc; 525 526 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 527 struct hlist_head *head; 528 529 head = &bp->ntp_fltr_hash_tbl[i]; 530 rcu_read_lock(); 531 hlist_for_each_entry_rcu(fltr, head, hash) { 532 if (fltr->sw_id == fs->location) 533 goto fltr_found; 534 } 535 rcu_read_unlock(); 536 } 537 return rc; 538 539 fltr_found: 540 fkeys = &fltr->fkeys; 541 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 542 if (fkeys->basic.ip_proto == IPPROTO_TCP) 543 fs->flow_type = TCP_V4_FLOW; 544 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 545 fs->flow_type = UDP_V4_FLOW; 546 else 547 goto fltr_err; 548 549 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 550 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 551 552 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 553 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 554 555 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 556 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 557 558 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 559 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 560 } else { 561 int i; 562 563 if (fkeys->basic.ip_proto == IPPROTO_TCP) 564 fs->flow_type = TCP_V6_FLOW; 565 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 566 fs->flow_type = UDP_V6_FLOW; 567 else 568 goto fltr_err; 569 570 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 571 fkeys->addrs.v6addrs.src; 572 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 573 fkeys->addrs.v6addrs.dst; 574 for (i = 0; i < 4; i++) { 575 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 576 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 577 } 578 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 579 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 580 581 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 582 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 583 } 584 585 fs->ring_cookie = fltr->rxq; 586 rc = 0; 587 588 fltr_err: 589 rcu_read_unlock(); 590 591 return rc; 592 } 593 #endif 594 595 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 596 { 597 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 598 return RXH_IP_SRC | RXH_IP_DST; 599 return 0; 600 } 601 602 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 603 { 604 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 605 return RXH_IP_SRC | RXH_IP_DST; 606 return 0; 607 } 608 609 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 610 { 611 cmd->data = 0; 612 switch (cmd->flow_type) { 613 case TCP_V4_FLOW: 614 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 615 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 616 RXH_L4_B_0_1 | RXH_L4_B_2_3; 617 cmd->data |= get_ethtool_ipv4_rss(bp); 618 break; 619 case UDP_V4_FLOW: 620 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 621 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 622 RXH_L4_B_0_1 | RXH_L4_B_2_3; 623 /* fall through */ 624 case SCTP_V4_FLOW: 625 case AH_ESP_V4_FLOW: 626 case AH_V4_FLOW: 627 case ESP_V4_FLOW: 628 case IPV4_FLOW: 629 cmd->data |= get_ethtool_ipv4_rss(bp); 630 break; 631 632 case TCP_V6_FLOW: 633 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 634 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 635 RXH_L4_B_0_1 | RXH_L4_B_2_3; 636 cmd->data |= get_ethtool_ipv6_rss(bp); 637 break; 638 case UDP_V6_FLOW: 639 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 640 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 641 RXH_L4_B_0_1 | RXH_L4_B_2_3; 642 /* fall through */ 643 case SCTP_V6_FLOW: 644 case AH_ESP_V6_FLOW: 645 case AH_V6_FLOW: 646 case ESP_V6_FLOW: 647 case IPV6_FLOW: 648 cmd->data |= get_ethtool_ipv6_rss(bp); 649 break; 650 } 651 return 0; 652 } 653 654 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 655 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 656 657 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 658 { 659 u32 rss_hash_cfg = bp->rss_hash_cfg; 660 int tuple, rc = 0; 661 662 if (cmd->data == RXH_4TUPLE) 663 tuple = 4; 664 else if (cmd->data == RXH_2TUPLE) 665 tuple = 2; 666 else if (!cmd->data) 667 tuple = 0; 668 else 669 return -EINVAL; 670 671 if (cmd->flow_type == TCP_V4_FLOW) { 672 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 673 if (tuple == 4) 674 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 675 } else if (cmd->flow_type == UDP_V4_FLOW) { 676 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 677 return -EINVAL; 678 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 679 if (tuple == 4) 680 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 681 } else if (cmd->flow_type == TCP_V6_FLOW) { 682 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 683 if (tuple == 4) 684 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 685 } else if (cmd->flow_type == UDP_V6_FLOW) { 686 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 687 return -EINVAL; 688 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 689 if (tuple == 4) 690 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 691 } else if (tuple == 4) { 692 return -EINVAL; 693 } 694 695 switch (cmd->flow_type) { 696 case TCP_V4_FLOW: 697 case UDP_V4_FLOW: 698 case SCTP_V4_FLOW: 699 case AH_ESP_V4_FLOW: 700 case AH_V4_FLOW: 701 case ESP_V4_FLOW: 702 case IPV4_FLOW: 703 if (tuple == 2) 704 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 705 else if (!tuple) 706 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 707 break; 708 709 case TCP_V6_FLOW: 710 case UDP_V6_FLOW: 711 case SCTP_V6_FLOW: 712 case AH_ESP_V6_FLOW: 713 case AH_V6_FLOW: 714 case ESP_V6_FLOW: 715 case IPV6_FLOW: 716 if (tuple == 2) 717 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 718 else if (!tuple) 719 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 720 break; 721 } 722 723 if (bp->rss_hash_cfg == rss_hash_cfg) 724 return 0; 725 726 bp->rss_hash_cfg = rss_hash_cfg; 727 if (netif_running(bp->dev)) { 728 bnxt_close_nic(bp, false, false); 729 rc = bnxt_open_nic(bp, false, false); 730 } 731 return rc; 732 } 733 734 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 735 u32 *rule_locs) 736 { 737 struct bnxt *bp = netdev_priv(dev); 738 int rc = 0; 739 740 switch (cmd->cmd) { 741 #ifdef CONFIG_RFS_ACCEL 742 case ETHTOOL_GRXRINGS: 743 cmd->data = bp->rx_nr_rings; 744 break; 745 746 case ETHTOOL_GRXCLSRLCNT: 747 cmd->rule_cnt = bp->ntp_fltr_count; 748 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 749 break; 750 751 case ETHTOOL_GRXCLSRLALL: 752 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 753 break; 754 755 case ETHTOOL_GRXCLSRULE: 756 rc = bnxt_grxclsrule(bp, cmd); 757 break; 758 #endif 759 760 case ETHTOOL_GRXFH: 761 rc = bnxt_grxfh(bp, cmd); 762 break; 763 764 default: 765 rc = -EOPNOTSUPP; 766 break; 767 } 768 769 return rc; 770 } 771 772 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 773 { 774 struct bnxt *bp = netdev_priv(dev); 775 int rc; 776 777 switch (cmd->cmd) { 778 case ETHTOOL_SRXFH: 779 rc = bnxt_srxfh(bp, cmd); 780 break; 781 782 default: 783 rc = -EOPNOTSUPP; 784 break; 785 } 786 return rc; 787 } 788 789 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 790 { 791 return HW_HASH_INDEX_SIZE; 792 } 793 794 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 795 { 796 return HW_HASH_KEY_SIZE; 797 } 798 799 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 800 u8 *hfunc) 801 { 802 struct bnxt *bp = netdev_priv(dev); 803 struct bnxt_vnic_info *vnic = &bp->vnic_info[0]; 804 int i = 0; 805 806 if (hfunc) 807 *hfunc = ETH_RSS_HASH_TOP; 808 809 if (indir) 810 for (i = 0; i < HW_HASH_INDEX_SIZE; i++) 811 indir[i] = le16_to_cpu(vnic->rss_table[i]); 812 813 if (key) 814 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 815 816 return 0; 817 } 818 819 static void bnxt_get_drvinfo(struct net_device *dev, 820 struct ethtool_drvinfo *info) 821 { 822 struct bnxt *bp = netdev_priv(dev); 823 char *pkglog; 824 char *pkgver = NULL; 825 826 pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL); 827 if (pkglog) 828 pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH); 829 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 830 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 831 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) 832 snprintf(info->fw_version, sizeof(info->fw_version) - 1, 833 "%s pkg %s", bp->fw_ver_str, pkgver); 834 else 835 strlcpy(info->fw_version, bp->fw_ver_str, 836 sizeof(info->fw_version)); 837 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 838 info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings; 839 info->testinfo_len = bp->num_tests; 840 /* TODO CHIMP_FW: eeprom dump details */ 841 info->eedump_len = 0; 842 /* TODO CHIMP FW: reg dump details */ 843 info->regdump_len = 0; 844 kfree(pkglog); 845 } 846 847 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 848 { 849 struct bnxt *bp = netdev_priv(dev); 850 851 wol->supported = 0; 852 wol->wolopts = 0; 853 memset(&wol->sopass, 0, sizeof(wol->sopass)); 854 if (bp->flags & BNXT_FLAG_WOL_CAP) { 855 wol->supported = WAKE_MAGIC; 856 if (bp->wol) 857 wol->wolopts = WAKE_MAGIC; 858 } 859 } 860 861 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 862 { 863 struct bnxt *bp = netdev_priv(dev); 864 865 if (wol->wolopts & ~WAKE_MAGIC) 866 return -EINVAL; 867 868 if (wol->wolopts & WAKE_MAGIC) { 869 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 870 return -EINVAL; 871 if (!bp->wol) { 872 if (bnxt_hwrm_alloc_wol_fltr(bp)) 873 return -EBUSY; 874 bp->wol = 1; 875 } 876 } else { 877 if (bp->wol) { 878 if (bnxt_hwrm_free_wol_fltr(bp)) 879 return -EBUSY; 880 bp->wol = 0; 881 } 882 } 883 return 0; 884 } 885 886 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 887 { 888 u32 speed_mask = 0; 889 890 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 891 /* set the advertised speeds */ 892 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 893 speed_mask |= ADVERTISED_100baseT_Full; 894 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 895 speed_mask |= ADVERTISED_1000baseT_Full; 896 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 897 speed_mask |= ADVERTISED_2500baseX_Full; 898 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 899 speed_mask |= ADVERTISED_10000baseT_Full; 900 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 901 speed_mask |= ADVERTISED_40000baseCR4_Full; 902 903 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 904 speed_mask |= ADVERTISED_Pause; 905 else if (fw_pause & BNXT_LINK_PAUSE_TX) 906 speed_mask |= ADVERTISED_Asym_Pause; 907 else if (fw_pause & BNXT_LINK_PAUSE_RX) 908 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 909 910 return speed_mask; 911 } 912 913 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 914 { \ 915 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 916 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 917 100baseT_Full); \ 918 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 919 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 920 1000baseT_Full); \ 921 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 922 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 923 10000baseT_Full); \ 924 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 925 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 926 25000baseCR_Full); \ 927 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 928 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 929 40000baseCR4_Full);\ 930 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 931 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 932 50000baseCR2_Full);\ 933 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 934 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 935 100000baseCR4_Full);\ 936 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 937 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 938 Pause); \ 939 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 940 ethtool_link_ksettings_add_link_mode( \ 941 lk_ksettings, name, Asym_Pause);\ 942 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 943 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 944 Asym_Pause); \ 945 } \ 946 } 947 948 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 949 { \ 950 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 951 100baseT_Full) || \ 952 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 953 100baseT_Half)) \ 954 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 955 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 956 1000baseT_Full) || \ 957 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 958 1000baseT_Half)) \ 959 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 960 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 961 10000baseT_Full)) \ 962 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 963 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 964 25000baseCR_Full)) \ 965 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 966 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 967 40000baseCR4_Full)) \ 968 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 969 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 970 50000baseCR2_Full)) \ 971 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 972 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 973 100000baseCR4_Full)) \ 974 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 975 } 976 977 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 978 struct ethtool_link_ksettings *lk_ksettings) 979 { 980 u16 fw_speeds = link_info->advertising; 981 u8 fw_pause = 0; 982 983 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 984 fw_pause = link_info->auto_pause_setting; 985 986 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 987 } 988 989 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 990 struct ethtool_link_ksettings *lk_ksettings) 991 { 992 u16 fw_speeds = link_info->lp_auto_link_speeds; 993 u8 fw_pause = 0; 994 995 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 996 fw_pause = link_info->lp_pause; 997 998 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 999 lp_advertising); 1000 } 1001 1002 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1003 struct ethtool_link_ksettings *lk_ksettings) 1004 { 1005 u16 fw_speeds = link_info->support_speeds; 1006 1007 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1008 1009 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); 1010 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1011 Asym_Pause); 1012 1013 if (link_info->support_auto_speeds) 1014 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1015 Autoneg); 1016 } 1017 1018 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1019 { 1020 switch (fw_link_speed) { 1021 case BNXT_LINK_SPEED_100MB: 1022 return SPEED_100; 1023 case BNXT_LINK_SPEED_1GB: 1024 return SPEED_1000; 1025 case BNXT_LINK_SPEED_2_5GB: 1026 return SPEED_2500; 1027 case BNXT_LINK_SPEED_10GB: 1028 return SPEED_10000; 1029 case BNXT_LINK_SPEED_20GB: 1030 return SPEED_20000; 1031 case BNXT_LINK_SPEED_25GB: 1032 return SPEED_25000; 1033 case BNXT_LINK_SPEED_40GB: 1034 return SPEED_40000; 1035 case BNXT_LINK_SPEED_50GB: 1036 return SPEED_50000; 1037 case BNXT_LINK_SPEED_100GB: 1038 return SPEED_100000; 1039 default: 1040 return SPEED_UNKNOWN; 1041 } 1042 } 1043 1044 static int bnxt_get_link_ksettings(struct net_device *dev, 1045 struct ethtool_link_ksettings *lk_ksettings) 1046 { 1047 struct bnxt *bp = netdev_priv(dev); 1048 struct bnxt_link_info *link_info = &bp->link_info; 1049 struct ethtool_link_settings *base = &lk_ksettings->base; 1050 u32 ethtool_speed; 1051 1052 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1053 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1054 1055 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1056 if (link_info->autoneg) { 1057 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1058 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1059 advertising, Autoneg); 1060 base->autoneg = AUTONEG_ENABLE; 1061 if (link_info->phy_link_status == BNXT_LINK_LINK) 1062 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1063 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1064 if (!netif_carrier_ok(dev)) 1065 base->duplex = DUPLEX_UNKNOWN; 1066 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1067 base->duplex = DUPLEX_FULL; 1068 else 1069 base->duplex = DUPLEX_HALF; 1070 } else { 1071 base->autoneg = AUTONEG_DISABLE; 1072 ethtool_speed = 1073 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1074 base->duplex = DUPLEX_HALF; 1075 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1076 base->duplex = DUPLEX_FULL; 1077 } 1078 base->speed = ethtool_speed; 1079 1080 base->port = PORT_NONE; 1081 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1082 base->port = PORT_TP; 1083 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1084 TP); 1085 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1086 TP); 1087 } else { 1088 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1089 FIBRE); 1090 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1091 FIBRE); 1092 1093 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1094 base->port = PORT_DA; 1095 else if (link_info->media_type == 1096 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1097 base->port = PORT_FIBRE; 1098 } 1099 base->phy_address = link_info->phy_addr; 1100 1101 return 0; 1102 } 1103 1104 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed) 1105 { 1106 struct bnxt *bp = netdev_priv(dev); 1107 struct bnxt_link_info *link_info = &bp->link_info; 1108 u16 support_spds = link_info->support_speeds; 1109 u32 fw_speed = 0; 1110 1111 switch (ethtool_speed) { 1112 case SPEED_100: 1113 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1114 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB; 1115 break; 1116 case SPEED_1000: 1117 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1118 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB; 1119 break; 1120 case SPEED_2500: 1121 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1122 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB; 1123 break; 1124 case SPEED_10000: 1125 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1126 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB; 1127 break; 1128 case SPEED_20000: 1129 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1130 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB; 1131 break; 1132 case SPEED_25000: 1133 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1134 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB; 1135 break; 1136 case SPEED_40000: 1137 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1138 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB; 1139 break; 1140 case SPEED_50000: 1141 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) 1142 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB; 1143 break; 1144 case SPEED_100000: 1145 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) 1146 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB; 1147 break; 1148 default: 1149 netdev_err(dev, "unsupported speed!\n"); 1150 break; 1151 } 1152 return fw_speed; 1153 } 1154 1155 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1156 { 1157 u16 fw_speed_mask = 0; 1158 1159 /* only support autoneg at speed 100, 1000, and 10000 */ 1160 if (advertising & (ADVERTISED_100baseT_Full | 1161 ADVERTISED_100baseT_Half)) { 1162 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1163 } 1164 if (advertising & (ADVERTISED_1000baseT_Full | 1165 ADVERTISED_1000baseT_Half)) { 1166 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1167 } 1168 if (advertising & ADVERTISED_10000baseT_Full) 1169 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1170 1171 if (advertising & ADVERTISED_40000baseCR4_Full) 1172 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1173 1174 return fw_speed_mask; 1175 } 1176 1177 static int bnxt_set_link_ksettings(struct net_device *dev, 1178 const struct ethtool_link_ksettings *lk_ksettings) 1179 { 1180 struct bnxt *bp = netdev_priv(dev); 1181 struct bnxt_link_info *link_info = &bp->link_info; 1182 const struct ethtool_link_settings *base = &lk_ksettings->base; 1183 bool set_pause = false; 1184 u16 fw_advertising = 0; 1185 u32 speed; 1186 int rc = 0; 1187 1188 if (!BNXT_SINGLE_PF(bp)) 1189 return -EOPNOTSUPP; 1190 1191 if (base->autoneg == AUTONEG_ENABLE) { 1192 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings, 1193 advertising); 1194 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1195 if (!fw_advertising) 1196 link_info->advertising = link_info->support_auto_speeds; 1197 else 1198 link_info->advertising = fw_advertising; 1199 /* any change to autoneg will cause link change, therefore the 1200 * driver should put back the original pause setting in autoneg 1201 */ 1202 set_pause = true; 1203 } else { 1204 u16 fw_speed; 1205 u8 phy_type = link_info->phy_type; 1206 1207 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1208 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1209 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1210 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1211 rc = -EINVAL; 1212 goto set_setting_exit; 1213 } 1214 if (base->duplex == DUPLEX_HALF) { 1215 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1216 rc = -EINVAL; 1217 goto set_setting_exit; 1218 } 1219 speed = base->speed; 1220 fw_speed = bnxt_get_fw_speed(dev, speed); 1221 if (!fw_speed) { 1222 rc = -EINVAL; 1223 goto set_setting_exit; 1224 } 1225 link_info->req_link_speed = fw_speed; 1226 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1227 link_info->autoneg = 0; 1228 link_info->advertising = 0; 1229 } 1230 1231 if (netif_running(dev)) 1232 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1233 1234 set_setting_exit: 1235 return rc; 1236 } 1237 1238 static void bnxt_get_pauseparam(struct net_device *dev, 1239 struct ethtool_pauseparam *epause) 1240 { 1241 struct bnxt *bp = netdev_priv(dev); 1242 struct bnxt_link_info *link_info = &bp->link_info; 1243 1244 if (BNXT_VF(bp)) 1245 return; 1246 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 1247 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 1248 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 1249 } 1250 1251 static int bnxt_set_pauseparam(struct net_device *dev, 1252 struct ethtool_pauseparam *epause) 1253 { 1254 int rc = 0; 1255 struct bnxt *bp = netdev_priv(dev); 1256 struct bnxt_link_info *link_info = &bp->link_info; 1257 1258 if (!BNXT_SINGLE_PF(bp)) 1259 return -EOPNOTSUPP; 1260 1261 if (epause->autoneg) { 1262 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 1263 return -EINVAL; 1264 1265 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 1266 if (bp->hwrm_spec_code >= 0x10201) 1267 link_info->req_flow_ctrl = 1268 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; 1269 } else { 1270 /* when transition from auto pause to force pause, 1271 * force a link change 1272 */ 1273 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1274 link_info->force_link_chng = true; 1275 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 1276 link_info->req_flow_ctrl = 0; 1277 } 1278 if (epause->rx_pause) 1279 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 1280 1281 if (epause->tx_pause) 1282 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 1283 1284 if (netif_running(dev)) 1285 rc = bnxt_hwrm_set_pause(bp); 1286 return rc; 1287 } 1288 1289 static u32 bnxt_get_link(struct net_device *dev) 1290 { 1291 struct bnxt *bp = netdev_priv(dev); 1292 1293 /* TODO: handle MF, VF, driver close case */ 1294 return bp->link_info.link_up; 1295 } 1296 1297 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1298 u16 ext, u16 *index, u32 *item_length, 1299 u32 *data_length); 1300 1301 static int bnxt_flash_nvram(struct net_device *dev, 1302 u16 dir_type, 1303 u16 dir_ordinal, 1304 u16 dir_ext, 1305 u16 dir_attr, 1306 const u8 *data, 1307 size_t data_len) 1308 { 1309 struct bnxt *bp = netdev_priv(dev); 1310 int rc; 1311 struct hwrm_nvm_write_input req = {0}; 1312 dma_addr_t dma_handle; 1313 u8 *kmem; 1314 1315 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1); 1316 1317 req.dir_type = cpu_to_le16(dir_type); 1318 req.dir_ordinal = cpu_to_le16(dir_ordinal); 1319 req.dir_ext = cpu_to_le16(dir_ext); 1320 req.dir_attr = cpu_to_le16(dir_attr); 1321 req.dir_data_length = cpu_to_le32(data_len); 1322 1323 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle, 1324 GFP_KERNEL); 1325 if (!kmem) { 1326 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1327 (unsigned)data_len); 1328 return -ENOMEM; 1329 } 1330 memcpy(kmem, data, data_len); 1331 req.host_src_addr = cpu_to_le64(dma_handle); 1332 1333 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT); 1334 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle); 1335 1336 return rc; 1337 } 1338 1339 static int bnxt_firmware_reset(struct net_device *dev, 1340 u16 dir_type) 1341 { 1342 struct bnxt *bp = netdev_priv(dev); 1343 struct hwrm_fw_reset_input req = {0}; 1344 1345 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1); 1346 1347 /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */ 1348 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 1349 /* (e.g. when firmware isn't already running) */ 1350 switch (dir_type) { 1351 case BNX_DIR_TYPE_CHIMP_PATCH: 1352 case BNX_DIR_TYPE_BOOTCODE: 1353 case BNX_DIR_TYPE_BOOTCODE_2: 1354 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 1355 /* Self-reset ChiMP upon next PCIe reset: */ 1356 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1357 break; 1358 case BNX_DIR_TYPE_APE_FW: 1359 case BNX_DIR_TYPE_APE_PATCH: 1360 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 1361 /* Self-reset APE upon next PCIe reset: */ 1362 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 1363 break; 1364 case BNX_DIR_TYPE_KONG_FW: 1365 case BNX_DIR_TYPE_KONG_PATCH: 1366 req.embedded_proc_type = 1367 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 1368 break; 1369 case BNX_DIR_TYPE_BONO_FW: 1370 case BNX_DIR_TYPE_BONO_PATCH: 1371 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 1372 break; 1373 default: 1374 return -EINVAL; 1375 } 1376 1377 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1378 } 1379 1380 static int bnxt_flash_firmware(struct net_device *dev, 1381 u16 dir_type, 1382 const u8 *fw_data, 1383 size_t fw_size) 1384 { 1385 int rc = 0; 1386 u16 code_type; 1387 u32 stored_crc; 1388 u32 calculated_crc; 1389 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 1390 1391 switch (dir_type) { 1392 case BNX_DIR_TYPE_BOOTCODE: 1393 case BNX_DIR_TYPE_BOOTCODE_2: 1394 code_type = CODE_BOOT; 1395 break; 1396 case BNX_DIR_TYPE_CHIMP_PATCH: 1397 code_type = CODE_CHIMP_PATCH; 1398 break; 1399 case BNX_DIR_TYPE_APE_FW: 1400 code_type = CODE_MCTP_PASSTHRU; 1401 break; 1402 case BNX_DIR_TYPE_APE_PATCH: 1403 code_type = CODE_APE_PATCH; 1404 break; 1405 case BNX_DIR_TYPE_KONG_FW: 1406 code_type = CODE_KONG_FW; 1407 break; 1408 case BNX_DIR_TYPE_KONG_PATCH: 1409 code_type = CODE_KONG_PATCH; 1410 break; 1411 case BNX_DIR_TYPE_BONO_FW: 1412 code_type = CODE_BONO_FW; 1413 break; 1414 case BNX_DIR_TYPE_BONO_PATCH: 1415 code_type = CODE_BONO_PATCH; 1416 break; 1417 default: 1418 netdev_err(dev, "Unsupported directory entry type: %u\n", 1419 dir_type); 1420 return -EINVAL; 1421 } 1422 if (fw_size < sizeof(struct bnxt_fw_header)) { 1423 netdev_err(dev, "Invalid firmware file size: %u\n", 1424 (unsigned int)fw_size); 1425 return -EINVAL; 1426 } 1427 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 1428 netdev_err(dev, "Invalid firmware signature: %08X\n", 1429 le32_to_cpu(header->signature)); 1430 return -EINVAL; 1431 } 1432 if (header->code_type != code_type) { 1433 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 1434 code_type, header->code_type); 1435 return -EINVAL; 1436 } 1437 if (header->device != DEVICE_CUMULUS_FAMILY) { 1438 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 1439 DEVICE_CUMULUS_FAMILY, header->device); 1440 return -EINVAL; 1441 } 1442 /* Confirm the CRC32 checksum of the file: */ 1443 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1444 sizeof(stored_crc))); 1445 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1446 if (calculated_crc != stored_crc) { 1447 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 1448 (unsigned long)stored_crc, 1449 (unsigned long)calculated_crc); 1450 return -EINVAL; 1451 } 1452 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1453 0, 0, fw_data, fw_size); 1454 if (rc == 0) /* Firmware update successful */ 1455 rc = bnxt_firmware_reset(dev, dir_type); 1456 1457 return rc; 1458 } 1459 1460 static int bnxt_flash_microcode(struct net_device *dev, 1461 u16 dir_type, 1462 const u8 *fw_data, 1463 size_t fw_size) 1464 { 1465 struct bnxt_ucode_trailer *trailer; 1466 u32 calculated_crc; 1467 u32 stored_crc; 1468 int rc = 0; 1469 1470 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 1471 netdev_err(dev, "Invalid microcode file size: %u\n", 1472 (unsigned int)fw_size); 1473 return -EINVAL; 1474 } 1475 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 1476 sizeof(*trailer))); 1477 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 1478 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 1479 le32_to_cpu(trailer->sig)); 1480 return -EINVAL; 1481 } 1482 if (le16_to_cpu(trailer->dir_type) != dir_type) { 1483 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 1484 dir_type, le16_to_cpu(trailer->dir_type)); 1485 return -EINVAL; 1486 } 1487 if (le16_to_cpu(trailer->trailer_length) < 1488 sizeof(struct bnxt_ucode_trailer)) { 1489 netdev_err(dev, "Invalid microcode trailer length: %d\n", 1490 le16_to_cpu(trailer->trailer_length)); 1491 return -EINVAL; 1492 } 1493 1494 /* Confirm the CRC32 checksum of the file: */ 1495 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 1496 sizeof(stored_crc))); 1497 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 1498 if (calculated_crc != stored_crc) { 1499 netdev_err(dev, 1500 "CRC32 (%08lX) does not match calculated: %08lX\n", 1501 (unsigned long)stored_crc, 1502 (unsigned long)calculated_crc); 1503 return -EINVAL; 1504 } 1505 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1506 0, 0, fw_data, fw_size); 1507 1508 return rc; 1509 } 1510 1511 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 1512 { 1513 switch (dir_type) { 1514 case BNX_DIR_TYPE_CHIMP_PATCH: 1515 case BNX_DIR_TYPE_BOOTCODE: 1516 case BNX_DIR_TYPE_BOOTCODE_2: 1517 case BNX_DIR_TYPE_APE_FW: 1518 case BNX_DIR_TYPE_APE_PATCH: 1519 case BNX_DIR_TYPE_KONG_FW: 1520 case BNX_DIR_TYPE_KONG_PATCH: 1521 case BNX_DIR_TYPE_BONO_FW: 1522 case BNX_DIR_TYPE_BONO_PATCH: 1523 return true; 1524 } 1525 1526 return false; 1527 } 1528 1529 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 1530 { 1531 switch (dir_type) { 1532 case BNX_DIR_TYPE_AVS: 1533 case BNX_DIR_TYPE_EXP_ROM_MBA: 1534 case BNX_DIR_TYPE_PCIE: 1535 case BNX_DIR_TYPE_TSCF_UCODE: 1536 case BNX_DIR_TYPE_EXT_PHY: 1537 case BNX_DIR_TYPE_CCM: 1538 case BNX_DIR_TYPE_ISCSI_BOOT: 1539 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 1540 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 1541 return true; 1542 } 1543 1544 return false; 1545 } 1546 1547 static bool bnxt_dir_type_is_executable(u16 dir_type) 1548 { 1549 return bnxt_dir_type_is_ape_bin_format(dir_type) || 1550 bnxt_dir_type_is_other_exec_format(dir_type); 1551 } 1552 1553 static int bnxt_flash_firmware_from_file(struct net_device *dev, 1554 u16 dir_type, 1555 const char *filename) 1556 { 1557 const struct firmware *fw; 1558 int rc; 1559 1560 rc = request_firmware(&fw, filename, &dev->dev); 1561 if (rc != 0) { 1562 netdev_err(dev, "Error %d requesting firmware file: %s\n", 1563 rc, filename); 1564 return rc; 1565 } 1566 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true) 1567 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 1568 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true) 1569 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 1570 else 1571 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 1572 0, 0, fw->data, fw->size); 1573 release_firmware(fw); 1574 return rc; 1575 } 1576 1577 static int bnxt_flash_package_from_file(struct net_device *dev, 1578 char *filename, u32 install_type) 1579 { 1580 struct bnxt *bp = netdev_priv(dev); 1581 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr; 1582 struct hwrm_nvm_install_update_input install = {0}; 1583 const struct firmware *fw; 1584 u32 item_len; 1585 u16 index; 1586 int rc; 1587 1588 bnxt_hwrm_fw_set_time(bp); 1589 1590 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 1591 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1592 &index, &item_len, NULL) != 0) { 1593 netdev_err(dev, "PKG update area not created in nvram\n"); 1594 return -ENOBUFS; 1595 } 1596 1597 rc = request_firmware(&fw, filename, &dev->dev); 1598 if (rc != 0) { 1599 netdev_err(dev, "PKG error %d requesting file: %s\n", 1600 rc, filename); 1601 return rc; 1602 } 1603 1604 if (fw->size > item_len) { 1605 netdev_err(dev, "PKG insufficient update area in nvram: %lu", 1606 (unsigned long)fw->size); 1607 rc = -EFBIG; 1608 } else { 1609 dma_addr_t dma_handle; 1610 u8 *kmem; 1611 struct hwrm_nvm_modify_input modify = {0}; 1612 1613 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1); 1614 1615 modify.dir_idx = cpu_to_le16(index); 1616 modify.len = cpu_to_le32(fw->size); 1617 1618 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size, 1619 &dma_handle, GFP_KERNEL); 1620 if (!kmem) { 1621 netdev_err(dev, 1622 "dma_alloc_coherent failure, length = %u\n", 1623 (unsigned int)fw->size); 1624 rc = -ENOMEM; 1625 } else { 1626 memcpy(kmem, fw->data, fw->size); 1627 modify.host_src_addr = cpu_to_le64(dma_handle); 1628 1629 rc = hwrm_send_message(bp, &modify, sizeof(modify), 1630 FLASH_PACKAGE_TIMEOUT); 1631 dma_free_coherent(&bp->pdev->dev, fw->size, kmem, 1632 dma_handle); 1633 } 1634 } 1635 release_firmware(fw); 1636 if (rc) 1637 return rc; 1638 1639 if ((install_type & 0xffff) == 0) 1640 install_type >>= 16; 1641 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1); 1642 install.install_type = cpu_to_le32(install_type); 1643 1644 mutex_lock(&bp->hwrm_cmd_lock); 1645 rc = _hwrm_send_message(bp, &install, sizeof(install), 1646 INSTALL_PACKAGE_TIMEOUT); 1647 if (rc) { 1648 rc = -EOPNOTSUPP; 1649 goto flash_pkg_exit; 1650 } 1651 1652 if (resp->error_code) { 1653 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err; 1654 1655 if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { 1656 install.flags |= cpu_to_le16( 1657 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 1658 rc = _hwrm_send_message(bp, &install, sizeof(install), 1659 INSTALL_PACKAGE_TIMEOUT); 1660 if (rc) { 1661 rc = -EOPNOTSUPP; 1662 goto flash_pkg_exit; 1663 } 1664 } 1665 } 1666 1667 if (resp->result) { 1668 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 1669 (s8)resp->result, (int)resp->problem_item); 1670 rc = -ENOPKG; 1671 } 1672 flash_pkg_exit: 1673 mutex_unlock(&bp->hwrm_cmd_lock); 1674 return rc; 1675 } 1676 1677 static int bnxt_flash_device(struct net_device *dev, 1678 struct ethtool_flash *flash) 1679 { 1680 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 1681 netdev_err(dev, "flashdev not supported from a virtual function\n"); 1682 return -EINVAL; 1683 } 1684 1685 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 1686 flash->region > 0xffff) 1687 return bnxt_flash_package_from_file(dev, flash->data, 1688 flash->region); 1689 1690 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 1691 } 1692 1693 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 1694 { 1695 struct bnxt *bp = netdev_priv(dev); 1696 int rc; 1697 struct hwrm_nvm_get_dir_info_input req = {0}; 1698 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr; 1699 1700 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1); 1701 1702 mutex_lock(&bp->hwrm_cmd_lock); 1703 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1704 if (!rc) { 1705 *entries = le32_to_cpu(output->entries); 1706 *length = le32_to_cpu(output->entry_length); 1707 } 1708 mutex_unlock(&bp->hwrm_cmd_lock); 1709 return rc; 1710 } 1711 1712 static int bnxt_get_eeprom_len(struct net_device *dev) 1713 { 1714 /* The -1 return value allows the entire 32-bit range of offsets to be 1715 * passed via the ethtool command-line utility. 1716 */ 1717 return -1; 1718 } 1719 1720 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 1721 { 1722 struct bnxt *bp = netdev_priv(dev); 1723 int rc; 1724 u32 dir_entries; 1725 u32 entry_length; 1726 u8 *buf; 1727 size_t buflen; 1728 dma_addr_t dma_handle; 1729 struct hwrm_nvm_get_dir_entries_input req = {0}; 1730 1731 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 1732 if (rc != 0) 1733 return rc; 1734 1735 /* Insert 2 bytes of directory info (count and size of entries) */ 1736 if (len < 2) 1737 return -EINVAL; 1738 1739 *data++ = dir_entries; 1740 *data++ = entry_length; 1741 len -= 2; 1742 memset(data, 0xff, len); 1743 1744 buflen = dir_entries * entry_length; 1745 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle, 1746 GFP_KERNEL); 1747 if (!buf) { 1748 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1749 (unsigned)buflen); 1750 return -ENOMEM; 1751 } 1752 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1); 1753 req.host_dest_addr = cpu_to_le64(dma_handle); 1754 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1755 if (rc == 0) 1756 memcpy(data, buf, len > buflen ? buflen : len); 1757 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle); 1758 return rc; 1759 } 1760 1761 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 1762 u32 length, u8 *data) 1763 { 1764 struct bnxt *bp = netdev_priv(dev); 1765 int rc; 1766 u8 *buf; 1767 dma_addr_t dma_handle; 1768 struct hwrm_nvm_read_input req = {0}; 1769 1770 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle, 1771 GFP_KERNEL); 1772 if (!buf) { 1773 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", 1774 (unsigned)length); 1775 return -ENOMEM; 1776 } 1777 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1); 1778 req.host_dest_addr = cpu_to_le64(dma_handle); 1779 req.dir_idx = cpu_to_le16(index); 1780 req.offset = cpu_to_le32(offset); 1781 req.len = cpu_to_le32(length); 1782 1783 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1784 if (rc == 0) 1785 memcpy(data, buf, length); 1786 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle); 1787 return rc; 1788 } 1789 1790 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 1791 u16 ext, u16 *index, u32 *item_length, 1792 u32 *data_length) 1793 { 1794 struct bnxt *bp = netdev_priv(dev); 1795 int rc; 1796 struct hwrm_nvm_find_dir_entry_input req = {0}; 1797 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr; 1798 1799 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1); 1800 req.enables = 0; 1801 req.dir_idx = 0; 1802 req.dir_type = cpu_to_le16(type); 1803 req.dir_ordinal = cpu_to_le16(ordinal); 1804 req.dir_ext = cpu_to_le16(ext); 1805 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 1806 rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1807 if (rc == 0) { 1808 if (index) 1809 *index = le16_to_cpu(output->dir_idx); 1810 if (item_length) 1811 *item_length = le32_to_cpu(output->dir_item_length); 1812 if (data_length) 1813 *data_length = le32_to_cpu(output->dir_data_length); 1814 } 1815 return rc; 1816 } 1817 1818 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 1819 { 1820 char *retval = NULL; 1821 char *p; 1822 char *value; 1823 int field = 0; 1824 1825 if (datalen < 1) 1826 return NULL; 1827 /* null-terminate the log data (removing last '\n'): */ 1828 data[datalen - 1] = 0; 1829 for (p = data; *p != 0; p++) { 1830 field = 0; 1831 retval = NULL; 1832 while (*p != 0 && *p != '\n') { 1833 value = p; 1834 while (*p != 0 && *p != '\t' && *p != '\n') 1835 p++; 1836 if (field == desired_field) 1837 retval = value; 1838 if (*p != '\t') 1839 break; 1840 *p = 0; 1841 field++; 1842 p++; 1843 } 1844 if (*p == 0) 1845 break; 1846 *p = 0; 1847 } 1848 return retval; 1849 } 1850 1851 static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen) 1852 { 1853 u16 index = 0; 1854 u32 datalen; 1855 1856 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 1857 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 1858 &index, NULL, &datalen) != 0) 1859 return NULL; 1860 1861 memset(buf, 0, buflen); 1862 if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0) 1863 return NULL; 1864 1865 return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf, 1866 datalen); 1867 } 1868 1869 static int bnxt_get_eeprom(struct net_device *dev, 1870 struct ethtool_eeprom *eeprom, 1871 u8 *data) 1872 { 1873 u32 index; 1874 u32 offset; 1875 1876 if (eeprom->offset == 0) /* special offset value to get directory */ 1877 return bnxt_get_nvram_directory(dev, eeprom->len, data); 1878 1879 index = eeprom->offset >> 24; 1880 offset = eeprom->offset & 0xffffff; 1881 1882 if (index == 0) { 1883 netdev_err(dev, "unsupported index value: %d\n", index); 1884 return -EINVAL; 1885 } 1886 1887 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 1888 } 1889 1890 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 1891 { 1892 struct bnxt *bp = netdev_priv(dev); 1893 struct hwrm_nvm_erase_dir_entry_input req = {0}; 1894 1895 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1); 1896 req.dir_idx = cpu_to_le16(index); 1897 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 1898 } 1899 1900 static int bnxt_set_eeprom(struct net_device *dev, 1901 struct ethtool_eeprom *eeprom, 1902 u8 *data) 1903 { 1904 struct bnxt *bp = netdev_priv(dev); 1905 u8 index, dir_op; 1906 u16 type, ext, ordinal, attr; 1907 1908 if (!BNXT_PF(bp)) { 1909 netdev_err(dev, "NVM write not supported from a virtual function\n"); 1910 return -EINVAL; 1911 } 1912 1913 type = eeprom->magic >> 16; 1914 1915 if (type == 0xffff) { /* special value for directory operations */ 1916 index = eeprom->magic & 0xff; 1917 dir_op = eeprom->magic >> 8; 1918 if (index == 0) 1919 return -EINVAL; 1920 switch (dir_op) { 1921 case 0x0e: /* erase */ 1922 if (eeprom->offset != ~eeprom->magic) 1923 return -EINVAL; 1924 return bnxt_erase_nvram_directory(dev, index - 1); 1925 default: 1926 return -EINVAL; 1927 } 1928 } 1929 1930 /* Create or re-write an NVM item: */ 1931 if (bnxt_dir_type_is_executable(type) == true) 1932 return -EOPNOTSUPP; 1933 ext = eeprom->magic & 0xffff; 1934 ordinal = eeprom->offset >> 16; 1935 attr = eeprom->offset & 0xffff; 1936 1937 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data, 1938 eeprom->len); 1939 } 1940 1941 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1942 { 1943 struct bnxt *bp = netdev_priv(dev); 1944 struct ethtool_eee *eee = &bp->eee; 1945 struct bnxt_link_info *link_info = &bp->link_info; 1946 u32 advertising = 1947 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 1948 int rc = 0; 1949 1950 if (!BNXT_SINGLE_PF(bp)) 1951 return -EOPNOTSUPP; 1952 1953 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 1954 return -EOPNOTSUPP; 1955 1956 if (!edata->eee_enabled) 1957 goto eee_ok; 1958 1959 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 1960 netdev_warn(dev, "EEE requires autoneg\n"); 1961 return -EINVAL; 1962 } 1963 if (edata->tx_lpi_enabled) { 1964 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 1965 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 1966 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 1967 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 1968 return -EINVAL; 1969 } else if (!bp->lpi_tmr_hi) { 1970 edata->tx_lpi_timer = eee->tx_lpi_timer; 1971 } 1972 } 1973 if (!edata->advertised) { 1974 edata->advertised = advertising & eee->supported; 1975 } else if (edata->advertised & ~advertising) { 1976 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 1977 edata->advertised, advertising); 1978 return -EINVAL; 1979 } 1980 1981 eee->advertised = edata->advertised; 1982 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 1983 eee->tx_lpi_timer = edata->tx_lpi_timer; 1984 eee_ok: 1985 eee->eee_enabled = edata->eee_enabled; 1986 1987 if (netif_running(dev)) 1988 rc = bnxt_hwrm_set_link_setting(bp, false, true); 1989 1990 return rc; 1991 } 1992 1993 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1994 { 1995 struct bnxt *bp = netdev_priv(dev); 1996 1997 if (!(bp->flags & BNXT_FLAG_EEE_CAP)) 1998 return -EOPNOTSUPP; 1999 2000 *edata = bp->eee; 2001 if (!bp->eee.eee_enabled) { 2002 /* Preserve tx_lpi_timer so that the last value will be used 2003 * by default when it is re-enabled. 2004 */ 2005 edata->advertised = 0; 2006 edata->tx_lpi_enabled = 0; 2007 } 2008 2009 if (!bp->eee.eee_active) 2010 edata->lp_advertised = 0; 2011 2012 return 0; 2013 } 2014 2015 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 2016 u16 page_number, u16 start_addr, 2017 u16 data_length, u8 *buf) 2018 { 2019 struct hwrm_port_phy_i2c_read_input req = {0}; 2020 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; 2021 int rc, byte_offset = 0; 2022 2023 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); 2024 req.i2c_slave_addr = i2c_addr; 2025 req.page_number = cpu_to_le16(page_number); 2026 req.port_id = cpu_to_le16(bp->pf.port_id); 2027 do { 2028 u16 xfer_size; 2029 2030 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 2031 data_length -= xfer_size; 2032 req.page_offset = cpu_to_le16(start_addr + byte_offset); 2033 req.data_length = xfer_size; 2034 req.enables = cpu_to_le32(start_addr + byte_offset ? 2035 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); 2036 mutex_lock(&bp->hwrm_cmd_lock); 2037 rc = _hwrm_send_message(bp, &req, sizeof(req), 2038 HWRM_CMD_TIMEOUT); 2039 if (!rc) 2040 memcpy(buf + byte_offset, output->data, xfer_size); 2041 mutex_unlock(&bp->hwrm_cmd_lock); 2042 byte_offset += xfer_size; 2043 } while (!rc && data_length > 0); 2044 2045 return rc; 2046 } 2047 2048 static int bnxt_get_module_info(struct net_device *dev, 2049 struct ethtool_modinfo *modinfo) 2050 { 2051 struct bnxt *bp = netdev_priv(dev); 2052 struct hwrm_port_phy_i2c_read_input req = {0}; 2053 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; 2054 int rc; 2055 2056 /* No point in going further if phy status indicates 2057 * module is not inserted or if it is powered down or 2058 * if it is of type 10GBase-T 2059 */ 2060 if (bp->link_info.module_status > 2061 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 2062 return -EOPNOTSUPP; 2063 2064 /* This feature is not supported in older firmware versions */ 2065 if (bp->hwrm_spec_code < 0x10202) 2066 return -EOPNOTSUPP; 2067 2068 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); 2069 req.i2c_slave_addr = I2C_DEV_ADDR_A0; 2070 req.page_number = 0; 2071 req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR); 2072 req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE; 2073 req.port_id = cpu_to_le16(bp->pf.port_id); 2074 mutex_lock(&bp->hwrm_cmd_lock); 2075 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2076 if (!rc) { 2077 u32 module_id = le32_to_cpu(output->data[0]); 2078 2079 switch (module_id) { 2080 case SFF_MODULE_ID_SFP: 2081 modinfo->type = ETH_MODULE_SFF_8472; 2082 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 2083 break; 2084 case SFF_MODULE_ID_QSFP: 2085 case SFF_MODULE_ID_QSFP_PLUS: 2086 modinfo->type = ETH_MODULE_SFF_8436; 2087 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2088 break; 2089 case SFF_MODULE_ID_QSFP28: 2090 modinfo->type = ETH_MODULE_SFF_8636; 2091 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 2092 break; 2093 default: 2094 rc = -EOPNOTSUPP; 2095 break; 2096 } 2097 } 2098 mutex_unlock(&bp->hwrm_cmd_lock); 2099 return rc; 2100 } 2101 2102 static int bnxt_get_module_eeprom(struct net_device *dev, 2103 struct ethtool_eeprom *eeprom, 2104 u8 *data) 2105 { 2106 struct bnxt *bp = netdev_priv(dev); 2107 u16 start = eeprom->offset, length = eeprom->len; 2108 int rc = 0; 2109 2110 memset(data, 0, eeprom->len); 2111 2112 /* Read A0 portion of the EEPROM */ 2113 if (start < ETH_MODULE_SFF_8436_LEN) { 2114 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 2115 length = ETH_MODULE_SFF_8436_LEN - start; 2116 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 2117 start, length, data); 2118 if (rc) 2119 return rc; 2120 start += length; 2121 data += length; 2122 length = eeprom->len - length; 2123 } 2124 2125 /* Read A2 portion of the EEPROM */ 2126 if (length) { 2127 start -= ETH_MODULE_SFF_8436_LEN; 2128 bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start, 2129 length, data); 2130 } 2131 return rc; 2132 } 2133 2134 static int bnxt_nway_reset(struct net_device *dev) 2135 { 2136 int rc = 0; 2137 2138 struct bnxt *bp = netdev_priv(dev); 2139 struct bnxt_link_info *link_info = &bp->link_info; 2140 2141 if (!BNXT_SINGLE_PF(bp)) 2142 return -EOPNOTSUPP; 2143 2144 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 2145 return -EINVAL; 2146 2147 if (netif_running(dev)) 2148 rc = bnxt_hwrm_set_link_setting(bp, true, false); 2149 2150 return rc; 2151 } 2152 2153 static int bnxt_set_phys_id(struct net_device *dev, 2154 enum ethtool_phys_id_state state) 2155 { 2156 struct hwrm_port_led_cfg_input req = {0}; 2157 struct bnxt *bp = netdev_priv(dev); 2158 struct bnxt_pf_info *pf = &bp->pf; 2159 struct bnxt_led_cfg *led_cfg; 2160 u8 led_state; 2161 __le16 duration; 2162 int i, rc; 2163 2164 if (!bp->num_leds || BNXT_VF(bp)) 2165 return -EOPNOTSUPP; 2166 2167 if (state == ETHTOOL_ID_ACTIVE) { 2168 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 2169 duration = cpu_to_le16(500); 2170 } else if (state == ETHTOOL_ID_INACTIVE) { 2171 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 2172 duration = cpu_to_le16(0); 2173 } else { 2174 return -EINVAL; 2175 } 2176 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1); 2177 req.port_id = cpu_to_le16(pf->port_id); 2178 req.num_leds = bp->num_leds; 2179 led_cfg = (struct bnxt_led_cfg *)&req.led0_id; 2180 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 2181 req.enables |= BNXT_LED_DFLT_ENABLES(i); 2182 led_cfg->led_id = bp->leds[i].led_id; 2183 led_cfg->led_state = led_state; 2184 led_cfg->led_blink_on = duration; 2185 led_cfg->led_blink_off = duration; 2186 led_cfg->led_group_id = bp->leds[i].led_group_id; 2187 } 2188 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2189 if (rc) 2190 rc = -EIO; 2191 return rc; 2192 } 2193 2194 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 2195 { 2196 struct hwrm_selftest_irq_input req = {0}; 2197 2198 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1); 2199 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2200 } 2201 2202 static int bnxt_test_irq(struct bnxt *bp) 2203 { 2204 int i; 2205 2206 for (i = 0; i < bp->cp_nr_rings; i++) { 2207 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 2208 int rc; 2209 2210 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 2211 if (rc) 2212 return rc; 2213 } 2214 return 0; 2215 } 2216 2217 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 2218 { 2219 struct hwrm_port_mac_cfg_input req = {0}; 2220 2221 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1); 2222 2223 req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 2224 if (enable) 2225 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 2226 else 2227 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 2228 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2229 } 2230 2231 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 2232 struct hwrm_port_phy_cfg_input *req) 2233 { 2234 struct bnxt_link_info *link_info = &bp->link_info; 2235 u16 fw_advertising = link_info->advertising; 2236 u16 fw_speed; 2237 int rc; 2238 2239 if (!link_info->autoneg) 2240 return 0; 2241 2242 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 2243 if (netif_carrier_ok(bp->dev)) 2244 fw_speed = bp->link_info.link_speed; 2245 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 2246 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 2247 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 2248 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 2249 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 2250 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 2251 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 2252 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 2253 2254 req->force_link_speed = cpu_to_le16(fw_speed); 2255 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 2256 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2257 rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT); 2258 req->flags = 0; 2259 req->force_link_speed = cpu_to_le16(0); 2260 return rc; 2261 } 2262 2263 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable) 2264 { 2265 struct hwrm_port_phy_cfg_input req = {0}; 2266 2267 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1); 2268 2269 if (enable) { 2270 bnxt_disable_an_for_lpbk(bp, &req); 2271 req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 2272 } else { 2273 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 2274 } 2275 req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 2276 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2277 } 2278 2279 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi, 2280 u32 raw_cons, int pkt_size) 2281 { 2282 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 2283 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; 2284 struct bnxt_sw_rx_bd *rx_buf; 2285 struct rx_cmp *rxcmp; 2286 u16 cp_cons, cons; 2287 u8 *data; 2288 u32 len; 2289 int i; 2290 2291 cp_cons = RING_CMP(raw_cons); 2292 rxcmp = (struct rx_cmp *) 2293 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 2294 cons = rxcmp->rx_cmp_opaque; 2295 rx_buf = &rxr->rx_buf_ring[cons]; 2296 data = rx_buf->data_ptr; 2297 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 2298 if (len != pkt_size) 2299 return -EIO; 2300 i = ETH_ALEN; 2301 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 2302 return -EIO; 2303 i += ETH_ALEN; 2304 for ( ; i < pkt_size; i++) { 2305 if (data[i] != (u8)(i & 0xff)) 2306 return -EIO; 2307 } 2308 return 0; 2309 } 2310 2311 static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size) 2312 { 2313 struct bnxt_napi *bnapi = bp->bnapi[0]; 2314 struct bnxt_cp_ring_info *cpr; 2315 struct tx_cmp *txcmp; 2316 int rc = -EIO; 2317 u32 raw_cons; 2318 u32 cons; 2319 int i; 2320 2321 cpr = &bnapi->cp_ring; 2322 raw_cons = cpr->cp_raw_cons; 2323 for (i = 0; i < 200; i++) { 2324 cons = RING_CMP(raw_cons); 2325 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 2326 2327 if (!TX_CMP_VALID(txcmp, raw_cons)) { 2328 udelay(5); 2329 continue; 2330 } 2331 2332 /* The valid test of the entry must be done first before 2333 * reading any further. 2334 */ 2335 dma_rmb(); 2336 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 2337 rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size); 2338 raw_cons = NEXT_RAW_CMP(raw_cons); 2339 raw_cons = NEXT_RAW_CMP(raw_cons); 2340 break; 2341 } 2342 raw_cons = NEXT_RAW_CMP(raw_cons); 2343 } 2344 cpr->cp_raw_cons = raw_cons; 2345 return rc; 2346 } 2347 2348 static int bnxt_run_loopback(struct bnxt *bp) 2349 { 2350 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 2351 int pkt_size, i = 0; 2352 struct sk_buff *skb; 2353 dma_addr_t map; 2354 u8 *data; 2355 int rc; 2356 2357 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 2358 skb = netdev_alloc_skb(bp->dev, pkt_size); 2359 if (!skb) 2360 return -ENOMEM; 2361 data = skb_put(skb, pkt_size); 2362 eth_broadcast_addr(data); 2363 i += ETH_ALEN; 2364 ether_addr_copy(&data[i], bp->dev->dev_addr); 2365 i += ETH_ALEN; 2366 for ( ; i < pkt_size; i++) 2367 data[i] = (u8)(i & 0xff); 2368 2369 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 2370 PCI_DMA_TODEVICE); 2371 if (dma_mapping_error(&bp->pdev->dev, map)) { 2372 dev_kfree_skb(skb); 2373 return -EIO; 2374 } 2375 bnxt_xmit_xdp(bp, txr, map, pkt_size, 0); 2376 2377 /* Sync BD data before updating doorbell */ 2378 wmb(); 2379 2380 bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod); 2381 rc = bnxt_poll_loopback(bp, pkt_size); 2382 2383 dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE); 2384 dev_kfree_skb(skb); 2385 return rc; 2386 } 2387 2388 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 2389 { 2390 struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr; 2391 struct hwrm_selftest_exec_input req = {0}; 2392 int rc; 2393 2394 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1); 2395 mutex_lock(&bp->hwrm_cmd_lock); 2396 resp->test_success = 0; 2397 req.flags = test_mask; 2398 rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout); 2399 *test_results = resp->test_success; 2400 mutex_unlock(&bp->hwrm_cmd_lock); 2401 return rc; 2402 } 2403 2404 #define BNXT_DRV_TESTS 3 2405 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 2406 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 2407 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 2408 2409 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 2410 u64 *buf) 2411 { 2412 struct bnxt *bp = netdev_priv(dev); 2413 bool offline = false; 2414 u8 test_results = 0; 2415 u8 test_mask = 0; 2416 int rc, i; 2417 2418 if (!bp->num_tests || !BNXT_SINGLE_PF(bp)) 2419 return; 2420 memset(buf, 0, sizeof(u64) * bp->num_tests); 2421 if (!netif_running(dev)) { 2422 etest->flags |= ETH_TEST_FL_FAILED; 2423 return; 2424 } 2425 2426 if (etest->flags & ETH_TEST_FL_OFFLINE) { 2427 if (bp->pf.active_vfs) { 2428 etest->flags |= ETH_TEST_FL_FAILED; 2429 netdev_warn(dev, "Offline tests cannot be run with active VFs\n"); 2430 return; 2431 } 2432 offline = true; 2433 } 2434 2435 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2436 u8 bit_val = 1 << i; 2437 2438 if (!(bp->test_info->offline_mask & bit_val)) 2439 test_mask |= bit_val; 2440 else if (offline) 2441 test_mask |= bit_val; 2442 } 2443 if (!offline) { 2444 bnxt_run_fw_tests(bp, test_mask, &test_results); 2445 } else { 2446 rc = bnxt_close_nic(bp, false, false); 2447 if (rc) 2448 return; 2449 bnxt_run_fw_tests(bp, test_mask, &test_results); 2450 2451 buf[BNXT_MACLPBK_TEST_IDX] = 1; 2452 bnxt_hwrm_mac_loopback(bp, true); 2453 msleep(250); 2454 rc = bnxt_half_open_nic(bp); 2455 if (rc) { 2456 bnxt_hwrm_mac_loopback(bp, false); 2457 etest->flags |= ETH_TEST_FL_FAILED; 2458 return; 2459 } 2460 if (bnxt_run_loopback(bp)) 2461 etest->flags |= ETH_TEST_FL_FAILED; 2462 else 2463 buf[BNXT_MACLPBK_TEST_IDX] = 0; 2464 2465 bnxt_hwrm_mac_loopback(bp, false); 2466 bnxt_hwrm_phy_loopback(bp, true); 2467 msleep(1000); 2468 if (bnxt_run_loopback(bp)) { 2469 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 2470 etest->flags |= ETH_TEST_FL_FAILED; 2471 } 2472 bnxt_hwrm_phy_loopback(bp, false); 2473 bnxt_half_close_nic(bp); 2474 bnxt_open_nic(bp, false, true); 2475 } 2476 if (bnxt_test_irq(bp)) { 2477 buf[BNXT_IRQ_TEST_IDX] = 1; 2478 etest->flags |= ETH_TEST_FL_FAILED; 2479 } 2480 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 2481 u8 bit_val = 1 << i; 2482 2483 if ((test_mask & bit_val) && !(test_results & bit_val)) { 2484 buf[i] = 1; 2485 etest->flags |= ETH_TEST_FL_FAILED; 2486 } 2487 } 2488 } 2489 2490 void bnxt_ethtool_init(struct bnxt *bp) 2491 { 2492 struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr; 2493 struct hwrm_selftest_qlist_input req = {0}; 2494 struct bnxt_test_info *test_info; 2495 int i, rc; 2496 2497 if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp)) 2498 return; 2499 2500 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1); 2501 mutex_lock(&bp->hwrm_cmd_lock); 2502 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); 2503 if (rc) 2504 goto ethtool_init_exit; 2505 2506 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 2507 if (!test_info) 2508 goto ethtool_init_exit; 2509 2510 bp->test_info = test_info; 2511 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 2512 if (bp->num_tests > BNXT_MAX_TEST) 2513 bp->num_tests = BNXT_MAX_TEST; 2514 2515 test_info->offline_mask = resp->offline_tests; 2516 test_info->timeout = le16_to_cpu(resp->test_timeout); 2517 if (!test_info->timeout) 2518 test_info->timeout = HWRM_CMD_TIMEOUT; 2519 for (i = 0; i < bp->num_tests; i++) { 2520 char *str = test_info->string[i]; 2521 char *fw_str = resp->test0_name + i * 32; 2522 2523 if (i == BNXT_MACLPBK_TEST_IDX) { 2524 strcpy(str, "Mac loopback test (offline)"); 2525 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 2526 strcpy(str, "Phy loopback test (offline)"); 2527 } else if (i == BNXT_IRQ_TEST_IDX) { 2528 strcpy(str, "Interrupt_test (offline)"); 2529 } else { 2530 strlcpy(str, fw_str, ETH_GSTRING_LEN); 2531 strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); 2532 if (test_info->offline_mask & (1 << i)) 2533 strncat(str, " (offline)", 2534 ETH_GSTRING_LEN - strlen(str)); 2535 else 2536 strncat(str, " (online)", 2537 ETH_GSTRING_LEN - strlen(str)); 2538 } 2539 } 2540 2541 ethtool_init_exit: 2542 mutex_unlock(&bp->hwrm_cmd_lock); 2543 } 2544 2545 void bnxt_ethtool_free(struct bnxt *bp) 2546 { 2547 kfree(bp->test_info); 2548 bp->test_info = NULL; 2549 } 2550 2551 const struct ethtool_ops bnxt_ethtool_ops = { 2552 .get_link_ksettings = bnxt_get_link_ksettings, 2553 .set_link_ksettings = bnxt_set_link_ksettings, 2554 .get_pauseparam = bnxt_get_pauseparam, 2555 .set_pauseparam = bnxt_set_pauseparam, 2556 .get_drvinfo = bnxt_get_drvinfo, 2557 .get_wol = bnxt_get_wol, 2558 .set_wol = bnxt_set_wol, 2559 .get_coalesce = bnxt_get_coalesce, 2560 .set_coalesce = bnxt_set_coalesce, 2561 .get_msglevel = bnxt_get_msglevel, 2562 .set_msglevel = bnxt_set_msglevel, 2563 .get_sset_count = bnxt_get_sset_count, 2564 .get_strings = bnxt_get_strings, 2565 .get_ethtool_stats = bnxt_get_ethtool_stats, 2566 .set_ringparam = bnxt_set_ringparam, 2567 .get_ringparam = bnxt_get_ringparam, 2568 .get_channels = bnxt_get_channels, 2569 .set_channels = bnxt_set_channels, 2570 .get_rxnfc = bnxt_get_rxnfc, 2571 .set_rxnfc = bnxt_set_rxnfc, 2572 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 2573 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 2574 .get_rxfh = bnxt_get_rxfh, 2575 .flash_device = bnxt_flash_device, 2576 .get_eeprom_len = bnxt_get_eeprom_len, 2577 .get_eeprom = bnxt_get_eeprom, 2578 .set_eeprom = bnxt_set_eeprom, 2579 .get_link = bnxt_get_link, 2580 .get_eee = bnxt_get_eee, 2581 .set_eee = bnxt_set_eee, 2582 .get_module_info = bnxt_get_module_info, 2583 .get_module_eeprom = bnxt_get_module_eeprom, 2584 .nway_reset = bnxt_nway_reset, 2585 .set_phys_id = bnxt_set_phys_id, 2586 .self_test = bnxt_self_test, 2587 }; 2588