1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/linkmode.h> 15 #include <linux/interrupt.h> 16 #include <linux/pci.h> 17 #include <linux/etherdevice.h> 18 #include <linux/crc32.h> 19 #include <linux/firmware.h> 20 #include <linux/utsname.h> 21 #include <linux/time.h> 22 #include <linux/ptp_clock_kernel.h> 23 #include <linux/net_tstamp.h> 24 #include <linux/timecounter.h> 25 #include "bnxt_hsi.h" 26 #include "bnxt.h" 27 #include "bnxt_hwrm.h" 28 #include "bnxt_xdp.h" 29 #include "bnxt_ptp.h" 30 #include "bnxt_ethtool.h" 31 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 32 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 33 #include "bnxt_coredump.h" 34 35 static u32 bnxt_get_msglevel(struct net_device *dev) 36 { 37 struct bnxt *bp = netdev_priv(dev); 38 39 return bp->msg_enable; 40 } 41 42 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 43 { 44 struct bnxt *bp = netdev_priv(dev); 45 46 bp->msg_enable = value; 47 } 48 49 static int bnxt_get_coalesce(struct net_device *dev, 50 struct ethtool_coalesce *coal, 51 struct kernel_ethtool_coalesce *kernel_coal, 52 struct netlink_ext_ack *extack) 53 { 54 struct bnxt *bp = netdev_priv(dev); 55 struct bnxt_coal *hw_coal; 56 u16 mult; 57 58 memset(coal, 0, sizeof(*coal)); 59 60 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; 61 62 hw_coal = &bp->rx_coal; 63 mult = hw_coal->bufs_per_record; 64 coal->rx_coalesce_usecs = hw_coal->coal_ticks; 65 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; 66 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 67 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 68 if (hw_coal->flags & 69 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 70 kernel_coal->use_cqe_mode_rx = true; 71 72 hw_coal = &bp->tx_coal; 73 mult = hw_coal->bufs_per_record; 74 coal->tx_coalesce_usecs = hw_coal->coal_ticks; 75 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult; 76 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 77 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 78 if (hw_coal->flags & 79 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 80 kernel_coal->use_cqe_mode_tx = true; 81 82 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 83 84 return 0; 85 } 86 87 static int bnxt_set_coalesce(struct net_device *dev, 88 struct ethtool_coalesce *coal, 89 struct kernel_ethtool_coalesce *kernel_coal, 90 struct netlink_ext_ack *extack) 91 { 92 struct bnxt *bp = netdev_priv(dev); 93 bool update_stats = false; 94 struct bnxt_coal *hw_coal; 95 int rc = 0; 96 u16 mult; 97 98 if (coal->use_adaptive_rx_coalesce) { 99 bp->flags |= BNXT_FLAG_DIM; 100 } else { 101 if (bp->flags & BNXT_FLAG_DIM) { 102 bp->flags &= ~(BNXT_FLAG_DIM); 103 goto reset_coalesce; 104 } 105 } 106 107 if ((kernel_coal->use_cqe_mode_rx || kernel_coal->use_cqe_mode_tx) && 108 !(bp->coal_cap.cmpl_params & 109 RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_TIMER_RESET)) 110 return -EOPNOTSUPP; 111 112 hw_coal = &bp->rx_coal; 113 mult = hw_coal->bufs_per_record; 114 hw_coal->coal_ticks = coal->rx_coalesce_usecs; 115 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult; 116 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq; 117 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult; 118 hw_coal->flags &= 119 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 120 if (kernel_coal->use_cqe_mode_rx) 121 hw_coal->flags |= 122 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 123 124 hw_coal = &bp->tx_coal; 125 mult = hw_coal->bufs_per_record; 126 hw_coal->coal_ticks = coal->tx_coalesce_usecs; 127 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult; 128 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq; 129 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult; 130 hw_coal->flags &= 131 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 132 if (kernel_coal->use_cqe_mode_tx) 133 hw_coal->flags |= 134 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 135 136 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 137 u32 stats_ticks = coal->stats_block_coalesce_usecs; 138 139 /* Allow 0, which means disable. */ 140 if (stats_ticks) 141 stats_ticks = clamp_t(u32, stats_ticks, 142 BNXT_MIN_STATS_COAL_TICKS, 143 BNXT_MAX_STATS_COAL_TICKS); 144 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 145 bp->stats_coal_ticks = stats_ticks; 146 if (bp->stats_coal_ticks) 147 bp->current_interval = 148 bp->stats_coal_ticks * HZ / 1000000; 149 else 150 bp->current_interval = BNXT_TIMER_INTERVAL; 151 update_stats = true; 152 } 153 154 reset_coalesce: 155 if (netif_running(dev)) { 156 if (update_stats) { 157 rc = bnxt_close_nic(bp, true, false); 158 if (!rc) 159 rc = bnxt_open_nic(bp, true, false); 160 } else { 161 rc = bnxt_hwrm_set_coal(bp); 162 } 163 } 164 165 return rc; 166 } 167 168 static const char * const bnxt_ring_rx_stats_str[] = { 169 "rx_ucast_packets", 170 "rx_mcast_packets", 171 "rx_bcast_packets", 172 "rx_discards", 173 "rx_errors", 174 "rx_ucast_bytes", 175 "rx_mcast_bytes", 176 "rx_bcast_bytes", 177 }; 178 179 static const char * const bnxt_ring_tx_stats_str[] = { 180 "tx_ucast_packets", 181 "tx_mcast_packets", 182 "tx_bcast_packets", 183 "tx_errors", 184 "tx_discards", 185 "tx_ucast_bytes", 186 "tx_mcast_bytes", 187 "tx_bcast_bytes", 188 }; 189 190 static const char * const bnxt_ring_tpa_stats_str[] = { 191 "tpa_packets", 192 "tpa_bytes", 193 "tpa_events", 194 "tpa_aborts", 195 }; 196 197 static const char * const bnxt_ring_tpa2_stats_str[] = { 198 "rx_tpa_eligible_pkt", 199 "rx_tpa_eligible_bytes", 200 "rx_tpa_pkt", 201 "rx_tpa_bytes", 202 "rx_tpa_errors", 203 "rx_tpa_events", 204 }; 205 206 static const char * const bnxt_rx_sw_stats_str[] = { 207 "rx_l4_csum_errors", 208 "rx_resets", 209 "rx_buf_errors", 210 }; 211 212 static const char * const bnxt_cmn_sw_stats_str[] = { 213 "missed_irqs", 214 }; 215 216 #define BNXT_RX_STATS_ENTRY(counter) \ 217 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 218 219 #define BNXT_TX_STATS_ENTRY(counter) \ 220 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 221 222 #define BNXT_RX_STATS_EXT_ENTRY(counter) \ 223 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) } 224 225 #define BNXT_TX_STATS_EXT_ENTRY(counter) \ 226 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) } 227 228 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \ 229 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \ 230 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions) 231 232 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \ 233 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \ 234 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions) 235 236 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \ 237 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \ 238 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \ 239 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \ 240 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \ 241 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \ 242 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \ 243 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \ 244 BNXT_RX_STATS_EXT_PFC_ENTRY(7) 245 246 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \ 247 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \ 248 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \ 249 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \ 250 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \ 251 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \ 252 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \ 253 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \ 254 BNXT_TX_STATS_EXT_PFC_ENTRY(7) 255 256 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \ 257 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \ 258 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n) 259 260 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \ 261 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \ 262 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n) 263 264 #define BNXT_RX_STATS_EXT_COS_ENTRIES \ 265 BNXT_RX_STATS_EXT_COS_ENTRY(0), \ 266 BNXT_RX_STATS_EXT_COS_ENTRY(1), \ 267 BNXT_RX_STATS_EXT_COS_ENTRY(2), \ 268 BNXT_RX_STATS_EXT_COS_ENTRY(3), \ 269 BNXT_RX_STATS_EXT_COS_ENTRY(4), \ 270 BNXT_RX_STATS_EXT_COS_ENTRY(5), \ 271 BNXT_RX_STATS_EXT_COS_ENTRY(6), \ 272 BNXT_RX_STATS_EXT_COS_ENTRY(7) \ 273 274 #define BNXT_TX_STATS_EXT_COS_ENTRIES \ 275 BNXT_TX_STATS_EXT_COS_ENTRY(0), \ 276 BNXT_TX_STATS_EXT_COS_ENTRY(1), \ 277 BNXT_TX_STATS_EXT_COS_ENTRY(2), \ 278 BNXT_TX_STATS_EXT_COS_ENTRY(3), \ 279 BNXT_TX_STATS_EXT_COS_ENTRY(4), \ 280 BNXT_TX_STATS_EXT_COS_ENTRY(5), \ 281 BNXT_TX_STATS_EXT_COS_ENTRY(6), \ 282 BNXT_TX_STATS_EXT_COS_ENTRY(7) \ 283 284 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \ 285 BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \ 286 BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n) 287 288 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \ 289 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \ 290 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \ 291 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \ 292 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \ 293 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \ 294 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \ 295 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \ 296 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7) 297 298 #define BNXT_RX_STATS_PRI_ENTRY(counter, n) \ 299 { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \ 300 __stringify(counter##_pri##n) } 301 302 #define BNXT_TX_STATS_PRI_ENTRY(counter, n) \ 303 { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \ 304 __stringify(counter##_pri##n) } 305 306 #define BNXT_RX_STATS_PRI_ENTRIES(counter) \ 307 BNXT_RX_STATS_PRI_ENTRY(counter, 0), \ 308 BNXT_RX_STATS_PRI_ENTRY(counter, 1), \ 309 BNXT_RX_STATS_PRI_ENTRY(counter, 2), \ 310 BNXT_RX_STATS_PRI_ENTRY(counter, 3), \ 311 BNXT_RX_STATS_PRI_ENTRY(counter, 4), \ 312 BNXT_RX_STATS_PRI_ENTRY(counter, 5), \ 313 BNXT_RX_STATS_PRI_ENTRY(counter, 6), \ 314 BNXT_RX_STATS_PRI_ENTRY(counter, 7) 315 316 #define BNXT_TX_STATS_PRI_ENTRIES(counter) \ 317 BNXT_TX_STATS_PRI_ENTRY(counter, 0), \ 318 BNXT_TX_STATS_PRI_ENTRY(counter, 1), \ 319 BNXT_TX_STATS_PRI_ENTRY(counter, 2), \ 320 BNXT_TX_STATS_PRI_ENTRY(counter, 3), \ 321 BNXT_TX_STATS_PRI_ENTRY(counter, 4), \ 322 BNXT_TX_STATS_PRI_ENTRY(counter, 5), \ 323 BNXT_TX_STATS_PRI_ENTRY(counter, 6), \ 324 BNXT_TX_STATS_PRI_ENTRY(counter, 7) 325 326 enum { 327 RX_TOTAL_DISCARDS, 328 TX_TOTAL_DISCARDS, 329 RX_NETPOLL_DISCARDS, 330 }; 331 332 static struct { 333 u64 counter; 334 char string[ETH_GSTRING_LEN]; 335 } bnxt_sw_func_stats[] = { 336 {0, "rx_total_discard_pkts"}, 337 {0, "tx_total_discard_pkts"}, 338 {0, "rx_total_netpoll_discards"}, 339 }; 340 341 #define NUM_RING_RX_SW_STATS ARRAY_SIZE(bnxt_rx_sw_stats_str) 342 #define NUM_RING_CMN_SW_STATS ARRAY_SIZE(bnxt_cmn_sw_stats_str) 343 #define NUM_RING_RX_HW_STATS ARRAY_SIZE(bnxt_ring_rx_stats_str) 344 #define NUM_RING_TX_HW_STATS ARRAY_SIZE(bnxt_ring_tx_stats_str) 345 346 static const struct { 347 long offset; 348 char string[ETH_GSTRING_LEN]; 349 } bnxt_port_stats_arr[] = { 350 BNXT_RX_STATS_ENTRY(rx_64b_frames), 351 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 352 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 353 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 354 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 355 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames), 356 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 357 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 358 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 359 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 360 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 361 BNXT_RX_STATS_ENTRY(rx_total_frames), 362 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 363 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 364 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 365 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 366 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 367 BNXT_RX_STATS_ENTRY(rx_pause_frames), 368 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 369 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 370 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 371 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 372 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 373 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 374 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 375 BNXT_RX_STATS_ENTRY(rx_good_frames), 376 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 377 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 378 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 379 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 380 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 381 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 382 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 383 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 384 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 385 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 386 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 387 BNXT_RX_STATS_ENTRY(rx_bytes), 388 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 389 BNXT_RX_STATS_ENTRY(rx_runt_frames), 390 BNXT_RX_STATS_ENTRY(rx_stat_discard), 391 BNXT_RX_STATS_ENTRY(rx_stat_err), 392 393 BNXT_TX_STATS_ENTRY(tx_64b_frames), 394 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 395 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 396 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 397 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 398 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames), 399 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 400 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames), 401 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 402 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 403 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 404 BNXT_TX_STATS_ENTRY(tx_good_frames), 405 BNXT_TX_STATS_ENTRY(tx_total_frames), 406 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 407 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 408 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 409 BNXT_TX_STATS_ENTRY(tx_pause_frames), 410 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 411 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 412 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 413 BNXT_TX_STATS_ENTRY(tx_err), 414 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 415 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 416 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 417 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 418 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 419 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 420 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 421 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 422 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 423 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 424 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 425 BNXT_TX_STATS_ENTRY(tx_total_collisions), 426 BNXT_TX_STATS_ENTRY(tx_bytes), 427 BNXT_TX_STATS_ENTRY(tx_xthol_frames), 428 BNXT_TX_STATS_ENTRY(tx_stat_discard), 429 BNXT_TX_STATS_ENTRY(tx_stat_error), 430 }; 431 432 static const struct { 433 long offset; 434 char string[ETH_GSTRING_LEN]; 435 } bnxt_port_stats_ext_arr[] = { 436 BNXT_RX_STATS_EXT_ENTRY(link_down_events), 437 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events), 438 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events), 439 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events), 440 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events), 441 BNXT_RX_STATS_EXT_COS_ENTRIES, 442 BNXT_RX_STATS_EXT_PFC_ENTRIES, 443 BNXT_RX_STATS_EXT_ENTRY(rx_bits), 444 BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold), 445 BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err), 446 BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits), 447 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES, 448 BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks), 449 BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks), 450 }; 451 452 static const struct { 453 long offset; 454 char string[ETH_GSTRING_LEN]; 455 } bnxt_tx_port_stats_ext_arr[] = { 456 BNXT_TX_STATS_EXT_COS_ENTRIES, 457 BNXT_TX_STATS_EXT_PFC_ENTRIES, 458 }; 459 460 static const struct { 461 long base_off; 462 char string[ETH_GSTRING_LEN]; 463 } bnxt_rx_bytes_pri_arr[] = { 464 BNXT_RX_STATS_PRI_ENTRIES(rx_bytes), 465 }; 466 467 static const struct { 468 long base_off; 469 char string[ETH_GSTRING_LEN]; 470 } bnxt_rx_pkts_pri_arr[] = { 471 BNXT_RX_STATS_PRI_ENTRIES(rx_packets), 472 }; 473 474 static const struct { 475 long base_off; 476 char string[ETH_GSTRING_LEN]; 477 } bnxt_tx_bytes_pri_arr[] = { 478 BNXT_TX_STATS_PRI_ENTRIES(tx_bytes), 479 }; 480 481 static const struct { 482 long base_off; 483 char string[ETH_GSTRING_LEN]; 484 } bnxt_tx_pkts_pri_arr[] = { 485 BNXT_TX_STATS_PRI_ENTRIES(tx_packets), 486 }; 487 488 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats) 489 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 490 #define BNXT_NUM_STATS_PRI \ 491 (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \ 492 ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \ 493 ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \ 494 ARRAY_SIZE(bnxt_tx_pkts_pri_arr)) 495 496 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp) 497 { 498 if (BNXT_SUPPORTS_TPA(bp)) { 499 if (bp->max_tpa_v2) { 500 if (BNXT_CHIP_P5_THOR(bp)) 501 return BNXT_NUM_TPA_RING_STATS_P5; 502 return BNXT_NUM_TPA_RING_STATS_P5_SR2; 503 } 504 return BNXT_NUM_TPA_RING_STATS; 505 } 506 return 0; 507 } 508 509 static int bnxt_get_num_ring_stats(struct bnxt *bp) 510 { 511 int rx, tx, cmn; 512 513 rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS + 514 bnxt_get_num_tpa_ring_stats(bp); 515 tx = NUM_RING_TX_HW_STATS; 516 cmn = NUM_RING_CMN_SW_STATS; 517 return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings + 518 cmn * bp->cp_nr_rings; 519 } 520 521 static int bnxt_get_num_stats(struct bnxt *bp) 522 { 523 int num_stats = bnxt_get_num_ring_stats(bp); 524 525 num_stats += BNXT_NUM_SW_FUNC_STATS; 526 527 if (bp->flags & BNXT_FLAG_PORT_STATS) 528 num_stats += BNXT_NUM_PORT_STATS; 529 530 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 531 num_stats += bp->fw_rx_stats_ext_size + 532 bp->fw_tx_stats_ext_size; 533 if (bp->pri2cos_valid) 534 num_stats += BNXT_NUM_STATS_PRI; 535 } 536 537 return num_stats; 538 } 539 540 static int bnxt_get_sset_count(struct net_device *dev, int sset) 541 { 542 struct bnxt *bp = netdev_priv(dev); 543 544 switch (sset) { 545 case ETH_SS_STATS: 546 return bnxt_get_num_stats(bp); 547 case ETH_SS_TEST: 548 if (!bp->num_tests) 549 return -EOPNOTSUPP; 550 return bp->num_tests; 551 default: 552 return -EOPNOTSUPP; 553 } 554 } 555 556 static bool is_rx_ring(struct bnxt *bp, int ring_num) 557 { 558 return ring_num < bp->rx_nr_rings; 559 } 560 561 static bool is_tx_ring(struct bnxt *bp, int ring_num) 562 { 563 int tx_base = 0; 564 565 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS)) 566 tx_base = bp->rx_nr_rings; 567 568 if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings)) 569 return true; 570 return false; 571 } 572 573 static void bnxt_get_ethtool_stats(struct net_device *dev, 574 struct ethtool_stats *stats, u64 *buf) 575 { 576 u32 i, j = 0; 577 struct bnxt *bp = netdev_priv(dev); 578 u32 tpa_stats; 579 580 if (!bp->bnapi) { 581 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS; 582 goto skip_ring_stats; 583 } 584 585 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) 586 bnxt_sw_func_stats[i].counter = 0; 587 588 tpa_stats = bnxt_get_num_tpa_ring_stats(bp); 589 for (i = 0; i < bp->cp_nr_rings; i++) { 590 struct bnxt_napi *bnapi = bp->bnapi[i]; 591 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 592 u64 *sw_stats = cpr->stats.sw_stats; 593 u64 *sw; 594 int k; 595 596 if (is_rx_ring(bp, i)) { 597 for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++) 598 buf[j] = sw_stats[k]; 599 } 600 if (is_tx_ring(bp, i)) { 601 k = NUM_RING_RX_HW_STATS; 602 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 603 j++, k++) 604 buf[j] = sw_stats[k]; 605 } 606 if (!tpa_stats || !is_rx_ring(bp, i)) 607 goto skip_tpa_ring_stats; 608 609 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 610 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS + 611 tpa_stats; j++, k++) 612 buf[j] = sw_stats[k]; 613 614 skip_tpa_ring_stats: 615 sw = (u64 *)&cpr->sw_stats.rx; 616 if (is_rx_ring(bp, i)) { 617 for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++) 618 buf[j] = sw[k]; 619 } 620 621 sw = (u64 *)&cpr->sw_stats.cmn; 622 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++) 623 buf[j] = sw[k]; 624 625 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter += 626 BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts); 627 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter += 628 BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts); 629 bnxt_sw_func_stats[RX_NETPOLL_DISCARDS].counter += 630 cpr->sw_stats.rx.rx_netpoll_discards; 631 } 632 633 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++) 634 buf[j] = bnxt_sw_func_stats[i].counter; 635 636 skip_ring_stats: 637 if (bp->flags & BNXT_FLAG_PORT_STATS) { 638 u64 *port_stats = bp->port_stats.sw_stats; 639 640 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) 641 buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset); 642 } 643 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 644 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats; 645 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats; 646 647 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) { 648 buf[j] = *(rx_port_stats_ext + 649 bnxt_port_stats_ext_arr[i].offset); 650 } 651 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) { 652 buf[j] = *(tx_port_stats_ext + 653 bnxt_tx_port_stats_ext_arr[i].offset); 654 } 655 if (bp->pri2cos_valid) { 656 for (i = 0; i < 8; i++, j++) { 657 long n = bnxt_rx_bytes_pri_arr[i].base_off + 658 bp->pri2cos_idx[i]; 659 660 buf[j] = *(rx_port_stats_ext + n); 661 } 662 for (i = 0; i < 8; i++, j++) { 663 long n = bnxt_rx_pkts_pri_arr[i].base_off + 664 bp->pri2cos_idx[i]; 665 666 buf[j] = *(rx_port_stats_ext + n); 667 } 668 for (i = 0; i < 8; i++, j++) { 669 long n = bnxt_tx_bytes_pri_arr[i].base_off + 670 bp->pri2cos_idx[i]; 671 672 buf[j] = *(tx_port_stats_ext + n); 673 } 674 for (i = 0; i < 8; i++, j++) { 675 long n = bnxt_tx_pkts_pri_arr[i].base_off + 676 bp->pri2cos_idx[i]; 677 678 buf[j] = *(tx_port_stats_ext + n); 679 } 680 } 681 } 682 } 683 684 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 685 { 686 struct bnxt *bp = netdev_priv(dev); 687 static const char * const *str; 688 u32 i, j, num_str; 689 690 switch (stringset) { 691 case ETH_SS_STATS: 692 for (i = 0; i < bp->cp_nr_rings; i++) { 693 if (is_rx_ring(bp, i)) { 694 num_str = NUM_RING_RX_HW_STATS; 695 for (j = 0; j < num_str; j++) { 696 sprintf(buf, "[%d]: %s", i, 697 bnxt_ring_rx_stats_str[j]); 698 buf += ETH_GSTRING_LEN; 699 } 700 } 701 if (is_tx_ring(bp, i)) { 702 num_str = NUM_RING_TX_HW_STATS; 703 for (j = 0; j < num_str; j++) { 704 sprintf(buf, "[%d]: %s", i, 705 bnxt_ring_tx_stats_str[j]); 706 buf += ETH_GSTRING_LEN; 707 } 708 } 709 num_str = bnxt_get_num_tpa_ring_stats(bp); 710 if (!num_str || !is_rx_ring(bp, i)) 711 goto skip_tpa_stats; 712 713 if (bp->max_tpa_v2) 714 str = bnxt_ring_tpa2_stats_str; 715 else 716 str = bnxt_ring_tpa_stats_str; 717 718 for (j = 0; j < num_str; j++) { 719 sprintf(buf, "[%d]: %s", i, str[j]); 720 buf += ETH_GSTRING_LEN; 721 } 722 skip_tpa_stats: 723 if (is_rx_ring(bp, i)) { 724 num_str = NUM_RING_RX_SW_STATS; 725 for (j = 0; j < num_str; j++) { 726 sprintf(buf, "[%d]: %s", i, 727 bnxt_rx_sw_stats_str[j]); 728 buf += ETH_GSTRING_LEN; 729 } 730 } 731 num_str = NUM_RING_CMN_SW_STATS; 732 for (j = 0; j < num_str; j++) { 733 sprintf(buf, "[%d]: %s", i, 734 bnxt_cmn_sw_stats_str[j]); 735 buf += ETH_GSTRING_LEN; 736 } 737 } 738 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) { 739 strcpy(buf, bnxt_sw_func_stats[i].string); 740 buf += ETH_GSTRING_LEN; 741 } 742 743 if (bp->flags & BNXT_FLAG_PORT_STATS) { 744 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 745 strcpy(buf, bnxt_port_stats_arr[i].string); 746 buf += ETH_GSTRING_LEN; 747 } 748 } 749 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 750 for (i = 0; i < bp->fw_rx_stats_ext_size; i++) { 751 strcpy(buf, bnxt_port_stats_ext_arr[i].string); 752 buf += ETH_GSTRING_LEN; 753 } 754 for (i = 0; i < bp->fw_tx_stats_ext_size; i++) { 755 strcpy(buf, 756 bnxt_tx_port_stats_ext_arr[i].string); 757 buf += ETH_GSTRING_LEN; 758 } 759 if (bp->pri2cos_valid) { 760 for (i = 0; i < 8; i++) { 761 strcpy(buf, 762 bnxt_rx_bytes_pri_arr[i].string); 763 buf += ETH_GSTRING_LEN; 764 } 765 for (i = 0; i < 8; i++) { 766 strcpy(buf, 767 bnxt_rx_pkts_pri_arr[i].string); 768 buf += ETH_GSTRING_LEN; 769 } 770 for (i = 0; i < 8; i++) { 771 strcpy(buf, 772 bnxt_tx_bytes_pri_arr[i].string); 773 buf += ETH_GSTRING_LEN; 774 } 775 for (i = 0; i < 8; i++) { 776 strcpy(buf, 777 bnxt_tx_pkts_pri_arr[i].string); 778 buf += ETH_GSTRING_LEN; 779 } 780 } 781 } 782 break; 783 case ETH_SS_TEST: 784 if (bp->num_tests) 785 memcpy(buf, bp->test_info->string, 786 bp->num_tests * ETH_GSTRING_LEN); 787 break; 788 default: 789 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 790 stringset); 791 break; 792 } 793 } 794 795 static void bnxt_get_ringparam(struct net_device *dev, 796 struct ethtool_ringparam *ering, 797 struct kernel_ethtool_ringparam *kernel_ering, 798 struct netlink_ext_ack *extack) 799 { 800 struct bnxt *bp = netdev_priv(dev); 801 802 if (bp->flags & BNXT_FLAG_AGG_RINGS) { 803 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT_JUM_ENA; 804 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 805 } else { 806 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 807 ering->rx_jumbo_max_pending = 0; 808 } 809 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 810 811 ering->rx_pending = bp->rx_ring_size; 812 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 813 ering->tx_pending = bp->tx_ring_size; 814 } 815 816 static int bnxt_set_ringparam(struct net_device *dev, 817 struct ethtool_ringparam *ering, 818 struct kernel_ethtool_ringparam *kernel_ering, 819 struct netlink_ext_ack *extack) 820 { 821 struct bnxt *bp = netdev_priv(dev); 822 823 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 824 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 825 (ering->tx_pending < BNXT_MIN_TX_DESC_CNT)) 826 return -EINVAL; 827 828 if (netif_running(dev)) 829 bnxt_close_nic(bp, false, false); 830 831 bp->rx_ring_size = ering->rx_pending; 832 bp->tx_ring_size = ering->tx_pending; 833 bnxt_set_ring_params(bp); 834 835 if (netif_running(dev)) 836 return bnxt_open_nic(bp, false, false); 837 838 return 0; 839 } 840 841 static void bnxt_get_channels(struct net_device *dev, 842 struct ethtool_channels *channel) 843 { 844 struct bnxt *bp = netdev_priv(dev); 845 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; 846 int max_rx_rings, max_tx_rings, tcs; 847 int max_tx_sch_inputs, tx_grps; 848 849 /* Get the most up-to-date max_tx_sch_inputs. */ 850 if (netif_running(dev) && BNXT_NEW_RM(bp)) 851 bnxt_hwrm_func_resc_qcaps(bp, false); 852 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs; 853 854 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 855 if (max_tx_sch_inputs) 856 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 857 858 tcs = netdev_get_num_tc(dev); 859 tx_grps = max(tcs, 1); 860 if (bp->tx_nr_rings_xdp) 861 tx_grps++; 862 max_tx_rings /= tx_grps; 863 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 864 865 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 866 max_rx_rings = 0; 867 max_tx_rings = 0; 868 } 869 if (max_tx_sch_inputs) 870 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 871 872 if (tcs > 1) 873 max_tx_rings /= tcs; 874 875 channel->max_rx = max_rx_rings; 876 channel->max_tx = max_tx_rings; 877 channel->max_other = 0; 878 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 879 channel->combined_count = bp->rx_nr_rings; 880 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 881 channel->combined_count--; 882 } else { 883 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 884 channel->rx_count = bp->rx_nr_rings; 885 channel->tx_count = bp->tx_nr_rings_per_tc; 886 } 887 } 888 } 889 890 static int bnxt_set_channels(struct net_device *dev, 891 struct ethtool_channels *channel) 892 { 893 struct bnxt *bp = netdev_priv(dev); 894 int req_tx_rings, req_rx_rings, tcs; 895 bool sh = false; 896 int tx_xdp = 0; 897 int rc = 0; 898 899 if (channel->other_count) 900 return -EINVAL; 901 902 if (!channel->combined_count && 903 (!channel->rx_count || !channel->tx_count)) 904 return -EINVAL; 905 906 if (channel->combined_count && 907 (channel->rx_count || channel->tx_count)) 908 return -EINVAL; 909 910 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 911 channel->tx_count)) 912 return -EINVAL; 913 914 if (channel->combined_count) 915 sh = true; 916 917 tcs = netdev_get_num_tc(dev); 918 919 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 920 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 921 if (bp->tx_nr_rings_xdp) { 922 if (!sh) { 923 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 924 return -EINVAL; 925 } 926 tx_xdp = req_rx_rings; 927 } 928 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); 929 if (rc) { 930 netdev_warn(dev, "Unable to allocate the requested rings\n"); 931 return rc; 932 } 933 934 if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) != 935 bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) && 936 netif_is_rxfh_configured(dev)) { 937 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n"); 938 return -EINVAL; 939 } 940 941 if (netif_running(dev)) { 942 if (BNXT_PF(bp)) { 943 /* TODO CHIMP_FW: Send message to all VF's 944 * before PF unload 945 */ 946 } 947 rc = bnxt_close_nic(bp, true, false); 948 if (rc) { 949 netdev_err(bp->dev, "Set channel failure rc :%x\n", 950 rc); 951 return rc; 952 } 953 } 954 955 if (sh) { 956 bp->flags |= BNXT_FLAG_SHARED_RINGS; 957 bp->rx_nr_rings = channel->combined_count; 958 bp->tx_nr_rings_per_tc = channel->combined_count; 959 } else { 960 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 961 bp->rx_nr_rings = channel->rx_count; 962 bp->tx_nr_rings_per_tc = channel->tx_count; 963 } 964 bp->tx_nr_rings_xdp = tx_xdp; 965 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 966 if (tcs > 1) 967 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 968 969 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 970 bp->tx_nr_rings + bp->rx_nr_rings; 971 972 /* After changing number of rx channels, update NTUPLE feature. */ 973 netdev_update_features(dev); 974 if (netif_running(dev)) { 975 rc = bnxt_open_nic(bp, true, false); 976 if ((!rc) && BNXT_PF(bp)) { 977 /* TODO CHIMP_FW: Send message to all VF's 978 * to renable 979 */ 980 } 981 } else { 982 rc = bnxt_reserve_rings(bp, true); 983 } 984 985 return rc; 986 } 987 988 #ifdef CONFIG_RFS_ACCEL 989 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 990 u32 *rule_locs) 991 { 992 int i, j = 0; 993 994 cmd->data = bp->ntp_fltr_count; 995 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 996 struct hlist_head *head; 997 struct bnxt_ntuple_filter *fltr; 998 999 head = &bp->ntp_fltr_hash_tbl[i]; 1000 rcu_read_lock(); 1001 hlist_for_each_entry_rcu(fltr, head, hash) { 1002 if (j == cmd->rule_cnt) 1003 break; 1004 rule_locs[j++] = fltr->sw_id; 1005 } 1006 rcu_read_unlock(); 1007 if (j == cmd->rule_cnt) 1008 break; 1009 } 1010 cmd->rule_cnt = j; 1011 return 0; 1012 } 1013 1014 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1015 { 1016 struct ethtool_rx_flow_spec *fs = 1017 (struct ethtool_rx_flow_spec *)&cmd->fs; 1018 struct bnxt_ntuple_filter *fltr; 1019 struct flow_keys *fkeys; 1020 int i, rc = -EINVAL; 1021 1022 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 1023 return rc; 1024 1025 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 1026 struct hlist_head *head; 1027 1028 head = &bp->ntp_fltr_hash_tbl[i]; 1029 rcu_read_lock(); 1030 hlist_for_each_entry_rcu(fltr, head, hash) { 1031 if (fltr->sw_id == fs->location) 1032 goto fltr_found; 1033 } 1034 rcu_read_unlock(); 1035 } 1036 return rc; 1037 1038 fltr_found: 1039 fkeys = &fltr->fkeys; 1040 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 1041 if (fkeys->basic.ip_proto == IPPROTO_TCP) 1042 fs->flow_type = TCP_V4_FLOW; 1043 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 1044 fs->flow_type = UDP_V4_FLOW; 1045 else 1046 goto fltr_err; 1047 1048 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 1049 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 1050 1051 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 1052 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 1053 1054 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 1055 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 1056 1057 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 1058 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 1059 } else { 1060 int i; 1061 1062 if (fkeys->basic.ip_proto == IPPROTO_TCP) 1063 fs->flow_type = TCP_V6_FLOW; 1064 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 1065 fs->flow_type = UDP_V6_FLOW; 1066 else 1067 goto fltr_err; 1068 1069 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 1070 fkeys->addrs.v6addrs.src; 1071 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 1072 fkeys->addrs.v6addrs.dst; 1073 for (i = 0; i < 4; i++) { 1074 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 1075 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 1076 } 1077 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 1078 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 1079 1080 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 1081 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 1082 } 1083 1084 fs->ring_cookie = fltr->rxq; 1085 rc = 0; 1086 1087 fltr_err: 1088 rcu_read_unlock(); 1089 1090 return rc; 1091 } 1092 #endif 1093 1094 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 1095 { 1096 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 1097 return RXH_IP_SRC | RXH_IP_DST; 1098 return 0; 1099 } 1100 1101 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 1102 { 1103 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 1104 return RXH_IP_SRC | RXH_IP_DST; 1105 return 0; 1106 } 1107 1108 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1109 { 1110 cmd->data = 0; 1111 switch (cmd->flow_type) { 1112 case TCP_V4_FLOW: 1113 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 1114 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1115 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1116 cmd->data |= get_ethtool_ipv4_rss(bp); 1117 break; 1118 case UDP_V4_FLOW: 1119 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 1120 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1121 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1122 fallthrough; 1123 case SCTP_V4_FLOW: 1124 case AH_ESP_V4_FLOW: 1125 case AH_V4_FLOW: 1126 case ESP_V4_FLOW: 1127 case IPV4_FLOW: 1128 cmd->data |= get_ethtool_ipv4_rss(bp); 1129 break; 1130 1131 case TCP_V6_FLOW: 1132 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 1133 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1134 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1135 cmd->data |= get_ethtool_ipv6_rss(bp); 1136 break; 1137 case UDP_V6_FLOW: 1138 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 1139 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1140 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1141 fallthrough; 1142 case SCTP_V6_FLOW: 1143 case AH_ESP_V6_FLOW: 1144 case AH_V6_FLOW: 1145 case ESP_V6_FLOW: 1146 case IPV6_FLOW: 1147 cmd->data |= get_ethtool_ipv6_rss(bp); 1148 break; 1149 } 1150 return 0; 1151 } 1152 1153 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 1154 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 1155 1156 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1157 { 1158 u32 rss_hash_cfg = bp->rss_hash_cfg; 1159 int tuple, rc = 0; 1160 1161 if (cmd->data == RXH_4TUPLE) 1162 tuple = 4; 1163 else if (cmd->data == RXH_2TUPLE) 1164 tuple = 2; 1165 else if (!cmd->data) 1166 tuple = 0; 1167 else 1168 return -EINVAL; 1169 1170 if (cmd->flow_type == TCP_V4_FLOW) { 1171 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1172 if (tuple == 4) 1173 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1174 } else if (cmd->flow_type == UDP_V4_FLOW) { 1175 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 1176 return -EINVAL; 1177 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1178 if (tuple == 4) 1179 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1180 } else if (cmd->flow_type == TCP_V6_FLOW) { 1181 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1182 if (tuple == 4) 1183 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1184 } else if (cmd->flow_type == UDP_V6_FLOW) { 1185 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 1186 return -EINVAL; 1187 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1188 if (tuple == 4) 1189 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1190 } else if (tuple == 4) { 1191 return -EINVAL; 1192 } 1193 1194 switch (cmd->flow_type) { 1195 case TCP_V4_FLOW: 1196 case UDP_V4_FLOW: 1197 case SCTP_V4_FLOW: 1198 case AH_ESP_V4_FLOW: 1199 case AH_V4_FLOW: 1200 case ESP_V4_FLOW: 1201 case IPV4_FLOW: 1202 if (tuple == 2) 1203 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1204 else if (!tuple) 1205 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1206 break; 1207 1208 case TCP_V6_FLOW: 1209 case UDP_V6_FLOW: 1210 case SCTP_V6_FLOW: 1211 case AH_ESP_V6_FLOW: 1212 case AH_V6_FLOW: 1213 case ESP_V6_FLOW: 1214 case IPV6_FLOW: 1215 if (tuple == 2) 1216 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1217 else if (!tuple) 1218 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1219 break; 1220 } 1221 1222 if (bp->rss_hash_cfg == rss_hash_cfg) 1223 return 0; 1224 1225 bp->rss_hash_cfg = rss_hash_cfg; 1226 if (netif_running(bp->dev)) { 1227 bnxt_close_nic(bp, false, false); 1228 rc = bnxt_open_nic(bp, false, false); 1229 } 1230 return rc; 1231 } 1232 1233 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 1234 u32 *rule_locs) 1235 { 1236 struct bnxt *bp = netdev_priv(dev); 1237 int rc = 0; 1238 1239 switch (cmd->cmd) { 1240 #ifdef CONFIG_RFS_ACCEL 1241 case ETHTOOL_GRXRINGS: 1242 cmd->data = bp->rx_nr_rings; 1243 break; 1244 1245 case ETHTOOL_GRXCLSRLCNT: 1246 cmd->rule_cnt = bp->ntp_fltr_count; 1247 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 1248 break; 1249 1250 case ETHTOOL_GRXCLSRLALL: 1251 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 1252 break; 1253 1254 case ETHTOOL_GRXCLSRULE: 1255 rc = bnxt_grxclsrule(bp, cmd); 1256 break; 1257 #endif 1258 1259 case ETHTOOL_GRXFH: 1260 rc = bnxt_grxfh(bp, cmd); 1261 break; 1262 1263 default: 1264 rc = -EOPNOTSUPP; 1265 break; 1266 } 1267 1268 return rc; 1269 } 1270 1271 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 1272 { 1273 struct bnxt *bp = netdev_priv(dev); 1274 int rc; 1275 1276 switch (cmd->cmd) { 1277 case ETHTOOL_SRXFH: 1278 rc = bnxt_srxfh(bp, cmd); 1279 break; 1280 1281 default: 1282 rc = -EOPNOTSUPP; 1283 break; 1284 } 1285 return rc; 1286 } 1287 1288 u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 1289 { 1290 struct bnxt *bp = netdev_priv(dev); 1291 1292 if (bp->flags & BNXT_FLAG_CHIP_P5) 1293 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5); 1294 return HW_HASH_INDEX_SIZE; 1295 } 1296 1297 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 1298 { 1299 return HW_HASH_KEY_SIZE; 1300 } 1301 1302 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 1303 u8 *hfunc) 1304 { 1305 struct bnxt *bp = netdev_priv(dev); 1306 struct bnxt_vnic_info *vnic; 1307 u32 i, tbl_size; 1308 1309 if (hfunc) 1310 *hfunc = ETH_RSS_HASH_TOP; 1311 1312 if (!bp->vnic_info) 1313 return 0; 1314 1315 vnic = &bp->vnic_info[0]; 1316 if (indir && bp->rss_indir_tbl) { 1317 tbl_size = bnxt_get_rxfh_indir_size(dev); 1318 for (i = 0; i < tbl_size; i++) 1319 indir[i] = bp->rss_indir_tbl[i]; 1320 } 1321 1322 if (key && vnic->rss_hash_key) 1323 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 1324 1325 return 0; 1326 } 1327 1328 static int bnxt_set_rxfh(struct net_device *dev, const u32 *indir, 1329 const u8 *key, const u8 hfunc) 1330 { 1331 struct bnxt *bp = netdev_priv(dev); 1332 int rc = 0; 1333 1334 if (hfunc && hfunc != ETH_RSS_HASH_TOP) 1335 return -EOPNOTSUPP; 1336 1337 if (key) 1338 return -EOPNOTSUPP; 1339 1340 if (indir) { 1341 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev); 1342 1343 for (i = 0; i < tbl_size; i++) 1344 bp->rss_indir_tbl[i] = indir[i]; 1345 pad = bp->rss_indir_tbl_entries - tbl_size; 1346 if (pad) 1347 memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16)); 1348 } 1349 1350 if (netif_running(bp->dev)) { 1351 bnxt_close_nic(bp, false, false); 1352 rc = bnxt_open_nic(bp, false, false); 1353 } 1354 return rc; 1355 } 1356 1357 static void bnxt_get_drvinfo(struct net_device *dev, 1358 struct ethtool_drvinfo *info) 1359 { 1360 struct bnxt *bp = netdev_priv(dev); 1361 1362 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 1363 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version)); 1364 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 1365 info->n_stats = bnxt_get_num_stats(bp); 1366 info->testinfo_len = bp->num_tests; 1367 /* TODO CHIMP_FW: eeprom dump details */ 1368 info->eedump_len = 0; 1369 /* TODO CHIMP FW: reg dump details */ 1370 info->regdump_len = 0; 1371 } 1372 1373 static int bnxt_get_regs_len(struct net_device *dev) 1374 { 1375 struct bnxt *bp = netdev_priv(dev); 1376 int reg_len; 1377 1378 if (!BNXT_PF(bp)) 1379 return -EOPNOTSUPP; 1380 1381 reg_len = BNXT_PXP_REG_LEN; 1382 1383 if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED) 1384 reg_len += sizeof(struct pcie_ctx_hw_stats); 1385 1386 return reg_len; 1387 } 1388 1389 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs, 1390 void *_p) 1391 { 1392 struct pcie_ctx_hw_stats *hw_pcie_stats; 1393 struct hwrm_pcie_qstats_input *req; 1394 struct bnxt *bp = netdev_priv(dev); 1395 dma_addr_t hw_pcie_stats_addr; 1396 int rc; 1397 1398 regs->version = 0; 1399 bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p); 1400 1401 if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)) 1402 return; 1403 1404 if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS)) 1405 return; 1406 1407 hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats), 1408 &hw_pcie_stats_addr); 1409 if (!hw_pcie_stats) { 1410 hwrm_req_drop(bp, req); 1411 return; 1412 } 1413 1414 regs->version = 1; 1415 hwrm_req_hold(bp, req); /* hold on to slice */ 1416 req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats)); 1417 req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr); 1418 rc = hwrm_req_send(bp, req); 1419 if (!rc) { 1420 __le64 *src = (__le64 *)hw_pcie_stats; 1421 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN); 1422 int i; 1423 1424 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++) 1425 dst[i] = le64_to_cpu(src[i]); 1426 } 1427 hwrm_req_drop(bp, req); 1428 } 1429 1430 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1431 { 1432 struct bnxt *bp = netdev_priv(dev); 1433 1434 wol->supported = 0; 1435 wol->wolopts = 0; 1436 memset(&wol->sopass, 0, sizeof(wol->sopass)); 1437 if (bp->flags & BNXT_FLAG_WOL_CAP) { 1438 wol->supported = WAKE_MAGIC; 1439 if (bp->wol) 1440 wol->wolopts = WAKE_MAGIC; 1441 } 1442 } 1443 1444 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1445 { 1446 struct bnxt *bp = netdev_priv(dev); 1447 1448 if (wol->wolopts & ~WAKE_MAGIC) 1449 return -EINVAL; 1450 1451 if (wol->wolopts & WAKE_MAGIC) { 1452 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 1453 return -EINVAL; 1454 if (!bp->wol) { 1455 if (bnxt_hwrm_alloc_wol_fltr(bp)) 1456 return -EBUSY; 1457 bp->wol = 1; 1458 } 1459 } else { 1460 if (bp->wol) { 1461 if (bnxt_hwrm_free_wol_fltr(bp)) 1462 return -EBUSY; 1463 bp->wol = 0; 1464 } 1465 } 1466 return 0; 1467 } 1468 1469 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 1470 { 1471 u32 speed_mask = 0; 1472 1473 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 1474 /* set the advertised speeds */ 1475 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 1476 speed_mask |= ADVERTISED_100baseT_Full; 1477 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 1478 speed_mask |= ADVERTISED_1000baseT_Full; 1479 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 1480 speed_mask |= ADVERTISED_2500baseX_Full; 1481 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 1482 speed_mask |= ADVERTISED_10000baseT_Full; 1483 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 1484 speed_mask |= ADVERTISED_40000baseCR4_Full; 1485 1486 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 1487 speed_mask |= ADVERTISED_Pause; 1488 else if (fw_pause & BNXT_LINK_PAUSE_TX) 1489 speed_mask |= ADVERTISED_Asym_Pause; 1490 else if (fw_pause & BNXT_LINK_PAUSE_RX) 1491 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 1492 1493 return speed_mask; 1494 } 1495 1496 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 1497 { \ 1498 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 1499 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1500 100baseT_Full); \ 1501 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 1502 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1503 1000baseT_Full); \ 1504 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 1505 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1506 10000baseT_Full); \ 1507 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 1508 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1509 25000baseCR_Full); \ 1510 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 1511 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1512 40000baseCR4_Full);\ 1513 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 1514 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1515 50000baseCR2_Full);\ 1516 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 1517 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1518 100000baseCR4_Full);\ 1519 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 1520 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1521 Pause); \ 1522 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 1523 ethtool_link_ksettings_add_link_mode( \ 1524 lk_ksettings, name, Asym_Pause);\ 1525 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 1526 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1527 Asym_Pause); \ 1528 } \ 1529 } 1530 1531 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 1532 { \ 1533 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1534 100baseT_Full) || \ 1535 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1536 100baseT_Half)) \ 1537 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 1538 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1539 1000baseT_Full) || \ 1540 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1541 1000baseT_Half)) \ 1542 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 1543 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1544 10000baseT_Full)) \ 1545 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 1546 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1547 25000baseCR_Full)) \ 1548 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 1549 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1550 40000baseCR4_Full)) \ 1551 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 1552 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1553 50000baseCR2_Full)) \ 1554 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 1555 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1556 100000baseCR4_Full)) \ 1557 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 1558 } 1559 1560 #define BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, name) \ 1561 { \ 1562 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_50GB) \ 1563 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1564 50000baseCR_Full); \ 1565 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_100GB) \ 1566 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1567 100000baseCR2_Full);\ 1568 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_200GB) \ 1569 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1570 200000baseCR4_Full);\ 1571 } 1572 1573 #define BNXT_ETHTOOL_TO_FW_PAM4_SPDS(fw_speeds, lk_ksettings, name) \ 1574 { \ 1575 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1576 50000baseCR_Full)) \ 1577 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_50GB; \ 1578 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1579 100000baseCR2_Full)) \ 1580 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_100GB; \ 1581 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1582 200000baseCR4_Full)) \ 1583 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_200GB; \ 1584 } 1585 1586 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info, 1587 struct ethtool_link_ksettings *lk_ksettings) 1588 { 1589 u16 fec_cfg = link_info->fec_cfg; 1590 1591 if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) { 1592 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1593 lk_ksettings->link_modes.advertising); 1594 return; 1595 } 1596 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 1597 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1598 lk_ksettings->link_modes.advertising); 1599 if (fec_cfg & BNXT_FEC_ENC_RS) 1600 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1601 lk_ksettings->link_modes.advertising); 1602 if (fec_cfg & BNXT_FEC_ENC_LLRS) 1603 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 1604 lk_ksettings->link_modes.advertising); 1605 } 1606 1607 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 1608 struct ethtool_link_ksettings *lk_ksettings) 1609 { 1610 u16 fw_speeds = link_info->advertising; 1611 u8 fw_pause = 0; 1612 1613 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1614 fw_pause = link_info->auto_pause_setting; 1615 1616 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 1617 fw_speeds = link_info->advertising_pam4; 1618 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, advertising); 1619 bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings); 1620 } 1621 1622 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 1623 struct ethtool_link_ksettings *lk_ksettings) 1624 { 1625 u16 fw_speeds = link_info->lp_auto_link_speeds; 1626 u8 fw_pause = 0; 1627 1628 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1629 fw_pause = link_info->lp_pause; 1630 1631 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 1632 lp_advertising); 1633 fw_speeds = link_info->lp_auto_pam4_link_speeds; 1634 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, lp_advertising); 1635 } 1636 1637 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info, 1638 struct ethtool_link_ksettings *lk_ksettings) 1639 { 1640 u16 fec_cfg = link_info->fec_cfg; 1641 1642 if (fec_cfg & BNXT_FEC_NONE) { 1643 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1644 lk_ksettings->link_modes.supported); 1645 return; 1646 } 1647 if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP) 1648 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1649 lk_ksettings->link_modes.supported); 1650 if (fec_cfg & BNXT_FEC_ENC_RS_CAP) 1651 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1652 lk_ksettings->link_modes.supported); 1653 if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP) 1654 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 1655 lk_ksettings->link_modes.supported); 1656 } 1657 1658 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1659 struct ethtool_link_ksettings *lk_ksettings) 1660 { 1661 u16 fw_speeds = link_info->support_speeds; 1662 1663 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1664 fw_speeds = link_info->support_pam4_speeds; 1665 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, supported); 1666 1667 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); 1668 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1669 Asym_Pause); 1670 1671 if (link_info->support_auto_speeds || 1672 link_info->support_pam4_auto_speeds) 1673 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1674 Autoneg); 1675 bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings); 1676 } 1677 1678 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1679 { 1680 switch (fw_link_speed) { 1681 case BNXT_LINK_SPEED_100MB: 1682 return SPEED_100; 1683 case BNXT_LINK_SPEED_1GB: 1684 return SPEED_1000; 1685 case BNXT_LINK_SPEED_2_5GB: 1686 return SPEED_2500; 1687 case BNXT_LINK_SPEED_10GB: 1688 return SPEED_10000; 1689 case BNXT_LINK_SPEED_20GB: 1690 return SPEED_20000; 1691 case BNXT_LINK_SPEED_25GB: 1692 return SPEED_25000; 1693 case BNXT_LINK_SPEED_40GB: 1694 return SPEED_40000; 1695 case BNXT_LINK_SPEED_50GB: 1696 return SPEED_50000; 1697 case BNXT_LINK_SPEED_100GB: 1698 return SPEED_100000; 1699 default: 1700 return SPEED_UNKNOWN; 1701 } 1702 } 1703 1704 static int bnxt_get_link_ksettings(struct net_device *dev, 1705 struct ethtool_link_ksettings *lk_ksettings) 1706 { 1707 struct bnxt *bp = netdev_priv(dev); 1708 struct bnxt_link_info *link_info = &bp->link_info; 1709 struct ethtool_link_settings *base = &lk_ksettings->base; 1710 u32 ethtool_speed; 1711 1712 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1713 mutex_lock(&bp->link_lock); 1714 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1715 1716 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1717 if (link_info->autoneg) { 1718 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1719 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1720 advertising, Autoneg); 1721 base->autoneg = AUTONEG_ENABLE; 1722 base->duplex = DUPLEX_UNKNOWN; 1723 if (link_info->phy_link_status == BNXT_LINK_LINK) { 1724 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1725 if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1726 base->duplex = DUPLEX_FULL; 1727 else 1728 base->duplex = DUPLEX_HALF; 1729 } 1730 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1731 } else { 1732 base->autoneg = AUTONEG_DISABLE; 1733 ethtool_speed = 1734 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1735 base->duplex = DUPLEX_HALF; 1736 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1737 base->duplex = DUPLEX_FULL; 1738 } 1739 base->speed = ethtool_speed; 1740 1741 base->port = PORT_NONE; 1742 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1743 base->port = PORT_TP; 1744 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1745 TP); 1746 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1747 TP); 1748 } else { 1749 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1750 FIBRE); 1751 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1752 FIBRE); 1753 1754 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1755 base->port = PORT_DA; 1756 else if (link_info->media_type == 1757 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1758 base->port = PORT_FIBRE; 1759 } 1760 base->phy_address = link_info->phy_addr; 1761 mutex_unlock(&bp->link_lock); 1762 1763 return 0; 1764 } 1765 1766 static int bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed) 1767 { 1768 struct bnxt *bp = netdev_priv(dev); 1769 struct bnxt_link_info *link_info = &bp->link_info; 1770 u16 support_pam4_spds = link_info->support_pam4_speeds; 1771 u16 support_spds = link_info->support_speeds; 1772 u8 sig_mode = BNXT_SIG_MODE_NRZ; 1773 u16 fw_speed = 0; 1774 1775 switch (ethtool_speed) { 1776 case SPEED_100: 1777 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1778 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB; 1779 break; 1780 case SPEED_1000: 1781 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1782 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 1783 break; 1784 case SPEED_2500: 1785 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1786 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB; 1787 break; 1788 case SPEED_10000: 1789 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1790 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 1791 break; 1792 case SPEED_20000: 1793 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1794 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB; 1795 break; 1796 case SPEED_25000: 1797 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1798 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 1799 break; 1800 case SPEED_40000: 1801 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1802 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 1803 break; 1804 case SPEED_50000: 1805 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) { 1806 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 1807 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) { 1808 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB; 1809 sig_mode = BNXT_SIG_MODE_PAM4; 1810 } 1811 break; 1812 case SPEED_100000: 1813 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) { 1814 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB; 1815 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) { 1816 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB; 1817 sig_mode = BNXT_SIG_MODE_PAM4; 1818 } 1819 break; 1820 case SPEED_200000: 1821 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) { 1822 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB; 1823 sig_mode = BNXT_SIG_MODE_PAM4; 1824 } 1825 break; 1826 } 1827 1828 if (!fw_speed) { 1829 netdev_err(dev, "unsupported speed!\n"); 1830 return -EINVAL; 1831 } 1832 1833 if (link_info->req_link_speed == fw_speed && 1834 link_info->req_signal_mode == sig_mode && 1835 link_info->autoneg == 0) 1836 return -EALREADY; 1837 1838 link_info->req_link_speed = fw_speed; 1839 link_info->req_signal_mode = sig_mode; 1840 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1841 link_info->autoneg = 0; 1842 link_info->advertising = 0; 1843 link_info->advertising_pam4 = 0; 1844 1845 return 0; 1846 } 1847 1848 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1849 { 1850 u16 fw_speed_mask = 0; 1851 1852 /* only support autoneg at speed 100, 1000, and 10000 */ 1853 if (advertising & (ADVERTISED_100baseT_Full | 1854 ADVERTISED_100baseT_Half)) { 1855 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1856 } 1857 if (advertising & (ADVERTISED_1000baseT_Full | 1858 ADVERTISED_1000baseT_Half)) { 1859 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1860 } 1861 if (advertising & ADVERTISED_10000baseT_Full) 1862 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1863 1864 if (advertising & ADVERTISED_40000baseCR4_Full) 1865 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1866 1867 return fw_speed_mask; 1868 } 1869 1870 static int bnxt_set_link_ksettings(struct net_device *dev, 1871 const struct ethtool_link_ksettings *lk_ksettings) 1872 { 1873 struct bnxt *bp = netdev_priv(dev); 1874 struct bnxt_link_info *link_info = &bp->link_info; 1875 const struct ethtool_link_settings *base = &lk_ksettings->base; 1876 bool set_pause = false; 1877 u32 speed; 1878 int rc = 0; 1879 1880 if (!BNXT_PHY_CFG_ABLE(bp)) 1881 return -EOPNOTSUPP; 1882 1883 mutex_lock(&bp->link_lock); 1884 if (base->autoneg == AUTONEG_ENABLE) { 1885 link_info->advertising = 0; 1886 link_info->advertising_pam4 = 0; 1887 BNXT_ETHTOOL_TO_FW_SPDS(link_info->advertising, lk_ksettings, 1888 advertising); 1889 BNXT_ETHTOOL_TO_FW_PAM4_SPDS(link_info->advertising_pam4, 1890 lk_ksettings, advertising); 1891 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1892 if (!link_info->advertising && !link_info->advertising_pam4) { 1893 link_info->advertising = link_info->support_auto_speeds; 1894 link_info->advertising_pam4 = 1895 link_info->support_pam4_auto_speeds; 1896 } 1897 /* any change to autoneg will cause link change, therefore the 1898 * driver should put back the original pause setting in autoneg 1899 */ 1900 set_pause = true; 1901 } else { 1902 u8 phy_type = link_info->phy_type; 1903 1904 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1905 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1906 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1907 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1908 rc = -EINVAL; 1909 goto set_setting_exit; 1910 } 1911 if (base->duplex == DUPLEX_HALF) { 1912 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1913 rc = -EINVAL; 1914 goto set_setting_exit; 1915 } 1916 speed = base->speed; 1917 rc = bnxt_force_link_speed(dev, speed); 1918 if (rc) { 1919 if (rc == -EALREADY) 1920 rc = 0; 1921 goto set_setting_exit; 1922 } 1923 } 1924 1925 if (netif_running(dev)) 1926 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1927 1928 set_setting_exit: 1929 mutex_unlock(&bp->link_lock); 1930 return rc; 1931 } 1932 1933 static int bnxt_get_fecparam(struct net_device *dev, 1934 struct ethtool_fecparam *fec) 1935 { 1936 struct bnxt *bp = netdev_priv(dev); 1937 struct bnxt_link_info *link_info; 1938 u8 active_fec; 1939 u16 fec_cfg; 1940 1941 link_info = &bp->link_info; 1942 fec_cfg = link_info->fec_cfg; 1943 active_fec = link_info->active_fec_sig_mode & 1944 PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK; 1945 if (fec_cfg & BNXT_FEC_NONE) { 1946 fec->fec = ETHTOOL_FEC_NONE; 1947 fec->active_fec = ETHTOOL_FEC_NONE; 1948 return 0; 1949 } 1950 if (fec_cfg & BNXT_FEC_AUTONEG) 1951 fec->fec |= ETHTOOL_FEC_AUTO; 1952 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 1953 fec->fec |= ETHTOOL_FEC_BASER; 1954 if (fec_cfg & BNXT_FEC_ENC_RS) 1955 fec->fec |= ETHTOOL_FEC_RS; 1956 if (fec_cfg & BNXT_FEC_ENC_LLRS) 1957 fec->fec |= ETHTOOL_FEC_LLRS; 1958 1959 switch (active_fec) { 1960 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE: 1961 fec->active_fec |= ETHTOOL_FEC_BASER; 1962 break; 1963 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE: 1964 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE: 1965 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE: 1966 fec->active_fec |= ETHTOOL_FEC_RS; 1967 break; 1968 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE: 1969 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE: 1970 fec->active_fec |= ETHTOOL_FEC_LLRS; 1971 break; 1972 } 1973 return 0; 1974 } 1975 1976 static void bnxt_get_fec_stats(struct net_device *dev, 1977 struct ethtool_fec_stats *fec_stats) 1978 { 1979 struct bnxt *bp = netdev_priv(dev); 1980 u64 *rx; 1981 1982 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 1983 return; 1984 1985 rx = bp->rx_port_stats_ext.sw_stats; 1986 fec_stats->corrected_bits.total = 1987 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_corrected_bits)); 1988 } 1989 1990 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info, 1991 u32 fec) 1992 { 1993 u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE; 1994 1995 if (fec & ETHTOOL_FEC_BASER) 1996 fw_fec |= BNXT_FEC_BASE_R_ON(link_info); 1997 else if (fec & ETHTOOL_FEC_RS) 1998 fw_fec |= BNXT_FEC_RS_ON(link_info); 1999 else if (fec & ETHTOOL_FEC_LLRS) 2000 fw_fec |= BNXT_FEC_LLRS_ON; 2001 return fw_fec; 2002 } 2003 2004 static int bnxt_set_fecparam(struct net_device *dev, 2005 struct ethtool_fecparam *fecparam) 2006 { 2007 struct hwrm_port_phy_cfg_input *req; 2008 struct bnxt *bp = netdev_priv(dev); 2009 struct bnxt_link_info *link_info; 2010 u32 new_cfg, fec = fecparam->fec; 2011 u16 fec_cfg; 2012 int rc; 2013 2014 link_info = &bp->link_info; 2015 fec_cfg = link_info->fec_cfg; 2016 if (fec_cfg & BNXT_FEC_NONE) 2017 return -EOPNOTSUPP; 2018 2019 if (fec & ETHTOOL_FEC_OFF) { 2020 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE | 2021 BNXT_FEC_ALL_OFF(link_info); 2022 goto apply_fec; 2023 } 2024 if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) || 2025 ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) || 2026 ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) || 2027 ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP))) 2028 return -EINVAL; 2029 2030 if (fec & ETHTOOL_FEC_AUTO) { 2031 if (!link_info->autoneg) 2032 return -EINVAL; 2033 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE; 2034 } else { 2035 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec); 2036 } 2037 2038 apply_fec: 2039 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 2040 if (rc) 2041 return rc; 2042 req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2043 rc = hwrm_req_send(bp, req); 2044 /* update current settings */ 2045 if (!rc) { 2046 mutex_lock(&bp->link_lock); 2047 bnxt_update_link(bp, false); 2048 mutex_unlock(&bp->link_lock); 2049 } 2050 return rc; 2051 } 2052 2053 static void bnxt_get_pauseparam(struct net_device *dev, 2054 struct ethtool_pauseparam *epause) 2055 { 2056 struct bnxt *bp = netdev_priv(dev); 2057 struct bnxt_link_info *link_info = &bp->link_info; 2058 2059 if (BNXT_VF(bp)) 2060 return; 2061 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 2062 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 2063 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 2064 } 2065 2066 static void bnxt_get_pause_stats(struct net_device *dev, 2067 struct ethtool_pause_stats *epstat) 2068 { 2069 struct bnxt *bp = netdev_priv(dev); 2070 u64 *rx, *tx; 2071 2072 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 2073 return; 2074 2075 rx = bp->port_stats.sw_stats; 2076 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 2077 2078 epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames); 2079 epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames); 2080 } 2081 2082 static int bnxt_set_pauseparam(struct net_device *dev, 2083 struct ethtool_pauseparam *epause) 2084 { 2085 int rc = 0; 2086 struct bnxt *bp = netdev_priv(dev); 2087 struct bnxt_link_info *link_info = &bp->link_info; 2088 2089 if (!BNXT_PHY_CFG_ABLE(bp)) 2090 return -EOPNOTSUPP; 2091 2092 mutex_lock(&bp->link_lock); 2093 if (epause->autoneg) { 2094 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 2095 rc = -EINVAL; 2096 goto pause_exit; 2097 } 2098 2099 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 2100 if (bp->hwrm_spec_code >= 0x10201) 2101 link_info->req_flow_ctrl = 2102 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; 2103 } else { 2104 /* when transition from auto pause to force pause, 2105 * force a link change 2106 */ 2107 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 2108 link_info->force_link_chng = true; 2109 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 2110 link_info->req_flow_ctrl = 0; 2111 } 2112 if (epause->rx_pause) 2113 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 2114 2115 if (epause->tx_pause) 2116 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 2117 2118 if (netif_running(dev)) 2119 rc = bnxt_hwrm_set_pause(bp); 2120 2121 pause_exit: 2122 mutex_unlock(&bp->link_lock); 2123 return rc; 2124 } 2125 2126 static u32 bnxt_get_link(struct net_device *dev) 2127 { 2128 struct bnxt *bp = netdev_priv(dev); 2129 2130 /* TODO: handle MF, VF, driver close case */ 2131 return bp->link_info.link_up; 2132 } 2133 2134 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp, 2135 struct hwrm_nvm_get_dev_info_output *nvm_dev_info) 2136 { 2137 struct hwrm_nvm_get_dev_info_output *resp; 2138 struct hwrm_nvm_get_dev_info_input *req; 2139 int rc; 2140 2141 if (BNXT_VF(bp)) 2142 return -EOPNOTSUPP; 2143 2144 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO); 2145 if (rc) 2146 return rc; 2147 2148 resp = hwrm_req_hold(bp, req); 2149 rc = hwrm_req_send(bp, req); 2150 if (!rc) 2151 memcpy(nvm_dev_info, resp, sizeof(*resp)); 2152 hwrm_req_drop(bp, req); 2153 return rc; 2154 } 2155 2156 static void bnxt_print_admin_err(struct bnxt *bp) 2157 { 2158 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n"); 2159 } 2160 2161 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 2162 u16 ext, u16 *index, u32 *item_length, 2163 u32 *data_length); 2164 2165 static int bnxt_flash_nvram(struct net_device *dev, u16 dir_type, 2166 u16 dir_ordinal, u16 dir_ext, u16 dir_attr, 2167 u32 dir_item_len, const u8 *data, 2168 size_t data_len) 2169 { 2170 struct bnxt *bp = netdev_priv(dev); 2171 struct hwrm_nvm_write_input *req; 2172 int rc; 2173 2174 rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE); 2175 if (rc) 2176 return rc; 2177 2178 if (data_len && data) { 2179 dma_addr_t dma_handle; 2180 u8 *kmem; 2181 2182 kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle); 2183 if (!kmem) { 2184 hwrm_req_drop(bp, req); 2185 return -ENOMEM; 2186 } 2187 2188 req->dir_data_length = cpu_to_le32(data_len); 2189 2190 memcpy(kmem, data, data_len); 2191 req->host_src_addr = cpu_to_le64(dma_handle); 2192 } 2193 2194 hwrm_req_timeout(bp, req, bp->hwrm_cmd_max_timeout); 2195 req->dir_type = cpu_to_le16(dir_type); 2196 req->dir_ordinal = cpu_to_le16(dir_ordinal); 2197 req->dir_ext = cpu_to_le16(dir_ext); 2198 req->dir_attr = cpu_to_le16(dir_attr); 2199 req->dir_item_length = cpu_to_le32(dir_item_len); 2200 rc = hwrm_req_send(bp, req); 2201 2202 if (rc == -EACCES) 2203 bnxt_print_admin_err(bp); 2204 return rc; 2205 } 2206 2207 int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type, 2208 u8 self_reset, u8 flags) 2209 { 2210 struct bnxt *bp = netdev_priv(dev); 2211 struct hwrm_fw_reset_input *req; 2212 int rc; 2213 2214 if (!bnxt_hwrm_reset_permitted(bp)) { 2215 netdev_warn(bp->dev, "Reset denied by firmware, it may be inhibited by remote driver"); 2216 return -EPERM; 2217 } 2218 2219 rc = hwrm_req_init(bp, req, HWRM_FW_RESET); 2220 if (rc) 2221 return rc; 2222 2223 req->embedded_proc_type = proc_type; 2224 req->selfrst_status = self_reset; 2225 req->flags = flags; 2226 2227 if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) { 2228 rc = hwrm_req_send_silent(bp, req); 2229 } else { 2230 rc = hwrm_req_send(bp, req); 2231 if (rc == -EACCES) 2232 bnxt_print_admin_err(bp); 2233 } 2234 return rc; 2235 } 2236 2237 static int bnxt_firmware_reset(struct net_device *dev, 2238 enum bnxt_nvm_directory_type dir_type) 2239 { 2240 u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE; 2241 u8 proc_type, flags = 0; 2242 2243 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 2244 /* (e.g. when firmware isn't already running) */ 2245 switch (dir_type) { 2246 case BNX_DIR_TYPE_CHIMP_PATCH: 2247 case BNX_DIR_TYPE_BOOTCODE: 2248 case BNX_DIR_TYPE_BOOTCODE_2: 2249 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 2250 /* Self-reset ChiMP upon next PCIe reset: */ 2251 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 2252 break; 2253 case BNX_DIR_TYPE_APE_FW: 2254 case BNX_DIR_TYPE_APE_PATCH: 2255 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 2256 /* Self-reset APE upon next PCIe reset: */ 2257 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 2258 break; 2259 case BNX_DIR_TYPE_KONG_FW: 2260 case BNX_DIR_TYPE_KONG_PATCH: 2261 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 2262 break; 2263 case BNX_DIR_TYPE_BONO_FW: 2264 case BNX_DIR_TYPE_BONO_PATCH: 2265 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 2266 break; 2267 default: 2268 return -EINVAL; 2269 } 2270 2271 return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags); 2272 } 2273 2274 static int bnxt_firmware_reset_chip(struct net_device *dev) 2275 { 2276 struct bnxt *bp = netdev_priv(dev); 2277 u8 flags = 0; 2278 2279 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET) 2280 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL; 2281 2282 return bnxt_hwrm_firmware_reset(dev, 2283 FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP, 2284 FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP, 2285 flags); 2286 } 2287 2288 static int bnxt_firmware_reset_ap(struct net_device *dev) 2289 { 2290 return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP, 2291 FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE, 2292 0); 2293 } 2294 2295 static int bnxt_flash_firmware(struct net_device *dev, 2296 u16 dir_type, 2297 const u8 *fw_data, 2298 size_t fw_size) 2299 { 2300 int rc = 0; 2301 u16 code_type; 2302 u32 stored_crc; 2303 u32 calculated_crc; 2304 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 2305 2306 switch (dir_type) { 2307 case BNX_DIR_TYPE_BOOTCODE: 2308 case BNX_DIR_TYPE_BOOTCODE_2: 2309 code_type = CODE_BOOT; 2310 break; 2311 case BNX_DIR_TYPE_CHIMP_PATCH: 2312 code_type = CODE_CHIMP_PATCH; 2313 break; 2314 case BNX_DIR_TYPE_APE_FW: 2315 code_type = CODE_MCTP_PASSTHRU; 2316 break; 2317 case BNX_DIR_TYPE_APE_PATCH: 2318 code_type = CODE_APE_PATCH; 2319 break; 2320 case BNX_DIR_TYPE_KONG_FW: 2321 code_type = CODE_KONG_FW; 2322 break; 2323 case BNX_DIR_TYPE_KONG_PATCH: 2324 code_type = CODE_KONG_PATCH; 2325 break; 2326 case BNX_DIR_TYPE_BONO_FW: 2327 code_type = CODE_BONO_FW; 2328 break; 2329 case BNX_DIR_TYPE_BONO_PATCH: 2330 code_type = CODE_BONO_PATCH; 2331 break; 2332 default: 2333 netdev_err(dev, "Unsupported directory entry type: %u\n", 2334 dir_type); 2335 return -EINVAL; 2336 } 2337 if (fw_size < sizeof(struct bnxt_fw_header)) { 2338 netdev_err(dev, "Invalid firmware file size: %u\n", 2339 (unsigned int)fw_size); 2340 return -EINVAL; 2341 } 2342 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 2343 netdev_err(dev, "Invalid firmware signature: %08X\n", 2344 le32_to_cpu(header->signature)); 2345 return -EINVAL; 2346 } 2347 if (header->code_type != code_type) { 2348 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 2349 code_type, header->code_type); 2350 return -EINVAL; 2351 } 2352 if (header->device != DEVICE_CUMULUS_FAMILY) { 2353 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 2354 DEVICE_CUMULUS_FAMILY, header->device); 2355 return -EINVAL; 2356 } 2357 /* Confirm the CRC32 checksum of the file: */ 2358 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 2359 sizeof(stored_crc))); 2360 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 2361 if (calculated_crc != stored_crc) { 2362 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 2363 (unsigned long)stored_crc, 2364 (unsigned long)calculated_crc); 2365 return -EINVAL; 2366 } 2367 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2368 0, 0, 0, fw_data, fw_size); 2369 if (rc == 0) /* Firmware update successful */ 2370 rc = bnxt_firmware_reset(dev, dir_type); 2371 2372 return rc; 2373 } 2374 2375 static int bnxt_flash_microcode(struct net_device *dev, 2376 u16 dir_type, 2377 const u8 *fw_data, 2378 size_t fw_size) 2379 { 2380 struct bnxt_ucode_trailer *trailer; 2381 u32 calculated_crc; 2382 u32 stored_crc; 2383 int rc = 0; 2384 2385 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 2386 netdev_err(dev, "Invalid microcode file size: %u\n", 2387 (unsigned int)fw_size); 2388 return -EINVAL; 2389 } 2390 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 2391 sizeof(*trailer))); 2392 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 2393 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 2394 le32_to_cpu(trailer->sig)); 2395 return -EINVAL; 2396 } 2397 if (le16_to_cpu(trailer->dir_type) != dir_type) { 2398 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 2399 dir_type, le16_to_cpu(trailer->dir_type)); 2400 return -EINVAL; 2401 } 2402 if (le16_to_cpu(trailer->trailer_length) < 2403 sizeof(struct bnxt_ucode_trailer)) { 2404 netdev_err(dev, "Invalid microcode trailer length: %d\n", 2405 le16_to_cpu(trailer->trailer_length)); 2406 return -EINVAL; 2407 } 2408 2409 /* Confirm the CRC32 checksum of the file: */ 2410 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 2411 sizeof(stored_crc))); 2412 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 2413 if (calculated_crc != stored_crc) { 2414 netdev_err(dev, 2415 "CRC32 (%08lX) does not match calculated: %08lX\n", 2416 (unsigned long)stored_crc, 2417 (unsigned long)calculated_crc); 2418 return -EINVAL; 2419 } 2420 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2421 0, 0, 0, fw_data, fw_size); 2422 2423 return rc; 2424 } 2425 2426 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 2427 { 2428 switch (dir_type) { 2429 case BNX_DIR_TYPE_CHIMP_PATCH: 2430 case BNX_DIR_TYPE_BOOTCODE: 2431 case BNX_DIR_TYPE_BOOTCODE_2: 2432 case BNX_DIR_TYPE_APE_FW: 2433 case BNX_DIR_TYPE_APE_PATCH: 2434 case BNX_DIR_TYPE_KONG_FW: 2435 case BNX_DIR_TYPE_KONG_PATCH: 2436 case BNX_DIR_TYPE_BONO_FW: 2437 case BNX_DIR_TYPE_BONO_PATCH: 2438 return true; 2439 } 2440 2441 return false; 2442 } 2443 2444 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 2445 { 2446 switch (dir_type) { 2447 case BNX_DIR_TYPE_AVS: 2448 case BNX_DIR_TYPE_EXP_ROM_MBA: 2449 case BNX_DIR_TYPE_PCIE: 2450 case BNX_DIR_TYPE_TSCF_UCODE: 2451 case BNX_DIR_TYPE_EXT_PHY: 2452 case BNX_DIR_TYPE_CCM: 2453 case BNX_DIR_TYPE_ISCSI_BOOT: 2454 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 2455 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 2456 return true; 2457 } 2458 2459 return false; 2460 } 2461 2462 static bool bnxt_dir_type_is_executable(u16 dir_type) 2463 { 2464 return bnxt_dir_type_is_ape_bin_format(dir_type) || 2465 bnxt_dir_type_is_other_exec_format(dir_type); 2466 } 2467 2468 static int bnxt_flash_firmware_from_file(struct net_device *dev, 2469 u16 dir_type, 2470 const char *filename) 2471 { 2472 const struct firmware *fw; 2473 int rc; 2474 2475 rc = request_firmware(&fw, filename, &dev->dev); 2476 if (rc != 0) { 2477 netdev_err(dev, "Error %d requesting firmware file: %s\n", 2478 rc, filename); 2479 return rc; 2480 } 2481 if (bnxt_dir_type_is_ape_bin_format(dir_type)) 2482 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 2483 else if (bnxt_dir_type_is_other_exec_format(dir_type)) 2484 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 2485 else 2486 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2487 0, 0, 0, fw->data, fw->size); 2488 release_firmware(fw); 2489 return rc; 2490 } 2491 2492 #define BNXT_PKG_DMA_SIZE 0x40000 2493 #define BNXT_NVM_MORE_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_MODE)) 2494 #define BNXT_NVM_LAST_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_LAST)) 2495 2496 int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw, 2497 u32 install_type) 2498 { 2499 struct hwrm_nvm_install_update_input *install; 2500 struct hwrm_nvm_install_update_output *resp; 2501 struct hwrm_nvm_modify_input *modify; 2502 struct bnxt *bp = netdev_priv(dev); 2503 bool defrag_attempted = false; 2504 dma_addr_t dma_handle; 2505 u8 *kmem = NULL; 2506 u32 modify_len; 2507 u32 item_len; 2508 u16 index; 2509 int rc; 2510 2511 bnxt_hwrm_fw_set_time(bp); 2512 2513 rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY); 2514 if (rc) 2515 return rc; 2516 2517 /* Try allocating a large DMA buffer first. Older fw will 2518 * cause excessive NVRAM erases when using small blocks. 2519 */ 2520 modify_len = roundup_pow_of_two(fw->size); 2521 modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE); 2522 while (1) { 2523 kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle); 2524 if (!kmem && modify_len > PAGE_SIZE) 2525 modify_len /= 2; 2526 else 2527 break; 2528 } 2529 if (!kmem) { 2530 hwrm_req_drop(bp, modify); 2531 return -ENOMEM; 2532 } 2533 2534 rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE); 2535 if (rc) { 2536 hwrm_req_drop(bp, modify); 2537 return rc; 2538 } 2539 2540 hwrm_req_timeout(bp, modify, bp->hwrm_cmd_max_timeout); 2541 hwrm_req_timeout(bp, install, bp->hwrm_cmd_max_timeout); 2542 2543 hwrm_req_hold(bp, modify); 2544 modify->host_src_addr = cpu_to_le64(dma_handle); 2545 2546 resp = hwrm_req_hold(bp, install); 2547 if ((install_type & 0xffff) == 0) 2548 install_type >>= 16; 2549 install->install_type = cpu_to_le32(install_type); 2550 2551 do { 2552 u32 copied = 0, len = modify_len; 2553 2554 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 2555 BNX_DIR_ORDINAL_FIRST, 2556 BNX_DIR_EXT_NONE, 2557 &index, &item_len, NULL); 2558 if (rc) { 2559 netdev_err(dev, "PKG update area not created in nvram\n"); 2560 break; 2561 } 2562 if (fw->size > item_len) { 2563 netdev_err(dev, "PKG insufficient update area in nvram: %lu\n", 2564 (unsigned long)fw->size); 2565 rc = -EFBIG; 2566 break; 2567 } 2568 2569 modify->dir_idx = cpu_to_le16(index); 2570 2571 if (fw->size > modify_len) 2572 modify->flags = BNXT_NVM_MORE_FLAG; 2573 while (copied < fw->size) { 2574 u32 balance = fw->size - copied; 2575 2576 if (balance <= modify_len) { 2577 len = balance; 2578 if (copied) 2579 modify->flags |= BNXT_NVM_LAST_FLAG; 2580 } 2581 memcpy(kmem, fw->data + copied, len); 2582 modify->len = cpu_to_le32(len); 2583 modify->offset = cpu_to_le32(copied); 2584 rc = hwrm_req_send(bp, modify); 2585 if (rc) 2586 goto pkg_abort; 2587 copied += len; 2588 } 2589 2590 rc = hwrm_req_send_silent(bp, install); 2591 2592 if (defrag_attempted) { 2593 /* We have tried to defragment already in the previous 2594 * iteration. Return with the result for INSTALL_UPDATE 2595 */ 2596 break; 2597 } 2598 2599 if (rc && ((struct hwrm_err_output *)resp)->cmd_err == 2600 NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { 2601 install->flags = 2602 cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 2603 2604 rc = hwrm_req_send_silent(bp, install); 2605 2606 if (rc && ((struct hwrm_err_output *)resp)->cmd_err == 2607 NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) { 2608 /* FW has cleared NVM area, driver will create 2609 * UPDATE directory and try the flash again 2610 */ 2611 defrag_attempted = true; 2612 install->flags = 0; 2613 rc = bnxt_flash_nvram(bp->dev, 2614 BNX_DIR_TYPE_UPDATE, 2615 BNX_DIR_ORDINAL_FIRST, 2616 0, 0, item_len, NULL, 0); 2617 } else if (rc) { 2618 netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc); 2619 } 2620 } else if (rc) { 2621 netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc); 2622 } 2623 } while (defrag_attempted && !rc); 2624 2625 pkg_abort: 2626 hwrm_req_drop(bp, modify); 2627 hwrm_req_drop(bp, install); 2628 2629 if (resp->result) { 2630 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 2631 (s8)resp->result, (int)resp->problem_item); 2632 rc = -ENOPKG; 2633 } 2634 if (rc == -EACCES) 2635 bnxt_print_admin_err(bp); 2636 return rc; 2637 } 2638 2639 static int bnxt_flash_package_from_file(struct net_device *dev, const char *filename, 2640 u32 install_type) 2641 { 2642 const struct firmware *fw; 2643 int rc; 2644 2645 rc = request_firmware(&fw, filename, &dev->dev); 2646 if (rc != 0) { 2647 netdev_err(dev, "PKG error %d requesting file: %s\n", 2648 rc, filename); 2649 return rc; 2650 } 2651 2652 rc = bnxt_flash_package_from_fw_obj(dev, fw, install_type); 2653 2654 release_firmware(fw); 2655 2656 return rc; 2657 } 2658 2659 static int bnxt_flash_device(struct net_device *dev, 2660 struct ethtool_flash *flash) 2661 { 2662 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 2663 netdev_err(dev, "flashdev not supported from a virtual function\n"); 2664 return -EINVAL; 2665 } 2666 2667 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 2668 flash->region > 0xffff) 2669 return bnxt_flash_package_from_file(dev, flash->data, 2670 flash->region); 2671 2672 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 2673 } 2674 2675 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 2676 { 2677 struct hwrm_nvm_get_dir_info_output *output; 2678 struct hwrm_nvm_get_dir_info_input *req; 2679 struct bnxt *bp = netdev_priv(dev); 2680 int rc; 2681 2682 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO); 2683 if (rc) 2684 return rc; 2685 2686 output = hwrm_req_hold(bp, req); 2687 rc = hwrm_req_send(bp, req); 2688 if (!rc) { 2689 *entries = le32_to_cpu(output->entries); 2690 *length = le32_to_cpu(output->entry_length); 2691 } 2692 hwrm_req_drop(bp, req); 2693 return rc; 2694 } 2695 2696 static int bnxt_get_eeprom_len(struct net_device *dev) 2697 { 2698 struct bnxt *bp = netdev_priv(dev); 2699 2700 if (BNXT_VF(bp)) 2701 return 0; 2702 2703 /* The -1 return value allows the entire 32-bit range of offsets to be 2704 * passed via the ethtool command-line utility. 2705 */ 2706 return -1; 2707 } 2708 2709 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 2710 { 2711 struct bnxt *bp = netdev_priv(dev); 2712 int rc; 2713 u32 dir_entries; 2714 u32 entry_length; 2715 u8 *buf; 2716 size_t buflen; 2717 dma_addr_t dma_handle; 2718 struct hwrm_nvm_get_dir_entries_input *req; 2719 2720 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 2721 if (rc != 0) 2722 return rc; 2723 2724 if (!dir_entries || !entry_length) 2725 return -EIO; 2726 2727 /* Insert 2 bytes of directory info (count and size of entries) */ 2728 if (len < 2) 2729 return -EINVAL; 2730 2731 *data++ = dir_entries; 2732 *data++ = entry_length; 2733 len -= 2; 2734 memset(data, 0xff, len); 2735 2736 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES); 2737 if (rc) 2738 return rc; 2739 2740 buflen = dir_entries * entry_length; 2741 buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle); 2742 if (!buf) { 2743 hwrm_req_drop(bp, req); 2744 return -ENOMEM; 2745 } 2746 req->host_dest_addr = cpu_to_le64(dma_handle); 2747 2748 hwrm_req_hold(bp, req); /* hold the slice */ 2749 rc = hwrm_req_send(bp, req); 2750 if (rc == 0) 2751 memcpy(data, buf, len > buflen ? buflen : len); 2752 hwrm_req_drop(bp, req); 2753 return rc; 2754 } 2755 2756 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 2757 u32 length, u8 *data) 2758 { 2759 struct bnxt *bp = netdev_priv(dev); 2760 int rc; 2761 u8 *buf; 2762 dma_addr_t dma_handle; 2763 struct hwrm_nvm_read_input *req; 2764 2765 if (!length) 2766 return -EINVAL; 2767 2768 rc = hwrm_req_init(bp, req, HWRM_NVM_READ); 2769 if (rc) 2770 return rc; 2771 2772 buf = hwrm_req_dma_slice(bp, req, length, &dma_handle); 2773 if (!buf) { 2774 hwrm_req_drop(bp, req); 2775 return -ENOMEM; 2776 } 2777 2778 req->host_dest_addr = cpu_to_le64(dma_handle); 2779 req->dir_idx = cpu_to_le16(index); 2780 req->offset = cpu_to_le32(offset); 2781 req->len = cpu_to_le32(length); 2782 2783 hwrm_req_hold(bp, req); /* hold the slice */ 2784 rc = hwrm_req_send(bp, req); 2785 if (rc == 0) 2786 memcpy(data, buf, length); 2787 hwrm_req_drop(bp, req); 2788 return rc; 2789 } 2790 2791 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 2792 u16 ext, u16 *index, u32 *item_length, 2793 u32 *data_length) 2794 { 2795 struct hwrm_nvm_find_dir_entry_output *output; 2796 struct hwrm_nvm_find_dir_entry_input *req; 2797 struct bnxt *bp = netdev_priv(dev); 2798 int rc; 2799 2800 rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY); 2801 if (rc) 2802 return rc; 2803 2804 req->enables = 0; 2805 req->dir_idx = 0; 2806 req->dir_type = cpu_to_le16(type); 2807 req->dir_ordinal = cpu_to_le16(ordinal); 2808 req->dir_ext = cpu_to_le16(ext); 2809 req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 2810 output = hwrm_req_hold(bp, req); 2811 rc = hwrm_req_send_silent(bp, req); 2812 if (rc == 0) { 2813 if (index) 2814 *index = le16_to_cpu(output->dir_idx); 2815 if (item_length) 2816 *item_length = le32_to_cpu(output->dir_item_length); 2817 if (data_length) 2818 *data_length = le32_to_cpu(output->dir_data_length); 2819 } 2820 hwrm_req_drop(bp, req); 2821 return rc; 2822 } 2823 2824 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 2825 { 2826 char *retval = NULL; 2827 char *p; 2828 char *value; 2829 int field = 0; 2830 2831 if (datalen < 1) 2832 return NULL; 2833 /* null-terminate the log data (removing last '\n'): */ 2834 data[datalen - 1] = 0; 2835 for (p = data; *p != 0; p++) { 2836 field = 0; 2837 retval = NULL; 2838 while (*p != 0 && *p != '\n') { 2839 value = p; 2840 while (*p != 0 && *p != '\t' && *p != '\n') 2841 p++; 2842 if (field == desired_field) 2843 retval = value; 2844 if (*p != '\t') 2845 break; 2846 *p = 0; 2847 field++; 2848 p++; 2849 } 2850 if (*p == 0) 2851 break; 2852 *p = 0; 2853 } 2854 return retval; 2855 } 2856 2857 int bnxt_get_pkginfo(struct net_device *dev, char *ver, int size) 2858 { 2859 struct bnxt *bp = netdev_priv(dev); 2860 u16 index = 0; 2861 char *pkgver; 2862 u32 pkglen; 2863 u8 *pkgbuf; 2864 int rc; 2865 2866 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 2867 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 2868 &index, NULL, &pkglen); 2869 if (rc) 2870 return rc; 2871 2872 pkgbuf = kzalloc(pkglen, GFP_KERNEL); 2873 if (!pkgbuf) { 2874 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n", 2875 pkglen); 2876 return -ENOMEM; 2877 } 2878 2879 rc = bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf); 2880 if (rc) 2881 goto err; 2882 2883 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf, 2884 pkglen); 2885 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) 2886 strscpy(ver, pkgver, size); 2887 else 2888 rc = -ENOENT; 2889 2890 err: 2891 kfree(pkgbuf); 2892 2893 return rc; 2894 } 2895 2896 static void bnxt_get_pkgver(struct net_device *dev) 2897 { 2898 struct bnxt *bp = netdev_priv(dev); 2899 char buf[FW_VER_STR_LEN]; 2900 int len; 2901 2902 if (!bnxt_get_pkginfo(dev, buf, sizeof(buf))) { 2903 len = strlen(bp->fw_ver_str); 2904 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1, 2905 "/pkg %s", buf); 2906 } 2907 } 2908 2909 static int bnxt_get_eeprom(struct net_device *dev, 2910 struct ethtool_eeprom *eeprom, 2911 u8 *data) 2912 { 2913 u32 index; 2914 u32 offset; 2915 2916 if (eeprom->offset == 0) /* special offset value to get directory */ 2917 return bnxt_get_nvram_directory(dev, eeprom->len, data); 2918 2919 index = eeprom->offset >> 24; 2920 offset = eeprom->offset & 0xffffff; 2921 2922 if (index == 0) { 2923 netdev_err(dev, "unsupported index value: %d\n", index); 2924 return -EINVAL; 2925 } 2926 2927 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 2928 } 2929 2930 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 2931 { 2932 struct hwrm_nvm_erase_dir_entry_input *req; 2933 struct bnxt *bp = netdev_priv(dev); 2934 int rc; 2935 2936 rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY); 2937 if (rc) 2938 return rc; 2939 2940 req->dir_idx = cpu_to_le16(index); 2941 return hwrm_req_send(bp, req); 2942 } 2943 2944 static int bnxt_set_eeprom(struct net_device *dev, 2945 struct ethtool_eeprom *eeprom, 2946 u8 *data) 2947 { 2948 struct bnxt *bp = netdev_priv(dev); 2949 u8 index, dir_op; 2950 u16 type, ext, ordinal, attr; 2951 2952 if (!BNXT_PF(bp)) { 2953 netdev_err(dev, "NVM write not supported from a virtual function\n"); 2954 return -EINVAL; 2955 } 2956 2957 type = eeprom->magic >> 16; 2958 2959 if (type == 0xffff) { /* special value for directory operations */ 2960 index = eeprom->magic & 0xff; 2961 dir_op = eeprom->magic >> 8; 2962 if (index == 0) 2963 return -EINVAL; 2964 switch (dir_op) { 2965 case 0x0e: /* erase */ 2966 if (eeprom->offset != ~eeprom->magic) 2967 return -EINVAL; 2968 return bnxt_erase_nvram_directory(dev, index - 1); 2969 default: 2970 return -EINVAL; 2971 } 2972 } 2973 2974 /* Create or re-write an NVM item: */ 2975 if (bnxt_dir_type_is_executable(type)) 2976 return -EOPNOTSUPP; 2977 ext = eeprom->magic & 0xffff; 2978 ordinal = eeprom->offset >> 16; 2979 attr = eeprom->offset & 0xffff; 2980 2981 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data, 2982 eeprom->len); 2983 } 2984 2985 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 2986 { 2987 struct bnxt *bp = netdev_priv(dev); 2988 struct ethtool_eee *eee = &bp->eee; 2989 struct bnxt_link_info *link_info = &bp->link_info; 2990 u32 advertising; 2991 int rc = 0; 2992 2993 if (!BNXT_PHY_CFG_ABLE(bp)) 2994 return -EOPNOTSUPP; 2995 2996 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 2997 return -EOPNOTSUPP; 2998 2999 mutex_lock(&bp->link_lock); 3000 advertising = _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 3001 if (!edata->eee_enabled) 3002 goto eee_ok; 3003 3004 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 3005 netdev_warn(dev, "EEE requires autoneg\n"); 3006 rc = -EINVAL; 3007 goto eee_exit; 3008 } 3009 if (edata->tx_lpi_enabled) { 3010 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 3011 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 3012 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 3013 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 3014 rc = -EINVAL; 3015 goto eee_exit; 3016 } else if (!bp->lpi_tmr_hi) { 3017 edata->tx_lpi_timer = eee->tx_lpi_timer; 3018 } 3019 } 3020 if (!edata->advertised) { 3021 edata->advertised = advertising & eee->supported; 3022 } else if (edata->advertised & ~advertising) { 3023 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 3024 edata->advertised, advertising); 3025 rc = -EINVAL; 3026 goto eee_exit; 3027 } 3028 3029 eee->advertised = edata->advertised; 3030 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 3031 eee->tx_lpi_timer = edata->tx_lpi_timer; 3032 eee_ok: 3033 eee->eee_enabled = edata->eee_enabled; 3034 3035 if (netif_running(dev)) 3036 rc = bnxt_hwrm_set_link_setting(bp, false, true); 3037 3038 eee_exit: 3039 mutex_unlock(&bp->link_lock); 3040 return rc; 3041 } 3042 3043 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 3044 { 3045 struct bnxt *bp = netdev_priv(dev); 3046 3047 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 3048 return -EOPNOTSUPP; 3049 3050 *edata = bp->eee; 3051 if (!bp->eee.eee_enabled) { 3052 /* Preserve tx_lpi_timer so that the last value will be used 3053 * by default when it is re-enabled. 3054 */ 3055 edata->advertised = 0; 3056 edata->tx_lpi_enabled = 0; 3057 } 3058 3059 if (!bp->eee.eee_active) 3060 edata->lp_advertised = 0; 3061 3062 return 0; 3063 } 3064 3065 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 3066 u16 page_number, u16 start_addr, 3067 u16 data_length, u8 *buf) 3068 { 3069 struct hwrm_port_phy_i2c_read_output *output; 3070 struct hwrm_port_phy_i2c_read_input *req; 3071 int rc, byte_offset = 0; 3072 3073 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ); 3074 if (rc) 3075 return rc; 3076 3077 output = hwrm_req_hold(bp, req); 3078 req->i2c_slave_addr = i2c_addr; 3079 req->page_number = cpu_to_le16(page_number); 3080 req->port_id = cpu_to_le16(bp->pf.port_id); 3081 do { 3082 u16 xfer_size; 3083 3084 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 3085 data_length -= xfer_size; 3086 req->page_offset = cpu_to_le16(start_addr + byte_offset); 3087 req->data_length = xfer_size; 3088 req->enables = cpu_to_le32(start_addr + byte_offset ? 3089 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); 3090 rc = hwrm_req_send(bp, req); 3091 if (!rc) 3092 memcpy(buf + byte_offset, output->data, xfer_size); 3093 byte_offset += xfer_size; 3094 } while (!rc && data_length > 0); 3095 hwrm_req_drop(bp, req); 3096 3097 return rc; 3098 } 3099 3100 static int bnxt_get_module_info(struct net_device *dev, 3101 struct ethtool_modinfo *modinfo) 3102 { 3103 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1]; 3104 struct bnxt *bp = netdev_priv(dev); 3105 int rc; 3106 3107 /* No point in going further if phy status indicates 3108 * module is not inserted or if it is powered down or 3109 * if it is of type 10GBase-T 3110 */ 3111 if (bp->link_info.module_status > 3112 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 3113 return -EOPNOTSUPP; 3114 3115 /* This feature is not supported in older firmware versions */ 3116 if (bp->hwrm_spec_code < 0x10202) 3117 return -EOPNOTSUPP; 3118 3119 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 3120 SFF_DIAG_SUPPORT_OFFSET + 1, 3121 data); 3122 if (!rc) { 3123 u8 module_id = data[0]; 3124 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET]; 3125 3126 switch (module_id) { 3127 case SFF_MODULE_ID_SFP: 3128 modinfo->type = ETH_MODULE_SFF_8472; 3129 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3130 if (!diag_supported) 3131 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 3132 break; 3133 case SFF_MODULE_ID_QSFP: 3134 case SFF_MODULE_ID_QSFP_PLUS: 3135 modinfo->type = ETH_MODULE_SFF_8436; 3136 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 3137 break; 3138 case SFF_MODULE_ID_QSFP28: 3139 modinfo->type = ETH_MODULE_SFF_8636; 3140 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 3141 break; 3142 default: 3143 rc = -EOPNOTSUPP; 3144 break; 3145 } 3146 } 3147 return rc; 3148 } 3149 3150 static int bnxt_get_module_eeprom(struct net_device *dev, 3151 struct ethtool_eeprom *eeprom, 3152 u8 *data) 3153 { 3154 struct bnxt *bp = netdev_priv(dev); 3155 u16 start = eeprom->offset, length = eeprom->len; 3156 int rc = 0; 3157 3158 memset(data, 0, eeprom->len); 3159 3160 /* Read A0 portion of the EEPROM */ 3161 if (start < ETH_MODULE_SFF_8436_LEN) { 3162 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 3163 length = ETH_MODULE_SFF_8436_LEN - start; 3164 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 3165 start, length, data); 3166 if (rc) 3167 return rc; 3168 start += length; 3169 data += length; 3170 length = eeprom->len - length; 3171 } 3172 3173 /* Read A2 portion of the EEPROM */ 3174 if (length) { 3175 start -= ETH_MODULE_SFF_8436_LEN; 3176 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0, 3177 start, length, data); 3178 } 3179 return rc; 3180 } 3181 3182 static int bnxt_nway_reset(struct net_device *dev) 3183 { 3184 int rc = 0; 3185 3186 struct bnxt *bp = netdev_priv(dev); 3187 struct bnxt_link_info *link_info = &bp->link_info; 3188 3189 if (!BNXT_PHY_CFG_ABLE(bp)) 3190 return -EOPNOTSUPP; 3191 3192 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 3193 return -EINVAL; 3194 3195 if (netif_running(dev)) 3196 rc = bnxt_hwrm_set_link_setting(bp, true, false); 3197 3198 return rc; 3199 } 3200 3201 static int bnxt_set_phys_id(struct net_device *dev, 3202 enum ethtool_phys_id_state state) 3203 { 3204 struct hwrm_port_led_cfg_input *req; 3205 struct bnxt *bp = netdev_priv(dev); 3206 struct bnxt_pf_info *pf = &bp->pf; 3207 struct bnxt_led_cfg *led_cfg; 3208 u8 led_state; 3209 __le16 duration; 3210 int rc, i; 3211 3212 if (!bp->num_leds || BNXT_VF(bp)) 3213 return -EOPNOTSUPP; 3214 3215 if (state == ETHTOOL_ID_ACTIVE) { 3216 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 3217 duration = cpu_to_le16(500); 3218 } else if (state == ETHTOOL_ID_INACTIVE) { 3219 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 3220 duration = cpu_to_le16(0); 3221 } else { 3222 return -EINVAL; 3223 } 3224 rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG); 3225 if (rc) 3226 return rc; 3227 3228 req->port_id = cpu_to_le16(pf->port_id); 3229 req->num_leds = bp->num_leds; 3230 led_cfg = (struct bnxt_led_cfg *)&req->led0_id; 3231 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 3232 req->enables |= BNXT_LED_DFLT_ENABLES(i); 3233 led_cfg->led_id = bp->leds[i].led_id; 3234 led_cfg->led_state = led_state; 3235 led_cfg->led_blink_on = duration; 3236 led_cfg->led_blink_off = duration; 3237 led_cfg->led_group_id = bp->leds[i].led_group_id; 3238 } 3239 return hwrm_req_send(bp, req); 3240 } 3241 3242 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 3243 { 3244 struct hwrm_selftest_irq_input *req; 3245 int rc; 3246 3247 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ); 3248 if (rc) 3249 return rc; 3250 3251 req->cmpl_ring = cpu_to_le16(cmpl_ring); 3252 return hwrm_req_send(bp, req); 3253 } 3254 3255 static int bnxt_test_irq(struct bnxt *bp) 3256 { 3257 int i; 3258 3259 for (i = 0; i < bp->cp_nr_rings; i++) { 3260 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 3261 int rc; 3262 3263 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 3264 if (rc) 3265 return rc; 3266 } 3267 return 0; 3268 } 3269 3270 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 3271 { 3272 struct hwrm_port_mac_cfg_input *req; 3273 int rc; 3274 3275 rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG); 3276 if (rc) 3277 return rc; 3278 3279 req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 3280 if (enable) 3281 req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 3282 else 3283 req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 3284 return hwrm_req_send(bp, req); 3285 } 3286 3287 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds) 3288 { 3289 struct hwrm_port_phy_qcaps_output *resp; 3290 struct hwrm_port_phy_qcaps_input *req; 3291 int rc; 3292 3293 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS); 3294 if (rc) 3295 return rc; 3296 3297 resp = hwrm_req_hold(bp, req); 3298 rc = hwrm_req_send(bp, req); 3299 if (!rc) 3300 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode); 3301 3302 hwrm_req_drop(bp, req); 3303 return rc; 3304 } 3305 3306 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 3307 struct hwrm_port_phy_cfg_input *req) 3308 { 3309 struct bnxt_link_info *link_info = &bp->link_info; 3310 u16 fw_advertising; 3311 u16 fw_speed; 3312 int rc; 3313 3314 if (!link_info->autoneg || 3315 (bp->phy_flags & BNXT_PHY_FL_AN_PHY_LPBK)) 3316 return 0; 3317 3318 rc = bnxt_query_force_speeds(bp, &fw_advertising); 3319 if (rc) 3320 return rc; 3321 3322 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 3323 if (bp->link_info.link_up) 3324 fw_speed = bp->link_info.link_speed; 3325 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 3326 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 3327 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 3328 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 3329 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 3330 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 3331 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 3332 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 3333 3334 req->force_link_speed = cpu_to_le16(fw_speed); 3335 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 3336 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 3337 rc = hwrm_req_send(bp, req); 3338 req->flags = 0; 3339 req->force_link_speed = cpu_to_le16(0); 3340 return rc; 3341 } 3342 3343 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext) 3344 { 3345 struct hwrm_port_phy_cfg_input *req; 3346 int rc; 3347 3348 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 3349 if (rc) 3350 return rc; 3351 3352 /* prevent bnxt_disable_an_for_lpbk() from consuming the request */ 3353 hwrm_req_hold(bp, req); 3354 3355 if (enable) { 3356 bnxt_disable_an_for_lpbk(bp, req); 3357 if (ext) 3358 req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL; 3359 else 3360 req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 3361 } else { 3362 req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 3363 } 3364 req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 3365 rc = hwrm_req_send(bp, req); 3366 hwrm_req_drop(bp, req); 3367 return rc; 3368 } 3369 3370 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 3371 u32 raw_cons, int pkt_size) 3372 { 3373 struct bnxt_napi *bnapi = cpr->bnapi; 3374 struct bnxt_rx_ring_info *rxr; 3375 struct bnxt_sw_rx_bd *rx_buf; 3376 struct rx_cmp *rxcmp; 3377 u16 cp_cons, cons; 3378 u8 *data; 3379 u32 len; 3380 int i; 3381 3382 rxr = bnapi->rx_ring; 3383 cp_cons = RING_CMP(raw_cons); 3384 rxcmp = (struct rx_cmp *) 3385 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 3386 cons = rxcmp->rx_cmp_opaque; 3387 rx_buf = &rxr->rx_buf_ring[cons]; 3388 data = rx_buf->data_ptr; 3389 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 3390 if (len != pkt_size) 3391 return -EIO; 3392 i = ETH_ALEN; 3393 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 3394 return -EIO; 3395 i += ETH_ALEN; 3396 for ( ; i < pkt_size; i++) { 3397 if (data[i] != (u8)(i & 0xff)) 3398 return -EIO; 3399 } 3400 return 0; 3401 } 3402 3403 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 3404 int pkt_size) 3405 { 3406 struct tx_cmp *txcmp; 3407 int rc = -EIO; 3408 u32 raw_cons; 3409 u32 cons; 3410 int i; 3411 3412 raw_cons = cpr->cp_raw_cons; 3413 for (i = 0; i < 200; i++) { 3414 cons = RING_CMP(raw_cons); 3415 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 3416 3417 if (!TX_CMP_VALID(txcmp, raw_cons)) { 3418 udelay(5); 3419 continue; 3420 } 3421 3422 /* The valid test of the entry must be done first before 3423 * reading any further. 3424 */ 3425 dma_rmb(); 3426 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 3427 rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size); 3428 raw_cons = NEXT_RAW_CMP(raw_cons); 3429 raw_cons = NEXT_RAW_CMP(raw_cons); 3430 break; 3431 } 3432 raw_cons = NEXT_RAW_CMP(raw_cons); 3433 } 3434 cpr->cp_raw_cons = raw_cons; 3435 return rc; 3436 } 3437 3438 static int bnxt_run_loopback(struct bnxt *bp) 3439 { 3440 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 3441 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0]; 3442 struct bnxt_cp_ring_info *cpr; 3443 int pkt_size, i = 0; 3444 struct sk_buff *skb; 3445 dma_addr_t map; 3446 u8 *data; 3447 int rc; 3448 3449 cpr = &rxr->bnapi->cp_ring; 3450 if (bp->flags & BNXT_FLAG_CHIP_P5) 3451 cpr = cpr->cp_ring_arr[BNXT_RX_HDL]; 3452 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 3453 skb = netdev_alloc_skb(bp->dev, pkt_size); 3454 if (!skb) 3455 return -ENOMEM; 3456 data = skb_put(skb, pkt_size); 3457 eth_broadcast_addr(data); 3458 i += ETH_ALEN; 3459 ether_addr_copy(&data[i], bp->dev->dev_addr); 3460 i += ETH_ALEN; 3461 for ( ; i < pkt_size; i++) 3462 data[i] = (u8)(i & 0xff); 3463 3464 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 3465 DMA_TO_DEVICE); 3466 if (dma_mapping_error(&bp->pdev->dev, map)) { 3467 dev_kfree_skb(skb); 3468 return -EIO; 3469 } 3470 bnxt_xmit_bd(bp, txr, map, pkt_size); 3471 3472 /* Sync BD data before updating doorbell */ 3473 wmb(); 3474 3475 bnxt_db_write(bp, &txr->tx_db, txr->tx_prod); 3476 rc = bnxt_poll_loopback(bp, cpr, pkt_size); 3477 3478 dma_unmap_single(&bp->pdev->dev, map, pkt_size, DMA_TO_DEVICE); 3479 dev_kfree_skb(skb); 3480 return rc; 3481 } 3482 3483 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 3484 { 3485 struct hwrm_selftest_exec_output *resp; 3486 struct hwrm_selftest_exec_input *req; 3487 int rc; 3488 3489 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC); 3490 if (rc) 3491 return rc; 3492 3493 hwrm_req_timeout(bp, req, bp->test_info->timeout); 3494 req->flags = test_mask; 3495 3496 resp = hwrm_req_hold(bp, req); 3497 rc = hwrm_req_send(bp, req); 3498 *test_results = resp->test_success; 3499 hwrm_req_drop(bp, req); 3500 return rc; 3501 } 3502 3503 #define BNXT_DRV_TESTS 4 3504 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 3505 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 3506 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 3507 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3) 3508 3509 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 3510 u64 *buf) 3511 { 3512 struct bnxt *bp = netdev_priv(dev); 3513 bool do_ext_lpbk = false; 3514 bool offline = false; 3515 u8 test_results = 0; 3516 u8 test_mask = 0; 3517 int rc = 0, i; 3518 3519 if (!bp->num_tests || !BNXT_PF(bp)) 3520 return; 3521 memset(buf, 0, sizeof(u64) * bp->num_tests); 3522 if (!netif_running(dev)) { 3523 etest->flags |= ETH_TEST_FL_FAILED; 3524 return; 3525 } 3526 3527 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) && 3528 (bp->phy_flags & BNXT_PHY_FL_EXT_LPBK)) 3529 do_ext_lpbk = true; 3530 3531 if (etest->flags & ETH_TEST_FL_OFFLINE) { 3532 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) { 3533 etest->flags |= ETH_TEST_FL_FAILED; 3534 netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n"); 3535 return; 3536 } 3537 offline = true; 3538 } 3539 3540 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 3541 u8 bit_val = 1 << i; 3542 3543 if (!(bp->test_info->offline_mask & bit_val)) 3544 test_mask |= bit_val; 3545 else if (offline) 3546 test_mask |= bit_val; 3547 } 3548 if (!offline) { 3549 bnxt_run_fw_tests(bp, test_mask, &test_results); 3550 } else { 3551 rc = bnxt_close_nic(bp, false, false); 3552 if (rc) 3553 return; 3554 bnxt_run_fw_tests(bp, test_mask, &test_results); 3555 3556 buf[BNXT_MACLPBK_TEST_IDX] = 1; 3557 bnxt_hwrm_mac_loopback(bp, true); 3558 msleep(250); 3559 rc = bnxt_half_open_nic(bp); 3560 if (rc) { 3561 bnxt_hwrm_mac_loopback(bp, false); 3562 etest->flags |= ETH_TEST_FL_FAILED; 3563 return; 3564 } 3565 if (bnxt_run_loopback(bp)) 3566 etest->flags |= ETH_TEST_FL_FAILED; 3567 else 3568 buf[BNXT_MACLPBK_TEST_IDX] = 0; 3569 3570 bnxt_hwrm_mac_loopback(bp, false); 3571 bnxt_hwrm_phy_loopback(bp, true, false); 3572 msleep(1000); 3573 if (bnxt_run_loopback(bp)) { 3574 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 3575 etest->flags |= ETH_TEST_FL_FAILED; 3576 } 3577 if (do_ext_lpbk) { 3578 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; 3579 bnxt_hwrm_phy_loopback(bp, true, true); 3580 msleep(1000); 3581 if (bnxt_run_loopback(bp)) { 3582 buf[BNXT_EXTLPBK_TEST_IDX] = 1; 3583 etest->flags |= ETH_TEST_FL_FAILED; 3584 } 3585 } 3586 bnxt_hwrm_phy_loopback(bp, false, false); 3587 bnxt_half_close_nic(bp); 3588 rc = bnxt_open_nic(bp, false, true); 3589 } 3590 if (rc || bnxt_test_irq(bp)) { 3591 buf[BNXT_IRQ_TEST_IDX] = 1; 3592 etest->flags |= ETH_TEST_FL_FAILED; 3593 } 3594 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 3595 u8 bit_val = 1 << i; 3596 3597 if ((test_mask & bit_val) && !(test_results & bit_val)) { 3598 buf[i] = 1; 3599 etest->flags |= ETH_TEST_FL_FAILED; 3600 } 3601 } 3602 } 3603 3604 static int bnxt_reset(struct net_device *dev, u32 *flags) 3605 { 3606 struct bnxt *bp = netdev_priv(dev); 3607 bool reload = false; 3608 u32 req = *flags; 3609 3610 if (!req) 3611 return -EINVAL; 3612 3613 if (!BNXT_PF(bp)) { 3614 netdev_err(dev, "Reset is not supported from a VF\n"); 3615 return -EOPNOTSUPP; 3616 } 3617 3618 if (pci_vfs_assigned(bp->pdev) && 3619 !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) { 3620 netdev_err(dev, 3621 "Reset not allowed when VFs are assigned to VMs\n"); 3622 return -EBUSY; 3623 } 3624 3625 if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) { 3626 /* This feature is not supported in older firmware versions */ 3627 if (bp->hwrm_spec_code >= 0x10803) { 3628 if (!bnxt_firmware_reset_chip(dev)) { 3629 netdev_info(dev, "Firmware reset request successful.\n"); 3630 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) 3631 reload = true; 3632 *flags &= ~BNXT_FW_RESET_CHIP; 3633 } 3634 } else if (req == BNXT_FW_RESET_CHIP) { 3635 return -EOPNOTSUPP; /* only request, fail hard */ 3636 } 3637 } 3638 3639 if (req & BNXT_FW_RESET_AP) { 3640 /* This feature is not supported in older firmware versions */ 3641 if (bp->hwrm_spec_code >= 0x10803) { 3642 if (!bnxt_firmware_reset_ap(dev)) { 3643 netdev_info(dev, "Reset application processor successful.\n"); 3644 reload = true; 3645 *flags &= ~BNXT_FW_RESET_AP; 3646 } 3647 } else if (req == BNXT_FW_RESET_AP) { 3648 return -EOPNOTSUPP; /* only request, fail hard */ 3649 } 3650 } 3651 3652 if (reload) 3653 netdev_info(dev, "Reload driver to complete reset\n"); 3654 3655 return 0; 3656 } 3657 3658 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump) 3659 { 3660 struct bnxt *bp = netdev_priv(dev); 3661 3662 if (dump->flag > BNXT_DUMP_CRASH) { 3663 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n"); 3664 return -EINVAL; 3665 } 3666 3667 if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) { 3668 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n"); 3669 return -EOPNOTSUPP; 3670 } 3671 3672 bp->dump_flag = dump->flag; 3673 return 0; 3674 } 3675 3676 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump) 3677 { 3678 struct bnxt *bp = netdev_priv(dev); 3679 3680 if (bp->hwrm_spec_code < 0x10801) 3681 return -EOPNOTSUPP; 3682 3683 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 | 3684 bp->ver_resp.hwrm_fw_min_8b << 16 | 3685 bp->ver_resp.hwrm_fw_bld_8b << 8 | 3686 bp->ver_resp.hwrm_fw_rsvd_8b; 3687 3688 dump->flag = bp->dump_flag; 3689 dump->len = bnxt_get_coredump_length(bp, bp->dump_flag); 3690 return 0; 3691 } 3692 3693 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump, 3694 void *buf) 3695 { 3696 struct bnxt *bp = netdev_priv(dev); 3697 3698 if (bp->hwrm_spec_code < 0x10801) 3699 return -EOPNOTSUPP; 3700 3701 memset(buf, 0, dump->len); 3702 3703 dump->flag = bp->dump_flag; 3704 return bnxt_get_coredump(bp, dump->flag, buf, &dump->len); 3705 } 3706 3707 static int bnxt_get_ts_info(struct net_device *dev, 3708 struct ethtool_ts_info *info) 3709 { 3710 struct bnxt *bp = netdev_priv(dev); 3711 struct bnxt_ptp_cfg *ptp; 3712 3713 ptp = bp->ptp_cfg; 3714 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 3715 SOF_TIMESTAMPING_RX_SOFTWARE | 3716 SOF_TIMESTAMPING_SOFTWARE; 3717 3718 info->phc_index = -1; 3719 if (!ptp) 3720 return 0; 3721 3722 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE | 3723 SOF_TIMESTAMPING_RX_HARDWARE | 3724 SOF_TIMESTAMPING_RAW_HARDWARE; 3725 if (ptp->ptp_clock) 3726 info->phc_index = ptp_clock_index(ptp->ptp_clock); 3727 3728 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 3729 3730 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 3731 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 3732 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT); 3733 return 0; 3734 } 3735 3736 void bnxt_ethtool_init(struct bnxt *bp) 3737 { 3738 struct hwrm_selftest_qlist_output *resp; 3739 struct hwrm_selftest_qlist_input *req; 3740 struct bnxt_test_info *test_info; 3741 struct net_device *dev = bp->dev; 3742 int i, rc; 3743 3744 if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER)) 3745 bnxt_get_pkgver(dev); 3746 3747 bp->num_tests = 0; 3748 if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp)) 3749 return; 3750 3751 test_info = bp->test_info; 3752 if (!test_info) { 3753 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 3754 if (!test_info) 3755 return; 3756 bp->test_info = test_info; 3757 } 3758 3759 if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST)) 3760 return; 3761 3762 resp = hwrm_req_hold(bp, req); 3763 rc = hwrm_req_send_silent(bp, req); 3764 if (rc) 3765 goto ethtool_init_exit; 3766 3767 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 3768 if (bp->num_tests > BNXT_MAX_TEST) 3769 bp->num_tests = BNXT_MAX_TEST; 3770 3771 test_info->offline_mask = resp->offline_tests; 3772 test_info->timeout = le16_to_cpu(resp->test_timeout); 3773 if (!test_info->timeout) 3774 test_info->timeout = HWRM_CMD_TIMEOUT; 3775 for (i = 0; i < bp->num_tests; i++) { 3776 char *str = test_info->string[i]; 3777 char *fw_str = resp->test0_name + i * 32; 3778 3779 if (i == BNXT_MACLPBK_TEST_IDX) { 3780 strcpy(str, "Mac loopback test (offline)"); 3781 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 3782 strcpy(str, "Phy loopback test (offline)"); 3783 } else if (i == BNXT_EXTLPBK_TEST_IDX) { 3784 strcpy(str, "Ext loopback test (offline)"); 3785 } else if (i == BNXT_IRQ_TEST_IDX) { 3786 strcpy(str, "Interrupt_test (offline)"); 3787 } else { 3788 strlcpy(str, fw_str, ETH_GSTRING_LEN); 3789 strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); 3790 if (test_info->offline_mask & (1 << i)) 3791 strncat(str, " (offline)", 3792 ETH_GSTRING_LEN - strlen(str)); 3793 else 3794 strncat(str, " (online)", 3795 ETH_GSTRING_LEN - strlen(str)); 3796 } 3797 } 3798 3799 ethtool_init_exit: 3800 hwrm_req_drop(bp, req); 3801 } 3802 3803 static void bnxt_get_eth_phy_stats(struct net_device *dev, 3804 struct ethtool_eth_phy_stats *phy_stats) 3805 { 3806 struct bnxt *bp = netdev_priv(dev); 3807 u64 *rx; 3808 3809 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 3810 return; 3811 3812 rx = bp->rx_port_stats_ext.sw_stats; 3813 phy_stats->SymbolErrorDuringCarrier = 3814 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_pcs_symbol_err)); 3815 } 3816 3817 static void bnxt_get_eth_mac_stats(struct net_device *dev, 3818 struct ethtool_eth_mac_stats *mac_stats) 3819 { 3820 struct bnxt *bp = netdev_priv(dev); 3821 u64 *rx, *tx; 3822 3823 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3824 return; 3825 3826 rx = bp->port_stats.sw_stats; 3827 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 3828 3829 mac_stats->FramesReceivedOK = 3830 BNXT_GET_RX_PORT_STATS64(rx, rx_good_frames); 3831 mac_stats->FramesTransmittedOK = 3832 BNXT_GET_TX_PORT_STATS64(tx, tx_good_frames); 3833 mac_stats->FrameCheckSequenceErrors = 3834 BNXT_GET_RX_PORT_STATS64(rx, rx_fcs_err_frames); 3835 mac_stats->AlignmentErrors = 3836 BNXT_GET_RX_PORT_STATS64(rx, rx_align_err_frames); 3837 mac_stats->OutOfRangeLengthField = 3838 BNXT_GET_RX_PORT_STATS64(rx, rx_oor_len_frames); 3839 } 3840 3841 static void bnxt_get_eth_ctrl_stats(struct net_device *dev, 3842 struct ethtool_eth_ctrl_stats *ctrl_stats) 3843 { 3844 struct bnxt *bp = netdev_priv(dev); 3845 u64 *rx; 3846 3847 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3848 return; 3849 3850 rx = bp->port_stats.sw_stats; 3851 ctrl_stats->MACControlFramesReceived = 3852 BNXT_GET_RX_PORT_STATS64(rx, rx_ctrl_frames); 3853 } 3854 3855 static const struct ethtool_rmon_hist_range bnxt_rmon_ranges[] = { 3856 { 0, 64 }, 3857 { 65, 127 }, 3858 { 128, 255 }, 3859 { 256, 511 }, 3860 { 512, 1023 }, 3861 { 1024, 1518 }, 3862 { 1519, 2047 }, 3863 { 2048, 4095 }, 3864 { 4096, 9216 }, 3865 { 9217, 16383 }, 3866 {} 3867 }; 3868 3869 static void bnxt_get_rmon_stats(struct net_device *dev, 3870 struct ethtool_rmon_stats *rmon_stats, 3871 const struct ethtool_rmon_hist_range **ranges) 3872 { 3873 struct bnxt *bp = netdev_priv(dev); 3874 u64 *rx, *tx; 3875 3876 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3877 return; 3878 3879 rx = bp->port_stats.sw_stats; 3880 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 3881 3882 rmon_stats->jabbers = 3883 BNXT_GET_RX_PORT_STATS64(rx, rx_jbr_frames); 3884 rmon_stats->oversize_pkts = 3885 BNXT_GET_RX_PORT_STATS64(rx, rx_ovrsz_frames); 3886 rmon_stats->undersize_pkts = 3887 BNXT_GET_RX_PORT_STATS64(rx, rx_undrsz_frames); 3888 3889 rmon_stats->hist[0] = BNXT_GET_RX_PORT_STATS64(rx, rx_64b_frames); 3890 rmon_stats->hist[1] = BNXT_GET_RX_PORT_STATS64(rx, rx_65b_127b_frames); 3891 rmon_stats->hist[2] = BNXT_GET_RX_PORT_STATS64(rx, rx_128b_255b_frames); 3892 rmon_stats->hist[3] = BNXT_GET_RX_PORT_STATS64(rx, rx_256b_511b_frames); 3893 rmon_stats->hist[4] = 3894 BNXT_GET_RX_PORT_STATS64(rx, rx_512b_1023b_frames); 3895 rmon_stats->hist[5] = 3896 BNXT_GET_RX_PORT_STATS64(rx, rx_1024b_1518b_frames); 3897 rmon_stats->hist[6] = 3898 BNXT_GET_RX_PORT_STATS64(rx, rx_1519b_2047b_frames); 3899 rmon_stats->hist[7] = 3900 BNXT_GET_RX_PORT_STATS64(rx, rx_2048b_4095b_frames); 3901 rmon_stats->hist[8] = 3902 BNXT_GET_RX_PORT_STATS64(rx, rx_4096b_9216b_frames); 3903 rmon_stats->hist[9] = 3904 BNXT_GET_RX_PORT_STATS64(rx, rx_9217b_16383b_frames); 3905 3906 rmon_stats->hist_tx[0] = 3907 BNXT_GET_TX_PORT_STATS64(tx, tx_64b_frames); 3908 rmon_stats->hist_tx[1] = 3909 BNXT_GET_TX_PORT_STATS64(tx, tx_65b_127b_frames); 3910 rmon_stats->hist_tx[2] = 3911 BNXT_GET_TX_PORT_STATS64(tx, tx_128b_255b_frames); 3912 rmon_stats->hist_tx[3] = 3913 BNXT_GET_TX_PORT_STATS64(tx, tx_256b_511b_frames); 3914 rmon_stats->hist_tx[4] = 3915 BNXT_GET_TX_PORT_STATS64(tx, tx_512b_1023b_frames); 3916 rmon_stats->hist_tx[5] = 3917 BNXT_GET_TX_PORT_STATS64(tx, tx_1024b_1518b_frames); 3918 rmon_stats->hist_tx[6] = 3919 BNXT_GET_TX_PORT_STATS64(tx, tx_1519b_2047b_frames); 3920 rmon_stats->hist_tx[7] = 3921 BNXT_GET_TX_PORT_STATS64(tx, tx_2048b_4095b_frames); 3922 rmon_stats->hist_tx[8] = 3923 BNXT_GET_TX_PORT_STATS64(tx, tx_4096b_9216b_frames); 3924 rmon_stats->hist_tx[9] = 3925 BNXT_GET_TX_PORT_STATS64(tx, tx_9217b_16383b_frames); 3926 3927 *ranges = bnxt_rmon_ranges; 3928 } 3929 3930 void bnxt_ethtool_free(struct bnxt *bp) 3931 { 3932 kfree(bp->test_info); 3933 bp->test_info = NULL; 3934 } 3935 3936 const struct ethtool_ops bnxt_ethtool_ops = { 3937 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 3938 ETHTOOL_COALESCE_MAX_FRAMES | 3939 ETHTOOL_COALESCE_USECS_IRQ | 3940 ETHTOOL_COALESCE_MAX_FRAMES_IRQ | 3941 ETHTOOL_COALESCE_STATS_BLOCK_USECS | 3942 ETHTOOL_COALESCE_USE_ADAPTIVE_RX | 3943 ETHTOOL_COALESCE_USE_CQE, 3944 .get_link_ksettings = bnxt_get_link_ksettings, 3945 .set_link_ksettings = bnxt_set_link_ksettings, 3946 .get_fec_stats = bnxt_get_fec_stats, 3947 .get_fecparam = bnxt_get_fecparam, 3948 .set_fecparam = bnxt_set_fecparam, 3949 .get_pause_stats = bnxt_get_pause_stats, 3950 .get_pauseparam = bnxt_get_pauseparam, 3951 .set_pauseparam = bnxt_set_pauseparam, 3952 .get_drvinfo = bnxt_get_drvinfo, 3953 .get_regs_len = bnxt_get_regs_len, 3954 .get_regs = bnxt_get_regs, 3955 .get_wol = bnxt_get_wol, 3956 .set_wol = bnxt_set_wol, 3957 .get_coalesce = bnxt_get_coalesce, 3958 .set_coalesce = bnxt_set_coalesce, 3959 .get_msglevel = bnxt_get_msglevel, 3960 .set_msglevel = bnxt_set_msglevel, 3961 .get_sset_count = bnxt_get_sset_count, 3962 .get_strings = bnxt_get_strings, 3963 .get_ethtool_stats = bnxt_get_ethtool_stats, 3964 .set_ringparam = bnxt_set_ringparam, 3965 .get_ringparam = bnxt_get_ringparam, 3966 .get_channels = bnxt_get_channels, 3967 .set_channels = bnxt_set_channels, 3968 .get_rxnfc = bnxt_get_rxnfc, 3969 .set_rxnfc = bnxt_set_rxnfc, 3970 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 3971 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 3972 .get_rxfh = bnxt_get_rxfh, 3973 .set_rxfh = bnxt_set_rxfh, 3974 .flash_device = bnxt_flash_device, 3975 .get_eeprom_len = bnxt_get_eeprom_len, 3976 .get_eeprom = bnxt_get_eeprom, 3977 .set_eeprom = bnxt_set_eeprom, 3978 .get_link = bnxt_get_link, 3979 .get_eee = bnxt_get_eee, 3980 .set_eee = bnxt_set_eee, 3981 .get_module_info = bnxt_get_module_info, 3982 .get_module_eeprom = bnxt_get_module_eeprom, 3983 .nway_reset = bnxt_nway_reset, 3984 .set_phys_id = bnxt_set_phys_id, 3985 .self_test = bnxt_self_test, 3986 .get_ts_info = bnxt_get_ts_info, 3987 .reset = bnxt_reset, 3988 .set_dump = bnxt_set_dump, 3989 .get_dump_flag = bnxt_get_dump_flag, 3990 .get_dump_data = bnxt_get_dump_data, 3991 .get_eth_phy_stats = bnxt_get_eth_phy_stats, 3992 .get_eth_mac_stats = bnxt_get_eth_mac_stats, 3993 .get_eth_ctrl_stats = bnxt_get_eth_ctrl_stats, 3994 .get_rmon_stats = bnxt_get_rmon_stats, 3995 }; 3996