1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/ethtool_netlink.h> 15 #include <linux/linkmode.h> 16 #include <linux/interrupt.h> 17 #include <linux/pci.h> 18 #include <linux/etherdevice.h> 19 #include <linux/crc32.h> 20 #include <linux/firmware.h> 21 #include <linux/utsname.h> 22 #include <linux/time.h> 23 #include <linux/ptp_clock_kernel.h> 24 #include <linux/net_tstamp.h> 25 #include <linux/timecounter.h> 26 #include <net/netlink.h> 27 #include "bnxt_hsi.h" 28 #include "bnxt.h" 29 #include "bnxt_hwrm.h" 30 #include "bnxt_ulp.h" 31 #include "bnxt_xdp.h" 32 #include "bnxt_ptp.h" 33 #include "bnxt_ethtool.h" 34 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 35 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 36 #include "bnxt_coredump.h" 37 38 #define BNXT_NVM_ERR_MSG(dev, extack, msg) \ 39 do { \ 40 if (extack) \ 41 NL_SET_ERR_MSG_MOD(extack, msg); \ 42 netdev_err(dev, "%s\n", msg); \ 43 } while (0) 44 45 static u32 bnxt_get_msglevel(struct net_device *dev) 46 { 47 struct bnxt *bp = netdev_priv(dev); 48 49 return bp->msg_enable; 50 } 51 52 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 53 { 54 struct bnxt *bp = netdev_priv(dev); 55 56 bp->msg_enable = value; 57 } 58 59 static int bnxt_get_coalesce(struct net_device *dev, 60 struct ethtool_coalesce *coal, 61 struct kernel_ethtool_coalesce *kernel_coal, 62 struct netlink_ext_ack *extack) 63 { 64 struct bnxt *bp = netdev_priv(dev); 65 struct bnxt_coal *hw_coal; 66 u16 mult; 67 68 memset(coal, 0, sizeof(*coal)); 69 70 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; 71 72 hw_coal = &bp->rx_coal; 73 mult = hw_coal->bufs_per_record; 74 coal->rx_coalesce_usecs = hw_coal->coal_ticks; 75 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; 76 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 77 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 78 if (hw_coal->flags & 79 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 80 kernel_coal->use_cqe_mode_rx = true; 81 82 hw_coal = &bp->tx_coal; 83 mult = hw_coal->bufs_per_record; 84 coal->tx_coalesce_usecs = hw_coal->coal_ticks; 85 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult; 86 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 87 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 88 if (hw_coal->flags & 89 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 90 kernel_coal->use_cqe_mode_tx = true; 91 92 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 93 94 return 0; 95 } 96 97 static int bnxt_set_coalesce(struct net_device *dev, 98 struct ethtool_coalesce *coal, 99 struct kernel_ethtool_coalesce *kernel_coal, 100 struct netlink_ext_ack *extack) 101 { 102 struct bnxt *bp = netdev_priv(dev); 103 bool update_stats = false; 104 struct bnxt_coal *hw_coal; 105 int rc = 0; 106 u16 mult; 107 108 if (coal->use_adaptive_rx_coalesce) { 109 bp->flags |= BNXT_FLAG_DIM; 110 } else { 111 if (bp->flags & BNXT_FLAG_DIM) { 112 bp->flags &= ~(BNXT_FLAG_DIM); 113 goto reset_coalesce; 114 } 115 } 116 117 if ((kernel_coal->use_cqe_mode_rx || kernel_coal->use_cqe_mode_tx) && 118 !(bp->coal_cap.cmpl_params & 119 RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_TIMER_RESET)) 120 return -EOPNOTSUPP; 121 122 hw_coal = &bp->rx_coal; 123 mult = hw_coal->bufs_per_record; 124 hw_coal->coal_ticks = coal->rx_coalesce_usecs; 125 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult; 126 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq; 127 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult; 128 hw_coal->flags &= 129 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 130 if (kernel_coal->use_cqe_mode_rx) 131 hw_coal->flags |= 132 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 133 134 hw_coal = &bp->tx_coal; 135 mult = hw_coal->bufs_per_record; 136 hw_coal->coal_ticks = coal->tx_coalesce_usecs; 137 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult; 138 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq; 139 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult; 140 hw_coal->flags &= 141 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 142 if (kernel_coal->use_cqe_mode_tx) 143 hw_coal->flags |= 144 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 145 146 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 147 u32 stats_ticks = coal->stats_block_coalesce_usecs; 148 149 /* Allow 0, which means disable. */ 150 if (stats_ticks) 151 stats_ticks = clamp_t(u32, stats_ticks, 152 BNXT_MIN_STATS_COAL_TICKS, 153 BNXT_MAX_STATS_COAL_TICKS); 154 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 155 bp->stats_coal_ticks = stats_ticks; 156 if (bp->stats_coal_ticks) 157 bp->current_interval = 158 bp->stats_coal_ticks * HZ / 1000000; 159 else 160 bp->current_interval = BNXT_TIMER_INTERVAL; 161 update_stats = true; 162 } 163 164 reset_coalesce: 165 if (test_bit(BNXT_STATE_OPEN, &bp->state)) { 166 if (update_stats) { 167 rc = bnxt_close_nic(bp, true, false); 168 if (!rc) 169 rc = bnxt_open_nic(bp, true, false); 170 } else { 171 rc = bnxt_hwrm_set_coal(bp); 172 } 173 } 174 175 return rc; 176 } 177 178 static const char * const bnxt_ring_rx_stats_str[] = { 179 "rx_ucast_packets", 180 "rx_mcast_packets", 181 "rx_bcast_packets", 182 "rx_discards", 183 "rx_errors", 184 "rx_ucast_bytes", 185 "rx_mcast_bytes", 186 "rx_bcast_bytes", 187 }; 188 189 static const char * const bnxt_ring_tx_stats_str[] = { 190 "tx_ucast_packets", 191 "tx_mcast_packets", 192 "tx_bcast_packets", 193 "tx_errors", 194 "tx_discards", 195 "tx_ucast_bytes", 196 "tx_mcast_bytes", 197 "tx_bcast_bytes", 198 }; 199 200 static const char * const bnxt_ring_tpa_stats_str[] = { 201 "tpa_packets", 202 "tpa_bytes", 203 "tpa_events", 204 "tpa_aborts", 205 }; 206 207 static const char * const bnxt_ring_tpa2_stats_str[] = { 208 "rx_tpa_eligible_pkt", 209 "rx_tpa_eligible_bytes", 210 "rx_tpa_pkt", 211 "rx_tpa_bytes", 212 "rx_tpa_errors", 213 "rx_tpa_events", 214 }; 215 216 static const char * const bnxt_rx_sw_stats_str[] = { 217 "rx_l4_csum_errors", 218 "rx_resets", 219 "rx_buf_errors", 220 }; 221 222 static const char * const bnxt_cmn_sw_stats_str[] = { 223 "missed_irqs", 224 }; 225 226 #define BNXT_RX_STATS_ENTRY(counter) \ 227 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 228 229 #define BNXT_TX_STATS_ENTRY(counter) \ 230 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 231 232 #define BNXT_RX_STATS_EXT_ENTRY(counter) \ 233 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) } 234 235 #define BNXT_TX_STATS_EXT_ENTRY(counter) \ 236 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) } 237 238 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \ 239 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \ 240 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions) 241 242 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \ 243 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \ 244 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions) 245 246 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \ 247 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \ 248 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \ 249 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \ 250 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \ 251 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \ 252 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \ 253 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \ 254 BNXT_RX_STATS_EXT_PFC_ENTRY(7) 255 256 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \ 257 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \ 258 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \ 259 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \ 260 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \ 261 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \ 262 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \ 263 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \ 264 BNXT_TX_STATS_EXT_PFC_ENTRY(7) 265 266 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \ 267 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \ 268 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n) 269 270 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \ 271 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \ 272 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n) 273 274 #define BNXT_RX_STATS_EXT_COS_ENTRIES \ 275 BNXT_RX_STATS_EXT_COS_ENTRY(0), \ 276 BNXT_RX_STATS_EXT_COS_ENTRY(1), \ 277 BNXT_RX_STATS_EXT_COS_ENTRY(2), \ 278 BNXT_RX_STATS_EXT_COS_ENTRY(3), \ 279 BNXT_RX_STATS_EXT_COS_ENTRY(4), \ 280 BNXT_RX_STATS_EXT_COS_ENTRY(5), \ 281 BNXT_RX_STATS_EXT_COS_ENTRY(6), \ 282 BNXT_RX_STATS_EXT_COS_ENTRY(7) \ 283 284 #define BNXT_TX_STATS_EXT_COS_ENTRIES \ 285 BNXT_TX_STATS_EXT_COS_ENTRY(0), \ 286 BNXT_TX_STATS_EXT_COS_ENTRY(1), \ 287 BNXT_TX_STATS_EXT_COS_ENTRY(2), \ 288 BNXT_TX_STATS_EXT_COS_ENTRY(3), \ 289 BNXT_TX_STATS_EXT_COS_ENTRY(4), \ 290 BNXT_TX_STATS_EXT_COS_ENTRY(5), \ 291 BNXT_TX_STATS_EXT_COS_ENTRY(6), \ 292 BNXT_TX_STATS_EXT_COS_ENTRY(7) \ 293 294 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \ 295 BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \ 296 BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n) 297 298 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \ 299 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \ 300 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \ 301 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \ 302 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \ 303 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \ 304 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \ 305 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \ 306 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7) 307 308 #define BNXT_RX_STATS_PRI_ENTRY(counter, n) \ 309 { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \ 310 __stringify(counter##_pri##n) } 311 312 #define BNXT_TX_STATS_PRI_ENTRY(counter, n) \ 313 { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \ 314 __stringify(counter##_pri##n) } 315 316 #define BNXT_RX_STATS_PRI_ENTRIES(counter) \ 317 BNXT_RX_STATS_PRI_ENTRY(counter, 0), \ 318 BNXT_RX_STATS_PRI_ENTRY(counter, 1), \ 319 BNXT_RX_STATS_PRI_ENTRY(counter, 2), \ 320 BNXT_RX_STATS_PRI_ENTRY(counter, 3), \ 321 BNXT_RX_STATS_PRI_ENTRY(counter, 4), \ 322 BNXT_RX_STATS_PRI_ENTRY(counter, 5), \ 323 BNXT_RX_STATS_PRI_ENTRY(counter, 6), \ 324 BNXT_RX_STATS_PRI_ENTRY(counter, 7) 325 326 #define BNXT_TX_STATS_PRI_ENTRIES(counter) \ 327 BNXT_TX_STATS_PRI_ENTRY(counter, 0), \ 328 BNXT_TX_STATS_PRI_ENTRY(counter, 1), \ 329 BNXT_TX_STATS_PRI_ENTRY(counter, 2), \ 330 BNXT_TX_STATS_PRI_ENTRY(counter, 3), \ 331 BNXT_TX_STATS_PRI_ENTRY(counter, 4), \ 332 BNXT_TX_STATS_PRI_ENTRY(counter, 5), \ 333 BNXT_TX_STATS_PRI_ENTRY(counter, 6), \ 334 BNXT_TX_STATS_PRI_ENTRY(counter, 7) 335 336 enum { 337 RX_TOTAL_DISCARDS, 338 TX_TOTAL_DISCARDS, 339 RX_NETPOLL_DISCARDS, 340 }; 341 342 static struct { 343 u64 counter; 344 char string[ETH_GSTRING_LEN]; 345 } bnxt_sw_func_stats[] = { 346 {0, "rx_total_discard_pkts"}, 347 {0, "tx_total_discard_pkts"}, 348 {0, "rx_total_netpoll_discards"}, 349 }; 350 351 #define NUM_RING_RX_SW_STATS ARRAY_SIZE(bnxt_rx_sw_stats_str) 352 #define NUM_RING_CMN_SW_STATS ARRAY_SIZE(bnxt_cmn_sw_stats_str) 353 #define NUM_RING_RX_HW_STATS ARRAY_SIZE(bnxt_ring_rx_stats_str) 354 #define NUM_RING_TX_HW_STATS ARRAY_SIZE(bnxt_ring_tx_stats_str) 355 356 static const struct { 357 long offset; 358 char string[ETH_GSTRING_LEN]; 359 } bnxt_port_stats_arr[] = { 360 BNXT_RX_STATS_ENTRY(rx_64b_frames), 361 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 362 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 363 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 364 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 365 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames), 366 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 367 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 368 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 369 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 370 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 371 BNXT_RX_STATS_ENTRY(rx_total_frames), 372 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 373 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 374 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 375 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 376 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 377 BNXT_RX_STATS_ENTRY(rx_pause_frames), 378 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 379 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 380 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 381 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 382 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 383 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 384 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 385 BNXT_RX_STATS_ENTRY(rx_good_frames), 386 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 387 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 388 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 389 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 390 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 391 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 392 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 393 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 394 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 395 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 396 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 397 BNXT_RX_STATS_ENTRY(rx_bytes), 398 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 399 BNXT_RX_STATS_ENTRY(rx_runt_frames), 400 BNXT_RX_STATS_ENTRY(rx_stat_discard), 401 BNXT_RX_STATS_ENTRY(rx_stat_err), 402 403 BNXT_TX_STATS_ENTRY(tx_64b_frames), 404 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 405 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 406 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 407 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 408 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames), 409 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 410 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames), 411 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 412 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 413 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 414 BNXT_TX_STATS_ENTRY(tx_good_frames), 415 BNXT_TX_STATS_ENTRY(tx_total_frames), 416 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 417 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 418 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 419 BNXT_TX_STATS_ENTRY(tx_pause_frames), 420 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 421 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 422 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 423 BNXT_TX_STATS_ENTRY(tx_err), 424 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 425 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 426 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 427 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 428 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 429 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 430 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 431 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 432 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 433 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 434 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 435 BNXT_TX_STATS_ENTRY(tx_total_collisions), 436 BNXT_TX_STATS_ENTRY(tx_bytes), 437 BNXT_TX_STATS_ENTRY(tx_xthol_frames), 438 BNXT_TX_STATS_ENTRY(tx_stat_discard), 439 BNXT_TX_STATS_ENTRY(tx_stat_error), 440 }; 441 442 static const struct { 443 long offset; 444 char string[ETH_GSTRING_LEN]; 445 } bnxt_port_stats_ext_arr[] = { 446 BNXT_RX_STATS_EXT_ENTRY(link_down_events), 447 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events), 448 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events), 449 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events), 450 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events), 451 BNXT_RX_STATS_EXT_COS_ENTRIES, 452 BNXT_RX_STATS_EXT_PFC_ENTRIES, 453 BNXT_RX_STATS_EXT_ENTRY(rx_bits), 454 BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold), 455 BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err), 456 BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits), 457 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES, 458 BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks), 459 BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks), 460 }; 461 462 static const struct { 463 long offset; 464 char string[ETH_GSTRING_LEN]; 465 } bnxt_tx_port_stats_ext_arr[] = { 466 BNXT_TX_STATS_EXT_COS_ENTRIES, 467 BNXT_TX_STATS_EXT_PFC_ENTRIES, 468 }; 469 470 static const struct { 471 long base_off; 472 char string[ETH_GSTRING_LEN]; 473 } bnxt_rx_bytes_pri_arr[] = { 474 BNXT_RX_STATS_PRI_ENTRIES(rx_bytes), 475 }; 476 477 static const struct { 478 long base_off; 479 char string[ETH_GSTRING_LEN]; 480 } bnxt_rx_pkts_pri_arr[] = { 481 BNXT_RX_STATS_PRI_ENTRIES(rx_packets), 482 }; 483 484 static const struct { 485 long base_off; 486 char string[ETH_GSTRING_LEN]; 487 } bnxt_tx_bytes_pri_arr[] = { 488 BNXT_TX_STATS_PRI_ENTRIES(tx_bytes), 489 }; 490 491 static const struct { 492 long base_off; 493 char string[ETH_GSTRING_LEN]; 494 } bnxt_tx_pkts_pri_arr[] = { 495 BNXT_TX_STATS_PRI_ENTRIES(tx_packets), 496 }; 497 498 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats) 499 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 500 #define BNXT_NUM_STATS_PRI \ 501 (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \ 502 ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \ 503 ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \ 504 ARRAY_SIZE(bnxt_tx_pkts_pri_arr)) 505 506 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp) 507 { 508 if (BNXT_SUPPORTS_TPA(bp)) { 509 if (bp->max_tpa_v2) { 510 if (BNXT_CHIP_P5_THOR(bp)) 511 return BNXT_NUM_TPA_RING_STATS_P5; 512 return BNXT_NUM_TPA_RING_STATS_P5_SR2; 513 } 514 return BNXT_NUM_TPA_RING_STATS; 515 } 516 return 0; 517 } 518 519 static int bnxt_get_num_ring_stats(struct bnxt *bp) 520 { 521 int rx, tx, cmn; 522 523 rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS + 524 bnxt_get_num_tpa_ring_stats(bp); 525 tx = NUM_RING_TX_HW_STATS; 526 cmn = NUM_RING_CMN_SW_STATS; 527 return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings + 528 cmn * bp->cp_nr_rings; 529 } 530 531 static int bnxt_get_num_stats(struct bnxt *bp) 532 { 533 int num_stats = bnxt_get_num_ring_stats(bp); 534 535 num_stats += BNXT_NUM_SW_FUNC_STATS; 536 537 if (bp->flags & BNXT_FLAG_PORT_STATS) 538 num_stats += BNXT_NUM_PORT_STATS; 539 540 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 541 num_stats += bp->fw_rx_stats_ext_size + 542 bp->fw_tx_stats_ext_size; 543 if (bp->pri2cos_valid) 544 num_stats += BNXT_NUM_STATS_PRI; 545 } 546 547 return num_stats; 548 } 549 550 static int bnxt_get_sset_count(struct net_device *dev, int sset) 551 { 552 struct bnxt *bp = netdev_priv(dev); 553 554 switch (sset) { 555 case ETH_SS_STATS: 556 return bnxt_get_num_stats(bp); 557 case ETH_SS_TEST: 558 if (!bp->num_tests) 559 return -EOPNOTSUPP; 560 return bp->num_tests; 561 default: 562 return -EOPNOTSUPP; 563 } 564 } 565 566 static bool is_rx_ring(struct bnxt *bp, int ring_num) 567 { 568 return ring_num < bp->rx_nr_rings; 569 } 570 571 static bool is_tx_ring(struct bnxt *bp, int ring_num) 572 { 573 int tx_base = 0; 574 575 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS)) 576 tx_base = bp->rx_nr_rings; 577 578 if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings)) 579 return true; 580 return false; 581 } 582 583 static void bnxt_get_ethtool_stats(struct net_device *dev, 584 struct ethtool_stats *stats, u64 *buf) 585 { 586 u32 i, j = 0; 587 struct bnxt *bp = netdev_priv(dev); 588 u32 tpa_stats; 589 590 if (!bp->bnapi) { 591 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS; 592 goto skip_ring_stats; 593 } 594 595 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) 596 bnxt_sw_func_stats[i].counter = 0; 597 598 tpa_stats = bnxt_get_num_tpa_ring_stats(bp); 599 for (i = 0; i < bp->cp_nr_rings; i++) { 600 struct bnxt_napi *bnapi = bp->bnapi[i]; 601 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 602 u64 *sw_stats = cpr->stats.sw_stats; 603 u64 *sw; 604 int k; 605 606 if (is_rx_ring(bp, i)) { 607 for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++) 608 buf[j] = sw_stats[k]; 609 } 610 if (is_tx_ring(bp, i)) { 611 k = NUM_RING_RX_HW_STATS; 612 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 613 j++, k++) 614 buf[j] = sw_stats[k]; 615 } 616 if (!tpa_stats || !is_rx_ring(bp, i)) 617 goto skip_tpa_ring_stats; 618 619 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 620 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS + 621 tpa_stats; j++, k++) 622 buf[j] = sw_stats[k]; 623 624 skip_tpa_ring_stats: 625 sw = (u64 *)&cpr->sw_stats.rx; 626 if (is_rx_ring(bp, i)) { 627 for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++) 628 buf[j] = sw[k]; 629 } 630 631 sw = (u64 *)&cpr->sw_stats.cmn; 632 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++) 633 buf[j] = sw[k]; 634 635 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter += 636 BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts); 637 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter += 638 BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts); 639 bnxt_sw_func_stats[RX_NETPOLL_DISCARDS].counter += 640 cpr->sw_stats.rx.rx_netpoll_discards; 641 } 642 643 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++) 644 buf[j] = bnxt_sw_func_stats[i].counter; 645 646 skip_ring_stats: 647 if (bp->flags & BNXT_FLAG_PORT_STATS) { 648 u64 *port_stats = bp->port_stats.sw_stats; 649 650 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) 651 buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset); 652 } 653 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 654 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats; 655 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats; 656 657 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) { 658 buf[j] = *(rx_port_stats_ext + 659 bnxt_port_stats_ext_arr[i].offset); 660 } 661 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) { 662 buf[j] = *(tx_port_stats_ext + 663 bnxt_tx_port_stats_ext_arr[i].offset); 664 } 665 if (bp->pri2cos_valid) { 666 for (i = 0; i < 8; i++, j++) { 667 long n = bnxt_rx_bytes_pri_arr[i].base_off + 668 bp->pri2cos_idx[i]; 669 670 buf[j] = *(rx_port_stats_ext + n); 671 } 672 for (i = 0; i < 8; i++, j++) { 673 long n = bnxt_rx_pkts_pri_arr[i].base_off + 674 bp->pri2cos_idx[i]; 675 676 buf[j] = *(rx_port_stats_ext + n); 677 } 678 for (i = 0; i < 8; i++, j++) { 679 long n = bnxt_tx_bytes_pri_arr[i].base_off + 680 bp->pri2cos_idx[i]; 681 682 buf[j] = *(tx_port_stats_ext + n); 683 } 684 for (i = 0; i < 8; i++, j++) { 685 long n = bnxt_tx_pkts_pri_arr[i].base_off + 686 bp->pri2cos_idx[i]; 687 688 buf[j] = *(tx_port_stats_ext + n); 689 } 690 } 691 } 692 } 693 694 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 695 { 696 struct bnxt *bp = netdev_priv(dev); 697 static const char * const *str; 698 u32 i, j, num_str; 699 700 switch (stringset) { 701 case ETH_SS_STATS: 702 for (i = 0; i < bp->cp_nr_rings; i++) { 703 if (is_rx_ring(bp, i)) { 704 num_str = NUM_RING_RX_HW_STATS; 705 for (j = 0; j < num_str; j++) { 706 sprintf(buf, "[%d]: %s", i, 707 bnxt_ring_rx_stats_str[j]); 708 buf += ETH_GSTRING_LEN; 709 } 710 } 711 if (is_tx_ring(bp, i)) { 712 num_str = NUM_RING_TX_HW_STATS; 713 for (j = 0; j < num_str; j++) { 714 sprintf(buf, "[%d]: %s", i, 715 bnxt_ring_tx_stats_str[j]); 716 buf += ETH_GSTRING_LEN; 717 } 718 } 719 num_str = bnxt_get_num_tpa_ring_stats(bp); 720 if (!num_str || !is_rx_ring(bp, i)) 721 goto skip_tpa_stats; 722 723 if (bp->max_tpa_v2) 724 str = bnxt_ring_tpa2_stats_str; 725 else 726 str = bnxt_ring_tpa_stats_str; 727 728 for (j = 0; j < num_str; j++) { 729 sprintf(buf, "[%d]: %s", i, str[j]); 730 buf += ETH_GSTRING_LEN; 731 } 732 skip_tpa_stats: 733 if (is_rx_ring(bp, i)) { 734 num_str = NUM_RING_RX_SW_STATS; 735 for (j = 0; j < num_str; j++) { 736 sprintf(buf, "[%d]: %s", i, 737 bnxt_rx_sw_stats_str[j]); 738 buf += ETH_GSTRING_LEN; 739 } 740 } 741 num_str = NUM_RING_CMN_SW_STATS; 742 for (j = 0; j < num_str; j++) { 743 sprintf(buf, "[%d]: %s", i, 744 bnxt_cmn_sw_stats_str[j]); 745 buf += ETH_GSTRING_LEN; 746 } 747 } 748 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) { 749 strcpy(buf, bnxt_sw_func_stats[i].string); 750 buf += ETH_GSTRING_LEN; 751 } 752 753 if (bp->flags & BNXT_FLAG_PORT_STATS) { 754 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 755 strcpy(buf, bnxt_port_stats_arr[i].string); 756 buf += ETH_GSTRING_LEN; 757 } 758 } 759 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 760 for (i = 0; i < bp->fw_rx_stats_ext_size; i++) { 761 strcpy(buf, bnxt_port_stats_ext_arr[i].string); 762 buf += ETH_GSTRING_LEN; 763 } 764 for (i = 0; i < bp->fw_tx_stats_ext_size; i++) { 765 strcpy(buf, 766 bnxt_tx_port_stats_ext_arr[i].string); 767 buf += ETH_GSTRING_LEN; 768 } 769 if (bp->pri2cos_valid) { 770 for (i = 0; i < 8; i++) { 771 strcpy(buf, 772 bnxt_rx_bytes_pri_arr[i].string); 773 buf += ETH_GSTRING_LEN; 774 } 775 for (i = 0; i < 8; i++) { 776 strcpy(buf, 777 bnxt_rx_pkts_pri_arr[i].string); 778 buf += ETH_GSTRING_LEN; 779 } 780 for (i = 0; i < 8; i++) { 781 strcpy(buf, 782 bnxt_tx_bytes_pri_arr[i].string); 783 buf += ETH_GSTRING_LEN; 784 } 785 for (i = 0; i < 8; i++) { 786 strcpy(buf, 787 bnxt_tx_pkts_pri_arr[i].string); 788 buf += ETH_GSTRING_LEN; 789 } 790 } 791 } 792 break; 793 case ETH_SS_TEST: 794 if (bp->num_tests) 795 memcpy(buf, bp->test_info->string, 796 bp->num_tests * ETH_GSTRING_LEN); 797 break; 798 default: 799 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 800 stringset); 801 break; 802 } 803 } 804 805 static void bnxt_get_ringparam(struct net_device *dev, 806 struct ethtool_ringparam *ering, 807 struct kernel_ethtool_ringparam *kernel_ering, 808 struct netlink_ext_ack *extack) 809 { 810 struct bnxt *bp = netdev_priv(dev); 811 812 if (bp->flags & BNXT_FLAG_AGG_RINGS) { 813 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT_JUM_ENA; 814 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 815 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_ENABLED; 816 } else { 817 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 818 ering->rx_jumbo_max_pending = 0; 819 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_DISABLED; 820 } 821 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 822 823 ering->rx_pending = bp->rx_ring_size; 824 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 825 ering->tx_pending = bp->tx_ring_size; 826 } 827 828 static int bnxt_set_ringparam(struct net_device *dev, 829 struct ethtool_ringparam *ering, 830 struct kernel_ethtool_ringparam *kernel_ering, 831 struct netlink_ext_ack *extack) 832 { 833 struct bnxt *bp = netdev_priv(dev); 834 835 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 836 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 837 (ering->tx_pending < BNXT_MIN_TX_DESC_CNT)) 838 return -EINVAL; 839 840 if (netif_running(dev)) 841 bnxt_close_nic(bp, false, false); 842 843 bp->rx_ring_size = ering->rx_pending; 844 bp->tx_ring_size = ering->tx_pending; 845 bnxt_set_ring_params(bp); 846 847 if (netif_running(dev)) 848 return bnxt_open_nic(bp, false, false); 849 850 return 0; 851 } 852 853 static void bnxt_get_channels(struct net_device *dev, 854 struct ethtool_channels *channel) 855 { 856 struct bnxt *bp = netdev_priv(dev); 857 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; 858 int max_rx_rings, max_tx_rings, tcs; 859 int max_tx_sch_inputs, tx_grps; 860 861 /* Get the most up-to-date max_tx_sch_inputs. */ 862 if (netif_running(dev) && BNXT_NEW_RM(bp)) 863 bnxt_hwrm_func_resc_qcaps(bp, false); 864 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs; 865 866 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 867 if (max_tx_sch_inputs) 868 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 869 870 tcs = netdev_get_num_tc(dev); 871 tx_grps = max(tcs, 1); 872 if (bp->tx_nr_rings_xdp) 873 tx_grps++; 874 max_tx_rings /= tx_grps; 875 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 876 877 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 878 max_rx_rings = 0; 879 max_tx_rings = 0; 880 } 881 if (max_tx_sch_inputs) 882 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 883 884 if (tcs > 1) 885 max_tx_rings /= tcs; 886 887 channel->max_rx = max_rx_rings; 888 channel->max_tx = max_tx_rings; 889 channel->max_other = 0; 890 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 891 channel->combined_count = bp->rx_nr_rings; 892 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 893 channel->combined_count--; 894 } else { 895 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 896 channel->rx_count = bp->rx_nr_rings; 897 channel->tx_count = bp->tx_nr_rings_per_tc; 898 } 899 } 900 } 901 902 static int bnxt_set_channels(struct net_device *dev, 903 struct ethtool_channels *channel) 904 { 905 struct bnxt *bp = netdev_priv(dev); 906 int req_tx_rings, req_rx_rings, tcs; 907 bool sh = false; 908 int tx_xdp = 0; 909 int rc = 0; 910 911 if (channel->other_count) 912 return -EINVAL; 913 914 if (!channel->combined_count && 915 (!channel->rx_count || !channel->tx_count)) 916 return -EINVAL; 917 918 if (channel->combined_count && 919 (channel->rx_count || channel->tx_count)) 920 return -EINVAL; 921 922 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 923 channel->tx_count)) 924 return -EINVAL; 925 926 if (channel->combined_count) 927 sh = true; 928 929 tcs = netdev_get_num_tc(dev); 930 931 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 932 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 933 if (bp->tx_nr_rings_xdp) { 934 if (!sh) { 935 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 936 return -EINVAL; 937 } 938 tx_xdp = req_rx_rings; 939 } 940 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); 941 if (rc) { 942 netdev_warn(dev, "Unable to allocate the requested rings\n"); 943 return rc; 944 } 945 946 if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) != 947 bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) && 948 netif_is_rxfh_configured(dev)) { 949 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n"); 950 return -EINVAL; 951 } 952 953 if (netif_running(dev)) { 954 if (BNXT_PF(bp)) { 955 /* TODO CHIMP_FW: Send message to all VF's 956 * before PF unload 957 */ 958 } 959 rc = bnxt_close_nic(bp, true, false); 960 if (rc) { 961 netdev_err(bp->dev, "Set channel failure rc :%x\n", 962 rc); 963 return rc; 964 } 965 } 966 967 if (sh) { 968 bp->flags |= BNXT_FLAG_SHARED_RINGS; 969 bp->rx_nr_rings = channel->combined_count; 970 bp->tx_nr_rings_per_tc = channel->combined_count; 971 } else { 972 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 973 bp->rx_nr_rings = channel->rx_count; 974 bp->tx_nr_rings_per_tc = channel->tx_count; 975 } 976 bp->tx_nr_rings_xdp = tx_xdp; 977 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 978 if (tcs > 1) 979 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 980 981 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 982 bp->tx_nr_rings + bp->rx_nr_rings; 983 984 /* After changing number of rx channels, update NTUPLE feature. */ 985 netdev_update_features(dev); 986 if (netif_running(dev)) { 987 rc = bnxt_open_nic(bp, true, false); 988 if ((!rc) && BNXT_PF(bp)) { 989 /* TODO CHIMP_FW: Send message to all VF's 990 * to renable 991 */ 992 } 993 } else { 994 rc = bnxt_reserve_rings(bp, true); 995 } 996 997 return rc; 998 } 999 1000 #ifdef CONFIG_RFS_ACCEL 1001 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 1002 u32 *rule_locs) 1003 { 1004 int i, j = 0; 1005 1006 cmd->data = bp->ntp_fltr_count; 1007 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 1008 struct hlist_head *head; 1009 struct bnxt_ntuple_filter *fltr; 1010 1011 head = &bp->ntp_fltr_hash_tbl[i]; 1012 rcu_read_lock(); 1013 hlist_for_each_entry_rcu(fltr, head, hash) { 1014 if (j == cmd->rule_cnt) 1015 break; 1016 rule_locs[j++] = fltr->sw_id; 1017 } 1018 rcu_read_unlock(); 1019 if (j == cmd->rule_cnt) 1020 break; 1021 } 1022 cmd->rule_cnt = j; 1023 return 0; 1024 } 1025 1026 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1027 { 1028 struct ethtool_rx_flow_spec *fs = 1029 (struct ethtool_rx_flow_spec *)&cmd->fs; 1030 struct bnxt_ntuple_filter *fltr; 1031 struct flow_keys *fkeys; 1032 int i, rc = -EINVAL; 1033 1034 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 1035 return rc; 1036 1037 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 1038 struct hlist_head *head; 1039 1040 head = &bp->ntp_fltr_hash_tbl[i]; 1041 rcu_read_lock(); 1042 hlist_for_each_entry_rcu(fltr, head, hash) { 1043 if (fltr->sw_id == fs->location) 1044 goto fltr_found; 1045 } 1046 rcu_read_unlock(); 1047 } 1048 return rc; 1049 1050 fltr_found: 1051 fkeys = &fltr->fkeys; 1052 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 1053 if (fkeys->basic.ip_proto == IPPROTO_TCP) 1054 fs->flow_type = TCP_V4_FLOW; 1055 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 1056 fs->flow_type = UDP_V4_FLOW; 1057 else 1058 goto fltr_err; 1059 1060 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 1061 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 1062 1063 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 1064 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 1065 1066 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 1067 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 1068 1069 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 1070 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 1071 } else { 1072 int i; 1073 1074 if (fkeys->basic.ip_proto == IPPROTO_TCP) 1075 fs->flow_type = TCP_V6_FLOW; 1076 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 1077 fs->flow_type = UDP_V6_FLOW; 1078 else 1079 goto fltr_err; 1080 1081 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 1082 fkeys->addrs.v6addrs.src; 1083 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 1084 fkeys->addrs.v6addrs.dst; 1085 for (i = 0; i < 4; i++) { 1086 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 1087 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 1088 } 1089 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 1090 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 1091 1092 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 1093 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 1094 } 1095 1096 fs->ring_cookie = fltr->rxq; 1097 rc = 0; 1098 1099 fltr_err: 1100 rcu_read_unlock(); 1101 1102 return rc; 1103 } 1104 #endif 1105 1106 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 1107 { 1108 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 1109 return RXH_IP_SRC | RXH_IP_DST; 1110 return 0; 1111 } 1112 1113 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 1114 { 1115 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 1116 return RXH_IP_SRC | RXH_IP_DST; 1117 return 0; 1118 } 1119 1120 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1121 { 1122 cmd->data = 0; 1123 switch (cmd->flow_type) { 1124 case TCP_V4_FLOW: 1125 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 1126 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1127 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1128 cmd->data |= get_ethtool_ipv4_rss(bp); 1129 break; 1130 case UDP_V4_FLOW: 1131 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 1132 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1133 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1134 fallthrough; 1135 case SCTP_V4_FLOW: 1136 case AH_ESP_V4_FLOW: 1137 case AH_V4_FLOW: 1138 case ESP_V4_FLOW: 1139 case IPV4_FLOW: 1140 cmd->data |= get_ethtool_ipv4_rss(bp); 1141 break; 1142 1143 case TCP_V6_FLOW: 1144 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 1145 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1146 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1147 cmd->data |= get_ethtool_ipv6_rss(bp); 1148 break; 1149 case UDP_V6_FLOW: 1150 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 1151 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1152 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1153 fallthrough; 1154 case SCTP_V6_FLOW: 1155 case AH_ESP_V6_FLOW: 1156 case AH_V6_FLOW: 1157 case ESP_V6_FLOW: 1158 case IPV6_FLOW: 1159 cmd->data |= get_ethtool_ipv6_rss(bp); 1160 break; 1161 } 1162 return 0; 1163 } 1164 1165 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 1166 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 1167 1168 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1169 { 1170 u32 rss_hash_cfg = bp->rss_hash_cfg; 1171 int tuple, rc = 0; 1172 1173 if (cmd->data == RXH_4TUPLE) 1174 tuple = 4; 1175 else if (cmd->data == RXH_2TUPLE) 1176 tuple = 2; 1177 else if (!cmd->data) 1178 tuple = 0; 1179 else 1180 return -EINVAL; 1181 1182 if (cmd->flow_type == TCP_V4_FLOW) { 1183 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1184 if (tuple == 4) 1185 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1186 } else if (cmd->flow_type == UDP_V4_FLOW) { 1187 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 1188 return -EINVAL; 1189 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1190 if (tuple == 4) 1191 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1192 } else if (cmd->flow_type == TCP_V6_FLOW) { 1193 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1194 if (tuple == 4) 1195 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1196 } else if (cmd->flow_type == UDP_V6_FLOW) { 1197 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 1198 return -EINVAL; 1199 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1200 if (tuple == 4) 1201 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1202 } else if (tuple == 4) { 1203 return -EINVAL; 1204 } 1205 1206 switch (cmd->flow_type) { 1207 case TCP_V4_FLOW: 1208 case UDP_V4_FLOW: 1209 case SCTP_V4_FLOW: 1210 case AH_ESP_V4_FLOW: 1211 case AH_V4_FLOW: 1212 case ESP_V4_FLOW: 1213 case IPV4_FLOW: 1214 if (tuple == 2) 1215 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1216 else if (!tuple) 1217 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1218 break; 1219 1220 case TCP_V6_FLOW: 1221 case UDP_V6_FLOW: 1222 case SCTP_V6_FLOW: 1223 case AH_ESP_V6_FLOW: 1224 case AH_V6_FLOW: 1225 case ESP_V6_FLOW: 1226 case IPV6_FLOW: 1227 if (tuple == 2) 1228 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1229 else if (!tuple) 1230 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1231 break; 1232 } 1233 1234 if (bp->rss_hash_cfg == rss_hash_cfg) 1235 return 0; 1236 1237 if (bp->fw_cap & BNXT_FW_CAP_RSS_HASH_TYPE_DELTA) 1238 bp->rss_hash_delta = bp->rss_hash_cfg ^ rss_hash_cfg; 1239 bp->rss_hash_cfg = rss_hash_cfg; 1240 if (netif_running(bp->dev)) { 1241 bnxt_close_nic(bp, false, false); 1242 rc = bnxt_open_nic(bp, false, false); 1243 } 1244 return rc; 1245 } 1246 1247 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 1248 u32 *rule_locs) 1249 { 1250 struct bnxt *bp = netdev_priv(dev); 1251 int rc = 0; 1252 1253 switch (cmd->cmd) { 1254 #ifdef CONFIG_RFS_ACCEL 1255 case ETHTOOL_GRXRINGS: 1256 cmd->data = bp->rx_nr_rings; 1257 break; 1258 1259 case ETHTOOL_GRXCLSRLCNT: 1260 cmd->rule_cnt = bp->ntp_fltr_count; 1261 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 1262 break; 1263 1264 case ETHTOOL_GRXCLSRLALL: 1265 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 1266 break; 1267 1268 case ETHTOOL_GRXCLSRULE: 1269 rc = bnxt_grxclsrule(bp, cmd); 1270 break; 1271 #endif 1272 1273 case ETHTOOL_GRXFH: 1274 rc = bnxt_grxfh(bp, cmd); 1275 break; 1276 1277 default: 1278 rc = -EOPNOTSUPP; 1279 break; 1280 } 1281 1282 return rc; 1283 } 1284 1285 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 1286 { 1287 struct bnxt *bp = netdev_priv(dev); 1288 int rc; 1289 1290 switch (cmd->cmd) { 1291 case ETHTOOL_SRXFH: 1292 rc = bnxt_srxfh(bp, cmd); 1293 break; 1294 1295 default: 1296 rc = -EOPNOTSUPP; 1297 break; 1298 } 1299 return rc; 1300 } 1301 1302 u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 1303 { 1304 struct bnxt *bp = netdev_priv(dev); 1305 1306 if (bp->flags & BNXT_FLAG_CHIP_P5) 1307 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5); 1308 return HW_HASH_INDEX_SIZE; 1309 } 1310 1311 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 1312 { 1313 return HW_HASH_KEY_SIZE; 1314 } 1315 1316 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 1317 u8 *hfunc) 1318 { 1319 struct bnxt *bp = netdev_priv(dev); 1320 struct bnxt_vnic_info *vnic; 1321 u32 i, tbl_size; 1322 1323 if (hfunc) 1324 *hfunc = ETH_RSS_HASH_TOP; 1325 1326 if (!bp->vnic_info) 1327 return 0; 1328 1329 vnic = &bp->vnic_info[0]; 1330 if (indir && bp->rss_indir_tbl) { 1331 tbl_size = bnxt_get_rxfh_indir_size(dev); 1332 for (i = 0; i < tbl_size; i++) 1333 indir[i] = bp->rss_indir_tbl[i]; 1334 } 1335 1336 if (key && vnic->rss_hash_key) 1337 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 1338 1339 return 0; 1340 } 1341 1342 static int bnxt_set_rxfh(struct net_device *dev, const u32 *indir, 1343 const u8 *key, const u8 hfunc) 1344 { 1345 struct bnxt *bp = netdev_priv(dev); 1346 int rc = 0; 1347 1348 if (hfunc && hfunc != ETH_RSS_HASH_TOP) 1349 return -EOPNOTSUPP; 1350 1351 if (key) 1352 return -EOPNOTSUPP; 1353 1354 if (indir) { 1355 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev); 1356 1357 for (i = 0; i < tbl_size; i++) 1358 bp->rss_indir_tbl[i] = indir[i]; 1359 pad = bp->rss_indir_tbl_entries - tbl_size; 1360 if (pad) 1361 memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16)); 1362 } 1363 1364 if (netif_running(bp->dev)) { 1365 bnxt_close_nic(bp, false, false); 1366 rc = bnxt_open_nic(bp, false, false); 1367 } 1368 return rc; 1369 } 1370 1371 static void bnxt_get_drvinfo(struct net_device *dev, 1372 struct ethtool_drvinfo *info) 1373 { 1374 struct bnxt *bp = netdev_priv(dev); 1375 1376 strscpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 1377 strscpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version)); 1378 strscpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 1379 info->n_stats = bnxt_get_num_stats(bp); 1380 info->testinfo_len = bp->num_tests; 1381 /* TODO CHIMP_FW: eeprom dump details */ 1382 info->eedump_len = 0; 1383 /* TODO CHIMP FW: reg dump details */ 1384 info->regdump_len = 0; 1385 } 1386 1387 static int bnxt_get_regs_len(struct net_device *dev) 1388 { 1389 struct bnxt *bp = netdev_priv(dev); 1390 int reg_len; 1391 1392 if (!BNXT_PF(bp)) 1393 return -EOPNOTSUPP; 1394 1395 reg_len = BNXT_PXP_REG_LEN; 1396 1397 if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED) 1398 reg_len += sizeof(struct pcie_ctx_hw_stats); 1399 1400 return reg_len; 1401 } 1402 1403 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs, 1404 void *_p) 1405 { 1406 struct pcie_ctx_hw_stats *hw_pcie_stats; 1407 struct hwrm_pcie_qstats_input *req; 1408 struct bnxt *bp = netdev_priv(dev); 1409 dma_addr_t hw_pcie_stats_addr; 1410 int rc; 1411 1412 regs->version = 0; 1413 bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p); 1414 1415 if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)) 1416 return; 1417 1418 if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS)) 1419 return; 1420 1421 hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats), 1422 &hw_pcie_stats_addr); 1423 if (!hw_pcie_stats) { 1424 hwrm_req_drop(bp, req); 1425 return; 1426 } 1427 1428 regs->version = 1; 1429 hwrm_req_hold(bp, req); /* hold on to slice */ 1430 req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats)); 1431 req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr); 1432 rc = hwrm_req_send(bp, req); 1433 if (!rc) { 1434 __le64 *src = (__le64 *)hw_pcie_stats; 1435 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN); 1436 int i; 1437 1438 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++) 1439 dst[i] = le64_to_cpu(src[i]); 1440 } 1441 hwrm_req_drop(bp, req); 1442 } 1443 1444 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1445 { 1446 struct bnxt *bp = netdev_priv(dev); 1447 1448 wol->supported = 0; 1449 wol->wolopts = 0; 1450 memset(&wol->sopass, 0, sizeof(wol->sopass)); 1451 if (bp->flags & BNXT_FLAG_WOL_CAP) { 1452 wol->supported = WAKE_MAGIC; 1453 if (bp->wol) 1454 wol->wolopts = WAKE_MAGIC; 1455 } 1456 } 1457 1458 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1459 { 1460 struct bnxt *bp = netdev_priv(dev); 1461 1462 if (wol->wolopts & ~WAKE_MAGIC) 1463 return -EINVAL; 1464 1465 if (wol->wolopts & WAKE_MAGIC) { 1466 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 1467 return -EINVAL; 1468 if (!bp->wol) { 1469 if (bnxt_hwrm_alloc_wol_fltr(bp)) 1470 return -EBUSY; 1471 bp->wol = 1; 1472 } 1473 } else { 1474 if (bp->wol) { 1475 if (bnxt_hwrm_free_wol_fltr(bp)) 1476 return -EBUSY; 1477 bp->wol = 0; 1478 } 1479 } 1480 return 0; 1481 } 1482 1483 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 1484 { 1485 u32 speed_mask = 0; 1486 1487 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 1488 /* set the advertised speeds */ 1489 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 1490 speed_mask |= ADVERTISED_100baseT_Full; 1491 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 1492 speed_mask |= ADVERTISED_1000baseT_Full; 1493 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 1494 speed_mask |= ADVERTISED_2500baseX_Full; 1495 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 1496 speed_mask |= ADVERTISED_10000baseT_Full; 1497 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 1498 speed_mask |= ADVERTISED_40000baseCR4_Full; 1499 1500 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 1501 speed_mask |= ADVERTISED_Pause; 1502 else if (fw_pause & BNXT_LINK_PAUSE_TX) 1503 speed_mask |= ADVERTISED_Asym_Pause; 1504 else if (fw_pause & BNXT_LINK_PAUSE_RX) 1505 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 1506 1507 return speed_mask; 1508 } 1509 1510 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 1511 { \ 1512 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 1513 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1514 100baseT_Full); \ 1515 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 1516 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1517 1000baseT_Full); \ 1518 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 1519 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1520 10000baseT_Full); \ 1521 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 1522 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1523 25000baseCR_Full); \ 1524 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 1525 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1526 40000baseCR4_Full);\ 1527 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 1528 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1529 50000baseCR2_Full);\ 1530 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 1531 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1532 100000baseCR4_Full);\ 1533 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 1534 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1535 Pause); \ 1536 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 1537 ethtool_link_ksettings_add_link_mode( \ 1538 lk_ksettings, name, Asym_Pause);\ 1539 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 1540 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1541 Asym_Pause); \ 1542 } \ 1543 } 1544 1545 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 1546 { \ 1547 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1548 100baseT_Full) || \ 1549 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1550 100baseT_Half)) \ 1551 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 1552 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1553 1000baseT_Full) || \ 1554 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1555 1000baseT_Half)) \ 1556 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 1557 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1558 10000baseT_Full)) \ 1559 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 1560 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1561 25000baseCR_Full)) \ 1562 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 1563 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1564 40000baseCR4_Full)) \ 1565 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 1566 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1567 50000baseCR2_Full)) \ 1568 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 1569 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1570 100000baseCR4_Full)) \ 1571 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 1572 } 1573 1574 #define BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, name) \ 1575 { \ 1576 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_50GB) \ 1577 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1578 50000baseCR_Full); \ 1579 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_100GB) \ 1580 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1581 100000baseCR2_Full);\ 1582 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_200GB) \ 1583 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1584 200000baseCR4_Full);\ 1585 } 1586 1587 #define BNXT_ETHTOOL_TO_FW_PAM4_SPDS(fw_speeds, lk_ksettings, name) \ 1588 { \ 1589 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1590 50000baseCR_Full)) \ 1591 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_50GB; \ 1592 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1593 100000baseCR2_Full)) \ 1594 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_100GB; \ 1595 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1596 200000baseCR4_Full)) \ 1597 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_200GB; \ 1598 } 1599 1600 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info, 1601 struct ethtool_link_ksettings *lk_ksettings) 1602 { 1603 u16 fec_cfg = link_info->fec_cfg; 1604 1605 if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) { 1606 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1607 lk_ksettings->link_modes.advertising); 1608 return; 1609 } 1610 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 1611 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1612 lk_ksettings->link_modes.advertising); 1613 if (fec_cfg & BNXT_FEC_ENC_RS) 1614 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1615 lk_ksettings->link_modes.advertising); 1616 if (fec_cfg & BNXT_FEC_ENC_LLRS) 1617 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 1618 lk_ksettings->link_modes.advertising); 1619 } 1620 1621 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 1622 struct ethtool_link_ksettings *lk_ksettings) 1623 { 1624 u16 fw_speeds = link_info->advertising; 1625 u8 fw_pause = 0; 1626 1627 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1628 fw_pause = link_info->auto_pause_setting; 1629 1630 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 1631 fw_speeds = link_info->advertising_pam4; 1632 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, advertising); 1633 bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings); 1634 } 1635 1636 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 1637 struct ethtool_link_ksettings *lk_ksettings) 1638 { 1639 u16 fw_speeds = link_info->lp_auto_link_speeds; 1640 u8 fw_pause = 0; 1641 1642 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1643 fw_pause = link_info->lp_pause; 1644 1645 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 1646 lp_advertising); 1647 fw_speeds = link_info->lp_auto_pam4_link_speeds; 1648 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, lp_advertising); 1649 } 1650 1651 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info, 1652 struct ethtool_link_ksettings *lk_ksettings) 1653 { 1654 u16 fec_cfg = link_info->fec_cfg; 1655 1656 if (fec_cfg & BNXT_FEC_NONE) { 1657 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1658 lk_ksettings->link_modes.supported); 1659 return; 1660 } 1661 if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP) 1662 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1663 lk_ksettings->link_modes.supported); 1664 if (fec_cfg & BNXT_FEC_ENC_RS_CAP) 1665 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1666 lk_ksettings->link_modes.supported); 1667 if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP) 1668 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 1669 lk_ksettings->link_modes.supported); 1670 } 1671 1672 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1673 struct ethtool_link_ksettings *lk_ksettings) 1674 { 1675 struct bnxt *bp = container_of(link_info, struct bnxt, link_info); 1676 u16 fw_speeds = link_info->support_speeds; 1677 1678 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1679 fw_speeds = link_info->support_pam4_speeds; 1680 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, supported); 1681 1682 if (!(bp->phy_flags & BNXT_PHY_FL_NO_PAUSE)) { 1683 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1684 Pause); 1685 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1686 Asym_Pause); 1687 } 1688 1689 if (link_info->support_auto_speeds || 1690 link_info->support_pam4_auto_speeds) 1691 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1692 Autoneg); 1693 bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings); 1694 } 1695 1696 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1697 { 1698 switch (fw_link_speed) { 1699 case BNXT_LINK_SPEED_100MB: 1700 return SPEED_100; 1701 case BNXT_LINK_SPEED_1GB: 1702 return SPEED_1000; 1703 case BNXT_LINK_SPEED_2_5GB: 1704 return SPEED_2500; 1705 case BNXT_LINK_SPEED_10GB: 1706 return SPEED_10000; 1707 case BNXT_LINK_SPEED_20GB: 1708 return SPEED_20000; 1709 case BNXT_LINK_SPEED_25GB: 1710 return SPEED_25000; 1711 case BNXT_LINK_SPEED_40GB: 1712 return SPEED_40000; 1713 case BNXT_LINK_SPEED_50GB: 1714 return SPEED_50000; 1715 case BNXT_LINK_SPEED_100GB: 1716 return SPEED_100000; 1717 case BNXT_LINK_SPEED_200GB: 1718 return SPEED_200000; 1719 default: 1720 return SPEED_UNKNOWN; 1721 } 1722 } 1723 1724 static int bnxt_get_link_ksettings(struct net_device *dev, 1725 struct ethtool_link_ksettings *lk_ksettings) 1726 { 1727 struct bnxt *bp = netdev_priv(dev); 1728 struct bnxt_link_info *link_info = &bp->link_info; 1729 struct ethtool_link_settings *base = &lk_ksettings->base; 1730 u32 ethtool_speed; 1731 1732 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1733 mutex_lock(&bp->link_lock); 1734 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1735 1736 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1737 if (link_info->autoneg) { 1738 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1739 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1740 advertising, Autoneg); 1741 base->autoneg = AUTONEG_ENABLE; 1742 base->duplex = DUPLEX_UNKNOWN; 1743 if (link_info->phy_link_status == BNXT_LINK_LINK) { 1744 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1745 if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1746 base->duplex = DUPLEX_FULL; 1747 else 1748 base->duplex = DUPLEX_HALF; 1749 } 1750 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1751 } else { 1752 base->autoneg = AUTONEG_DISABLE; 1753 ethtool_speed = 1754 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1755 base->duplex = DUPLEX_HALF; 1756 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1757 base->duplex = DUPLEX_FULL; 1758 } 1759 base->speed = ethtool_speed; 1760 1761 base->port = PORT_NONE; 1762 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1763 base->port = PORT_TP; 1764 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1765 TP); 1766 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1767 TP); 1768 } else { 1769 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1770 FIBRE); 1771 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1772 FIBRE); 1773 1774 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1775 base->port = PORT_DA; 1776 else if (link_info->media_type == 1777 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1778 base->port = PORT_FIBRE; 1779 } 1780 base->phy_address = link_info->phy_addr; 1781 mutex_unlock(&bp->link_lock); 1782 1783 return 0; 1784 } 1785 1786 static int bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed) 1787 { 1788 struct bnxt *bp = netdev_priv(dev); 1789 struct bnxt_link_info *link_info = &bp->link_info; 1790 u16 support_pam4_spds = link_info->support_pam4_speeds; 1791 u16 support_spds = link_info->support_speeds; 1792 u8 sig_mode = BNXT_SIG_MODE_NRZ; 1793 u16 fw_speed = 0; 1794 1795 switch (ethtool_speed) { 1796 case SPEED_100: 1797 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1798 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB; 1799 break; 1800 case SPEED_1000: 1801 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1802 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 1803 break; 1804 case SPEED_2500: 1805 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1806 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB; 1807 break; 1808 case SPEED_10000: 1809 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1810 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 1811 break; 1812 case SPEED_20000: 1813 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1814 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB; 1815 break; 1816 case SPEED_25000: 1817 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1818 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 1819 break; 1820 case SPEED_40000: 1821 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1822 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 1823 break; 1824 case SPEED_50000: 1825 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) { 1826 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 1827 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) { 1828 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB; 1829 sig_mode = BNXT_SIG_MODE_PAM4; 1830 } 1831 break; 1832 case SPEED_100000: 1833 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) { 1834 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB; 1835 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) { 1836 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB; 1837 sig_mode = BNXT_SIG_MODE_PAM4; 1838 } 1839 break; 1840 case SPEED_200000: 1841 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) { 1842 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB; 1843 sig_mode = BNXT_SIG_MODE_PAM4; 1844 } 1845 break; 1846 } 1847 1848 if (!fw_speed) { 1849 netdev_err(dev, "unsupported speed!\n"); 1850 return -EINVAL; 1851 } 1852 1853 if (link_info->req_link_speed == fw_speed && 1854 link_info->req_signal_mode == sig_mode && 1855 link_info->autoneg == 0) 1856 return -EALREADY; 1857 1858 link_info->req_link_speed = fw_speed; 1859 link_info->req_signal_mode = sig_mode; 1860 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1861 link_info->autoneg = 0; 1862 link_info->advertising = 0; 1863 link_info->advertising_pam4 = 0; 1864 1865 return 0; 1866 } 1867 1868 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1869 { 1870 u16 fw_speed_mask = 0; 1871 1872 /* only support autoneg at speed 100, 1000, and 10000 */ 1873 if (advertising & (ADVERTISED_100baseT_Full | 1874 ADVERTISED_100baseT_Half)) { 1875 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1876 } 1877 if (advertising & (ADVERTISED_1000baseT_Full | 1878 ADVERTISED_1000baseT_Half)) { 1879 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1880 } 1881 if (advertising & ADVERTISED_10000baseT_Full) 1882 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1883 1884 if (advertising & ADVERTISED_40000baseCR4_Full) 1885 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1886 1887 return fw_speed_mask; 1888 } 1889 1890 static int bnxt_set_link_ksettings(struct net_device *dev, 1891 const struct ethtool_link_ksettings *lk_ksettings) 1892 { 1893 struct bnxt *bp = netdev_priv(dev); 1894 struct bnxt_link_info *link_info = &bp->link_info; 1895 const struct ethtool_link_settings *base = &lk_ksettings->base; 1896 bool set_pause = false; 1897 u32 speed; 1898 int rc = 0; 1899 1900 if (!BNXT_PHY_CFG_ABLE(bp)) 1901 return -EOPNOTSUPP; 1902 1903 mutex_lock(&bp->link_lock); 1904 if (base->autoneg == AUTONEG_ENABLE) { 1905 link_info->advertising = 0; 1906 link_info->advertising_pam4 = 0; 1907 BNXT_ETHTOOL_TO_FW_SPDS(link_info->advertising, lk_ksettings, 1908 advertising); 1909 BNXT_ETHTOOL_TO_FW_PAM4_SPDS(link_info->advertising_pam4, 1910 lk_ksettings, advertising); 1911 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1912 if (!link_info->advertising && !link_info->advertising_pam4) { 1913 link_info->advertising = link_info->support_auto_speeds; 1914 link_info->advertising_pam4 = 1915 link_info->support_pam4_auto_speeds; 1916 } 1917 /* any change to autoneg will cause link change, therefore the 1918 * driver should put back the original pause setting in autoneg 1919 */ 1920 if (!(bp->phy_flags & BNXT_PHY_FL_NO_PAUSE)) 1921 set_pause = true; 1922 } else { 1923 u8 phy_type = link_info->phy_type; 1924 1925 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1926 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1927 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1928 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1929 rc = -EINVAL; 1930 goto set_setting_exit; 1931 } 1932 if (base->duplex == DUPLEX_HALF) { 1933 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1934 rc = -EINVAL; 1935 goto set_setting_exit; 1936 } 1937 speed = base->speed; 1938 rc = bnxt_force_link_speed(dev, speed); 1939 if (rc) { 1940 if (rc == -EALREADY) 1941 rc = 0; 1942 goto set_setting_exit; 1943 } 1944 } 1945 1946 if (netif_running(dev)) 1947 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1948 1949 set_setting_exit: 1950 mutex_unlock(&bp->link_lock); 1951 return rc; 1952 } 1953 1954 static int bnxt_get_fecparam(struct net_device *dev, 1955 struct ethtool_fecparam *fec) 1956 { 1957 struct bnxt *bp = netdev_priv(dev); 1958 struct bnxt_link_info *link_info; 1959 u8 active_fec; 1960 u16 fec_cfg; 1961 1962 link_info = &bp->link_info; 1963 fec_cfg = link_info->fec_cfg; 1964 active_fec = link_info->active_fec_sig_mode & 1965 PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK; 1966 if (fec_cfg & BNXT_FEC_NONE) { 1967 fec->fec = ETHTOOL_FEC_NONE; 1968 fec->active_fec = ETHTOOL_FEC_NONE; 1969 return 0; 1970 } 1971 if (fec_cfg & BNXT_FEC_AUTONEG) 1972 fec->fec |= ETHTOOL_FEC_AUTO; 1973 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 1974 fec->fec |= ETHTOOL_FEC_BASER; 1975 if (fec_cfg & BNXT_FEC_ENC_RS) 1976 fec->fec |= ETHTOOL_FEC_RS; 1977 if (fec_cfg & BNXT_FEC_ENC_LLRS) 1978 fec->fec |= ETHTOOL_FEC_LLRS; 1979 1980 switch (active_fec) { 1981 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE: 1982 fec->active_fec |= ETHTOOL_FEC_BASER; 1983 break; 1984 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE: 1985 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE: 1986 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE: 1987 fec->active_fec |= ETHTOOL_FEC_RS; 1988 break; 1989 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE: 1990 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE: 1991 fec->active_fec |= ETHTOOL_FEC_LLRS; 1992 break; 1993 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_NONE_ACTIVE: 1994 fec->active_fec |= ETHTOOL_FEC_OFF; 1995 break; 1996 } 1997 return 0; 1998 } 1999 2000 static void bnxt_get_fec_stats(struct net_device *dev, 2001 struct ethtool_fec_stats *fec_stats) 2002 { 2003 struct bnxt *bp = netdev_priv(dev); 2004 u64 *rx; 2005 2006 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 2007 return; 2008 2009 rx = bp->rx_port_stats_ext.sw_stats; 2010 fec_stats->corrected_bits.total = 2011 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_corrected_bits)); 2012 2013 if (bp->fw_rx_stats_ext_size <= BNXT_RX_STATS_EXT_NUM_LEGACY) 2014 return; 2015 2016 fec_stats->corrected_blocks.total = 2017 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_fec_corrected_blocks)); 2018 fec_stats->uncorrectable_blocks.total = 2019 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_fec_uncorrectable_blocks)); 2020 } 2021 2022 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info, 2023 u32 fec) 2024 { 2025 u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE; 2026 2027 if (fec & ETHTOOL_FEC_BASER) 2028 fw_fec |= BNXT_FEC_BASE_R_ON(link_info); 2029 else if (fec & ETHTOOL_FEC_RS) 2030 fw_fec |= BNXT_FEC_RS_ON(link_info); 2031 else if (fec & ETHTOOL_FEC_LLRS) 2032 fw_fec |= BNXT_FEC_LLRS_ON; 2033 return fw_fec; 2034 } 2035 2036 static int bnxt_set_fecparam(struct net_device *dev, 2037 struct ethtool_fecparam *fecparam) 2038 { 2039 struct hwrm_port_phy_cfg_input *req; 2040 struct bnxt *bp = netdev_priv(dev); 2041 struct bnxt_link_info *link_info; 2042 u32 new_cfg, fec = fecparam->fec; 2043 u16 fec_cfg; 2044 int rc; 2045 2046 link_info = &bp->link_info; 2047 fec_cfg = link_info->fec_cfg; 2048 if (fec_cfg & BNXT_FEC_NONE) 2049 return -EOPNOTSUPP; 2050 2051 if (fec & ETHTOOL_FEC_OFF) { 2052 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE | 2053 BNXT_FEC_ALL_OFF(link_info); 2054 goto apply_fec; 2055 } 2056 if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) || 2057 ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) || 2058 ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) || 2059 ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP))) 2060 return -EINVAL; 2061 2062 if (fec & ETHTOOL_FEC_AUTO) { 2063 if (!link_info->autoneg) 2064 return -EINVAL; 2065 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE; 2066 } else { 2067 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec); 2068 } 2069 2070 apply_fec: 2071 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 2072 if (rc) 2073 return rc; 2074 req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2075 rc = hwrm_req_send(bp, req); 2076 /* update current settings */ 2077 if (!rc) { 2078 mutex_lock(&bp->link_lock); 2079 bnxt_update_link(bp, false); 2080 mutex_unlock(&bp->link_lock); 2081 } 2082 return rc; 2083 } 2084 2085 static void bnxt_get_pauseparam(struct net_device *dev, 2086 struct ethtool_pauseparam *epause) 2087 { 2088 struct bnxt *bp = netdev_priv(dev); 2089 struct bnxt_link_info *link_info = &bp->link_info; 2090 2091 if (BNXT_VF(bp)) 2092 return; 2093 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 2094 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 2095 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 2096 } 2097 2098 static void bnxt_get_pause_stats(struct net_device *dev, 2099 struct ethtool_pause_stats *epstat) 2100 { 2101 struct bnxt *bp = netdev_priv(dev); 2102 u64 *rx, *tx; 2103 2104 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 2105 return; 2106 2107 rx = bp->port_stats.sw_stats; 2108 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 2109 2110 epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames); 2111 epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames); 2112 } 2113 2114 static int bnxt_set_pauseparam(struct net_device *dev, 2115 struct ethtool_pauseparam *epause) 2116 { 2117 int rc = 0; 2118 struct bnxt *bp = netdev_priv(dev); 2119 struct bnxt_link_info *link_info = &bp->link_info; 2120 2121 if (!BNXT_PHY_CFG_ABLE(bp) || (bp->phy_flags & BNXT_PHY_FL_NO_PAUSE)) 2122 return -EOPNOTSUPP; 2123 2124 mutex_lock(&bp->link_lock); 2125 if (epause->autoneg) { 2126 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 2127 rc = -EINVAL; 2128 goto pause_exit; 2129 } 2130 2131 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 2132 link_info->req_flow_ctrl = 0; 2133 } else { 2134 /* when transition from auto pause to force pause, 2135 * force a link change 2136 */ 2137 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 2138 link_info->force_link_chng = true; 2139 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 2140 link_info->req_flow_ctrl = 0; 2141 } 2142 if (epause->rx_pause) 2143 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 2144 2145 if (epause->tx_pause) 2146 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 2147 2148 if (netif_running(dev)) 2149 rc = bnxt_hwrm_set_pause(bp); 2150 2151 pause_exit: 2152 mutex_unlock(&bp->link_lock); 2153 return rc; 2154 } 2155 2156 static u32 bnxt_get_link(struct net_device *dev) 2157 { 2158 struct bnxt *bp = netdev_priv(dev); 2159 2160 /* TODO: handle MF, VF, driver close case */ 2161 return BNXT_LINK_IS_UP(bp); 2162 } 2163 2164 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp, 2165 struct hwrm_nvm_get_dev_info_output *nvm_dev_info) 2166 { 2167 struct hwrm_nvm_get_dev_info_output *resp; 2168 struct hwrm_nvm_get_dev_info_input *req; 2169 int rc; 2170 2171 if (BNXT_VF(bp)) 2172 return -EOPNOTSUPP; 2173 2174 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO); 2175 if (rc) 2176 return rc; 2177 2178 resp = hwrm_req_hold(bp, req); 2179 rc = hwrm_req_send(bp, req); 2180 if (!rc) 2181 memcpy(nvm_dev_info, resp, sizeof(*resp)); 2182 hwrm_req_drop(bp, req); 2183 return rc; 2184 } 2185 2186 static void bnxt_print_admin_err(struct bnxt *bp) 2187 { 2188 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n"); 2189 } 2190 2191 int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 2192 u16 ext, u16 *index, u32 *item_length, 2193 u32 *data_length); 2194 2195 int bnxt_flash_nvram(struct net_device *dev, u16 dir_type, 2196 u16 dir_ordinal, u16 dir_ext, u16 dir_attr, 2197 u32 dir_item_len, const u8 *data, 2198 size_t data_len) 2199 { 2200 struct bnxt *bp = netdev_priv(dev); 2201 struct hwrm_nvm_write_input *req; 2202 int rc; 2203 2204 rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE); 2205 if (rc) 2206 return rc; 2207 2208 if (data_len && data) { 2209 dma_addr_t dma_handle; 2210 u8 *kmem; 2211 2212 kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle); 2213 if (!kmem) { 2214 hwrm_req_drop(bp, req); 2215 return -ENOMEM; 2216 } 2217 2218 req->dir_data_length = cpu_to_le32(data_len); 2219 2220 memcpy(kmem, data, data_len); 2221 req->host_src_addr = cpu_to_le64(dma_handle); 2222 } 2223 2224 hwrm_req_timeout(bp, req, bp->hwrm_cmd_max_timeout); 2225 req->dir_type = cpu_to_le16(dir_type); 2226 req->dir_ordinal = cpu_to_le16(dir_ordinal); 2227 req->dir_ext = cpu_to_le16(dir_ext); 2228 req->dir_attr = cpu_to_le16(dir_attr); 2229 req->dir_item_length = cpu_to_le32(dir_item_len); 2230 rc = hwrm_req_send(bp, req); 2231 2232 if (rc == -EACCES) 2233 bnxt_print_admin_err(bp); 2234 return rc; 2235 } 2236 2237 int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type, 2238 u8 self_reset, u8 flags) 2239 { 2240 struct bnxt *bp = netdev_priv(dev); 2241 struct hwrm_fw_reset_input *req; 2242 int rc; 2243 2244 if (!bnxt_hwrm_reset_permitted(bp)) { 2245 netdev_warn(bp->dev, "Reset denied by firmware, it may be inhibited by remote driver"); 2246 return -EPERM; 2247 } 2248 2249 rc = hwrm_req_init(bp, req, HWRM_FW_RESET); 2250 if (rc) 2251 return rc; 2252 2253 req->embedded_proc_type = proc_type; 2254 req->selfrst_status = self_reset; 2255 req->flags = flags; 2256 2257 if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) { 2258 rc = hwrm_req_send_silent(bp, req); 2259 } else { 2260 rc = hwrm_req_send(bp, req); 2261 if (rc == -EACCES) 2262 bnxt_print_admin_err(bp); 2263 } 2264 return rc; 2265 } 2266 2267 static int bnxt_firmware_reset(struct net_device *dev, 2268 enum bnxt_nvm_directory_type dir_type) 2269 { 2270 u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE; 2271 u8 proc_type, flags = 0; 2272 2273 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 2274 /* (e.g. when firmware isn't already running) */ 2275 switch (dir_type) { 2276 case BNX_DIR_TYPE_CHIMP_PATCH: 2277 case BNX_DIR_TYPE_BOOTCODE: 2278 case BNX_DIR_TYPE_BOOTCODE_2: 2279 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 2280 /* Self-reset ChiMP upon next PCIe reset: */ 2281 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 2282 break; 2283 case BNX_DIR_TYPE_APE_FW: 2284 case BNX_DIR_TYPE_APE_PATCH: 2285 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 2286 /* Self-reset APE upon next PCIe reset: */ 2287 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 2288 break; 2289 case BNX_DIR_TYPE_KONG_FW: 2290 case BNX_DIR_TYPE_KONG_PATCH: 2291 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 2292 break; 2293 case BNX_DIR_TYPE_BONO_FW: 2294 case BNX_DIR_TYPE_BONO_PATCH: 2295 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 2296 break; 2297 default: 2298 return -EINVAL; 2299 } 2300 2301 return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags); 2302 } 2303 2304 static int bnxt_firmware_reset_chip(struct net_device *dev) 2305 { 2306 struct bnxt *bp = netdev_priv(dev); 2307 u8 flags = 0; 2308 2309 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET) 2310 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL; 2311 2312 return bnxt_hwrm_firmware_reset(dev, 2313 FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP, 2314 FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP, 2315 flags); 2316 } 2317 2318 static int bnxt_firmware_reset_ap(struct net_device *dev) 2319 { 2320 return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP, 2321 FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE, 2322 0); 2323 } 2324 2325 static int bnxt_flash_firmware(struct net_device *dev, 2326 u16 dir_type, 2327 const u8 *fw_data, 2328 size_t fw_size) 2329 { 2330 int rc = 0; 2331 u16 code_type; 2332 u32 stored_crc; 2333 u32 calculated_crc; 2334 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 2335 2336 switch (dir_type) { 2337 case BNX_DIR_TYPE_BOOTCODE: 2338 case BNX_DIR_TYPE_BOOTCODE_2: 2339 code_type = CODE_BOOT; 2340 break; 2341 case BNX_DIR_TYPE_CHIMP_PATCH: 2342 code_type = CODE_CHIMP_PATCH; 2343 break; 2344 case BNX_DIR_TYPE_APE_FW: 2345 code_type = CODE_MCTP_PASSTHRU; 2346 break; 2347 case BNX_DIR_TYPE_APE_PATCH: 2348 code_type = CODE_APE_PATCH; 2349 break; 2350 case BNX_DIR_TYPE_KONG_FW: 2351 code_type = CODE_KONG_FW; 2352 break; 2353 case BNX_DIR_TYPE_KONG_PATCH: 2354 code_type = CODE_KONG_PATCH; 2355 break; 2356 case BNX_DIR_TYPE_BONO_FW: 2357 code_type = CODE_BONO_FW; 2358 break; 2359 case BNX_DIR_TYPE_BONO_PATCH: 2360 code_type = CODE_BONO_PATCH; 2361 break; 2362 default: 2363 netdev_err(dev, "Unsupported directory entry type: %u\n", 2364 dir_type); 2365 return -EINVAL; 2366 } 2367 if (fw_size < sizeof(struct bnxt_fw_header)) { 2368 netdev_err(dev, "Invalid firmware file size: %u\n", 2369 (unsigned int)fw_size); 2370 return -EINVAL; 2371 } 2372 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 2373 netdev_err(dev, "Invalid firmware signature: %08X\n", 2374 le32_to_cpu(header->signature)); 2375 return -EINVAL; 2376 } 2377 if (header->code_type != code_type) { 2378 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 2379 code_type, header->code_type); 2380 return -EINVAL; 2381 } 2382 if (header->device != DEVICE_CUMULUS_FAMILY) { 2383 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 2384 DEVICE_CUMULUS_FAMILY, header->device); 2385 return -EINVAL; 2386 } 2387 /* Confirm the CRC32 checksum of the file: */ 2388 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 2389 sizeof(stored_crc))); 2390 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 2391 if (calculated_crc != stored_crc) { 2392 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 2393 (unsigned long)stored_crc, 2394 (unsigned long)calculated_crc); 2395 return -EINVAL; 2396 } 2397 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2398 0, 0, 0, fw_data, fw_size); 2399 if (rc == 0) /* Firmware update successful */ 2400 rc = bnxt_firmware_reset(dev, dir_type); 2401 2402 return rc; 2403 } 2404 2405 static int bnxt_flash_microcode(struct net_device *dev, 2406 u16 dir_type, 2407 const u8 *fw_data, 2408 size_t fw_size) 2409 { 2410 struct bnxt_ucode_trailer *trailer; 2411 u32 calculated_crc; 2412 u32 stored_crc; 2413 int rc = 0; 2414 2415 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 2416 netdev_err(dev, "Invalid microcode file size: %u\n", 2417 (unsigned int)fw_size); 2418 return -EINVAL; 2419 } 2420 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 2421 sizeof(*trailer))); 2422 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 2423 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 2424 le32_to_cpu(trailer->sig)); 2425 return -EINVAL; 2426 } 2427 if (le16_to_cpu(trailer->dir_type) != dir_type) { 2428 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 2429 dir_type, le16_to_cpu(trailer->dir_type)); 2430 return -EINVAL; 2431 } 2432 if (le16_to_cpu(trailer->trailer_length) < 2433 sizeof(struct bnxt_ucode_trailer)) { 2434 netdev_err(dev, "Invalid microcode trailer length: %d\n", 2435 le16_to_cpu(trailer->trailer_length)); 2436 return -EINVAL; 2437 } 2438 2439 /* Confirm the CRC32 checksum of the file: */ 2440 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 2441 sizeof(stored_crc))); 2442 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 2443 if (calculated_crc != stored_crc) { 2444 netdev_err(dev, 2445 "CRC32 (%08lX) does not match calculated: %08lX\n", 2446 (unsigned long)stored_crc, 2447 (unsigned long)calculated_crc); 2448 return -EINVAL; 2449 } 2450 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2451 0, 0, 0, fw_data, fw_size); 2452 2453 return rc; 2454 } 2455 2456 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 2457 { 2458 switch (dir_type) { 2459 case BNX_DIR_TYPE_CHIMP_PATCH: 2460 case BNX_DIR_TYPE_BOOTCODE: 2461 case BNX_DIR_TYPE_BOOTCODE_2: 2462 case BNX_DIR_TYPE_APE_FW: 2463 case BNX_DIR_TYPE_APE_PATCH: 2464 case BNX_DIR_TYPE_KONG_FW: 2465 case BNX_DIR_TYPE_KONG_PATCH: 2466 case BNX_DIR_TYPE_BONO_FW: 2467 case BNX_DIR_TYPE_BONO_PATCH: 2468 return true; 2469 } 2470 2471 return false; 2472 } 2473 2474 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 2475 { 2476 switch (dir_type) { 2477 case BNX_DIR_TYPE_AVS: 2478 case BNX_DIR_TYPE_EXP_ROM_MBA: 2479 case BNX_DIR_TYPE_PCIE: 2480 case BNX_DIR_TYPE_TSCF_UCODE: 2481 case BNX_DIR_TYPE_EXT_PHY: 2482 case BNX_DIR_TYPE_CCM: 2483 case BNX_DIR_TYPE_ISCSI_BOOT: 2484 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 2485 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 2486 return true; 2487 } 2488 2489 return false; 2490 } 2491 2492 static bool bnxt_dir_type_is_executable(u16 dir_type) 2493 { 2494 return bnxt_dir_type_is_ape_bin_format(dir_type) || 2495 bnxt_dir_type_is_other_exec_format(dir_type); 2496 } 2497 2498 static int bnxt_flash_firmware_from_file(struct net_device *dev, 2499 u16 dir_type, 2500 const char *filename) 2501 { 2502 const struct firmware *fw; 2503 int rc; 2504 2505 rc = request_firmware(&fw, filename, &dev->dev); 2506 if (rc != 0) { 2507 netdev_err(dev, "Error %d requesting firmware file: %s\n", 2508 rc, filename); 2509 return rc; 2510 } 2511 if (bnxt_dir_type_is_ape_bin_format(dir_type)) 2512 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 2513 else if (bnxt_dir_type_is_other_exec_format(dir_type)) 2514 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 2515 else 2516 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2517 0, 0, 0, fw->data, fw->size); 2518 release_firmware(fw); 2519 return rc; 2520 } 2521 2522 #define MSG_INTEGRITY_ERR "PKG install error : Data integrity on NVM" 2523 #define MSG_INVALID_PKG "PKG install error : Invalid package" 2524 #define MSG_AUTHENTICATION_ERR "PKG install error : Authentication error" 2525 #define MSG_INVALID_DEV "PKG install error : Invalid device" 2526 #define MSG_INTERNAL_ERR "PKG install error : Internal error" 2527 #define MSG_NO_PKG_UPDATE_AREA_ERR "PKG update area not created in nvram" 2528 #define MSG_NO_SPACE_ERR "PKG insufficient update area in nvram" 2529 #define MSG_RESIZE_UPDATE_ERR "Resize UPDATE entry error" 2530 #define MSG_ANTI_ROLLBACK_ERR "HWRM_NVM_INSTALL_UPDATE failure due to Anti-rollback detected" 2531 #define MSG_GENERIC_FAILURE_ERR "HWRM_NVM_INSTALL_UPDATE failure" 2532 2533 static int nvm_update_err_to_stderr(struct net_device *dev, u8 result, 2534 struct netlink_ext_ack *extack) 2535 { 2536 switch (result) { 2537 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TYPE_PARAMETER: 2538 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_INDEX_PARAMETER: 2539 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_DATA_ERROR: 2540 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_CHECKSUM_ERROR: 2541 case NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_NOT_FOUND: 2542 case NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_LOCKED: 2543 BNXT_NVM_ERR_MSG(dev, extack, MSG_INTEGRITY_ERR); 2544 return -EINVAL; 2545 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PREREQUISITE: 2546 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_FILE_HEADER: 2547 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_SIGNATURE: 2548 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_STREAM: 2549 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_LENGTH: 2550 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_MANIFEST: 2551 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TRAILER: 2552 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_CHECKSUM: 2553 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_ITEM_CHECKSUM: 2554 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DATA_LENGTH: 2555 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DIRECTIVE: 2556 case NVM_INSTALL_UPDATE_RESP_RESULT_DUPLICATE_ITEM: 2557 case NVM_INSTALL_UPDATE_RESP_RESULT_ZERO_LENGTH_ITEM: 2558 BNXT_NVM_ERR_MSG(dev, extack, MSG_INVALID_PKG); 2559 return -ENOPKG; 2560 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_AUTHENTICATION_ERROR: 2561 BNXT_NVM_ERR_MSG(dev, extack, MSG_AUTHENTICATION_ERR); 2562 return -EPERM; 2563 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_CHIP_REV: 2564 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_DEVICE_ID: 2565 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_VENDOR: 2566 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_ID: 2567 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_PLATFORM: 2568 BNXT_NVM_ERR_MSG(dev, extack, MSG_INVALID_DEV); 2569 return -EOPNOTSUPP; 2570 default: 2571 BNXT_NVM_ERR_MSG(dev, extack, MSG_INTERNAL_ERR); 2572 return -EIO; 2573 } 2574 } 2575 2576 #define BNXT_PKG_DMA_SIZE 0x40000 2577 #define BNXT_NVM_MORE_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_MODE)) 2578 #define BNXT_NVM_LAST_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_LAST)) 2579 2580 static int bnxt_resize_update_entry(struct net_device *dev, size_t fw_size, 2581 struct netlink_ext_ack *extack) 2582 { 2583 u32 item_len; 2584 int rc; 2585 2586 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 2587 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, NULL, 2588 &item_len, NULL); 2589 if (rc) { 2590 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_PKG_UPDATE_AREA_ERR); 2591 return rc; 2592 } 2593 2594 if (fw_size > item_len) { 2595 rc = bnxt_flash_nvram(dev, BNX_DIR_TYPE_UPDATE, 2596 BNX_DIR_ORDINAL_FIRST, 0, 1, 2597 round_up(fw_size, 4096), NULL, 0); 2598 if (rc) { 2599 BNXT_NVM_ERR_MSG(dev, extack, MSG_RESIZE_UPDATE_ERR); 2600 return rc; 2601 } 2602 } 2603 return 0; 2604 } 2605 2606 int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw, 2607 u32 install_type, struct netlink_ext_ack *extack) 2608 { 2609 struct hwrm_nvm_install_update_input *install; 2610 struct hwrm_nvm_install_update_output *resp; 2611 struct hwrm_nvm_modify_input *modify; 2612 struct bnxt *bp = netdev_priv(dev); 2613 bool defrag_attempted = false; 2614 dma_addr_t dma_handle; 2615 u8 *kmem = NULL; 2616 u32 modify_len; 2617 u32 item_len; 2618 u8 cmd_err; 2619 u16 index; 2620 int rc; 2621 2622 /* resize before flashing larger image than available space */ 2623 rc = bnxt_resize_update_entry(dev, fw->size, extack); 2624 if (rc) 2625 return rc; 2626 2627 bnxt_hwrm_fw_set_time(bp); 2628 2629 rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY); 2630 if (rc) 2631 return rc; 2632 2633 /* Try allocating a large DMA buffer first. Older fw will 2634 * cause excessive NVRAM erases when using small blocks. 2635 */ 2636 modify_len = roundup_pow_of_two(fw->size); 2637 modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE); 2638 while (1) { 2639 kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle); 2640 if (!kmem && modify_len > PAGE_SIZE) 2641 modify_len /= 2; 2642 else 2643 break; 2644 } 2645 if (!kmem) { 2646 hwrm_req_drop(bp, modify); 2647 return -ENOMEM; 2648 } 2649 2650 rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE); 2651 if (rc) { 2652 hwrm_req_drop(bp, modify); 2653 return rc; 2654 } 2655 2656 hwrm_req_timeout(bp, modify, bp->hwrm_cmd_max_timeout); 2657 hwrm_req_timeout(bp, install, bp->hwrm_cmd_max_timeout); 2658 2659 hwrm_req_hold(bp, modify); 2660 modify->host_src_addr = cpu_to_le64(dma_handle); 2661 2662 resp = hwrm_req_hold(bp, install); 2663 if ((install_type & 0xffff) == 0) 2664 install_type >>= 16; 2665 install->install_type = cpu_to_le32(install_type); 2666 2667 do { 2668 u32 copied = 0, len = modify_len; 2669 2670 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 2671 BNX_DIR_ORDINAL_FIRST, 2672 BNX_DIR_EXT_NONE, 2673 &index, &item_len, NULL); 2674 if (rc) { 2675 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_PKG_UPDATE_AREA_ERR); 2676 break; 2677 } 2678 if (fw->size > item_len) { 2679 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_SPACE_ERR); 2680 rc = -EFBIG; 2681 break; 2682 } 2683 2684 modify->dir_idx = cpu_to_le16(index); 2685 2686 if (fw->size > modify_len) 2687 modify->flags = BNXT_NVM_MORE_FLAG; 2688 while (copied < fw->size) { 2689 u32 balance = fw->size - copied; 2690 2691 if (balance <= modify_len) { 2692 len = balance; 2693 if (copied) 2694 modify->flags |= BNXT_NVM_LAST_FLAG; 2695 } 2696 memcpy(kmem, fw->data + copied, len); 2697 modify->len = cpu_to_le32(len); 2698 modify->offset = cpu_to_le32(copied); 2699 rc = hwrm_req_send(bp, modify); 2700 if (rc) 2701 goto pkg_abort; 2702 copied += len; 2703 } 2704 2705 rc = hwrm_req_send_silent(bp, install); 2706 if (!rc) 2707 break; 2708 2709 if (defrag_attempted) { 2710 /* We have tried to defragment already in the previous 2711 * iteration. Return with the result for INSTALL_UPDATE 2712 */ 2713 break; 2714 } 2715 2716 cmd_err = ((struct hwrm_err_output *)resp)->cmd_err; 2717 2718 switch (cmd_err) { 2719 case NVM_INSTALL_UPDATE_CMD_ERR_CODE_ANTI_ROLLBACK: 2720 BNXT_NVM_ERR_MSG(dev, extack, MSG_ANTI_ROLLBACK_ERR); 2721 rc = -EALREADY; 2722 break; 2723 case NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR: 2724 install->flags = 2725 cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 2726 2727 rc = hwrm_req_send_silent(bp, install); 2728 if (!rc) 2729 break; 2730 2731 cmd_err = ((struct hwrm_err_output *)resp)->cmd_err; 2732 2733 if (cmd_err == NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) { 2734 /* FW has cleared NVM area, driver will create 2735 * UPDATE directory and try the flash again 2736 */ 2737 defrag_attempted = true; 2738 install->flags = 0; 2739 rc = bnxt_flash_nvram(bp->dev, 2740 BNX_DIR_TYPE_UPDATE, 2741 BNX_DIR_ORDINAL_FIRST, 2742 0, 0, item_len, NULL, 0); 2743 if (!rc) 2744 break; 2745 } 2746 fallthrough; 2747 default: 2748 BNXT_NVM_ERR_MSG(dev, extack, MSG_GENERIC_FAILURE_ERR); 2749 } 2750 } while (defrag_attempted && !rc); 2751 2752 pkg_abort: 2753 hwrm_req_drop(bp, modify); 2754 hwrm_req_drop(bp, install); 2755 2756 if (resp->result) { 2757 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 2758 (s8)resp->result, (int)resp->problem_item); 2759 rc = nvm_update_err_to_stderr(dev, resp->result, extack); 2760 } 2761 if (rc == -EACCES) 2762 bnxt_print_admin_err(bp); 2763 return rc; 2764 } 2765 2766 static int bnxt_flash_package_from_file(struct net_device *dev, const char *filename, 2767 u32 install_type, struct netlink_ext_ack *extack) 2768 { 2769 const struct firmware *fw; 2770 int rc; 2771 2772 rc = request_firmware(&fw, filename, &dev->dev); 2773 if (rc != 0) { 2774 netdev_err(dev, "PKG error %d requesting file: %s\n", 2775 rc, filename); 2776 return rc; 2777 } 2778 2779 rc = bnxt_flash_package_from_fw_obj(dev, fw, install_type, extack); 2780 2781 release_firmware(fw); 2782 2783 return rc; 2784 } 2785 2786 static int bnxt_flash_device(struct net_device *dev, 2787 struct ethtool_flash *flash) 2788 { 2789 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 2790 netdev_err(dev, "flashdev not supported from a virtual function\n"); 2791 return -EINVAL; 2792 } 2793 2794 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 2795 flash->region > 0xffff) 2796 return bnxt_flash_package_from_file(dev, flash->data, 2797 flash->region, NULL); 2798 2799 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 2800 } 2801 2802 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 2803 { 2804 struct hwrm_nvm_get_dir_info_output *output; 2805 struct hwrm_nvm_get_dir_info_input *req; 2806 struct bnxt *bp = netdev_priv(dev); 2807 int rc; 2808 2809 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO); 2810 if (rc) 2811 return rc; 2812 2813 output = hwrm_req_hold(bp, req); 2814 rc = hwrm_req_send(bp, req); 2815 if (!rc) { 2816 *entries = le32_to_cpu(output->entries); 2817 *length = le32_to_cpu(output->entry_length); 2818 } 2819 hwrm_req_drop(bp, req); 2820 return rc; 2821 } 2822 2823 static int bnxt_get_eeprom_len(struct net_device *dev) 2824 { 2825 struct bnxt *bp = netdev_priv(dev); 2826 2827 if (BNXT_VF(bp)) 2828 return 0; 2829 2830 /* The -1 return value allows the entire 32-bit range of offsets to be 2831 * passed via the ethtool command-line utility. 2832 */ 2833 return -1; 2834 } 2835 2836 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 2837 { 2838 struct bnxt *bp = netdev_priv(dev); 2839 int rc; 2840 u32 dir_entries; 2841 u32 entry_length; 2842 u8 *buf; 2843 size_t buflen; 2844 dma_addr_t dma_handle; 2845 struct hwrm_nvm_get_dir_entries_input *req; 2846 2847 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 2848 if (rc != 0) 2849 return rc; 2850 2851 if (!dir_entries || !entry_length) 2852 return -EIO; 2853 2854 /* Insert 2 bytes of directory info (count and size of entries) */ 2855 if (len < 2) 2856 return -EINVAL; 2857 2858 *data++ = dir_entries; 2859 *data++ = entry_length; 2860 len -= 2; 2861 memset(data, 0xff, len); 2862 2863 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES); 2864 if (rc) 2865 return rc; 2866 2867 buflen = mul_u32_u32(dir_entries, entry_length); 2868 buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle); 2869 if (!buf) { 2870 hwrm_req_drop(bp, req); 2871 return -ENOMEM; 2872 } 2873 req->host_dest_addr = cpu_to_le64(dma_handle); 2874 2875 hwrm_req_hold(bp, req); /* hold the slice */ 2876 rc = hwrm_req_send(bp, req); 2877 if (rc == 0) 2878 memcpy(data, buf, len > buflen ? buflen : len); 2879 hwrm_req_drop(bp, req); 2880 return rc; 2881 } 2882 2883 int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 2884 u32 length, u8 *data) 2885 { 2886 struct bnxt *bp = netdev_priv(dev); 2887 int rc; 2888 u8 *buf; 2889 dma_addr_t dma_handle; 2890 struct hwrm_nvm_read_input *req; 2891 2892 if (!length) 2893 return -EINVAL; 2894 2895 rc = hwrm_req_init(bp, req, HWRM_NVM_READ); 2896 if (rc) 2897 return rc; 2898 2899 buf = hwrm_req_dma_slice(bp, req, length, &dma_handle); 2900 if (!buf) { 2901 hwrm_req_drop(bp, req); 2902 return -ENOMEM; 2903 } 2904 2905 req->host_dest_addr = cpu_to_le64(dma_handle); 2906 req->dir_idx = cpu_to_le16(index); 2907 req->offset = cpu_to_le32(offset); 2908 req->len = cpu_to_le32(length); 2909 2910 hwrm_req_hold(bp, req); /* hold the slice */ 2911 rc = hwrm_req_send(bp, req); 2912 if (rc == 0) 2913 memcpy(data, buf, length); 2914 hwrm_req_drop(bp, req); 2915 return rc; 2916 } 2917 2918 int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 2919 u16 ext, u16 *index, u32 *item_length, 2920 u32 *data_length) 2921 { 2922 struct hwrm_nvm_find_dir_entry_output *output; 2923 struct hwrm_nvm_find_dir_entry_input *req; 2924 struct bnxt *bp = netdev_priv(dev); 2925 int rc; 2926 2927 rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY); 2928 if (rc) 2929 return rc; 2930 2931 req->enables = 0; 2932 req->dir_idx = 0; 2933 req->dir_type = cpu_to_le16(type); 2934 req->dir_ordinal = cpu_to_le16(ordinal); 2935 req->dir_ext = cpu_to_le16(ext); 2936 req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 2937 output = hwrm_req_hold(bp, req); 2938 rc = hwrm_req_send_silent(bp, req); 2939 if (rc == 0) { 2940 if (index) 2941 *index = le16_to_cpu(output->dir_idx); 2942 if (item_length) 2943 *item_length = le32_to_cpu(output->dir_item_length); 2944 if (data_length) 2945 *data_length = le32_to_cpu(output->dir_data_length); 2946 } 2947 hwrm_req_drop(bp, req); 2948 return rc; 2949 } 2950 2951 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 2952 { 2953 char *retval = NULL; 2954 char *p; 2955 char *value; 2956 int field = 0; 2957 2958 if (datalen < 1) 2959 return NULL; 2960 /* null-terminate the log data (removing last '\n'): */ 2961 data[datalen - 1] = 0; 2962 for (p = data; *p != 0; p++) { 2963 field = 0; 2964 retval = NULL; 2965 while (*p != 0 && *p != '\n') { 2966 value = p; 2967 while (*p != 0 && *p != '\t' && *p != '\n') 2968 p++; 2969 if (field == desired_field) 2970 retval = value; 2971 if (*p != '\t') 2972 break; 2973 *p = 0; 2974 field++; 2975 p++; 2976 } 2977 if (*p == 0) 2978 break; 2979 *p = 0; 2980 } 2981 return retval; 2982 } 2983 2984 int bnxt_get_pkginfo(struct net_device *dev, char *ver, int size) 2985 { 2986 struct bnxt *bp = netdev_priv(dev); 2987 u16 index = 0; 2988 char *pkgver; 2989 u32 pkglen; 2990 u8 *pkgbuf; 2991 int rc; 2992 2993 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 2994 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 2995 &index, NULL, &pkglen); 2996 if (rc) 2997 return rc; 2998 2999 pkgbuf = kzalloc(pkglen, GFP_KERNEL); 3000 if (!pkgbuf) { 3001 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n", 3002 pkglen); 3003 return -ENOMEM; 3004 } 3005 3006 rc = bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf); 3007 if (rc) 3008 goto err; 3009 3010 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf, 3011 pkglen); 3012 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) 3013 strscpy(ver, pkgver, size); 3014 else 3015 rc = -ENOENT; 3016 3017 err: 3018 kfree(pkgbuf); 3019 3020 return rc; 3021 } 3022 3023 static void bnxt_get_pkgver(struct net_device *dev) 3024 { 3025 struct bnxt *bp = netdev_priv(dev); 3026 char buf[FW_VER_STR_LEN]; 3027 int len; 3028 3029 if (!bnxt_get_pkginfo(dev, buf, sizeof(buf))) { 3030 len = strlen(bp->fw_ver_str); 3031 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1, 3032 "/pkg %s", buf); 3033 } 3034 } 3035 3036 static int bnxt_get_eeprom(struct net_device *dev, 3037 struct ethtool_eeprom *eeprom, 3038 u8 *data) 3039 { 3040 u32 index; 3041 u32 offset; 3042 3043 if (eeprom->offset == 0) /* special offset value to get directory */ 3044 return bnxt_get_nvram_directory(dev, eeprom->len, data); 3045 3046 index = eeprom->offset >> 24; 3047 offset = eeprom->offset & 0xffffff; 3048 3049 if (index == 0) { 3050 netdev_err(dev, "unsupported index value: %d\n", index); 3051 return -EINVAL; 3052 } 3053 3054 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 3055 } 3056 3057 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 3058 { 3059 struct hwrm_nvm_erase_dir_entry_input *req; 3060 struct bnxt *bp = netdev_priv(dev); 3061 int rc; 3062 3063 rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY); 3064 if (rc) 3065 return rc; 3066 3067 req->dir_idx = cpu_to_le16(index); 3068 return hwrm_req_send(bp, req); 3069 } 3070 3071 static int bnxt_set_eeprom(struct net_device *dev, 3072 struct ethtool_eeprom *eeprom, 3073 u8 *data) 3074 { 3075 struct bnxt *bp = netdev_priv(dev); 3076 u8 index, dir_op; 3077 u16 type, ext, ordinal, attr; 3078 3079 if (!BNXT_PF(bp)) { 3080 netdev_err(dev, "NVM write not supported from a virtual function\n"); 3081 return -EINVAL; 3082 } 3083 3084 type = eeprom->magic >> 16; 3085 3086 if (type == 0xffff) { /* special value for directory operations */ 3087 index = eeprom->magic & 0xff; 3088 dir_op = eeprom->magic >> 8; 3089 if (index == 0) 3090 return -EINVAL; 3091 switch (dir_op) { 3092 case 0x0e: /* erase */ 3093 if (eeprom->offset != ~eeprom->magic) 3094 return -EINVAL; 3095 return bnxt_erase_nvram_directory(dev, index - 1); 3096 default: 3097 return -EINVAL; 3098 } 3099 } 3100 3101 /* Create or re-write an NVM item: */ 3102 if (bnxt_dir_type_is_executable(type)) 3103 return -EOPNOTSUPP; 3104 ext = eeprom->magic & 0xffff; 3105 ordinal = eeprom->offset >> 16; 3106 attr = eeprom->offset & 0xffff; 3107 3108 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data, 3109 eeprom->len); 3110 } 3111 3112 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 3113 { 3114 struct bnxt *bp = netdev_priv(dev); 3115 struct ethtool_eee *eee = &bp->eee; 3116 struct bnxt_link_info *link_info = &bp->link_info; 3117 u32 advertising; 3118 int rc = 0; 3119 3120 if (!BNXT_PHY_CFG_ABLE(bp)) 3121 return -EOPNOTSUPP; 3122 3123 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 3124 return -EOPNOTSUPP; 3125 3126 mutex_lock(&bp->link_lock); 3127 advertising = _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 3128 if (!edata->eee_enabled) 3129 goto eee_ok; 3130 3131 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 3132 netdev_warn(dev, "EEE requires autoneg\n"); 3133 rc = -EINVAL; 3134 goto eee_exit; 3135 } 3136 if (edata->tx_lpi_enabled) { 3137 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 3138 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 3139 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 3140 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 3141 rc = -EINVAL; 3142 goto eee_exit; 3143 } else if (!bp->lpi_tmr_hi) { 3144 edata->tx_lpi_timer = eee->tx_lpi_timer; 3145 } 3146 } 3147 if (!edata->advertised) { 3148 edata->advertised = advertising & eee->supported; 3149 } else if (edata->advertised & ~advertising) { 3150 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 3151 edata->advertised, advertising); 3152 rc = -EINVAL; 3153 goto eee_exit; 3154 } 3155 3156 eee->advertised = edata->advertised; 3157 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 3158 eee->tx_lpi_timer = edata->tx_lpi_timer; 3159 eee_ok: 3160 eee->eee_enabled = edata->eee_enabled; 3161 3162 if (netif_running(dev)) 3163 rc = bnxt_hwrm_set_link_setting(bp, false, true); 3164 3165 eee_exit: 3166 mutex_unlock(&bp->link_lock); 3167 return rc; 3168 } 3169 3170 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 3171 { 3172 struct bnxt *bp = netdev_priv(dev); 3173 3174 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 3175 return -EOPNOTSUPP; 3176 3177 *edata = bp->eee; 3178 if (!bp->eee.eee_enabled) { 3179 /* Preserve tx_lpi_timer so that the last value will be used 3180 * by default when it is re-enabled. 3181 */ 3182 edata->advertised = 0; 3183 edata->tx_lpi_enabled = 0; 3184 } 3185 3186 if (!bp->eee.eee_active) 3187 edata->lp_advertised = 0; 3188 3189 return 0; 3190 } 3191 3192 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 3193 u16 page_number, u8 bank, 3194 u16 start_addr, u16 data_length, 3195 u8 *buf) 3196 { 3197 struct hwrm_port_phy_i2c_read_output *output; 3198 struct hwrm_port_phy_i2c_read_input *req; 3199 int rc, byte_offset = 0; 3200 3201 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ); 3202 if (rc) 3203 return rc; 3204 3205 output = hwrm_req_hold(bp, req); 3206 req->i2c_slave_addr = i2c_addr; 3207 req->page_number = cpu_to_le16(page_number); 3208 req->port_id = cpu_to_le16(bp->pf.port_id); 3209 do { 3210 u16 xfer_size; 3211 3212 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 3213 data_length -= xfer_size; 3214 req->page_offset = cpu_to_le16(start_addr + byte_offset); 3215 req->data_length = xfer_size; 3216 req->enables = 3217 cpu_to_le32((start_addr + byte_offset ? 3218 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 3219 0) | 3220 (bank ? 3221 PORT_PHY_I2C_READ_REQ_ENABLES_BANK_NUMBER : 3222 0)); 3223 rc = hwrm_req_send(bp, req); 3224 if (!rc) 3225 memcpy(buf + byte_offset, output->data, xfer_size); 3226 byte_offset += xfer_size; 3227 } while (!rc && data_length > 0); 3228 hwrm_req_drop(bp, req); 3229 3230 return rc; 3231 } 3232 3233 static int bnxt_get_module_info(struct net_device *dev, 3234 struct ethtool_modinfo *modinfo) 3235 { 3236 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1]; 3237 struct bnxt *bp = netdev_priv(dev); 3238 int rc; 3239 3240 /* No point in going further if phy status indicates 3241 * module is not inserted or if it is powered down or 3242 * if it is of type 10GBase-T 3243 */ 3244 if (bp->link_info.module_status > 3245 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 3246 return -EOPNOTSUPP; 3247 3248 /* This feature is not supported in older firmware versions */ 3249 if (bp->hwrm_spec_code < 0x10202) 3250 return -EOPNOTSUPP; 3251 3252 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 0, 3253 SFF_DIAG_SUPPORT_OFFSET + 1, 3254 data); 3255 if (!rc) { 3256 u8 module_id = data[0]; 3257 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET]; 3258 3259 switch (module_id) { 3260 case SFF_MODULE_ID_SFP: 3261 modinfo->type = ETH_MODULE_SFF_8472; 3262 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3263 if (!diag_supported) 3264 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 3265 break; 3266 case SFF_MODULE_ID_QSFP: 3267 case SFF_MODULE_ID_QSFP_PLUS: 3268 modinfo->type = ETH_MODULE_SFF_8436; 3269 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 3270 break; 3271 case SFF_MODULE_ID_QSFP28: 3272 modinfo->type = ETH_MODULE_SFF_8636; 3273 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 3274 break; 3275 default: 3276 rc = -EOPNOTSUPP; 3277 break; 3278 } 3279 } 3280 return rc; 3281 } 3282 3283 static int bnxt_get_module_eeprom(struct net_device *dev, 3284 struct ethtool_eeprom *eeprom, 3285 u8 *data) 3286 { 3287 struct bnxt *bp = netdev_priv(dev); 3288 u16 start = eeprom->offset, length = eeprom->len; 3289 int rc = 0; 3290 3291 memset(data, 0, eeprom->len); 3292 3293 /* Read A0 portion of the EEPROM */ 3294 if (start < ETH_MODULE_SFF_8436_LEN) { 3295 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 3296 length = ETH_MODULE_SFF_8436_LEN - start; 3297 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 3298 start, length, data); 3299 if (rc) 3300 return rc; 3301 start += length; 3302 data += length; 3303 length = eeprom->len - length; 3304 } 3305 3306 /* Read A2 portion of the EEPROM */ 3307 if (length) { 3308 start -= ETH_MODULE_SFF_8436_LEN; 3309 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0, 0, 3310 start, length, data); 3311 } 3312 return rc; 3313 } 3314 3315 static int bnxt_get_module_status(struct bnxt *bp, struct netlink_ext_ack *extack) 3316 { 3317 if (bp->link_info.module_status <= 3318 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 3319 return 0; 3320 3321 switch (bp->link_info.module_status) { 3322 case PORT_PHY_QCFG_RESP_MODULE_STATUS_PWRDOWN: 3323 NL_SET_ERR_MSG_MOD(extack, "Transceiver module is powering down"); 3324 break; 3325 case PORT_PHY_QCFG_RESP_MODULE_STATUS_NOTINSERTED: 3326 NL_SET_ERR_MSG_MOD(extack, "Transceiver module not inserted"); 3327 break; 3328 case PORT_PHY_QCFG_RESP_MODULE_STATUS_CURRENTFAULT: 3329 NL_SET_ERR_MSG_MOD(extack, "Transceiver module disabled due to current fault"); 3330 break; 3331 default: 3332 NL_SET_ERR_MSG_MOD(extack, "Unknown error"); 3333 break; 3334 } 3335 return -EINVAL; 3336 } 3337 3338 static int bnxt_get_module_eeprom_by_page(struct net_device *dev, 3339 const struct ethtool_module_eeprom *page_data, 3340 struct netlink_ext_ack *extack) 3341 { 3342 struct bnxt *bp = netdev_priv(dev); 3343 int rc; 3344 3345 rc = bnxt_get_module_status(bp, extack); 3346 if (rc) 3347 return rc; 3348 3349 if (bp->hwrm_spec_code < 0x10202) { 3350 NL_SET_ERR_MSG_MOD(extack, "Firmware version too old"); 3351 return -EINVAL; 3352 } 3353 3354 if (page_data->bank && !(bp->phy_flags & BNXT_PHY_FL_BANK_SEL)) { 3355 NL_SET_ERR_MSG_MOD(extack, "Firmware not capable for bank selection"); 3356 return -EINVAL; 3357 } 3358 3359 rc = bnxt_read_sfp_module_eeprom_info(bp, page_data->i2c_address << 1, 3360 page_data->page, page_data->bank, 3361 page_data->offset, 3362 page_data->length, 3363 page_data->data); 3364 if (rc) { 3365 NL_SET_ERR_MSG_MOD(extack, "Module`s eeprom read failed"); 3366 return rc; 3367 } 3368 return page_data->length; 3369 } 3370 3371 static int bnxt_nway_reset(struct net_device *dev) 3372 { 3373 int rc = 0; 3374 3375 struct bnxt *bp = netdev_priv(dev); 3376 struct bnxt_link_info *link_info = &bp->link_info; 3377 3378 if (!BNXT_PHY_CFG_ABLE(bp)) 3379 return -EOPNOTSUPP; 3380 3381 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 3382 return -EINVAL; 3383 3384 if (netif_running(dev)) 3385 rc = bnxt_hwrm_set_link_setting(bp, true, false); 3386 3387 return rc; 3388 } 3389 3390 static int bnxt_set_phys_id(struct net_device *dev, 3391 enum ethtool_phys_id_state state) 3392 { 3393 struct hwrm_port_led_cfg_input *req; 3394 struct bnxt *bp = netdev_priv(dev); 3395 struct bnxt_pf_info *pf = &bp->pf; 3396 struct bnxt_led_cfg *led_cfg; 3397 u8 led_state; 3398 __le16 duration; 3399 int rc, i; 3400 3401 if (!bp->num_leds || BNXT_VF(bp)) 3402 return -EOPNOTSUPP; 3403 3404 if (state == ETHTOOL_ID_ACTIVE) { 3405 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 3406 duration = cpu_to_le16(500); 3407 } else if (state == ETHTOOL_ID_INACTIVE) { 3408 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 3409 duration = cpu_to_le16(0); 3410 } else { 3411 return -EINVAL; 3412 } 3413 rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG); 3414 if (rc) 3415 return rc; 3416 3417 req->port_id = cpu_to_le16(pf->port_id); 3418 req->num_leds = bp->num_leds; 3419 led_cfg = (struct bnxt_led_cfg *)&req->led0_id; 3420 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 3421 req->enables |= BNXT_LED_DFLT_ENABLES(i); 3422 led_cfg->led_id = bp->leds[i].led_id; 3423 led_cfg->led_state = led_state; 3424 led_cfg->led_blink_on = duration; 3425 led_cfg->led_blink_off = duration; 3426 led_cfg->led_group_id = bp->leds[i].led_group_id; 3427 } 3428 return hwrm_req_send(bp, req); 3429 } 3430 3431 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 3432 { 3433 struct hwrm_selftest_irq_input *req; 3434 int rc; 3435 3436 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ); 3437 if (rc) 3438 return rc; 3439 3440 req->cmpl_ring = cpu_to_le16(cmpl_ring); 3441 return hwrm_req_send(bp, req); 3442 } 3443 3444 static int bnxt_test_irq(struct bnxt *bp) 3445 { 3446 int i; 3447 3448 for (i = 0; i < bp->cp_nr_rings; i++) { 3449 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 3450 int rc; 3451 3452 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 3453 if (rc) 3454 return rc; 3455 } 3456 return 0; 3457 } 3458 3459 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 3460 { 3461 struct hwrm_port_mac_cfg_input *req; 3462 int rc; 3463 3464 rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG); 3465 if (rc) 3466 return rc; 3467 3468 req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 3469 if (enable) 3470 req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 3471 else 3472 req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 3473 return hwrm_req_send(bp, req); 3474 } 3475 3476 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds) 3477 { 3478 struct hwrm_port_phy_qcaps_output *resp; 3479 struct hwrm_port_phy_qcaps_input *req; 3480 int rc; 3481 3482 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS); 3483 if (rc) 3484 return rc; 3485 3486 resp = hwrm_req_hold(bp, req); 3487 rc = hwrm_req_send(bp, req); 3488 if (!rc) 3489 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode); 3490 3491 hwrm_req_drop(bp, req); 3492 return rc; 3493 } 3494 3495 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 3496 struct hwrm_port_phy_cfg_input *req) 3497 { 3498 struct bnxt_link_info *link_info = &bp->link_info; 3499 u16 fw_advertising; 3500 u16 fw_speed; 3501 int rc; 3502 3503 if (!link_info->autoneg || 3504 (bp->phy_flags & BNXT_PHY_FL_AN_PHY_LPBK)) 3505 return 0; 3506 3507 rc = bnxt_query_force_speeds(bp, &fw_advertising); 3508 if (rc) 3509 return rc; 3510 3511 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 3512 if (BNXT_LINK_IS_UP(bp)) 3513 fw_speed = bp->link_info.link_speed; 3514 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 3515 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 3516 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 3517 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 3518 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 3519 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 3520 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 3521 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 3522 3523 req->force_link_speed = cpu_to_le16(fw_speed); 3524 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 3525 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 3526 rc = hwrm_req_send(bp, req); 3527 req->flags = 0; 3528 req->force_link_speed = cpu_to_le16(0); 3529 return rc; 3530 } 3531 3532 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext) 3533 { 3534 struct hwrm_port_phy_cfg_input *req; 3535 int rc; 3536 3537 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 3538 if (rc) 3539 return rc; 3540 3541 /* prevent bnxt_disable_an_for_lpbk() from consuming the request */ 3542 hwrm_req_hold(bp, req); 3543 3544 if (enable) { 3545 bnxt_disable_an_for_lpbk(bp, req); 3546 if (ext) 3547 req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL; 3548 else 3549 req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 3550 } else { 3551 req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 3552 } 3553 req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 3554 rc = hwrm_req_send(bp, req); 3555 hwrm_req_drop(bp, req); 3556 return rc; 3557 } 3558 3559 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 3560 u32 raw_cons, int pkt_size) 3561 { 3562 struct bnxt_napi *bnapi = cpr->bnapi; 3563 struct bnxt_rx_ring_info *rxr; 3564 struct bnxt_sw_rx_bd *rx_buf; 3565 struct rx_cmp *rxcmp; 3566 u16 cp_cons, cons; 3567 u8 *data; 3568 u32 len; 3569 int i; 3570 3571 rxr = bnapi->rx_ring; 3572 cp_cons = RING_CMP(raw_cons); 3573 rxcmp = (struct rx_cmp *) 3574 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 3575 cons = rxcmp->rx_cmp_opaque; 3576 rx_buf = &rxr->rx_buf_ring[cons]; 3577 data = rx_buf->data_ptr; 3578 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 3579 if (len != pkt_size) 3580 return -EIO; 3581 i = ETH_ALEN; 3582 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 3583 return -EIO; 3584 i += ETH_ALEN; 3585 for ( ; i < pkt_size; i++) { 3586 if (data[i] != (u8)(i & 0xff)) 3587 return -EIO; 3588 } 3589 return 0; 3590 } 3591 3592 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 3593 int pkt_size) 3594 { 3595 struct tx_cmp *txcmp; 3596 int rc = -EIO; 3597 u32 raw_cons; 3598 u32 cons; 3599 int i; 3600 3601 raw_cons = cpr->cp_raw_cons; 3602 for (i = 0; i < 200; i++) { 3603 cons = RING_CMP(raw_cons); 3604 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 3605 3606 if (!TX_CMP_VALID(txcmp, raw_cons)) { 3607 udelay(5); 3608 continue; 3609 } 3610 3611 /* The valid test of the entry must be done first before 3612 * reading any further. 3613 */ 3614 dma_rmb(); 3615 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 3616 rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size); 3617 raw_cons = NEXT_RAW_CMP(raw_cons); 3618 raw_cons = NEXT_RAW_CMP(raw_cons); 3619 break; 3620 } 3621 raw_cons = NEXT_RAW_CMP(raw_cons); 3622 } 3623 cpr->cp_raw_cons = raw_cons; 3624 return rc; 3625 } 3626 3627 static int bnxt_run_loopback(struct bnxt *bp) 3628 { 3629 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 3630 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0]; 3631 struct bnxt_cp_ring_info *cpr; 3632 int pkt_size, i = 0; 3633 struct sk_buff *skb; 3634 dma_addr_t map; 3635 u8 *data; 3636 int rc; 3637 3638 cpr = &rxr->bnapi->cp_ring; 3639 if (bp->flags & BNXT_FLAG_CHIP_P5) 3640 cpr = cpr->cp_ring_arr[BNXT_RX_HDL]; 3641 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 3642 skb = netdev_alloc_skb(bp->dev, pkt_size); 3643 if (!skb) 3644 return -ENOMEM; 3645 data = skb_put(skb, pkt_size); 3646 ether_addr_copy(&data[i], bp->dev->dev_addr); 3647 i += ETH_ALEN; 3648 ether_addr_copy(&data[i], bp->dev->dev_addr); 3649 i += ETH_ALEN; 3650 for ( ; i < pkt_size; i++) 3651 data[i] = (u8)(i & 0xff); 3652 3653 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 3654 DMA_TO_DEVICE); 3655 if (dma_mapping_error(&bp->pdev->dev, map)) { 3656 dev_kfree_skb(skb); 3657 return -EIO; 3658 } 3659 bnxt_xmit_bd(bp, txr, map, pkt_size, NULL); 3660 3661 /* Sync BD data before updating doorbell */ 3662 wmb(); 3663 3664 bnxt_db_write(bp, &txr->tx_db, txr->tx_prod); 3665 rc = bnxt_poll_loopback(bp, cpr, pkt_size); 3666 3667 dma_unmap_single(&bp->pdev->dev, map, pkt_size, DMA_TO_DEVICE); 3668 dev_kfree_skb(skb); 3669 return rc; 3670 } 3671 3672 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 3673 { 3674 struct hwrm_selftest_exec_output *resp; 3675 struct hwrm_selftest_exec_input *req; 3676 int rc; 3677 3678 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC); 3679 if (rc) 3680 return rc; 3681 3682 hwrm_req_timeout(bp, req, bp->test_info->timeout); 3683 req->flags = test_mask; 3684 3685 resp = hwrm_req_hold(bp, req); 3686 rc = hwrm_req_send(bp, req); 3687 *test_results = resp->test_success; 3688 hwrm_req_drop(bp, req); 3689 return rc; 3690 } 3691 3692 #define BNXT_DRV_TESTS 4 3693 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 3694 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 3695 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 3696 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3) 3697 3698 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 3699 u64 *buf) 3700 { 3701 struct bnxt *bp = netdev_priv(dev); 3702 bool do_ext_lpbk = false; 3703 bool offline = false; 3704 u8 test_results = 0; 3705 u8 test_mask = 0; 3706 int rc = 0, i; 3707 3708 if (!bp->num_tests || !BNXT_PF(bp)) 3709 return; 3710 memset(buf, 0, sizeof(u64) * bp->num_tests); 3711 if (!netif_running(dev)) { 3712 etest->flags |= ETH_TEST_FL_FAILED; 3713 return; 3714 } 3715 3716 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) && 3717 (bp->phy_flags & BNXT_PHY_FL_EXT_LPBK)) 3718 do_ext_lpbk = true; 3719 3720 if (etest->flags & ETH_TEST_FL_OFFLINE) { 3721 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) { 3722 etest->flags |= ETH_TEST_FL_FAILED; 3723 netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n"); 3724 return; 3725 } 3726 offline = true; 3727 } 3728 3729 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 3730 u8 bit_val = 1 << i; 3731 3732 if (!(bp->test_info->offline_mask & bit_val)) 3733 test_mask |= bit_val; 3734 else if (offline) 3735 test_mask |= bit_val; 3736 } 3737 if (!offline) { 3738 bnxt_run_fw_tests(bp, test_mask, &test_results); 3739 } else { 3740 bnxt_ulp_stop(bp); 3741 rc = bnxt_close_nic(bp, true, false); 3742 if (rc) { 3743 etest->flags |= ETH_TEST_FL_FAILED; 3744 bnxt_ulp_start(bp, rc); 3745 return; 3746 } 3747 bnxt_run_fw_tests(bp, test_mask, &test_results); 3748 3749 buf[BNXT_MACLPBK_TEST_IDX] = 1; 3750 bnxt_hwrm_mac_loopback(bp, true); 3751 msleep(250); 3752 rc = bnxt_half_open_nic(bp); 3753 if (rc) { 3754 bnxt_hwrm_mac_loopback(bp, false); 3755 etest->flags |= ETH_TEST_FL_FAILED; 3756 bnxt_ulp_start(bp, rc); 3757 return; 3758 } 3759 if (bnxt_run_loopback(bp)) 3760 etest->flags |= ETH_TEST_FL_FAILED; 3761 else 3762 buf[BNXT_MACLPBK_TEST_IDX] = 0; 3763 3764 bnxt_hwrm_mac_loopback(bp, false); 3765 bnxt_hwrm_phy_loopback(bp, true, false); 3766 msleep(1000); 3767 if (bnxt_run_loopback(bp)) { 3768 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 3769 etest->flags |= ETH_TEST_FL_FAILED; 3770 } 3771 if (do_ext_lpbk) { 3772 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; 3773 bnxt_hwrm_phy_loopback(bp, true, true); 3774 msleep(1000); 3775 if (bnxt_run_loopback(bp)) { 3776 buf[BNXT_EXTLPBK_TEST_IDX] = 1; 3777 etest->flags |= ETH_TEST_FL_FAILED; 3778 } 3779 } 3780 bnxt_hwrm_phy_loopback(bp, false, false); 3781 bnxt_half_close_nic(bp); 3782 rc = bnxt_open_nic(bp, true, true); 3783 bnxt_ulp_start(bp, rc); 3784 } 3785 if (rc || bnxt_test_irq(bp)) { 3786 buf[BNXT_IRQ_TEST_IDX] = 1; 3787 etest->flags |= ETH_TEST_FL_FAILED; 3788 } 3789 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 3790 u8 bit_val = 1 << i; 3791 3792 if ((test_mask & bit_val) && !(test_results & bit_val)) { 3793 buf[i] = 1; 3794 etest->flags |= ETH_TEST_FL_FAILED; 3795 } 3796 } 3797 } 3798 3799 static int bnxt_reset(struct net_device *dev, u32 *flags) 3800 { 3801 struct bnxt *bp = netdev_priv(dev); 3802 bool reload = false; 3803 u32 req = *flags; 3804 3805 if (!req) 3806 return -EINVAL; 3807 3808 if (!BNXT_PF(bp)) { 3809 netdev_err(dev, "Reset is not supported from a VF\n"); 3810 return -EOPNOTSUPP; 3811 } 3812 3813 if (pci_vfs_assigned(bp->pdev) && 3814 !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) { 3815 netdev_err(dev, 3816 "Reset not allowed when VFs are assigned to VMs\n"); 3817 return -EBUSY; 3818 } 3819 3820 if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) { 3821 /* This feature is not supported in older firmware versions */ 3822 if (bp->hwrm_spec_code >= 0x10803) { 3823 if (!bnxt_firmware_reset_chip(dev)) { 3824 netdev_info(dev, "Firmware reset request successful.\n"); 3825 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) 3826 reload = true; 3827 *flags &= ~BNXT_FW_RESET_CHIP; 3828 } 3829 } else if (req == BNXT_FW_RESET_CHIP) { 3830 return -EOPNOTSUPP; /* only request, fail hard */ 3831 } 3832 } 3833 3834 if (req & BNXT_FW_RESET_AP) { 3835 /* This feature is not supported in older firmware versions */ 3836 if (bp->hwrm_spec_code >= 0x10803) { 3837 if (!bnxt_firmware_reset_ap(dev)) { 3838 netdev_info(dev, "Reset application processor successful.\n"); 3839 reload = true; 3840 *flags &= ~BNXT_FW_RESET_AP; 3841 } 3842 } else if (req == BNXT_FW_RESET_AP) { 3843 return -EOPNOTSUPP; /* only request, fail hard */ 3844 } 3845 } 3846 3847 if (reload) 3848 netdev_info(dev, "Reload driver to complete reset\n"); 3849 3850 return 0; 3851 } 3852 3853 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump) 3854 { 3855 struct bnxt *bp = netdev_priv(dev); 3856 3857 if (dump->flag > BNXT_DUMP_CRASH) { 3858 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n"); 3859 return -EINVAL; 3860 } 3861 3862 if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) { 3863 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n"); 3864 return -EOPNOTSUPP; 3865 } 3866 3867 bp->dump_flag = dump->flag; 3868 return 0; 3869 } 3870 3871 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump) 3872 { 3873 struct bnxt *bp = netdev_priv(dev); 3874 3875 if (bp->hwrm_spec_code < 0x10801) 3876 return -EOPNOTSUPP; 3877 3878 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 | 3879 bp->ver_resp.hwrm_fw_min_8b << 16 | 3880 bp->ver_resp.hwrm_fw_bld_8b << 8 | 3881 bp->ver_resp.hwrm_fw_rsvd_8b; 3882 3883 dump->flag = bp->dump_flag; 3884 dump->len = bnxt_get_coredump_length(bp, bp->dump_flag); 3885 return 0; 3886 } 3887 3888 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump, 3889 void *buf) 3890 { 3891 struct bnxt *bp = netdev_priv(dev); 3892 3893 if (bp->hwrm_spec_code < 0x10801) 3894 return -EOPNOTSUPP; 3895 3896 memset(buf, 0, dump->len); 3897 3898 dump->flag = bp->dump_flag; 3899 return bnxt_get_coredump(bp, dump->flag, buf, &dump->len); 3900 } 3901 3902 static int bnxt_get_ts_info(struct net_device *dev, 3903 struct ethtool_ts_info *info) 3904 { 3905 struct bnxt *bp = netdev_priv(dev); 3906 struct bnxt_ptp_cfg *ptp; 3907 3908 ptp = bp->ptp_cfg; 3909 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 3910 SOF_TIMESTAMPING_RX_SOFTWARE | 3911 SOF_TIMESTAMPING_SOFTWARE; 3912 3913 info->phc_index = -1; 3914 if (!ptp) 3915 return 0; 3916 3917 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE | 3918 SOF_TIMESTAMPING_RX_HARDWARE | 3919 SOF_TIMESTAMPING_RAW_HARDWARE; 3920 if (ptp->ptp_clock) 3921 info->phc_index = ptp_clock_index(ptp->ptp_clock); 3922 3923 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 3924 3925 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 3926 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 3927 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT); 3928 3929 if (bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS) 3930 info->rx_filters |= (1 << HWTSTAMP_FILTER_ALL); 3931 return 0; 3932 } 3933 3934 void bnxt_ethtool_init(struct bnxt *bp) 3935 { 3936 struct hwrm_selftest_qlist_output *resp; 3937 struct hwrm_selftest_qlist_input *req; 3938 struct bnxt_test_info *test_info; 3939 struct net_device *dev = bp->dev; 3940 int i, rc; 3941 3942 if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER)) 3943 bnxt_get_pkgver(dev); 3944 3945 bp->num_tests = 0; 3946 if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp)) 3947 return; 3948 3949 test_info = bp->test_info; 3950 if (!test_info) { 3951 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 3952 if (!test_info) 3953 return; 3954 bp->test_info = test_info; 3955 } 3956 3957 if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST)) 3958 return; 3959 3960 resp = hwrm_req_hold(bp, req); 3961 rc = hwrm_req_send_silent(bp, req); 3962 if (rc) 3963 goto ethtool_init_exit; 3964 3965 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 3966 if (bp->num_tests > BNXT_MAX_TEST) 3967 bp->num_tests = BNXT_MAX_TEST; 3968 3969 test_info->offline_mask = resp->offline_tests; 3970 test_info->timeout = le16_to_cpu(resp->test_timeout); 3971 if (!test_info->timeout) 3972 test_info->timeout = HWRM_CMD_TIMEOUT; 3973 for (i = 0; i < bp->num_tests; i++) { 3974 char *str = test_info->string[i]; 3975 char *fw_str = resp->test_name[i]; 3976 3977 if (i == BNXT_MACLPBK_TEST_IDX) { 3978 strcpy(str, "Mac loopback test (offline)"); 3979 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 3980 strcpy(str, "Phy loopback test (offline)"); 3981 } else if (i == BNXT_EXTLPBK_TEST_IDX) { 3982 strcpy(str, "Ext loopback test (offline)"); 3983 } else if (i == BNXT_IRQ_TEST_IDX) { 3984 strcpy(str, "Interrupt_test (offline)"); 3985 } else { 3986 snprintf(str, ETH_GSTRING_LEN, "%s test (%s)", 3987 fw_str, test_info->offline_mask & (1 << i) ? 3988 "offline" : "online"); 3989 } 3990 } 3991 3992 ethtool_init_exit: 3993 hwrm_req_drop(bp, req); 3994 } 3995 3996 static void bnxt_get_eth_phy_stats(struct net_device *dev, 3997 struct ethtool_eth_phy_stats *phy_stats) 3998 { 3999 struct bnxt *bp = netdev_priv(dev); 4000 u64 *rx; 4001 4002 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 4003 return; 4004 4005 rx = bp->rx_port_stats_ext.sw_stats; 4006 phy_stats->SymbolErrorDuringCarrier = 4007 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_pcs_symbol_err)); 4008 } 4009 4010 static void bnxt_get_eth_mac_stats(struct net_device *dev, 4011 struct ethtool_eth_mac_stats *mac_stats) 4012 { 4013 struct bnxt *bp = netdev_priv(dev); 4014 u64 *rx, *tx; 4015 4016 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 4017 return; 4018 4019 rx = bp->port_stats.sw_stats; 4020 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 4021 4022 mac_stats->FramesReceivedOK = 4023 BNXT_GET_RX_PORT_STATS64(rx, rx_good_frames); 4024 mac_stats->FramesTransmittedOK = 4025 BNXT_GET_TX_PORT_STATS64(tx, tx_good_frames); 4026 mac_stats->FrameCheckSequenceErrors = 4027 BNXT_GET_RX_PORT_STATS64(rx, rx_fcs_err_frames); 4028 mac_stats->AlignmentErrors = 4029 BNXT_GET_RX_PORT_STATS64(rx, rx_align_err_frames); 4030 mac_stats->OutOfRangeLengthField = 4031 BNXT_GET_RX_PORT_STATS64(rx, rx_oor_len_frames); 4032 } 4033 4034 static void bnxt_get_eth_ctrl_stats(struct net_device *dev, 4035 struct ethtool_eth_ctrl_stats *ctrl_stats) 4036 { 4037 struct bnxt *bp = netdev_priv(dev); 4038 u64 *rx; 4039 4040 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 4041 return; 4042 4043 rx = bp->port_stats.sw_stats; 4044 ctrl_stats->MACControlFramesReceived = 4045 BNXT_GET_RX_PORT_STATS64(rx, rx_ctrl_frames); 4046 } 4047 4048 static const struct ethtool_rmon_hist_range bnxt_rmon_ranges[] = { 4049 { 0, 64 }, 4050 { 65, 127 }, 4051 { 128, 255 }, 4052 { 256, 511 }, 4053 { 512, 1023 }, 4054 { 1024, 1518 }, 4055 { 1519, 2047 }, 4056 { 2048, 4095 }, 4057 { 4096, 9216 }, 4058 { 9217, 16383 }, 4059 {} 4060 }; 4061 4062 static void bnxt_get_rmon_stats(struct net_device *dev, 4063 struct ethtool_rmon_stats *rmon_stats, 4064 const struct ethtool_rmon_hist_range **ranges) 4065 { 4066 struct bnxt *bp = netdev_priv(dev); 4067 u64 *rx, *tx; 4068 4069 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 4070 return; 4071 4072 rx = bp->port_stats.sw_stats; 4073 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 4074 4075 rmon_stats->jabbers = 4076 BNXT_GET_RX_PORT_STATS64(rx, rx_jbr_frames); 4077 rmon_stats->oversize_pkts = 4078 BNXT_GET_RX_PORT_STATS64(rx, rx_ovrsz_frames); 4079 rmon_stats->undersize_pkts = 4080 BNXT_GET_RX_PORT_STATS64(rx, rx_undrsz_frames); 4081 4082 rmon_stats->hist[0] = BNXT_GET_RX_PORT_STATS64(rx, rx_64b_frames); 4083 rmon_stats->hist[1] = BNXT_GET_RX_PORT_STATS64(rx, rx_65b_127b_frames); 4084 rmon_stats->hist[2] = BNXT_GET_RX_PORT_STATS64(rx, rx_128b_255b_frames); 4085 rmon_stats->hist[3] = BNXT_GET_RX_PORT_STATS64(rx, rx_256b_511b_frames); 4086 rmon_stats->hist[4] = 4087 BNXT_GET_RX_PORT_STATS64(rx, rx_512b_1023b_frames); 4088 rmon_stats->hist[5] = 4089 BNXT_GET_RX_PORT_STATS64(rx, rx_1024b_1518b_frames); 4090 rmon_stats->hist[6] = 4091 BNXT_GET_RX_PORT_STATS64(rx, rx_1519b_2047b_frames); 4092 rmon_stats->hist[7] = 4093 BNXT_GET_RX_PORT_STATS64(rx, rx_2048b_4095b_frames); 4094 rmon_stats->hist[8] = 4095 BNXT_GET_RX_PORT_STATS64(rx, rx_4096b_9216b_frames); 4096 rmon_stats->hist[9] = 4097 BNXT_GET_RX_PORT_STATS64(rx, rx_9217b_16383b_frames); 4098 4099 rmon_stats->hist_tx[0] = 4100 BNXT_GET_TX_PORT_STATS64(tx, tx_64b_frames); 4101 rmon_stats->hist_tx[1] = 4102 BNXT_GET_TX_PORT_STATS64(tx, tx_65b_127b_frames); 4103 rmon_stats->hist_tx[2] = 4104 BNXT_GET_TX_PORT_STATS64(tx, tx_128b_255b_frames); 4105 rmon_stats->hist_tx[3] = 4106 BNXT_GET_TX_PORT_STATS64(tx, tx_256b_511b_frames); 4107 rmon_stats->hist_tx[4] = 4108 BNXT_GET_TX_PORT_STATS64(tx, tx_512b_1023b_frames); 4109 rmon_stats->hist_tx[5] = 4110 BNXT_GET_TX_PORT_STATS64(tx, tx_1024b_1518b_frames); 4111 rmon_stats->hist_tx[6] = 4112 BNXT_GET_TX_PORT_STATS64(tx, tx_1519b_2047b_frames); 4113 rmon_stats->hist_tx[7] = 4114 BNXT_GET_TX_PORT_STATS64(tx, tx_2048b_4095b_frames); 4115 rmon_stats->hist_tx[8] = 4116 BNXT_GET_TX_PORT_STATS64(tx, tx_4096b_9216b_frames); 4117 rmon_stats->hist_tx[9] = 4118 BNXT_GET_TX_PORT_STATS64(tx, tx_9217b_16383b_frames); 4119 4120 *ranges = bnxt_rmon_ranges; 4121 } 4122 4123 static void bnxt_get_link_ext_stats(struct net_device *dev, 4124 struct ethtool_link_ext_stats *stats) 4125 { 4126 struct bnxt *bp = netdev_priv(dev); 4127 u64 *rx; 4128 4129 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 4130 return; 4131 4132 rx = bp->rx_port_stats_ext.sw_stats; 4133 stats->link_down_events = 4134 *(rx + BNXT_RX_STATS_EXT_OFFSET(link_down_events)); 4135 } 4136 4137 void bnxt_ethtool_free(struct bnxt *bp) 4138 { 4139 kfree(bp->test_info); 4140 bp->test_info = NULL; 4141 } 4142 4143 const struct ethtool_ops bnxt_ethtool_ops = { 4144 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 4145 ETHTOOL_COALESCE_MAX_FRAMES | 4146 ETHTOOL_COALESCE_USECS_IRQ | 4147 ETHTOOL_COALESCE_MAX_FRAMES_IRQ | 4148 ETHTOOL_COALESCE_STATS_BLOCK_USECS | 4149 ETHTOOL_COALESCE_USE_ADAPTIVE_RX | 4150 ETHTOOL_COALESCE_USE_CQE, 4151 .get_link_ksettings = bnxt_get_link_ksettings, 4152 .set_link_ksettings = bnxt_set_link_ksettings, 4153 .get_fec_stats = bnxt_get_fec_stats, 4154 .get_fecparam = bnxt_get_fecparam, 4155 .set_fecparam = bnxt_set_fecparam, 4156 .get_pause_stats = bnxt_get_pause_stats, 4157 .get_pauseparam = bnxt_get_pauseparam, 4158 .set_pauseparam = bnxt_set_pauseparam, 4159 .get_drvinfo = bnxt_get_drvinfo, 4160 .get_regs_len = bnxt_get_regs_len, 4161 .get_regs = bnxt_get_regs, 4162 .get_wol = bnxt_get_wol, 4163 .set_wol = bnxt_set_wol, 4164 .get_coalesce = bnxt_get_coalesce, 4165 .set_coalesce = bnxt_set_coalesce, 4166 .get_msglevel = bnxt_get_msglevel, 4167 .set_msglevel = bnxt_set_msglevel, 4168 .get_sset_count = bnxt_get_sset_count, 4169 .get_strings = bnxt_get_strings, 4170 .get_ethtool_stats = bnxt_get_ethtool_stats, 4171 .set_ringparam = bnxt_set_ringparam, 4172 .get_ringparam = bnxt_get_ringparam, 4173 .get_channels = bnxt_get_channels, 4174 .set_channels = bnxt_set_channels, 4175 .get_rxnfc = bnxt_get_rxnfc, 4176 .set_rxnfc = bnxt_set_rxnfc, 4177 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 4178 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 4179 .get_rxfh = bnxt_get_rxfh, 4180 .set_rxfh = bnxt_set_rxfh, 4181 .flash_device = bnxt_flash_device, 4182 .get_eeprom_len = bnxt_get_eeprom_len, 4183 .get_eeprom = bnxt_get_eeprom, 4184 .set_eeprom = bnxt_set_eeprom, 4185 .get_link = bnxt_get_link, 4186 .get_link_ext_stats = bnxt_get_link_ext_stats, 4187 .get_eee = bnxt_get_eee, 4188 .set_eee = bnxt_set_eee, 4189 .get_module_info = bnxt_get_module_info, 4190 .get_module_eeprom = bnxt_get_module_eeprom, 4191 .get_module_eeprom_by_page = bnxt_get_module_eeprom_by_page, 4192 .nway_reset = bnxt_nway_reset, 4193 .set_phys_id = bnxt_set_phys_id, 4194 .self_test = bnxt_self_test, 4195 .get_ts_info = bnxt_get_ts_info, 4196 .reset = bnxt_reset, 4197 .set_dump = bnxt_set_dump, 4198 .get_dump_flag = bnxt_get_dump_flag, 4199 .get_dump_data = bnxt_get_dump_data, 4200 .get_eth_phy_stats = bnxt_get_eth_phy_stats, 4201 .get_eth_mac_stats = bnxt_get_eth_mac_stats, 4202 .get_eth_ctrl_stats = bnxt_get_eth_ctrl_stats, 4203 .get_rmon_stats = bnxt_get_rmon_stats, 4204 }; 4205