1 /* bnx2x_sriov.c: Broadcom Everest network driver. 2 * 3 * Copyright 2009-2012 Broadcom Corporation 4 * 5 * Unless you and Broadcom execute a separate written software license 6 * agreement governing use of this software, this software is licensed to you 7 * under the terms of the GNU General Public License version 2, available 8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). 9 * 10 * Notwithstanding the above, under no circumstances may you combine this 11 * software in any way with any other Broadcom software provided under a 12 * license other than the GPL, without Broadcom's express prior written 13 * consent. 14 * 15 * Maintained by: Eilon Greenstein <eilong@broadcom.com> 16 * Written by: Shmulik Ravid <shmulikr@broadcom.com> 17 * Ariel Elior <ariele@broadcom.com> 18 * 19 */ 20 #include "bnx2x.h" 21 #include "bnx2x_init.h" 22 #include "bnx2x_cmn.h" 23 #include "bnx2x_sriov.h" 24 25 /* General service functions */ 26 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid, 27 u16 pf_id) 28 { 29 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid), 30 pf_id); 31 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid), 32 pf_id); 33 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid), 34 pf_id); 35 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid), 36 pf_id); 37 } 38 39 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid, 40 u8 enable) 41 { 42 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid), 43 enable); 44 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid), 45 enable); 46 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid), 47 enable); 48 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid), 49 enable); 50 } 51 52 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid) 53 { 54 int idx; 55 56 for_each_vf(bp, idx) 57 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid) 58 break; 59 return idx; 60 } 61 62 static 63 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid) 64 { 65 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid); 66 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL; 67 } 68 69 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf, 70 u8 igu_sb_id, u8 segment, u16 index, u8 op, 71 u8 update) 72 { 73 /* acking a VF sb through the PF - use the GRC */ 74 u32 ctl; 75 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA; 76 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL; 77 u32 func_encode = vf->abs_vfid; 78 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id; 79 struct igu_regular cmd_data = {0}; 80 81 cmd_data.sb_id_and_flags = 82 ((index << IGU_REGULAR_SB_INDEX_SHIFT) | 83 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | 84 (update << IGU_REGULAR_BUPDATE_SHIFT) | 85 (op << IGU_REGULAR_ENABLE_INT_SHIFT)); 86 87 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT | 88 func_encode << IGU_CTRL_REG_FID_SHIFT | 89 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT; 90 91 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", 92 cmd_data.sb_id_and_flags, igu_addr_data); 93 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags); 94 mmiowb(); 95 barrier(); 96 97 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", 98 ctl, igu_addr_ctl); 99 REG_WR(bp, igu_addr_ctl, ctl); 100 mmiowb(); 101 barrier(); 102 } 103 /* VFOP - VF slow-path operation support */ 104 105 #define BNX2X_VFOP_FILTER_ADD_CNT_MAX 0x10000 106 107 /* VFOP operations states */ 108 enum bnx2x_vfop_qctor_state { 109 BNX2X_VFOP_QCTOR_INIT, 110 BNX2X_VFOP_QCTOR_SETUP, 111 BNX2X_VFOP_QCTOR_INT_EN 112 }; 113 114 enum bnx2x_vfop_qdtor_state { 115 BNX2X_VFOP_QDTOR_HALT, 116 BNX2X_VFOP_QDTOR_TERMINATE, 117 BNX2X_VFOP_QDTOR_CFCDEL, 118 BNX2X_VFOP_QDTOR_DONE 119 }; 120 121 enum bnx2x_vfop_vlan_mac_state { 122 BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE, 123 BNX2X_VFOP_VLAN_MAC_CLEAR, 124 BNX2X_VFOP_VLAN_MAC_CHK_DONE, 125 BNX2X_VFOP_MAC_CONFIG_LIST, 126 BNX2X_VFOP_VLAN_CONFIG_LIST, 127 BNX2X_VFOP_VLAN_CONFIG_LIST_0 128 }; 129 130 enum bnx2x_vfop_qsetup_state { 131 BNX2X_VFOP_QSETUP_CTOR, 132 BNX2X_VFOP_QSETUP_VLAN0, 133 BNX2X_VFOP_QSETUP_DONE 134 }; 135 136 enum bnx2x_vfop_mcast_state { 137 BNX2X_VFOP_MCAST_DEL, 138 BNX2X_VFOP_MCAST_ADD, 139 BNX2X_VFOP_MCAST_CHK_DONE 140 }; 141 enum bnx2x_vfop_qflr_state { 142 BNX2X_VFOP_QFLR_CLR_VLAN, 143 BNX2X_VFOP_QFLR_CLR_MAC, 144 BNX2X_VFOP_QFLR_TERMINATE, 145 BNX2X_VFOP_QFLR_DONE 146 }; 147 148 enum bnx2x_vfop_flr_state { 149 BNX2X_VFOP_FLR_QUEUES, 150 BNX2X_VFOP_FLR_HW 151 }; 152 153 enum bnx2x_vfop_close_state { 154 BNX2X_VFOP_CLOSE_QUEUES, 155 BNX2X_VFOP_CLOSE_HW 156 }; 157 158 enum bnx2x_vfop_rxmode_state { 159 BNX2X_VFOP_RXMODE_CONFIG, 160 BNX2X_VFOP_RXMODE_DONE 161 }; 162 163 enum bnx2x_vfop_qteardown_state { 164 BNX2X_VFOP_QTEARDOWN_RXMODE, 165 BNX2X_VFOP_QTEARDOWN_CLR_VLAN, 166 BNX2X_VFOP_QTEARDOWN_CLR_MAC, 167 BNX2X_VFOP_QTEARDOWN_QDTOR, 168 BNX2X_VFOP_QTEARDOWN_DONE 169 }; 170 171 #define bnx2x_vfop_reset_wq(vf) atomic_set(&vf->op_in_progress, 0) 172 173 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf, 174 struct bnx2x_queue_init_params *init_params, 175 struct bnx2x_queue_setup_params *setup_params, 176 u16 q_idx, u16 sb_idx) 177 { 178 DP(BNX2X_MSG_IOV, 179 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d", 180 vf->abs_vfid, 181 q_idx, 182 sb_idx, 183 init_params->tx.sb_cq_index, 184 init_params->tx.hc_rate, 185 setup_params->flags, 186 setup_params->txq_params.traffic_type); 187 } 188 189 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf, 190 struct bnx2x_queue_init_params *init_params, 191 struct bnx2x_queue_setup_params *setup_params, 192 u16 q_idx, u16 sb_idx) 193 { 194 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params; 195 196 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n" 197 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n", 198 vf->abs_vfid, 199 q_idx, 200 sb_idx, 201 init_params->rx.sb_cq_index, 202 init_params->rx.hc_rate, 203 setup_params->gen_params.mtu, 204 rxq_params->buf_sz, 205 rxq_params->sge_buf_sz, 206 rxq_params->max_sges_pkt, 207 rxq_params->tpa_agg_sz, 208 setup_params->flags, 209 rxq_params->drop_flags, 210 rxq_params->cache_line_log); 211 } 212 213 void bnx2x_vfop_qctor_prep(struct bnx2x *bp, 214 struct bnx2x_virtf *vf, 215 struct bnx2x_vf_queue *q, 216 struct bnx2x_vfop_qctor_params *p, 217 unsigned long q_type) 218 { 219 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init; 220 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup; 221 222 /* INIT */ 223 224 /* Enable host coalescing in the transition to INIT state */ 225 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags)) 226 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags); 227 228 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags)) 229 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags); 230 231 /* FW SB ID */ 232 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx); 233 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx); 234 235 /* context */ 236 init_p->cxts[0] = q->cxt; 237 238 /* SETUP */ 239 240 /* Setup-op general parameters */ 241 setup_p->gen_params.spcl_id = vf->sp_cl_id; 242 setup_p->gen_params.stat_id = vfq_stat_id(vf, q); 243 244 /* Setup-op pause params: 245 * Nothing to do, the pause thresholds are set by default to 0 which 246 * effectively turns off the feature for this queue. We don't want 247 * one queue (VF) to interfering with another queue (another VF) 248 */ 249 if (vf->cfg_flags & VF_CFG_FW_FC) 250 BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n", 251 vf->abs_vfid); 252 /* Setup-op flags: 253 * collect statistics, zero statistics, local-switching, security, 254 * OV for Flex10, RSS and MCAST for leading 255 */ 256 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags)) 257 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags); 258 259 /* for VFs, enable tx switching, bd coherency, and mac address 260 * anti-spoofing 261 */ 262 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags); 263 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags); 264 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags); 265 266 if (vfq_is_leading(q)) { 267 __set_bit(BNX2X_Q_FLG_LEADING_RSS, &setup_p->flags); 268 __set_bit(BNX2X_Q_FLG_MCAST, &setup_p->flags); 269 } 270 271 /* Setup-op rx parameters */ 272 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) { 273 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params; 274 275 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q); 276 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx); 277 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid); 278 279 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags)) 280 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES; 281 } 282 283 /* Setup-op tx parameters */ 284 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) { 285 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss; 286 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx); 287 } 288 } 289 290 /* VFOP queue construction */ 291 static void bnx2x_vfop_qctor(struct bnx2x *bp, struct bnx2x_virtf *vf) 292 { 293 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 294 struct bnx2x_vfop_args_qctor *args = &vfop->args.qctor; 295 struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate; 296 enum bnx2x_vfop_qctor_state state = vfop->state; 297 298 bnx2x_vfop_reset_wq(vf); 299 300 if (vfop->rc < 0) 301 goto op_err; 302 303 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 304 305 switch (state) { 306 case BNX2X_VFOP_QCTOR_INIT: 307 308 /* has this queue already been opened? */ 309 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) == 310 BNX2X_Q_LOGICAL_STATE_ACTIVE) { 311 DP(BNX2X_MSG_IOV, 312 "Entered qctor but queue was already up. Aborting gracefully\n"); 313 goto op_done; 314 } 315 316 /* next state */ 317 vfop->state = BNX2X_VFOP_QCTOR_SETUP; 318 319 q_params->cmd = BNX2X_Q_CMD_INIT; 320 vfop->rc = bnx2x_queue_state_change(bp, q_params); 321 322 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT); 323 324 case BNX2X_VFOP_QCTOR_SETUP: 325 /* next state */ 326 vfop->state = BNX2X_VFOP_QCTOR_INT_EN; 327 328 /* copy pre-prepared setup params to the queue-state params */ 329 vfop->op_p->qctor.qstate.params.setup = 330 vfop->op_p->qctor.prep_qsetup; 331 332 q_params->cmd = BNX2X_Q_CMD_SETUP; 333 vfop->rc = bnx2x_queue_state_change(bp, q_params); 334 335 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT); 336 337 case BNX2X_VFOP_QCTOR_INT_EN: 338 339 /* enable interrupts */ 340 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, args->sb_idx), 341 USTORM_ID, 0, IGU_INT_ENABLE, 0); 342 goto op_done; 343 default: 344 bnx2x_vfop_default(state); 345 } 346 op_err: 347 BNX2X_ERR("QCTOR[%d:%d] error: cmd %d, rc %d\n", 348 vf->abs_vfid, args->qid, q_params->cmd, vfop->rc); 349 op_done: 350 bnx2x_vfop_end(bp, vf, vfop); 351 op_pending: 352 return; 353 } 354 355 static int bnx2x_vfop_qctor_cmd(struct bnx2x *bp, 356 struct bnx2x_virtf *vf, 357 struct bnx2x_vfop_cmd *cmd, 358 int qid) 359 { 360 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 361 362 if (vfop) { 363 vf->op_params.qctor.qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj); 364 365 vfop->args.qctor.qid = qid; 366 vfop->args.qctor.sb_idx = bnx2x_vfq(vf, qid, sb_idx); 367 368 bnx2x_vfop_opset(BNX2X_VFOP_QCTOR_INIT, 369 bnx2x_vfop_qctor, cmd->done); 370 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qctor, 371 cmd->block); 372 } 373 return -ENOMEM; 374 } 375 376 /* VFOP queue destruction */ 377 static void bnx2x_vfop_qdtor(struct bnx2x *bp, struct bnx2x_virtf *vf) 378 { 379 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 380 struct bnx2x_vfop_args_qdtor *qdtor = &vfop->args.qdtor; 381 struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate; 382 enum bnx2x_vfop_qdtor_state state = vfop->state; 383 384 bnx2x_vfop_reset_wq(vf); 385 386 if (vfop->rc < 0) 387 goto op_err; 388 389 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 390 391 switch (state) { 392 case BNX2X_VFOP_QDTOR_HALT: 393 394 /* has this queue already been stopped? */ 395 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) == 396 BNX2X_Q_LOGICAL_STATE_STOPPED) { 397 DP(BNX2X_MSG_IOV, 398 "Entered qdtor but queue was already stopped. Aborting gracefully\n"); 399 goto op_done; 400 } 401 402 /* next state */ 403 vfop->state = BNX2X_VFOP_QDTOR_TERMINATE; 404 405 q_params->cmd = BNX2X_Q_CMD_HALT; 406 vfop->rc = bnx2x_queue_state_change(bp, q_params); 407 408 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT); 409 410 case BNX2X_VFOP_QDTOR_TERMINATE: 411 /* next state */ 412 vfop->state = BNX2X_VFOP_QDTOR_CFCDEL; 413 414 q_params->cmd = BNX2X_Q_CMD_TERMINATE; 415 vfop->rc = bnx2x_queue_state_change(bp, q_params); 416 417 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT); 418 419 case BNX2X_VFOP_QDTOR_CFCDEL: 420 /* next state */ 421 vfop->state = BNX2X_VFOP_QDTOR_DONE; 422 423 q_params->cmd = BNX2X_Q_CMD_CFC_DEL; 424 vfop->rc = bnx2x_queue_state_change(bp, q_params); 425 426 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 427 op_err: 428 BNX2X_ERR("QDTOR[%d:%d] error: cmd %d, rc %d\n", 429 vf->abs_vfid, qdtor->qid, q_params->cmd, vfop->rc); 430 op_done: 431 case BNX2X_VFOP_QDTOR_DONE: 432 /* invalidate the context */ 433 qdtor->cxt->ustorm_ag_context.cdu_usage = 0; 434 qdtor->cxt->xstorm_ag_context.cdu_reserved = 0; 435 bnx2x_vfop_end(bp, vf, vfop); 436 return; 437 default: 438 bnx2x_vfop_default(state); 439 } 440 op_pending: 441 return; 442 } 443 444 static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp, 445 struct bnx2x_virtf *vf, 446 struct bnx2x_vfop_cmd *cmd, 447 int qid) 448 { 449 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 450 451 if (vfop) { 452 struct bnx2x_queue_state_params *qstate = 453 &vf->op_params.qctor.qstate; 454 455 memset(qstate, 0, sizeof(*qstate)); 456 qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj); 457 458 vfop->args.qdtor.qid = qid; 459 vfop->args.qdtor.cxt = bnx2x_vfq(vf, qid, cxt); 460 461 bnx2x_vfop_opset(BNX2X_VFOP_QDTOR_HALT, 462 bnx2x_vfop_qdtor, cmd->done); 463 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor, 464 cmd->block); 465 } 466 DP(BNX2X_MSG_IOV, "VF[%d] failed to add a vfop. rc %d\n", 467 vf->abs_vfid, vfop->rc); 468 return -ENOMEM; 469 } 470 471 static void 472 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid) 473 { 474 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); 475 if (vf) { 476 if (!vf_sb_count(vf)) 477 vf->igu_base_id = igu_sb_id; 478 ++vf_sb_count(vf); 479 } 480 } 481 482 /* VFOP MAC/VLAN helpers */ 483 static inline void bnx2x_vfop_credit(struct bnx2x *bp, 484 struct bnx2x_vfop *vfop, 485 struct bnx2x_vlan_mac_obj *obj) 486 { 487 struct bnx2x_vfop_args_filters *args = &vfop->args.filters; 488 489 /* update credit only if there is no error 490 * and a valid credit counter 491 */ 492 if (!vfop->rc && args->credit) { 493 int cnt = 0; 494 struct list_head *pos; 495 496 list_for_each(pos, &obj->head) 497 cnt++; 498 499 atomic_set(args->credit, cnt); 500 } 501 } 502 503 static int bnx2x_vfop_set_user_req(struct bnx2x *bp, 504 struct bnx2x_vfop_filter *pos, 505 struct bnx2x_vlan_mac_data *user_req) 506 { 507 user_req->cmd = pos->add ? BNX2X_VLAN_MAC_ADD : 508 BNX2X_VLAN_MAC_DEL; 509 510 switch (pos->type) { 511 case BNX2X_VFOP_FILTER_MAC: 512 memcpy(user_req->u.mac.mac, pos->mac, ETH_ALEN); 513 break; 514 case BNX2X_VFOP_FILTER_VLAN: 515 user_req->u.vlan.vlan = pos->vid; 516 break; 517 default: 518 BNX2X_ERR("Invalid filter type, skipping\n"); 519 return 1; 520 } 521 return 0; 522 } 523 524 static int 525 bnx2x_vfop_config_vlan0(struct bnx2x *bp, 526 struct bnx2x_vlan_mac_ramrod_params *vlan_mac, 527 bool add) 528 { 529 int rc; 530 531 vlan_mac->user_req.cmd = add ? BNX2X_VLAN_MAC_ADD : 532 BNX2X_VLAN_MAC_DEL; 533 vlan_mac->user_req.u.vlan.vlan = 0; 534 535 rc = bnx2x_config_vlan_mac(bp, vlan_mac); 536 if (rc == -EEXIST) 537 rc = 0; 538 return rc; 539 } 540 541 static int bnx2x_vfop_config_list(struct bnx2x *bp, 542 struct bnx2x_vfop_filters *filters, 543 struct bnx2x_vlan_mac_ramrod_params *vlan_mac) 544 { 545 struct bnx2x_vfop_filter *pos, *tmp; 546 struct list_head rollback_list, *filters_list = &filters->head; 547 struct bnx2x_vlan_mac_data *user_req = &vlan_mac->user_req; 548 int rc = 0, cnt = 0; 549 550 INIT_LIST_HEAD(&rollback_list); 551 552 list_for_each_entry_safe(pos, tmp, filters_list, link) { 553 if (bnx2x_vfop_set_user_req(bp, pos, user_req)) 554 continue; 555 556 rc = bnx2x_config_vlan_mac(bp, vlan_mac); 557 if (rc >= 0) { 558 cnt += pos->add ? 1 : -1; 559 list_del(&pos->link); 560 list_add(&pos->link, &rollback_list); 561 rc = 0; 562 } else if (rc == -EEXIST) { 563 rc = 0; 564 } else { 565 BNX2X_ERR("Failed to add a new vlan_mac command\n"); 566 break; 567 } 568 } 569 570 /* rollback if error or too many rules added */ 571 if (rc || cnt > filters->add_cnt) { 572 BNX2X_ERR("error or too many rules added. Performing rollback\n"); 573 list_for_each_entry_safe(pos, tmp, &rollback_list, link) { 574 pos->add = !pos->add; /* reverse op */ 575 bnx2x_vfop_set_user_req(bp, pos, user_req); 576 bnx2x_config_vlan_mac(bp, vlan_mac); 577 list_del(&pos->link); 578 } 579 cnt = 0; 580 if (!rc) 581 rc = -EINVAL; 582 } 583 filters->add_cnt = cnt; 584 return rc; 585 } 586 587 /* VFOP set VLAN/MAC */ 588 static void bnx2x_vfop_vlan_mac(struct bnx2x *bp, struct bnx2x_virtf *vf) 589 { 590 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 591 struct bnx2x_vlan_mac_ramrod_params *vlan_mac = &vfop->op_p->vlan_mac; 592 struct bnx2x_vlan_mac_obj *obj = vlan_mac->vlan_mac_obj; 593 struct bnx2x_vfop_filters *filters = vfop->args.filters.multi_filter; 594 595 enum bnx2x_vfop_vlan_mac_state state = vfop->state; 596 597 if (vfop->rc < 0) 598 goto op_err; 599 600 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 601 602 bnx2x_vfop_reset_wq(vf); 603 604 switch (state) { 605 case BNX2X_VFOP_VLAN_MAC_CLEAR: 606 /* next state */ 607 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE; 608 609 /* do delete */ 610 vfop->rc = obj->delete_all(bp, obj, 611 &vlan_mac->user_req.vlan_mac_flags, 612 &vlan_mac->ramrod_flags); 613 614 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 615 616 case BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE: 617 /* next state */ 618 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE; 619 620 /* do config */ 621 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac); 622 if (vfop->rc == -EEXIST) 623 vfop->rc = 0; 624 625 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 626 627 case BNX2X_VFOP_VLAN_MAC_CHK_DONE: 628 vfop->rc = !!obj->raw.check_pending(&obj->raw); 629 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 630 631 case BNX2X_VFOP_MAC_CONFIG_LIST: 632 /* next state */ 633 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE; 634 635 /* do list config */ 636 vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac); 637 if (vfop->rc) 638 goto op_err; 639 640 set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags); 641 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac); 642 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 643 644 case BNX2X_VFOP_VLAN_CONFIG_LIST: 645 /* next state */ 646 vfop->state = BNX2X_VFOP_VLAN_CONFIG_LIST_0; 647 648 /* remove vlan0 - could be no-op */ 649 vfop->rc = bnx2x_vfop_config_vlan0(bp, vlan_mac, false); 650 if (vfop->rc) 651 goto op_err; 652 653 /* Do vlan list config. if this operation fails we try to 654 * restore vlan0 to keep the queue is working order 655 */ 656 vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac); 657 if (!vfop->rc) { 658 set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags); 659 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac); 660 } 661 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT); /* fall-through */ 662 663 case BNX2X_VFOP_VLAN_CONFIG_LIST_0: 664 /* next state */ 665 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE; 666 667 if (list_empty(&obj->head)) 668 /* add vlan0 */ 669 vfop->rc = bnx2x_vfop_config_vlan0(bp, vlan_mac, true); 670 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 671 672 default: 673 bnx2x_vfop_default(state); 674 } 675 op_err: 676 BNX2X_ERR("VLAN-MAC error: rc %d\n", vfop->rc); 677 op_done: 678 kfree(filters); 679 bnx2x_vfop_credit(bp, vfop, obj); 680 bnx2x_vfop_end(bp, vf, vfop); 681 op_pending: 682 return; 683 } 684 685 struct bnx2x_vfop_vlan_mac_flags { 686 bool drv_only; 687 bool dont_consume; 688 bool single_cmd; 689 bool add; 690 }; 691 692 static void 693 bnx2x_vfop_vlan_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod, 694 struct bnx2x_vfop_vlan_mac_flags *flags) 695 { 696 struct bnx2x_vlan_mac_data *ureq = &ramrod->user_req; 697 698 memset(ramrod, 0, sizeof(*ramrod)); 699 700 /* ramrod flags */ 701 if (flags->drv_only) 702 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod->ramrod_flags); 703 if (flags->single_cmd) 704 set_bit(RAMROD_EXEC, &ramrod->ramrod_flags); 705 706 /* mac_vlan flags */ 707 if (flags->dont_consume) 708 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &ureq->vlan_mac_flags); 709 710 /* cmd */ 711 ureq->cmd = flags->add ? BNX2X_VLAN_MAC_ADD : BNX2X_VLAN_MAC_DEL; 712 } 713 714 static inline void 715 bnx2x_vfop_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod, 716 struct bnx2x_vfop_vlan_mac_flags *flags) 717 { 718 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, flags); 719 set_bit(BNX2X_ETH_MAC, &ramrod->user_req.vlan_mac_flags); 720 } 721 722 static int bnx2x_vfop_mac_delall_cmd(struct bnx2x *bp, 723 struct bnx2x_virtf *vf, 724 struct bnx2x_vfop_cmd *cmd, 725 int qid, bool drv_only) 726 { 727 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 728 729 if (vfop) { 730 struct bnx2x_vfop_args_filters filters = { 731 .multi_filter = NULL, /* single */ 732 .credit = NULL, /* consume credit */ 733 }; 734 struct bnx2x_vfop_vlan_mac_flags flags = { 735 .drv_only = drv_only, 736 .dont_consume = (filters.credit != NULL), 737 .single_cmd = true, 738 .add = false /* don't care */, 739 }; 740 struct bnx2x_vlan_mac_ramrod_params *ramrod = 741 &vf->op_params.vlan_mac; 742 743 /* set ramrod params */ 744 bnx2x_vfop_mac_prep_ramrod(ramrod, &flags); 745 746 /* set object */ 747 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj); 748 749 /* set extra args */ 750 vfop->args.filters = filters; 751 752 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR, 753 bnx2x_vfop_vlan_mac, cmd->done); 754 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac, 755 cmd->block); 756 } 757 return -ENOMEM; 758 } 759 760 int bnx2x_vfop_mac_list_cmd(struct bnx2x *bp, 761 struct bnx2x_virtf *vf, 762 struct bnx2x_vfop_cmd *cmd, 763 struct bnx2x_vfop_filters *macs, 764 int qid, bool drv_only) 765 { 766 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 767 768 if (vfop) { 769 struct bnx2x_vfop_args_filters filters = { 770 .multi_filter = macs, 771 .credit = NULL, /* consume credit */ 772 }; 773 struct bnx2x_vfop_vlan_mac_flags flags = { 774 .drv_only = drv_only, 775 .dont_consume = (filters.credit != NULL), 776 .single_cmd = false, 777 .add = false, /* don't care since only the items in the 778 * filters list affect the sp operation, 779 * not the list itself 780 */ 781 }; 782 struct bnx2x_vlan_mac_ramrod_params *ramrod = 783 &vf->op_params.vlan_mac; 784 785 /* set ramrod params */ 786 bnx2x_vfop_mac_prep_ramrod(ramrod, &flags); 787 788 /* set object */ 789 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj); 790 791 /* set extra args */ 792 filters.multi_filter->add_cnt = BNX2X_VFOP_FILTER_ADD_CNT_MAX; 793 vfop->args.filters = filters; 794 795 bnx2x_vfop_opset(BNX2X_VFOP_MAC_CONFIG_LIST, 796 bnx2x_vfop_vlan_mac, cmd->done); 797 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac, 798 cmd->block); 799 } 800 return -ENOMEM; 801 } 802 803 int bnx2x_vfop_vlan_set_cmd(struct bnx2x *bp, 804 struct bnx2x_virtf *vf, 805 struct bnx2x_vfop_cmd *cmd, 806 int qid, u16 vid, bool add) 807 { 808 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 809 810 if (vfop) { 811 struct bnx2x_vfop_args_filters filters = { 812 .multi_filter = NULL, /* single command */ 813 .credit = &bnx2x_vfq(vf, qid, vlan_count), 814 }; 815 struct bnx2x_vfop_vlan_mac_flags flags = { 816 .drv_only = false, 817 .dont_consume = (filters.credit != NULL), 818 .single_cmd = true, 819 .add = add, 820 }; 821 struct bnx2x_vlan_mac_ramrod_params *ramrod = 822 &vf->op_params.vlan_mac; 823 824 /* set ramrod params */ 825 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags); 826 ramrod->user_req.u.vlan.vlan = vid; 827 828 /* set object */ 829 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj); 830 831 /* set extra args */ 832 vfop->args.filters = filters; 833 834 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE, 835 bnx2x_vfop_vlan_mac, cmd->done); 836 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac, 837 cmd->block); 838 } 839 return -ENOMEM; 840 } 841 842 static int bnx2x_vfop_vlan_delall_cmd(struct bnx2x *bp, 843 struct bnx2x_virtf *vf, 844 struct bnx2x_vfop_cmd *cmd, 845 int qid, bool drv_only) 846 { 847 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 848 849 if (vfop) { 850 struct bnx2x_vfop_args_filters filters = { 851 .multi_filter = NULL, /* single command */ 852 .credit = &bnx2x_vfq(vf, qid, vlan_count), 853 }; 854 struct bnx2x_vfop_vlan_mac_flags flags = { 855 .drv_only = drv_only, 856 .dont_consume = (filters.credit != NULL), 857 .single_cmd = true, 858 .add = false, /* don't care */ 859 }; 860 struct bnx2x_vlan_mac_ramrod_params *ramrod = 861 &vf->op_params.vlan_mac; 862 863 /* set ramrod params */ 864 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags); 865 866 /* set object */ 867 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj); 868 869 /* set extra args */ 870 vfop->args.filters = filters; 871 872 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR, 873 bnx2x_vfop_vlan_mac, cmd->done); 874 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac, 875 cmd->block); 876 } 877 return -ENOMEM; 878 } 879 880 int bnx2x_vfop_vlan_list_cmd(struct bnx2x *bp, 881 struct bnx2x_virtf *vf, 882 struct bnx2x_vfop_cmd *cmd, 883 struct bnx2x_vfop_filters *vlans, 884 int qid, bool drv_only) 885 { 886 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 887 888 if (vfop) { 889 struct bnx2x_vfop_args_filters filters = { 890 .multi_filter = vlans, 891 .credit = &bnx2x_vfq(vf, qid, vlan_count), 892 }; 893 struct bnx2x_vfop_vlan_mac_flags flags = { 894 .drv_only = drv_only, 895 .dont_consume = (filters.credit != NULL), 896 .single_cmd = false, 897 .add = false, /* don't care */ 898 }; 899 struct bnx2x_vlan_mac_ramrod_params *ramrod = 900 &vf->op_params.vlan_mac; 901 902 /* set ramrod params */ 903 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags); 904 905 /* set object */ 906 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj); 907 908 /* set extra args */ 909 filters.multi_filter->add_cnt = vf_vlan_rules_cnt(vf) - 910 atomic_read(filters.credit); 911 912 vfop->args.filters = filters; 913 914 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_CONFIG_LIST, 915 bnx2x_vfop_vlan_mac, cmd->done); 916 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac, 917 cmd->block); 918 } 919 return -ENOMEM; 920 } 921 922 /* VFOP queue setup (queue constructor + set vlan 0) */ 923 static void bnx2x_vfop_qsetup(struct bnx2x *bp, struct bnx2x_virtf *vf) 924 { 925 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 926 int qid = vfop->args.qctor.qid; 927 enum bnx2x_vfop_qsetup_state state = vfop->state; 928 struct bnx2x_vfop_cmd cmd = { 929 .done = bnx2x_vfop_qsetup, 930 .block = false, 931 }; 932 933 if (vfop->rc < 0) 934 goto op_err; 935 936 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 937 938 switch (state) { 939 case BNX2X_VFOP_QSETUP_CTOR: 940 /* init the queue ctor command */ 941 vfop->state = BNX2X_VFOP_QSETUP_VLAN0; 942 vfop->rc = bnx2x_vfop_qctor_cmd(bp, vf, &cmd, qid); 943 if (vfop->rc) 944 goto op_err; 945 return; 946 947 case BNX2X_VFOP_QSETUP_VLAN0: 948 /* skip if non-leading or FPGA/EMU*/ 949 if (qid) 950 goto op_done; 951 952 /* init the queue set-vlan command (for vlan 0) */ 953 vfop->state = BNX2X_VFOP_QSETUP_DONE; 954 vfop->rc = bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, 0, true); 955 if (vfop->rc) 956 goto op_err; 957 return; 958 op_err: 959 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, vfop->rc); 960 op_done: 961 case BNX2X_VFOP_QSETUP_DONE: 962 bnx2x_vfop_end(bp, vf, vfop); 963 return; 964 default: 965 bnx2x_vfop_default(state); 966 } 967 } 968 969 int bnx2x_vfop_qsetup_cmd(struct bnx2x *bp, 970 struct bnx2x_virtf *vf, 971 struct bnx2x_vfop_cmd *cmd, 972 int qid) 973 { 974 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 975 976 if (vfop) { 977 vfop->args.qctor.qid = qid; 978 979 bnx2x_vfop_opset(BNX2X_VFOP_QSETUP_CTOR, 980 bnx2x_vfop_qsetup, cmd->done); 981 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qsetup, 982 cmd->block); 983 } 984 return -ENOMEM; 985 } 986 987 /* VFOP queue FLR handling (clear vlans, clear macs, queue destructor) */ 988 static void bnx2x_vfop_qflr(struct bnx2x *bp, struct bnx2x_virtf *vf) 989 { 990 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 991 int qid = vfop->args.qx.qid; 992 enum bnx2x_vfop_qflr_state state = vfop->state; 993 struct bnx2x_queue_state_params *qstate; 994 struct bnx2x_vfop_cmd cmd; 995 996 bnx2x_vfop_reset_wq(vf); 997 998 if (vfop->rc < 0) 999 goto op_err; 1000 1001 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %d\n", vf->abs_vfid, state); 1002 1003 cmd.done = bnx2x_vfop_qflr; 1004 cmd.block = false; 1005 1006 switch (state) { 1007 case BNX2X_VFOP_QFLR_CLR_VLAN: 1008 /* vlan-clear-all: driver-only, don't consume credit */ 1009 vfop->state = BNX2X_VFOP_QFLR_CLR_MAC; 1010 vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, true); 1011 if (vfop->rc) 1012 goto op_err; 1013 return; 1014 1015 case BNX2X_VFOP_QFLR_CLR_MAC: 1016 /* mac-clear-all: driver only consume credit */ 1017 vfop->state = BNX2X_VFOP_QFLR_TERMINATE; 1018 vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, true); 1019 DP(BNX2X_MSG_IOV, 1020 "VF[%d] vfop->rc after bnx2x_vfop_mac_delall_cmd was %d", 1021 vf->abs_vfid, vfop->rc); 1022 if (vfop->rc) 1023 goto op_err; 1024 return; 1025 1026 case BNX2X_VFOP_QFLR_TERMINATE: 1027 qstate = &vfop->op_p->qctor.qstate; 1028 memset(qstate , 0, sizeof(*qstate)); 1029 qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj); 1030 vfop->state = BNX2X_VFOP_QFLR_DONE; 1031 1032 DP(BNX2X_MSG_IOV, "VF[%d] qstate during flr was %d\n", 1033 vf->abs_vfid, qstate->q_obj->state); 1034 1035 if (qstate->q_obj->state != BNX2X_Q_STATE_RESET) { 1036 qstate->q_obj->state = BNX2X_Q_STATE_STOPPED; 1037 qstate->cmd = BNX2X_Q_CMD_TERMINATE; 1038 vfop->rc = bnx2x_queue_state_change(bp, qstate); 1039 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_VERIFY_PEND); 1040 } else { 1041 goto op_done; 1042 } 1043 1044 op_err: 1045 BNX2X_ERR("QFLR[%d:%d] error: rc %d\n", 1046 vf->abs_vfid, qid, vfop->rc); 1047 op_done: 1048 case BNX2X_VFOP_QFLR_DONE: 1049 bnx2x_vfop_end(bp, vf, vfop); 1050 return; 1051 default: 1052 bnx2x_vfop_default(state); 1053 } 1054 op_pending: 1055 return; 1056 } 1057 1058 static int bnx2x_vfop_qflr_cmd(struct bnx2x *bp, 1059 struct bnx2x_virtf *vf, 1060 struct bnx2x_vfop_cmd *cmd, 1061 int qid) 1062 { 1063 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 1064 1065 if (vfop) { 1066 vfop->args.qx.qid = qid; 1067 bnx2x_vfop_opset(BNX2X_VFOP_QFLR_CLR_VLAN, 1068 bnx2x_vfop_qflr, cmd->done); 1069 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qflr, 1070 cmd->block); 1071 } 1072 return -ENOMEM; 1073 } 1074 1075 /* VFOP multi-casts */ 1076 static void bnx2x_vfop_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf) 1077 { 1078 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 1079 struct bnx2x_mcast_ramrod_params *mcast = &vfop->op_p->mcast; 1080 struct bnx2x_raw_obj *raw = &mcast->mcast_obj->raw; 1081 struct bnx2x_vfop_args_mcast *args = &vfop->args.mc_list; 1082 enum bnx2x_vfop_mcast_state state = vfop->state; 1083 int i; 1084 1085 bnx2x_vfop_reset_wq(vf); 1086 1087 if (vfop->rc < 0) 1088 goto op_err; 1089 1090 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 1091 1092 switch (state) { 1093 case BNX2X_VFOP_MCAST_DEL: 1094 /* clear existing mcasts */ 1095 vfop->state = BNX2X_VFOP_MCAST_ADD; 1096 vfop->rc = bnx2x_config_mcast(bp, mcast, BNX2X_MCAST_CMD_DEL); 1097 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT); 1098 1099 case BNX2X_VFOP_MCAST_ADD: 1100 if (raw->check_pending(raw)) 1101 goto op_pending; 1102 1103 if (args->mc_num) { 1104 /* update mcast list on the ramrod params */ 1105 INIT_LIST_HEAD(&mcast->mcast_list); 1106 for (i = 0; i < args->mc_num; i++) 1107 list_add_tail(&(args->mc[i].link), 1108 &mcast->mcast_list); 1109 /* add new mcasts */ 1110 vfop->state = BNX2X_VFOP_MCAST_CHK_DONE; 1111 vfop->rc = bnx2x_config_mcast(bp, mcast, 1112 BNX2X_MCAST_CMD_ADD); 1113 } 1114 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 1115 1116 case BNX2X_VFOP_MCAST_CHK_DONE: 1117 vfop->rc = raw->check_pending(raw) ? 1 : 0; 1118 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 1119 default: 1120 bnx2x_vfop_default(state); 1121 } 1122 op_err: 1123 BNX2X_ERR("MCAST CONFIG error: rc %d\n", vfop->rc); 1124 op_done: 1125 kfree(args->mc); 1126 bnx2x_vfop_end(bp, vf, vfop); 1127 op_pending: 1128 return; 1129 } 1130 1131 int bnx2x_vfop_mcast_cmd(struct bnx2x *bp, 1132 struct bnx2x_virtf *vf, 1133 struct bnx2x_vfop_cmd *cmd, 1134 bnx2x_mac_addr_t *mcasts, 1135 int mcast_num, bool drv_only) 1136 { 1137 struct bnx2x_vfop *vfop = NULL; 1138 size_t mc_sz = mcast_num * sizeof(struct bnx2x_mcast_list_elem); 1139 struct bnx2x_mcast_list_elem *mc = mc_sz ? kzalloc(mc_sz, GFP_KERNEL) : 1140 NULL; 1141 1142 if (!mc_sz || mc) { 1143 vfop = bnx2x_vfop_add(bp, vf); 1144 if (vfop) { 1145 int i; 1146 struct bnx2x_mcast_ramrod_params *ramrod = 1147 &vf->op_params.mcast; 1148 1149 /* set ramrod params */ 1150 memset(ramrod, 0, sizeof(*ramrod)); 1151 ramrod->mcast_obj = &vf->mcast_obj; 1152 if (drv_only) 1153 set_bit(RAMROD_DRV_CLR_ONLY, 1154 &ramrod->ramrod_flags); 1155 1156 /* copy mcasts pointers */ 1157 vfop->args.mc_list.mc_num = mcast_num; 1158 vfop->args.mc_list.mc = mc; 1159 for (i = 0; i < mcast_num; i++) 1160 mc[i].mac = mcasts[i]; 1161 1162 bnx2x_vfop_opset(BNX2X_VFOP_MCAST_DEL, 1163 bnx2x_vfop_mcast, cmd->done); 1164 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_mcast, 1165 cmd->block); 1166 } else { 1167 kfree(mc); 1168 } 1169 } 1170 return -ENOMEM; 1171 } 1172 1173 /* VFOP rx-mode */ 1174 static void bnx2x_vfop_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf) 1175 { 1176 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 1177 struct bnx2x_rx_mode_ramrod_params *ramrod = &vfop->op_p->rx_mode; 1178 enum bnx2x_vfop_rxmode_state state = vfop->state; 1179 1180 bnx2x_vfop_reset_wq(vf); 1181 1182 if (vfop->rc < 0) 1183 goto op_err; 1184 1185 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 1186 1187 switch (state) { 1188 case BNX2X_VFOP_RXMODE_CONFIG: 1189 /* next state */ 1190 vfop->state = BNX2X_VFOP_RXMODE_DONE; 1191 1192 vfop->rc = bnx2x_config_rx_mode(bp, ramrod); 1193 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE); 1194 op_err: 1195 BNX2X_ERR("RXMODE error: rc %d\n", vfop->rc); 1196 op_done: 1197 case BNX2X_VFOP_RXMODE_DONE: 1198 bnx2x_vfop_end(bp, vf, vfop); 1199 return; 1200 default: 1201 bnx2x_vfop_default(state); 1202 } 1203 op_pending: 1204 return; 1205 } 1206 1207 int bnx2x_vfop_rxmode_cmd(struct bnx2x *bp, 1208 struct bnx2x_virtf *vf, 1209 struct bnx2x_vfop_cmd *cmd, 1210 int qid, unsigned long accept_flags) 1211 { 1212 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid); 1213 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 1214 1215 if (vfop) { 1216 struct bnx2x_rx_mode_ramrod_params *ramrod = 1217 &vf->op_params.rx_mode; 1218 1219 memset(ramrod, 0, sizeof(*ramrod)); 1220 1221 /* Prepare ramrod parameters */ 1222 ramrod->cid = vfq->cid; 1223 ramrod->cl_id = vfq_cl_id(vf, vfq); 1224 ramrod->rx_mode_obj = &bp->rx_mode_obj; 1225 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid); 1226 1227 ramrod->rx_accept_flags = accept_flags; 1228 ramrod->tx_accept_flags = accept_flags; 1229 ramrod->pstate = &vf->filter_state; 1230 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING; 1231 1232 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state); 1233 set_bit(RAMROD_RX, &ramrod->ramrod_flags); 1234 set_bit(RAMROD_TX, &ramrod->ramrod_flags); 1235 1236 ramrod->rdata = 1237 bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2); 1238 ramrod->rdata_mapping = 1239 bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2); 1240 1241 bnx2x_vfop_opset(BNX2X_VFOP_RXMODE_CONFIG, 1242 bnx2x_vfop_rxmode, cmd->done); 1243 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rxmode, 1244 cmd->block); 1245 } 1246 return -ENOMEM; 1247 } 1248 1249 /* VFOP queue tear-down ('drop all' rx-mode, clear vlans, clear macs, 1250 * queue destructor) 1251 */ 1252 static void bnx2x_vfop_qdown(struct bnx2x *bp, struct bnx2x_virtf *vf) 1253 { 1254 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 1255 int qid = vfop->args.qx.qid; 1256 enum bnx2x_vfop_qteardown_state state = vfop->state; 1257 struct bnx2x_vfop_cmd cmd; 1258 1259 if (vfop->rc < 0) 1260 goto op_err; 1261 1262 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 1263 1264 cmd.done = bnx2x_vfop_qdown; 1265 cmd.block = false; 1266 1267 switch (state) { 1268 case BNX2X_VFOP_QTEARDOWN_RXMODE: 1269 /* Drop all */ 1270 vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_VLAN; 1271 vfop->rc = bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, qid, 0); 1272 if (vfop->rc) 1273 goto op_err; 1274 return; 1275 1276 case BNX2X_VFOP_QTEARDOWN_CLR_VLAN: 1277 /* vlan-clear-all: don't consume credit */ 1278 vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MAC; 1279 vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false); 1280 if (vfop->rc) 1281 goto op_err; 1282 return; 1283 1284 case BNX2X_VFOP_QTEARDOWN_CLR_MAC: 1285 /* mac-clear-all: consume credit */ 1286 vfop->state = BNX2X_VFOP_QTEARDOWN_QDTOR; 1287 vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, false); 1288 if (vfop->rc) 1289 goto op_err; 1290 return; 1291 1292 case BNX2X_VFOP_QTEARDOWN_QDTOR: 1293 /* run the queue destruction flow */ 1294 DP(BNX2X_MSG_IOV, "case: BNX2X_VFOP_QTEARDOWN_QDTOR\n"); 1295 vfop->state = BNX2X_VFOP_QTEARDOWN_DONE; 1296 DP(BNX2X_MSG_IOV, "new state: BNX2X_VFOP_QTEARDOWN_DONE\n"); 1297 vfop->rc = bnx2x_vfop_qdtor_cmd(bp, vf, &cmd, qid); 1298 DP(BNX2X_MSG_IOV, "returned from cmd\n"); 1299 if (vfop->rc) 1300 goto op_err; 1301 return; 1302 op_err: 1303 BNX2X_ERR("QTEARDOWN[%d:%d] error: rc %d\n", 1304 vf->abs_vfid, qid, vfop->rc); 1305 1306 case BNX2X_VFOP_QTEARDOWN_DONE: 1307 bnx2x_vfop_end(bp, vf, vfop); 1308 return; 1309 default: 1310 bnx2x_vfop_default(state); 1311 } 1312 } 1313 1314 int bnx2x_vfop_qdown_cmd(struct bnx2x *bp, 1315 struct bnx2x_virtf *vf, 1316 struct bnx2x_vfop_cmd *cmd, 1317 int qid) 1318 { 1319 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 1320 1321 if (vfop) { 1322 vfop->args.qx.qid = qid; 1323 bnx2x_vfop_opset(BNX2X_VFOP_QTEARDOWN_RXMODE, 1324 bnx2x_vfop_qdown, cmd->done); 1325 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdown, 1326 cmd->block); 1327 } 1328 1329 return -ENOMEM; 1330 } 1331 1332 /* VF enable primitives 1333 * when pretend is required the caller is responsible 1334 * for calling pretend prior to calling these routines 1335 */ 1336 1337 /* called only on E1H or E2. 1338 * When pretending to be PF, the pretend value is the function number 0...7 1339 * When pretending to be VF, the pretend val is the PF-num:VF-valid:ABS-VFID 1340 * combination 1341 */ 1342 int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val) 1343 { 1344 u32 pretend_reg; 1345 1346 if (CHIP_IS_E1H(bp) && pretend_func_val > E1H_FUNC_MAX) 1347 return -1; 1348 1349 /* get my own pretend register */ 1350 pretend_reg = bnx2x_get_pretend_reg(bp); 1351 REG_WR(bp, pretend_reg, pretend_func_val); 1352 REG_RD(bp, pretend_reg); 1353 return 0; 1354 } 1355 1356 /* internal vf enable - until vf is enabled internally all transactions 1357 * are blocked. this routine should always be called last with pretend. 1358 */ 1359 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable) 1360 { 1361 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0); 1362 } 1363 1364 /* clears vf error in all semi blocks */ 1365 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid) 1366 { 1367 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid); 1368 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid); 1369 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid); 1370 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid); 1371 } 1372 1373 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid) 1374 { 1375 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5; 1376 u32 was_err_reg = 0; 1377 1378 switch (was_err_group) { 1379 case 0: 1380 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR; 1381 break; 1382 case 1: 1383 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR; 1384 break; 1385 case 2: 1386 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR; 1387 break; 1388 case 3: 1389 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR; 1390 break; 1391 } 1392 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f)); 1393 } 1394 1395 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf) 1396 { 1397 int i; 1398 u32 val; 1399 1400 /* Set VF masks and configuration - pretend */ 1401 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid)); 1402 1403 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0); 1404 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0); 1405 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0); 1406 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0); 1407 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0); 1408 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0); 1409 1410 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION); 1411 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN); 1412 if (vf->cfg_flags & VF_CFG_INT_SIMD) 1413 val |= IGU_VF_CONF_SINGLE_ISR_EN; 1414 val &= ~IGU_VF_CONF_PARENT_MASK; 1415 val |= BP_FUNC(bp) << IGU_VF_CONF_PARENT_SHIFT; /* parent PF */ 1416 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val); 1417 1418 DP(BNX2X_MSG_IOV, 1419 "value in IGU_REG_VF_CONFIGURATION of vf %d after write %x\n", 1420 vf->abs_vfid, REG_RD(bp, IGU_REG_VF_CONFIGURATION)); 1421 1422 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); 1423 1424 /* iterate over all queues, clear sb consumer */ 1425 for (i = 0; i < vf_sb_count(vf); i++) { 1426 u8 igu_sb_id = vf_igu_sb(vf, i); 1427 1428 /* zero prod memory */ 1429 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0); 1430 1431 /* clear sb state machine */ 1432 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id, 1433 false /* VF */); 1434 1435 /* disable + update */ 1436 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0, 1437 IGU_INT_DISABLE, 1); 1438 } 1439 } 1440 1441 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid) 1442 { 1443 /* set the VF-PF association in the FW */ 1444 storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp)); 1445 storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1); 1446 1447 /* clear vf errors*/ 1448 bnx2x_vf_semi_clear_err(bp, abs_vfid); 1449 bnx2x_vf_pglue_clear_err(bp, abs_vfid); 1450 1451 /* internal vf-enable - pretend */ 1452 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid)); 1453 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid); 1454 bnx2x_vf_enable_internal(bp, true); 1455 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); 1456 } 1457 1458 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf) 1459 { 1460 /* Reset vf in IGU interrupts are still disabled */ 1461 bnx2x_vf_igu_reset(bp, vf); 1462 1463 /* pretend to enable the vf with the PBF */ 1464 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid)); 1465 REG_WR(bp, PBF_REG_DISABLE_VF, 0); 1466 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); 1467 } 1468 1469 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid) 1470 { 1471 struct pci_dev *dev; 1472 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); 1473 1474 if (!vf) 1475 goto unknown_dev; 1476 1477 dev = pci_get_bus_and_slot(vf->bus, vf->devfn); 1478 if (dev) 1479 return bnx2x_is_pcie_pending(dev); 1480 1481 unknown_dev: 1482 BNX2X_ERR("Unknown device\n"); 1483 return false; 1484 } 1485 1486 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid) 1487 { 1488 /* Wait 100ms */ 1489 msleep(100); 1490 1491 /* Verify no pending pci transactions */ 1492 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid)) 1493 BNX2X_ERR("PCIE Transactions still pending\n"); 1494 1495 return 0; 1496 } 1497 1498 /* must be called after the number of PF queues and the number of VFs are 1499 * both known 1500 */ 1501 static void 1502 bnx2x_iov_static_resc(struct bnx2x *bp, struct vf_pf_resc_request *resc) 1503 { 1504 u16 vlan_count = 0; 1505 1506 /* will be set only during VF-ACQUIRE */ 1507 resc->num_rxqs = 0; 1508 resc->num_txqs = 0; 1509 1510 /* no credit calculcis for macs (just yet) */ 1511 resc->num_mac_filters = 1; 1512 1513 /* divvy up vlan rules */ 1514 vlan_count = bp->vlans_pool.check(&bp->vlans_pool); 1515 vlan_count = 1 << ilog2(vlan_count); 1516 resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp); 1517 1518 /* no real limitation */ 1519 resc->num_mc_filters = 0; 1520 1521 /* num_sbs already set */ 1522 } 1523 1524 /* FLR routines: */ 1525 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf) 1526 { 1527 /* reset the state variables */ 1528 bnx2x_iov_static_resc(bp, &vf->alloc_resc); 1529 vf->state = VF_FREE; 1530 } 1531 1532 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf) 1533 { 1534 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp); 1535 1536 /* DQ usage counter */ 1537 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid)); 1538 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT, 1539 "DQ VF usage counter timed out", 1540 poll_cnt); 1541 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); 1542 1543 /* FW cleanup command - poll for the results */ 1544 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid), 1545 poll_cnt)) 1546 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid); 1547 1548 /* verify TX hw is flushed */ 1549 bnx2x_tx_hw_flushed(bp, poll_cnt); 1550 } 1551 1552 static void bnx2x_vfop_flr(struct bnx2x *bp, struct bnx2x_virtf *vf) 1553 { 1554 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 1555 struct bnx2x_vfop_args_qx *qx = &vfop->args.qx; 1556 enum bnx2x_vfop_flr_state state = vfop->state; 1557 struct bnx2x_vfop_cmd cmd = { 1558 .done = bnx2x_vfop_flr, 1559 .block = false, 1560 }; 1561 1562 if (vfop->rc < 0) 1563 goto op_err; 1564 1565 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 1566 1567 switch (state) { 1568 case BNX2X_VFOP_FLR_QUEUES: 1569 /* the cleanup operations are valid if and only if the VF 1570 * was first acquired. 1571 */ 1572 if (++(qx->qid) < vf_rxq_count(vf)) { 1573 vfop->rc = bnx2x_vfop_qflr_cmd(bp, vf, &cmd, 1574 qx->qid); 1575 if (vfop->rc) 1576 goto op_err; 1577 return; 1578 } 1579 /* remove multicasts */ 1580 vfop->state = BNX2X_VFOP_FLR_HW; 1581 vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 1582 0, true); 1583 if (vfop->rc) 1584 goto op_err; 1585 return; 1586 case BNX2X_VFOP_FLR_HW: 1587 1588 /* dispatch final cleanup and wait for HW queues to flush */ 1589 bnx2x_vf_flr_clnup_hw(bp, vf); 1590 1591 /* release VF resources */ 1592 bnx2x_vf_free_resc(bp, vf); 1593 1594 /* re-open the mailbox */ 1595 bnx2x_vf_enable_mbx(bp, vf->abs_vfid); 1596 1597 goto op_done; 1598 default: 1599 bnx2x_vfop_default(state); 1600 } 1601 op_err: 1602 BNX2X_ERR("VF[%d] FLR error: rc %d\n", vf->abs_vfid, vfop->rc); 1603 op_done: 1604 vf->flr_clnup_stage = VF_FLR_ACK; 1605 bnx2x_vfop_end(bp, vf, vfop); 1606 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR); 1607 } 1608 1609 static int bnx2x_vfop_flr_cmd(struct bnx2x *bp, 1610 struct bnx2x_virtf *vf, 1611 vfop_handler_t done) 1612 { 1613 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 1614 if (vfop) { 1615 vfop->args.qx.qid = -1; /* loop */ 1616 bnx2x_vfop_opset(BNX2X_VFOP_FLR_QUEUES, 1617 bnx2x_vfop_flr, done); 1618 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_flr, false); 1619 } 1620 return -ENOMEM; 1621 } 1622 1623 static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf) 1624 { 1625 int i = prev_vf ? prev_vf->index + 1 : 0; 1626 struct bnx2x_virtf *vf; 1627 1628 /* find next VF to cleanup */ 1629 next_vf_to_clean: 1630 for (; 1631 i < BNX2X_NR_VIRTFN(bp) && 1632 (bnx2x_vf(bp, i, state) != VF_RESET || 1633 bnx2x_vf(bp, i, flr_clnup_stage) != VF_FLR_CLN); 1634 i++) 1635 ; 1636 1637 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. num of vfs: %d\n", i, 1638 BNX2X_NR_VIRTFN(bp)); 1639 1640 if (i < BNX2X_NR_VIRTFN(bp)) { 1641 vf = BP_VF(bp, i); 1642 1643 /* lock the vf pf channel */ 1644 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR); 1645 1646 /* invoke the VF FLR SM */ 1647 if (bnx2x_vfop_flr_cmd(bp, vf, bnx2x_vf_flr_clnup)) { 1648 BNX2X_ERR("VF[%d]: FLR cleanup failed -ENOMEM\n", 1649 vf->abs_vfid); 1650 1651 /* mark the VF to be ACKED and continue */ 1652 vf->flr_clnup_stage = VF_FLR_ACK; 1653 goto next_vf_to_clean; 1654 } 1655 return; 1656 } 1657 1658 /* we are done, update vf records */ 1659 for_each_vf(bp, i) { 1660 vf = BP_VF(bp, i); 1661 1662 if (vf->flr_clnup_stage != VF_FLR_ACK) 1663 continue; 1664 1665 vf->flr_clnup_stage = VF_FLR_EPILOG; 1666 } 1667 1668 /* Acknowledge the handled VFs. 1669 * we are acknowledge all the vfs which an flr was requested for, even 1670 * if amongst them there are such that we never opened, since the mcp 1671 * will interrupt us immediately again if we only ack some of the bits, 1672 * resulting in an endless loop. This can happen for example in KVM 1673 * where an 'all ones' flr request is sometimes given by hyper visor 1674 */ 1675 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n", 1676 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]); 1677 for (i = 0; i < FLRD_VFS_DWORDS; i++) 1678 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 1679 bp->vfdb->flrd_vfs[i]); 1680 1681 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0); 1682 1683 /* clear the acked bits - better yet if the MCP implemented 1684 * write to clear semantics 1685 */ 1686 for (i = 0; i < FLRD_VFS_DWORDS; i++) 1687 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0); 1688 } 1689 1690 void bnx2x_vf_handle_flr_event(struct bnx2x *bp) 1691 { 1692 int i; 1693 1694 /* Read FLR'd VFs */ 1695 for (i = 0; i < FLRD_VFS_DWORDS; i++) 1696 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]); 1697 1698 DP(BNX2X_MSG_MCP, 1699 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n", 1700 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]); 1701 1702 for_each_vf(bp, i) { 1703 struct bnx2x_virtf *vf = BP_VF(bp, i); 1704 u32 reset = 0; 1705 1706 if (vf->abs_vfid < 32) 1707 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid); 1708 else 1709 reset = bp->vfdb->flrd_vfs[1] & 1710 (1 << (vf->abs_vfid - 32)); 1711 1712 if (reset) { 1713 /* set as reset and ready for cleanup */ 1714 vf->state = VF_RESET; 1715 vf->flr_clnup_stage = VF_FLR_CLN; 1716 1717 DP(BNX2X_MSG_IOV, 1718 "Initiating Final cleanup for VF %d\n", 1719 vf->abs_vfid); 1720 } 1721 } 1722 1723 /* do the FLR cleanup for all marked VFs*/ 1724 bnx2x_vf_flr_clnup(bp, NULL); 1725 } 1726 1727 /* IOV global initialization routines */ 1728 void bnx2x_iov_init_dq(struct bnx2x *bp) 1729 { 1730 if (!IS_SRIOV(bp)) 1731 return; 1732 1733 /* Set the DQ such that the CID reflect the abs_vfid */ 1734 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0); 1735 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS)); 1736 1737 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to 1738 * the PF L2 queues 1739 */ 1740 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID); 1741 1742 /* The VF window size is the log2 of the max number of CIDs per VF */ 1743 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND); 1744 1745 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match 1746 * the Pf doorbell size although the 2 are independent. 1747 */ 1748 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 1749 BNX2X_DB_SHIFT - BNX2X_DB_MIN_SHIFT); 1750 1751 /* No security checks for now - 1752 * configure single rule (out of 16) mask = 0x1, value = 0x0, 1753 * CID range 0 - 0x1ffff 1754 */ 1755 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1); 1756 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0); 1757 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0); 1758 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff); 1759 1760 /* set the number of VF alllowed doorbells to the full DQ range */ 1761 REG_WR(bp, DORQ_REG_VF_NORM_MAX_CID_COUNT, 0x20000); 1762 1763 /* set the VF doorbell threshold */ 1764 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4); 1765 } 1766 1767 void bnx2x_iov_init_dmae(struct bnx2x *bp) 1768 { 1769 DP(BNX2X_MSG_IOV, "SRIOV is %s\n", IS_SRIOV(bp) ? "ON" : "OFF"); 1770 if (!IS_SRIOV(bp)) 1771 return; 1772 1773 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0); 1774 } 1775 1776 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid) 1777 { 1778 struct pci_dev *dev = bp->pdev; 1779 struct bnx2x_sriov *iov = &bp->vfdb->sriov; 1780 1781 return dev->bus->number + ((dev->devfn + iov->offset + 1782 iov->stride * vfid) >> 8); 1783 } 1784 1785 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid) 1786 { 1787 struct pci_dev *dev = bp->pdev; 1788 struct bnx2x_sriov *iov = &bp->vfdb->sriov; 1789 1790 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff; 1791 } 1792 1793 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf) 1794 { 1795 int i, n; 1796 struct pci_dev *dev = bp->pdev; 1797 struct bnx2x_sriov *iov = &bp->vfdb->sriov; 1798 1799 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) { 1800 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i); 1801 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i); 1802 1803 do_div(size, iov->total); 1804 vf->bars[n].bar = start + size * vf->abs_vfid; 1805 vf->bars[n].size = size; 1806 } 1807 } 1808 1809 static int bnx2x_ari_enabled(struct pci_dev *dev) 1810 { 1811 return dev->bus->self && dev->bus->self->ari_enabled; 1812 } 1813 1814 static void 1815 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp) 1816 { 1817 int sb_id; 1818 u32 val; 1819 u8 fid; 1820 1821 /* IGU in normal mode - read CAM */ 1822 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) { 1823 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4); 1824 if (!(val & IGU_REG_MAPPING_MEMORY_VALID)) 1825 continue; 1826 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID); 1827 if (!(fid & IGU_FID_ENCODE_IS_PF)) 1828 bnx2x_vf_set_igu_info(bp, sb_id, 1829 (fid & IGU_FID_VF_NUM_MASK)); 1830 1831 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n", 1832 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"), 1833 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) : 1834 (fid & IGU_FID_VF_NUM_MASK)), sb_id, 1835 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR)); 1836 } 1837 } 1838 1839 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp) 1840 { 1841 if (bp->vfdb) { 1842 kfree(bp->vfdb->vfqs); 1843 kfree(bp->vfdb->vfs); 1844 kfree(bp->vfdb); 1845 } 1846 bp->vfdb = NULL; 1847 } 1848 1849 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov) 1850 { 1851 int pos; 1852 struct pci_dev *dev = bp->pdev; 1853 1854 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); 1855 if (!pos) { 1856 BNX2X_ERR("failed to find SRIOV capability in device\n"); 1857 return -ENODEV; 1858 } 1859 1860 iov->pos = pos; 1861 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos); 1862 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl); 1863 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total); 1864 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial); 1865 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset); 1866 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride); 1867 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz); 1868 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); 1869 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); 1870 1871 return 0; 1872 } 1873 1874 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov) 1875 { 1876 u32 val; 1877 1878 /* read the SRIOV capability structure 1879 * The fields can be read via configuration read or 1880 * directly from the device (starting at offset PCICFG_OFFSET) 1881 */ 1882 if (bnx2x_sriov_pci_cfg_info(bp, iov)) 1883 return -ENODEV; 1884 1885 /* get the number of SRIOV bars */ 1886 iov->nres = 0; 1887 1888 /* read the first_vfid */ 1889 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF); 1890 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK) 1891 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp)); 1892 1893 DP(BNX2X_MSG_IOV, 1894 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n", 1895 BP_FUNC(bp), 1896 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total, 1897 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz); 1898 1899 return 0; 1900 } 1901 1902 static u8 bnx2x_iov_get_max_queue_count(struct bnx2x *bp) 1903 { 1904 int i; 1905 u8 queue_count = 0; 1906 1907 if (IS_SRIOV(bp)) 1908 for_each_vf(bp, i) 1909 queue_count += bnx2x_vf(bp, i, alloc_resc.num_sbs); 1910 1911 return queue_count; 1912 } 1913 1914 /* must be called after PF bars are mapped */ 1915 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param, 1916 int num_vfs_param) 1917 { 1918 int err, i, qcount; 1919 struct bnx2x_sriov *iov; 1920 struct pci_dev *dev = bp->pdev; 1921 1922 bp->vfdb = NULL; 1923 1924 /* verify is pf */ 1925 if (IS_VF(bp)) 1926 return 0; 1927 1928 /* verify sriov capability is present in configuration space */ 1929 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV)) 1930 return 0; 1931 1932 /* verify chip revision */ 1933 if (CHIP_IS_E1x(bp)) 1934 return 0; 1935 1936 /* check if SRIOV support is turned off */ 1937 if (!num_vfs_param) 1938 return 0; 1939 1940 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */ 1941 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) { 1942 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n", 1943 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID); 1944 return 0; 1945 } 1946 1947 /* SRIOV can be enabled only with MSIX */ 1948 if (int_mode_param == BNX2X_INT_MODE_MSI || 1949 int_mode_param == BNX2X_INT_MODE_INTX) 1950 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n"); 1951 1952 err = -EIO; 1953 /* verify ari is enabled */ 1954 if (!bnx2x_ari_enabled(bp->pdev)) { 1955 BNX2X_ERR("ARI not supported, SRIOV can not be enabled\n"); 1956 return err; 1957 } 1958 1959 /* verify igu is in normal mode */ 1960 if (CHIP_INT_MODE_IS_BC(bp)) { 1961 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n"); 1962 return err; 1963 } 1964 1965 /* allocate the vfs database */ 1966 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL); 1967 if (!bp->vfdb) { 1968 BNX2X_ERR("failed to allocate vf database\n"); 1969 err = -ENOMEM; 1970 goto failed; 1971 } 1972 1973 /* get the sriov info - Linux already collected all the pertinent 1974 * information, however the sriov structure is for the private use 1975 * of the pci module. Also we want this information regardless 1976 * of the hyper-visor. 1977 */ 1978 iov = &(bp->vfdb->sriov); 1979 err = bnx2x_sriov_info(bp, iov); 1980 if (err) 1981 goto failed; 1982 1983 /* SR-IOV capability was enabled but there are no VFs*/ 1984 if (iov->total == 0) 1985 goto failed; 1986 1987 /* calculate the actual number of VFs */ 1988 iov->nr_virtfn = min_t(u16, iov->total, (u16)num_vfs_param); 1989 1990 /* allocate the vf array */ 1991 bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) * 1992 BNX2X_NR_VIRTFN(bp), GFP_KERNEL); 1993 if (!bp->vfdb->vfs) { 1994 BNX2X_ERR("failed to allocate vf array\n"); 1995 err = -ENOMEM; 1996 goto failed; 1997 } 1998 1999 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */ 2000 for_each_vf(bp, i) { 2001 bnx2x_vf(bp, i, index) = i; 2002 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i; 2003 bnx2x_vf(bp, i, state) = VF_FREE; 2004 INIT_LIST_HEAD(&bnx2x_vf(bp, i, op_list_head)); 2005 mutex_init(&bnx2x_vf(bp, i, op_mutex)); 2006 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE; 2007 } 2008 2009 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */ 2010 bnx2x_get_vf_igu_cam_info(bp); 2011 2012 /* get the total queue count and allocate the global queue arrays */ 2013 qcount = bnx2x_iov_get_max_queue_count(bp); 2014 2015 /* allocate the queue arrays for all VFs */ 2016 bp->vfdb->vfqs = kzalloc(qcount * sizeof(struct bnx2x_vf_queue), 2017 GFP_KERNEL); 2018 if (!bp->vfdb->vfqs) { 2019 BNX2X_ERR("failed to allocate vf queue array\n"); 2020 err = -ENOMEM; 2021 goto failed; 2022 } 2023 2024 return 0; 2025 failed: 2026 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err); 2027 __bnx2x_iov_free_vfdb(bp); 2028 return err; 2029 } 2030 2031 void bnx2x_iov_remove_one(struct bnx2x *bp) 2032 { 2033 /* if SRIOV is not enabled there's nothing to do */ 2034 if (!IS_SRIOV(bp)) 2035 return; 2036 2037 DP(BNX2X_MSG_IOV, "about to call disable sriov\n"); 2038 pci_disable_sriov(bp->pdev); 2039 DP(BNX2X_MSG_IOV, "sriov disabled\n"); 2040 2041 /* free vf database */ 2042 __bnx2x_iov_free_vfdb(bp); 2043 } 2044 2045 void bnx2x_iov_free_mem(struct bnx2x *bp) 2046 { 2047 int i; 2048 2049 if (!IS_SRIOV(bp)) 2050 return; 2051 2052 /* free vfs hw contexts */ 2053 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) { 2054 struct hw_dma *cxt = &bp->vfdb->context[i]; 2055 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size); 2056 } 2057 2058 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr, 2059 BP_VFDB(bp)->sp_dma.mapping, 2060 BP_VFDB(bp)->sp_dma.size); 2061 2062 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr, 2063 BP_VF_MBX_DMA(bp)->mapping, 2064 BP_VF_MBX_DMA(bp)->size); 2065 2066 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr, 2067 BP_VF_BULLETIN_DMA(bp)->mapping, 2068 BP_VF_BULLETIN_DMA(bp)->size); 2069 } 2070 2071 int bnx2x_iov_alloc_mem(struct bnx2x *bp) 2072 { 2073 size_t tot_size; 2074 int i, rc = 0; 2075 2076 if (!IS_SRIOV(bp)) 2077 return rc; 2078 2079 /* allocate vfs hw contexts */ 2080 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) * 2081 BNX2X_CIDS_PER_VF * sizeof(union cdu_context); 2082 2083 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) { 2084 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i); 2085 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ); 2086 2087 if (cxt->size) { 2088 BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size); 2089 } else { 2090 cxt->addr = NULL; 2091 cxt->mapping = 0; 2092 } 2093 tot_size -= cxt->size; 2094 } 2095 2096 /* allocate vfs ramrods dma memory - client_init and set_mac */ 2097 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp); 2098 BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping, 2099 tot_size); 2100 BP_VFDB(bp)->sp_dma.size = tot_size; 2101 2102 /* allocate mailboxes */ 2103 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE; 2104 BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping, 2105 tot_size); 2106 BP_VF_MBX_DMA(bp)->size = tot_size; 2107 2108 /* allocate local bulletin boards */ 2109 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE; 2110 BNX2X_PCI_ALLOC(BP_VF_BULLETIN_DMA(bp)->addr, 2111 &BP_VF_BULLETIN_DMA(bp)->mapping, tot_size); 2112 BP_VF_BULLETIN_DMA(bp)->size = tot_size; 2113 2114 return 0; 2115 2116 alloc_mem_err: 2117 return -ENOMEM; 2118 } 2119 2120 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf, 2121 struct bnx2x_vf_queue *q) 2122 { 2123 u8 cl_id = vfq_cl_id(vf, q); 2124 u8 func_id = FW_VF_HANDLE(vf->abs_vfid); 2125 unsigned long q_type = 0; 2126 2127 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type); 2128 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type); 2129 2130 /* Queue State object */ 2131 bnx2x_init_queue_obj(bp, &q->sp_obj, 2132 cl_id, &q->cid, 1, func_id, 2133 bnx2x_vf_sp(bp, vf, q_data), 2134 bnx2x_vf_sp_map(bp, vf, q_data), 2135 q_type); 2136 2137 DP(BNX2X_MSG_IOV, 2138 "initialized vf %d's queue object. func id set to %d\n", 2139 vf->abs_vfid, q->sp_obj.func_id); 2140 2141 /* mac/vlan objects are per queue, but only those 2142 * that belong to the leading queue are initialized 2143 */ 2144 if (vfq_is_leading(q)) { 2145 /* mac */ 2146 bnx2x_init_mac_obj(bp, &q->mac_obj, 2147 cl_id, q->cid, func_id, 2148 bnx2x_vf_sp(bp, vf, mac_rdata), 2149 bnx2x_vf_sp_map(bp, vf, mac_rdata), 2150 BNX2X_FILTER_MAC_PENDING, 2151 &vf->filter_state, 2152 BNX2X_OBJ_TYPE_RX_TX, 2153 &bp->macs_pool); 2154 /* vlan */ 2155 bnx2x_init_vlan_obj(bp, &q->vlan_obj, 2156 cl_id, q->cid, func_id, 2157 bnx2x_vf_sp(bp, vf, vlan_rdata), 2158 bnx2x_vf_sp_map(bp, vf, vlan_rdata), 2159 BNX2X_FILTER_VLAN_PENDING, 2160 &vf->filter_state, 2161 BNX2X_OBJ_TYPE_RX_TX, 2162 &bp->vlans_pool); 2163 2164 /* mcast */ 2165 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, cl_id, 2166 q->cid, func_id, func_id, 2167 bnx2x_vf_sp(bp, vf, mcast_rdata), 2168 bnx2x_vf_sp_map(bp, vf, mcast_rdata), 2169 BNX2X_FILTER_MCAST_PENDING, 2170 &vf->filter_state, 2171 BNX2X_OBJ_TYPE_RX_TX); 2172 2173 vf->leading_rss = cl_id; 2174 } 2175 } 2176 2177 /* called by bnx2x_nic_load */ 2178 int bnx2x_iov_nic_init(struct bnx2x *bp) 2179 { 2180 int vfid, qcount, i; 2181 2182 if (!IS_SRIOV(bp)) { 2183 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n"); 2184 return 0; 2185 } 2186 2187 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn); 2188 2189 /* initialize vf database */ 2190 for_each_vf(bp, vfid) { 2191 struct bnx2x_virtf *vf = BP_VF(bp, vfid); 2192 2193 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) * 2194 BNX2X_CIDS_PER_VF; 2195 2196 union cdu_context *base_cxt = (union cdu_context *) 2197 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr + 2198 (base_vf_cid & (ILT_PAGE_CIDS-1)); 2199 2200 DP(BNX2X_MSG_IOV, 2201 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n", 2202 vf->abs_vfid, vf_sb_count(vf), base_vf_cid, 2203 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt); 2204 2205 /* init statically provisioned resources */ 2206 bnx2x_iov_static_resc(bp, &vf->alloc_resc); 2207 2208 /* queues are initialized during VF-ACQUIRE */ 2209 2210 /* reserve the vf vlan credit */ 2211 bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf)); 2212 2213 vf->filter_state = 0; 2214 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id); 2215 2216 /* init mcast object - This object will be re-initialized 2217 * during VF-ACQUIRE with the proper cl_id and cid. 2218 * It needs to be initialized here so that it can be safely 2219 * handled by a subsequent FLR flow. 2220 */ 2221 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF, 2222 0xFF, 0xFF, 0xFF, 2223 bnx2x_vf_sp(bp, vf, mcast_rdata), 2224 bnx2x_vf_sp_map(bp, vf, mcast_rdata), 2225 BNX2X_FILTER_MCAST_PENDING, 2226 &vf->filter_state, 2227 BNX2X_OBJ_TYPE_RX_TX); 2228 2229 /* set the mailbox message addresses */ 2230 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *) 2231 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid * 2232 MBX_MSG_ALIGNED_SIZE); 2233 2234 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping + 2235 vfid * MBX_MSG_ALIGNED_SIZE; 2236 2237 /* Enable vf mailbox */ 2238 bnx2x_vf_enable_mbx(bp, vf->abs_vfid); 2239 } 2240 2241 /* Final VF init */ 2242 qcount = 0; 2243 for_each_vf(bp, i) { 2244 struct bnx2x_virtf *vf = BP_VF(bp, i); 2245 2246 /* fill in the BDF and bars */ 2247 vf->bus = bnx2x_vf_bus(bp, i); 2248 vf->devfn = bnx2x_vf_devfn(bp, i); 2249 bnx2x_vf_set_bars(bp, vf); 2250 2251 DP(BNX2X_MSG_IOV, 2252 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n", 2253 vf->abs_vfid, vf->bus, vf->devfn, 2254 (unsigned)vf->bars[0].bar, vf->bars[0].size, 2255 (unsigned)vf->bars[1].bar, vf->bars[1].size, 2256 (unsigned)vf->bars[2].bar, vf->bars[2].size); 2257 2258 /* set local queue arrays */ 2259 vf->vfqs = &bp->vfdb->vfqs[qcount]; 2260 qcount += bnx2x_vf(bp, i, alloc_resc.num_sbs); 2261 } 2262 2263 return 0; 2264 } 2265 2266 /* called by bnx2x_chip_cleanup */ 2267 int bnx2x_iov_chip_cleanup(struct bnx2x *bp) 2268 { 2269 int i; 2270 2271 if (!IS_SRIOV(bp)) 2272 return 0; 2273 2274 /* release all the VFs */ 2275 for_each_vf(bp, i) 2276 bnx2x_vf_release(bp, BP_VF(bp, i), true); /* blocking */ 2277 2278 return 0; 2279 } 2280 2281 /* called by bnx2x_init_hw_func, returns the next ilt line */ 2282 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line) 2283 { 2284 int i; 2285 struct bnx2x_ilt *ilt = BP_ILT(bp); 2286 2287 if (!IS_SRIOV(bp)) 2288 return line; 2289 2290 /* set vfs ilt lines */ 2291 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) { 2292 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i); 2293 2294 ilt->lines[line+i].page = hw_cxt->addr; 2295 ilt->lines[line+i].page_mapping = hw_cxt->mapping; 2296 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */ 2297 } 2298 return line + i; 2299 } 2300 2301 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid) 2302 { 2303 return ((cid >= BNX2X_FIRST_VF_CID) && 2304 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS)); 2305 } 2306 2307 static 2308 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp, 2309 struct bnx2x_vf_queue *vfq, 2310 union event_ring_elem *elem) 2311 { 2312 unsigned long ramrod_flags = 0; 2313 int rc = 0; 2314 2315 /* Always push next commands out, don't wait here */ 2316 set_bit(RAMROD_CONT, &ramrod_flags); 2317 2318 switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) { 2319 case BNX2X_FILTER_MAC_PENDING: 2320 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem, 2321 &ramrod_flags); 2322 break; 2323 case BNX2X_FILTER_VLAN_PENDING: 2324 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem, 2325 &ramrod_flags); 2326 break; 2327 default: 2328 BNX2X_ERR("Unsupported classification command: %d\n", 2329 elem->message.data.eth_event.echo); 2330 return; 2331 } 2332 if (rc < 0) 2333 BNX2X_ERR("Failed to schedule new commands: %d\n", rc); 2334 else if (rc > 0) 2335 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n"); 2336 } 2337 2338 static 2339 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp, 2340 struct bnx2x_virtf *vf) 2341 { 2342 struct bnx2x_mcast_ramrod_params rparam = {NULL}; 2343 int rc; 2344 2345 rparam.mcast_obj = &vf->mcast_obj; 2346 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw); 2347 2348 /* If there are pending mcast commands - send them */ 2349 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) { 2350 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT); 2351 if (rc < 0) 2352 BNX2X_ERR("Failed to send pending mcast commands: %d\n", 2353 rc); 2354 } 2355 } 2356 2357 static 2358 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp, 2359 struct bnx2x_virtf *vf) 2360 { 2361 smp_mb__before_clear_bit(); 2362 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state); 2363 smp_mb__after_clear_bit(); 2364 } 2365 2366 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem) 2367 { 2368 struct bnx2x_virtf *vf; 2369 int qidx = 0, abs_vfid; 2370 u8 opcode; 2371 u16 cid = 0xffff; 2372 2373 if (!IS_SRIOV(bp)) 2374 return 1; 2375 2376 /* first get the cid - the only events we handle here are cfc-delete 2377 * and set-mac completion 2378 */ 2379 opcode = elem->message.opcode; 2380 2381 switch (opcode) { 2382 case EVENT_RING_OPCODE_CFC_DEL: 2383 cid = SW_CID((__force __le32) 2384 elem->message.data.cfc_del_event.cid); 2385 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid); 2386 break; 2387 case EVENT_RING_OPCODE_CLASSIFICATION_RULES: 2388 case EVENT_RING_OPCODE_MULTICAST_RULES: 2389 case EVENT_RING_OPCODE_FILTERS_RULES: 2390 cid = (elem->message.data.eth_event.echo & 2391 BNX2X_SWCID_MASK); 2392 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid); 2393 break; 2394 case EVENT_RING_OPCODE_VF_FLR: 2395 abs_vfid = elem->message.data.vf_flr_event.vf_id; 2396 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n", 2397 abs_vfid); 2398 goto get_vf; 2399 case EVENT_RING_OPCODE_MALICIOUS_VF: 2400 abs_vfid = elem->message.data.malicious_vf_event.vf_id; 2401 DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d\n", 2402 abs_vfid); 2403 goto get_vf; 2404 default: 2405 return 1; 2406 } 2407 2408 /* check if the cid is the VF range */ 2409 if (!bnx2x_iov_is_vf_cid(bp, cid)) { 2410 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid); 2411 return 1; 2412 } 2413 2414 /* extract vf and rxq index from vf_cid - relies on the following: 2415 * 1. vfid on cid reflects the true abs_vfid 2416 * 2. the max number of VFs (per path) is 64 2417 */ 2418 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1); 2419 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1); 2420 get_vf: 2421 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); 2422 2423 if (!vf) { 2424 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n", 2425 cid, abs_vfid); 2426 return 0; 2427 } 2428 2429 switch (opcode) { 2430 case EVENT_RING_OPCODE_CFC_DEL: 2431 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n", 2432 vf->abs_vfid, qidx); 2433 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp, 2434 &vfq_get(vf, 2435 qidx)->sp_obj, 2436 BNX2X_Q_CMD_CFC_DEL); 2437 break; 2438 case EVENT_RING_OPCODE_CLASSIFICATION_RULES: 2439 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n", 2440 vf->abs_vfid, qidx); 2441 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem); 2442 break; 2443 case EVENT_RING_OPCODE_MULTICAST_RULES: 2444 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n", 2445 vf->abs_vfid, qidx); 2446 bnx2x_vf_handle_mcast_eqe(bp, vf); 2447 break; 2448 case EVENT_RING_OPCODE_FILTERS_RULES: 2449 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n", 2450 vf->abs_vfid, qidx); 2451 bnx2x_vf_handle_filters_eqe(bp, vf); 2452 break; 2453 case EVENT_RING_OPCODE_VF_FLR: 2454 DP(BNX2X_MSG_IOV, "got VF [%d] FLR notification\n", 2455 vf->abs_vfid); 2456 /* Do nothing for now */ 2457 break; 2458 case EVENT_RING_OPCODE_MALICIOUS_VF: 2459 DP(BNX2X_MSG_IOV, "got VF [%d] MALICIOUS notification\n", 2460 vf->abs_vfid); 2461 /* Do nothing for now */ 2462 break; 2463 } 2464 /* SRIOV: reschedule any 'in_progress' operations */ 2465 bnx2x_iov_sp_event(bp, cid, false); 2466 2467 return 0; 2468 } 2469 2470 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid) 2471 { 2472 /* extract the vf from vf_cid - relies on the following: 2473 * 1. vfid on cid reflects the true abs_vfid 2474 * 2. the max number of VFs (per path) is 64 2475 */ 2476 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1); 2477 return bnx2x_vf_by_abs_fid(bp, abs_vfid); 2478 } 2479 2480 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid, 2481 struct bnx2x_queue_sp_obj **q_obj) 2482 { 2483 struct bnx2x_virtf *vf; 2484 2485 if (!IS_SRIOV(bp)) 2486 return; 2487 2488 vf = bnx2x_vf_by_cid(bp, vf_cid); 2489 2490 if (vf) { 2491 /* extract queue index from vf_cid - relies on the following: 2492 * 1. vfid on cid reflects the true abs_vfid 2493 * 2. the max number of VFs (per path) is 64 2494 */ 2495 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1); 2496 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj); 2497 } else { 2498 BNX2X_ERR("No vf matching cid %d\n", vf_cid); 2499 } 2500 } 2501 2502 void bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, bool queue_work) 2503 { 2504 struct bnx2x_virtf *vf; 2505 2506 /* check if the cid is the VF range */ 2507 if (!IS_SRIOV(bp) || !bnx2x_iov_is_vf_cid(bp, vf_cid)) 2508 return; 2509 2510 vf = bnx2x_vf_by_cid(bp, vf_cid); 2511 if (vf) { 2512 /* set in_progress flag */ 2513 atomic_set(&vf->op_in_progress, 1); 2514 if (queue_work) 2515 queue_delayed_work(bnx2x_wq, &bp->sp_task, 0); 2516 } 2517 } 2518 2519 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp) 2520 { 2521 int i; 2522 int first_queue_query_index, num_queues_req; 2523 dma_addr_t cur_data_offset; 2524 struct stats_query_entry *cur_query_entry; 2525 u8 stats_count = 0; 2526 bool is_fcoe = false; 2527 2528 if (!IS_SRIOV(bp)) 2529 return; 2530 2531 if (!NO_FCOE(bp)) 2532 is_fcoe = true; 2533 2534 /* fcoe adds one global request and one queue request */ 2535 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe; 2536 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 2537 (is_fcoe ? 0 : 1); 2538 2539 DP(BNX2X_MSG_IOV, 2540 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n", 2541 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index, 2542 first_queue_query_index + num_queues_req); 2543 2544 cur_data_offset = bp->fw_stats_data_mapping + 2545 offsetof(struct bnx2x_fw_stats_data, queue_stats) + 2546 num_queues_req * sizeof(struct per_queue_stats); 2547 2548 cur_query_entry = &bp->fw_stats_req-> 2549 query[first_queue_query_index + num_queues_req]; 2550 2551 for_each_vf(bp, i) { 2552 int j; 2553 struct bnx2x_virtf *vf = BP_VF(bp, i); 2554 2555 if (vf->state != VF_ENABLED) { 2556 DP(BNX2X_MSG_IOV, 2557 "vf %d not enabled so no stats for it\n", 2558 vf->abs_vfid); 2559 continue; 2560 } 2561 2562 DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid); 2563 for_each_vfq(vf, j) { 2564 struct bnx2x_vf_queue *rxq = vfq_get(vf, j); 2565 2566 /* collect stats fro active queues only */ 2567 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) == 2568 BNX2X_Q_LOGICAL_STATE_STOPPED) 2569 continue; 2570 2571 /* create stats query entry for this queue */ 2572 cur_query_entry->kind = STATS_TYPE_QUEUE; 2573 cur_query_entry->index = vfq_cl_id(vf, rxq); 2574 cur_query_entry->funcID = 2575 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid)); 2576 cur_query_entry->address.hi = 2577 cpu_to_le32(U64_HI(vf->fw_stat_map)); 2578 cur_query_entry->address.lo = 2579 cpu_to_le32(U64_LO(vf->fw_stat_map)); 2580 DP(BNX2X_MSG_IOV, 2581 "added address %x %x for vf %d queue %d client %d\n", 2582 cur_query_entry->address.hi, 2583 cur_query_entry->address.lo, cur_query_entry->funcID, 2584 j, cur_query_entry->index); 2585 cur_query_entry++; 2586 cur_data_offset += sizeof(struct per_queue_stats); 2587 stats_count++; 2588 } 2589 } 2590 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count; 2591 } 2592 2593 void bnx2x_iov_sp_task(struct bnx2x *bp) 2594 { 2595 int i; 2596 2597 if (!IS_SRIOV(bp)) 2598 return; 2599 /* Iterate over all VFs and invoke state transition for VFs with 2600 * 'in-progress' slow-path operations 2601 */ 2602 DP(BNX2X_MSG_IOV, "searching for pending vf operations\n"); 2603 for_each_vf(bp, i) { 2604 struct bnx2x_virtf *vf = BP_VF(bp, i); 2605 2606 if (!list_empty(&vf->op_list_head) && 2607 atomic_read(&vf->op_in_progress)) { 2608 DP(BNX2X_MSG_IOV, "running pending op for vf %d\n", i); 2609 bnx2x_vfop_cur(bp, vf)->transition(bp, vf); 2610 } 2611 } 2612 } 2613 2614 static inline 2615 struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id) 2616 { 2617 int i; 2618 struct bnx2x_virtf *vf = NULL; 2619 2620 for_each_vf(bp, i) { 2621 vf = BP_VF(bp, i); 2622 if (stat_id >= vf->igu_base_id && 2623 stat_id < vf->igu_base_id + vf_sb_count(vf)) 2624 break; 2625 } 2626 return vf; 2627 } 2628 2629 /* VF API helpers */ 2630 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid, 2631 u8 enable) 2632 { 2633 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4; 2634 u32 val = enable ? (abs_vfid | (1 << 6)) : 0; 2635 2636 REG_WR(bp, reg, val); 2637 } 2638 2639 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf) 2640 { 2641 int i; 2642 2643 for_each_vfq(vf, i) 2644 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid, 2645 vfq_qzone_id(vf, vfq_get(vf, i)), false); 2646 } 2647 2648 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf) 2649 { 2650 u32 val; 2651 2652 /* clear the VF configuration - pretend */ 2653 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid)); 2654 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION); 2655 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN | 2656 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK); 2657 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val); 2658 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); 2659 } 2660 2661 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf) 2662 { 2663 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF), 2664 BNX2X_VF_MAX_QUEUES); 2665 } 2666 2667 static 2668 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf, 2669 struct vf_pf_resc_request *req_resc) 2670 { 2671 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf); 2672 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf); 2673 2674 return ((req_resc->num_rxqs <= rxq_cnt) && 2675 (req_resc->num_txqs <= txq_cnt) && 2676 (req_resc->num_sbs <= vf_sb_count(vf)) && 2677 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) && 2678 (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf))); 2679 } 2680 2681 /* CORE VF API */ 2682 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf, 2683 struct vf_pf_resc_request *resc) 2684 { 2685 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) * 2686 BNX2X_CIDS_PER_VF; 2687 2688 union cdu_context *base_cxt = (union cdu_context *) 2689 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr + 2690 (base_vf_cid & (ILT_PAGE_CIDS-1)); 2691 int i; 2692 2693 /* if state is 'acquired' the VF was not released or FLR'd, in 2694 * this case the returned resources match the acquired already 2695 * acquired resources. Verify that the requested numbers do 2696 * not exceed the already acquired numbers. 2697 */ 2698 if (vf->state == VF_ACQUIRED) { 2699 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n", 2700 vf->abs_vfid); 2701 2702 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) { 2703 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n", 2704 vf->abs_vfid); 2705 return -EINVAL; 2706 } 2707 return 0; 2708 } 2709 2710 /* Otherwise vf state must be 'free' or 'reset' */ 2711 if (vf->state != VF_FREE && vf->state != VF_RESET) { 2712 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n", 2713 vf->abs_vfid, vf->state); 2714 return -EINVAL; 2715 } 2716 2717 /* static allocation: 2718 * the global maximum number are fixed per VF. fail the request if 2719 * requested number exceed these globals 2720 */ 2721 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) { 2722 DP(BNX2X_MSG_IOV, 2723 "cannot fulfill vf resource request. Placing maximal available values in response\n"); 2724 /* set the max resource in the vf */ 2725 return -ENOMEM; 2726 } 2727 2728 /* Set resources counters - 0 request means max available */ 2729 vf_sb_count(vf) = resc->num_sbs; 2730 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf); 2731 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf); 2732 if (resc->num_mac_filters) 2733 vf_mac_rules_cnt(vf) = resc->num_mac_filters; 2734 if (resc->num_vlan_filters) 2735 vf_vlan_rules_cnt(vf) = resc->num_vlan_filters; 2736 2737 DP(BNX2X_MSG_IOV, 2738 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n", 2739 vf_sb_count(vf), vf_rxq_count(vf), 2740 vf_txq_count(vf), vf_mac_rules_cnt(vf), 2741 vf_vlan_rules_cnt(vf)); 2742 2743 /* Initialize the queues */ 2744 if (!vf->vfqs) { 2745 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n"); 2746 return -EINVAL; 2747 } 2748 2749 for_each_vfq(vf, i) { 2750 struct bnx2x_vf_queue *q = vfq_get(vf, i); 2751 2752 if (!q) { 2753 DP(BNX2X_MSG_IOV, "q number %d was not allocated\n", i); 2754 return -EINVAL; 2755 } 2756 2757 q->index = i; 2758 q->cxt = &((base_cxt + i)->eth); 2759 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i; 2760 2761 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n", 2762 vf->abs_vfid, i, q->index, q->cid, q->cxt); 2763 2764 /* init SP objects */ 2765 bnx2x_vfq_init(bp, vf, q); 2766 } 2767 vf->state = VF_ACQUIRED; 2768 return 0; 2769 } 2770 2771 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map) 2772 { 2773 struct bnx2x_func_init_params func_init = {0}; 2774 u16 flags = 0; 2775 int i; 2776 2777 /* the sb resources are initialized at this point, do the 2778 * FW/HW initializations 2779 */ 2780 for_each_vf_sb(vf, i) 2781 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true, 2782 vf_igu_sb(vf, i), vf_igu_sb(vf, i)); 2783 2784 /* Sanity checks */ 2785 if (vf->state != VF_ACQUIRED) { 2786 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n", 2787 vf->abs_vfid, vf->state); 2788 return -EINVAL; 2789 } 2790 /* FLR cleanup epilogue */ 2791 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid)) 2792 return -EBUSY; 2793 2794 /* reset IGU VF statistics: MSIX */ 2795 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0); 2796 2797 /* vf init */ 2798 if (vf->cfg_flags & VF_CFG_STATS) 2799 flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ); 2800 2801 if (vf->cfg_flags & VF_CFG_TPA) 2802 flags |= FUNC_FLG_TPA; 2803 2804 if (is_vf_multi(vf)) 2805 flags |= FUNC_FLG_RSS; 2806 2807 /* function setup */ 2808 func_init.func_flgs = flags; 2809 func_init.pf_id = BP_FUNC(bp); 2810 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid); 2811 func_init.fw_stat_map = vf->fw_stat_map; 2812 func_init.spq_map = vf->spq_map; 2813 func_init.spq_prod = 0; 2814 bnx2x_func_init(bp, &func_init); 2815 2816 /* Enable the vf */ 2817 bnx2x_vf_enable_access(bp, vf->abs_vfid); 2818 bnx2x_vf_enable_traffic(bp, vf); 2819 2820 /* queue protection table */ 2821 for_each_vfq(vf, i) 2822 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid, 2823 vfq_qzone_id(vf, vfq_get(vf, i)), true); 2824 2825 vf->state = VF_ENABLED; 2826 2827 /* update vf bulletin board */ 2828 bnx2x_post_vf_bulletin(bp, vf->index); 2829 2830 return 0; 2831 } 2832 2833 /* VFOP close (teardown the queues, delete mcasts and close HW) */ 2834 static void bnx2x_vfop_close(struct bnx2x *bp, struct bnx2x_virtf *vf) 2835 { 2836 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 2837 struct bnx2x_vfop_args_qx *qx = &vfop->args.qx; 2838 enum bnx2x_vfop_close_state state = vfop->state; 2839 struct bnx2x_vfop_cmd cmd = { 2840 .done = bnx2x_vfop_close, 2841 .block = false, 2842 }; 2843 2844 if (vfop->rc < 0) 2845 goto op_err; 2846 2847 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state); 2848 2849 switch (state) { 2850 case BNX2X_VFOP_CLOSE_QUEUES: 2851 2852 if (++(qx->qid) < vf_rxq_count(vf)) { 2853 vfop->rc = bnx2x_vfop_qdown_cmd(bp, vf, &cmd, qx->qid); 2854 if (vfop->rc) 2855 goto op_err; 2856 return; 2857 } 2858 2859 /* remove multicasts */ 2860 vfop->state = BNX2X_VFOP_CLOSE_HW; 2861 vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 0, false); 2862 if (vfop->rc) 2863 goto op_err; 2864 return; 2865 2866 case BNX2X_VFOP_CLOSE_HW: 2867 2868 /* disable the interrupts */ 2869 DP(BNX2X_MSG_IOV, "disabling igu\n"); 2870 bnx2x_vf_igu_disable(bp, vf); 2871 2872 /* disable the VF */ 2873 DP(BNX2X_MSG_IOV, "clearing qtbl\n"); 2874 bnx2x_vf_clr_qtbl(bp, vf); 2875 2876 goto op_done; 2877 default: 2878 bnx2x_vfop_default(state); 2879 } 2880 op_err: 2881 BNX2X_ERR("VF[%d] CLOSE error: rc %d\n", vf->abs_vfid, vfop->rc); 2882 op_done: 2883 vf->state = VF_ACQUIRED; 2884 DP(BNX2X_MSG_IOV, "set state to acquired\n"); 2885 bnx2x_vfop_end(bp, vf, vfop); 2886 } 2887 2888 int bnx2x_vfop_close_cmd(struct bnx2x *bp, 2889 struct bnx2x_virtf *vf, 2890 struct bnx2x_vfop_cmd *cmd) 2891 { 2892 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 2893 if (vfop) { 2894 vfop->args.qx.qid = -1; /* loop */ 2895 bnx2x_vfop_opset(BNX2X_VFOP_CLOSE_QUEUES, 2896 bnx2x_vfop_close, cmd->done); 2897 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_close, 2898 cmd->block); 2899 } 2900 return -ENOMEM; 2901 } 2902 2903 /* VF release can be called either: 1. the VF was acquired but 2904 * not enabled 2. the vf was enabled or in the process of being 2905 * enabled 2906 */ 2907 static void bnx2x_vfop_release(struct bnx2x *bp, struct bnx2x_virtf *vf) 2908 { 2909 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf); 2910 struct bnx2x_vfop_cmd cmd = { 2911 .done = bnx2x_vfop_release, 2912 .block = false, 2913 }; 2914 2915 DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc); 2916 2917 if (vfop->rc < 0) 2918 goto op_err; 2919 2920 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid, 2921 vf->state == VF_FREE ? "Free" : 2922 vf->state == VF_ACQUIRED ? "Acquired" : 2923 vf->state == VF_ENABLED ? "Enabled" : 2924 vf->state == VF_RESET ? "Reset" : 2925 "Unknown"); 2926 2927 switch (vf->state) { 2928 case VF_ENABLED: 2929 vfop->rc = bnx2x_vfop_close_cmd(bp, vf, &cmd); 2930 if (vfop->rc) 2931 goto op_err; 2932 return; 2933 2934 case VF_ACQUIRED: 2935 DP(BNX2X_MSG_IOV, "about to free resources\n"); 2936 bnx2x_vf_free_resc(bp, vf); 2937 DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc); 2938 goto op_done; 2939 2940 case VF_FREE: 2941 case VF_RESET: 2942 /* do nothing */ 2943 goto op_done; 2944 default: 2945 bnx2x_vfop_default(vf->state); 2946 } 2947 op_err: 2948 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, vfop->rc); 2949 op_done: 2950 bnx2x_vfop_end(bp, vf, vfop); 2951 } 2952 2953 int bnx2x_vfop_release_cmd(struct bnx2x *bp, 2954 struct bnx2x_virtf *vf, 2955 struct bnx2x_vfop_cmd *cmd) 2956 { 2957 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf); 2958 if (vfop) { 2959 bnx2x_vfop_opset(-1, /* use vf->state */ 2960 bnx2x_vfop_release, cmd->done); 2961 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_release, 2962 cmd->block); 2963 } 2964 return -ENOMEM; 2965 } 2966 2967 /* VF release ~ VF close + VF release-resources 2968 * Release is the ultimate SW shutdown and is called whenever an 2969 * irrecoverable error is encountered. 2970 */ 2971 void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf, bool block) 2972 { 2973 struct bnx2x_vfop_cmd cmd = { 2974 .done = NULL, 2975 .block = block, 2976 }; 2977 int rc; 2978 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF); 2979 2980 rc = bnx2x_vfop_release_cmd(bp, vf, &cmd); 2981 if (rc) 2982 WARN(rc, 2983 "VF[%d] Failed to allocate resources for release op- rc=%d\n", 2984 vf->abs_vfid, rc); 2985 } 2986 2987 static inline void bnx2x_vf_get_sbdf(struct bnx2x *bp, 2988 struct bnx2x_virtf *vf, u32 *sbdf) 2989 { 2990 *sbdf = vf->devfn | (vf->bus << 8); 2991 } 2992 2993 static inline void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf, 2994 struct bnx2x_vf_bar_info *bar_info) 2995 { 2996 int n; 2997 2998 bar_info->nr_bars = bp->vfdb->sriov.nres; 2999 for (n = 0; n < bar_info->nr_bars; n++) 3000 bar_info->bars[n] = vf->bars[n]; 3001 } 3002 3003 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf, 3004 enum channel_tlvs tlv) 3005 { 3006 /* lock the channel */ 3007 mutex_lock(&vf->op_mutex); 3008 3009 /* record the locking op */ 3010 vf->op_current = tlv; 3011 3012 /* log the lock */ 3013 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n", 3014 vf->abs_vfid, tlv); 3015 } 3016 3017 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf, 3018 enum channel_tlvs expected_tlv) 3019 { 3020 WARN(expected_tlv != vf->op_current, 3021 "lock mismatch: expected %d found %d", expected_tlv, 3022 vf->op_current); 3023 3024 /* lock the channel */ 3025 mutex_unlock(&vf->op_mutex); 3026 3027 /* log the unlock */ 3028 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n", 3029 vf->abs_vfid, vf->op_current); 3030 3031 /* record the locking op */ 3032 vf->op_current = CHANNEL_TLV_NONE; 3033 } 3034