1 /* bnx2x_sriov.c: QLogic Everest network driver.
2  *
3  * Copyright 2009-2013 Broadcom Corporation
4  * Copyright 2014 QLogic Corporation
5  * All rights reserved
6  *
7  * Unless you and QLogic execute a separate written software license
8  * agreement governing use of this software, this software is licensed to you
9  * under the terms of the GNU General Public License version 2, available
10  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
11  *
12  * Notwithstanding the above, under no circumstances may you combine this
13  * software in any way with any other QLogic software provided under a
14  * license other than the GPL, without QLogic's express prior written
15  * consent.
16  *
17  * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
18  * Written by: Shmulik Ravid
19  *	       Ariel Elior <ariel.elior@qlogic.com>
20  *
21  */
22 #include "bnx2x.h"
23 #include "bnx2x_init.h"
24 #include "bnx2x_cmn.h"
25 #include "bnx2x_sp.h"
26 #include <linux/crc32.h>
27 #include <linux/if_vlan.h>
28 
29 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
30 			    struct bnx2x_virtf **vf,
31 			    struct pf_vf_bulletin_content **bulletin,
32 			    bool test_queue);
33 
34 /* General service functions */
35 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
36 					 u16 pf_id)
37 {
38 	REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
39 		pf_id);
40 	REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
41 		pf_id);
42 	REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
43 		pf_id);
44 	REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
45 		pf_id);
46 }
47 
48 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
49 					u8 enable)
50 {
51 	REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
52 		enable);
53 	REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
54 		enable);
55 	REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
56 		enable);
57 	REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
58 		enable);
59 }
60 
61 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
62 {
63 	int idx;
64 
65 	for_each_vf(bp, idx)
66 		if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
67 			break;
68 	return idx;
69 }
70 
71 static
72 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
73 {
74 	u16 idx =  (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
75 	return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
76 }
77 
78 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
79 				u8 igu_sb_id, u8 segment, u16 index, u8 op,
80 				u8 update)
81 {
82 	/* acking a VF sb through the PF - use the GRC */
83 	u32 ctl;
84 	u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
85 	u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
86 	u32 func_encode = vf->abs_vfid;
87 	u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
88 	struct igu_regular cmd_data = {0};
89 
90 	cmd_data.sb_id_and_flags =
91 			((index << IGU_REGULAR_SB_INDEX_SHIFT) |
92 			 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
93 			 (update << IGU_REGULAR_BUPDATE_SHIFT) |
94 			 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
95 
96 	ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT		|
97 	      func_encode << IGU_CTRL_REG_FID_SHIFT		|
98 	      IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
99 
100 	DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
101 	   cmd_data.sb_id_and_flags, igu_addr_data);
102 	REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
103 	barrier();
104 
105 	DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
106 	   ctl, igu_addr_ctl);
107 	REG_WR(bp, igu_addr_ctl, ctl);
108 	barrier();
109 }
110 
111 static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,
112 				       struct bnx2x_virtf *vf,
113 				       bool print_err)
114 {
115 	if (!bnx2x_leading_vfq(vf, sp_initialized)) {
116 		if (print_err)
117 			BNX2X_ERR("Slowpath objects not yet initialized!\n");
118 		else
119 			DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");
120 		return false;
121 	}
122 	return true;
123 }
124 
125 /* VFOP operations states */
126 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
127 			      struct bnx2x_queue_init_params *init_params,
128 			      struct bnx2x_queue_setup_params *setup_params,
129 			      u16 q_idx, u16 sb_idx)
130 {
131 	DP(BNX2X_MSG_IOV,
132 	   "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
133 	   vf->abs_vfid,
134 	   q_idx,
135 	   sb_idx,
136 	   init_params->tx.sb_cq_index,
137 	   init_params->tx.hc_rate,
138 	   setup_params->flags,
139 	   setup_params->txq_params.traffic_type);
140 }
141 
142 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
143 			    struct bnx2x_queue_init_params *init_params,
144 			    struct bnx2x_queue_setup_params *setup_params,
145 			    u16 q_idx, u16 sb_idx)
146 {
147 	struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
148 
149 	DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
150 	   "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
151 	   vf->abs_vfid,
152 	   q_idx,
153 	   sb_idx,
154 	   init_params->rx.sb_cq_index,
155 	   init_params->rx.hc_rate,
156 	   setup_params->gen_params.mtu,
157 	   rxq_params->buf_sz,
158 	   rxq_params->sge_buf_sz,
159 	   rxq_params->max_sges_pkt,
160 	   rxq_params->tpa_agg_sz,
161 	   setup_params->flags,
162 	   rxq_params->drop_flags,
163 	   rxq_params->cache_line_log);
164 }
165 
166 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
167 			   struct bnx2x_virtf *vf,
168 			   struct bnx2x_vf_queue *q,
169 			   struct bnx2x_vf_queue_construct_params *p,
170 			   unsigned long q_type)
171 {
172 	struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
173 	struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
174 
175 	/* INIT */
176 
177 	/* Enable host coalescing in the transition to INIT state */
178 	if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
179 		__set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
180 
181 	if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
182 		__set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
183 
184 	/* FW SB ID */
185 	init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
186 	init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
187 
188 	/* context */
189 	init_p->cxts[0] = q->cxt;
190 
191 	/* SETUP */
192 
193 	/* Setup-op general parameters */
194 	setup_p->gen_params.spcl_id = vf->sp_cl_id;
195 	setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
196 	setup_p->gen_params.fp_hsi = vf->fp_hsi;
197 
198 	/* Setup-op flags:
199 	 * collect statistics, zero statistics, local-switching, security,
200 	 * OV for Flex10, RSS and MCAST for leading
201 	 */
202 	if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
203 		__set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
204 
205 	/* for VFs, enable tx switching, bd coherency, and mac address
206 	 * anti-spoofing
207 	 */
208 	__set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
209 	__set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
210 	if (vf->spoofchk)
211 		__set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
212 	else
213 		__clear_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
214 
215 	/* Setup-op rx parameters */
216 	if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
217 		struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
218 
219 		rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
220 		rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
221 		rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
222 
223 		if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
224 			rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
225 	}
226 
227 	/* Setup-op tx parameters */
228 	if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
229 		setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
230 		setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
231 	}
232 }
233 
234 static int bnx2x_vf_queue_create(struct bnx2x *bp,
235 				 struct bnx2x_virtf *vf, int qid,
236 				 struct bnx2x_vf_queue_construct_params *qctor)
237 {
238 	struct bnx2x_queue_state_params *q_params;
239 	int rc = 0;
240 
241 	DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
242 
243 	/* Prepare ramrod information */
244 	q_params = &qctor->qstate;
245 	q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
246 	set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);
247 
248 	if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
249 	    BNX2X_Q_LOGICAL_STATE_ACTIVE) {
250 		DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");
251 		goto out;
252 	}
253 
254 	/* Run Queue 'construction' ramrods */
255 	q_params->cmd = BNX2X_Q_CMD_INIT;
256 	rc = bnx2x_queue_state_change(bp, q_params);
257 	if (rc)
258 		goto out;
259 
260 	memcpy(&q_params->params.setup, &qctor->prep_qsetup,
261 	       sizeof(struct bnx2x_queue_setup_params));
262 	q_params->cmd = BNX2X_Q_CMD_SETUP;
263 	rc = bnx2x_queue_state_change(bp, q_params);
264 	if (rc)
265 		goto out;
266 
267 	/* enable interrupts */
268 	bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),
269 			    USTORM_ID, 0, IGU_INT_ENABLE, 0);
270 out:
271 	return rc;
272 }
273 
274 static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,
275 				  int qid)
276 {
277 	enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,
278 				       BNX2X_Q_CMD_TERMINATE,
279 				       BNX2X_Q_CMD_CFC_DEL};
280 	struct bnx2x_queue_state_params q_params;
281 	int rc, i;
282 
283 	DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
284 
285 	/* Prepare ramrod information */
286 	memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));
287 	q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
288 	set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
289 
290 	if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==
291 	    BNX2X_Q_LOGICAL_STATE_STOPPED) {
292 		DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");
293 		goto out;
294 	}
295 
296 	/* Run Queue 'destruction' ramrods */
297 	for (i = 0; i < ARRAY_SIZE(cmds); i++) {
298 		q_params.cmd = cmds[i];
299 		rc = bnx2x_queue_state_change(bp, &q_params);
300 		if (rc) {
301 			BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);
302 			return rc;
303 		}
304 	}
305 out:
306 	/* Clean Context */
307 	if (bnx2x_vfq(vf, qid, cxt)) {
308 		bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;
309 		bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;
310 	}
311 
312 	return 0;
313 }
314 
315 static void
316 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
317 {
318 	struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
319 	if (vf) {
320 		/* the first igu entry belonging to VFs of this PF */
321 		if (!BP_VFDB(bp)->first_vf_igu_entry)
322 			BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
323 
324 		/* the first igu entry belonging to this VF */
325 		if (!vf_sb_count(vf))
326 			vf->igu_base_id = igu_sb_id;
327 
328 		++vf_sb_count(vf);
329 		++vf->sb_count;
330 	}
331 	BP_VFDB(bp)->vf_sbs_pool++;
332 }
333 
334 static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,
335 				   int qid, bool drv_only, int type)
336 {
337 	struct bnx2x_vlan_mac_ramrod_params ramrod;
338 	int rc;
339 
340 	DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,
341 			  (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
342 			  (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
343 
344 	/* Prepare ramrod params */
345 	memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
346 	if (type == BNX2X_VF_FILTER_VLAN_MAC) {
347 		set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
348 		ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
349 	} else if (type == BNX2X_VF_FILTER_MAC) {
350 		set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
351 		ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
352 	} else {
353 		ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
354 	}
355 	ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;
356 
357 	set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
358 	if (drv_only)
359 		set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
360 	else
361 		set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
362 
363 	/* Start deleting */
364 	rc = ramrod.vlan_mac_obj->delete_all(bp,
365 					     ramrod.vlan_mac_obj,
366 					     &ramrod.user_req.vlan_mac_flags,
367 					     &ramrod.ramrod_flags);
368 	if (rc) {
369 		BNX2X_ERR("Failed to delete all %s\n",
370 			  (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
371 			  (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
372 		return rc;
373 	}
374 
375 	return 0;
376 }
377 
378 static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
379 				    struct bnx2x_virtf *vf, int qid,
380 				    struct bnx2x_vf_mac_vlan_filter *filter,
381 				    bool drv_only)
382 {
383 	struct bnx2x_vlan_mac_ramrod_params ramrod;
384 	int rc;
385 
386 	DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",
387 	   vf->abs_vfid, filter->add ? "Adding" : "Deleting",
388 	   (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MAC" :
389 	   (filter->type == BNX2X_VF_FILTER_MAC) ? "MAC" : "VLAN");
390 
391 	/* Prepare ramrod params */
392 	memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
393 	if (filter->type == BNX2X_VF_FILTER_VLAN_MAC) {
394 		ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
395 		ramrod.user_req.u.vlan.vlan = filter->vid;
396 		memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
397 		set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
398 	} else if (filter->type == BNX2X_VF_FILTER_VLAN) {
399 		ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
400 		ramrod.user_req.u.vlan.vlan = filter->vid;
401 	} else {
402 		set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
403 		ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
404 		memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
405 	}
406 	ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :
407 					    BNX2X_VLAN_MAC_DEL;
408 
409 	set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
410 	if (drv_only)
411 		set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
412 	else
413 		set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
414 
415 	/* Add/Remove the filter */
416 	rc = bnx2x_config_vlan_mac(bp, &ramrod);
417 	if (rc == -EEXIST)
418 		return 0;
419 	if (rc) {
420 		BNX2X_ERR("Failed to %s %s\n",
421 			  filter->add ? "add" : "delete",
422 			  (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ?
423 				"VLAN-MAC" :
424 			  (filter->type == BNX2X_VF_FILTER_MAC) ?
425 				"MAC" : "VLAN");
426 		return rc;
427 	}
428 
429 	filter->applied = true;
430 
431 	return 0;
432 }
433 
434 int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,
435 				  struct bnx2x_vf_mac_vlan_filters *filters,
436 				  int qid, bool drv_only)
437 {
438 	int rc = 0, i;
439 
440 	DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
441 
442 	if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
443 		return -EINVAL;
444 
445 	/* Prepare ramrod params */
446 	for (i = 0; i < filters->count; i++) {
447 		rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,
448 					      &filters->filters[i], drv_only);
449 		if (rc)
450 			break;
451 	}
452 
453 	/* Rollback if needed */
454 	if (i != filters->count) {
455 		BNX2X_ERR("Managed only %d/%d filters - rolling back\n",
456 			  i, filters->count);
457 		while (--i >= 0) {
458 			if (!filters->filters[i].applied)
459 				continue;
460 			filters->filters[i].add = !filters->filters[i].add;
461 			bnx2x_vf_mac_vlan_config(bp, vf, qid,
462 						 &filters->filters[i],
463 						 drv_only);
464 		}
465 	}
466 
467 	/* It's our responsibility to free the filters */
468 	kfree(filters);
469 
470 	return rc;
471 }
472 
473 int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,
474 			 struct bnx2x_vf_queue_construct_params *qctor)
475 {
476 	int rc;
477 
478 	DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
479 
480 	rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);
481 	if (rc)
482 		goto op_err;
483 
484 	/* Schedule the configuration of any pending vlan filters */
485 	bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,
486 			       BNX2X_MSG_IOV);
487 	return 0;
488 op_err:
489 	BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
490 	return rc;
491 }
492 
493 static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,
494 			       int qid)
495 {
496 	int rc;
497 
498 	DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
499 
500 	/* If needed, clean the filtering data base */
501 	if ((qid == LEADING_IDX) &&
502 	    bnx2x_validate_vf_sp_objs(bp, vf, false)) {
503 		rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
504 					     BNX2X_VF_FILTER_VLAN_MAC);
505 		if (rc)
506 			goto op_err;
507 		rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
508 					     BNX2X_VF_FILTER_VLAN);
509 		if (rc)
510 			goto op_err;
511 		rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
512 					     BNX2X_VF_FILTER_MAC);
513 		if (rc)
514 			goto op_err;
515 	}
516 
517 	/* Terminate queue */
518 	if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {
519 		struct bnx2x_queue_state_params qstate;
520 
521 		memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
522 		qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
523 		qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;
524 		qstate.cmd = BNX2X_Q_CMD_TERMINATE;
525 		set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
526 		rc = bnx2x_queue_state_change(bp, &qstate);
527 		if (rc)
528 			goto op_err;
529 	}
530 
531 	return 0;
532 op_err:
533 	BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
534 	return rc;
535 }
536 
537 int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
538 		   bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)
539 {
540 	struct bnx2x_mcast_list_elem *mc = NULL;
541 	struct bnx2x_mcast_ramrod_params mcast;
542 	int rc, i;
543 
544 	DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
545 
546 	/* Prepare Multicast command */
547 	memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));
548 	mcast.mcast_obj = &vf->mcast_obj;
549 	if (drv_only)
550 		set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);
551 	else
552 		set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);
553 	if (mc_num) {
554 		mc = kcalloc(mc_num, sizeof(struct bnx2x_mcast_list_elem),
555 			     GFP_KERNEL);
556 		if (!mc) {
557 			BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");
558 			return -ENOMEM;
559 		}
560 	}
561 
562 	if (mc_num) {
563 		INIT_LIST_HEAD(&mcast.mcast_list);
564 		for (i = 0; i < mc_num; i++) {
565 			mc[i].mac = mcasts[i];
566 			list_add_tail(&mc[i].link,
567 				      &mcast.mcast_list);
568 		}
569 
570 		/* add new mcasts */
571 		mcast.mcast_list_len = mc_num;
572 		rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_SET);
573 		if (rc)
574 			BNX2X_ERR("Failed to set multicasts\n");
575 	} else {
576 		/* clear existing mcasts */
577 		rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);
578 		if (rc)
579 			BNX2X_ERR("Failed to remove multicasts\n");
580 	}
581 
582 	kfree(mc);
583 
584 	return rc;
585 }
586 
587 static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
588 				  struct bnx2x_rx_mode_ramrod_params *ramrod,
589 				  struct bnx2x_virtf *vf,
590 				  unsigned long accept_flags)
591 {
592 	struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
593 
594 	memset(ramrod, 0, sizeof(*ramrod));
595 	ramrod->cid = vfq->cid;
596 	ramrod->cl_id = vfq_cl_id(vf, vfq);
597 	ramrod->rx_mode_obj = &bp->rx_mode_obj;
598 	ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
599 	ramrod->rx_accept_flags = accept_flags;
600 	ramrod->tx_accept_flags = accept_flags;
601 	ramrod->pstate = &vf->filter_state;
602 	ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
603 
604 	set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
605 	set_bit(RAMROD_RX, &ramrod->ramrod_flags);
606 	set_bit(RAMROD_TX, &ramrod->ramrod_flags);
607 
608 	ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
609 	ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
610 }
611 
612 int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,
613 		    int qid, unsigned long accept_flags)
614 {
615 	struct bnx2x_rx_mode_ramrod_params ramrod;
616 
617 	DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
618 
619 	bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);
620 	set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
621 	vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;
622 	return bnx2x_config_rx_mode(bp, &ramrod);
623 }
624 
625 int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)
626 {
627 	int rc;
628 
629 	DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
630 
631 	/* Remove all classification configuration for leading queue */
632 	if (qid == LEADING_IDX) {
633 		rc = bnx2x_vf_rxmode(bp, vf, qid, 0);
634 		if (rc)
635 			goto op_err;
636 
637 		/* Remove filtering if feasible */
638 		if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {
639 			rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
640 						     false,
641 						     BNX2X_VF_FILTER_VLAN_MAC);
642 			if (rc)
643 				goto op_err;
644 			rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
645 						     false,
646 						     BNX2X_VF_FILTER_VLAN);
647 			if (rc)
648 				goto op_err;
649 			rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
650 						     false,
651 						     BNX2X_VF_FILTER_MAC);
652 			if (rc)
653 				goto op_err;
654 			rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);
655 			if (rc)
656 				goto op_err;
657 		}
658 	}
659 
660 	/* Destroy queue */
661 	rc = bnx2x_vf_queue_destroy(bp, vf, qid);
662 	if (rc)
663 		goto op_err;
664 	return rc;
665 op_err:
666 	BNX2X_ERR("vf[%d:%d] error: rc %d\n",
667 		  vf->abs_vfid, qid, rc);
668 	return rc;
669 }
670 
671 /* VF enable primitives
672  * when pretend is required the caller is responsible
673  * for calling pretend prior to calling these routines
674  */
675 
676 /* internal vf enable - until vf is enabled internally all transactions
677  * are blocked. This routine should always be called last with pretend.
678  */
679 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
680 {
681 	REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
682 }
683 
684 /* clears vf error in all semi blocks */
685 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
686 {
687 	REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
688 	REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
689 	REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
690 	REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
691 }
692 
693 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
694 {
695 	u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
696 	u32 was_err_reg = 0;
697 
698 	switch (was_err_group) {
699 	case 0:
700 	    was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
701 	    break;
702 	case 1:
703 	    was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
704 	    break;
705 	case 2:
706 	    was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
707 	    break;
708 	case 3:
709 	    was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
710 	    break;
711 	}
712 	REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
713 }
714 
715 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
716 {
717 	int i;
718 	u32 val;
719 
720 	/* Set VF masks and configuration - pretend */
721 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
722 
723 	REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
724 	REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
725 	REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
726 	REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
727 	REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
728 	REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
729 
730 	val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
731 	val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
732 	val &= ~IGU_VF_CONF_PARENT_MASK;
733 	val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
734 	REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
735 
736 	DP(BNX2X_MSG_IOV,
737 	   "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
738 	   vf->abs_vfid, val);
739 
740 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
741 
742 	/* iterate over all queues, clear sb consumer */
743 	for (i = 0; i < vf_sb_count(vf); i++) {
744 		u8 igu_sb_id = vf_igu_sb(vf, i);
745 
746 		/* zero prod memory */
747 		REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
748 
749 		/* clear sb state machine */
750 		bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
751 				       false /* VF */);
752 
753 		/* disable + update */
754 		bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
755 				    IGU_INT_DISABLE, 1);
756 	}
757 }
758 
759 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
760 {
761 	/* set the VF-PF association in the FW */
762 	storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
763 	storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
764 
765 	/* clear vf errors*/
766 	bnx2x_vf_semi_clear_err(bp, abs_vfid);
767 	bnx2x_vf_pglue_clear_err(bp, abs_vfid);
768 
769 	/* internal vf-enable - pretend */
770 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
771 	DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
772 	bnx2x_vf_enable_internal(bp, true);
773 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
774 }
775 
776 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
777 {
778 	/* Reset vf in IGU  interrupts are still disabled */
779 	bnx2x_vf_igu_reset(bp, vf);
780 
781 	/* pretend to enable the vf with the PBF */
782 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
783 	REG_WR(bp, PBF_REG_DISABLE_VF, 0);
784 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
785 }
786 
787 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
788 {
789 	struct pci_dev *dev;
790 	struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
791 
792 	if (!vf)
793 		return false;
794 
795 	dev = pci_get_domain_bus_and_slot(vf->domain, vf->bus, vf->devfn);
796 	if (dev)
797 		return bnx2x_is_pcie_pending(dev);
798 	return false;
799 }
800 
801 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
802 {
803 	/* Verify no pending pci transactions */
804 	if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
805 		BNX2X_ERR("PCIE Transactions still pending\n");
806 
807 	return 0;
808 }
809 
810 /* must be called after the number of PF queues and the number of VFs are
811  * both known
812  */
813 static void
814 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
815 {
816 	struct vf_pf_resc_request *resc = &vf->alloc_resc;
817 
818 	/* will be set only during VF-ACQUIRE */
819 	resc->num_rxqs = 0;
820 	resc->num_txqs = 0;
821 
822 	resc->num_mac_filters = VF_MAC_CREDIT_CNT;
823 	resc->num_vlan_filters = VF_VLAN_CREDIT_CNT;
824 
825 	/* no real limitation */
826 	resc->num_mc_filters = 0;
827 
828 	/* num_sbs already set */
829 	resc->num_sbs = vf->sb_count;
830 }
831 
832 /* FLR routines: */
833 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
834 {
835 	/* reset the state variables */
836 	bnx2x_iov_static_resc(bp, vf);
837 	vf->state = VF_FREE;
838 }
839 
840 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
841 {
842 	u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
843 
844 	/* DQ usage counter */
845 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
846 	bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
847 					"DQ VF usage counter timed out",
848 					poll_cnt);
849 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
850 
851 	/* FW cleanup command - poll for the results */
852 	if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
853 				   poll_cnt))
854 		BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
855 
856 	/* verify TX hw is flushed */
857 	bnx2x_tx_hw_flushed(bp, poll_cnt);
858 }
859 
860 static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
861 {
862 	int rc, i;
863 
864 	DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
865 
866 	/* the cleanup operations are valid if and only if the VF
867 	 * was first acquired.
868 	 */
869 	for (i = 0; i < vf_rxq_count(vf); i++) {
870 		rc = bnx2x_vf_queue_flr(bp, vf, i);
871 		if (rc)
872 			goto out;
873 	}
874 
875 	/* remove multicasts */
876 	bnx2x_vf_mcast(bp, vf, NULL, 0, true);
877 
878 	/* dispatch final cleanup and wait for HW queues to flush */
879 	bnx2x_vf_flr_clnup_hw(bp, vf);
880 
881 	/* release VF resources */
882 	bnx2x_vf_free_resc(bp, vf);
883 
884 	vf->malicious = false;
885 
886 	/* re-open the mailbox */
887 	bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
888 	return;
889 out:
890 	BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",
891 		  vf->abs_vfid, i, rc);
892 }
893 
894 static void bnx2x_vf_flr_clnup(struct bnx2x *bp)
895 {
896 	struct bnx2x_virtf *vf;
897 	int i;
898 
899 	for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {
900 		/* VF should be RESET & in FLR cleanup states */
901 		if (bnx2x_vf(bp, i, state) != VF_RESET ||
902 		    !bnx2x_vf(bp, i, flr_clnup_stage))
903 			continue;
904 
905 		DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",
906 		   i, BNX2X_NR_VIRTFN(bp));
907 
908 		vf = BP_VF(bp, i);
909 
910 		/* lock the vf pf channel */
911 		bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
912 
913 		/* invoke the VF FLR SM */
914 		bnx2x_vf_flr(bp, vf);
915 
916 		/* mark the VF to be ACKED and continue */
917 		vf->flr_clnup_stage = false;
918 		bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
919 	}
920 
921 	/* Acknowledge the handled VFs.
922 	 * we are acknowledge all the vfs which an flr was requested for, even
923 	 * if amongst them there are such that we never opened, since the mcp
924 	 * will interrupt us immediately again if we only ack some of the bits,
925 	 * resulting in an endless loop. This can happen for example in KVM
926 	 * where an 'all ones' flr request is sometimes given by hyper visor
927 	 */
928 	DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
929 	   bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
930 	for (i = 0; i < FLRD_VFS_DWORDS; i++)
931 		SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
932 			  bp->vfdb->flrd_vfs[i]);
933 
934 	bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
935 
936 	/* clear the acked bits - better yet if the MCP implemented
937 	 * write to clear semantics
938 	 */
939 	for (i = 0; i < FLRD_VFS_DWORDS; i++)
940 		SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
941 }
942 
943 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
944 {
945 	int i;
946 
947 	/* Read FLR'd VFs */
948 	for (i = 0; i < FLRD_VFS_DWORDS; i++)
949 		bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
950 
951 	DP(BNX2X_MSG_MCP,
952 	   "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
953 	   bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
954 
955 	for_each_vf(bp, i) {
956 		struct bnx2x_virtf *vf = BP_VF(bp, i);
957 		u32 reset = 0;
958 
959 		if (vf->abs_vfid < 32)
960 			reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
961 		else
962 			reset = bp->vfdb->flrd_vfs[1] &
963 				(1 << (vf->abs_vfid - 32));
964 
965 		if (reset) {
966 			/* set as reset and ready for cleanup */
967 			vf->state = VF_RESET;
968 			vf->flr_clnup_stage = true;
969 
970 			DP(BNX2X_MSG_IOV,
971 			   "Initiating Final cleanup for VF %d\n",
972 			   vf->abs_vfid);
973 		}
974 	}
975 
976 	/* do the FLR cleanup for all marked VFs*/
977 	bnx2x_vf_flr_clnup(bp);
978 }
979 
980 /* IOV global initialization routines  */
981 void bnx2x_iov_init_dq(struct bnx2x *bp)
982 {
983 	if (!IS_SRIOV(bp))
984 		return;
985 
986 	/* Set the DQ such that the CID reflect the abs_vfid */
987 	REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
988 	REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
989 
990 	/* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
991 	 * the PF L2 queues
992 	 */
993 	REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
994 
995 	/* The VF window size is the log2 of the max number of CIDs per VF */
996 	REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
997 
998 	/* The VF doorbell size  0 - *B, 4 - 128B. We set it here to match
999 	 * the Pf doorbell size although the 2 are independent.
1000 	 */
1001 	REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1002 
1003 	/* No security checks for now -
1004 	 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1005 	 * CID range 0 - 0x1ffff
1006 	 */
1007 	REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1008 	REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1009 	REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1010 	REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1011 
1012 	/* set the VF doorbell threshold. This threshold represents the amount
1013 	 * of doorbells allowed in the main DORQ fifo for a specific VF.
1014 	 */
1015 	REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);
1016 }
1017 
1018 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1019 {
1020 	if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1021 		REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1022 }
1023 
1024 static int bnx2x_vf_domain(struct bnx2x *bp, int vfid)
1025 {
1026 	struct pci_dev *dev = bp->pdev;
1027 
1028 	return pci_domain_nr(dev->bus);
1029 }
1030 
1031 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1032 {
1033 	struct pci_dev *dev = bp->pdev;
1034 	struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1035 
1036 	return dev->bus->number + ((dev->devfn + iov->offset +
1037 				    iov->stride * vfid) >> 8);
1038 }
1039 
1040 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1041 {
1042 	struct pci_dev *dev = bp->pdev;
1043 	struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1044 
1045 	return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1046 }
1047 
1048 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1049 {
1050 	int i, n;
1051 	struct pci_dev *dev = bp->pdev;
1052 	struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1053 
1054 	for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1055 		u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1056 		u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1057 
1058 		size /= iov->total;
1059 		vf->bars[n].bar = start + size * vf->abs_vfid;
1060 		vf->bars[n].size = size;
1061 	}
1062 }
1063 
1064 static int
1065 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1066 {
1067 	int sb_id;
1068 	u32 val;
1069 	u8 fid, current_pf = 0;
1070 
1071 	/* IGU in normal mode - read CAM */
1072 	for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1073 		val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1074 		if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1075 			continue;
1076 		fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1077 		if (fid & IGU_FID_ENCODE_IS_PF)
1078 			current_pf = fid & IGU_FID_PF_NUM_MASK;
1079 		else if (current_pf == BP_FUNC(bp))
1080 			bnx2x_vf_set_igu_info(bp, sb_id,
1081 					      (fid & IGU_FID_VF_NUM_MASK));
1082 		DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1083 		   ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1084 		   ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1085 		   (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1086 		   GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1087 	}
1088 	DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1089 	return BP_VFDB(bp)->vf_sbs_pool;
1090 }
1091 
1092 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1093 {
1094 	if (bp->vfdb) {
1095 		kfree(bp->vfdb->vfqs);
1096 		kfree(bp->vfdb->vfs);
1097 		kfree(bp->vfdb);
1098 	}
1099 	bp->vfdb = NULL;
1100 }
1101 
1102 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1103 {
1104 	int pos;
1105 	struct pci_dev *dev = bp->pdev;
1106 
1107 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1108 	if (!pos) {
1109 		BNX2X_ERR("failed to find SRIOV capability in device\n");
1110 		return -ENODEV;
1111 	}
1112 
1113 	iov->pos = pos;
1114 	DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1115 	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1116 	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1117 	pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1118 	pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1119 	pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1120 	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1121 	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1122 	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1123 
1124 	return 0;
1125 }
1126 
1127 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1128 {
1129 	u32 val;
1130 
1131 	/* read the SRIOV capability structure
1132 	 * The fields can be read via configuration read or
1133 	 * directly from the device (starting at offset PCICFG_OFFSET)
1134 	 */
1135 	if (bnx2x_sriov_pci_cfg_info(bp, iov))
1136 		return -ENODEV;
1137 
1138 	/* get the number of SRIOV bars */
1139 	iov->nres = 0;
1140 
1141 	/* read the first_vfid */
1142 	val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1143 	iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1144 			       * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1145 
1146 	DP(BNX2X_MSG_IOV,
1147 	   "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1148 	   BP_FUNC(bp),
1149 	   iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1150 	   iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1151 
1152 	return 0;
1153 }
1154 
1155 /* must be called after PF bars are mapped */
1156 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1157 		       int num_vfs_param)
1158 {
1159 	int err, i;
1160 	struct bnx2x_sriov *iov;
1161 	struct pci_dev *dev = bp->pdev;
1162 
1163 	bp->vfdb = NULL;
1164 
1165 	/* verify is pf */
1166 	if (IS_VF(bp))
1167 		return 0;
1168 
1169 	/* verify sriov capability is present in configuration space */
1170 	if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1171 		return 0;
1172 
1173 	/* verify chip revision */
1174 	if (CHIP_IS_E1x(bp))
1175 		return 0;
1176 
1177 	/* check if SRIOV support is turned off */
1178 	if (!num_vfs_param)
1179 		return 0;
1180 
1181 	/* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1182 	if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1183 		BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1184 			  BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1185 		return 0;
1186 	}
1187 
1188 	/* SRIOV can be enabled only with MSIX */
1189 	if (int_mode_param == BNX2X_INT_MODE_MSI ||
1190 	    int_mode_param == BNX2X_INT_MODE_INTX) {
1191 		BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1192 		return 0;
1193 	}
1194 
1195 	/* verify ari is enabled */
1196 	if (!pci_ari_enabled(bp->pdev->bus)) {
1197 		BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1198 		return 0;
1199 	}
1200 
1201 	/* verify igu is in normal mode */
1202 	if (CHIP_INT_MODE_IS_BC(bp)) {
1203 		BNX2X_ERR("IGU not normal mode,  SRIOV can not be enabled\n");
1204 		return 0;
1205 	}
1206 
1207 	/* allocate the vfs database */
1208 	bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1209 	if (!bp->vfdb) {
1210 		BNX2X_ERR("failed to allocate vf database\n");
1211 		err = -ENOMEM;
1212 		goto failed;
1213 	}
1214 
1215 	/* get the sriov info - Linux already collected all the pertinent
1216 	 * information, however the sriov structure is for the private use
1217 	 * of the pci module. Also we want this information regardless
1218 	 * of the hyper-visor.
1219 	 */
1220 	iov = &(bp->vfdb->sriov);
1221 	err = bnx2x_sriov_info(bp, iov);
1222 	if (err)
1223 		goto failed;
1224 
1225 	/* SR-IOV capability was enabled but there are no VFs*/
1226 	if (iov->total == 0)
1227 		goto failed;
1228 
1229 	iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1230 
1231 	DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1232 	   num_vfs_param, iov->nr_virtfn);
1233 
1234 	/* allocate the vf array */
1235 	bp->vfdb->vfs = kcalloc(BNX2X_NR_VIRTFN(bp),
1236 				sizeof(struct bnx2x_virtf),
1237 				GFP_KERNEL);
1238 	if (!bp->vfdb->vfs) {
1239 		BNX2X_ERR("failed to allocate vf array\n");
1240 		err = -ENOMEM;
1241 		goto failed;
1242 	}
1243 
1244 	/* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1245 	for_each_vf(bp, i) {
1246 		bnx2x_vf(bp, i, index) = i;
1247 		bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1248 		bnx2x_vf(bp, i, state) = VF_FREE;
1249 		mutex_init(&bnx2x_vf(bp, i, op_mutex));
1250 		bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1251 		/* enable spoofchk by default */
1252 		bnx2x_vf(bp, i, spoofchk) = 1;
1253 	}
1254 
1255 	/* re-read the IGU CAM for VFs - index and abs_vfid must be set */
1256 	if (!bnx2x_get_vf_igu_cam_info(bp)) {
1257 		BNX2X_ERR("No entries in IGU CAM for vfs\n");
1258 		err = -EINVAL;
1259 		goto failed;
1260 	}
1261 
1262 	/* allocate the queue arrays for all VFs */
1263 	bp->vfdb->vfqs = kcalloc(BNX2X_MAX_NUM_VF_QUEUES,
1264 				 sizeof(struct bnx2x_vf_queue),
1265 				 GFP_KERNEL);
1266 
1267 	if (!bp->vfdb->vfqs) {
1268 		BNX2X_ERR("failed to allocate vf queue array\n");
1269 		err = -ENOMEM;
1270 		goto failed;
1271 	}
1272 
1273 	/* Prepare the VFs event synchronization mechanism */
1274 	mutex_init(&bp->vfdb->event_mutex);
1275 
1276 	mutex_init(&bp->vfdb->bulletin_mutex);
1277 
1278 	if (SHMEM2_HAS(bp, sriov_switch_mode))
1279 		SHMEM2_WR(bp, sriov_switch_mode, SRIOV_SWITCH_MODE_VEB);
1280 
1281 	return 0;
1282 failed:
1283 	DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
1284 	__bnx2x_iov_free_vfdb(bp);
1285 	return err;
1286 }
1287 
1288 void bnx2x_iov_remove_one(struct bnx2x *bp)
1289 {
1290 	int vf_idx;
1291 
1292 	/* if SRIOV is not enabled there's nothing to do */
1293 	if (!IS_SRIOV(bp))
1294 		return;
1295 
1296 	bnx2x_disable_sriov(bp);
1297 
1298 	/* disable access to all VFs */
1299 	for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
1300 		bnx2x_pretend_func(bp,
1301 				   HW_VF_HANDLE(bp,
1302 						bp->vfdb->sriov.first_vf_in_pf +
1303 						vf_idx));
1304 		DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
1305 		   bp->vfdb->sriov.first_vf_in_pf + vf_idx);
1306 		bnx2x_vf_enable_internal(bp, 0);
1307 		bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1308 	}
1309 
1310 	/* free vf database */
1311 	__bnx2x_iov_free_vfdb(bp);
1312 }
1313 
1314 void bnx2x_iov_free_mem(struct bnx2x *bp)
1315 {
1316 	int i;
1317 
1318 	if (!IS_SRIOV(bp))
1319 		return;
1320 
1321 	/* free vfs hw contexts */
1322 	for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1323 		struct hw_dma *cxt = &bp->vfdb->context[i];
1324 		BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
1325 	}
1326 
1327 	BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
1328 		       BP_VFDB(bp)->sp_dma.mapping,
1329 		       BP_VFDB(bp)->sp_dma.size);
1330 
1331 	BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
1332 		       BP_VF_MBX_DMA(bp)->mapping,
1333 		       BP_VF_MBX_DMA(bp)->size);
1334 
1335 	BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
1336 		       BP_VF_BULLETIN_DMA(bp)->mapping,
1337 		       BP_VF_BULLETIN_DMA(bp)->size);
1338 }
1339 
1340 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
1341 {
1342 	size_t tot_size;
1343 	int i, rc = 0;
1344 
1345 	if (!IS_SRIOV(bp))
1346 		return rc;
1347 
1348 	/* allocate vfs hw contexts */
1349 	tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
1350 		BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
1351 
1352 	for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1353 		struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
1354 		cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
1355 
1356 		if (cxt->size) {
1357 			cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);
1358 			if (!cxt->addr)
1359 				goto alloc_mem_err;
1360 		} else {
1361 			cxt->addr = NULL;
1362 			cxt->mapping = 0;
1363 		}
1364 		tot_size -= cxt->size;
1365 	}
1366 
1367 	/* allocate vfs ramrods dma memory - client_init and set_mac */
1368 	tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
1369 	BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,
1370 						   tot_size);
1371 	if (!BP_VFDB(bp)->sp_dma.addr)
1372 		goto alloc_mem_err;
1373 	BP_VFDB(bp)->sp_dma.size = tot_size;
1374 
1375 	/* allocate mailboxes */
1376 	tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
1377 	BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,
1378 						  tot_size);
1379 	if (!BP_VF_MBX_DMA(bp)->addr)
1380 		goto alloc_mem_err;
1381 
1382 	BP_VF_MBX_DMA(bp)->size = tot_size;
1383 
1384 	/* allocate local bulletin boards */
1385 	tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
1386 	BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,
1387 						       tot_size);
1388 	if (!BP_VF_BULLETIN_DMA(bp)->addr)
1389 		goto alloc_mem_err;
1390 
1391 	BP_VF_BULLETIN_DMA(bp)->size = tot_size;
1392 
1393 	return 0;
1394 
1395 alloc_mem_err:
1396 	return -ENOMEM;
1397 }
1398 
1399 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
1400 			   struct bnx2x_vf_queue *q)
1401 {
1402 	u8 cl_id = vfq_cl_id(vf, q);
1403 	u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
1404 	unsigned long q_type = 0;
1405 
1406 	set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
1407 	set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
1408 
1409 	/* Queue State object */
1410 	bnx2x_init_queue_obj(bp, &q->sp_obj,
1411 			     cl_id, &q->cid, 1, func_id,
1412 			     bnx2x_vf_sp(bp, vf, q_data),
1413 			     bnx2x_vf_sp_map(bp, vf, q_data),
1414 			     q_type);
1415 
1416 	/* sp indication is set only when vlan/mac/etc. are initialized */
1417 	q->sp_initialized = false;
1418 
1419 	DP(BNX2X_MSG_IOV,
1420 	   "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
1421 	   vf->abs_vfid, q->sp_obj.func_id, q->cid);
1422 }
1423 
1424 static int bnx2x_max_speed_cap(struct bnx2x *bp)
1425 {
1426 	u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];
1427 
1428 	if (supported &
1429 	    (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))
1430 		return 20000;
1431 
1432 	return 10000; /* assume lowest supported speed is 10G */
1433 }
1434 
1435 int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)
1436 {
1437 	struct bnx2x_link_report_data *state = &bp->last_reported_link;
1438 	struct pf_vf_bulletin_content *bulletin;
1439 	struct bnx2x_virtf *vf;
1440 	bool update = true;
1441 	int rc = 0;
1442 
1443 	/* sanity and init */
1444 	rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);
1445 	if (rc)
1446 		return rc;
1447 
1448 	mutex_lock(&bp->vfdb->bulletin_mutex);
1449 
1450 	if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {
1451 		bulletin->valid_bitmap |= 1 << LINK_VALID;
1452 
1453 		bulletin->link_speed = state->line_speed;
1454 		bulletin->link_flags = 0;
1455 		if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1456 			     &state->link_report_flags))
1457 			bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1458 		if (test_bit(BNX2X_LINK_REPORT_FD,
1459 			     &state->link_report_flags))
1460 			bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;
1461 		if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1462 			     &state->link_report_flags))
1463 			bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;
1464 		if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1465 			     &state->link_report_flags))
1466 			bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;
1467 	} else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&
1468 		   !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1469 		bulletin->valid_bitmap |= 1 << LINK_VALID;
1470 		bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1471 	} else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&
1472 		   (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1473 		bulletin->valid_bitmap |= 1 << LINK_VALID;
1474 		bulletin->link_speed = bnx2x_max_speed_cap(bp);
1475 		bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;
1476 	} else {
1477 		update = false;
1478 	}
1479 
1480 	if (update) {
1481 		DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,
1482 		   "vf %d mode %u speed %d flags %x\n", idx,
1483 		   vf->link_cfg, bulletin->link_speed, bulletin->link_flags);
1484 
1485 		/* Post update on VF's bulletin board */
1486 		rc = bnx2x_post_vf_bulletin(bp, idx);
1487 		if (rc) {
1488 			BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);
1489 			goto out;
1490 		}
1491 	}
1492 
1493 out:
1494 	mutex_unlock(&bp->vfdb->bulletin_mutex);
1495 	return rc;
1496 }
1497 
1498 int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)
1499 {
1500 	struct bnx2x *bp = netdev_priv(dev);
1501 	struct bnx2x_virtf *vf = BP_VF(bp, idx);
1502 
1503 	if (!vf)
1504 		return -EINVAL;
1505 
1506 	if (vf->link_cfg == link_state)
1507 		return 0; /* nothing todo */
1508 
1509 	vf->link_cfg = link_state;
1510 
1511 	return bnx2x_iov_link_update_vf(bp, idx);
1512 }
1513 
1514 void bnx2x_iov_link_update(struct bnx2x *bp)
1515 {
1516 	int vfid;
1517 
1518 	if (!IS_SRIOV(bp))
1519 		return;
1520 
1521 	for_each_vf(bp, vfid)
1522 		bnx2x_iov_link_update_vf(bp, vfid);
1523 }
1524 
1525 /* called by bnx2x_nic_load */
1526 int bnx2x_iov_nic_init(struct bnx2x *bp)
1527 {
1528 	int vfid;
1529 
1530 	if (!IS_SRIOV(bp)) {
1531 		DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
1532 		return 0;
1533 	}
1534 
1535 	DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
1536 
1537 	/* let FLR complete ... */
1538 	msleep(100);
1539 
1540 	/* initialize vf database */
1541 	for_each_vf(bp, vfid) {
1542 		struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1543 
1544 		int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
1545 			BNX2X_CIDS_PER_VF;
1546 
1547 		union cdu_context *base_cxt = (union cdu_context *)
1548 			BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
1549 			(base_vf_cid & (ILT_PAGE_CIDS-1));
1550 
1551 		DP(BNX2X_MSG_IOV,
1552 		   "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
1553 		   vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
1554 		   BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
1555 
1556 		/* init statically provisioned resources */
1557 		bnx2x_iov_static_resc(bp, vf);
1558 
1559 		/* queues are initialized during VF-ACQUIRE */
1560 		vf->filter_state = 0;
1561 		vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1562 
1563 		bnx2x_init_credit_pool(&vf->vf_vlans_pool, 0,
1564 				       vf_vlan_rules_cnt(vf));
1565 		bnx2x_init_credit_pool(&vf->vf_macs_pool, 0,
1566 				       vf_mac_rules_cnt(vf));
1567 
1568 		/*  init mcast object - This object will be re-initialized
1569 		 *  during VF-ACQUIRE with the proper cl_id and cid.
1570 		 *  It needs to be initialized here so that it can be safely
1571 		 *  handled by a subsequent FLR flow.
1572 		 */
1573 		bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
1574 				     0xFF, 0xFF, 0xFF,
1575 				     bnx2x_vf_sp(bp, vf, mcast_rdata),
1576 				     bnx2x_vf_sp_map(bp, vf, mcast_rdata),
1577 				     BNX2X_FILTER_MCAST_PENDING,
1578 				     &vf->filter_state,
1579 				     BNX2X_OBJ_TYPE_RX_TX);
1580 
1581 		/* set the mailbox message addresses */
1582 		BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
1583 			(((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
1584 			MBX_MSG_ALIGNED_SIZE);
1585 
1586 		BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
1587 			vfid * MBX_MSG_ALIGNED_SIZE;
1588 
1589 		/* Enable vf mailbox */
1590 		bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1591 	}
1592 
1593 	/* Final VF init */
1594 	for_each_vf(bp, vfid) {
1595 		struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1596 
1597 		/* fill in the BDF and bars */
1598 		vf->domain = bnx2x_vf_domain(bp, vfid);
1599 		vf->bus = bnx2x_vf_bus(bp, vfid);
1600 		vf->devfn = bnx2x_vf_devfn(bp, vfid);
1601 		bnx2x_vf_set_bars(bp, vf);
1602 
1603 		DP(BNX2X_MSG_IOV,
1604 		   "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
1605 		   vf->abs_vfid, vf->bus, vf->devfn,
1606 		   (unsigned)vf->bars[0].bar, vf->bars[0].size,
1607 		   (unsigned)vf->bars[1].bar, vf->bars[1].size,
1608 		   (unsigned)vf->bars[2].bar, vf->bars[2].size);
1609 	}
1610 
1611 	return 0;
1612 }
1613 
1614 /* called by bnx2x_chip_cleanup */
1615 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
1616 {
1617 	int i;
1618 
1619 	if (!IS_SRIOV(bp))
1620 		return 0;
1621 
1622 	/* release all the VFs */
1623 	for_each_vf(bp, i)
1624 		bnx2x_vf_release(bp, BP_VF(bp, i));
1625 
1626 	return 0;
1627 }
1628 
1629 /* called by bnx2x_init_hw_func, returns the next ilt line */
1630 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
1631 {
1632 	int i;
1633 	struct bnx2x_ilt *ilt = BP_ILT(bp);
1634 
1635 	if (!IS_SRIOV(bp))
1636 		return line;
1637 
1638 	/* set vfs ilt lines */
1639 	for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1640 		struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
1641 
1642 		ilt->lines[line+i].page = hw_cxt->addr;
1643 		ilt->lines[line+i].page_mapping = hw_cxt->mapping;
1644 		ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
1645 	}
1646 	return line + i;
1647 }
1648 
1649 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
1650 {
1651 	return ((cid >= BNX2X_FIRST_VF_CID) &&
1652 		((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
1653 }
1654 
1655 static
1656 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
1657 					struct bnx2x_vf_queue *vfq,
1658 					union event_ring_elem *elem)
1659 {
1660 	unsigned long ramrod_flags = 0;
1661 	int rc = 0;
1662 	u32 echo = le32_to_cpu(elem->message.data.eth_event.echo);
1663 
1664 	/* Always push next commands out, don't wait here */
1665 	set_bit(RAMROD_CONT, &ramrod_flags);
1666 
1667 	switch (echo >> BNX2X_SWCID_SHIFT) {
1668 	case BNX2X_FILTER_MAC_PENDING:
1669 		rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
1670 					   &ramrod_flags);
1671 		break;
1672 	case BNX2X_FILTER_VLAN_PENDING:
1673 		rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
1674 					    &ramrod_flags);
1675 		break;
1676 	default:
1677 		BNX2X_ERR("Unsupported classification command: 0x%x\n", echo);
1678 		return;
1679 	}
1680 	if (rc < 0)
1681 		BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
1682 	else if (rc > 0)
1683 		DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
1684 }
1685 
1686 static
1687 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
1688 			       struct bnx2x_virtf *vf)
1689 {
1690 	struct bnx2x_mcast_ramrod_params rparam = {NULL};
1691 	int rc;
1692 
1693 	rparam.mcast_obj = &vf->mcast_obj;
1694 	vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
1695 
1696 	/* If there are pending mcast commands - send them */
1697 	if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
1698 		rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1699 		if (rc < 0)
1700 			BNX2X_ERR("Failed to send pending mcast commands: %d\n",
1701 				  rc);
1702 	}
1703 }
1704 
1705 static
1706 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
1707 				 struct bnx2x_virtf *vf)
1708 {
1709 	smp_mb__before_atomic();
1710 	clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1711 	smp_mb__after_atomic();
1712 }
1713 
1714 static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,
1715 					   struct bnx2x_virtf *vf)
1716 {
1717 	vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);
1718 }
1719 
1720 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
1721 {
1722 	struct bnx2x_virtf *vf;
1723 	int qidx = 0, abs_vfid;
1724 	u8 opcode;
1725 	u16 cid = 0xffff;
1726 
1727 	if (!IS_SRIOV(bp))
1728 		return 1;
1729 
1730 	/* first get the cid - the only events we handle here are cfc-delete
1731 	 * and set-mac completion
1732 	 */
1733 	opcode = elem->message.opcode;
1734 
1735 	switch (opcode) {
1736 	case EVENT_RING_OPCODE_CFC_DEL:
1737 		cid = SW_CID(elem->message.data.cfc_del_event.cid);
1738 		DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
1739 		break;
1740 	case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1741 	case EVENT_RING_OPCODE_MULTICAST_RULES:
1742 	case EVENT_RING_OPCODE_FILTERS_RULES:
1743 	case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1744 		cid = SW_CID(elem->message.data.eth_event.echo);
1745 		DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
1746 		break;
1747 	case EVENT_RING_OPCODE_VF_FLR:
1748 		abs_vfid = elem->message.data.vf_flr_event.vf_id;
1749 		DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
1750 		   abs_vfid);
1751 		goto get_vf;
1752 	case EVENT_RING_OPCODE_MALICIOUS_VF:
1753 		abs_vfid = elem->message.data.malicious_vf_event.vf_id;
1754 		BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
1755 			  abs_vfid,
1756 			  elem->message.data.malicious_vf_event.err_id);
1757 		goto get_vf;
1758 	default:
1759 		return 1;
1760 	}
1761 
1762 	/* check if the cid is the VF range */
1763 	if (!bnx2x_iov_is_vf_cid(bp, cid)) {
1764 		DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
1765 		return 1;
1766 	}
1767 
1768 	/* extract vf and rxq index from vf_cid - relies on the following:
1769 	 * 1. vfid on cid reflects the true abs_vfid
1770 	 * 2. The max number of VFs (per path) is 64
1771 	 */
1772 	qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
1773 	abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1774 get_vf:
1775 	vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1776 
1777 	if (!vf) {
1778 		BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
1779 			  cid, abs_vfid);
1780 		return 0;
1781 	}
1782 
1783 	switch (opcode) {
1784 	case EVENT_RING_OPCODE_CFC_DEL:
1785 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
1786 		   vf->abs_vfid, qidx);
1787 		vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
1788 						       &vfq_get(vf,
1789 								qidx)->sp_obj,
1790 						       BNX2X_Q_CMD_CFC_DEL);
1791 		break;
1792 	case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1793 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
1794 		   vf->abs_vfid, qidx);
1795 		bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
1796 		break;
1797 	case EVENT_RING_OPCODE_MULTICAST_RULES:
1798 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
1799 		   vf->abs_vfid, qidx);
1800 		bnx2x_vf_handle_mcast_eqe(bp, vf);
1801 		break;
1802 	case EVENT_RING_OPCODE_FILTERS_RULES:
1803 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
1804 		   vf->abs_vfid, qidx);
1805 		bnx2x_vf_handle_filters_eqe(bp, vf);
1806 		break;
1807 	case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1808 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1809 		   vf->abs_vfid, qidx);
1810 		bnx2x_vf_handle_rss_update_eqe(bp, vf);
1811 		fallthrough;
1812 	case EVENT_RING_OPCODE_VF_FLR:
1813 		/* Do nothing for now */
1814 		return 0;
1815 	case EVENT_RING_OPCODE_MALICIOUS_VF:
1816 		vf->malicious = true;
1817 		return 0;
1818 	}
1819 
1820 	return 0;
1821 }
1822 
1823 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
1824 {
1825 	/* extract the vf from vf_cid - relies on the following:
1826 	 * 1. vfid on cid reflects the true abs_vfid
1827 	 * 2. The max number of VFs (per path) is 64
1828 	 */
1829 	int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1830 	return bnx2x_vf_by_abs_fid(bp, abs_vfid);
1831 }
1832 
1833 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
1834 				struct bnx2x_queue_sp_obj **q_obj)
1835 {
1836 	struct bnx2x_virtf *vf;
1837 
1838 	if (!IS_SRIOV(bp))
1839 		return;
1840 
1841 	vf = bnx2x_vf_by_cid(bp, vf_cid);
1842 
1843 	if (vf) {
1844 		/* extract queue index from vf_cid - relies on the following:
1845 		 * 1. vfid on cid reflects the true abs_vfid
1846 		 * 2. The max number of VFs (per path) is 64
1847 		 */
1848 		int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
1849 		*q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
1850 	} else {
1851 		BNX2X_ERR("No vf matching cid %d\n", vf_cid);
1852 	}
1853 }
1854 
1855 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
1856 {
1857 	int i;
1858 	int first_queue_query_index, num_queues_req;
1859 	dma_addr_t cur_data_offset;
1860 	struct stats_query_entry *cur_query_entry;
1861 	u8 stats_count = 0;
1862 	bool is_fcoe = false;
1863 
1864 	if (!IS_SRIOV(bp))
1865 		return;
1866 
1867 	if (!NO_FCOE(bp))
1868 		is_fcoe = true;
1869 
1870 	/* fcoe adds one global request and one queue request */
1871 	num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
1872 	first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
1873 		(is_fcoe ? 0 : 1);
1874 
1875 	DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1876 	       "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
1877 	       BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
1878 	       first_queue_query_index + num_queues_req);
1879 
1880 	cur_data_offset = bp->fw_stats_data_mapping +
1881 		offsetof(struct bnx2x_fw_stats_data, queue_stats) +
1882 		num_queues_req * sizeof(struct per_queue_stats);
1883 
1884 	cur_query_entry = &bp->fw_stats_req->
1885 		query[first_queue_query_index + num_queues_req];
1886 
1887 	for_each_vf(bp, i) {
1888 		int j;
1889 		struct bnx2x_virtf *vf = BP_VF(bp, i);
1890 
1891 		if (vf->state != VF_ENABLED) {
1892 			DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1893 			       "vf %d not enabled so no stats for it\n",
1894 			       vf->abs_vfid);
1895 			continue;
1896 		}
1897 
1898 		if (vf->malicious) {
1899 			DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1900 			       "vf %d malicious so no stats for it\n",
1901 			       vf->abs_vfid);
1902 			continue;
1903 		}
1904 
1905 		DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1906 		       "add addresses for vf %d\n", vf->abs_vfid);
1907 		for_each_vfq(vf, j) {
1908 			struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
1909 
1910 			dma_addr_t q_stats_addr =
1911 				vf->fw_stat_map + j * vf->stats_stride;
1912 
1913 			/* collect stats fro active queues only */
1914 			if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
1915 			    BNX2X_Q_LOGICAL_STATE_STOPPED)
1916 				continue;
1917 
1918 			/* create stats query entry for this queue */
1919 			cur_query_entry->kind = STATS_TYPE_QUEUE;
1920 			cur_query_entry->index = vfq_stat_id(vf, rxq);
1921 			cur_query_entry->funcID =
1922 				cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
1923 			cur_query_entry->address.hi =
1924 				cpu_to_le32(U64_HI(q_stats_addr));
1925 			cur_query_entry->address.lo =
1926 				cpu_to_le32(U64_LO(q_stats_addr));
1927 			DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1928 			       "added address %x %x for vf %d queue %d client %d\n",
1929 			       cur_query_entry->address.hi,
1930 			       cur_query_entry->address.lo,
1931 			       cur_query_entry->funcID,
1932 			       j, cur_query_entry->index);
1933 			cur_query_entry++;
1934 			cur_data_offset += sizeof(struct per_queue_stats);
1935 			stats_count++;
1936 
1937 			/* all stats are coalesced to the leading queue */
1938 			if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
1939 				break;
1940 		}
1941 	}
1942 	bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
1943 }
1944 
1945 /* VF API helpers */
1946 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
1947 				u8 enable)
1948 {
1949 	u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
1950 	u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
1951 
1952 	REG_WR(bp, reg, val);
1953 }
1954 
1955 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
1956 {
1957 	int i;
1958 
1959 	for_each_vfq(vf, i)
1960 		bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
1961 				    vfq_qzone_id(vf, vfq_get(vf, i)), false);
1962 }
1963 
1964 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
1965 {
1966 	u32 val;
1967 
1968 	/* clear the VF configuration - pretend */
1969 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1970 	val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
1971 	val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
1972 		 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
1973 	REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
1974 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1975 }
1976 
1977 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
1978 {
1979 	return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
1980 		     BNX2X_VF_MAX_QUEUES);
1981 }
1982 
1983 static
1984 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
1985 			    struct vf_pf_resc_request *req_resc)
1986 {
1987 	u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
1988 	u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
1989 
1990 	return ((req_resc->num_rxqs <= rxq_cnt) &&
1991 		(req_resc->num_txqs <= txq_cnt) &&
1992 		(req_resc->num_sbs <= vf_sb_count(vf))   &&
1993 		(req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
1994 		(req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
1995 }
1996 
1997 /* CORE VF API */
1998 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
1999 		     struct vf_pf_resc_request *resc)
2000 {
2001 	int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2002 		BNX2X_CIDS_PER_VF;
2003 
2004 	union cdu_context *base_cxt = (union cdu_context *)
2005 		BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2006 		(base_vf_cid & (ILT_PAGE_CIDS-1));
2007 	int i;
2008 
2009 	/* if state is 'acquired' the VF was not released or FLR'd, in
2010 	 * this case the returned resources match the acquired already
2011 	 * acquired resources. Verify that the requested numbers do
2012 	 * not exceed the already acquired numbers.
2013 	 */
2014 	if (vf->state == VF_ACQUIRED) {
2015 		DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2016 		   vf->abs_vfid);
2017 
2018 		if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2019 			BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2020 				  vf->abs_vfid);
2021 			return -EINVAL;
2022 		}
2023 		return 0;
2024 	}
2025 
2026 	/* Otherwise vf state must be 'free' or 'reset' */
2027 	if (vf->state != VF_FREE && vf->state != VF_RESET) {
2028 		BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2029 			  vf->abs_vfid, vf->state);
2030 		return -EINVAL;
2031 	}
2032 
2033 	/* static allocation:
2034 	 * the global maximum number are fixed per VF. Fail the request if
2035 	 * requested number exceed these globals
2036 	 */
2037 	if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2038 		DP(BNX2X_MSG_IOV,
2039 		   "cannot fulfill vf resource request. Placing maximal available values in response\n");
2040 		/* set the max resource in the vf */
2041 		return -ENOMEM;
2042 	}
2043 
2044 	/* Set resources counters - 0 request means max available */
2045 	vf_sb_count(vf) = resc->num_sbs;
2046 	vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2047 	vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2048 
2049 	DP(BNX2X_MSG_IOV,
2050 	   "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2051 	   vf_sb_count(vf), vf_rxq_count(vf),
2052 	   vf_txq_count(vf), vf_mac_rules_cnt(vf),
2053 	   vf_vlan_rules_cnt(vf));
2054 
2055 	/* Initialize the queues */
2056 	if (!vf->vfqs) {
2057 		DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2058 		return -EINVAL;
2059 	}
2060 
2061 	for_each_vfq(vf, i) {
2062 		struct bnx2x_vf_queue *q = vfq_get(vf, i);
2063 
2064 		if (!q) {
2065 			BNX2X_ERR("q number %d was not allocated\n", i);
2066 			return -EINVAL;
2067 		}
2068 
2069 		q->index = i;
2070 		q->cxt = &((base_cxt + i)->eth);
2071 		q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2072 
2073 		DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2074 		   vf->abs_vfid, i, q->index, q->cid, q->cxt);
2075 
2076 		/* init SP objects */
2077 		bnx2x_vfq_init(bp, vf, q);
2078 	}
2079 	vf->state = VF_ACQUIRED;
2080 	return 0;
2081 }
2082 
2083 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2084 {
2085 	struct bnx2x_func_init_params func_init = {0};
2086 	int i;
2087 
2088 	/* the sb resources are initialized at this point, do the
2089 	 * FW/HW initializations
2090 	 */
2091 	for_each_vf_sb(vf, i)
2092 		bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2093 			      vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2094 
2095 	/* Sanity checks */
2096 	if (vf->state != VF_ACQUIRED) {
2097 		DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2098 		   vf->abs_vfid, vf->state);
2099 		return -EINVAL;
2100 	}
2101 
2102 	/* let FLR complete ... */
2103 	msleep(100);
2104 
2105 	/* FLR cleanup epilogue */
2106 	if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2107 		return -EBUSY;
2108 
2109 	/* reset IGU VF statistics: MSIX */
2110 	REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2111 
2112 	/* function setup */
2113 	func_init.pf_id = BP_FUNC(bp);
2114 	func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2115 	bnx2x_func_init(bp, &func_init);
2116 
2117 	/* Enable the vf */
2118 	bnx2x_vf_enable_access(bp, vf->abs_vfid);
2119 	bnx2x_vf_enable_traffic(bp, vf);
2120 
2121 	/* queue protection table */
2122 	for_each_vfq(vf, i)
2123 		bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2124 				    vfq_qzone_id(vf, vfq_get(vf, i)), true);
2125 
2126 	vf->state = VF_ENABLED;
2127 
2128 	/* update vf bulletin board */
2129 	bnx2x_post_vf_bulletin(bp, vf->index);
2130 
2131 	return 0;
2132 }
2133 
2134 struct set_vf_state_cookie {
2135 	struct bnx2x_virtf *vf;
2136 	u8 state;
2137 };
2138 
2139 static void bnx2x_set_vf_state(void *cookie)
2140 {
2141 	struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2142 
2143 	p->vf->state = p->state;
2144 }
2145 
2146 int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2147 {
2148 	int rc = 0, i;
2149 
2150 	DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2151 
2152 	/* Close all queues */
2153 	for (i = 0; i < vf_rxq_count(vf); i++) {
2154 		rc = bnx2x_vf_queue_teardown(bp, vf, i);
2155 		if (rc)
2156 			goto op_err;
2157 	}
2158 
2159 	/* disable the interrupts */
2160 	DP(BNX2X_MSG_IOV, "disabling igu\n");
2161 	bnx2x_vf_igu_disable(bp, vf);
2162 
2163 	/* disable the VF */
2164 	DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2165 	bnx2x_vf_clr_qtbl(bp, vf);
2166 
2167 	/* need to make sure there are no outstanding stats ramrods which may
2168 	 * cause the device to access the VF's stats buffer which it will free
2169 	 * as soon as we return from the close flow.
2170 	 */
2171 	{
2172 		struct set_vf_state_cookie cookie;
2173 
2174 		cookie.vf = vf;
2175 		cookie.state = VF_ACQUIRED;
2176 		rc = bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2177 		if (rc)
2178 			goto op_err;
2179 	}
2180 
2181 	DP(BNX2X_MSG_IOV, "set state to acquired\n");
2182 
2183 	return 0;
2184 op_err:
2185 	BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);
2186 	return rc;
2187 }
2188 
2189 /* VF release can be called either: 1. The VF was acquired but
2190  * not enabled 2. the vf was enabled or in the process of being
2191  * enabled
2192  */
2193 int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)
2194 {
2195 	int rc;
2196 
2197 	DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2198 	   vf->state == VF_FREE ? "Free" :
2199 	   vf->state == VF_ACQUIRED ? "Acquired" :
2200 	   vf->state == VF_ENABLED ? "Enabled" :
2201 	   vf->state == VF_RESET ? "Reset" :
2202 	   "Unknown");
2203 
2204 	switch (vf->state) {
2205 	case VF_ENABLED:
2206 		rc = bnx2x_vf_close(bp, vf);
2207 		if (rc)
2208 			goto op_err;
2209 		fallthrough;	/* to release resources */
2210 	case VF_ACQUIRED:
2211 		DP(BNX2X_MSG_IOV, "about to free resources\n");
2212 		bnx2x_vf_free_resc(bp, vf);
2213 		break;
2214 
2215 	case VF_FREE:
2216 	case VF_RESET:
2217 	default:
2218 		break;
2219 	}
2220 	return 0;
2221 op_err:
2222 	BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);
2223 	return rc;
2224 }
2225 
2226 int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2227 			struct bnx2x_config_rss_params *rss)
2228 {
2229 	DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2230 	set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);
2231 	return bnx2x_config_rss(bp, rss);
2232 }
2233 
2234 int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2235 			struct vfpf_tpa_tlv *tlv,
2236 			struct bnx2x_queue_update_tpa_params *params)
2237 {
2238 	aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;
2239 	struct bnx2x_queue_state_params qstate;
2240 	int qid, rc = 0;
2241 
2242 	DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2243 
2244 	/* Set ramrod params */
2245 	memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
2246 	memcpy(&qstate.params.update_tpa, params,
2247 	       sizeof(struct bnx2x_queue_update_tpa_params));
2248 	qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;
2249 	set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
2250 
2251 	for (qid = 0; qid < vf_rxq_count(vf); qid++) {
2252 		qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2253 		qstate.params.update_tpa.sge_map = sge_addr[qid];
2254 		DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",
2255 		   vf->abs_vfid, qid, U64_HI(sge_addr[qid]),
2256 		   U64_LO(sge_addr[qid]));
2257 		rc = bnx2x_queue_state_change(bp, &qstate);
2258 		if (rc) {
2259 			BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",
2260 				  U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),
2261 				  vf->abs_vfid, qid);
2262 			return rc;
2263 		}
2264 	}
2265 
2266 	return rc;
2267 }
2268 
2269 /* VF release ~ VF close + VF release-resources
2270  * Release is the ultimate SW shutdown and is called whenever an
2271  * irrecoverable error is encountered.
2272  */
2273 int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2274 {
2275 	int rc;
2276 
2277 	DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
2278 	bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2279 
2280 	rc = bnx2x_vf_free(bp, vf);
2281 	if (rc)
2282 		WARN(rc,
2283 		     "VF[%d] Failed to allocate resources for release op- rc=%d\n",
2284 		     vf->abs_vfid, rc);
2285 	bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2286 	return rc;
2287 }
2288 
2289 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2290 			      enum channel_tlvs tlv)
2291 {
2292 	/* we don't lock the channel for unsupported tlvs */
2293 	if (!bnx2x_tlv_supported(tlv)) {
2294 		BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
2295 		return;
2296 	}
2297 
2298 	/* lock the channel */
2299 	mutex_lock(&vf->op_mutex);
2300 
2301 	/* record the locking op */
2302 	vf->op_current = tlv;
2303 
2304 	/* log the lock */
2305 	DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
2306 	   vf->abs_vfid, tlv);
2307 }
2308 
2309 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2310 				enum channel_tlvs expected_tlv)
2311 {
2312 	enum channel_tlvs current_tlv;
2313 
2314 	if (!vf) {
2315 		BNX2X_ERR("VF was %p\n", vf);
2316 		return;
2317 	}
2318 
2319 	current_tlv = vf->op_current;
2320 
2321 	/* we don't unlock the channel for unsupported tlvs */
2322 	if (!bnx2x_tlv_supported(expected_tlv))
2323 		return;
2324 
2325 	WARN(expected_tlv != vf->op_current,
2326 	     "lock mismatch: expected %d found %d", expected_tlv,
2327 	     vf->op_current);
2328 
2329 	/* record the locking op */
2330 	vf->op_current = CHANNEL_TLV_NONE;
2331 
2332 	/* lock the channel */
2333 	mutex_unlock(&vf->op_mutex);
2334 
2335 	/* log the unlock */
2336 	DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
2337 	   vf->abs_vfid, current_tlv);
2338 }
2339 
2340 static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
2341 {
2342 	struct bnx2x_queue_state_params q_params;
2343 	u32 prev_flags;
2344 	int i, rc;
2345 
2346 	/* Verify changes are needed and record current Tx switching state */
2347 	prev_flags = bp->flags;
2348 	if (enable)
2349 		bp->flags |= TX_SWITCHING;
2350 	else
2351 		bp->flags &= ~TX_SWITCHING;
2352 	if (prev_flags == bp->flags)
2353 		return 0;
2354 
2355 	/* Verify state enables the sending of queue ramrods */
2356 	if ((bp->state != BNX2X_STATE_OPEN) ||
2357 	    (bnx2x_get_q_logical_state(bp,
2358 				      &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
2359 	     BNX2X_Q_LOGICAL_STATE_ACTIVE))
2360 		return 0;
2361 
2362 	/* send q. update ramrod to configure Tx switching */
2363 	memset(&q_params, 0, sizeof(q_params));
2364 	__set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2365 	q_params.cmd = BNX2X_Q_CMD_UPDATE;
2366 	__set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
2367 		  &q_params.params.update.update_flags);
2368 	if (enable)
2369 		__set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2370 			  &q_params.params.update.update_flags);
2371 	else
2372 		__clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2373 			    &q_params.params.update.update_flags);
2374 
2375 	/* send the ramrod on all the queues of the PF */
2376 	for_each_eth_queue(bp, i) {
2377 		struct bnx2x_fastpath *fp = &bp->fp[i];
2378 		int tx_idx;
2379 
2380 		/* Set the appropriate Queue object */
2381 		q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
2382 
2383 		for (tx_idx = FIRST_TX_COS_INDEX;
2384 		     tx_idx < fp->max_cos; tx_idx++) {
2385 			q_params.params.update.cid_index = tx_idx;
2386 
2387 			/* Update the Queue state */
2388 			rc = bnx2x_queue_state_change(bp, &q_params);
2389 			if (rc) {
2390 				BNX2X_ERR("Failed to configure Tx switching\n");
2391 				return rc;
2392 			}
2393 		}
2394 	}
2395 
2396 	DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
2397 	return 0;
2398 }
2399 
2400 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
2401 {
2402 	struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
2403 
2404 	if (!IS_SRIOV(bp)) {
2405 		BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
2406 		return -EINVAL;
2407 	}
2408 
2409 	DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
2410 	   num_vfs_param, BNX2X_NR_VIRTFN(bp));
2411 
2412 	/* HW channel is only operational when PF is up */
2413 	if (bp->state != BNX2X_STATE_OPEN) {
2414 		BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
2415 		return -EINVAL;
2416 	}
2417 
2418 	/* we are always bound by the total_vfs in the configuration space */
2419 	if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
2420 		BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
2421 			  num_vfs_param, BNX2X_NR_VIRTFN(bp));
2422 		num_vfs_param = BNX2X_NR_VIRTFN(bp);
2423 	}
2424 
2425 	bp->requested_nr_virtfn = num_vfs_param;
2426 	if (num_vfs_param == 0) {
2427 		bnx2x_set_pf_tx_switching(bp, false);
2428 		bnx2x_disable_sriov(bp);
2429 		return 0;
2430 	} else {
2431 		return bnx2x_enable_sriov(bp);
2432 	}
2433 }
2434 
2435 #define IGU_ENTRY_SIZE 4
2436 
2437 int bnx2x_enable_sriov(struct bnx2x *bp)
2438 {
2439 	int rc = 0, req_vfs = bp->requested_nr_virtfn;
2440 	int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
2441 	u32 igu_entry, address;
2442 	u16 num_vf_queues;
2443 
2444 	if (req_vfs == 0)
2445 		return 0;
2446 
2447 	first_vf = bp->vfdb->sriov.first_vf_in_pf;
2448 
2449 	/* statically distribute vf sb pool between VFs */
2450 	num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
2451 			      BP_VFDB(bp)->vf_sbs_pool / req_vfs);
2452 
2453 	/* zero previous values learned from igu cam */
2454 	for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
2455 		struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2456 
2457 		vf->sb_count = 0;
2458 		vf_sb_count(BP_VF(bp, vf_idx)) = 0;
2459 	}
2460 	bp->vfdb->vf_sbs_pool = 0;
2461 
2462 	/* prepare IGU cam */
2463 	sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
2464 	address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
2465 	for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2466 		for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
2467 			igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
2468 				vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
2469 				IGU_REG_MAPPING_MEMORY_VALID;
2470 			DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
2471 			   sb_idx, vf_idx);
2472 			REG_WR(bp, address, igu_entry);
2473 			sb_idx++;
2474 			address += IGU_ENTRY_SIZE;
2475 		}
2476 	}
2477 
2478 	/* Reinitialize vf database according to igu cam */
2479 	bnx2x_get_vf_igu_cam_info(bp);
2480 
2481 	DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
2482 	   BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
2483 
2484 	qcount = 0;
2485 	for_each_vf(bp, vf_idx) {
2486 		struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2487 
2488 		/* set local queue arrays */
2489 		vf->vfqs = &bp->vfdb->vfqs[qcount];
2490 		qcount += vf_sb_count(vf);
2491 		bnx2x_iov_static_resc(bp, vf);
2492 	}
2493 
2494 	/* prepare msix vectors in VF configuration space - the value in the
2495 	 * PCI configuration space should be the index of the last entry,
2496 	 * namely one less than the actual size of the table
2497 	 */
2498 	for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2499 		bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
2500 		REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
2501 		       num_vf_queues - 1);
2502 		DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
2503 		   vf_idx, num_vf_queues - 1);
2504 	}
2505 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2506 
2507 	/* enable sriov. This will probe all the VFs, and consequentially cause
2508 	 * the "acquire" messages to appear on the VF PF channel.
2509 	 */
2510 	DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
2511 	bnx2x_disable_sriov(bp);
2512 
2513 	rc = bnx2x_set_pf_tx_switching(bp, true);
2514 	if (rc)
2515 		return rc;
2516 
2517 	rc = pci_enable_sriov(bp->pdev, req_vfs);
2518 	if (rc) {
2519 		BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
2520 		return rc;
2521 	}
2522 	DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
2523 	return req_vfs;
2524 }
2525 
2526 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
2527 {
2528 	int vfidx;
2529 	struct pf_vf_bulletin_content *bulletin;
2530 
2531 	DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
2532 	for_each_vf(bp, vfidx) {
2533 		bulletin = BP_VF_BULLETIN(bp, vfidx);
2534 		if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2535 			bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0,
2536 					  htons(ETH_P_8021Q));
2537 	}
2538 }
2539 
2540 void bnx2x_disable_sriov(struct bnx2x *bp)
2541 {
2542 	if (pci_vfs_assigned(bp->pdev)) {
2543 		DP(BNX2X_MSG_IOV,
2544 		   "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2545 		return;
2546 	}
2547 
2548 	pci_disable_sriov(bp->pdev);
2549 }
2550 
2551 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
2552 			    struct bnx2x_virtf **vf,
2553 			    struct pf_vf_bulletin_content **bulletin,
2554 			    bool test_queue)
2555 {
2556 	if (bp->state != BNX2X_STATE_OPEN) {
2557 		BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");
2558 		return -EINVAL;
2559 	}
2560 
2561 	if (!IS_SRIOV(bp)) {
2562 		BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");
2563 		return -EINVAL;
2564 	}
2565 
2566 	if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
2567 		BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
2568 			  vfidx, BNX2X_NR_VIRTFN(bp));
2569 		return -EINVAL;
2570 	}
2571 
2572 	/* init members */
2573 	*vf = BP_VF(bp, vfidx);
2574 	*bulletin = BP_VF_BULLETIN(bp, vfidx);
2575 
2576 	if (!*vf) {
2577 		BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);
2578 		return -EINVAL;
2579 	}
2580 
2581 	if (test_queue && !(*vf)->vfqs) {
2582 		BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",
2583 			  vfidx);
2584 		return -EINVAL;
2585 	}
2586 
2587 	if (!*bulletin) {
2588 		BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",
2589 			  vfidx);
2590 		return -EINVAL;
2591 	}
2592 
2593 	return 0;
2594 }
2595 
2596 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
2597 			struct ifla_vf_info *ivi)
2598 {
2599 	struct bnx2x *bp = netdev_priv(dev);
2600 	struct bnx2x_virtf *vf = NULL;
2601 	struct pf_vf_bulletin_content *bulletin = NULL;
2602 	struct bnx2x_vlan_mac_obj *mac_obj;
2603 	struct bnx2x_vlan_mac_obj *vlan_obj;
2604 	int rc;
2605 
2606 	/* sanity and init */
2607 	rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2608 	if (rc)
2609 		return rc;
2610 
2611 	mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2612 	vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2613 	if (!mac_obj || !vlan_obj) {
2614 		BNX2X_ERR("VF partially initialized\n");
2615 		return -EINVAL;
2616 	}
2617 
2618 	ivi->vf = vfidx;
2619 	ivi->qos = 0;
2620 	ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */
2621 	ivi->min_tx_rate = 0;
2622 	ivi->spoofchk = vf->spoofchk ? 1 : 0;
2623 	ivi->linkstate = vf->link_cfg;
2624 	if (vf->state == VF_ENABLED) {
2625 		/* mac and vlan are in vlan_mac objects */
2626 		if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {
2627 			mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
2628 						0, ETH_ALEN);
2629 			vlan_obj->get_n_elements(bp, vlan_obj, 1,
2630 						 (u8 *)&ivi->vlan, 0,
2631 						 VLAN_HLEN);
2632 		}
2633 	} else {
2634 		mutex_lock(&bp->vfdb->bulletin_mutex);
2635 		/* mac */
2636 		if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
2637 			/* mac configured by ndo so its in bulletin board */
2638 			memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
2639 		else
2640 			/* function has not been loaded yet. Show mac as 0s */
2641 			eth_zero_addr(ivi->mac);
2642 
2643 		/* vlan */
2644 		if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2645 			/* vlan configured by ndo so its in bulletin board */
2646 			memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
2647 		else
2648 			/* function has not been loaded yet. Show vlans as 0s */
2649 			memset(&ivi->vlan, 0, VLAN_HLEN);
2650 
2651 		mutex_unlock(&bp->vfdb->bulletin_mutex);
2652 	}
2653 
2654 	return 0;
2655 }
2656 
2657 /* New mac for VF. Consider these cases:
2658  * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
2659  *    supply at acquire.
2660  * 2. VF has already been acquired but has not yet initialized - store in local
2661  *    bulletin board. mac will be posted on VF bulletin board after VF init. VF
2662  *    will configure this mac when it is ready.
2663  * 3. VF has already initialized but has not yet setup a queue - post the new
2664  *    mac on VF's bulletin board right now. VF will configure this mac when it
2665  *    is ready.
2666  * 4. VF has already set a queue - delete any macs already configured for this
2667  *    queue and manually config the new mac.
2668  * In any event, once this function has been called refuse any attempts by the
2669  * VF to configure any mac for itself except for this mac. In case of a race
2670  * where the VF fails to see the new post on its bulletin board before sending a
2671  * mac configuration request, the PF will simply fail the request and VF can try
2672  * again after consulting its bulletin board.
2673  */
2674 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
2675 {
2676 	struct bnx2x *bp = netdev_priv(dev);
2677 	int rc, q_logical_state;
2678 	struct bnx2x_virtf *vf = NULL;
2679 	struct pf_vf_bulletin_content *bulletin = NULL;
2680 
2681 	if (!is_valid_ether_addr(mac)) {
2682 		BNX2X_ERR("mac address invalid\n");
2683 		return -EINVAL;
2684 	}
2685 
2686 	/* sanity and init */
2687 	rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2688 	if (rc)
2689 		return rc;
2690 
2691 	mutex_lock(&bp->vfdb->bulletin_mutex);
2692 
2693 	/* update PF's copy of the VF's bulletin. Will no longer accept mac
2694 	 * configuration requests from vf unless match this mac
2695 	 */
2696 	bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
2697 	memcpy(bulletin->mac, mac, ETH_ALEN);
2698 
2699 	/* Post update on VF's bulletin board */
2700 	rc = bnx2x_post_vf_bulletin(bp, vfidx);
2701 
2702 	/* release lock before checking return code */
2703 	mutex_unlock(&bp->vfdb->bulletin_mutex);
2704 
2705 	if (rc) {
2706 		BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2707 		return rc;
2708 	}
2709 
2710 	q_logical_state =
2711 		bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
2712 	if (vf->state == VF_ENABLED &&
2713 	    q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
2714 		/* configure the mac in device on this vf's queue */
2715 		unsigned long ramrod_flags = 0;
2716 		struct bnx2x_vlan_mac_obj *mac_obj;
2717 
2718 		/* User should be able to see failure reason in system logs */
2719 		if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2720 			return -EINVAL;
2721 
2722 		/* must lock vfpf channel to protect against vf flows */
2723 		bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2724 
2725 		/* remove existing eth macs */
2726 		mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2727 		rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
2728 		if (rc) {
2729 			BNX2X_ERR("failed to delete eth macs\n");
2730 			rc = -EINVAL;
2731 			goto out;
2732 		}
2733 
2734 		/* remove existing uc list macs */
2735 		rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
2736 		if (rc) {
2737 			BNX2X_ERR("failed to delete uc_list macs\n");
2738 			rc = -EINVAL;
2739 			goto out;
2740 		}
2741 
2742 		/* configure the new mac to device */
2743 		__set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2744 		bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
2745 				  BNX2X_ETH_MAC, &ramrod_flags);
2746 
2747 out:
2748 		bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2749 	}
2750 
2751 	return rc;
2752 }
2753 
2754 static void bnx2x_set_vf_vlan_acceptance(struct bnx2x *bp,
2755 					 struct bnx2x_virtf *vf, bool accept)
2756 {
2757 	struct bnx2x_rx_mode_ramrod_params rx_ramrod;
2758 	unsigned long accept_flags;
2759 
2760 	/* need to remove/add the VF's accept_any_vlan bit */
2761 	accept_flags = bnx2x_leading_vfq(vf, accept_flags);
2762 	if (accept)
2763 		set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2764 	else
2765 		clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2766 
2767 	bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
2768 			      accept_flags);
2769 	bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
2770 	bnx2x_config_rx_mode(bp, &rx_ramrod);
2771 }
2772 
2773 static int bnx2x_set_vf_vlan_filter(struct bnx2x *bp, struct bnx2x_virtf *vf,
2774 				    u16 vlan, bool add)
2775 {
2776 	struct bnx2x_vlan_mac_ramrod_params ramrod_param;
2777 	unsigned long ramrod_flags = 0;
2778 	int rc = 0;
2779 
2780 	/* configure the new vlan to device */
2781 	memset(&ramrod_param, 0, sizeof(ramrod_param));
2782 	__set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2783 	ramrod_param.vlan_mac_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2784 	ramrod_param.ramrod_flags = ramrod_flags;
2785 	ramrod_param.user_req.u.vlan.vlan = vlan;
2786 	ramrod_param.user_req.cmd = add ? BNX2X_VLAN_MAC_ADD
2787 					: BNX2X_VLAN_MAC_DEL;
2788 	rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
2789 	if (rc) {
2790 		BNX2X_ERR("failed to configure vlan\n");
2791 		return -EINVAL;
2792 	}
2793 
2794 	return 0;
2795 }
2796 
2797 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos,
2798 		      __be16 vlan_proto)
2799 {
2800 	struct pf_vf_bulletin_content *bulletin = NULL;
2801 	struct bnx2x *bp = netdev_priv(dev);
2802 	struct bnx2x_vlan_mac_obj *vlan_obj;
2803 	unsigned long vlan_mac_flags = 0;
2804 	unsigned long ramrod_flags = 0;
2805 	struct bnx2x_virtf *vf = NULL;
2806 	int i, rc;
2807 
2808 	if (vlan > 4095) {
2809 		BNX2X_ERR("illegal vlan value %d\n", vlan);
2810 		return -EINVAL;
2811 	}
2812 
2813 	if (vlan_proto != htons(ETH_P_8021Q))
2814 		return -EPROTONOSUPPORT;
2815 
2816 	DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
2817 	   vfidx, vlan, 0);
2818 
2819 	/* sanity and init */
2820 	rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2821 	if (rc)
2822 		return rc;
2823 
2824 	/* update PF's copy of the VF's bulletin. No point in posting the vlan
2825 	 * to the VF since it doesn't have anything to do with it. But it useful
2826 	 * to store it here in case the VF is not up yet and we can only
2827 	 * configure the vlan later when it does. Treat vlan id 0 as remove the
2828 	 * Host tag.
2829 	 */
2830 	mutex_lock(&bp->vfdb->bulletin_mutex);
2831 
2832 	if (vlan > 0)
2833 		bulletin->valid_bitmap |= 1 << VLAN_VALID;
2834 	else
2835 		bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
2836 	bulletin->vlan = vlan;
2837 
2838 	/* Post update on VF's bulletin board */
2839 	rc = bnx2x_post_vf_bulletin(bp, vfidx);
2840 	if (rc)
2841 		BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2842 	mutex_unlock(&bp->vfdb->bulletin_mutex);
2843 
2844 	/* is vf initialized and queue set up? */
2845 	if (vf->state != VF_ENABLED ||
2846 	    bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2847 	    BNX2X_Q_LOGICAL_STATE_ACTIVE)
2848 		return rc;
2849 
2850 	/* User should be able to see error in system logs */
2851 	if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2852 		return -EINVAL;
2853 
2854 	/* must lock vfpf channel to protect against vf flows */
2855 	bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2856 
2857 	/* remove existing vlans */
2858 	__set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2859 	vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2860 	rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
2861 				  &ramrod_flags);
2862 	if (rc) {
2863 		BNX2X_ERR("failed to delete vlans\n");
2864 		rc = -EINVAL;
2865 		goto out;
2866 	}
2867 
2868 	/* clear accept_any_vlan when HV forces vlan, otherwise
2869 	 * according to VF capabilities
2870 	 */
2871 	if (vlan || !(vf->cfg_flags & VF_CFG_VLAN_FILTER))
2872 		bnx2x_set_vf_vlan_acceptance(bp, vf, !vlan);
2873 
2874 	rc = bnx2x_set_vf_vlan_filter(bp, vf, vlan, true);
2875 	if (rc)
2876 		goto out;
2877 
2878 	/* send queue update ramrods to configure default vlan and
2879 	 * silent vlan removal
2880 	 */
2881 	for_each_vfq(vf, i) {
2882 		struct bnx2x_queue_state_params q_params = {NULL};
2883 		struct bnx2x_queue_update_params *update_params;
2884 
2885 		q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
2886 
2887 		/* validate the Q is UP */
2888 		if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
2889 		    BNX2X_Q_LOGICAL_STATE_ACTIVE)
2890 			continue;
2891 
2892 		__set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2893 		q_params.cmd = BNX2X_Q_CMD_UPDATE;
2894 		update_params = &q_params.params.update;
2895 		__set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
2896 			  &update_params->update_flags);
2897 		__set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
2898 			  &update_params->update_flags);
2899 		if (vlan == 0) {
2900 			/* if vlan is 0 then we want to leave the VF traffic
2901 			 * untagged, and leave the incoming traffic untouched
2902 			 * (i.e. do not remove any vlan tags).
2903 			 */
2904 			__clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2905 				    &update_params->update_flags);
2906 			__clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2907 				    &update_params->update_flags);
2908 		} else {
2909 			/* configure default vlan to vf queue and set silent
2910 			 * vlan removal (the vf remains unaware of this vlan).
2911 			 */
2912 			__set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2913 				  &update_params->update_flags);
2914 			__set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2915 				  &update_params->update_flags);
2916 			update_params->def_vlan = vlan;
2917 			update_params->silent_removal_value =
2918 				vlan & VLAN_VID_MASK;
2919 			update_params->silent_removal_mask = VLAN_VID_MASK;
2920 		}
2921 
2922 		/* Update the Queue state */
2923 		rc = bnx2x_queue_state_change(bp, &q_params);
2924 		if (rc) {
2925 			BNX2X_ERR("Failed to configure default VLAN queue %d\n",
2926 				  i);
2927 			goto out;
2928 		}
2929 	}
2930 out:
2931 	bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2932 
2933 	if (rc)
2934 		DP(BNX2X_MSG_IOV,
2935 		   "updated VF[%d] vlan configuration (vlan = %d)\n",
2936 		   vfidx, vlan);
2937 
2938 	return rc;
2939 }
2940 
2941 int bnx2x_set_vf_spoofchk(struct net_device *dev, int idx, bool val)
2942 {
2943 	struct bnx2x *bp = netdev_priv(dev);
2944 	struct bnx2x_virtf *vf;
2945 	int i, rc = 0;
2946 
2947 	vf = BP_VF(bp, idx);
2948 	if (!vf)
2949 		return -EINVAL;
2950 
2951 	/* nothing to do */
2952 	if (vf->spoofchk == val)
2953 		return 0;
2954 
2955 	vf->spoofchk = val ? 1 : 0;
2956 
2957 	DP(BNX2X_MSG_IOV, "%s spoofchk for VF %d\n",
2958 	   val ? "enabling" : "disabling", idx);
2959 
2960 	/* is vf initialized and queue set up? */
2961 	if (vf->state != VF_ENABLED ||
2962 	    bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2963 	    BNX2X_Q_LOGICAL_STATE_ACTIVE)
2964 		return rc;
2965 
2966 	/* User should be able to see error in system logs */
2967 	if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2968 		return -EINVAL;
2969 
2970 	/* send queue update ramrods to configure spoofchk */
2971 	for_each_vfq(vf, i) {
2972 		struct bnx2x_queue_state_params q_params = {NULL};
2973 		struct bnx2x_queue_update_params *update_params;
2974 
2975 		q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
2976 
2977 		/* validate the Q is UP */
2978 		if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
2979 		    BNX2X_Q_LOGICAL_STATE_ACTIVE)
2980 			continue;
2981 
2982 		__set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2983 		q_params.cmd = BNX2X_Q_CMD_UPDATE;
2984 		update_params = &q_params.params.update;
2985 		__set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
2986 			  &update_params->update_flags);
2987 		if (val) {
2988 			__set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,
2989 				  &update_params->update_flags);
2990 		} else {
2991 			__clear_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,
2992 				    &update_params->update_flags);
2993 		}
2994 
2995 		/* Update the Queue state */
2996 		rc = bnx2x_queue_state_change(bp, &q_params);
2997 		if (rc) {
2998 			BNX2X_ERR("Failed to %s spoofchk on VF %d - vfq %d\n",
2999 				  val ? "enable" : "disable", idx, i);
3000 			goto out;
3001 		}
3002 	}
3003 out:
3004 	if (!rc)
3005 		DP(BNX2X_MSG_IOV,
3006 		   "%s spoofchk for VF[%d]\n", val ? "Enabled" : "Disabled",
3007 		   idx);
3008 
3009 	return rc;
3010 }
3011 
3012 /* crc is the first field in the bulletin board. Compute the crc over the
3013  * entire bulletin board excluding the crc field itself. Use the length field
3014  * as the Bulletin Board was posted by a PF with possibly a different version
3015  * from the vf which will sample it. Therefore, the length is computed by the
3016  * PF and then used blindly by the VF.
3017  */
3018 u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)
3019 {
3020 	return crc32(BULLETIN_CRC_SEED,
3021 		 ((u8 *)bulletin) + sizeof(bulletin->crc),
3022 		 bulletin->length - sizeof(bulletin->crc));
3023 }
3024 
3025 /* Check for new posts on the bulletin board */
3026 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
3027 {
3028 	struct pf_vf_bulletin_content *bulletin;
3029 	int attempts;
3030 
3031 	/* sampling structure in mid post may result with corrupted data
3032 	 * validate crc to ensure coherency.
3033 	 */
3034 	for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
3035 		u32 crc;
3036 
3037 		/* sample the bulletin board */
3038 		memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,
3039 		       sizeof(union pf_vf_bulletin));
3040 
3041 		crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);
3042 
3043 		if (bp->shadow_bulletin.content.crc == crc)
3044 			break;
3045 
3046 		BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
3047 			  bp->shadow_bulletin.content.crc, crc);
3048 	}
3049 
3050 	if (attempts >= BULLETIN_ATTEMPTS) {
3051 		BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
3052 			  attempts);
3053 		return PFVF_BULLETIN_CRC_ERR;
3054 	}
3055 	bulletin = &bp->shadow_bulletin.content;
3056 
3057 	/* bulletin board hasn't changed since last sample */
3058 	if (bp->old_bulletin.version == bulletin->version)
3059 		return PFVF_BULLETIN_UNCHANGED;
3060 
3061 	/* the mac address in bulletin board is valid and is new */
3062 	if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&
3063 	    !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {
3064 		/* update new mac to net device */
3065 		memcpy(bp->dev->dev_addr, bulletin->mac, ETH_ALEN);
3066 	}
3067 
3068 	if (bulletin->valid_bitmap & (1 << LINK_VALID)) {
3069 		DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",
3070 		   bulletin->link_speed, bulletin->link_flags);
3071 
3072 		bp->vf_link_vars.line_speed = bulletin->link_speed;
3073 		bp->vf_link_vars.link_report_flags = 0;
3074 		/* Link is down */
3075 		if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)
3076 			__set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
3077 				  &bp->vf_link_vars.link_report_flags);
3078 		/* Full DUPLEX */
3079 		if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)
3080 			__set_bit(BNX2X_LINK_REPORT_FD,
3081 				  &bp->vf_link_vars.link_report_flags);
3082 		/* Rx Flow Control is ON */
3083 		if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)
3084 			__set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
3085 				  &bp->vf_link_vars.link_report_flags);
3086 		/* Tx Flow Control is ON */
3087 		if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)
3088 			__set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
3089 				  &bp->vf_link_vars.link_report_flags);
3090 		__bnx2x_link_report(bp);
3091 	}
3092 
3093 	/* copy new bulletin board to bp */
3094 	memcpy(&bp->old_bulletin, bulletin,
3095 	       sizeof(struct pf_vf_bulletin_content));
3096 
3097 	return PFVF_BULLETIN_UPDATED;
3098 }
3099 
3100 void bnx2x_timer_sriov(struct bnx2x *bp)
3101 {
3102 	bnx2x_sample_bulletin(bp);
3103 
3104 	/* if channel is down we need to self destruct */
3105 	if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)
3106 		bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3107 				       BNX2X_MSG_IOV);
3108 }
3109 
3110 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3111 {
3112 	/* vf doorbells are embedded within the regview */
3113 	return bp->regview + PXP_VF_ADDR_DB_START;
3114 }
3115 
3116 void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
3117 {
3118 	BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3119 		       sizeof(struct bnx2x_vf_mbx_msg));
3120 	BNX2X_PCI_FREE(bp->pf2vf_bulletin, bp->pf2vf_bulletin_mapping,
3121 		       sizeof(union pf_vf_bulletin));
3122 }
3123 
3124 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3125 {
3126 	mutex_init(&bp->vf2pf_mutex);
3127 
3128 	/* allocate vf2pf mailbox for vf to pf channel */
3129 	bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,
3130 					 sizeof(struct bnx2x_vf_mbx_msg));
3131 	if (!bp->vf2pf_mbox)
3132 		goto alloc_mem_err;
3133 
3134 	/* allocate pf 2 vf bulletin board */
3135 	bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,
3136 					     sizeof(union pf_vf_bulletin));
3137 	if (!bp->pf2vf_bulletin)
3138 		goto alloc_mem_err;
3139 
3140 	bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);
3141 
3142 	return 0;
3143 
3144 alloc_mem_err:
3145 	bnx2x_vf_pci_dealloc(bp);
3146 	return -ENOMEM;
3147 }
3148 
3149 void bnx2x_iov_channel_down(struct bnx2x *bp)
3150 {
3151 	int vf_idx;
3152 	struct pf_vf_bulletin_content *bulletin;
3153 
3154 	if (!IS_SRIOV(bp))
3155 		return;
3156 
3157 	for_each_vf(bp, vf_idx) {
3158 		/* locate this VFs bulletin board and update the channel down
3159 		 * bit
3160 		 */
3161 		bulletin = BP_VF_BULLETIN(bp, vf_idx);
3162 		bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3163 
3164 		/* update vf bulletin board */
3165 		bnx2x_post_vf_bulletin(bp, vf_idx);
3166 	}
3167 }
3168 
3169 void bnx2x_iov_task(struct work_struct *work)
3170 {
3171 	struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);
3172 
3173 	if (!netif_running(bp->dev))
3174 		return;
3175 
3176 	if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,
3177 			       &bp->iov_task_state))
3178 		bnx2x_vf_handle_flr_event(bp);
3179 
3180 	if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,
3181 			       &bp->iov_task_state))
3182 		bnx2x_vf_mbx(bp);
3183 }
3184 
3185 void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)
3186 {
3187 	smp_mb__before_atomic();
3188 	set_bit(flag, &bp->iov_task_state);
3189 	smp_mb__after_atomic();
3190 	DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3191 	queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);
3192 }
3193