1 /* bnx2x_sriov.c: Broadcom Everest network driver.
2  *
3  * Copyright 2009-2013 Broadcom Corporation
4  *
5  * Unless you and Broadcom execute a separate written software license
6  * agreement governing use of this software, this software is licensed to you
7  * under the terms of the GNU General Public License version 2, available
8  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9  *
10  * Notwithstanding the above, under no circumstances may you combine this
11  * software in any way with any other Broadcom software provided under a
12  * license other than the GPL, without Broadcom's express prior written
13  * consent.
14  *
15  * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16  * Written by: Shmulik Ravid <shmulikr@broadcom.com>
17  *	       Ariel Elior <ariele@broadcom.com>
18  *
19  */
20 #include "bnx2x.h"
21 #include "bnx2x_init.h"
22 #include "bnx2x_cmn.h"
23 #include "bnx2x_sp.h"
24 #include <linux/crc32.h>
25 #include <linux/if_vlan.h>
26 
27 /* General service functions */
28 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
29 					 u16 pf_id)
30 {
31 	REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
32 		pf_id);
33 	REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
34 		pf_id);
35 	REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
36 		pf_id);
37 	REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
38 		pf_id);
39 }
40 
41 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
42 					u8 enable)
43 {
44 	REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
45 		enable);
46 	REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
47 		enable);
48 	REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
49 		enable);
50 	REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
51 		enable);
52 }
53 
54 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
55 {
56 	int idx;
57 
58 	for_each_vf(bp, idx)
59 		if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
60 			break;
61 	return idx;
62 }
63 
64 static
65 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
66 {
67 	u16 idx =  (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
68 	return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
69 }
70 
71 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
72 				u8 igu_sb_id, u8 segment, u16 index, u8 op,
73 				u8 update)
74 {
75 	/* acking a VF sb through the PF - use the GRC */
76 	u32 ctl;
77 	u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
78 	u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
79 	u32 func_encode = vf->abs_vfid;
80 	u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
81 	struct igu_regular cmd_data = {0};
82 
83 	cmd_data.sb_id_and_flags =
84 			((index << IGU_REGULAR_SB_INDEX_SHIFT) |
85 			 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
86 			 (update << IGU_REGULAR_BUPDATE_SHIFT) |
87 			 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
88 
89 	ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT		|
90 	      func_encode << IGU_CTRL_REG_FID_SHIFT		|
91 	      IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
92 
93 	DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
94 	   cmd_data.sb_id_and_flags, igu_addr_data);
95 	REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
96 	mmiowb();
97 	barrier();
98 
99 	DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
100 	   ctl, igu_addr_ctl);
101 	REG_WR(bp, igu_addr_ctl, ctl);
102 	mmiowb();
103 	barrier();
104 }
105 /* VFOP - VF slow-path operation support */
106 
107 #define BNX2X_VFOP_FILTER_ADD_CNT_MAX		0x10000
108 
109 /* VFOP operations states */
110 enum bnx2x_vfop_qctor_state {
111 	   BNX2X_VFOP_QCTOR_INIT,
112 	   BNX2X_VFOP_QCTOR_SETUP,
113 	   BNX2X_VFOP_QCTOR_INT_EN
114 };
115 
116 enum bnx2x_vfop_qdtor_state {
117 	   BNX2X_VFOP_QDTOR_HALT,
118 	   BNX2X_VFOP_QDTOR_TERMINATE,
119 	   BNX2X_VFOP_QDTOR_CFCDEL,
120 	   BNX2X_VFOP_QDTOR_DONE
121 };
122 
123 enum bnx2x_vfop_vlan_mac_state {
124 	   BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
125 	   BNX2X_VFOP_VLAN_MAC_CLEAR,
126 	   BNX2X_VFOP_VLAN_MAC_CHK_DONE,
127 	   BNX2X_VFOP_MAC_CONFIG_LIST,
128 	   BNX2X_VFOP_VLAN_CONFIG_LIST,
129 	   BNX2X_VFOP_VLAN_CONFIG_LIST_0
130 };
131 
132 enum bnx2x_vfop_qsetup_state {
133 	   BNX2X_VFOP_QSETUP_CTOR,
134 	   BNX2X_VFOP_QSETUP_VLAN0,
135 	   BNX2X_VFOP_QSETUP_DONE
136 };
137 
138 enum bnx2x_vfop_mcast_state {
139 	   BNX2X_VFOP_MCAST_DEL,
140 	   BNX2X_VFOP_MCAST_ADD,
141 	   BNX2X_VFOP_MCAST_CHK_DONE
142 };
143 enum bnx2x_vfop_qflr_state {
144 	   BNX2X_VFOP_QFLR_CLR_VLAN,
145 	   BNX2X_VFOP_QFLR_CLR_MAC,
146 	   BNX2X_VFOP_QFLR_TERMINATE,
147 	   BNX2X_VFOP_QFLR_DONE
148 };
149 
150 enum bnx2x_vfop_flr_state {
151 	   BNX2X_VFOP_FLR_QUEUES,
152 	   BNX2X_VFOP_FLR_HW
153 };
154 
155 enum bnx2x_vfop_close_state {
156 	   BNX2X_VFOP_CLOSE_QUEUES,
157 	   BNX2X_VFOP_CLOSE_HW
158 };
159 
160 enum bnx2x_vfop_rxmode_state {
161 	   BNX2X_VFOP_RXMODE_CONFIG,
162 	   BNX2X_VFOP_RXMODE_DONE
163 };
164 
165 enum bnx2x_vfop_qteardown_state {
166 	   BNX2X_VFOP_QTEARDOWN_RXMODE,
167 	   BNX2X_VFOP_QTEARDOWN_CLR_VLAN,
168 	   BNX2X_VFOP_QTEARDOWN_CLR_MAC,
169 	   BNX2X_VFOP_QTEARDOWN_QDTOR,
170 	   BNX2X_VFOP_QTEARDOWN_DONE
171 };
172 
173 enum bnx2x_vfop_rss_state {
174 	   BNX2X_VFOP_RSS_CONFIG,
175 	   BNX2X_VFOP_RSS_DONE
176 };
177 
178 #define bnx2x_vfop_reset_wq(vf)	atomic_set(&vf->op_in_progress, 0)
179 
180 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
181 			      struct bnx2x_queue_init_params *init_params,
182 			      struct bnx2x_queue_setup_params *setup_params,
183 			      u16 q_idx, u16 sb_idx)
184 {
185 	DP(BNX2X_MSG_IOV,
186 	   "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
187 	   vf->abs_vfid,
188 	   q_idx,
189 	   sb_idx,
190 	   init_params->tx.sb_cq_index,
191 	   init_params->tx.hc_rate,
192 	   setup_params->flags,
193 	   setup_params->txq_params.traffic_type);
194 }
195 
196 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
197 			    struct bnx2x_queue_init_params *init_params,
198 			    struct bnx2x_queue_setup_params *setup_params,
199 			    u16 q_idx, u16 sb_idx)
200 {
201 	struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
202 
203 	DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
204 	   "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
205 	   vf->abs_vfid,
206 	   q_idx,
207 	   sb_idx,
208 	   init_params->rx.sb_cq_index,
209 	   init_params->rx.hc_rate,
210 	   setup_params->gen_params.mtu,
211 	   rxq_params->buf_sz,
212 	   rxq_params->sge_buf_sz,
213 	   rxq_params->max_sges_pkt,
214 	   rxq_params->tpa_agg_sz,
215 	   setup_params->flags,
216 	   rxq_params->drop_flags,
217 	   rxq_params->cache_line_log);
218 }
219 
220 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
221 			   struct bnx2x_virtf *vf,
222 			   struct bnx2x_vf_queue *q,
223 			   struct bnx2x_vfop_qctor_params *p,
224 			   unsigned long q_type)
225 {
226 	struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
227 	struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
228 
229 	/* INIT */
230 
231 	/* Enable host coalescing in the transition to INIT state */
232 	if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
233 		__set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
234 
235 	if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
236 		__set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
237 
238 	/* FW SB ID */
239 	init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
240 	init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
241 
242 	/* context */
243 	init_p->cxts[0] = q->cxt;
244 
245 	/* SETUP */
246 
247 	/* Setup-op general parameters */
248 	setup_p->gen_params.spcl_id = vf->sp_cl_id;
249 	setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
250 
251 	/* Setup-op pause params:
252 	 * Nothing to do, the pause thresholds are set by default to 0 which
253 	 * effectively turns off the feature for this queue. We don't want
254 	 * one queue (VF) to interfering with another queue (another VF)
255 	 */
256 	if (vf->cfg_flags & VF_CFG_FW_FC)
257 		BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
258 			  vf->abs_vfid);
259 	/* Setup-op flags:
260 	 * collect statistics, zero statistics, local-switching, security,
261 	 * OV for Flex10, RSS and MCAST for leading
262 	 */
263 	if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
264 		__set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
265 
266 	/* for VFs, enable tx switching, bd coherency, and mac address
267 	 * anti-spoofing
268 	 */
269 	__set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
270 	__set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
271 	__set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
272 
273 	/* Setup-op rx parameters */
274 	if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
275 		struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
276 
277 		rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
278 		rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
279 		rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
280 
281 		if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
282 			rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
283 	}
284 
285 	/* Setup-op tx parameters */
286 	if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
287 		setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
288 		setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
289 	}
290 }
291 
292 /* VFOP queue construction */
293 static void bnx2x_vfop_qctor(struct bnx2x *bp, struct bnx2x_virtf *vf)
294 {
295 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
296 	struct bnx2x_vfop_args_qctor *args = &vfop->args.qctor;
297 	struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
298 	enum bnx2x_vfop_qctor_state state = vfop->state;
299 
300 	bnx2x_vfop_reset_wq(vf);
301 
302 	if (vfop->rc < 0)
303 		goto op_err;
304 
305 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
306 
307 	switch (state) {
308 	case BNX2X_VFOP_QCTOR_INIT:
309 
310 		/* has this queue already been opened? */
311 		if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
312 		    BNX2X_Q_LOGICAL_STATE_ACTIVE) {
313 			DP(BNX2X_MSG_IOV,
314 			   "Entered qctor but queue was already up. Aborting gracefully\n");
315 			goto op_done;
316 		}
317 
318 		/* next state */
319 		vfop->state = BNX2X_VFOP_QCTOR_SETUP;
320 
321 		q_params->cmd = BNX2X_Q_CMD_INIT;
322 		vfop->rc = bnx2x_queue_state_change(bp, q_params);
323 
324 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
325 
326 	case BNX2X_VFOP_QCTOR_SETUP:
327 		/* next state */
328 		vfop->state = BNX2X_VFOP_QCTOR_INT_EN;
329 
330 		/* copy pre-prepared setup params to the queue-state params */
331 		vfop->op_p->qctor.qstate.params.setup =
332 			vfop->op_p->qctor.prep_qsetup;
333 
334 		q_params->cmd = BNX2X_Q_CMD_SETUP;
335 		vfop->rc = bnx2x_queue_state_change(bp, q_params);
336 
337 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
338 
339 	case BNX2X_VFOP_QCTOR_INT_EN:
340 
341 		/* enable interrupts */
342 		bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, args->sb_idx),
343 				    USTORM_ID, 0, IGU_INT_ENABLE, 0);
344 		goto op_done;
345 	default:
346 		bnx2x_vfop_default(state);
347 	}
348 op_err:
349 	BNX2X_ERR("QCTOR[%d:%d] error: cmd %d, rc %d\n",
350 		  vf->abs_vfid, args->qid, q_params->cmd, vfop->rc);
351 op_done:
352 	bnx2x_vfop_end(bp, vf, vfop);
353 op_pending:
354 	return;
355 }
356 
357 static int bnx2x_vfop_qctor_cmd(struct bnx2x *bp,
358 				struct bnx2x_virtf *vf,
359 				struct bnx2x_vfop_cmd *cmd,
360 				int qid)
361 {
362 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
363 
364 	if (vfop) {
365 		vf->op_params.qctor.qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
366 
367 		vfop->args.qctor.qid = qid;
368 		vfop->args.qctor.sb_idx = bnx2x_vfq(vf, qid, sb_idx);
369 
370 		bnx2x_vfop_opset(BNX2X_VFOP_QCTOR_INIT,
371 				 bnx2x_vfop_qctor, cmd->done);
372 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qctor,
373 					     cmd->block);
374 	}
375 	return -ENOMEM;
376 }
377 
378 /* VFOP queue destruction */
379 static void bnx2x_vfop_qdtor(struct bnx2x *bp, struct bnx2x_virtf *vf)
380 {
381 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
382 	struct bnx2x_vfop_args_qdtor *qdtor = &vfop->args.qdtor;
383 	struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
384 	enum bnx2x_vfop_qdtor_state state = vfop->state;
385 
386 	bnx2x_vfop_reset_wq(vf);
387 
388 	if (vfop->rc < 0)
389 		goto op_err;
390 
391 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
392 
393 	switch (state) {
394 	case BNX2X_VFOP_QDTOR_HALT:
395 
396 		/* has this queue already been stopped? */
397 		if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
398 		    BNX2X_Q_LOGICAL_STATE_STOPPED) {
399 			DP(BNX2X_MSG_IOV,
400 			   "Entered qdtor but queue was already stopped. Aborting gracefully\n");
401 
402 			/* next state */
403 			vfop->state = BNX2X_VFOP_QDTOR_DONE;
404 
405 			bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
406 		}
407 
408 		/* next state */
409 		vfop->state = BNX2X_VFOP_QDTOR_TERMINATE;
410 
411 		q_params->cmd = BNX2X_Q_CMD_HALT;
412 		vfop->rc = bnx2x_queue_state_change(bp, q_params);
413 
414 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
415 
416 	case BNX2X_VFOP_QDTOR_TERMINATE:
417 		/* next state */
418 		vfop->state = BNX2X_VFOP_QDTOR_CFCDEL;
419 
420 		q_params->cmd = BNX2X_Q_CMD_TERMINATE;
421 		vfop->rc = bnx2x_queue_state_change(bp, q_params);
422 
423 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
424 
425 	case BNX2X_VFOP_QDTOR_CFCDEL:
426 		/* next state */
427 		vfop->state = BNX2X_VFOP_QDTOR_DONE;
428 
429 		q_params->cmd = BNX2X_Q_CMD_CFC_DEL;
430 		vfop->rc = bnx2x_queue_state_change(bp, q_params);
431 
432 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
433 op_err:
434 	BNX2X_ERR("QDTOR[%d:%d] error: cmd %d, rc %d\n",
435 		  vf->abs_vfid, qdtor->qid, q_params->cmd, vfop->rc);
436 op_done:
437 	case BNX2X_VFOP_QDTOR_DONE:
438 		/* invalidate the context */
439 		if (qdtor->cxt) {
440 			qdtor->cxt->ustorm_ag_context.cdu_usage = 0;
441 			qdtor->cxt->xstorm_ag_context.cdu_reserved = 0;
442 		}
443 		bnx2x_vfop_end(bp, vf, vfop);
444 		return;
445 	default:
446 		bnx2x_vfop_default(state);
447 	}
448 op_pending:
449 	return;
450 }
451 
452 static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp,
453 				struct bnx2x_virtf *vf,
454 				struct bnx2x_vfop_cmd *cmd,
455 				int qid)
456 {
457 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
458 
459 	if (vfop) {
460 		struct bnx2x_queue_state_params *qstate =
461 			&vf->op_params.qctor.qstate;
462 
463 		memset(qstate, 0, sizeof(*qstate));
464 		qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
465 
466 		vfop->args.qdtor.qid = qid;
467 		vfop->args.qdtor.cxt = bnx2x_vfq(vf, qid, cxt);
468 
469 		bnx2x_vfop_opset(BNX2X_VFOP_QDTOR_HALT,
470 				 bnx2x_vfop_qdtor, cmd->done);
471 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor,
472 					     cmd->block);
473 	} else {
474 		BNX2X_ERR("VF[%d] failed to add a vfop\n", vf->abs_vfid);
475 		return -ENOMEM;
476 	}
477 }
478 
479 static void
480 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
481 {
482 	struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
483 	if (vf) {
484 		/* the first igu entry belonging to VFs of this PF */
485 		if (!BP_VFDB(bp)->first_vf_igu_entry)
486 			BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
487 
488 		/* the first igu entry belonging to this VF */
489 		if (!vf_sb_count(vf))
490 			vf->igu_base_id = igu_sb_id;
491 
492 		++vf_sb_count(vf);
493 		++vf->sb_count;
494 	}
495 	BP_VFDB(bp)->vf_sbs_pool++;
496 }
497 
498 /* VFOP MAC/VLAN helpers */
499 static inline void bnx2x_vfop_credit(struct bnx2x *bp,
500 				     struct bnx2x_vfop *vfop,
501 				     struct bnx2x_vlan_mac_obj *obj)
502 {
503 	struct bnx2x_vfop_args_filters *args = &vfop->args.filters;
504 
505 	/* update credit only if there is no error
506 	 * and a valid credit counter
507 	 */
508 	if (!vfop->rc && args->credit) {
509 		struct list_head *pos;
510 		int read_lock;
511 		int cnt = 0;
512 
513 		read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
514 		if (read_lock)
515 			DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
516 
517 		list_for_each(pos, &obj->head)
518 			cnt++;
519 
520 		if (!read_lock)
521 			bnx2x_vlan_mac_h_read_unlock(bp, obj);
522 
523 		atomic_set(args->credit, cnt);
524 	}
525 }
526 
527 static int bnx2x_vfop_set_user_req(struct bnx2x *bp,
528 				    struct bnx2x_vfop_filter *pos,
529 				    struct bnx2x_vlan_mac_data *user_req)
530 {
531 	user_req->cmd = pos->add ? BNX2X_VLAN_MAC_ADD :
532 		BNX2X_VLAN_MAC_DEL;
533 
534 	switch (pos->type) {
535 	case BNX2X_VFOP_FILTER_MAC:
536 		memcpy(user_req->u.mac.mac, pos->mac, ETH_ALEN);
537 		break;
538 	case BNX2X_VFOP_FILTER_VLAN:
539 		user_req->u.vlan.vlan = pos->vid;
540 		break;
541 	default:
542 		BNX2X_ERR("Invalid filter type, skipping\n");
543 		return 1;
544 	}
545 	return 0;
546 }
547 
548 static int bnx2x_vfop_config_list(struct bnx2x *bp,
549 				  struct bnx2x_vfop_filters *filters,
550 				  struct bnx2x_vlan_mac_ramrod_params *vlan_mac)
551 {
552 	struct bnx2x_vfop_filter *pos, *tmp;
553 	struct list_head rollback_list, *filters_list = &filters->head;
554 	struct bnx2x_vlan_mac_data *user_req = &vlan_mac->user_req;
555 	int rc = 0, cnt = 0;
556 
557 	INIT_LIST_HEAD(&rollback_list);
558 
559 	list_for_each_entry_safe(pos, tmp, filters_list, link) {
560 		if (bnx2x_vfop_set_user_req(bp, pos, user_req))
561 			continue;
562 
563 		rc = bnx2x_config_vlan_mac(bp, vlan_mac);
564 		if (rc >= 0) {
565 			cnt += pos->add ? 1 : -1;
566 			list_move(&pos->link, &rollback_list);
567 			rc = 0;
568 		} else if (rc == -EEXIST) {
569 			rc = 0;
570 		} else {
571 			BNX2X_ERR("Failed to add a new vlan_mac command\n");
572 			break;
573 		}
574 	}
575 
576 	/* rollback if error or too many rules added */
577 	if (rc || cnt > filters->add_cnt) {
578 		BNX2X_ERR("error or too many rules added. Performing rollback\n");
579 		list_for_each_entry_safe(pos, tmp, &rollback_list, link) {
580 			pos->add = !pos->add;	/* reverse op */
581 			bnx2x_vfop_set_user_req(bp, pos, user_req);
582 			bnx2x_config_vlan_mac(bp, vlan_mac);
583 			list_del(&pos->link);
584 		}
585 		cnt = 0;
586 		if (!rc)
587 			rc = -EINVAL;
588 	}
589 	filters->add_cnt = cnt;
590 	return rc;
591 }
592 
593 /* VFOP set VLAN/MAC */
594 static void bnx2x_vfop_vlan_mac(struct bnx2x *bp, struct bnx2x_virtf *vf)
595 {
596 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
597 	struct bnx2x_vlan_mac_ramrod_params *vlan_mac = &vfop->op_p->vlan_mac;
598 	struct bnx2x_vlan_mac_obj *obj = vlan_mac->vlan_mac_obj;
599 	struct bnx2x_vfop_filters *filters = vfop->args.filters.multi_filter;
600 
601 	enum bnx2x_vfop_vlan_mac_state state = vfop->state;
602 
603 	if (vfop->rc < 0)
604 		goto op_err;
605 
606 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
607 
608 	bnx2x_vfop_reset_wq(vf);
609 
610 	switch (state) {
611 	case BNX2X_VFOP_VLAN_MAC_CLEAR:
612 		/* next state */
613 		vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
614 
615 		/* do delete */
616 		vfop->rc = obj->delete_all(bp, obj,
617 					   &vlan_mac->user_req.vlan_mac_flags,
618 					   &vlan_mac->ramrod_flags);
619 
620 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
621 
622 	case BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE:
623 		/* next state */
624 		vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
625 
626 		/* do config */
627 		vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
628 		if (vfop->rc == -EEXIST)
629 			vfop->rc = 0;
630 
631 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
632 
633 	case BNX2X_VFOP_VLAN_MAC_CHK_DONE:
634 		vfop->rc = !!obj->raw.check_pending(&obj->raw);
635 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
636 
637 	case BNX2X_VFOP_MAC_CONFIG_LIST:
638 		/* next state */
639 		vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
640 
641 		/* do list config */
642 		vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
643 		if (vfop->rc)
644 			goto op_err;
645 
646 		set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
647 		vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
648 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
649 
650 	case BNX2X_VFOP_VLAN_CONFIG_LIST:
651 		/* next state */
652 		vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
653 
654 		/* do list config */
655 		vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
656 		if (!vfop->rc) {
657 			set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
658 			vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
659 		}
660 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
661 
662 	default:
663 		bnx2x_vfop_default(state);
664 	}
665 op_err:
666 	BNX2X_ERR("VLAN-MAC error: rc %d\n", vfop->rc);
667 op_done:
668 	kfree(filters);
669 	bnx2x_vfop_credit(bp, vfop, obj);
670 	bnx2x_vfop_end(bp, vf, vfop);
671 op_pending:
672 	return;
673 }
674 
675 struct bnx2x_vfop_vlan_mac_flags {
676 	bool drv_only;
677 	bool dont_consume;
678 	bool single_cmd;
679 	bool add;
680 };
681 
682 static void
683 bnx2x_vfop_vlan_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
684 				struct bnx2x_vfop_vlan_mac_flags *flags)
685 {
686 	struct bnx2x_vlan_mac_data *ureq = &ramrod->user_req;
687 
688 	memset(ramrod, 0, sizeof(*ramrod));
689 
690 	/* ramrod flags */
691 	if (flags->drv_only)
692 		set_bit(RAMROD_DRV_CLR_ONLY, &ramrod->ramrod_flags);
693 	if (flags->single_cmd)
694 		set_bit(RAMROD_EXEC, &ramrod->ramrod_flags);
695 
696 	/* mac_vlan flags */
697 	if (flags->dont_consume)
698 		set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &ureq->vlan_mac_flags);
699 
700 	/* cmd */
701 	ureq->cmd = flags->add ? BNX2X_VLAN_MAC_ADD : BNX2X_VLAN_MAC_DEL;
702 }
703 
704 static inline void
705 bnx2x_vfop_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
706 			   struct bnx2x_vfop_vlan_mac_flags *flags)
707 {
708 	bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, flags);
709 	set_bit(BNX2X_ETH_MAC, &ramrod->user_req.vlan_mac_flags);
710 }
711 
712 static int bnx2x_vfop_mac_delall_cmd(struct bnx2x *bp,
713 				     struct bnx2x_virtf *vf,
714 				     struct bnx2x_vfop_cmd *cmd,
715 				     int qid, bool drv_only)
716 {
717 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
718 	int rc;
719 
720 	if (vfop) {
721 		struct bnx2x_vfop_args_filters filters = {
722 			.multi_filter = NULL,	/* single */
723 			.credit = NULL,		/* consume credit */
724 		};
725 		struct bnx2x_vfop_vlan_mac_flags flags = {
726 			.drv_only = drv_only,
727 			.dont_consume = (filters.credit != NULL),
728 			.single_cmd = true,
729 			.add = false /* don't care */,
730 		};
731 		struct bnx2x_vlan_mac_ramrod_params *ramrod =
732 			&vf->op_params.vlan_mac;
733 
734 		/* set ramrod params */
735 		bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
736 
737 		/* set object */
738 		rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj));
739 		if (rc)
740 			return rc;
741 		ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
742 
743 		/* set extra args */
744 		vfop->args.filters = filters;
745 
746 		bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
747 				 bnx2x_vfop_vlan_mac, cmd->done);
748 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
749 					     cmd->block);
750 	}
751 	return -ENOMEM;
752 }
753 
754 int bnx2x_vfop_mac_list_cmd(struct bnx2x *bp,
755 			    struct bnx2x_virtf *vf,
756 			    struct bnx2x_vfop_cmd *cmd,
757 			    struct bnx2x_vfop_filters *macs,
758 			    int qid, bool drv_only)
759 {
760 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
761 	int rc;
762 
763 	if (vfop) {
764 		struct bnx2x_vfop_args_filters filters = {
765 			.multi_filter = macs,
766 			.credit = NULL,		/* consume credit */
767 		};
768 		struct bnx2x_vfop_vlan_mac_flags flags = {
769 			.drv_only = drv_only,
770 			.dont_consume = (filters.credit != NULL),
771 			.single_cmd = false,
772 			.add = false, /* don't care since only the items in the
773 				       * filters list affect the sp operation,
774 				       * not the list itself
775 				       */
776 		};
777 		struct bnx2x_vlan_mac_ramrod_params *ramrod =
778 			&vf->op_params.vlan_mac;
779 
780 		/* set ramrod params */
781 		bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
782 
783 		/* set object */
784 		rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj));
785 		if (rc)
786 			return rc;
787 		ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
788 
789 		/* set extra args */
790 		filters.multi_filter->add_cnt = BNX2X_VFOP_FILTER_ADD_CNT_MAX;
791 		vfop->args.filters = filters;
792 
793 		bnx2x_vfop_opset(BNX2X_VFOP_MAC_CONFIG_LIST,
794 				 bnx2x_vfop_vlan_mac, cmd->done);
795 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
796 					     cmd->block);
797 	}
798 	return -ENOMEM;
799 }
800 
801 int bnx2x_vfop_vlan_set_cmd(struct bnx2x *bp,
802 			    struct bnx2x_virtf *vf,
803 			    struct bnx2x_vfop_cmd *cmd,
804 			    int qid, u16 vid, bool add)
805 {
806 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
807 	int rc;
808 
809 	if (vfop) {
810 		struct bnx2x_vfop_args_filters filters = {
811 			.multi_filter = NULL, /* single command */
812 			.credit = &bnx2x_vfq(vf, qid, vlan_count),
813 		};
814 		struct bnx2x_vfop_vlan_mac_flags flags = {
815 			.drv_only = false,
816 			.dont_consume = (filters.credit != NULL),
817 			.single_cmd = true,
818 			.add = add,
819 		};
820 		struct bnx2x_vlan_mac_ramrod_params *ramrod =
821 			&vf->op_params.vlan_mac;
822 
823 		/* set ramrod params */
824 		bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
825 		ramrod->user_req.u.vlan.vlan = vid;
826 
827 		/* set object */
828 		rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
829 		if (rc)
830 			return rc;
831 		ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
832 
833 		/* set extra args */
834 		vfop->args.filters = filters;
835 
836 		bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
837 				 bnx2x_vfop_vlan_mac, cmd->done);
838 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
839 					     cmd->block);
840 	}
841 	return -ENOMEM;
842 }
843 
844 static int bnx2x_vfop_vlan_delall_cmd(struct bnx2x *bp,
845 			       struct bnx2x_virtf *vf,
846 			       struct bnx2x_vfop_cmd *cmd,
847 			       int qid, bool drv_only)
848 {
849 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
850 	int rc;
851 
852 	if (vfop) {
853 		struct bnx2x_vfop_args_filters filters = {
854 			.multi_filter = NULL, /* single command */
855 			.credit = &bnx2x_vfq(vf, qid, vlan_count),
856 		};
857 		struct bnx2x_vfop_vlan_mac_flags flags = {
858 			.drv_only = drv_only,
859 			.dont_consume = (filters.credit != NULL),
860 			.single_cmd = true,
861 			.add = false, /* don't care */
862 		};
863 		struct bnx2x_vlan_mac_ramrod_params *ramrod =
864 			&vf->op_params.vlan_mac;
865 
866 		/* set ramrod params */
867 		bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
868 
869 		/* set object */
870 		rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
871 		if (rc)
872 			return rc;
873 		ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
874 
875 		/* set extra args */
876 		vfop->args.filters = filters;
877 
878 		bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
879 				 bnx2x_vfop_vlan_mac, cmd->done);
880 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
881 					     cmd->block);
882 	}
883 	return -ENOMEM;
884 }
885 
886 int bnx2x_vfop_vlan_list_cmd(struct bnx2x *bp,
887 			     struct bnx2x_virtf *vf,
888 			     struct bnx2x_vfop_cmd *cmd,
889 			     struct bnx2x_vfop_filters *vlans,
890 			     int qid, bool drv_only)
891 {
892 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
893 	int rc;
894 
895 	if (vfop) {
896 		struct bnx2x_vfop_args_filters filters = {
897 			.multi_filter = vlans,
898 			.credit = &bnx2x_vfq(vf, qid, vlan_count),
899 		};
900 		struct bnx2x_vfop_vlan_mac_flags flags = {
901 			.drv_only = drv_only,
902 			.dont_consume = (filters.credit != NULL),
903 			.single_cmd = false,
904 			.add = false, /* don't care */
905 		};
906 		struct bnx2x_vlan_mac_ramrod_params *ramrod =
907 			&vf->op_params.vlan_mac;
908 
909 		/* set ramrod params */
910 		bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
911 
912 		/* set object */
913 		rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
914 		if (rc)
915 			return rc;
916 		ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
917 
918 		/* set extra args */
919 		filters.multi_filter->add_cnt = vf_vlan_rules_cnt(vf) -
920 			atomic_read(filters.credit);
921 
922 		vfop->args.filters = filters;
923 
924 		bnx2x_vfop_opset(BNX2X_VFOP_VLAN_CONFIG_LIST,
925 				 bnx2x_vfop_vlan_mac, cmd->done);
926 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
927 					     cmd->block);
928 	}
929 	return -ENOMEM;
930 }
931 
932 /* VFOP queue setup (queue constructor + set vlan 0) */
933 static void bnx2x_vfop_qsetup(struct bnx2x *bp, struct bnx2x_virtf *vf)
934 {
935 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
936 	int qid = vfop->args.qctor.qid;
937 	enum bnx2x_vfop_qsetup_state state = vfop->state;
938 	struct bnx2x_vfop_cmd cmd = {
939 		.done = bnx2x_vfop_qsetup,
940 		.block = false,
941 	};
942 
943 	if (vfop->rc < 0)
944 		goto op_err;
945 
946 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
947 
948 	switch (state) {
949 	case BNX2X_VFOP_QSETUP_CTOR:
950 		/* init the queue ctor command */
951 		vfop->state = BNX2X_VFOP_QSETUP_VLAN0;
952 		vfop->rc = bnx2x_vfop_qctor_cmd(bp, vf, &cmd, qid);
953 		if (vfop->rc)
954 			goto op_err;
955 		return;
956 
957 	case BNX2X_VFOP_QSETUP_VLAN0:
958 		/* skip if non-leading or FPGA/EMU*/
959 		if (qid)
960 			goto op_done;
961 
962 		/* init the queue set-vlan command (for vlan 0) */
963 		vfop->state = BNX2X_VFOP_QSETUP_DONE;
964 		vfop->rc = bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, 0, true);
965 		if (vfop->rc)
966 			goto op_err;
967 		return;
968 op_err:
969 	BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, vfop->rc);
970 op_done:
971 	case BNX2X_VFOP_QSETUP_DONE:
972 		vf->cfg_flags |= VF_CFG_VLAN;
973 		smp_mb__before_clear_bit();
974 		set_bit(BNX2X_SP_RTNL_HYPERVISOR_VLAN,
975 			&bp->sp_rtnl_state);
976 		smp_mb__after_clear_bit();
977 		schedule_delayed_work(&bp->sp_rtnl_task, 0);
978 		bnx2x_vfop_end(bp, vf, vfop);
979 		return;
980 	default:
981 		bnx2x_vfop_default(state);
982 	}
983 }
984 
985 int bnx2x_vfop_qsetup_cmd(struct bnx2x *bp,
986 			  struct bnx2x_virtf *vf,
987 			  struct bnx2x_vfop_cmd *cmd,
988 			  int qid)
989 {
990 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
991 
992 	if (vfop) {
993 		vfop->args.qctor.qid = qid;
994 
995 		bnx2x_vfop_opset(BNX2X_VFOP_QSETUP_CTOR,
996 				 bnx2x_vfop_qsetup, cmd->done);
997 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qsetup,
998 					     cmd->block);
999 	}
1000 	return -ENOMEM;
1001 }
1002 
1003 /* VFOP queue FLR handling (clear vlans, clear macs, queue destructor) */
1004 static void bnx2x_vfop_qflr(struct bnx2x *bp, struct bnx2x_virtf *vf)
1005 {
1006 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1007 	int qid = vfop->args.qx.qid;
1008 	enum bnx2x_vfop_qflr_state state = vfop->state;
1009 	struct bnx2x_queue_state_params *qstate;
1010 	struct bnx2x_vfop_cmd cmd;
1011 
1012 	bnx2x_vfop_reset_wq(vf);
1013 
1014 	if (vfop->rc < 0)
1015 		goto op_err;
1016 
1017 	DP(BNX2X_MSG_IOV, "VF[%d] STATE: %d\n", vf->abs_vfid, state);
1018 
1019 	cmd.done = bnx2x_vfop_qflr;
1020 	cmd.block = false;
1021 
1022 	switch (state) {
1023 	case BNX2X_VFOP_QFLR_CLR_VLAN:
1024 		/* vlan-clear-all: driver-only, don't consume credit */
1025 		vfop->state = BNX2X_VFOP_QFLR_CLR_MAC;
1026 		if (!validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj)))
1027 			vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid,
1028 							      true);
1029 		if (vfop->rc)
1030 			goto op_err;
1031 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1032 
1033 	case BNX2X_VFOP_QFLR_CLR_MAC:
1034 		/* mac-clear-all: driver only consume credit */
1035 		vfop->state = BNX2X_VFOP_QFLR_TERMINATE;
1036 		if (!validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj)))
1037 			vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid,
1038 							     true);
1039 		DP(BNX2X_MSG_IOV,
1040 		   "VF[%d] vfop->rc after bnx2x_vfop_mac_delall_cmd was %d",
1041 		   vf->abs_vfid, vfop->rc);
1042 		if (vfop->rc)
1043 			goto op_err;
1044 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1045 
1046 	case BNX2X_VFOP_QFLR_TERMINATE:
1047 		qstate = &vfop->op_p->qctor.qstate;
1048 		memset(qstate , 0, sizeof(*qstate));
1049 		qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
1050 		vfop->state = BNX2X_VFOP_QFLR_DONE;
1051 
1052 		DP(BNX2X_MSG_IOV, "VF[%d] qstate during flr was %d\n",
1053 		   vf->abs_vfid, qstate->q_obj->state);
1054 
1055 		if (qstate->q_obj->state != BNX2X_Q_STATE_RESET) {
1056 			qstate->q_obj->state = BNX2X_Q_STATE_STOPPED;
1057 			qstate->cmd = BNX2X_Q_CMD_TERMINATE;
1058 			vfop->rc = bnx2x_queue_state_change(bp, qstate);
1059 			bnx2x_vfop_finalize(vf, vfop->rc, VFOP_VERIFY_PEND);
1060 		} else {
1061 			goto op_done;
1062 		}
1063 
1064 op_err:
1065 	BNX2X_ERR("QFLR[%d:%d] error: rc %d\n",
1066 		  vf->abs_vfid, qid, vfop->rc);
1067 op_done:
1068 	case BNX2X_VFOP_QFLR_DONE:
1069 		bnx2x_vfop_end(bp, vf, vfop);
1070 		return;
1071 	default:
1072 		bnx2x_vfop_default(state);
1073 	}
1074 op_pending:
1075 	return;
1076 }
1077 
1078 static int bnx2x_vfop_qflr_cmd(struct bnx2x *bp,
1079 			       struct bnx2x_virtf *vf,
1080 			       struct bnx2x_vfop_cmd *cmd,
1081 			       int qid)
1082 {
1083 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1084 
1085 	if (vfop) {
1086 		vfop->args.qx.qid = qid;
1087 		bnx2x_vfop_opset(BNX2X_VFOP_QFLR_CLR_VLAN,
1088 				 bnx2x_vfop_qflr, cmd->done);
1089 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qflr,
1090 					     cmd->block);
1091 	}
1092 	return -ENOMEM;
1093 }
1094 
1095 /* VFOP multi-casts */
1096 static void bnx2x_vfop_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf)
1097 {
1098 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1099 	struct bnx2x_mcast_ramrod_params *mcast = &vfop->op_p->mcast;
1100 	struct bnx2x_raw_obj *raw = &mcast->mcast_obj->raw;
1101 	struct bnx2x_vfop_args_mcast *args = &vfop->args.mc_list;
1102 	enum bnx2x_vfop_mcast_state state = vfop->state;
1103 	int i;
1104 
1105 	bnx2x_vfop_reset_wq(vf);
1106 
1107 	if (vfop->rc < 0)
1108 		goto op_err;
1109 
1110 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1111 
1112 	switch (state) {
1113 	case BNX2X_VFOP_MCAST_DEL:
1114 		/* clear existing mcasts */
1115 		vfop->state = BNX2X_VFOP_MCAST_ADD;
1116 		vfop->rc = bnx2x_config_mcast(bp, mcast, BNX2X_MCAST_CMD_DEL);
1117 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1118 
1119 	case BNX2X_VFOP_MCAST_ADD:
1120 		if (raw->check_pending(raw))
1121 			goto op_pending;
1122 
1123 		if (args->mc_num) {
1124 			/* update mcast list on the ramrod params */
1125 			INIT_LIST_HEAD(&mcast->mcast_list);
1126 			for (i = 0; i < args->mc_num; i++)
1127 				list_add_tail(&(args->mc[i].link),
1128 					      &mcast->mcast_list);
1129 			/* add new mcasts */
1130 			vfop->state = BNX2X_VFOP_MCAST_CHK_DONE;
1131 			vfop->rc = bnx2x_config_mcast(bp, mcast,
1132 						      BNX2X_MCAST_CMD_ADD);
1133 		}
1134 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1135 
1136 	case BNX2X_VFOP_MCAST_CHK_DONE:
1137 		vfop->rc = raw->check_pending(raw) ? 1 : 0;
1138 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1139 	default:
1140 		bnx2x_vfop_default(state);
1141 	}
1142 op_err:
1143 	BNX2X_ERR("MCAST CONFIG error: rc %d\n", vfop->rc);
1144 op_done:
1145 	kfree(args->mc);
1146 	bnx2x_vfop_end(bp, vf, vfop);
1147 op_pending:
1148 	return;
1149 }
1150 
1151 int bnx2x_vfop_mcast_cmd(struct bnx2x *bp,
1152 			 struct bnx2x_virtf *vf,
1153 			 struct bnx2x_vfop_cmd *cmd,
1154 			 bnx2x_mac_addr_t *mcasts,
1155 			 int mcast_num, bool drv_only)
1156 {
1157 	struct bnx2x_vfop *vfop = NULL;
1158 	size_t mc_sz = mcast_num * sizeof(struct bnx2x_mcast_list_elem);
1159 	struct bnx2x_mcast_list_elem *mc = mc_sz ? kzalloc(mc_sz, GFP_KERNEL) :
1160 					   NULL;
1161 
1162 	if (!mc_sz || mc) {
1163 		vfop = bnx2x_vfop_add(bp, vf);
1164 		if (vfop) {
1165 			int i;
1166 			struct bnx2x_mcast_ramrod_params *ramrod =
1167 				&vf->op_params.mcast;
1168 
1169 			/* set ramrod params */
1170 			memset(ramrod, 0, sizeof(*ramrod));
1171 			ramrod->mcast_obj = &vf->mcast_obj;
1172 			if (drv_only)
1173 				set_bit(RAMROD_DRV_CLR_ONLY,
1174 					&ramrod->ramrod_flags);
1175 
1176 			/* copy mcasts pointers */
1177 			vfop->args.mc_list.mc_num = mcast_num;
1178 			vfop->args.mc_list.mc = mc;
1179 			for (i = 0; i < mcast_num; i++)
1180 				mc[i].mac = mcasts[i];
1181 
1182 			bnx2x_vfop_opset(BNX2X_VFOP_MCAST_DEL,
1183 					 bnx2x_vfop_mcast, cmd->done);
1184 			return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_mcast,
1185 						     cmd->block);
1186 		} else {
1187 			kfree(mc);
1188 		}
1189 	}
1190 	return -ENOMEM;
1191 }
1192 
1193 /* VFOP rx-mode */
1194 static void bnx2x_vfop_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf)
1195 {
1196 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1197 	struct bnx2x_rx_mode_ramrod_params *ramrod = &vfop->op_p->rx_mode;
1198 	enum bnx2x_vfop_rxmode_state state = vfop->state;
1199 
1200 	bnx2x_vfop_reset_wq(vf);
1201 
1202 	if (vfop->rc < 0)
1203 		goto op_err;
1204 
1205 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1206 
1207 	switch (state) {
1208 	case BNX2X_VFOP_RXMODE_CONFIG:
1209 		/* next state */
1210 		vfop->state = BNX2X_VFOP_RXMODE_DONE;
1211 
1212 		vfop->rc = bnx2x_config_rx_mode(bp, ramrod);
1213 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1214 op_err:
1215 		BNX2X_ERR("RXMODE error: rc %d\n", vfop->rc);
1216 op_done:
1217 	case BNX2X_VFOP_RXMODE_DONE:
1218 		bnx2x_vfop_end(bp, vf, vfop);
1219 		return;
1220 	default:
1221 		bnx2x_vfop_default(state);
1222 	}
1223 op_pending:
1224 	return;
1225 }
1226 
1227 int bnx2x_vfop_rxmode_cmd(struct bnx2x *bp,
1228 			  struct bnx2x_virtf *vf,
1229 			  struct bnx2x_vfop_cmd *cmd,
1230 			  int qid, unsigned long accept_flags)
1231 {
1232 	struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
1233 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1234 
1235 	if (vfop) {
1236 		struct bnx2x_rx_mode_ramrod_params *ramrod =
1237 			&vf->op_params.rx_mode;
1238 
1239 		memset(ramrod, 0, sizeof(*ramrod));
1240 
1241 		/* Prepare ramrod parameters */
1242 		ramrod->cid = vfq->cid;
1243 		ramrod->cl_id = vfq_cl_id(vf, vfq);
1244 		ramrod->rx_mode_obj = &bp->rx_mode_obj;
1245 		ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
1246 
1247 		ramrod->rx_accept_flags = accept_flags;
1248 		ramrod->tx_accept_flags = accept_flags;
1249 		ramrod->pstate = &vf->filter_state;
1250 		ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
1251 
1252 		set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1253 		set_bit(RAMROD_RX, &ramrod->ramrod_flags);
1254 		set_bit(RAMROD_TX, &ramrod->ramrod_flags);
1255 
1256 		ramrod->rdata =
1257 			bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
1258 		ramrod->rdata_mapping =
1259 			bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
1260 
1261 		bnx2x_vfop_opset(BNX2X_VFOP_RXMODE_CONFIG,
1262 				 bnx2x_vfop_rxmode, cmd->done);
1263 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rxmode,
1264 					     cmd->block);
1265 	}
1266 	return -ENOMEM;
1267 }
1268 
1269 /* VFOP queue tear-down ('drop all' rx-mode, clear vlans, clear macs,
1270  * queue destructor)
1271  */
1272 static void bnx2x_vfop_qdown(struct bnx2x *bp, struct bnx2x_virtf *vf)
1273 {
1274 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1275 	int qid = vfop->args.qx.qid;
1276 	enum bnx2x_vfop_qteardown_state state = vfop->state;
1277 	struct bnx2x_vfop_cmd cmd;
1278 
1279 	if (vfop->rc < 0)
1280 		goto op_err;
1281 
1282 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1283 
1284 	cmd.done = bnx2x_vfop_qdown;
1285 	cmd.block = false;
1286 
1287 	switch (state) {
1288 	case BNX2X_VFOP_QTEARDOWN_RXMODE:
1289 		/* Drop all */
1290 		vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_VLAN;
1291 		vfop->rc = bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, qid, 0);
1292 		if (vfop->rc)
1293 			goto op_err;
1294 		return;
1295 
1296 	case BNX2X_VFOP_QTEARDOWN_CLR_VLAN:
1297 		/* vlan-clear-all: don't consume credit */
1298 		vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MAC;
1299 		vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false);
1300 		if (vfop->rc)
1301 			goto op_err;
1302 		return;
1303 
1304 	case BNX2X_VFOP_QTEARDOWN_CLR_MAC:
1305 		/* mac-clear-all: consume credit */
1306 		vfop->state = BNX2X_VFOP_QTEARDOWN_QDTOR;
1307 		vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, false);
1308 		if (vfop->rc)
1309 			goto op_err;
1310 		return;
1311 
1312 	case BNX2X_VFOP_QTEARDOWN_QDTOR:
1313 		/* run the queue destruction flow */
1314 		DP(BNX2X_MSG_IOV, "case: BNX2X_VFOP_QTEARDOWN_QDTOR\n");
1315 		vfop->state = BNX2X_VFOP_QTEARDOWN_DONE;
1316 		DP(BNX2X_MSG_IOV, "new state: BNX2X_VFOP_QTEARDOWN_DONE\n");
1317 		vfop->rc = bnx2x_vfop_qdtor_cmd(bp, vf, &cmd, qid);
1318 		DP(BNX2X_MSG_IOV, "returned from cmd\n");
1319 		if (vfop->rc)
1320 			goto op_err;
1321 		return;
1322 op_err:
1323 	BNX2X_ERR("QTEARDOWN[%d:%d] error: rc %d\n",
1324 		  vf->abs_vfid, qid, vfop->rc);
1325 
1326 	case BNX2X_VFOP_QTEARDOWN_DONE:
1327 		bnx2x_vfop_end(bp, vf, vfop);
1328 		return;
1329 	default:
1330 		bnx2x_vfop_default(state);
1331 	}
1332 }
1333 
1334 int bnx2x_vfop_qdown_cmd(struct bnx2x *bp,
1335 			 struct bnx2x_virtf *vf,
1336 			 struct bnx2x_vfop_cmd *cmd,
1337 			 int qid)
1338 {
1339 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1340 
1341 	/* for non leading queues skip directly to qdown sate */
1342 	if (vfop) {
1343 		vfop->args.qx.qid = qid;
1344 		bnx2x_vfop_opset(qid == LEADING_IDX ?
1345 				 BNX2X_VFOP_QTEARDOWN_RXMODE :
1346 				 BNX2X_VFOP_QTEARDOWN_QDTOR, bnx2x_vfop_qdown,
1347 				 cmd->done);
1348 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdown,
1349 					     cmd->block);
1350 	}
1351 
1352 	return -ENOMEM;
1353 }
1354 
1355 /* VF enable primitives
1356  * when pretend is required the caller is responsible
1357  * for calling pretend prior to calling these routines
1358  */
1359 
1360 /* internal vf enable - until vf is enabled internally all transactions
1361  * are blocked. This routine should always be called last with pretend.
1362  */
1363 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
1364 {
1365 	REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
1366 }
1367 
1368 /* clears vf error in all semi blocks */
1369 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
1370 {
1371 	REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
1372 	REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
1373 	REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
1374 	REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
1375 }
1376 
1377 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
1378 {
1379 	u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
1380 	u32 was_err_reg = 0;
1381 
1382 	switch (was_err_group) {
1383 	case 0:
1384 	    was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
1385 	    break;
1386 	case 1:
1387 	    was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
1388 	    break;
1389 	case 2:
1390 	    was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
1391 	    break;
1392 	case 3:
1393 	    was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
1394 	    break;
1395 	}
1396 	REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
1397 }
1398 
1399 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
1400 {
1401 	int i;
1402 	u32 val;
1403 
1404 	/* Set VF masks and configuration - pretend */
1405 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1406 
1407 	REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
1408 	REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
1409 	REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
1410 	REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
1411 	REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
1412 	REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
1413 
1414 	val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
1415 	val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
1416 	if (vf->cfg_flags & VF_CFG_INT_SIMD)
1417 		val |= IGU_VF_CONF_SINGLE_ISR_EN;
1418 	val &= ~IGU_VF_CONF_PARENT_MASK;
1419 	val |= BP_FUNC(bp) << IGU_VF_CONF_PARENT_SHIFT;	/* parent PF */
1420 	REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
1421 
1422 	DP(BNX2X_MSG_IOV,
1423 	   "value in IGU_REG_VF_CONFIGURATION of vf %d after write %x\n",
1424 	   vf->abs_vfid, REG_RD(bp, IGU_REG_VF_CONFIGURATION));
1425 
1426 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1427 
1428 	/* iterate over all queues, clear sb consumer */
1429 	for (i = 0; i < vf_sb_count(vf); i++) {
1430 		u8 igu_sb_id = vf_igu_sb(vf, i);
1431 
1432 		/* zero prod memory */
1433 		REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
1434 
1435 		/* clear sb state machine */
1436 		bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
1437 				       false /* VF */);
1438 
1439 		/* disable + update */
1440 		bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
1441 				    IGU_INT_DISABLE, 1);
1442 	}
1443 }
1444 
1445 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
1446 {
1447 	/* set the VF-PF association in the FW */
1448 	storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
1449 	storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
1450 
1451 	/* clear vf errors*/
1452 	bnx2x_vf_semi_clear_err(bp, abs_vfid);
1453 	bnx2x_vf_pglue_clear_err(bp, abs_vfid);
1454 
1455 	/* internal vf-enable - pretend */
1456 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
1457 	DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
1458 	bnx2x_vf_enable_internal(bp, true);
1459 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1460 }
1461 
1462 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
1463 {
1464 	/* Reset vf in IGU  interrupts are still disabled */
1465 	bnx2x_vf_igu_reset(bp, vf);
1466 
1467 	/* pretend to enable the vf with the PBF */
1468 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1469 	REG_WR(bp, PBF_REG_DISABLE_VF, 0);
1470 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1471 }
1472 
1473 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
1474 {
1475 	struct pci_dev *dev;
1476 	struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1477 
1478 	if (!vf)
1479 		return false;
1480 
1481 	dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
1482 	if (dev)
1483 		return bnx2x_is_pcie_pending(dev);
1484 	return false;
1485 }
1486 
1487 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
1488 {
1489 	/* Verify no pending pci transactions */
1490 	if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
1491 		BNX2X_ERR("PCIE Transactions still pending\n");
1492 
1493 	return 0;
1494 }
1495 
1496 /* must be called after the number of PF queues and the number of VFs are
1497  * both known
1498  */
1499 static void
1500 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
1501 {
1502 	struct vf_pf_resc_request *resc = &vf->alloc_resc;
1503 	u16 vlan_count = 0;
1504 
1505 	/* will be set only during VF-ACQUIRE */
1506 	resc->num_rxqs = 0;
1507 	resc->num_txqs = 0;
1508 
1509 	/* no credit calculations for macs (just yet) */
1510 	resc->num_mac_filters = 1;
1511 
1512 	/* divvy up vlan rules */
1513 	vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
1514 	vlan_count = 1 << ilog2(vlan_count);
1515 	resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp);
1516 
1517 	/* no real limitation */
1518 	resc->num_mc_filters = 0;
1519 
1520 	/* num_sbs already set */
1521 	resc->num_sbs = vf->sb_count;
1522 }
1523 
1524 /* FLR routines: */
1525 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
1526 {
1527 	/* reset the state variables */
1528 	bnx2x_iov_static_resc(bp, vf);
1529 	vf->state = VF_FREE;
1530 }
1531 
1532 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
1533 {
1534 	u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
1535 
1536 	/* DQ usage counter */
1537 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1538 	bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
1539 					"DQ VF usage counter timed out",
1540 					poll_cnt);
1541 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1542 
1543 	/* FW cleanup command - poll for the results */
1544 	if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
1545 				   poll_cnt))
1546 		BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
1547 
1548 	/* verify TX hw is flushed */
1549 	bnx2x_tx_hw_flushed(bp, poll_cnt);
1550 }
1551 
1552 static void bnx2x_vfop_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
1553 {
1554 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1555 	struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
1556 	enum bnx2x_vfop_flr_state state = vfop->state;
1557 	struct bnx2x_vfop_cmd cmd = {
1558 		.done = bnx2x_vfop_flr,
1559 		.block = false,
1560 	};
1561 
1562 	if (vfop->rc < 0)
1563 		goto op_err;
1564 
1565 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1566 
1567 	switch (state) {
1568 	case BNX2X_VFOP_FLR_QUEUES:
1569 		/* the cleanup operations are valid if and only if the VF
1570 		 * was first acquired.
1571 		 */
1572 		if (++(qx->qid) < vf_rxq_count(vf)) {
1573 			vfop->rc = bnx2x_vfop_qflr_cmd(bp, vf, &cmd,
1574 						       qx->qid);
1575 			if (vfop->rc)
1576 				goto op_err;
1577 			return;
1578 		}
1579 		/* remove multicasts */
1580 		vfop->state = BNX2X_VFOP_FLR_HW;
1581 		vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL,
1582 						0, true);
1583 		if (vfop->rc)
1584 			goto op_err;
1585 		return;
1586 	case BNX2X_VFOP_FLR_HW:
1587 
1588 		/* dispatch final cleanup and wait for HW queues to flush */
1589 		bnx2x_vf_flr_clnup_hw(bp, vf);
1590 
1591 		/* release VF resources */
1592 		bnx2x_vf_free_resc(bp, vf);
1593 
1594 		/* re-open the mailbox */
1595 		bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1596 
1597 		goto op_done;
1598 	default:
1599 		bnx2x_vfop_default(state);
1600 	}
1601 op_err:
1602 	BNX2X_ERR("VF[%d] FLR error: rc %d\n", vf->abs_vfid, vfop->rc);
1603 op_done:
1604 	vf->flr_clnup_stage = VF_FLR_ACK;
1605 	bnx2x_vfop_end(bp, vf, vfop);
1606 	bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
1607 }
1608 
1609 static int bnx2x_vfop_flr_cmd(struct bnx2x *bp,
1610 			      struct bnx2x_virtf *vf,
1611 			      vfop_handler_t done)
1612 {
1613 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1614 	if (vfop) {
1615 		vfop->args.qx.qid = -1; /* loop */
1616 		bnx2x_vfop_opset(BNX2X_VFOP_FLR_QUEUES,
1617 				 bnx2x_vfop_flr, done);
1618 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_flr, false);
1619 	}
1620 	return -ENOMEM;
1621 }
1622 
1623 static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf)
1624 {
1625 	int i = prev_vf ? prev_vf->index + 1 : 0;
1626 	struct bnx2x_virtf *vf;
1627 
1628 	/* find next VF to cleanup */
1629 next_vf_to_clean:
1630 	for (;
1631 	     i < BNX2X_NR_VIRTFN(bp) &&
1632 	     (bnx2x_vf(bp, i, state) != VF_RESET ||
1633 	      bnx2x_vf(bp, i, flr_clnup_stage) != VF_FLR_CLN);
1634 	     i++)
1635 		;
1636 
1637 	DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n", i,
1638 	   BNX2X_NR_VIRTFN(bp));
1639 
1640 	if (i < BNX2X_NR_VIRTFN(bp)) {
1641 		vf = BP_VF(bp, i);
1642 
1643 		/* lock the vf pf channel */
1644 		bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
1645 
1646 		/* invoke the VF FLR SM */
1647 		if (bnx2x_vfop_flr_cmd(bp, vf, bnx2x_vf_flr_clnup)) {
1648 			BNX2X_ERR("VF[%d]: FLR cleanup failed -ENOMEM\n",
1649 				  vf->abs_vfid);
1650 
1651 			/* mark the VF to be ACKED and continue */
1652 			vf->flr_clnup_stage = VF_FLR_ACK;
1653 			goto next_vf_to_clean;
1654 		}
1655 		return;
1656 	}
1657 
1658 	/* we are done, update vf records */
1659 	for_each_vf(bp, i) {
1660 		vf = BP_VF(bp, i);
1661 
1662 		if (vf->flr_clnup_stage != VF_FLR_ACK)
1663 			continue;
1664 
1665 		vf->flr_clnup_stage = VF_FLR_EPILOG;
1666 	}
1667 
1668 	/* Acknowledge the handled VFs.
1669 	 * we are acknowledge all the vfs which an flr was requested for, even
1670 	 * if amongst them there are such that we never opened, since the mcp
1671 	 * will interrupt us immediately again if we only ack some of the bits,
1672 	 * resulting in an endless loop. This can happen for example in KVM
1673 	 * where an 'all ones' flr request is sometimes given by hyper visor
1674 	 */
1675 	DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
1676 	   bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
1677 	for (i = 0; i < FLRD_VFS_DWORDS; i++)
1678 		SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
1679 			  bp->vfdb->flrd_vfs[i]);
1680 
1681 	bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
1682 
1683 	/* clear the acked bits - better yet if the MCP implemented
1684 	 * write to clear semantics
1685 	 */
1686 	for (i = 0; i < FLRD_VFS_DWORDS; i++)
1687 		SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
1688 }
1689 
1690 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
1691 {
1692 	int i;
1693 
1694 	/* Read FLR'd VFs */
1695 	for (i = 0; i < FLRD_VFS_DWORDS; i++)
1696 		bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
1697 
1698 	DP(BNX2X_MSG_MCP,
1699 	   "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
1700 	   bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
1701 
1702 	for_each_vf(bp, i) {
1703 		struct bnx2x_virtf *vf = BP_VF(bp, i);
1704 		u32 reset = 0;
1705 
1706 		if (vf->abs_vfid < 32)
1707 			reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
1708 		else
1709 			reset = bp->vfdb->flrd_vfs[1] &
1710 				(1 << (vf->abs_vfid - 32));
1711 
1712 		if (reset) {
1713 			/* set as reset and ready for cleanup */
1714 			vf->state = VF_RESET;
1715 			vf->flr_clnup_stage = VF_FLR_CLN;
1716 
1717 			DP(BNX2X_MSG_IOV,
1718 			   "Initiating Final cleanup for VF %d\n",
1719 			   vf->abs_vfid);
1720 		}
1721 	}
1722 
1723 	/* do the FLR cleanup for all marked VFs*/
1724 	bnx2x_vf_flr_clnup(bp, NULL);
1725 }
1726 
1727 /* IOV global initialization routines  */
1728 void bnx2x_iov_init_dq(struct bnx2x *bp)
1729 {
1730 	if (!IS_SRIOV(bp))
1731 		return;
1732 
1733 	/* Set the DQ such that the CID reflect the abs_vfid */
1734 	REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1735 	REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1736 
1737 	/* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1738 	 * the PF L2 queues
1739 	 */
1740 	REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1741 
1742 	/* The VF window size is the log2 of the max number of CIDs per VF */
1743 	REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1744 
1745 	/* The VF doorbell size  0 - *B, 4 - 128B. We set it here to match
1746 	 * the Pf doorbell size although the 2 are independent.
1747 	 */
1748 	REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1749 
1750 	/* No security checks for now -
1751 	 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1752 	 * CID range 0 - 0x1ffff
1753 	 */
1754 	REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1755 	REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1756 	REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1757 	REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1758 
1759 	/* set the VF doorbell threshold */
1760 	REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4);
1761 }
1762 
1763 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1764 {
1765 	if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1766 		REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1767 }
1768 
1769 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1770 {
1771 	struct pci_dev *dev = bp->pdev;
1772 	struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1773 
1774 	return dev->bus->number + ((dev->devfn + iov->offset +
1775 				    iov->stride * vfid) >> 8);
1776 }
1777 
1778 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1779 {
1780 	struct pci_dev *dev = bp->pdev;
1781 	struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1782 
1783 	return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1784 }
1785 
1786 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1787 {
1788 	int i, n;
1789 	struct pci_dev *dev = bp->pdev;
1790 	struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1791 
1792 	for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1793 		u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1794 		u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1795 
1796 		size /= iov->total;
1797 		vf->bars[n].bar = start + size * vf->abs_vfid;
1798 		vf->bars[n].size = size;
1799 	}
1800 }
1801 
1802 static int bnx2x_ari_enabled(struct pci_dev *dev)
1803 {
1804 	return dev->bus->self && dev->bus->self->ari_enabled;
1805 }
1806 
1807 static void
1808 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1809 {
1810 	int sb_id;
1811 	u32 val;
1812 	u8 fid, current_pf = 0;
1813 
1814 	/* IGU in normal mode - read CAM */
1815 	for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1816 		val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1817 		if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1818 			continue;
1819 		fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1820 		if (fid & IGU_FID_ENCODE_IS_PF)
1821 			current_pf = fid & IGU_FID_PF_NUM_MASK;
1822 		else if (current_pf == BP_FUNC(bp))
1823 			bnx2x_vf_set_igu_info(bp, sb_id,
1824 					      (fid & IGU_FID_VF_NUM_MASK));
1825 		DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1826 		   ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1827 		   ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1828 		   (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1829 		   GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1830 	}
1831 	DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1832 }
1833 
1834 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1835 {
1836 	if (bp->vfdb) {
1837 		kfree(bp->vfdb->vfqs);
1838 		kfree(bp->vfdb->vfs);
1839 		kfree(bp->vfdb);
1840 	}
1841 	bp->vfdb = NULL;
1842 }
1843 
1844 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1845 {
1846 	int pos;
1847 	struct pci_dev *dev = bp->pdev;
1848 
1849 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1850 	if (!pos) {
1851 		BNX2X_ERR("failed to find SRIOV capability in device\n");
1852 		return -ENODEV;
1853 	}
1854 
1855 	iov->pos = pos;
1856 	DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1857 	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1858 	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1859 	pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1860 	pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1861 	pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1862 	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1863 	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1864 	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1865 
1866 	return 0;
1867 }
1868 
1869 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1870 {
1871 	u32 val;
1872 
1873 	/* read the SRIOV capability structure
1874 	 * The fields can be read via configuration read or
1875 	 * directly from the device (starting at offset PCICFG_OFFSET)
1876 	 */
1877 	if (bnx2x_sriov_pci_cfg_info(bp, iov))
1878 		return -ENODEV;
1879 
1880 	/* get the number of SRIOV bars */
1881 	iov->nres = 0;
1882 
1883 	/* read the first_vfid */
1884 	val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1885 	iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1886 			       * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1887 
1888 	DP(BNX2X_MSG_IOV,
1889 	   "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1890 	   BP_FUNC(bp),
1891 	   iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1892 	   iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1893 
1894 	return 0;
1895 }
1896 
1897 /* must be called after PF bars are mapped */
1898 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1899 		       int num_vfs_param)
1900 {
1901 	int err, i;
1902 	struct bnx2x_sriov *iov;
1903 	struct pci_dev *dev = bp->pdev;
1904 
1905 	bp->vfdb = NULL;
1906 
1907 	/* verify is pf */
1908 	if (IS_VF(bp))
1909 		return 0;
1910 
1911 	/* verify sriov capability is present in configuration space */
1912 	if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1913 		return 0;
1914 
1915 	/* verify chip revision */
1916 	if (CHIP_IS_E1x(bp))
1917 		return 0;
1918 
1919 	/* check if SRIOV support is turned off */
1920 	if (!num_vfs_param)
1921 		return 0;
1922 
1923 	/* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1924 	if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1925 		BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1926 			  BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1927 		return 0;
1928 	}
1929 
1930 	/* SRIOV can be enabled only with MSIX */
1931 	if (int_mode_param == BNX2X_INT_MODE_MSI ||
1932 	    int_mode_param == BNX2X_INT_MODE_INTX) {
1933 		BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1934 		return 0;
1935 	}
1936 
1937 	err = -EIO;
1938 	/* verify ari is enabled */
1939 	if (!bnx2x_ari_enabled(bp->pdev)) {
1940 		BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1941 		return 0;
1942 	}
1943 
1944 	/* verify igu is in normal mode */
1945 	if (CHIP_INT_MODE_IS_BC(bp)) {
1946 		BNX2X_ERR("IGU not normal mode,  SRIOV can not be enabled\n");
1947 		return 0;
1948 	}
1949 
1950 	/* allocate the vfs database */
1951 	bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1952 	if (!bp->vfdb) {
1953 		BNX2X_ERR("failed to allocate vf database\n");
1954 		err = -ENOMEM;
1955 		goto failed;
1956 	}
1957 
1958 	/* get the sriov info - Linux already collected all the pertinent
1959 	 * information, however the sriov structure is for the private use
1960 	 * of the pci module. Also we want this information regardless
1961 	 * of the hyper-visor.
1962 	 */
1963 	iov = &(bp->vfdb->sriov);
1964 	err = bnx2x_sriov_info(bp, iov);
1965 	if (err)
1966 		goto failed;
1967 
1968 	/* SR-IOV capability was enabled but there are no VFs*/
1969 	if (iov->total == 0)
1970 		goto failed;
1971 
1972 	iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1973 
1974 	DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1975 	   num_vfs_param, iov->nr_virtfn);
1976 
1977 	/* allocate the vf array */
1978 	bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
1979 				BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
1980 	if (!bp->vfdb->vfs) {
1981 		BNX2X_ERR("failed to allocate vf array\n");
1982 		err = -ENOMEM;
1983 		goto failed;
1984 	}
1985 
1986 	/* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1987 	for_each_vf(bp, i) {
1988 		bnx2x_vf(bp, i, index) = i;
1989 		bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1990 		bnx2x_vf(bp, i, state) = VF_FREE;
1991 		INIT_LIST_HEAD(&bnx2x_vf(bp, i, op_list_head));
1992 		mutex_init(&bnx2x_vf(bp, i, op_mutex));
1993 		bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1994 	}
1995 
1996 	/* re-read the IGU CAM for VFs - index and abs_vfid must be set */
1997 	bnx2x_get_vf_igu_cam_info(bp);
1998 
1999 	/* allocate the queue arrays for all VFs */
2000 	bp->vfdb->vfqs = kzalloc(
2001 		BNX2X_MAX_NUM_VF_QUEUES * sizeof(struct bnx2x_vf_queue),
2002 		GFP_KERNEL);
2003 
2004 	DP(BNX2X_MSG_IOV, "bp->vfdb->vfqs was %p\n", bp->vfdb->vfqs);
2005 
2006 	if (!bp->vfdb->vfqs) {
2007 		BNX2X_ERR("failed to allocate vf queue array\n");
2008 		err = -ENOMEM;
2009 		goto failed;
2010 	}
2011 
2012 	return 0;
2013 failed:
2014 	DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
2015 	__bnx2x_iov_free_vfdb(bp);
2016 	return err;
2017 }
2018 
2019 void bnx2x_iov_remove_one(struct bnx2x *bp)
2020 {
2021 	int vf_idx;
2022 
2023 	/* if SRIOV is not enabled there's nothing to do */
2024 	if (!IS_SRIOV(bp))
2025 		return;
2026 
2027 	DP(BNX2X_MSG_IOV, "about to call disable sriov\n");
2028 	pci_disable_sriov(bp->pdev);
2029 	DP(BNX2X_MSG_IOV, "sriov disabled\n");
2030 
2031 	/* disable access to all VFs */
2032 	for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
2033 		bnx2x_pretend_func(bp,
2034 				   HW_VF_HANDLE(bp,
2035 						bp->vfdb->sriov.first_vf_in_pf +
2036 						vf_idx));
2037 		DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
2038 		   bp->vfdb->sriov.first_vf_in_pf + vf_idx);
2039 		bnx2x_vf_enable_internal(bp, 0);
2040 		bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2041 	}
2042 
2043 	/* free vf database */
2044 	__bnx2x_iov_free_vfdb(bp);
2045 }
2046 
2047 void bnx2x_iov_free_mem(struct bnx2x *bp)
2048 {
2049 	int i;
2050 
2051 	if (!IS_SRIOV(bp))
2052 		return;
2053 
2054 	/* free vfs hw contexts */
2055 	for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2056 		struct hw_dma *cxt = &bp->vfdb->context[i];
2057 		BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
2058 	}
2059 
2060 	BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
2061 		       BP_VFDB(bp)->sp_dma.mapping,
2062 		       BP_VFDB(bp)->sp_dma.size);
2063 
2064 	BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
2065 		       BP_VF_MBX_DMA(bp)->mapping,
2066 		       BP_VF_MBX_DMA(bp)->size);
2067 
2068 	BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
2069 		       BP_VF_BULLETIN_DMA(bp)->mapping,
2070 		       BP_VF_BULLETIN_DMA(bp)->size);
2071 }
2072 
2073 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
2074 {
2075 	size_t tot_size;
2076 	int i, rc = 0;
2077 
2078 	if (!IS_SRIOV(bp))
2079 		return rc;
2080 
2081 	/* allocate vfs hw contexts */
2082 	tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
2083 		BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
2084 
2085 	for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2086 		struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
2087 		cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
2088 
2089 		if (cxt->size) {
2090 			BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size);
2091 		} else {
2092 			cxt->addr = NULL;
2093 			cxt->mapping = 0;
2094 		}
2095 		tot_size -= cxt->size;
2096 	}
2097 
2098 	/* allocate vfs ramrods dma memory - client_init and set_mac */
2099 	tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
2100 	BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping,
2101 			tot_size);
2102 	BP_VFDB(bp)->sp_dma.size = tot_size;
2103 
2104 	/* allocate mailboxes */
2105 	tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
2106 	BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping,
2107 			tot_size);
2108 	BP_VF_MBX_DMA(bp)->size = tot_size;
2109 
2110 	/* allocate local bulletin boards */
2111 	tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
2112 	BNX2X_PCI_ALLOC(BP_VF_BULLETIN_DMA(bp)->addr,
2113 			&BP_VF_BULLETIN_DMA(bp)->mapping, tot_size);
2114 	BP_VF_BULLETIN_DMA(bp)->size = tot_size;
2115 
2116 	return 0;
2117 
2118 alloc_mem_err:
2119 	return -ENOMEM;
2120 }
2121 
2122 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
2123 			   struct bnx2x_vf_queue *q)
2124 {
2125 	u8 cl_id = vfq_cl_id(vf, q);
2126 	u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
2127 	unsigned long q_type = 0;
2128 
2129 	set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
2130 	set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
2131 
2132 	/* Queue State object */
2133 	bnx2x_init_queue_obj(bp, &q->sp_obj,
2134 			     cl_id, &q->cid, 1, func_id,
2135 			     bnx2x_vf_sp(bp, vf, q_data),
2136 			     bnx2x_vf_sp_map(bp, vf, q_data),
2137 			     q_type);
2138 
2139 	DP(BNX2X_MSG_IOV,
2140 	   "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
2141 	   vf->abs_vfid, q->sp_obj.func_id, q->cid);
2142 }
2143 
2144 /* called by bnx2x_nic_load */
2145 int bnx2x_iov_nic_init(struct bnx2x *bp)
2146 {
2147 	int vfid;
2148 
2149 	if (!IS_SRIOV(bp)) {
2150 		DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
2151 		return 0;
2152 	}
2153 
2154 	DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
2155 
2156 	/* let FLR complete ... */
2157 	msleep(100);
2158 
2159 	/* initialize vf database */
2160 	for_each_vf(bp, vfid) {
2161 		struct bnx2x_virtf *vf = BP_VF(bp, vfid);
2162 
2163 		int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
2164 			BNX2X_CIDS_PER_VF;
2165 
2166 		union cdu_context *base_cxt = (union cdu_context *)
2167 			BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2168 			(base_vf_cid & (ILT_PAGE_CIDS-1));
2169 
2170 		DP(BNX2X_MSG_IOV,
2171 		   "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
2172 		   vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
2173 		   BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
2174 
2175 		/* init statically provisioned resources */
2176 		bnx2x_iov_static_resc(bp, vf);
2177 
2178 		/* queues are initialized during VF-ACQUIRE */
2179 
2180 		/* reserve the vf vlan credit */
2181 		bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf));
2182 
2183 		vf->filter_state = 0;
2184 		vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
2185 
2186 		/*  init mcast object - This object will be re-initialized
2187 		 *  during VF-ACQUIRE with the proper cl_id and cid.
2188 		 *  It needs to be initialized here so that it can be safely
2189 		 *  handled by a subsequent FLR flow.
2190 		 */
2191 		bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
2192 				     0xFF, 0xFF, 0xFF,
2193 				     bnx2x_vf_sp(bp, vf, mcast_rdata),
2194 				     bnx2x_vf_sp_map(bp, vf, mcast_rdata),
2195 				     BNX2X_FILTER_MCAST_PENDING,
2196 				     &vf->filter_state,
2197 				     BNX2X_OBJ_TYPE_RX_TX);
2198 
2199 		/* set the mailbox message addresses */
2200 		BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
2201 			(((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
2202 			MBX_MSG_ALIGNED_SIZE);
2203 
2204 		BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
2205 			vfid * MBX_MSG_ALIGNED_SIZE;
2206 
2207 		/* Enable vf mailbox */
2208 		bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
2209 	}
2210 
2211 	/* Final VF init */
2212 	for_each_vf(bp, vfid) {
2213 		struct bnx2x_virtf *vf = BP_VF(bp, vfid);
2214 
2215 		/* fill in the BDF and bars */
2216 		vf->bus = bnx2x_vf_bus(bp, vfid);
2217 		vf->devfn = bnx2x_vf_devfn(bp, vfid);
2218 		bnx2x_vf_set_bars(bp, vf);
2219 
2220 		DP(BNX2X_MSG_IOV,
2221 		   "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
2222 		   vf->abs_vfid, vf->bus, vf->devfn,
2223 		   (unsigned)vf->bars[0].bar, vf->bars[0].size,
2224 		   (unsigned)vf->bars[1].bar, vf->bars[1].size,
2225 		   (unsigned)vf->bars[2].bar, vf->bars[2].size);
2226 	}
2227 
2228 	return 0;
2229 }
2230 
2231 /* called by bnx2x_chip_cleanup */
2232 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
2233 {
2234 	int i;
2235 
2236 	if (!IS_SRIOV(bp))
2237 		return 0;
2238 
2239 	/* release all the VFs */
2240 	for_each_vf(bp, i)
2241 		bnx2x_vf_release(bp, BP_VF(bp, i), true); /* blocking */
2242 
2243 	return 0;
2244 }
2245 
2246 /* called by bnx2x_init_hw_func, returns the next ilt line */
2247 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
2248 {
2249 	int i;
2250 	struct bnx2x_ilt *ilt = BP_ILT(bp);
2251 
2252 	if (!IS_SRIOV(bp))
2253 		return line;
2254 
2255 	/* set vfs ilt lines */
2256 	for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2257 		struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
2258 
2259 		ilt->lines[line+i].page = hw_cxt->addr;
2260 		ilt->lines[line+i].page_mapping = hw_cxt->mapping;
2261 		ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
2262 	}
2263 	return line + i;
2264 }
2265 
2266 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
2267 {
2268 	return ((cid >= BNX2X_FIRST_VF_CID) &&
2269 		((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
2270 }
2271 
2272 static
2273 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
2274 					struct bnx2x_vf_queue *vfq,
2275 					union event_ring_elem *elem)
2276 {
2277 	unsigned long ramrod_flags = 0;
2278 	int rc = 0;
2279 
2280 	/* Always push next commands out, don't wait here */
2281 	set_bit(RAMROD_CONT, &ramrod_flags);
2282 
2283 	switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
2284 	case BNX2X_FILTER_MAC_PENDING:
2285 		rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
2286 					   &ramrod_flags);
2287 		break;
2288 	case BNX2X_FILTER_VLAN_PENDING:
2289 		rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
2290 					    &ramrod_flags);
2291 		break;
2292 	default:
2293 		BNX2X_ERR("Unsupported classification command: %d\n",
2294 			  elem->message.data.eth_event.echo);
2295 		return;
2296 	}
2297 	if (rc < 0)
2298 		BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
2299 	else if (rc > 0)
2300 		DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
2301 }
2302 
2303 static
2304 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
2305 			       struct bnx2x_virtf *vf)
2306 {
2307 	struct bnx2x_mcast_ramrod_params rparam = {NULL};
2308 	int rc;
2309 
2310 	rparam.mcast_obj = &vf->mcast_obj;
2311 	vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
2312 
2313 	/* If there are pending mcast commands - send them */
2314 	if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
2315 		rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
2316 		if (rc < 0)
2317 			BNX2X_ERR("Failed to send pending mcast commands: %d\n",
2318 				  rc);
2319 	}
2320 }
2321 
2322 static
2323 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
2324 				 struct bnx2x_virtf *vf)
2325 {
2326 	smp_mb__before_clear_bit();
2327 	clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
2328 	smp_mb__after_clear_bit();
2329 }
2330 
2331 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
2332 {
2333 	struct bnx2x_virtf *vf;
2334 	int qidx = 0, abs_vfid;
2335 	u8 opcode;
2336 	u16 cid = 0xffff;
2337 
2338 	if (!IS_SRIOV(bp))
2339 		return 1;
2340 
2341 	/* first get the cid - the only events we handle here are cfc-delete
2342 	 * and set-mac completion
2343 	 */
2344 	opcode = elem->message.opcode;
2345 
2346 	switch (opcode) {
2347 	case EVENT_RING_OPCODE_CFC_DEL:
2348 		cid = SW_CID((__force __le32)
2349 			     elem->message.data.cfc_del_event.cid);
2350 		DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
2351 		break;
2352 	case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
2353 	case EVENT_RING_OPCODE_MULTICAST_RULES:
2354 	case EVENT_RING_OPCODE_FILTERS_RULES:
2355 		cid = (elem->message.data.eth_event.echo &
2356 		       BNX2X_SWCID_MASK);
2357 		DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
2358 		break;
2359 	case EVENT_RING_OPCODE_VF_FLR:
2360 		abs_vfid = elem->message.data.vf_flr_event.vf_id;
2361 		DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
2362 		   abs_vfid);
2363 		goto get_vf;
2364 	case EVENT_RING_OPCODE_MALICIOUS_VF:
2365 		abs_vfid = elem->message.data.malicious_vf_event.vf_id;
2366 		DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
2367 		   abs_vfid, elem->message.data.malicious_vf_event.err_id);
2368 		goto get_vf;
2369 	default:
2370 		return 1;
2371 	}
2372 
2373 	/* check if the cid is the VF range */
2374 	if (!bnx2x_iov_is_vf_cid(bp, cid)) {
2375 		DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
2376 		return 1;
2377 	}
2378 
2379 	/* extract vf and rxq index from vf_cid - relies on the following:
2380 	 * 1. vfid on cid reflects the true abs_vfid
2381 	 * 2. The max number of VFs (per path) is 64
2382 	 */
2383 	qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
2384 	abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
2385 get_vf:
2386 	vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
2387 
2388 	if (!vf) {
2389 		BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
2390 			  cid, abs_vfid);
2391 		return 0;
2392 	}
2393 
2394 	switch (opcode) {
2395 	case EVENT_RING_OPCODE_CFC_DEL:
2396 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
2397 		   vf->abs_vfid, qidx);
2398 		vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
2399 						       &vfq_get(vf,
2400 								qidx)->sp_obj,
2401 						       BNX2X_Q_CMD_CFC_DEL);
2402 		break;
2403 	case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
2404 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
2405 		   vf->abs_vfid, qidx);
2406 		bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
2407 		break;
2408 	case EVENT_RING_OPCODE_MULTICAST_RULES:
2409 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
2410 		   vf->abs_vfid, qidx);
2411 		bnx2x_vf_handle_mcast_eqe(bp, vf);
2412 		break;
2413 	case EVENT_RING_OPCODE_FILTERS_RULES:
2414 		DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
2415 		   vf->abs_vfid, qidx);
2416 		bnx2x_vf_handle_filters_eqe(bp, vf);
2417 		break;
2418 	case EVENT_RING_OPCODE_VF_FLR:
2419 		DP(BNX2X_MSG_IOV, "got VF [%d] FLR notification\n",
2420 		   vf->abs_vfid);
2421 		/* Do nothing for now */
2422 		break;
2423 	case EVENT_RING_OPCODE_MALICIOUS_VF:
2424 		DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d error id %x\n",
2425 		   abs_vfid, elem->message.data.malicious_vf_event.err_id);
2426 		/* Do nothing for now */
2427 		break;
2428 	}
2429 	/* SRIOV: reschedule any 'in_progress' operations */
2430 	bnx2x_iov_sp_event(bp, cid, false);
2431 
2432 	return 0;
2433 }
2434 
2435 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
2436 {
2437 	/* extract the vf from vf_cid - relies on the following:
2438 	 * 1. vfid on cid reflects the true abs_vfid
2439 	 * 2. The max number of VFs (per path) is 64
2440 	 */
2441 	int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
2442 	return bnx2x_vf_by_abs_fid(bp, abs_vfid);
2443 }
2444 
2445 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
2446 				struct bnx2x_queue_sp_obj **q_obj)
2447 {
2448 	struct bnx2x_virtf *vf;
2449 
2450 	if (!IS_SRIOV(bp))
2451 		return;
2452 
2453 	vf = bnx2x_vf_by_cid(bp, vf_cid);
2454 
2455 	if (vf) {
2456 		/* extract queue index from vf_cid - relies on the following:
2457 		 * 1. vfid on cid reflects the true abs_vfid
2458 		 * 2. The max number of VFs (per path) is 64
2459 		 */
2460 		int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
2461 		*q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
2462 	} else {
2463 		BNX2X_ERR("No vf matching cid %d\n", vf_cid);
2464 	}
2465 }
2466 
2467 void bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, bool queue_work)
2468 {
2469 	struct bnx2x_virtf *vf;
2470 
2471 	/* check if the cid is the VF range */
2472 	if (!IS_SRIOV(bp) || !bnx2x_iov_is_vf_cid(bp, vf_cid))
2473 		return;
2474 
2475 	vf = bnx2x_vf_by_cid(bp, vf_cid);
2476 	if (vf) {
2477 		/* set in_progress flag */
2478 		atomic_set(&vf->op_in_progress, 1);
2479 		if (queue_work)
2480 			queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
2481 	}
2482 }
2483 
2484 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
2485 {
2486 	int i;
2487 	int first_queue_query_index, num_queues_req;
2488 	dma_addr_t cur_data_offset;
2489 	struct stats_query_entry *cur_query_entry;
2490 	u8 stats_count = 0;
2491 	bool is_fcoe = false;
2492 
2493 	if (!IS_SRIOV(bp))
2494 		return;
2495 
2496 	if (!NO_FCOE(bp))
2497 		is_fcoe = true;
2498 
2499 	/* fcoe adds one global request and one queue request */
2500 	num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
2501 	first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
2502 		(is_fcoe ? 0 : 1);
2503 
2504 	DP(BNX2X_MSG_IOV,
2505 	   "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
2506 	   BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
2507 	   first_queue_query_index + num_queues_req);
2508 
2509 	cur_data_offset = bp->fw_stats_data_mapping +
2510 		offsetof(struct bnx2x_fw_stats_data, queue_stats) +
2511 		num_queues_req * sizeof(struct per_queue_stats);
2512 
2513 	cur_query_entry = &bp->fw_stats_req->
2514 		query[first_queue_query_index + num_queues_req];
2515 
2516 	for_each_vf(bp, i) {
2517 		int j;
2518 		struct bnx2x_virtf *vf = BP_VF(bp, i);
2519 
2520 		if (vf->state != VF_ENABLED) {
2521 			DP(BNX2X_MSG_IOV,
2522 			   "vf %d not enabled so no stats for it\n",
2523 			   vf->abs_vfid);
2524 			continue;
2525 		}
2526 
2527 		DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
2528 		for_each_vfq(vf, j) {
2529 			struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
2530 
2531 			dma_addr_t q_stats_addr =
2532 				vf->fw_stat_map + j * vf->stats_stride;
2533 
2534 			/* collect stats fro active queues only */
2535 			if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
2536 			    BNX2X_Q_LOGICAL_STATE_STOPPED)
2537 				continue;
2538 
2539 			/* create stats query entry for this queue */
2540 			cur_query_entry->kind = STATS_TYPE_QUEUE;
2541 			cur_query_entry->index = vfq_stat_id(vf, rxq);
2542 			cur_query_entry->funcID =
2543 				cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
2544 			cur_query_entry->address.hi =
2545 				cpu_to_le32(U64_HI(q_stats_addr));
2546 			cur_query_entry->address.lo =
2547 				cpu_to_le32(U64_LO(q_stats_addr));
2548 			DP(BNX2X_MSG_IOV,
2549 			   "added address %x %x for vf %d queue %d client %d\n",
2550 			   cur_query_entry->address.hi,
2551 			   cur_query_entry->address.lo, cur_query_entry->funcID,
2552 			   j, cur_query_entry->index);
2553 			cur_query_entry++;
2554 			cur_data_offset += sizeof(struct per_queue_stats);
2555 			stats_count++;
2556 
2557 			/* all stats are coalesced to the leading queue */
2558 			if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
2559 				break;
2560 		}
2561 	}
2562 	bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
2563 }
2564 
2565 void bnx2x_iov_sp_task(struct bnx2x *bp)
2566 {
2567 	int i;
2568 
2569 	if (!IS_SRIOV(bp))
2570 		return;
2571 	/* Iterate over all VFs and invoke state transition for VFs with
2572 	 * 'in-progress' slow-path operations
2573 	 */
2574 	DP(BNX2X_MSG_IOV, "searching for pending vf operations\n");
2575 	for_each_vf(bp, i) {
2576 		struct bnx2x_virtf *vf = BP_VF(bp, i);
2577 
2578 		if (!vf) {
2579 			BNX2X_ERR("VF was null! skipping...\n");
2580 			continue;
2581 		}
2582 
2583 		if (!list_empty(&vf->op_list_head) &&
2584 		    atomic_read(&vf->op_in_progress)) {
2585 			DP(BNX2X_MSG_IOV, "running pending op for vf %d\n", i);
2586 			bnx2x_vfop_cur(bp, vf)->transition(bp, vf);
2587 		}
2588 	}
2589 }
2590 
2591 static inline
2592 struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id)
2593 {
2594 	int i;
2595 	struct bnx2x_virtf *vf = NULL;
2596 
2597 	for_each_vf(bp, i) {
2598 		vf = BP_VF(bp, i);
2599 		if (stat_id >= vf->igu_base_id &&
2600 		    stat_id < vf->igu_base_id + vf_sb_count(vf))
2601 			break;
2602 	}
2603 	return vf;
2604 }
2605 
2606 /* VF API helpers */
2607 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
2608 				u8 enable)
2609 {
2610 	u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
2611 	u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
2612 
2613 	REG_WR(bp, reg, val);
2614 }
2615 
2616 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
2617 {
2618 	int i;
2619 
2620 	for_each_vfq(vf, i)
2621 		bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2622 				    vfq_qzone_id(vf, vfq_get(vf, i)), false);
2623 }
2624 
2625 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
2626 {
2627 	u32 val;
2628 
2629 	/* clear the VF configuration - pretend */
2630 	bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
2631 	val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
2632 	val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
2633 		 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
2634 	REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
2635 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2636 }
2637 
2638 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
2639 {
2640 	return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
2641 		     BNX2X_VF_MAX_QUEUES);
2642 }
2643 
2644 static
2645 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
2646 			    struct vf_pf_resc_request *req_resc)
2647 {
2648 	u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2649 	u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2650 
2651 	return ((req_resc->num_rxqs <= rxq_cnt) &&
2652 		(req_resc->num_txqs <= txq_cnt) &&
2653 		(req_resc->num_sbs <= vf_sb_count(vf))   &&
2654 		(req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
2655 		(req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
2656 }
2657 
2658 /* CORE VF API */
2659 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2660 		     struct vf_pf_resc_request *resc)
2661 {
2662 	int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2663 		BNX2X_CIDS_PER_VF;
2664 
2665 	union cdu_context *base_cxt = (union cdu_context *)
2666 		BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2667 		(base_vf_cid & (ILT_PAGE_CIDS-1));
2668 	int i;
2669 
2670 	/* if state is 'acquired' the VF was not released or FLR'd, in
2671 	 * this case the returned resources match the acquired already
2672 	 * acquired resources. Verify that the requested numbers do
2673 	 * not exceed the already acquired numbers.
2674 	 */
2675 	if (vf->state == VF_ACQUIRED) {
2676 		DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2677 		   vf->abs_vfid);
2678 
2679 		if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2680 			BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2681 				  vf->abs_vfid);
2682 			return -EINVAL;
2683 		}
2684 		return 0;
2685 	}
2686 
2687 	/* Otherwise vf state must be 'free' or 'reset' */
2688 	if (vf->state != VF_FREE && vf->state != VF_RESET) {
2689 		BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2690 			  vf->abs_vfid, vf->state);
2691 		return -EINVAL;
2692 	}
2693 
2694 	/* static allocation:
2695 	 * the global maximum number are fixed per VF. Fail the request if
2696 	 * requested number exceed these globals
2697 	 */
2698 	if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2699 		DP(BNX2X_MSG_IOV,
2700 		   "cannot fulfill vf resource request. Placing maximal available values in response\n");
2701 		/* set the max resource in the vf */
2702 		return -ENOMEM;
2703 	}
2704 
2705 	/* Set resources counters - 0 request means max available */
2706 	vf_sb_count(vf) = resc->num_sbs;
2707 	vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2708 	vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2709 	if (resc->num_mac_filters)
2710 		vf_mac_rules_cnt(vf) = resc->num_mac_filters;
2711 	if (resc->num_vlan_filters)
2712 		vf_vlan_rules_cnt(vf) = resc->num_vlan_filters;
2713 
2714 	DP(BNX2X_MSG_IOV,
2715 	   "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2716 	   vf_sb_count(vf), vf_rxq_count(vf),
2717 	   vf_txq_count(vf), vf_mac_rules_cnt(vf),
2718 	   vf_vlan_rules_cnt(vf));
2719 
2720 	/* Initialize the queues */
2721 	if (!vf->vfqs) {
2722 		DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2723 		return -EINVAL;
2724 	}
2725 
2726 	for_each_vfq(vf, i) {
2727 		struct bnx2x_vf_queue *q = vfq_get(vf, i);
2728 
2729 		if (!q) {
2730 			BNX2X_ERR("q number %d was not allocated\n", i);
2731 			return -EINVAL;
2732 		}
2733 
2734 		q->index = i;
2735 		q->cxt = &((base_cxt + i)->eth);
2736 		q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2737 
2738 		DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2739 		   vf->abs_vfid, i, q->index, q->cid, q->cxt);
2740 
2741 		/* init SP objects */
2742 		bnx2x_vfq_init(bp, vf, q);
2743 	}
2744 	vf->state = VF_ACQUIRED;
2745 	return 0;
2746 }
2747 
2748 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2749 {
2750 	struct bnx2x_func_init_params func_init = {0};
2751 	u16 flags = 0;
2752 	int i;
2753 
2754 	/* the sb resources are initialized at this point, do the
2755 	 * FW/HW initializations
2756 	 */
2757 	for_each_vf_sb(vf, i)
2758 		bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2759 			      vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2760 
2761 	/* Sanity checks */
2762 	if (vf->state != VF_ACQUIRED) {
2763 		DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2764 		   vf->abs_vfid, vf->state);
2765 		return -EINVAL;
2766 	}
2767 
2768 	/* let FLR complete ... */
2769 	msleep(100);
2770 
2771 	/* FLR cleanup epilogue */
2772 	if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2773 		return -EBUSY;
2774 
2775 	/* reset IGU VF statistics: MSIX */
2776 	REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2777 
2778 	/* vf init */
2779 	if (vf->cfg_flags & VF_CFG_STATS)
2780 		flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
2781 
2782 	if (vf->cfg_flags & VF_CFG_TPA)
2783 		flags |= FUNC_FLG_TPA;
2784 
2785 	if (is_vf_multi(vf))
2786 		flags |= FUNC_FLG_RSS;
2787 
2788 	/* function setup */
2789 	func_init.func_flgs = flags;
2790 	func_init.pf_id = BP_FUNC(bp);
2791 	func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2792 	func_init.fw_stat_map = vf->fw_stat_map;
2793 	func_init.spq_map = vf->spq_map;
2794 	func_init.spq_prod = 0;
2795 	bnx2x_func_init(bp, &func_init);
2796 
2797 	/* Enable the vf */
2798 	bnx2x_vf_enable_access(bp, vf->abs_vfid);
2799 	bnx2x_vf_enable_traffic(bp, vf);
2800 
2801 	/* queue protection table */
2802 	for_each_vfq(vf, i)
2803 		bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2804 				    vfq_qzone_id(vf, vfq_get(vf, i)), true);
2805 
2806 	vf->state = VF_ENABLED;
2807 
2808 	/* update vf bulletin board */
2809 	bnx2x_post_vf_bulletin(bp, vf->index);
2810 
2811 	return 0;
2812 }
2813 
2814 struct set_vf_state_cookie {
2815 	struct bnx2x_virtf *vf;
2816 	u8 state;
2817 };
2818 
2819 static void bnx2x_set_vf_state(void *cookie)
2820 {
2821 	struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2822 
2823 	p->vf->state = p->state;
2824 }
2825 
2826 /* VFOP close (teardown the queues, delete mcasts and close HW) */
2827 static void bnx2x_vfop_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2828 {
2829 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2830 	struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
2831 	enum bnx2x_vfop_close_state state = vfop->state;
2832 	struct bnx2x_vfop_cmd cmd = {
2833 		.done = bnx2x_vfop_close,
2834 		.block = false,
2835 	};
2836 
2837 	if (vfop->rc < 0)
2838 		goto op_err;
2839 
2840 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
2841 
2842 	switch (state) {
2843 	case BNX2X_VFOP_CLOSE_QUEUES:
2844 
2845 		if (++(qx->qid) < vf_rxq_count(vf)) {
2846 			vfop->rc = bnx2x_vfop_qdown_cmd(bp, vf, &cmd, qx->qid);
2847 			if (vfop->rc)
2848 				goto op_err;
2849 			return;
2850 		}
2851 
2852 		/* remove multicasts */
2853 		vfop->state = BNX2X_VFOP_CLOSE_HW;
2854 		vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 0, false);
2855 		if (vfop->rc)
2856 			goto op_err;
2857 		return;
2858 
2859 	case BNX2X_VFOP_CLOSE_HW:
2860 
2861 		/* disable the interrupts */
2862 		DP(BNX2X_MSG_IOV, "disabling igu\n");
2863 		bnx2x_vf_igu_disable(bp, vf);
2864 
2865 		/* disable the VF */
2866 		DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2867 		bnx2x_vf_clr_qtbl(bp, vf);
2868 
2869 		goto op_done;
2870 	default:
2871 		bnx2x_vfop_default(state);
2872 	}
2873 op_err:
2874 	BNX2X_ERR("VF[%d] CLOSE error: rc %d\n", vf->abs_vfid, vfop->rc);
2875 op_done:
2876 
2877 	/* need to make sure there are no outstanding stats ramrods which may
2878 	 * cause the device to access the VF's stats buffer which it will free
2879 	 * as soon as we return from the close flow.
2880 	 */
2881 	{
2882 		struct set_vf_state_cookie cookie;
2883 
2884 		cookie.vf = vf;
2885 		cookie.state = VF_ACQUIRED;
2886 		bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2887 	}
2888 
2889 	DP(BNX2X_MSG_IOV, "set state to acquired\n");
2890 	bnx2x_vfop_end(bp, vf, vfop);
2891 }
2892 
2893 int bnx2x_vfop_close_cmd(struct bnx2x *bp,
2894 			 struct bnx2x_virtf *vf,
2895 			 struct bnx2x_vfop_cmd *cmd)
2896 {
2897 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
2898 	if (vfop) {
2899 		vfop->args.qx.qid = -1; /* loop */
2900 		bnx2x_vfop_opset(BNX2X_VFOP_CLOSE_QUEUES,
2901 				 bnx2x_vfop_close, cmd->done);
2902 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_close,
2903 					     cmd->block);
2904 	}
2905 	return -ENOMEM;
2906 }
2907 
2908 /* VF release can be called either: 1. The VF was acquired but
2909  * not enabled 2. the vf was enabled or in the process of being
2910  * enabled
2911  */
2912 static void bnx2x_vfop_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2913 {
2914 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2915 	struct bnx2x_vfop_cmd cmd = {
2916 		.done = bnx2x_vfop_release,
2917 		.block = false,
2918 	};
2919 
2920 	DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
2921 
2922 	if (vfop->rc < 0)
2923 		goto op_err;
2924 
2925 	DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2926 	   vf->state == VF_FREE ? "Free" :
2927 	   vf->state == VF_ACQUIRED ? "Acquired" :
2928 	   vf->state == VF_ENABLED ? "Enabled" :
2929 	   vf->state == VF_RESET ? "Reset" :
2930 	   "Unknown");
2931 
2932 	switch (vf->state) {
2933 	case VF_ENABLED:
2934 		vfop->rc = bnx2x_vfop_close_cmd(bp, vf, &cmd);
2935 		if (vfop->rc)
2936 			goto op_err;
2937 		return;
2938 
2939 	case VF_ACQUIRED:
2940 		DP(BNX2X_MSG_IOV, "about to free resources\n");
2941 		bnx2x_vf_free_resc(bp, vf);
2942 		DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
2943 		goto op_done;
2944 
2945 	case VF_FREE:
2946 	case VF_RESET:
2947 		/* do nothing */
2948 		goto op_done;
2949 	default:
2950 		bnx2x_vfop_default(vf->state);
2951 	}
2952 op_err:
2953 	BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, vfop->rc);
2954 op_done:
2955 	bnx2x_vfop_end(bp, vf, vfop);
2956 }
2957 
2958 static void bnx2x_vfop_rss(struct bnx2x *bp, struct bnx2x_virtf *vf)
2959 {
2960 	struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2961 	enum bnx2x_vfop_rss_state state;
2962 
2963 	if (!vfop) {
2964 		BNX2X_ERR("vfop was null\n");
2965 		return;
2966 	}
2967 
2968 	state = vfop->state;
2969 	bnx2x_vfop_reset_wq(vf);
2970 
2971 	if (vfop->rc < 0)
2972 		goto op_err;
2973 
2974 	DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
2975 
2976 	switch (state) {
2977 	case BNX2X_VFOP_RSS_CONFIG:
2978 		/* next state */
2979 		vfop->state = BNX2X_VFOP_RSS_DONE;
2980 		bnx2x_config_rss(bp, &vfop->op_p->rss);
2981 		bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
2982 op_err:
2983 		BNX2X_ERR("RSS error: rc %d\n", vfop->rc);
2984 op_done:
2985 	case BNX2X_VFOP_RSS_DONE:
2986 		bnx2x_vfop_end(bp, vf, vfop);
2987 		return;
2988 	default:
2989 		bnx2x_vfop_default(state);
2990 	}
2991 op_pending:
2992 	return;
2993 }
2994 
2995 int bnx2x_vfop_release_cmd(struct bnx2x *bp,
2996 			   struct bnx2x_virtf *vf,
2997 			   struct bnx2x_vfop_cmd *cmd)
2998 {
2999 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
3000 	if (vfop) {
3001 		bnx2x_vfop_opset(-1, /* use vf->state */
3002 				 bnx2x_vfop_release, cmd->done);
3003 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_release,
3004 					     cmd->block);
3005 	}
3006 	return -ENOMEM;
3007 }
3008 
3009 int bnx2x_vfop_rss_cmd(struct bnx2x *bp,
3010 		       struct bnx2x_virtf *vf,
3011 		       struct bnx2x_vfop_cmd *cmd)
3012 {
3013 	struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
3014 
3015 	if (vfop) {
3016 		bnx2x_vfop_opset(BNX2X_VFOP_RSS_CONFIG, bnx2x_vfop_rss,
3017 				 cmd->done);
3018 		return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rss,
3019 					     cmd->block);
3020 	}
3021 	return -ENOMEM;
3022 }
3023 
3024 /* VF release ~ VF close + VF release-resources
3025  * Release is the ultimate SW shutdown and is called whenever an
3026  * irrecoverable error is encountered.
3027  */
3028 void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf, bool block)
3029 {
3030 	struct bnx2x_vfop_cmd cmd = {
3031 		.done = NULL,
3032 		.block = block,
3033 	};
3034 	int rc;
3035 
3036 	DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
3037 	bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
3038 
3039 	rc = bnx2x_vfop_release_cmd(bp, vf, &cmd);
3040 	if (rc)
3041 		WARN(rc,
3042 		     "VF[%d] Failed to allocate resources for release op- rc=%d\n",
3043 		     vf->abs_vfid, rc);
3044 }
3045 
3046 static inline void bnx2x_vf_get_sbdf(struct bnx2x *bp,
3047 			      struct bnx2x_virtf *vf, u32 *sbdf)
3048 {
3049 	*sbdf = vf->devfn | (vf->bus << 8);
3050 }
3051 
3052 static inline void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf,
3053 		       struct bnx2x_vf_bar_info *bar_info)
3054 {
3055 	int n;
3056 
3057 	bar_info->nr_bars = bp->vfdb->sriov.nres;
3058 	for (n = 0; n < bar_info->nr_bars; n++)
3059 		bar_info->bars[n] = vf->bars[n];
3060 }
3061 
3062 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
3063 			      enum channel_tlvs tlv)
3064 {
3065 	/* we don't lock the channel for unsupported tlvs */
3066 	if (!bnx2x_tlv_supported(tlv)) {
3067 		BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
3068 		return;
3069 	}
3070 
3071 	/* lock the channel */
3072 	mutex_lock(&vf->op_mutex);
3073 
3074 	/* record the locking op */
3075 	vf->op_current = tlv;
3076 
3077 	/* log the lock */
3078 	DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
3079 	   vf->abs_vfid, tlv);
3080 }
3081 
3082 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
3083 				enum channel_tlvs expected_tlv)
3084 {
3085 	enum channel_tlvs current_tlv;
3086 
3087 	if (!vf) {
3088 		BNX2X_ERR("VF was %p\n", vf);
3089 		return;
3090 	}
3091 
3092 	current_tlv = vf->op_current;
3093 
3094 	/* we don't unlock the channel for unsupported tlvs */
3095 	if (!bnx2x_tlv_supported(expected_tlv))
3096 		return;
3097 
3098 	WARN(expected_tlv != vf->op_current,
3099 	     "lock mismatch: expected %d found %d", expected_tlv,
3100 	     vf->op_current);
3101 
3102 	/* record the locking op */
3103 	vf->op_current = CHANNEL_TLV_NONE;
3104 
3105 	/* lock the channel */
3106 	mutex_unlock(&vf->op_mutex);
3107 
3108 	/* log the unlock */
3109 	DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
3110 	   vf->abs_vfid, vf->op_current);
3111 }
3112 
3113 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
3114 {
3115 	struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
3116 
3117 	if (!IS_SRIOV(bp)) {
3118 		BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
3119 		return -EINVAL;
3120 	}
3121 
3122 	DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
3123 	   num_vfs_param, BNX2X_NR_VIRTFN(bp));
3124 
3125 	/* HW channel is only operational when PF is up */
3126 	if (bp->state != BNX2X_STATE_OPEN) {
3127 		BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
3128 		return -EINVAL;
3129 	}
3130 
3131 	/* we are always bound by the total_vfs in the configuration space */
3132 	if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
3133 		BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
3134 			  num_vfs_param, BNX2X_NR_VIRTFN(bp));
3135 		num_vfs_param = BNX2X_NR_VIRTFN(bp);
3136 	}
3137 
3138 	bp->requested_nr_virtfn = num_vfs_param;
3139 	if (num_vfs_param == 0) {
3140 		pci_disable_sriov(dev);
3141 		return 0;
3142 	} else {
3143 		return bnx2x_enable_sriov(bp);
3144 	}
3145 }
3146 #define IGU_ENTRY_SIZE 4
3147 
3148 int bnx2x_enable_sriov(struct bnx2x *bp)
3149 {
3150 	int rc = 0, req_vfs = bp->requested_nr_virtfn;
3151 	int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
3152 	u32 igu_entry, address;
3153 	u16 num_vf_queues;
3154 
3155 	if (req_vfs == 0)
3156 		return 0;
3157 
3158 	first_vf = bp->vfdb->sriov.first_vf_in_pf;
3159 
3160 	/* statically distribute vf sb pool between VFs */
3161 	num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
3162 			      BP_VFDB(bp)->vf_sbs_pool / req_vfs);
3163 
3164 	/* zero previous values learned from igu cam */
3165 	for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
3166 		struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
3167 
3168 		vf->sb_count = 0;
3169 		vf_sb_count(BP_VF(bp, vf_idx)) = 0;
3170 	}
3171 	bp->vfdb->vf_sbs_pool = 0;
3172 
3173 	/* prepare IGU cam */
3174 	sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
3175 	address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
3176 	for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
3177 		for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
3178 			igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
3179 				vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
3180 				IGU_REG_MAPPING_MEMORY_VALID;
3181 			DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
3182 			   sb_idx, vf_idx);
3183 			REG_WR(bp, address, igu_entry);
3184 			sb_idx++;
3185 			address += IGU_ENTRY_SIZE;
3186 		}
3187 	}
3188 
3189 	/* Reinitialize vf database according to igu cam */
3190 	bnx2x_get_vf_igu_cam_info(bp);
3191 
3192 	DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
3193 	   BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
3194 
3195 	qcount = 0;
3196 	for_each_vf(bp, vf_idx) {
3197 		struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
3198 
3199 		/* set local queue arrays */
3200 		vf->vfqs = &bp->vfdb->vfqs[qcount];
3201 		qcount += vf_sb_count(vf);
3202 		bnx2x_iov_static_resc(bp, vf);
3203 	}
3204 
3205 	/* prepare msix vectors in VF configuration space */
3206 	for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
3207 		bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
3208 		REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
3209 		       num_vf_queues);
3210 		DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
3211 		   vf_idx, num_vf_queues);
3212 	}
3213 	bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
3214 
3215 	/* enable sriov. This will probe all the VFs, and consequentially cause
3216 	 * the "acquire" messages to appear on the VF PF channel.
3217 	 */
3218 	DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
3219 	bnx2x_disable_sriov(bp);
3220 	rc = pci_enable_sriov(bp->pdev, req_vfs);
3221 	if (rc) {
3222 		BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
3223 		return rc;
3224 	}
3225 	DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
3226 	return req_vfs;
3227 }
3228 
3229 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
3230 {
3231 	int vfidx;
3232 	struct pf_vf_bulletin_content *bulletin;
3233 
3234 	DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
3235 	for_each_vf(bp, vfidx) {
3236 	bulletin = BP_VF_BULLETIN(bp, vfidx);
3237 		if (BP_VF(bp, vfidx)->cfg_flags & VF_CFG_VLAN)
3238 			bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0);
3239 	}
3240 }
3241 
3242 void bnx2x_disable_sriov(struct bnx2x *bp)
3243 {
3244 	pci_disable_sriov(bp->pdev);
3245 }
3246 
3247 static int bnx2x_vf_ndo_prep(struct bnx2x *bp, int vfidx,
3248 			     struct bnx2x_virtf **vf,
3249 			     struct pf_vf_bulletin_content **bulletin)
3250 {
3251 	if (bp->state != BNX2X_STATE_OPEN) {
3252 		BNX2X_ERR("vf ndo called though PF is down\n");
3253 		return -EINVAL;
3254 	}
3255 
3256 	if (!IS_SRIOV(bp)) {
3257 		BNX2X_ERR("vf ndo called though sriov is disabled\n");
3258 		return -EINVAL;
3259 	}
3260 
3261 	if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
3262 		BNX2X_ERR("vf ndo called for uninitialized VF. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
3263 			  vfidx, BNX2X_NR_VIRTFN(bp));
3264 		return -EINVAL;
3265 	}
3266 
3267 	/* init members */
3268 	*vf = BP_VF(bp, vfidx);
3269 	*bulletin = BP_VF_BULLETIN(bp, vfidx);
3270 
3271 	if (!*vf) {
3272 		BNX2X_ERR("vf ndo called but vf struct is null. vfidx was %d\n",
3273 			  vfidx);
3274 		return -EINVAL;
3275 	}
3276 
3277 	if (!(*vf)->vfqs) {
3278 		BNX2X_ERR("vf ndo called but vfqs struct is null. Was ndo invoked before dynamically enabling SR-IOV? vfidx was %d\n",
3279 			  vfidx);
3280 		return -EINVAL;
3281 	}
3282 
3283 	if (!*bulletin) {
3284 		BNX2X_ERR("vf ndo called but Bulletin Board struct is null. vfidx was %d\n",
3285 			  vfidx);
3286 		return -EINVAL;
3287 	}
3288 
3289 	return 0;
3290 }
3291 
3292 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
3293 			struct ifla_vf_info *ivi)
3294 {
3295 	struct bnx2x *bp = netdev_priv(dev);
3296 	struct bnx2x_virtf *vf = NULL;
3297 	struct pf_vf_bulletin_content *bulletin = NULL;
3298 	struct bnx2x_vlan_mac_obj *mac_obj;
3299 	struct bnx2x_vlan_mac_obj *vlan_obj;
3300 	int rc;
3301 
3302 	/* sanity and init */
3303 	rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3304 	if (rc)
3305 		return rc;
3306 	mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
3307 	vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
3308 	if (!mac_obj || !vlan_obj) {
3309 		BNX2X_ERR("VF partially initialized\n");
3310 		return -EINVAL;
3311 	}
3312 
3313 	ivi->vf = vfidx;
3314 	ivi->qos = 0;
3315 	ivi->tx_rate = 10000; /* always 10G. TBA take from link struct */
3316 	ivi->spoofchk = 1; /*always enabled */
3317 	if (vf->state == VF_ENABLED) {
3318 		/* mac and vlan are in vlan_mac objects */
3319 		if (validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj)))
3320 			mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
3321 						0, ETH_ALEN);
3322 		if (validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, vlan_obj)))
3323 			vlan_obj->get_n_elements(bp, vlan_obj, 1,
3324 						 (u8 *)&ivi->vlan, 0,
3325 						 VLAN_HLEN);
3326 	} else {
3327 		/* mac */
3328 		if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
3329 			/* mac configured by ndo so its in bulletin board */
3330 			memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
3331 		else
3332 			/* function has not been loaded yet. Show mac as 0s */
3333 			memset(&ivi->mac, 0, ETH_ALEN);
3334 
3335 		/* vlan */
3336 		if (bulletin->valid_bitmap & (1 << VLAN_VALID))
3337 			/* vlan configured by ndo so its in bulletin board */
3338 			memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
3339 		else
3340 			/* function has not been loaded yet. Show vlans as 0s */
3341 			memset(&ivi->vlan, 0, VLAN_HLEN);
3342 	}
3343 
3344 	return 0;
3345 }
3346 
3347 /* New mac for VF. Consider these cases:
3348  * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
3349  *    supply at acquire.
3350  * 2. VF has already been acquired but has not yet initialized - store in local
3351  *    bulletin board. mac will be posted on VF bulletin board after VF init. VF
3352  *    will configure this mac when it is ready.
3353  * 3. VF has already initialized but has not yet setup a queue - post the new
3354  *    mac on VF's bulletin board right now. VF will configure this mac when it
3355  *    is ready.
3356  * 4. VF has already set a queue - delete any macs already configured for this
3357  *    queue and manually config the new mac.
3358  * In any event, once this function has been called refuse any attempts by the
3359  * VF to configure any mac for itself except for this mac. In case of a race
3360  * where the VF fails to see the new post on its bulletin board before sending a
3361  * mac configuration request, the PF will simply fail the request and VF can try
3362  * again after consulting its bulletin board.
3363  */
3364 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
3365 {
3366 	struct bnx2x *bp = netdev_priv(dev);
3367 	int rc, q_logical_state;
3368 	struct bnx2x_virtf *vf = NULL;
3369 	struct pf_vf_bulletin_content *bulletin = NULL;
3370 
3371 	/* sanity and init */
3372 	rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3373 	if (rc)
3374 		return rc;
3375 	if (!is_valid_ether_addr(mac)) {
3376 		BNX2X_ERR("mac address invalid\n");
3377 		return -EINVAL;
3378 	}
3379 
3380 	/* update PF's copy of the VF's bulletin. Will no longer accept mac
3381 	 * configuration requests from vf unless match this mac
3382 	 */
3383 	bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
3384 	memcpy(bulletin->mac, mac, ETH_ALEN);
3385 
3386 	/* Post update on VF's bulletin board */
3387 	rc = bnx2x_post_vf_bulletin(bp, vfidx);
3388 	if (rc) {
3389 		BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
3390 		return rc;
3391 	}
3392 
3393 	q_logical_state =
3394 		bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
3395 	if (vf->state == VF_ENABLED &&
3396 	    q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
3397 		/* configure the mac in device on this vf's queue */
3398 		unsigned long ramrod_flags = 0;
3399 		struct bnx2x_vlan_mac_obj *mac_obj =
3400 			&bnx2x_leading_vfq(vf, mac_obj);
3401 
3402 		rc = validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj));
3403 		if (rc)
3404 			return rc;
3405 
3406 		/* must lock vfpf channel to protect against vf flows */
3407 		bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
3408 
3409 		/* remove existing eth macs */
3410 		rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
3411 		if (rc) {
3412 			BNX2X_ERR("failed to delete eth macs\n");
3413 			rc = -EINVAL;
3414 			goto out;
3415 		}
3416 
3417 		/* remove existing uc list macs */
3418 		rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
3419 		if (rc) {
3420 			BNX2X_ERR("failed to delete uc_list macs\n");
3421 			rc = -EINVAL;
3422 			goto out;
3423 		}
3424 
3425 		/* configure the new mac to device */
3426 		__set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3427 		bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
3428 				  BNX2X_ETH_MAC, &ramrod_flags);
3429 
3430 out:
3431 		bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
3432 	}
3433 
3434 	return 0;
3435 }
3436 
3437 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos)
3438 {
3439 	struct bnx2x *bp = netdev_priv(dev);
3440 	int rc, q_logical_state;
3441 	struct bnx2x_virtf *vf = NULL;
3442 	struct pf_vf_bulletin_content *bulletin = NULL;
3443 
3444 	/* sanity and init */
3445 	rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3446 	if (rc)
3447 		return rc;
3448 
3449 	if (vlan > 4095) {
3450 		BNX2X_ERR("illegal vlan value %d\n", vlan);
3451 		return -EINVAL;
3452 	}
3453 
3454 	DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
3455 	   vfidx, vlan, 0);
3456 
3457 	/* update PF's copy of the VF's bulletin. No point in posting the vlan
3458 	 * to the VF since it doesn't have anything to do with it. But it useful
3459 	 * to store it here in case the VF is not up yet and we can only
3460 	 * configure the vlan later when it does.
3461 	 */
3462 	bulletin->valid_bitmap |= 1 << VLAN_VALID;
3463 	bulletin->vlan = vlan;
3464 
3465 	/* is vf initialized and queue set up? */
3466 	q_logical_state =
3467 		bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
3468 	if (vf->state == VF_ENABLED &&
3469 	    q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
3470 		/* configure the vlan in device on this vf's queue */
3471 		unsigned long ramrod_flags = 0;
3472 		unsigned long vlan_mac_flags = 0;
3473 		struct bnx2x_vlan_mac_obj *vlan_obj =
3474 			&bnx2x_leading_vfq(vf, vlan_obj);
3475 		struct bnx2x_vlan_mac_ramrod_params ramrod_param;
3476 		struct bnx2x_queue_state_params q_params = {NULL};
3477 		struct bnx2x_queue_update_params *update_params;
3478 
3479 		rc = validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj));
3480 		if (rc)
3481 			return rc;
3482 		memset(&ramrod_param, 0, sizeof(ramrod_param));
3483 
3484 		/* must lock vfpf channel to protect against vf flows */
3485 		bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
3486 
3487 		/* remove existing vlans */
3488 		__set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3489 		rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
3490 					  &ramrod_flags);
3491 		if (rc) {
3492 			BNX2X_ERR("failed to delete vlans\n");
3493 			rc = -EINVAL;
3494 			goto out;
3495 		}
3496 
3497 		/* send queue update ramrod to configure default vlan and silent
3498 		 * vlan removal
3499 		 */
3500 		__set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
3501 		q_params.cmd = BNX2X_Q_CMD_UPDATE;
3502 		q_params.q_obj = &bnx2x_leading_vfq(vf, sp_obj);
3503 		update_params = &q_params.params.update;
3504 		__set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
3505 			  &update_params->update_flags);
3506 		__set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
3507 			  &update_params->update_flags);
3508 
3509 		if (vlan == 0) {
3510 			/* if vlan is 0 then we want to leave the VF traffic
3511 			 * untagged, and leave the incoming traffic untouched
3512 			 * (i.e. do not remove any vlan tags).
3513 			 */
3514 			__clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
3515 				    &update_params->update_flags);
3516 			__clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
3517 				    &update_params->update_flags);
3518 		} else {
3519 			/* configure the new vlan to device */
3520 			__set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3521 			ramrod_param.vlan_mac_obj = vlan_obj;
3522 			ramrod_param.ramrod_flags = ramrod_flags;
3523 			ramrod_param.user_req.u.vlan.vlan = vlan;
3524 			ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_ADD;
3525 			rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
3526 			if (rc) {
3527 				BNX2X_ERR("failed to configure vlan\n");
3528 				rc =  -EINVAL;
3529 				goto out;
3530 			}
3531 
3532 			/* configure default vlan to vf queue and set silent
3533 			 * vlan removal (the vf remains unaware of this vlan).
3534 			 */
3535 			update_params = &q_params.params.update;
3536 			__set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
3537 				  &update_params->update_flags);
3538 			__set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
3539 				  &update_params->update_flags);
3540 			update_params->def_vlan = vlan;
3541 		}
3542 
3543 		/* Update the Queue state */
3544 		rc = bnx2x_queue_state_change(bp, &q_params);
3545 		if (rc) {
3546 			BNX2X_ERR("Failed to configure default VLAN\n");
3547 			goto out;
3548 		}
3549 
3550 		/* clear the flag indicating that this VF needs its vlan
3551 		 * (will only be set if the HV configured the Vlan before vf was
3552 		 * up and we were called because the VF came up later
3553 		 */
3554 out:
3555 		vf->cfg_flags &= ~VF_CFG_VLAN;
3556 		bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
3557 	}
3558 	return rc;
3559 }
3560 
3561 /* crc is the first field in the bulletin board. Compute the crc over the
3562  * entire bulletin board excluding the crc field itself. Use the length field
3563  * as the Bulletin Board was posted by a PF with possibly a different version
3564  * from the vf which will sample it. Therefore, the length is computed by the
3565  * PF and the used blindly by the VF.
3566  */
3567 u32 bnx2x_crc_vf_bulletin(struct bnx2x *bp,
3568 			  struct pf_vf_bulletin_content *bulletin)
3569 {
3570 	return crc32(BULLETIN_CRC_SEED,
3571 		 ((u8 *)bulletin) + sizeof(bulletin->crc),
3572 		 bulletin->length - sizeof(bulletin->crc));
3573 }
3574 
3575 /* Check for new posts on the bulletin board */
3576 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
3577 {
3578 	struct pf_vf_bulletin_content bulletin = bp->pf2vf_bulletin->content;
3579 	int attempts;
3580 
3581 	/* bulletin board hasn't changed since last sample */
3582 	if (bp->old_bulletin.version == bulletin.version)
3583 		return PFVF_BULLETIN_UNCHANGED;
3584 
3585 	/* validate crc of new bulletin board */
3586 	if (bp->old_bulletin.version != bp->pf2vf_bulletin->content.version) {
3587 		/* sampling structure in mid post may result with corrupted data
3588 		 * validate crc to ensure coherency.
3589 		 */
3590 		for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
3591 			bulletin = bp->pf2vf_bulletin->content;
3592 			if (bulletin.crc == bnx2x_crc_vf_bulletin(bp,
3593 								  &bulletin))
3594 				break;
3595 			BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
3596 				  bulletin.crc,
3597 				  bnx2x_crc_vf_bulletin(bp, &bulletin));
3598 		}
3599 		if (attempts >= BULLETIN_ATTEMPTS) {
3600 			BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
3601 				  attempts);
3602 			return PFVF_BULLETIN_CRC_ERR;
3603 		}
3604 	}
3605 
3606 	/* the mac address in bulletin board is valid and is new */
3607 	if (bulletin.valid_bitmap & 1 << MAC_ADDR_VALID &&
3608 	    memcmp(bulletin.mac, bp->old_bulletin.mac, ETH_ALEN)) {
3609 		/* update new mac to net device */
3610 		memcpy(bp->dev->dev_addr, bulletin.mac, ETH_ALEN);
3611 	}
3612 
3613 	/* the vlan in bulletin board is valid and is new */
3614 	if (bulletin.valid_bitmap & 1 << VLAN_VALID)
3615 		memcpy(&bulletin.vlan, &bp->old_bulletin.vlan, VLAN_HLEN);
3616 
3617 	/* copy new bulletin board to bp */
3618 	bp->old_bulletin = bulletin;
3619 
3620 	return PFVF_BULLETIN_UPDATED;
3621 }
3622 
3623 void bnx2x_timer_sriov(struct bnx2x *bp)
3624 {
3625 	bnx2x_sample_bulletin(bp);
3626 
3627 	/* if channel is down we need to self destruct */
3628 	if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN) {
3629 		smp_mb__before_clear_bit();
3630 		set_bit(BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3631 			&bp->sp_rtnl_state);
3632 		smp_mb__after_clear_bit();
3633 		schedule_delayed_work(&bp->sp_rtnl_task, 0);
3634 	}
3635 }
3636 
3637 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3638 {
3639 	/* vf doorbells are embedded within the regview */
3640 	return bp->regview + PXP_VF_ADDR_DB_START;
3641 }
3642 
3643 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3644 {
3645 	mutex_init(&bp->vf2pf_mutex);
3646 
3647 	/* allocate vf2pf mailbox for vf to pf channel */
3648 	BNX2X_PCI_ALLOC(bp->vf2pf_mbox, &bp->vf2pf_mbox_mapping,
3649 			sizeof(struct bnx2x_vf_mbx_msg));
3650 
3651 	/* allocate pf 2 vf bulletin board */
3652 	BNX2X_PCI_ALLOC(bp->pf2vf_bulletin, &bp->pf2vf_bulletin_mapping,
3653 			sizeof(union pf_vf_bulletin));
3654 
3655 	return 0;
3656 
3657 alloc_mem_err:
3658 	BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3659 		       sizeof(struct bnx2x_vf_mbx_msg));
3660 	BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
3661 		       sizeof(union pf_vf_bulletin));
3662 	return -ENOMEM;
3663 }
3664 
3665 void bnx2x_iov_channel_down(struct bnx2x *bp)
3666 {
3667 	int vf_idx;
3668 	struct pf_vf_bulletin_content *bulletin;
3669 
3670 	if (!IS_SRIOV(bp))
3671 		return;
3672 
3673 	for_each_vf(bp, vf_idx) {
3674 		/* locate this VFs bulletin board and update the channel down
3675 		 * bit
3676 		 */
3677 		bulletin = BP_VF_BULLETIN(bp, vf_idx);
3678 		bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3679 
3680 		/* update vf bulletin board */
3681 		bnx2x_post_vf_bulletin(bp, vf_idx);
3682 	}
3683 }
3684