14ad79e13SYuval Mintz /* bnx2x_sriov.c: QLogic Everest network driver.
2290ca2bbSAriel Elior *
3247fa82bSYuval Mintz * Copyright 2009-2013 Broadcom Corporation
44ad79e13SYuval Mintz * Copyright 2014 QLogic Corporation
54ad79e13SYuval Mintz * All rights reserved
6290ca2bbSAriel Elior *
74ad79e13SYuval Mintz * Unless you and QLogic execute a separate written software license
8290ca2bbSAriel Elior * agreement governing use of this software, this software is licensed to you
9290ca2bbSAriel Elior * under the terms of the GNU General Public License version 2, available
10290ca2bbSAriel Elior * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
11290ca2bbSAriel Elior *
12290ca2bbSAriel Elior * Notwithstanding the above, under no circumstances may you combine this
134ad79e13SYuval Mintz * software in any way with any other QLogic software provided under a
144ad79e13SYuval Mintz * license other than the GPL, without QLogic's express prior written
15290ca2bbSAriel Elior * consent.
16290ca2bbSAriel Elior *
1708f6dd89SAriel Elior * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
1808f6dd89SAriel Elior * Written by: Shmulik Ravid
1908f6dd89SAriel Elior * Ariel Elior <ariel.elior@qlogic.com>
20290ca2bbSAriel Elior *
21290ca2bbSAriel Elior */
22290ca2bbSAriel Elior #include "bnx2x.h"
23290ca2bbSAriel Elior #include "bnx2x_init.h"
24b56e9670SAriel Elior #include "bnx2x_cmn.h"
253ec9f9caSAriel Elior #include "bnx2x_sp.h"
266411280aSAriel Elior #include <linux/crc32.h>
273ec9f9caSAriel Elior #include <linux/if_vlan.h>
28b56e9670SAriel Elior
296495d15aSDmitry Kravkov static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
306495d15aSDmitry Kravkov struct bnx2x_virtf **vf,
316495d15aSDmitry Kravkov struct pf_vf_bulletin_content **bulletin,
326495d15aSDmitry Kravkov bool test_queue);
336495d15aSDmitry Kravkov
34b56e9670SAriel Elior /* General service functions */
storm_memset_vf_to_pf(struct bnx2x * bp,u16 abs_fid,u16 pf_id)35b56e9670SAriel Elior static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
36b56e9670SAriel Elior u16 pf_id)
37b56e9670SAriel Elior {
38b56e9670SAriel Elior REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
39b56e9670SAriel Elior pf_id);
40b56e9670SAriel Elior REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
41b56e9670SAriel Elior pf_id);
42b56e9670SAriel Elior REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
43b56e9670SAriel Elior pf_id);
44b56e9670SAriel Elior REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
45b56e9670SAriel Elior pf_id);
46b56e9670SAriel Elior }
47b56e9670SAriel Elior
storm_memset_func_en(struct bnx2x * bp,u16 abs_fid,u8 enable)48b56e9670SAriel Elior static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
49b56e9670SAriel Elior u8 enable)
50b56e9670SAriel Elior {
51b56e9670SAriel Elior REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
52b56e9670SAriel Elior enable);
53b56e9670SAriel Elior REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
54b56e9670SAriel Elior enable);
55b56e9670SAriel Elior REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
56b56e9670SAriel Elior enable);
57b56e9670SAriel Elior REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
58b56e9670SAriel Elior enable);
59b56e9670SAriel Elior }
60b56e9670SAriel Elior
bnx2x_vf_idx_by_abs_fid(struct bnx2x * bp,u16 abs_vfid)61290ca2bbSAriel Elior int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
62290ca2bbSAriel Elior {
63290ca2bbSAriel Elior int idx;
64290ca2bbSAriel Elior
65290ca2bbSAriel Elior for_each_vf(bp, idx)
66290ca2bbSAriel Elior if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
67290ca2bbSAriel Elior break;
68290ca2bbSAriel Elior return idx;
69290ca2bbSAriel Elior }
70290ca2bbSAriel Elior
71290ca2bbSAriel Elior static
bnx2x_vf_by_abs_fid(struct bnx2x * bp,u16 abs_vfid)72290ca2bbSAriel Elior struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
73290ca2bbSAriel Elior {
74290ca2bbSAriel Elior u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
75290ca2bbSAriel Elior return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
76290ca2bbSAriel Elior }
77290ca2bbSAriel Elior
bnx2x_vf_igu_ack_sb(struct bnx2x * bp,struct bnx2x_virtf * vf,u8 igu_sb_id,u8 segment,u16 index,u8 op,u8 update)78b93288d5SAriel Elior static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
79b93288d5SAriel Elior u8 igu_sb_id, u8 segment, u16 index, u8 op,
80b93288d5SAriel Elior u8 update)
81b93288d5SAriel Elior {
82b93288d5SAriel Elior /* acking a VF sb through the PF - use the GRC */
83b93288d5SAriel Elior u32 ctl;
84b93288d5SAriel Elior u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
85b93288d5SAriel Elior u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
86b93288d5SAriel Elior u32 func_encode = vf->abs_vfid;
87b93288d5SAriel Elior u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
88b93288d5SAriel Elior struct igu_regular cmd_data = {0};
89b93288d5SAriel Elior
90b93288d5SAriel Elior cmd_data.sb_id_and_flags =
91b93288d5SAriel Elior ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
92b93288d5SAriel Elior (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
93b93288d5SAriel Elior (update << IGU_REGULAR_BUPDATE_SHIFT) |
94b93288d5SAriel Elior (op << IGU_REGULAR_ENABLE_INT_SHIFT));
95b93288d5SAriel Elior
96b93288d5SAriel Elior ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
97b93288d5SAriel Elior func_encode << IGU_CTRL_REG_FID_SHIFT |
98b93288d5SAriel Elior IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
99b93288d5SAriel Elior
100b93288d5SAriel Elior DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
101b93288d5SAriel Elior cmd_data.sb_id_and_flags, igu_addr_data);
102b93288d5SAriel Elior REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
103b93288d5SAriel Elior barrier();
104b93288d5SAriel Elior
105b93288d5SAriel Elior DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
106b93288d5SAriel Elior ctl, igu_addr_ctl);
107b93288d5SAriel Elior REG_WR(bp, igu_addr_ctl, ctl);
108b93288d5SAriel Elior barrier();
109b93288d5SAriel Elior }
1103a3534ecSYuval Mintz
bnx2x_validate_vf_sp_objs(struct bnx2x * bp,struct bnx2x_virtf * vf,bool print_err)1113a3534ecSYuval Mintz static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,
1123a3534ecSYuval Mintz struct bnx2x_virtf *vf,
1133a3534ecSYuval Mintz bool print_err)
1143a3534ecSYuval Mintz {
1153a3534ecSYuval Mintz if (!bnx2x_leading_vfq(vf, sp_initialized)) {
1163a3534ecSYuval Mintz if (print_err)
1173a3534ecSYuval Mintz BNX2X_ERR("Slowpath objects not yet initialized!\n");
1183a3534ecSYuval Mintz else
1193a3534ecSYuval Mintz DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");
1203a3534ecSYuval Mintz return false;
1213a3534ecSYuval Mintz }
1223a3534ecSYuval Mintz return true;
1233a3534ecSYuval Mintz }
1243a3534ecSYuval Mintz
1258db573baSAriel Elior /* VFOP operations states */
bnx2x_vfop_qctor_dump_tx(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_queue_init_params * init_params,struct bnx2x_queue_setup_params * setup_params,u16 q_idx,u16 sb_idx)1268db573baSAriel Elior void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
1278db573baSAriel Elior struct bnx2x_queue_init_params *init_params,
1288db573baSAriel Elior struct bnx2x_queue_setup_params *setup_params,
1298db573baSAriel Elior u16 q_idx, u16 sb_idx)
130290ca2bbSAriel Elior {
1318db573baSAriel Elior DP(BNX2X_MSG_IOV,
1328db573baSAriel Elior "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
1338db573baSAriel Elior vf->abs_vfid,
1348db573baSAriel Elior q_idx,
1358db573baSAriel Elior sb_idx,
1368db573baSAriel Elior init_params->tx.sb_cq_index,
1378db573baSAriel Elior init_params->tx.hc_rate,
1388db573baSAriel Elior setup_params->flags,
1398db573baSAriel Elior setup_params->txq_params.traffic_type);
1408db573baSAriel Elior }
1418db573baSAriel Elior
bnx2x_vfop_qctor_dump_rx(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_queue_init_params * init_params,struct bnx2x_queue_setup_params * setup_params,u16 q_idx,u16 sb_idx)1428db573baSAriel Elior void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
1438db573baSAriel Elior struct bnx2x_queue_init_params *init_params,
1448db573baSAriel Elior struct bnx2x_queue_setup_params *setup_params,
1458db573baSAriel Elior u16 q_idx, u16 sb_idx)
1468db573baSAriel Elior {
1478db573baSAriel Elior struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
1488db573baSAriel Elior
1498db573baSAriel Elior DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
1508db573baSAriel Elior "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
1518db573baSAriel Elior vf->abs_vfid,
1528db573baSAriel Elior q_idx,
1538db573baSAriel Elior sb_idx,
1548db573baSAriel Elior init_params->rx.sb_cq_index,
1558db573baSAriel Elior init_params->rx.hc_rate,
1568db573baSAriel Elior setup_params->gen_params.mtu,
1578db573baSAriel Elior rxq_params->buf_sz,
1588db573baSAriel Elior rxq_params->sge_buf_sz,
1598db573baSAriel Elior rxq_params->max_sges_pkt,
1608db573baSAriel Elior rxq_params->tpa_agg_sz,
1618db573baSAriel Elior setup_params->flags,
1628db573baSAriel Elior rxq_params->drop_flags,
1638db573baSAriel Elior rxq_params->cache_line_log);
1648db573baSAriel Elior }
1658db573baSAriel Elior
bnx2x_vfop_qctor_prep(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_vf_queue * q,struct bnx2x_vf_queue_construct_params * p,unsigned long q_type)1668db573baSAriel Elior void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
1678db573baSAriel Elior struct bnx2x_virtf *vf,
1688db573baSAriel Elior struct bnx2x_vf_queue *q,
1692dc33bbcSYuval Mintz struct bnx2x_vf_queue_construct_params *p,
1708db573baSAriel Elior unsigned long q_type)
1718db573baSAriel Elior {
1728db573baSAriel Elior struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
1738db573baSAriel Elior struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
1748db573baSAriel Elior
1758db573baSAriel Elior /* INIT */
1768db573baSAriel Elior
1778db573baSAriel Elior /* Enable host coalescing in the transition to INIT state */
1788db573baSAriel Elior if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
1798db573baSAriel Elior __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
1808db573baSAriel Elior
1818db573baSAriel Elior if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
1828db573baSAriel Elior __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
1838db573baSAriel Elior
1848db573baSAriel Elior /* FW SB ID */
1858db573baSAriel Elior init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
1868db573baSAriel Elior init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
1878db573baSAriel Elior
1888db573baSAriel Elior /* context */
1898db573baSAriel Elior init_p->cxts[0] = q->cxt;
1908db573baSAriel Elior
1918db573baSAriel Elior /* SETUP */
1928db573baSAriel Elior
1938db573baSAriel Elior /* Setup-op general parameters */
1948db573baSAriel Elior setup_p->gen_params.spcl_id = vf->sp_cl_id;
1958db573baSAriel Elior setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
19602dc4025SYuval Mintz setup_p->gen_params.fp_hsi = vf->fp_hsi;
1978db573baSAriel Elior
1988db573baSAriel Elior /* Setup-op flags:
1998db573baSAriel Elior * collect statistics, zero statistics, local-switching, security,
2008db573baSAriel Elior * OV for Flex10, RSS and MCAST for leading
2018db573baSAriel Elior */
2028db573baSAriel Elior if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
2038db573baSAriel Elior __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
2048db573baSAriel Elior
2058db573baSAriel Elior /* for VFs, enable tx switching, bd coherency, and mac address
2068db573baSAriel Elior * anti-spoofing
2078db573baSAriel Elior */
2088db573baSAriel Elior __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
2098db573baSAriel Elior __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
21075303965SShahed Shaikh if (vf->spoofchk)
2118db573baSAriel Elior __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
21275303965SShahed Shaikh else
21375303965SShahed Shaikh __clear_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
2148db573baSAriel Elior
2158db573baSAriel Elior /* Setup-op rx parameters */
2168db573baSAriel Elior if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
2178db573baSAriel Elior struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
2188db573baSAriel Elior
2198db573baSAriel Elior rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
2208db573baSAriel Elior rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
2218db573baSAriel Elior rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
2228db573baSAriel Elior
2238db573baSAriel Elior if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
2248db573baSAriel Elior rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
2258db573baSAriel Elior }
2268db573baSAriel Elior
2278db573baSAriel Elior /* Setup-op tx parameters */
2288db573baSAriel Elior if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
2298db573baSAriel Elior setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
2308db573baSAriel Elior setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
2318db573baSAriel Elior }
2328db573baSAriel Elior }
2338db573baSAriel Elior
bnx2x_vf_queue_create(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,struct bnx2x_vf_queue_construct_params * qctor)2342dc33bbcSYuval Mintz static int bnx2x_vf_queue_create(struct bnx2x *bp,
2352dc33bbcSYuval Mintz struct bnx2x_virtf *vf, int qid,
2362dc33bbcSYuval Mintz struct bnx2x_vf_queue_construct_params *qctor)
2378db573baSAriel Elior {
2382dc33bbcSYuval Mintz struct bnx2x_queue_state_params *q_params;
2392dc33bbcSYuval Mintz int rc = 0;
2408db573baSAriel Elior
2412dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
2428db573baSAriel Elior
2432dc33bbcSYuval Mintz /* Prepare ramrod information */
2442dc33bbcSYuval Mintz q_params = &qctor->qstate;
2452dc33bbcSYuval Mintz q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2462dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);
2478db573baSAriel Elior
2488db573baSAriel Elior if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
2498db573baSAriel Elior BNX2X_Q_LOGICAL_STATE_ACTIVE) {
2502dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");
2512dc33bbcSYuval Mintz goto out;
2528db573baSAriel Elior }
2538db573baSAriel Elior
2542dc33bbcSYuval Mintz /* Run Queue 'construction' ramrods */
2558db573baSAriel Elior q_params->cmd = BNX2X_Q_CMD_INIT;
2562dc33bbcSYuval Mintz rc = bnx2x_queue_state_change(bp, q_params);
2572dc33bbcSYuval Mintz if (rc)
2582dc33bbcSYuval Mintz goto out;
2598db573baSAriel Elior
2602dc33bbcSYuval Mintz memcpy(&q_params->params.setup, &qctor->prep_qsetup,
2612dc33bbcSYuval Mintz sizeof(struct bnx2x_queue_setup_params));
2628db573baSAriel Elior q_params->cmd = BNX2X_Q_CMD_SETUP;
2632dc33bbcSYuval Mintz rc = bnx2x_queue_state_change(bp, q_params);
2642dc33bbcSYuval Mintz if (rc)
2652dc33bbcSYuval Mintz goto out;
2668db573baSAriel Elior
2678db573baSAriel Elior /* enable interrupts */
2682dc33bbcSYuval Mintz bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),
2698db573baSAriel Elior USTORM_ID, 0, IGU_INT_ENABLE, 0);
2702dc33bbcSYuval Mintz out:
2712dc33bbcSYuval Mintz return rc;
2728db573baSAriel Elior }
2738db573baSAriel Elior
bnx2x_vf_queue_destroy(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid)2742dc33bbcSYuval Mintz static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,
2758db573baSAriel Elior int qid)
2768db573baSAriel Elior {
2772dc33bbcSYuval Mintz enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,
2782dc33bbcSYuval Mintz BNX2X_Q_CMD_TERMINATE,
2792dc33bbcSYuval Mintz BNX2X_Q_CMD_CFC_DEL};
2802dc33bbcSYuval Mintz struct bnx2x_queue_state_params q_params;
2812dc33bbcSYuval Mintz int rc, i;
2828db573baSAriel Elior
2832dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2848db573baSAriel Elior
2852dc33bbcSYuval Mintz /* Prepare ramrod information */
2862dc33bbcSYuval Mintz memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));
2872dc33bbcSYuval Mintz q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2882dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2898db573baSAriel Elior
2902dc33bbcSYuval Mintz if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==
291463a68a7SAriel Elior BNX2X_Q_LOGICAL_STATE_STOPPED) {
2922dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");
2932dc33bbcSYuval Mintz goto out;
294463a68a7SAriel Elior }
295463a68a7SAriel Elior
2962dc33bbcSYuval Mintz /* Run Queue 'destruction' ramrods */
2972dc33bbcSYuval Mintz for (i = 0; i < ARRAY_SIZE(cmds); i++) {
2982dc33bbcSYuval Mintz q_params.cmd = cmds[i];
2992dc33bbcSYuval Mintz rc = bnx2x_queue_state_change(bp, &q_params);
3002dc33bbcSYuval Mintz if (rc) {
3012dc33bbcSYuval Mintz BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);
3022dc33bbcSYuval Mintz return rc;
303b9871bcfSAriel Elior }
304463a68a7SAriel Elior }
3052dc33bbcSYuval Mintz out:
3062dc33bbcSYuval Mintz /* Clean Context */
3072dc33bbcSYuval Mintz if (bnx2x_vfq(vf, qid, cxt)) {
3082dc33bbcSYuval Mintz bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;
3092dc33bbcSYuval Mintz bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;
310463a68a7SAriel Elior }
311463a68a7SAriel Elior
3122dc33bbcSYuval Mintz return 0;
3136b991c37SYuval Mintz }
314463a68a7SAriel Elior
315290ca2bbSAriel Elior static void
bnx2x_vf_set_igu_info(struct bnx2x * bp,u8 igu_sb_id,u8 abs_vfid)316290ca2bbSAriel Elior bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
317290ca2bbSAriel Elior {
318290ca2bbSAriel Elior struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
319290ca2bbSAriel Elior if (vf) {
320b9871bcfSAriel Elior /* the first igu entry belonging to VFs of this PF */
321b9871bcfSAriel Elior if (!BP_VFDB(bp)->first_vf_igu_entry)
322b9871bcfSAriel Elior BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
323b9871bcfSAriel Elior
324b9871bcfSAriel Elior /* the first igu entry belonging to this VF */
325290ca2bbSAriel Elior if (!vf_sb_count(vf))
326290ca2bbSAriel Elior vf->igu_base_id = igu_sb_id;
327b9871bcfSAriel Elior
328290ca2bbSAriel Elior ++vf_sb_count(vf);
329b9871bcfSAriel Elior ++vf->sb_count;
330290ca2bbSAriel Elior }
331b9871bcfSAriel Elior BP_VFDB(bp)->vf_sbs_pool++;
332290ca2bbSAriel Elior }
333290ca2bbSAriel Elior
bnx2x_vf_vlan_mac_clear(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,bool drv_only,int type)3342dc33bbcSYuval Mintz static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,
33505cc5a39SYuval Mintz int qid, bool drv_only, int type)
3368db573baSAriel Elior {
3372dc33bbcSYuval Mintz struct bnx2x_vlan_mac_ramrod_params ramrod;
3382dc33bbcSYuval Mintz int rc;
3398db573baSAriel Elior
3402dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,
34105cc5a39SYuval Mintz (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
34205cc5a39SYuval Mintz (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
3438db573baSAriel Elior
3442dc33bbcSYuval Mintz /* Prepare ramrod params */
3452dc33bbcSYuval Mintz memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
34605cc5a39SYuval Mintz if (type == BNX2X_VF_FILTER_VLAN_MAC) {
34705cc5a39SYuval Mintz set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
34805cc5a39SYuval Mintz ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
34905cc5a39SYuval Mintz } else if (type == BNX2X_VF_FILTER_MAC) {
3502dc33bbcSYuval Mintz set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
3512dc33bbcSYuval Mintz ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
3528db573baSAriel Elior } else {
3532dc33bbcSYuval Mintz ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
354290ca2bbSAriel Elior }
3552dc33bbcSYuval Mintz ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;
356290ca2bbSAriel Elior
3572dc33bbcSYuval Mintz set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
3582dc33bbcSYuval Mintz if (drv_only)
3592dc33bbcSYuval Mintz set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
3602dc33bbcSYuval Mintz else
3612dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
3622dc33bbcSYuval Mintz
3632dc33bbcSYuval Mintz /* Start deleting */
3642dc33bbcSYuval Mintz rc = ramrod.vlan_mac_obj->delete_all(bp,
3652dc33bbcSYuval Mintz ramrod.vlan_mac_obj,
3662dc33bbcSYuval Mintz &ramrod.user_req.vlan_mac_flags,
3672dc33bbcSYuval Mintz &ramrod.ramrod_flags);
3682dc33bbcSYuval Mintz if (rc) {
3692dc33bbcSYuval Mintz BNX2X_ERR("Failed to delete all %s\n",
37005cc5a39SYuval Mintz (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
37105cc5a39SYuval Mintz (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
3728db573baSAriel Elior return rc;
3738db573baSAriel Elior }
3748db573baSAriel Elior
3752dc33bbcSYuval Mintz return 0;
3762dc33bbcSYuval Mintz }
3772dc33bbcSYuval Mintz
bnx2x_vf_mac_vlan_config(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,struct bnx2x_vf_mac_vlan_filter * filter,bool drv_only)3782dc33bbcSYuval Mintz static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
3792dc33bbcSYuval Mintz struct bnx2x_virtf *vf, int qid,
3802dc33bbcSYuval Mintz struct bnx2x_vf_mac_vlan_filter *filter,
3812dc33bbcSYuval Mintz bool drv_only)
382290ca2bbSAriel Elior {
3832dc33bbcSYuval Mintz struct bnx2x_vlan_mac_ramrod_params ramrod;
3842dc33bbcSYuval Mintz int rc;
385290ca2bbSAriel Elior
3862dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",
3872dc33bbcSYuval Mintz vf->abs_vfid, filter->add ? "Adding" : "Deleting",
38805cc5a39SYuval Mintz (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MAC" :
38905cc5a39SYuval Mintz (filter->type == BNX2X_VF_FILTER_MAC) ? "MAC" : "VLAN");
390290ca2bbSAriel Elior
3912dc33bbcSYuval Mintz /* Prepare ramrod params */
3922dc33bbcSYuval Mintz memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
39305cc5a39SYuval Mintz if (filter->type == BNX2X_VF_FILTER_VLAN_MAC) {
39405cc5a39SYuval Mintz ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
39505cc5a39SYuval Mintz ramrod.user_req.u.vlan.vlan = filter->vid;
39605cc5a39SYuval Mintz memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
39705cc5a39SYuval Mintz set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
39805cc5a39SYuval Mintz } else if (filter->type == BNX2X_VF_FILTER_VLAN) {
3992dc33bbcSYuval Mintz ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
4002dc33bbcSYuval Mintz ramrod.user_req.u.vlan.vlan = filter->vid;
4012dc33bbcSYuval Mintz } else {
4022dc33bbcSYuval Mintz set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
4032dc33bbcSYuval Mintz ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
4042dc33bbcSYuval Mintz memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
4058db573baSAriel Elior }
4062dc33bbcSYuval Mintz ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :
4072dc33bbcSYuval Mintz BNX2X_VLAN_MAC_DEL;
408290ca2bbSAriel Elior
4092dc33bbcSYuval Mintz set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
4102dc33bbcSYuval Mintz if (drv_only)
4112dc33bbcSYuval Mintz set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
4122dc33bbcSYuval Mintz else
4132dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
4142dc33bbcSYuval Mintz
4152dc33bbcSYuval Mintz /* Add/Remove the filter */
4162dc33bbcSYuval Mintz rc = bnx2x_config_vlan_mac(bp, &ramrod);
41778d55054SMichal Schmidt if (rc == -EEXIST)
41878d55054SMichal Schmidt return 0;
41978d55054SMichal Schmidt if (rc) {
4202dc33bbcSYuval Mintz BNX2X_ERR("Failed to %s %s\n",
4212dc33bbcSYuval Mintz filter->add ? "add" : "delete",
42205cc5a39SYuval Mintz (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ?
42305cc5a39SYuval Mintz "VLAN-MAC" :
42405cc5a39SYuval Mintz (filter->type == BNX2X_VF_FILTER_MAC) ?
42505cc5a39SYuval Mintz "MAC" : "VLAN");
4262dc33bbcSYuval Mintz return rc;
4272dc33bbcSYuval Mintz }
4282dc33bbcSYuval Mintz
42978d55054SMichal Schmidt filter->applied = true;
43078d55054SMichal Schmidt
4312dc33bbcSYuval Mintz return 0;
4322dc33bbcSYuval Mintz }
4332dc33bbcSYuval Mintz
bnx2x_vf_mac_vlan_config_list(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_vf_mac_vlan_filters * filters,int qid,bool drv_only)4342dc33bbcSYuval Mintz int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,
4352dc33bbcSYuval Mintz struct bnx2x_vf_mac_vlan_filters *filters,
4362dc33bbcSYuval Mintz int qid, bool drv_only)
4372dc33bbcSYuval Mintz {
4382dc33bbcSYuval Mintz int rc = 0, i;
4392dc33bbcSYuval Mintz
4402dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
4412dc33bbcSYuval Mintz
4422dc33bbcSYuval Mintz if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
4432dc33bbcSYuval Mintz return -EINVAL;
4442dc33bbcSYuval Mintz
4452dc33bbcSYuval Mintz /* Prepare ramrod params */
4462dc33bbcSYuval Mintz for (i = 0; i < filters->count; i++) {
4472dc33bbcSYuval Mintz rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,
4482dc33bbcSYuval Mintz &filters->filters[i], drv_only);
4492dc33bbcSYuval Mintz if (rc)
4502dc33bbcSYuval Mintz break;
4512dc33bbcSYuval Mintz }
4522dc33bbcSYuval Mintz
4532dc33bbcSYuval Mintz /* Rollback if needed */
4542dc33bbcSYuval Mintz if (i != filters->count) {
4552dc33bbcSYuval Mintz BNX2X_ERR("Managed only %d/%d filters - rolling back\n",
45674bcbeb7SMichal Schmidt i, filters->count);
4572dc33bbcSYuval Mintz while (--i >= 0) {
45878d55054SMichal Schmidt if (!filters->filters[i].applied)
45978d55054SMichal Schmidt continue;
4602dc33bbcSYuval Mintz filters->filters[i].add = !filters->filters[i].add;
4612dc33bbcSYuval Mintz bnx2x_vf_mac_vlan_config(bp, vf, qid,
4622dc33bbcSYuval Mintz &filters->filters[i],
4632dc33bbcSYuval Mintz drv_only);
4642dc33bbcSYuval Mintz }
4652dc33bbcSYuval Mintz }
4662dc33bbcSYuval Mintz
4672dc33bbcSYuval Mintz /* It's our responsibility to free the filters */
4688db573baSAriel Elior kfree(filters);
4692dc33bbcSYuval Mintz
4702dc33bbcSYuval Mintz return rc;
471290ca2bbSAriel Elior }
472290ca2bbSAriel Elior
bnx2x_vf_queue_setup(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,struct bnx2x_vf_queue_construct_params * qctor)4732dc33bbcSYuval Mintz int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,
4742dc33bbcSYuval Mintz struct bnx2x_vf_queue_construct_params *qctor)
475290ca2bbSAriel Elior {
4762dc33bbcSYuval Mintz int rc;
477290ca2bbSAriel Elior
4782dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
479290ca2bbSAriel Elior
4802dc33bbcSYuval Mintz rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);
4812dc33bbcSYuval Mintz if (rc)
4828db573baSAriel Elior goto op_err;
483290ca2bbSAriel Elior
4842dc33bbcSYuval Mintz /* Schedule the configuration of any pending vlan filters */
485230bb0f3SYuval Mintz bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,
486230bb0f3SYuval Mintz BNX2X_MSG_IOV);
4872dc33bbcSYuval Mintz return 0;
488d16132ceSAriel Elior op_err:
4892dc33bbcSYuval Mintz BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
4902dc33bbcSYuval Mintz return rc;
491d16132ceSAriel Elior }
492d16132ceSAriel Elior
bnx2x_vf_queue_flr(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid)4932dc33bbcSYuval Mintz static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,
494d16132ceSAriel Elior int qid)
495d16132ceSAriel Elior {
4962dc33bbcSYuval Mintz int rc;
497d16132ceSAriel Elior
4982dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
4992dc33bbcSYuval Mintz
5002dc33bbcSYuval Mintz /* If needed, clean the filtering data base */
5013a3534ecSYuval Mintz if ((qid == LEADING_IDX) &&
5022dc33bbcSYuval Mintz bnx2x_validate_vf_sp_objs(bp, vf, false)) {
50305cc5a39SYuval Mintz rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
50405cc5a39SYuval Mintz BNX2X_VF_FILTER_VLAN_MAC);
5052dc33bbcSYuval Mintz if (rc)
5062dc33bbcSYuval Mintz goto op_err;
50705cc5a39SYuval Mintz rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
50805cc5a39SYuval Mintz BNX2X_VF_FILTER_VLAN);
50905cc5a39SYuval Mintz if (rc)
51005cc5a39SYuval Mintz goto op_err;
51105cc5a39SYuval Mintz rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
51205cc5a39SYuval Mintz BNX2X_VF_FILTER_MAC);
5132dc33bbcSYuval Mintz if (rc)
5142dc33bbcSYuval Mintz goto op_err;
515d16132ceSAriel Elior }
5162dc33bbcSYuval Mintz
5172dc33bbcSYuval Mintz /* Terminate queue */
5182dc33bbcSYuval Mintz if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {
5192dc33bbcSYuval Mintz struct bnx2x_queue_state_params qstate;
5202dc33bbcSYuval Mintz
5212dc33bbcSYuval Mintz memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
5222dc33bbcSYuval Mintz qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
5232dc33bbcSYuval Mintz qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;
5242dc33bbcSYuval Mintz qstate.cmd = BNX2X_Q_CMD_TERMINATE;
5252dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
5262dc33bbcSYuval Mintz rc = bnx2x_queue_state_change(bp, &qstate);
5272dc33bbcSYuval Mintz if (rc)
5282dc33bbcSYuval Mintz goto op_err;
5292dc33bbcSYuval Mintz }
5302dc33bbcSYuval Mintz
5312dc33bbcSYuval Mintz return 0;
5322dc33bbcSYuval Mintz op_err:
5332dc33bbcSYuval Mintz BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
5342dc33bbcSYuval Mintz return rc;
5352dc33bbcSYuval Mintz }
5362dc33bbcSYuval Mintz
bnx2x_vf_mcast(struct bnx2x * bp,struct bnx2x_virtf * vf,bnx2x_mac_addr_t * mcasts,int mc_num,bool drv_only)5372dc33bbcSYuval Mintz int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
5382dc33bbcSYuval Mintz bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)
5392dc33bbcSYuval Mintz {
5402dc33bbcSYuval Mintz struct bnx2x_mcast_list_elem *mc = NULL;
5412dc33bbcSYuval Mintz struct bnx2x_mcast_ramrod_params mcast;
5422dc33bbcSYuval Mintz int rc, i;
5432dc33bbcSYuval Mintz
5442dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
5452dc33bbcSYuval Mintz
5462dc33bbcSYuval Mintz /* Prepare Multicast command */
5472dc33bbcSYuval Mintz memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));
5482dc33bbcSYuval Mintz mcast.mcast_obj = &vf->mcast_obj;
5492dc33bbcSYuval Mintz if (drv_only)
5502dc33bbcSYuval Mintz set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);
5512dc33bbcSYuval Mintz else
5522dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);
5532dc33bbcSYuval Mintz if (mc_num) {
5546396bb22SKees Cook mc = kcalloc(mc_num, sizeof(struct bnx2x_mcast_list_elem),
5552dc33bbcSYuval Mintz GFP_KERNEL);
5562dc33bbcSYuval Mintz if (!mc) {
557d939be3aSMasanari Iida BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");
558d16132ceSAriel Elior return -ENOMEM;
559d16132ceSAriel Elior }
5602dc33bbcSYuval Mintz }
561d16132ceSAriel Elior
5622dc33bbcSYuval Mintz if (mc_num) {
5632dc33bbcSYuval Mintz INIT_LIST_HEAD(&mcast.mcast_list);
5642dc33bbcSYuval Mintz for (i = 0; i < mc_num; i++) {
5652dc33bbcSYuval Mintz mc[i].mac = mcasts[i];
5662dc33bbcSYuval Mintz list_add_tail(&mc[i].link,
5672dc33bbcSYuval Mintz &mcast.mcast_list);
5682dc33bbcSYuval Mintz }
569858f4debSYuval Mintz
570954ea748SAriel Elior /* add new mcasts */
571ab15f86bSNarender Kumar mcast.mcast_list_len = mc_num;
572c7b7b483SYuval Mintz rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_SET);
5732dc33bbcSYuval Mintz if (rc)
5749165dabbSMasanari Iida BNX2X_ERR("Failed to set multicasts\n");
575c7b7b483SYuval Mintz } else {
576c7b7b483SYuval Mintz /* clear existing mcasts */
577c7b7b483SYuval Mintz rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);
578c7b7b483SYuval Mintz if (rc)
579c7b7b483SYuval Mintz BNX2X_ERR("Failed to remove multicasts\n");
580954ea748SAriel Elior }
581954ea748SAriel Elior
582c7b7b483SYuval Mintz kfree(mc);
583c7b7b483SYuval Mintz
5842dc33bbcSYuval Mintz return rc;
585954ea748SAriel Elior }
586954ea748SAriel Elior
bnx2x_vf_prep_rx_mode(struct bnx2x * bp,u8 qid,struct bnx2x_rx_mode_ramrod_params * ramrod,struct bnx2x_virtf * vf,unsigned long accept_flags)587e8379c79SYuval Mintz static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
588e8379c79SYuval Mintz struct bnx2x_rx_mode_ramrod_params *ramrod,
589954ea748SAriel Elior struct bnx2x_virtf *vf,
590e8379c79SYuval Mintz unsigned long accept_flags)
591954ea748SAriel Elior {
592954ea748SAriel Elior struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
593954ea748SAriel Elior
594954ea748SAriel Elior memset(ramrod, 0, sizeof(*ramrod));
595954ea748SAriel Elior ramrod->cid = vfq->cid;
596954ea748SAriel Elior ramrod->cl_id = vfq_cl_id(vf, vfq);
597954ea748SAriel Elior ramrod->rx_mode_obj = &bp->rx_mode_obj;
598954ea748SAriel Elior ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
599954ea748SAriel Elior ramrod->rx_accept_flags = accept_flags;
600954ea748SAriel Elior ramrod->tx_accept_flags = accept_flags;
601954ea748SAriel Elior ramrod->pstate = &vf->filter_state;
602954ea748SAriel Elior ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
603954ea748SAriel Elior
604954ea748SAriel Elior set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
605954ea748SAriel Elior set_bit(RAMROD_RX, &ramrod->ramrod_flags);
606954ea748SAriel Elior set_bit(RAMROD_TX, &ramrod->ramrod_flags);
607954ea748SAriel Elior
608e8379c79SYuval Mintz ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
609e8379c79SYuval Mintz ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
610e8379c79SYuval Mintz }
611e8379c79SYuval Mintz
bnx2x_vf_rxmode(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,unsigned long accept_flags)6122dc33bbcSYuval Mintz int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,
613e8379c79SYuval Mintz int qid, unsigned long accept_flags)
614e8379c79SYuval Mintz {
6152dc33bbcSYuval Mintz struct bnx2x_rx_mode_ramrod_params ramrod;
616e8379c79SYuval Mintz
6172dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
618e8379c79SYuval Mintz
6192dc33bbcSYuval Mintz bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);
6202dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
6212dc33bbcSYuval Mintz vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;
6222dc33bbcSYuval Mintz return bnx2x_config_rx_mode(bp, &ramrod);
623954ea748SAriel Elior }
624954ea748SAriel Elior
bnx2x_vf_queue_teardown(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid)6252dc33bbcSYuval Mintz int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)
626463a68a7SAriel Elior {
6272dc33bbcSYuval Mintz int rc;
628463a68a7SAriel Elior
6292dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
6302dc33bbcSYuval Mintz
6312dc33bbcSYuval Mintz /* Remove all classification configuration for leading queue */
6322dc33bbcSYuval Mintz if (qid == LEADING_IDX) {
6332dc33bbcSYuval Mintz rc = bnx2x_vf_rxmode(bp, vf, qid, 0);
6342dc33bbcSYuval Mintz if (rc)
635463a68a7SAriel Elior goto op_err;
636463a68a7SAriel Elior
6372dc33bbcSYuval Mintz /* Remove filtering if feasible */
6382dc33bbcSYuval Mintz if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {
6392dc33bbcSYuval Mintz rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
64005cc5a39SYuval Mintz false,
64105cc5a39SYuval Mintz BNX2X_VF_FILTER_VLAN_MAC);
6422dc33bbcSYuval Mintz if (rc)
643463a68a7SAriel Elior goto op_err;
6442dc33bbcSYuval Mintz rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
64505cc5a39SYuval Mintz false,
64605cc5a39SYuval Mintz BNX2X_VF_FILTER_VLAN);
64705cc5a39SYuval Mintz if (rc)
64805cc5a39SYuval Mintz goto op_err;
64905cc5a39SYuval Mintz rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
65005cc5a39SYuval Mintz false,
65105cc5a39SYuval Mintz BNX2X_VF_FILTER_MAC);
6522dc33bbcSYuval Mintz if (rc)
653463a68a7SAriel Elior goto op_err;
6542dc33bbcSYuval Mintz rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);
6552dc33bbcSYuval Mintz if (rc)
656463a68a7SAriel Elior goto op_err;
6572dc33bbcSYuval Mintz }
6582dc33bbcSYuval Mintz }
659463a68a7SAriel Elior
6602dc33bbcSYuval Mintz /* Destroy queue */
6612dc33bbcSYuval Mintz rc = bnx2x_vf_queue_destroy(bp, vf, qid);
6622dc33bbcSYuval Mintz if (rc)
663858f4debSYuval Mintz goto op_err;
6642dc33bbcSYuval Mintz return rc;
665463a68a7SAriel Elior op_err:
6662dc33bbcSYuval Mintz BNX2X_ERR("vf[%d:%d] error: rc %d\n",
6672dc33bbcSYuval Mintz vf->abs_vfid, qid, rc);
6682dc33bbcSYuval Mintz return rc;
669463a68a7SAriel Elior }
670463a68a7SAriel Elior
671b56e9670SAriel Elior /* VF enable primitives
672b56e9670SAriel Elior * when pretend is required the caller is responsible
673b56e9670SAriel Elior * for calling pretend prior to calling these routines
674b56e9670SAriel Elior */
675b56e9670SAriel Elior
676b56e9670SAriel Elior /* internal vf enable - until vf is enabled internally all transactions
67716a5fd92SYuval Mintz * are blocked. This routine should always be called last with pretend.
678b56e9670SAriel Elior */
bnx2x_vf_enable_internal(struct bnx2x * bp,u8 enable)679b56e9670SAriel Elior static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
680b56e9670SAriel Elior {
681b56e9670SAriel Elior REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
682b56e9670SAriel Elior }
683b56e9670SAriel Elior
684b56e9670SAriel Elior /* clears vf error in all semi blocks */
bnx2x_vf_semi_clear_err(struct bnx2x * bp,u8 abs_vfid)685b56e9670SAriel Elior static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
686b56e9670SAriel Elior {
687b56e9670SAriel Elior REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
688b56e9670SAriel Elior REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
689b56e9670SAriel Elior REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
690b56e9670SAriel Elior REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
691b56e9670SAriel Elior }
692b56e9670SAriel Elior
bnx2x_vf_pglue_clear_err(struct bnx2x * bp,u8 abs_vfid)693b56e9670SAriel Elior static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
694b56e9670SAriel Elior {
695b56e9670SAriel Elior u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
696b56e9670SAriel Elior u32 was_err_reg = 0;
697b56e9670SAriel Elior
698b56e9670SAriel Elior switch (was_err_group) {
699b56e9670SAriel Elior case 0:
700b56e9670SAriel Elior was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
701b56e9670SAriel Elior break;
702b56e9670SAriel Elior case 1:
703b56e9670SAriel Elior was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
704b56e9670SAriel Elior break;
705b56e9670SAriel Elior case 2:
706b56e9670SAriel Elior was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
707b56e9670SAriel Elior break;
708b56e9670SAriel Elior case 3:
709b56e9670SAriel Elior was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
710b56e9670SAriel Elior break;
711b56e9670SAriel Elior }
712b56e9670SAriel Elior REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
713b56e9670SAriel Elior }
714b56e9670SAriel Elior
bnx2x_vf_igu_reset(struct bnx2x * bp,struct bnx2x_virtf * vf)715b93288d5SAriel Elior static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
716b93288d5SAriel Elior {
717b93288d5SAriel Elior int i;
718b93288d5SAriel Elior u32 val;
719b93288d5SAriel Elior
720b93288d5SAriel Elior /* Set VF masks and configuration - pretend */
721b93288d5SAriel Elior bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
722b93288d5SAriel Elior
723b93288d5SAriel Elior REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
724b93288d5SAriel Elior REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
725b93288d5SAriel Elior REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
726b93288d5SAriel Elior REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
727b93288d5SAriel Elior REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
728b93288d5SAriel Elior REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
729b93288d5SAriel Elior
730b93288d5SAriel Elior val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
731b93288d5SAriel Elior val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
732b93288d5SAriel Elior val &= ~IGU_VF_CONF_PARENT_MASK;
733656493d6SYuval Mintz val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
734b93288d5SAriel Elior REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
735b93288d5SAriel Elior
736b93288d5SAriel Elior DP(BNX2X_MSG_IOV,
737656493d6SYuval Mintz "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
738656493d6SYuval Mintz vf->abs_vfid, val);
739b93288d5SAriel Elior
740b93288d5SAriel Elior bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
741b93288d5SAriel Elior
742b93288d5SAriel Elior /* iterate over all queues, clear sb consumer */
743b93288d5SAriel Elior for (i = 0; i < vf_sb_count(vf); i++) {
744b93288d5SAriel Elior u8 igu_sb_id = vf_igu_sb(vf, i);
745b93288d5SAriel Elior
746b93288d5SAriel Elior /* zero prod memory */
747b93288d5SAriel Elior REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
748b93288d5SAriel Elior
749b93288d5SAriel Elior /* clear sb state machine */
750b93288d5SAriel Elior bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
751b93288d5SAriel Elior false /* VF */);
752b93288d5SAriel Elior
753b93288d5SAriel Elior /* disable + update */
754b93288d5SAriel Elior bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
755b93288d5SAriel Elior IGU_INT_DISABLE, 1);
756b93288d5SAriel Elior }
757b93288d5SAriel Elior }
758b93288d5SAriel Elior
bnx2x_vf_enable_access(struct bnx2x * bp,u8 abs_vfid)759b56e9670SAriel Elior void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
760b56e9670SAriel Elior {
761802d4d20SManish Chopra u16 abs_fid;
762802d4d20SManish Chopra
763802d4d20SManish Chopra abs_fid = FW_VF_HANDLE(abs_vfid);
764802d4d20SManish Chopra
765b56e9670SAriel Elior /* set the VF-PF association in the FW */
766802d4d20SManish Chopra storm_memset_vf_to_pf(bp, abs_fid, BP_FUNC(bp));
767802d4d20SManish Chopra storm_memset_func_en(bp, abs_fid, 1);
768802d4d20SManish Chopra
769802d4d20SManish Chopra /* Invalidate fp_hsi version for vfs */
770802d4d20SManish Chopra if (bp->fw_cap & FW_CAP_INVALIDATE_VF_FP_HSI)
771802d4d20SManish Chopra REG_WR8(bp, BAR_XSTRORM_INTMEM +
772802d4d20SManish Chopra XSTORM_ETH_FUNCTION_INFO_FP_HSI_VALID_E2_OFFSET(abs_fid), 0);
773b56e9670SAriel Elior
774b56e9670SAriel Elior /* clear vf errors*/
775b56e9670SAriel Elior bnx2x_vf_semi_clear_err(bp, abs_vfid);
776b56e9670SAriel Elior bnx2x_vf_pglue_clear_err(bp, abs_vfid);
777b56e9670SAriel Elior
778b56e9670SAriel Elior /* internal vf-enable - pretend */
779b56e9670SAriel Elior bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
780b56e9670SAriel Elior DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
781b56e9670SAriel Elior bnx2x_vf_enable_internal(bp, true);
782b56e9670SAriel Elior bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
783b56e9670SAriel Elior }
784b56e9670SAriel Elior
bnx2x_vf_enable_traffic(struct bnx2x * bp,struct bnx2x_virtf * vf)785b93288d5SAriel Elior static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
786b93288d5SAriel Elior {
787b93288d5SAriel Elior /* Reset vf in IGU interrupts are still disabled */
788b93288d5SAriel Elior bnx2x_vf_igu_reset(bp, vf);
789b93288d5SAriel Elior
790b93288d5SAriel Elior /* pretend to enable the vf with the PBF */
791b93288d5SAriel Elior bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
792b93288d5SAriel Elior REG_WR(bp, PBF_REG_DISABLE_VF, 0);
793b93288d5SAriel Elior bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
794b93288d5SAriel Elior }
795b93288d5SAriel Elior
bnx2x_vf_is_pcie_pending(struct bnx2x * bp,u8 abs_vfid)796b56e9670SAriel Elior static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
797b56e9670SAriel Elior {
798b56e9670SAriel Elior struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
799*3637a29cSYang Yingliang struct pci_dev *dev;
800*3637a29cSYang Yingliang bool pending;
801b56e9670SAriel Elior
802b56e9670SAriel Elior if (!vf)
80378c3bcc5SAriel Elior return false;
804b56e9670SAriel Elior
8058307f1a0SSinan Kaya dev = pci_get_domain_bus_and_slot(vf->domain, vf->bus, vf->devfn);
806*3637a29cSYang Yingliang if (!dev)
807b56e9670SAriel Elior return false;
808*3637a29cSYang Yingliang pending = bnx2x_is_pcie_pending(dev);
809*3637a29cSYang Yingliang pci_dev_put(dev);
810*3637a29cSYang Yingliang
811*3637a29cSYang Yingliang return pending;
812b56e9670SAriel Elior }
813b56e9670SAriel Elior
bnx2x_vf_flr_clnup_epilog(struct bnx2x * bp,u8 abs_vfid)814b56e9670SAriel Elior int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
815b56e9670SAriel Elior {
816b56e9670SAriel Elior /* Verify no pending pci transactions */
817b56e9670SAriel Elior if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
818b56e9670SAriel Elior BNX2X_ERR("PCIE Transactions still pending\n");
819b56e9670SAriel Elior
820b56e9670SAriel Elior return 0;
821b56e9670SAriel Elior }
822b56e9670SAriel Elior
823b56e9670SAriel Elior /* must be called after the number of PF queues and the number of VFs are
824b56e9670SAriel Elior * both known
825b56e9670SAriel Elior */
826b56e9670SAriel Elior static void
bnx2x_iov_static_resc(struct bnx2x * bp,struct bnx2x_virtf * vf)827b9871bcfSAriel Elior bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
828b56e9670SAriel Elior {
829b9871bcfSAriel Elior struct vf_pf_resc_request *resc = &vf->alloc_resc;
830b56e9670SAriel Elior
831b56e9670SAriel Elior /* will be set only during VF-ACQUIRE */
832b56e9670SAriel Elior resc->num_rxqs = 0;
833b56e9670SAriel Elior resc->num_txqs = 0;
834b56e9670SAriel Elior
83505cc5a39SYuval Mintz resc->num_mac_filters = VF_MAC_CREDIT_CNT;
83605cc5a39SYuval Mintz resc->num_vlan_filters = VF_VLAN_CREDIT_CNT;
837b56e9670SAriel Elior
838b56e9670SAriel Elior /* no real limitation */
839b56e9670SAriel Elior resc->num_mc_filters = 0;
840b56e9670SAriel Elior
841b56e9670SAriel Elior /* num_sbs already set */
842b9871bcfSAriel Elior resc->num_sbs = vf->sb_count;
843b56e9670SAriel Elior }
844b56e9670SAriel Elior
845f1929b01SAriel Elior /* FLR routines: */
bnx2x_vf_free_resc(struct bnx2x * bp,struct bnx2x_virtf * vf)846f1929b01SAriel Elior static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
847f1929b01SAriel Elior {
848f1929b01SAriel Elior /* reset the state variables */
849b9871bcfSAriel Elior bnx2x_iov_static_resc(bp, vf);
850f1929b01SAriel Elior vf->state = VF_FREE;
851f1929b01SAriel Elior }
852f1929b01SAriel Elior
bnx2x_vf_flr_clnup_hw(struct bnx2x * bp,struct bnx2x_virtf * vf)853d16132ceSAriel Elior static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
854d16132ceSAriel Elior {
855d16132ceSAriel Elior u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
856d16132ceSAriel Elior
857d16132ceSAriel Elior /* DQ usage counter */
858d16132ceSAriel Elior bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
859d16132ceSAriel Elior bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
860d16132ceSAriel Elior "DQ VF usage counter timed out",
861d16132ceSAriel Elior poll_cnt);
862d16132ceSAriel Elior bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
863d16132ceSAriel Elior
864d16132ceSAriel Elior /* FW cleanup command - poll for the results */
865d16132ceSAriel Elior if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
866d16132ceSAriel Elior poll_cnt))
867d16132ceSAriel Elior BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
868d16132ceSAriel Elior
869d16132ceSAriel Elior /* verify TX hw is flushed */
870d16132ceSAriel Elior bnx2x_tx_hw_flushed(bp, poll_cnt);
871d16132ceSAriel Elior }
872d16132ceSAriel Elior
bnx2x_vf_flr(struct bnx2x * bp,struct bnx2x_virtf * vf)8732dc33bbcSYuval Mintz static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
874d16132ceSAriel Elior {
8752dc33bbcSYuval Mintz int rc, i;
876d16132ceSAriel Elior
8772dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
878d16132ceSAriel Elior
879d16132ceSAriel Elior /* the cleanup operations are valid if and only if the VF
880d16132ceSAriel Elior * was first acquired.
881d16132ceSAriel Elior */
8822dc33bbcSYuval Mintz for (i = 0; i < vf_rxq_count(vf); i++) {
8832dc33bbcSYuval Mintz rc = bnx2x_vf_queue_flr(bp, vf, i);
8842dc33bbcSYuval Mintz if (rc)
8852dc33bbcSYuval Mintz goto out;
886d16132ceSAriel Elior }
8872dc33bbcSYuval Mintz
888d16132ceSAriel Elior /* remove multicasts */
8892dc33bbcSYuval Mintz bnx2x_vf_mcast(bp, vf, NULL, 0, true);
890d16132ceSAriel Elior
891d16132ceSAriel Elior /* dispatch final cleanup and wait for HW queues to flush */
892d16132ceSAriel Elior bnx2x_vf_flr_clnup_hw(bp, vf);
893d16132ceSAriel Elior
894d16132ceSAriel Elior /* release VF resources */
895d16132ceSAriel Elior bnx2x_vf_free_resc(bp, vf);
896d16132ceSAriel Elior
89735238822SMintz, Yuval vf->malicious = false;
89835238822SMintz, Yuval
899d16132ceSAriel Elior /* re-open the mailbox */
900d16132ceSAriel Elior bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
9012dc33bbcSYuval Mintz return;
9022dc33bbcSYuval Mintz out:
9032dc33bbcSYuval Mintz BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",
9042dc33bbcSYuval Mintz vf->abs_vfid, i, rc);
905d16132ceSAriel Elior }
906d16132ceSAriel Elior
bnx2x_vf_flr_clnup(struct bnx2x * bp)9072dc33bbcSYuval Mintz static void bnx2x_vf_flr_clnup(struct bnx2x *bp)
908d16132ceSAriel Elior {
909d16132ceSAriel Elior struct bnx2x_virtf *vf;
9102dc33bbcSYuval Mintz int i;
911d16132ceSAriel Elior
9122dc33bbcSYuval Mintz for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {
9132dc33bbcSYuval Mintz /* VF should be RESET & in FLR cleanup states */
9142dc33bbcSYuval Mintz if (bnx2x_vf(bp, i, state) != VF_RESET ||
9152dc33bbcSYuval Mintz !bnx2x_vf(bp, i, flr_clnup_stage))
9162dc33bbcSYuval Mintz continue;
917d16132ceSAriel Elior
9182dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",
9192dc33bbcSYuval Mintz i, BNX2X_NR_VIRTFN(bp));
920d16132ceSAriel Elior
921d16132ceSAriel Elior vf = BP_VF(bp, i);
922d16132ceSAriel Elior
923d16132ceSAriel Elior /* lock the vf pf channel */
924d16132ceSAriel Elior bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
925d16132ceSAriel Elior
926d16132ceSAriel Elior /* invoke the VF FLR SM */
9272dc33bbcSYuval Mintz bnx2x_vf_flr(bp, vf);
928d16132ceSAriel Elior
929d16132ceSAriel Elior /* mark the VF to be ACKED and continue */
9302dc33bbcSYuval Mintz vf->flr_clnup_stage = false;
9312dc33bbcSYuval Mintz bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
932d16132ceSAriel Elior }
933d16132ceSAriel Elior
934d16132ceSAriel Elior /* Acknowledge the handled VFs.
935d16132ceSAriel Elior * we are acknowledge all the vfs which an flr was requested for, even
936d16132ceSAriel Elior * if amongst them there are such that we never opened, since the mcp
937d16132ceSAriel Elior * will interrupt us immediately again if we only ack some of the bits,
938d16132ceSAriel Elior * resulting in an endless loop. This can happen for example in KVM
939d16132ceSAriel Elior * where an 'all ones' flr request is sometimes given by hyper visor
940d16132ceSAriel Elior */
941d16132ceSAriel Elior DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
942d16132ceSAriel Elior bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
943d16132ceSAriel Elior for (i = 0; i < FLRD_VFS_DWORDS; i++)
944d16132ceSAriel Elior SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
945d16132ceSAriel Elior bp->vfdb->flrd_vfs[i]);
946d16132ceSAriel Elior
947d16132ceSAriel Elior bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
948d16132ceSAriel Elior
949d16132ceSAriel Elior /* clear the acked bits - better yet if the MCP implemented
950d16132ceSAriel Elior * write to clear semantics
951d16132ceSAriel Elior */
952d16132ceSAriel Elior for (i = 0; i < FLRD_VFS_DWORDS; i++)
953d16132ceSAriel Elior SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
954d16132ceSAriel Elior }
955d16132ceSAriel Elior
bnx2x_vf_handle_flr_event(struct bnx2x * bp)956d16132ceSAriel Elior void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
957d16132ceSAriel Elior {
958d16132ceSAriel Elior int i;
959d16132ceSAriel Elior
960d16132ceSAriel Elior /* Read FLR'd VFs */
961d16132ceSAriel Elior for (i = 0; i < FLRD_VFS_DWORDS; i++)
962d16132ceSAriel Elior bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
963d16132ceSAriel Elior
964d16132ceSAriel Elior DP(BNX2X_MSG_MCP,
965d16132ceSAriel Elior "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
966d16132ceSAriel Elior bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
967d16132ceSAriel Elior
968d16132ceSAriel Elior for_each_vf(bp, i) {
969d16132ceSAriel Elior struct bnx2x_virtf *vf = BP_VF(bp, i);
970d16132ceSAriel Elior u32 reset = 0;
971d16132ceSAriel Elior
972d16132ceSAriel Elior if (vf->abs_vfid < 32)
973d16132ceSAriel Elior reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
974d16132ceSAriel Elior else
975d16132ceSAriel Elior reset = bp->vfdb->flrd_vfs[1] &
976d16132ceSAriel Elior (1 << (vf->abs_vfid - 32));
977d16132ceSAriel Elior
978d16132ceSAriel Elior if (reset) {
979d16132ceSAriel Elior /* set as reset and ready for cleanup */
980d16132ceSAriel Elior vf->state = VF_RESET;
9812dc33bbcSYuval Mintz vf->flr_clnup_stage = true;
982d16132ceSAriel Elior
983d16132ceSAriel Elior DP(BNX2X_MSG_IOV,
984d16132ceSAriel Elior "Initiating Final cleanup for VF %d\n",
985d16132ceSAriel Elior vf->abs_vfid);
986d16132ceSAriel Elior }
987d16132ceSAriel Elior }
988d16132ceSAriel Elior
989d16132ceSAriel Elior /* do the FLR cleanup for all marked VFs*/
9902dc33bbcSYuval Mintz bnx2x_vf_flr_clnup(bp);
991d16132ceSAriel Elior }
992d16132ceSAriel Elior
993b56e9670SAriel Elior /* IOV global initialization routines */
bnx2x_iov_init_dq(struct bnx2x * bp)994b56e9670SAriel Elior void bnx2x_iov_init_dq(struct bnx2x *bp)
995b56e9670SAriel Elior {
996b56e9670SAriel Elior if (!IS_SRIOV(bp))
997b56e9670SAriel Elior return;
998b56e9670SAriel Elior
999b56e9670SAriel Elior /* Set the DQ such that the CID reflect the abs_vfid */
1000b56e9670SAriel Elior REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1001b56e9670SAriel Elior REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1002b56e9670SAriel Elior
1003b56e9670SAriel Elior /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1004b56e9670SAriel Elior * the PF L2 queues
1005b56e9670SAriel Elior */
1006b56e9670SAriel Elior REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1007b56e9670SAriel Elior
1008b56e9670SAriel Elior /* The VF window size is the log2 of the max number of CIDs per VF */
1009b56e9670SAriel Elior REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1010b56e9670SAriel Elior
1011b56e9670SAriel Elior /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
1012b56e9670SAriel Elior * the Pf doorbell size although the 2 are independent.
1013b56e9670SAriel Elior */
1014b9871bcfSAriel Elior REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1015b56e9670SAriel Elior
1016b56e9670SAriel Elior /* No security checks for now -
1017b56e9670SAriel Elior * configure single rule (out of 16) mask = 0x1, value = 0x0,
1018b56e9670SAriel Elior * CID range 0 - 0x1ffff
1019b56e9670SAriel Elior */
1020b56e9670SAriel Elior REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1021b56e9670SAriel Elior REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1022b56e9670SAriel Elior REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1023b56e9670SAriel Elior REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1024b56e9670SAriel Elior
1025f2cfa997SAriel Elior /* set the VF doorbell threshold. This threshold represents the amount
1026f2cfa997SAriel Elior * of doorbells allowed in the main DORQ fifo for a specific VF.
1027f2cfa997SAriel Elior */
1028f2cfa997SAriel Elior REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);
1029b56e9670SAriel Elior }
1030b56e9670SAriel Elior
bnx2x_iov_init_dmae(struct bnx2x * bp)1031b56e9670SAriel Elior void bnx2x_iov_init_dmae(struct bnx2x *bp)
1032b56e9670SAriel Elior {
103349baea88SAriel Elior if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1034b56e9670SAriel Elior REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1035b56e9670SAriel Elior }
1036b56e9670SAriel Elior
bnx2x_vf_domain(struct bnx2x * bp,int vfid)10378307f1a0SSinan Kaya static int bnx2x_vf_domain(struct bnx2x *bp, int vfid)
10388307f1a0SSinan Kaya {
10398307f1a0SSinan Kaya struct pci_dev *dev = bp->pdev;
10408307f1a0SSinan Kaya
10418307f1a0SSinan Kaya return pci_domain_nr(dev->bus);
10428307f1a0SSinan Kaya }
10438307f1a0SSinan Kaya
bnx2x_vf_bus(struct bnx2x * bp,int vfid)1044b56e9670SAriel Elior static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1045b56e9670SAriel Elior {
1046b56e9670SAriel Elior struct pci_dev *dev = bp->pdev;
1047b56e9670SAriel Elior struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1048b56e9670SAriel Elior
1049b56e9670SAriel Elior return dev->bus->number + ((dev->devfn + iov->offset +
1050b56e9670SAriel Elior iov->stride * vfid) >> 8);
1051b56e9670SAriel Elior }
1052b56e9670SAriel Elior
bnx2x_vf_devfn(struct bnx2x * bp,int vfid)1053b56e9670SAriel Elior static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1054b56e9670SAriel Elior {
1055b56e9670SAriel Elior struct pci_dev *dev = bp->pdev;
1056b56e9670SAriel Elior struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1057b56e9670SAriel Elior
1058b56e9670SAriel Elior return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1059b56e9670SAriel Elior }
1060b56e9670SAriel Elior
bnx2x_vf_set_bars(struct bnx2x * bp,struct bnx2x_virtf * vf)1061b56e9670SAriel Elior static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1062b56e9670SAriel Elior {
1063b56e9670SAriel Elior int i, n;
1064b56e9670SAriel Elior struct pci_dev *dev = bp->pdev;
1065b56e9670SAriel Elior struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1066b56e9670SAriel Elior
1067b56e9670SAriel Elior for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1068b56e9670SAriel Elior u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1069b56e9670SAriel Elior u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1070b56e9670SAriel Elior
10716411280aSAriel Elior size /= iov->total;
1072b56e9670SAriel Elior vf->bars[n].bar = start + size * vf->abs_vfid;
1073b56e9670SAriel Elior vf->bars[n].size = size;
1074b56e9670SAriel Elior }
1075b56e9670SAriel Elior }
1076b56e9670SAriel Elior
10770d8de80fSYuval Mintz static int
bnx2x_get_vf_igu_cam_info(struct bnx2x * bp)10788db573baSAriel Elior bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
10798db573baSAriel Elior {
10808db573baSAriel Elior int sb_id;
10818db573baSAriel Elior u32 val;
1082b9871bcfSAriel Elior u8 fid, current_pf = 0;
10838db573baSAriel Elior
10848db573baSAriel Elior /* IGU in normal mode - read CAM */
10858db573baSAriel Elior for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
10868db573baSAriel Elior val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
10878db573baSAriel Elior if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
10888db573baSAriel Elior continue;
10898db573baSAriel Elior fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1090b9871bcfSAriel Elior if (fid & IGU_FID_ENCODE_IS_PF)
1091b9871bcfSAriel Elior current_pf = fid & IGU_FID_PF_NUM_MASK;
10929ea75dedSAriel Elior else if (current_pf == BP_FUNC(bp))
10938db573baSAriel Elior bnx2x_vf_set_igu_info(bp, sb_id,
10948db573baSAriel Elior (fid & IGU_FID_VF_NUM_MASK));
10958db573baSAriel Elior DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
10968db573baSAriel Elior ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
10978db573baSAriel Elior ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
10988db573baSAriel Elior (fid & IGU_FID_VF_NUM_MASK)), sb_id,
10998db573baSAriel Elior GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
11008db573baSAriel Elior }
1101b9871bcfSAriel Elior DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
11020d8de80fSYuval Mintz return BP_VFDB(bp)->vf_sbs_pool;
11038db573baSAriel Elior }
11048db573baSAriel Elior
__bnx2x_iov_free_vfdb(struct bnx2x * bp)11058db573baSAriel Elior static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
11068db573baSAriel Elior {
11078db573baSAriel Elior if (bp->vfdb) {
11088db573baSAriel Elior kfree(bp->vfdb->vfqs);
11098db573baSAriel Elior kfree(bp->vfdb->vfs);
11108db573baSAriel Elior kfree(bp->vfdb);
11118db573baSAriel Elior }
11128db573baSAriel Elior bp->vfdb = NULL;
11138db573baSAriel Elior }
11148db573baSAriel Elior
bnx2x_sriov_pci_cfg_info(struct bnx2x * bp,struct bnx2x_sriov * iov)11158db573baSAriel Elior static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
11168db573baSAriel Elior {
11178db573baSAriel Elior int pos;
11188db573baSAriel Elior struct pci_dev *dev = bp->pdev;
11198db573baSAriel Elior
11208db573baSAriel Elior pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
11218db573baSAriel Elior if (!pos) {
11228db573baSAriel Elior BNX2X_ERR("failed to find SRIOV capability in device\n");
11238db573baSAriel Elior return -ENODEV;
11248db573baSAriel Elior }
11258db573baSAriel Elior
11268db573baSAriel Elior iov->pos = pos;
11278db573baSAriel Elior DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
11288db573baSAriel Elior pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
11298db573baSAriel Elior pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
11308db573baSAriel Elior pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
11318db573baSAriel Elior pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
11328db573baSAriel Elior pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
11338db573baSAriel Elior pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
11348db573baSAriel Elior pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
11358db573baSAriel Elior pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
11368db573baSAriel Elior
11378db573baSAriel Elior return 0;
11388db573baSAriel Elior }
11398db573baSAriel Elior
bnx2x_sriov_info(struct bnx2x * bp,struct bnx2x_sriov * iov)11408db573baSAriel Elior static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
11418db573baSAriel Elior {
11428db573baSAriel Elior u32 val;
11438db573baSAriel Elior
11448db573baSAriel Elior /* read the SRIOV capability structure
11458db573baSAriel Elior * The fields can be read via configuration read or
11468db573baSAriel Elior * directly from the device (starting at offset PCICFG_OFFSET)
11478db573baSAriel Elior */
11488db573baSAriel Elior if (bnx2x_sriov_pci_cfg_info(bp, iov))
11498db573baSAriel Elior return -ENODEV;
11508db573baSAriel Elior
11518db573baSAriel Elior /* get the number of SRIOV bars */
11528db573baSAriel Elior iov->nres = 0;
11538db573baSAriel Elior
11548db573baSAriel Elior /* read the first_vfid */
11558db573baSAriel Elior val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
11568db573baSAriel Elior iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
11578db573baSAriel Elior * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
11588db573baSAriel Elior
11598db573baSAriel Elior DP(BNX2X_MSG_IOV,
11608db573baSAriel Elior "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
11618db573baSAriel Elior BP_FUNC(bp),
11628db573baSAriel Elior iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
11638db573baSAriel Elior iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
11648db573baSAriel Elior
11658db573baSAriel Elior return 0;
11668db573baSAriel Elior }
11678db573baSAriel Elior
11688db573baSAriel Elior /* must be called after PF bars are mapped */
bnx2x_iov_init_one(struct bnx2x * bp,int int_mode_param,int num_vfs_param)11698db573baSAriel Elior int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
11708db573baSAriel Elior int num_vfs_param)
11718db573baSAriel Elior {
1172b9871bcfSAriel Elior int err, i;
11738db573baSAriel Elior struct bnx2x_sriov *iov;
11748db573baSAriel Elior struct pci_dev *dev = bp->pdev;
11758db573baSAriel Elior
11768db573baSAriel Elior bp->vfdb = NULL;
11778db573baSAriel Elior
11788db573baSAriel Elior /* verify is pf */
11798db573baSAriel Elior if (IS_VF(bp))
11808db573baSAriel Elior return 0;
11818db573baSAriel Elior
11828db573baSAriel Elior /* verify sriov capability is present in configuration space */
11838db573baSAriel Elior if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
11848db573baSAriel Elior return 0;
11858db573baSAriel Elior
11868db573baSAriel Elior /* verify chip revision */
11878db573baSAriel Elior if (CHIP_IS_E1x(bp))
11888db573baSAriel Elior return 0;
11898db573baSAriel Elior
11908db573baSAriel Elior /* check if SRIOV support is turned off */
11918db573baSAriel Elior if (!num_vfs_param)
11928db573baSAriel Elior return 0;
11938db573baSAriel Elior
11948db573baSAriel Elior /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
11958db573baSAriel Elior if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
11968db573baSAriel Elior BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
11978db573baSAriel Elior BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
11988db573baSAriel Elior return 0;
11998db573baSAriel Elior }
12008db573baSAriel Elior
12018db573baSAriel Elior /* SRIOV can be enabled only with MSIX */
12028db573baSAriel Elior if (int_mode_param == BNX2X_INT_MODE_MSI ||
120310938604SAriel Elior int_mode_param == BNX2X_INT_MODE_INTX) {
12048db573baSAriel Elior BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
120510938604SAriel Elior return 0;
120610938604SAriel Elior }
12078db573baSAriel Elior
12088db573baSAriel Elior /* verify ari is enabled */
1209d2746fe5SBjorn Helgaas if (!pci_ari_enabled(bp->pdev->bus)) {
121010938604SAriel Elior BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
121110938604SAriel Elior return 0;
12128db573baSAriel Elior }
12138db573baSAriel Elior
12148db573baSAriel Elior /* verify igu is in normal mode */
12158db573baSAriel Elior if (CHIP_INT_MODE_IS_BC(bp)) {
12168db573baSAriel Elior BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
121710938604SAriel Elior return 0;
12188db573baSAriel Elior }
12198db573baSAriel Elior
12208db573baSAriel Elior /* allocate the vfs database */
12218db573baSAriel Elior bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
12228db573baSAriel Elior if (!bp->vfdb) {
12238db573baSAriel Elior BNX2X_ERR("failed to allocate vf database\n");
12248db573baSAriel Elior err = -ENOMEM;
12258db573baSAriel Elior goto failed;
12268db573baSAriel Elior }
12278db573baSAriel Elior
12288db573baSAriel Elior /* get the sriov info - Linux already collected all the pertinent
12298db573baSAriel Elior * information, however the sriov structure is for the private use
12308db573baSAriel Elior * of the pci module. Also we want this information regardless
12318db573baSAriel Elior * of the hyper-visor.
12328db573baSAriel Elior */
12338db573baSAriel Elior iov = &(bp->vfdb->sriov);
12348db573baSAriel Elior err = bnx2x_sriov_info(bp, iov);
12358db573baSAriel Elior if (err)
12368db573baSAriel Elior goto failed;
12378db573baSAriel Elior
12388db573baSAriel Elior /* SR-IOV capability was enabled but there are no VFs*/
123965161c35SJiapeng Chong if (iov->total == 0) {
124052ce14c1SAdrian Bunk err = 0;
12418db573baSAriel Elior goto failed;
124265161c35SJiapeng Chong }
12438db573baSAriel Elior
12443c76feffSAriel Elior iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
12453c76feffSAriel Elior
12463c76feffSAriel Elior DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
12473c76feffSAriel Elior num_vfs_param, iov->nr_virtfn);
12488db573baSAriel Elior
12498db573baSAriel Elior /* allocate the vf array */
12506396bb22SKees Cook bp->vfdb->vfs = kcalloc(BNX2X_NR_VIRTFN(bp),
12516396bb22SKees Cook sizeof(struct bnx2x_virtf),
12526396bb22SKees Cook GFP_KERNEL);
12538db573baSAriel Elior if (!bp->vfdb->vfs) {
12548db573baSAriel Elior BNX2X_ERR("failed to allocate vf array\n");
12558db573baSAriel Elior err = -ENOMEM;
12568db573baSAriel Elior goto failed;
12578db573baSAriel Elior }
12588db573baSAriel Elior
12598db573baSAriel Elior /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
12608db573baSAriel Elior for_each_vf(bp, i) {
12618db573baSAriel Elior bnx2x_vf(bp, i, index) = i;
12628db573baSAriel Elior bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
12638db573baSAriel Elior bnx2x_vf(bp, i, state) = VF_FREE;
12648db573baSAriel Elior mutex_init(&bnx2x_vf(bp, i, op_mutex));
12658db573baSAriel Elior bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
126675303965SShahed Shaikh /* enable spoofchk by default */
126775303965SShahed Shaikh bnx2x_vf(bp, i, spoofchk) = 1;
12688db573baSAriel Elior }
12698db573baSAriel Elior
12708db573baSAriel Elior /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
12710d8de80fSYuval Mintz if (!bnx2x_get_vf_igu_cam_info(bp)) {
12720d8de80fSYuval Mintz BNX2X_ERR("No entries in IGU CAM for vfs\n");
12730d8de80fSYuval Mintz err = -EINVAL;
12740d8de80fSYuval Mintz goto failed;
12750d8de80fSYuval Mintz }
12768db573baSAriel Elior
12778db573baSAriel Elior /* allocate the queue arrays for all VFs */
12786396bb22SKees Cook bp->vfdb->vfqs = kcalloc(BNX2X_MAX_NUM_VF_QUEUES,
12796396bb22SKees Cook sizeof(struct bnx2x_vf_queue),
12808db573baSAriel Elior GFP_KERNEL);
1281b9871bcfSAriel Elior
12828db573baSAriel Elior if (!bp->vfdb->vfqs) {
12838db573baSAriel Elior BNX2X_ERR("failed to allocate vf queue array\n");
12848db573baSAriel Elior err = -ENOMEM;
12858db573baSAriel Elior goto failed;
12868db573baSAriel Elior }
12878db573baSAriel Elior
1288370d4a26SYuval Mintz /* Prepare the VFs event synchronization mechanism */
1289370d4a26SYuval Mintz mutex_init(&bp->vfdb->event_mutex);
1290370d4a26SYuval Mintz
12916495d15aSDmitry Kravkov mutex_init(&bp->vfdb->bulletin_mutex);
12926495d15aSDmitry Kravkov
1293230d00ebSYuval Mintz if (SHMEM2_HAS(bp, sriov_switch_mode))
1294230d00ebSYuval Mintz SHMEM2_WR(bp, sriov_switch_mode, SRIOV_SWITCH_MODE_VEB);
1295230d00ebSYuval Mintz
12968db573baSAriel Elior return 0;
12978db573baSAriel Elior failed:
12988db573baSAriel Elior DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
12998db573baSAriel Elior __bnx2x_iov_free_vfdb(bp);
13008db573baSAriel Elior return err;
13018db573baSAriel Elior }
13028db573baSAriel Elior
bnx2x_iov_remove_one(struct bnx2x * bp)1303fd1fc79dSAriel Elior void bnx2x_iov_remove_one(struct bnx2x *bp)
1304fd1fc79dSAriel Elior {
1305826cb7b4SAriel Elior int vf_idx;
1306826cb7b4SAriel Elior
1307fd1fc79dSAriel Elior /* if SRIOV is not enabled there's nothing to do */
1308fd1fc79dSAriel Elior if (!IS_SRIOV(bp))
1309fd1fc79dSAriel Elior return;
1310fd1fc79dSAriel Elior
1311a345ce71SYuval Mintz bnx2x_disable_sriov(bp);
13128395be5eSAriel Elior
1313826cb7b4SAriel Elior /* disable access to all VFs */
1314826cb7b4SAriel Elior for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
1315826cb7b4SAriel Elior bnx2x_pretend_func(bp,
1316826cb7b4SAriel Elior HW_VF_HANDLE(bp,
1317826cb7b4SAriel Elior bp->vfdb->sriov.first_vf_in_pf +
1318826cb7b4SAriel Elior vf_idx));
1319826cb7b4SAriel Elior DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
1320826cb7b4SAriel Elior bp->vfdb->sriov.first_vf_in_pf + vf_idx);
1321826cb7b4SAriel Elior bnx2x_vf_enable_internal(bp, 0);
1322826cb7b4SAriel Elior bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1323826cb7b4SAriel Elior }
1324826cb7b4SAriel Elior
1325fd1fc79dSAriel Elior /* free vf database */
1326fd1fc79dSAriel Elior __bnx2x_iov_free_vfdb(bp);
1327fd1fc79dSAriel Elior }
1328fd1fc79dSAriel Elior
bnx2x_iov_free_mem(struct bnx2x * bp)1329b56e9670SAriel Elior void bnx2x_iov_free_mem(struct bnx2x *bp)
1330b56e9670SAriel Elior {
1331b56e9670SAriel Elior int i;
1332b56e9670SAriel Elior
1333b56e9670SAriel Elior if (!IS_SRIOV(bp))
1334b56e9670SAriel Elior return;
1335b56e9670SAriel Elior
1336b56e9670SAriel Elior /* free vfs hw contexts */
1337b56e9670SAriel Elior for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1338b56e9670SAriel Elior struct hw_dma *cxt = &bp->vfdb->context[i];
1339b56e9670SAriel Elior BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
1340b56e9670SAriel Elior }
1341b56e9670SAriel Elior
1342b56e9670SAriel Elior BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
1343b56e9670SAriel Elior BP_VFDB(bp)->sp_dma.mapping,
1344b56e9670SAriel Elior BP_VFDB(bp)->sp_dma.size);
1345b56e9670SAriel Elior
1346b56e9670SAriel Elior BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
1347b56e9670SAriel Elior BP_VF_MBX_DMA(bp)->mapping,
1348b56e9670SAriel Elior BP_VF_MBX_DMA(bp)->size);
1349abc5a021SAriel Elior
1350abc5a021SAriel Elior BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
1351abc5a021SAriel Elior BP_VF_BULLETIN_DMA(bp)->mapping,
1352abc5a021SAriel Elior BP_VF_BULLETIN_DMA(bp)->size);
1353b56e9670SAriel Elior }
1354b56e9670SAriel Elior
bnx2x_iov_alloc_mem(struct bnx2x * bp)1355b56e9670SAriel Elior int bnx2x_iov_alloc_mem(struct bnx2x *bp)
1356b56e9670SAriel Elior {
1357b56e9670SAriel Elior size_t tot_size;
1358b56e9670SAriel Elior int i, rc = 0;
1359b56e9670SAriel Elior
1360b56e9670SAriel Elior if (!IS_SRIOV(bp))
1361b56e9670SAriel Elior return rc;
1362b56e9670SAriel Elior
1363b56e9670SAriel Elior /* allocate vfs hw contexts */
1364b56e9670SAriel Elior tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
1365b56e9670SAriel Elior BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
1366b56e9670SAriel Elior
1367b56e9670SAriel Elior for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1368b56e9670SAriel Elior struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
1369b56e9670SAriel Elior cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
1370b56e9670SAriel Elior
1371b56e9670SAriel Elior if (cxt->size) {
1372cd2b0389SJoe Perches cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);
1373cd2b0389SJoe Perches if (!cxt->addr)
1374cd2b0389SJoe Perches goto alloc_mem_err;
1375b56e9670SAriel Elior } else {
1376b56e9670SAriel Elior cxt->addr = NULL;
1377b56e9670SAriel Elior cxt->mapping = 0;
1378b56e9670SAriel Elior }
1379b56e9670SAriel Elior tot_size -= cxt->size;
1380b56e9670SAriel Elior }
1381b56e9670SAriel Elior
1382b56e9670SAriel Elior /* allocate vfs ramrods dma memory - client_init and set_mac */
1383b56e9670SAriel Elior tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
1384cd2b0389SJoe Perches BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,
1385b56e9670SAriel Elior tot_size);
1386cd2b0389SJoe Perches if (!BP_VFDB(bp)->sp_dma.addr)
1387cd2b0389SJoe Perches goto alloc_mem_err;
1388b56e9670SAriel Elior BP_VFDB(bp)->sp_dma.size = tot_size;
1389b56e9670SAriel Elior
1390b56e9670SAriel Elior /* allocate mailboxes */
1391b56e9670SAriel Elior tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
1392cd2b0389SJoe Perches BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,
1393b56e9670SAriel Elior tot_size);
1394cd2b0389SJoe Perches if (!BP_VF_MBX_DMA(bp)->addr)
1395cd2b0389SJoe Perches goto alloc_mem_err;
1396cd2b0389SJoe Perches
1397b56e9670SAriel Elior BP_VF_MBX_DMA(bp)->size = tot_size;
1398b56e9670SAriel Elior
1399abc5a021SAriel Elior /* allocate local bulletin boards */
1400abc5a021SAriel Elior tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
1401cd2b0389SJoe Perches BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,
1402cd2b0389SJoe Perches tot_size);
1403cd2b0389SJoe Perches if (!BP_VF_BULLETIN_DMA(bp)->addr)
1404cd2b0389SJoe Perches goto alloc_mem_err;
1405cd2b0389SJoe Perches
1406abc5a021SAriel Elior BP_VF_BULLETIN_DMA(bp)->size = tot_size;
1407abc5a021SAriel Elior
1408b56e9670SAriel Elior return 0;
1409b56e9670SAriel Elior
1410b56e9670SAriel Elior alloc_mem_err:
1411b56e9670SAriel Elior return -ENOMEM;
1412b56e9670SAriel Elior }
1413b56e9670SAriel Elior
bnx2x_vfq_init(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_vf_queue * q)14148ca5e17eSAriel Elior static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
14158ca5e17eSAriel Elior struct bnx2x_vf_queue *q)
14168ca5e17eSAriel Elior {
14178ca5e17eSAriel Elior u8 cl_id = vfq_cl_id(vf, q);
14188ca5e17eSAriel Elior u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
14198ca5e17eSAriel Elior unsigned long q_type = 0;
14208ca5e17eSAriel Elior
14218ca5e17eSAriel Elior set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
14228ca5e17eSAriel Elior set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
14238ca5e17eSAriel Elior
14248ca5e17eSAriel Elior /* Queue State object */
14258ca5e17eSAriel Elior bnx2x_init_queue_obj(bp, &q->sp_obj,
14268ca5e17eSAriel Elior cl_id, &q->cid, 1, func_id,
14278ca5e17eSAriel Elior bnx2x_vf_sp(bp, vf, q_data),
14288ca5e17eSAriel Elior bnx2x_vf_sp_map(bp, vf, q_data),
14298ca5e17eSAriel Elior q_type);
14308ca5e17eSAriel Elior
14313a3534ecSYuval Mintz /* sp indication is set only when vlan/mac/etc. are initialized */
14323a3534ecSYuval Mintz q->sp_initialized = false;
14333a3534ecSYuval Mintz
14348ca5e17eSAriel Elior DP(BNX2X_MSG_IOV,
1435b9871bcfSAriel Elior "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
1436b9871bcfSAriel Elior vf->abs_vfid, q->sp_obj.func_id, q->cid);
14378ca5e17eSAriel Elior }
14388ca5e17eSAriel Elior
bnx2x_max_speed_cap(struct bnx2x * bp)14396495d15aSDmitry Kravkov static int bnx2x_max_speed_cap(struct bnx2x *bp)
14406495d15aSDmitry Kravkov {
14416495d15aSDmitry Kravkov u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];
14426495d15aSDmitry Kravkov
14436495d15aSDmitry Kravkov if (supported &
14446495d15aSDmitry Kravkov (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))
14456495d15aSDmitry Kravkov return 20000;
14466495d15aSDmitry Kravkov
14476495d15aSDmitry Kravkov return 10000; /* assume lowest supported speed is 10G */
14486495d15aSDmitry Kravkov }
14496495d15aSDmitry Kravkov
bnx2x_iov_link_update_vf(struct bnx2x * bp,int idx)14506495d15aSDmitry Kravkov int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)
14516495d15aSDmitry Kravkov {
14526495d15aSDmitry Kravkov struct bnx2x_link_report_data *state = &bp->last_reported_link;
14536495d15aSDmitry Kravkov struct pf_vf_bulletin_content *bulletin;
14546495d15aSDmitry Kravkov struct bnx2x_virtf *vf;
14556495d15aSDmitry Kravkov bool update = true;
14566495d15aSDmitry Kravkov int rc = 0;
14576495d15aSDmitry Kravkov
14586495d15aSDmitry Kravkov /* sanity and init */
14596495d15aSDmitry Kravkov rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);
14606495d15aSDmitry Kravkov if (rc)
14616495d15aSDmitry Kravkov return rc;
14626495d15aSDmitry Kravkov
14636495d15aSDmitry Kravkov mutex_lock(&bp->vfdb->bulletin_mutex);
14646495d15aSDmitry Kravkov
14656495d15aSDmitry Kravkov if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {
14666495d15aSDmitry Kravkov bulletin->valid_bitmap |= 1 << LINK_VALID;
14676495d15aSDmitry Kravkov
14686495d15aSDmitry Kravkov bulletin->link_speed = state->line_speed;
14696495d15aSDmitry Kravkov bulletin->link_flags = 0;
14706495d15aSDmitry Kravkov if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
14716495d15aSDmitry Kravkov &state->link_report_flags))
14726495d15aSDmitry Kravkov bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
14736495d15aSDmitry Kravkov if (test_bit(BNX2X_LINK_REPORT_FD,
14746495d15aSDmitry Kravkov &state->link_report_flags))
14756495d15aSDmitry Kravkov bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;
14766495d15aSDmitry Kravkov if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
14776495d15aSDmitry Kravkov &state->link_report_flags))
14786495d15aSDmitry Kravkov bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;
14796495d15aSDmitry Kravkov if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
14806495d15aSDmitry Kravkov &state->link_report_flags))
14816495d15aSDmitry Kravkov bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;
14826495d15aSDmitry Kravkov } else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&
14836495d15aSDmitry Kravkov !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
14846495d15aSDmitry Kravkov bulletin->valid_bitmap |= 1 << LINK_VALID;
14856495d15aSDmitry Kravkov bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
14866495d15aSDmitry Kravkov } else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&
14876495d15aSDmitry Kravkov (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
14886495d15aSDmitry Kravkov bulletin->valid_bitmap |= 1 << LINK_VALID;
14896495d15aSDmitry Kravkov bulletin->link_speed = bnx2x_max_speed_cap(bp);
14906495d15aSDmitry Kravkov bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;
14916495d15aSDmitry Kravkov } else {
14926495d15aSDmitry Kravkov update = false;
14936495d15aSDmitry Kravkov }
14946495d15aSDmitry Kravkov
14956495d15aSDmitry Kravkov if (update) {
14966495d15aSDmitry Kravkov DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,
14976495d15aSDmitry Kravkov "vf %d mode %u speed %d flags %x\n", idx,
14986495d15aSDmitry Kravkov vf->link_cfg, bulletin->link_speed, bulletin->link_flags);
14996495d15aSDmitry Kravkov
15006495d15aSDmitry Kravkov /* Post update on VF's bulletin board */
15016495d15aSDmitry Kravkov rc = bnx2x_post_vf_bulletin(bp, idx);
15026495d15aSDmitry Kravkov if (rc) {
15036495d15aSDmitry Kravkov BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);
15046495d15aSDmitry Kravkov goto out;
15056495d15aSDmitry Kravkov }
15066495d15aSDmitry Kravkov }
15076495d15aSDmitry Kravkov
15086495d15aSDmitry Kravkov out:
15096495d15aSDmitry Kravkov mutex_unlock(&bp->vfdb->bulletin_mutex);
15106495d15aSDmitry Kravkov return rc;
15116495d15aSDmitry Kravkov }
15126495d15aSDmitry Kravkov
bnx2x_set_vf_link_state(struct net_device * dev,int idx,int link_state)15136495d15aSDmitry Kravkov int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)
15146495d15aSDmitry Kravkov {
15156495d15aSDmitry Kravkov struct bnx2x *bp = netdev_priv(dev);
15166495d15aSDmitry Kravkov struct bnx2x_virtf *vf = BP_VF(bp, idx);
15176495d15aSDmitry Kravkov
15186495d15aSDmitry Kravkov if (!vf)
15196495d15aSDmitry Kravkov return -EINVAL;
15206495d15aSDmitry Kravkov
15216495d15aSDmitry Kravkov if (vf->link_cfg == link_state)
15226495d15aSDmitry Kravkov return 0; /* nothing todo */
15236495d15aSDmitry Kravkov
15246495d15aSDmitry Kravkov vf->link_cfg = link_state;
15256495d15aSDmitry Kravkov
15266495d15aSDmitry Kravkov return bnx2x_iov_link_update_vf(bp, idx);
15276495d15aSDmitry Kravkov }
15286495d15aSDmitry Kravkov
bnx2x_iov_link_update(struct bnx2x * bp)15296495d15aSDmitry Kravkov void bnx2x_iov_link_update(struct bnx2x *bp)
15306495d15aSDmitry Kravkov {
15316495d15aSDmitry Kravkov int vfid;
15326495d15aSDmitry Kravkov
15336495d15aSDmitry Kravkov if (!IS_SRIOV(bp))
15346495d15aSDmitry Kravkov return;
15356495d15aSDmitry Kravkov
15366495d15aSDmitry Kravkov for_each_vf(bp, vfid)
15376495d15aSDmitry Kravkov bnx2x_iov_link_update_vf(bp, vfid);
15386495d15aSDmitry Kravkov }
15396495d15aSDmitry Kravkov
1540b56e9670SAriel Elior /* called by bnx2x_nic_load */
bnx2x_iov_nic_init(struct bnx2x * bp)1541b56e9670SAriel Elior int bnx2x_iov_nic_init(struct bnx2x *bp)
1542b56e9670SAriel Elior {
1543b9871bcfSAriel Elior int vfid;
1544b56e9670SAriel Elior
1545b56e9670SAriel Elior if (!IS_SRIOV(bp)) {
1546b56e9670SAriel Elior DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
1547b56e9670SAriel Elior return 0;
1548b56e9670SAriel Elior }
1549b56e9670SAriel Elior
1550b56e9670SAriel Elior DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
1551b56e9670SAriel Elior
155203c22ea3SAriel Elior /* let FLR complete ... */
155303c22ea3SAriel Elior msleep(100);
155403c22ea3SAriel Elior
1555b56e9670SAriel Elior /* initialize vf database */
1556b56e9670SAriel Elior for_each_vf(bp, vfid) {
1557b56e9670SAriel Elior struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1558b56e9670SAriel Elior
1559b56e9670SAriel Elior int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
1560b56e9670SAriel Elior BNX2X_CIDS_PER_VF;
1561b56e9670SAriel Elior
1562b56e9670SAriel Elior union cdu_context *base_cxt = (union cdu_context *)
1563b56e9670SAriel Elior BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
1564b56e9670SAriel Elior (base_vf_cid & (ILT_PAGE_CIDS-1));
1565b56e9670SAriel Elior
1566b56e9670SAriel Elior DP(BNX2X_MSG_IOV,
1567b56e9670SAriel Elior "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
1568b56e9670SAriel Elior vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
1569b56e9670SAriel Elior BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
1570b56e9670SAriel Elior
1571b56e9670SAriel Elior /* init statically provisioned resources */
1572b9871bcfSAriel Elior bnx2x_iov_static_resc(bp, vf);
1573b56e9670SAriel Elior
1574b56e9670SAriel Elior /* queues are initialized during VF-ACQUIRE */
1575b56e9670SAriel Elior vf->filter_state = 0;
1576b56e9670SAriel Elior vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1577b56e9670SAriel Elior
157805cc5a39SYuval Mintz bnx2x_init_credit_pool(&vf->vf_vlans_pool, 0,
157905cc5a39SYuval Mintz vf_vlan_rules_cnt(vf));
158005cc5a39SYuval Mintz bnx2x_init_credit_pool(&vf->vf_macs_pool, 0,
158105cc5a39SYuval Mintz vf_mac_rules_cnt(vf));
158205cc5a39SYuval Mintz
1583b56e9670SAriel Elior /* init mcast object - This object will be re-initialized
1584b56e9670SAriel Elior * during VF-ACQUIRE with the proper cl_id and cid.
1585b56e9670SAriel Elior * It needs to be initialized here so that it can be safely
1586b56e9670SAriel Elior * handled by a subsequent FLR flow.
1587b56e9670SAriel Elior */
1588b56e9670SAriel Elior bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
1589b56e9670SAriel Elior 0xFF, 0xFF, 0xFF,
1590b56e9670SAriel Elior bnx2x_vf_sp(bp, vf, mcast_rdata),
1591b56e9670SAriel Elior bnx2x_vf_sp_map(bp, vf, mcast_rdata),
1592b56e9670SAriel Elior BNX2X_FILTER_MCAST_PENDING,
1593b56e9670SAriel Elior &vf->filter_state,
1594b56e9670SAriel Elior BNX2X_OBJ_TYPE_RX_TX);
1595b56e9670SAriel Elior
1596b56e9670SAriel Elior /* set the mailbox message addresses */
1597b56e9670SAriel Elior BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
1598b56e9670SAriel Elior (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
1599b56e9670SAriel Elior MBX_MSG_ALIGNED_SIZE);
1600b56e9670SAriel Elior
1601b56e9670SAriel Elior BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
1602b56e9670SAriel Elior vfid * MBX_MSG_ALIGNED_SIZE;
1603b56e9670SAriel Elior
1604b56e9670SAriel Elior /* Enable vf mailbox */
1605b56e9670SAriel Elior bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1606b56e9670SAriel Elior }
1607b56e9670SAriel Elior
1608b56e9670SAriel Elior /* Final VF init */
1609b9871bcfSAriel Elior for_each_vf(bp, vfid) {
1610b9871bcfSAriel Elior struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1611b56e9670SAriel Elior
1612b56e9670SAriel Elior /* fill in the BDF and bars */
16138307f1a0SSinan Kaya vf->domain = bnx2x_vf_domain(bp, vfid);
1614b9871bcfSAriel Elior vf->bus = bnx2x_vf_bus(bp, vfid);
1615b9871bcfSAriel Elior vf->devfn = bnx2x_vf_devfn(bp, vfid);
1616b56e9670SAriel Elior bnx2x_vf_set_bars(bp, vf);
1617b56e9670SAriel Elior
1618b56e9670SAriel Elior DP(BNX2X_MSG_IOV,
1619b56e9670SAriel Elior "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
1620b56e9670SAriel Elior vf->abs_vfid, vf->bus, vf->devfn,
1621b56e9670SAriel Elior (unsigned)vf->bars[0].bar, vf->bars[0].size,
1622b56e9670SAriel Elior (unsigned)vf->bars[1].bar, vf->bars[1].size,
1623b56e9670SAriel Elior (unsigned)vf->bars[2].bar, vf->bars[2].size);
1624b56e9670SAriel Elior }
1625b56e9670SAriel Elior
1626b56e9670SAriel Elior return 0;
1627b56e9670SAriel Elior }
1628290ca2bbSAriel Elior
1629f1929b01SAriel Elior /* called by bnx2x_chip_cleanup */
bnx2x_iov_chip_cleanup(struct bnx2x * bp)1630f1929b01SAriel Elior int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
1631f1929b01SAriel Elior {
1632f1929b01SAriel Elior int i;
1633f1929b01SAriel Elior
1634f1929b01SAriel Elior if (!IS_SRIOV(bp))
1635f1929b01SAriel Elior return 0;
1636f1929b01SAriel Elior
1637f1929b01SAriel Elior /* release all the VFs */
1638f1929b01SAriel Elior for_each_vf(bp, i)
16392dc33bbcSYuval Mintz bnx2x_vf_release(bp, BP_VF(bp, i));
1640f1929b01SAriel Elior
1641f1929b01SAriel Elior return 0;
1642f1929b01SAriel Elior }
1643f1929b01SAriel Elior
1644290ca2bbSAriel Elior /* called by bnx2x_init_hw_func, returns the next ilt line */
bnx2x_iov_init_ilt(struct bnx2x * bp,u16 line)1645290ca2bbSAriel Elior int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
1646290ca2bbSAriel Elior {
1647290ca2bbSAriel Elior int i;
1648290ca2bbSAriel Elior struct bnx2x_ilt *ilt = BP_ILT(bp);
1649290ca2bbSAriel Elior
1650290ca2bbSAriel Elior if (!IS_SRIOV(bp))
1651290ca2bbSAriel Elior return line;
1652290ca2bbSAriel Elior
1653290ca2bbSAriel Elior /* set vfs ilt lines */
1654290ca2bbSAriel Elior for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1655290ca2bbSAriel Elior struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
1656290ca2bbSAriel Elior
1657290ca2bbSAriel Elior ilt->lines[line+i].page = hw_cxt->addr;
1658290ca2bbSAriel Elior ilt->lines[line+i].page_mapping = hw_cxt->mapping;
1659290ca2bbSAriel Elior ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
1660290ca2bbSAriel Elior }
1661290ca2bbSAriel Elior return line + i;
1662290ca2bbSAriel Elior }
1663290ca2bbSAriel Elior
bnx2x_iov_is_vf_cid(struct bnx2x * bp,u16 cid)1664fd1fc79dSAriel Elior static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
1665290ca2bbSAriel Elior {
1666fd1fc79dSAriel Elior return ((cid >= BNX2X_FIRST_VF_CID) &&
1667fd1fc79dSAriel Elior ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
1668fd1fc79dSAriel Elior }
1669fd1fc79dSAriel Elior
1670fd1fc79dSAriel Elior static
bnx2x_vf_handle_classification_eqe(struct bnx2x * bp,struct bnx2x_vf_queue * vfq,union event_ring_elem * elem)1671fd1fc79dSAriel Elior void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
1672fd1fc79dSAriel Elior struct bnx2x_vf_queue *vfq,
1673fd1fc79dSAriel Elior union event_ring_elem *elem)
1674fd1fc79dSAriel Elior {
1675fd1fc79dSAriel Elior unsigned long ramrod_flags = 0;
1676fd1fc79dSAriel Elior int rc = 0;
16779cd753a1SMichal Schmidt u32 echo = le32_to_cpu(elem->message.data.eth_event.echo);
1678fd1fc79dSAriel Elior
1679fd1fc79dSAriel Elior /* Always push next commands out, don't wait here */
1680fd1fc79dSAriel Elior set_bit(RAMROD_CONT, &ramrod_flags);
1681fd1fc79dSAriel Elior
16829cd753a1SMichal Schmidt switch (echo >> BNX2X_SWCID_SHIFT) {
1683fd1fc79dSAriel Elior case BNX2X_FILTER_MAC_PENDING:
1684fd1fc79dSAriel Elior rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
1685fd1fc79dSAriel Elior &ramrod_flags);
1686fd1fc79dSAriel Elior break;
1687fd1fc79dSAriel Elior case BNX2X_FILTER_VLAN_PENDING:
1688fd1fc79dSAriel Elior rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
1689fd1fc79dSAriel Elior &ramrod_flags);
1690fd1fc79dSAriel Elior break;
1691fd1fc79dSAriel Elior default:
16929cd753a1SMichal Schmidt BNX2X_ERR("Unsupported classification command: 0x%x\n", echo);
1693fd1fc79dSAriel Elior return;
1694fd1fc79dSAriel Elior }
1695fd1fc79dSAriel Elior if (rc < 0)
1696fd1fc79dSAriel Elior BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
1697fd1fc79dSAriel Elior else if (rc > 0)
1698fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
1699fd1fc79dSAriel Elior }
1700fd1fc79dSAriel Elior
1701fd1fc79dSAriel Elior static
bnx2x_vf_handle_mcast_eqe(struct bnx2x * bp,struct bnx2x_virtf * vf)1702fd1fc79dSAriel Elior void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
1703fd1fc79dSAriel Elior struct bnx2x_virtf *vf)
1704fd1fc79dSAriel Elior {
1705fd1fc79dSAriel Elior struct bnx2x_mcast_ramrod_params rparam = {NULL};
1706fd1fc79dSAriel Elior int rc;
1707fd1fc79dSAriel Elior
1708fd1fc79dSAriel Elior rparam.mcast_obj = &vf->mcast_obj;
1709fd1fc79dSAriel Elior vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
1710fd1fc79dSAriel Elior
1711fd1fc79dSAriel Elior /* If there are pending mcast commands - send them */
1712fd1fc79dSAriel Elior if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
1713fd1fc79dSAriel Elior rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1714fd1fc79dSAriel Elior if (rc < 0)
1715fd1fc79dSAriel Elior BNX2X_ERR("Failed to send pending mcast commands: %d\n",
1716fd1fc79dSAriel Elior rc);
1717fd1fc79dSAriel Elior }
1718fd1fc79dSAriel Elior }
1719fd1fc79dSAriel Elior
1720fd1fc79dSAriel Elior static
bnx2x_vf_handle_filters_eqe(struct bnx2x * bp,struct bnx2x_virtf * vf)1721fd1fc79dSAriel Elior void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
1722fd1fc79dSAriel Elior struct bnx2x_virtf *vf)
1723fd1fc79dSAriel Elior {
17244e857c58SPeter Zijlstra smp_mb__before_atomic();
1725fd1fc79dSAriel Elior clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
17264e857c58SPeter Zijlstra smp_mb__after_atomic();
1727fd1fc79dSAriel Elior }
1728fd1fc79dSAriel Elior
bnx2x_vf_handle_rss_update_eqe(struct bnx2x * bp,struct bnx2x_virtf * vf)17292dc33bbcSYuval Mintz static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,
17302dc33bbcSYuval Mintz struct bnx2x_virtf *vf)
17312dc33bbcSYuval Mintz {
17322dc33bbcSYuval Mintz vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);
17332dc33bbcSYuval Mintz }
17342dc33bbcSYuval Mintz
bnx2x_iov_eq_sp_event(struct bnx2x * bp,union event_ring_elem * elem)1735fd1fc79dSAriel Elior int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
1736fd1fc79dSAriel Elior {
1737fd1fc79dSAriel Elior struct bnx2x_virtf *vf;
1738fd1fc79dSAriel Elior int qidx = 0, abs_vfid;
1739fd1fc79dSAriel Elior u8 opcode;
1740fd1fc79dSAriel Elior u16 cid = 0xffff;
1741fd1fc79dSAriel Elior
1742fd1fc79dSAriel Elior if (!IS_SRIOV(bp))
1743fd1fc79dSAriel Elior return 1;
1744fd1fc79dSAriel Elior
1745fd1fc79dSAriel Elior /* first get the cid - the only events we handle here are cfc-delete
1746fd1fc79dSAriel Elior * and set-mac completion
1747fd1fc79dSAriel Elior */
1748fd1fc79dSAriel Elior opcode = elem->message.opcode;
1749fd1fc79dSAriel Elior
1750fd1fc79dSAriel Elior switch (opcode) {
1751fd1fc79dSAriel Elior case EVENT_RING_OPCODE_CFC_DEL:
1752da472731SMichal Schmidt cid = SW_CID(elem->message.data.cfc_del_event.cid);
1753fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
1754fd1fc79dSAriel Elior break;
1755fd1fc79dSAriel Elior case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1756fd1fc79dSAriel Elior case EVENT_RING_OPCODE_MULTICAST_RULES:
1757fd1fc79dSAriel Elior case EVENT_RING_OPCODE_FILTERS_RULES:
17582dc33bbcSYuval Mintz case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
17599cd753a1SMichal Schmidt cid = SW_CID(elem->message.data.eth_event.echo);
1760fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
1761fd1fc79dSAriel Elior break;
1762fd1fc79dSAriel Elior case EVENT_RING_OPCODE_VF_FLR:
1763fd1fc79dSAriel Elior abs_vfid = elem->message.data.vf_flr_event.vf_id;
1764fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
1765fd1fc79dSAriel Elior abs_vfid);
1766fd1fc79dSAriel Elior goto get_vf;
1767fd1fc79dSAriel Elior case EVENT_RING_OPCODE_MALICIOUS_VF:
1768fd1fc79dSAriel Elior abs_vfid = elem->message.data.malicious_vf_event.vf_id;
1769076d1329SAriel Elior BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
1770076d1329SAriel Elior abs_vfid,
1771076d1329SAriel Elior elem->message.data.malicious_vf_event.err_id);
1772fd1fc79dSAriel Elior goto get_vf;
1773fd1fc79dSAriel Elior default:
1774fd1fc79dSAriel Elior return 1;
1775fd1fc79dSAriel Elior }
1776fd1fc79dSAriel Elior
1777fd1fc79dSAriel Elior /* check if the cid is the VF range */
1778fd1fc79dSAriel Elior if (!bnx2x_iov_is_vf_cid(bp, cid)) {
1779fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
1780fd1fc79dSAriel Elior return 1;
1781fd1fc79dSAriel Elior }
1782fd1fc79dSAriel Elior
1783fd1fc79dSAriel Elior /* extract vf and rxq index from vf_cid - relies on the following:
1784fd1fc79dSAriel Elior * 1. vfid on cid reflects the true abs_vfid
178516a5fd92SYuval Mintz * 2. The max number of VFs (per path) is 64
1786fd1fc79dSAriel Elior */
1787fd1fc79dSAriel Elior qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
1788fd1fc79dSAriel Elior abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1789fd1fc79dSAriel Elior get_vf:
1790fd1fc79dSAriel Elior vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1791fd1fc79dSAriel Elior
1792fd1fc79dSAriel Elior if (!vf) {
1793fd1fc79dSAriel Elior BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
1794fd1fc79dSAriel Elior cid, abs_vfid);
1795fd1fc79dSAriel Elior return 0;
1796fd1fc79dSAriel Elior }
1797fd1fc79dSAriel Elior
1798fd1fc79dSAriel Elior switch (opcode) {
1799fd1fc79dSAriel Elior case EVENT_RING_OPCODE_CFC_DEL:
1800fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
1801fd1fc79dSAriel Elior vf->abs_vfid, qidx);
1802fd1fc79dSAriel Elior vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
1803fd1fc79dSAriel Elior &vfq_get(vf,
1804fd1fc79dSAriel Elior qidx)->sp_obj,
1805fd1fc79dSAriel Elior BNX2X_Q_CMD_CFC_DEL);
1806fd1fc79dSAriel Elior break;
1807fd1fc79dSAriel Elior case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1808fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
1809fd1fc79dSAriel Elior vf->abs_vfid, qidx);
1810fd1fc79dSAriel Elior bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
1811fd1fc79dSAriel Elior break;
1812fd1fc79dSAriel Elior case EVENT_RING_OPCODE_MULTICAST_RULES:
1813fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
1814fd1fc79dSAriel Elior vf->abs_vfid, qidx);
1815fd1fc79dSAriel Elior bnx2x_vf_handle_mcast_eqe(bp, vf);
1816fd1fc79dSAriel Elior break;
1817fd1fc79dSAriel Elior case EVENT_RING_OPCODE_FILTERS_RULES:
1818fd1fc79dSAriel Elior DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
1819fd1fc79dSAriel Elior vf->abs_vfid, qidx);
1820fd1fc79dSAriel Elior bnx2x_vf_handle_filters_eqe(bp, vf);
1821fd1fc79dSAriel Elior break;
18222dc33bbcSYuval Mintz case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
18232dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
18242dc33bbcSYuval Mintz vf->abs_vfid, qidx);
18252dc33bbcSYuval Mintz bnx2x_vf_handle_rss_update_eqe(bp, vf);
1826df561f66SGustavo A. R. Silva fallthrough;
1827fd1fc79dSAriel Elior case EVENT_RING_OPCODE_VF_FLR:
1828fd1fc79dSAriel Elior /* Do nothing for now */
1829076d1329SAriel Elior return 0;
183035238822SMintz, Yuval case EVENT_RING_OPCODE_MALICIOUS_VF:
183135238822SMintz, Yuval vf->malicious = true;
183235238822SMintz, Yuval return 0;
1833fd1fc79dSAriel Elior }
1834fd1fc79dSAriel Elior
1835fd1fc79dSAriel Elior return 0;
1836fd1fc79dSAriel Elior }
1837fd1fc79dSAriel Elior
bnx2x_vf_by_cid(struct bnx2x * bp,int vf_cid)1838fd1fc79dSAriel Elior static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
1839fd1fc79dSAriel Elior {
1840fd1fc79dSAriel Elior /* extract the vf from vf_cid - relies on the following:
1841fd1fc79dSAriel Elior * 1. vfid on cid reflects the true abs_vfid
184216a5fd92SYuval Mintz * 2. The max number of VFs (per path) is 64
1843fd1fc79dSAriel Elior */
1844fd1fc79dSAriel Elior int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1845fd1fc79dSAriel Elior return bnx2x_vf_by_abs_fid(bp, abs_vfid);
1846fd1fc79dSAriel Elior }
1847fd1fc79dSAriel Elior
bnx2x_iov_set_queue_sp_obj(struct bnx2x * bp,int vf_cid,struct bnx2x_queue_sp_obj ** q_obj)1848fd1fc79dSAriel Elior void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
1849fd1fc79dSAriel Elior struct bnx2x_queue_sp_obj **q_obj)
1850fd1fc79dSAriel Elior {
1851fd1fc79dSAriel Elior struct bnx2x_virtf *vf;
1852fd1fc79dSAriel Elior
1853290ca2bbSAriel Elior if (!IS_SRIOV(bp))
1854290ca2bbSAriel Elior return;
1855290ca2bbSAriel Elior
1856fd1fc79dSAriel Elior vf = bnx2x_vf_by_cid(bp, vf_cid);
1857fd1fc79dSAriel Elior
1858fd1fc79dSAriel Elior if (vf) {
1859fd1fc79dSAriel Elior /* extract queue index from vf_cid - relies on the following:
1860fd1fc79dSAriel Elior * 1. vfid on cid reflects the true abs_vfid
186116a5fd92SYuval Mintz * 2. The max number of VFs (per path) is 64
1862fd1fc79dSAriel Elior */
1863fd1fc79dSAriel Elior int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
1864fd1fc79dSAriel Elior *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
1865fd1fc79dSAriel Elior } else {
1866fd1fc79dSAriel Elior BNX2X_ERR("No vf matching cid %d\n", vf_cid);
1867fd1fc79dSAriel Elior }
1868fd1fc79dSAriel Elior }
1869fd1fc79dSAriel Elior
bnx2x_iov_adjust_stats_req(struct bnx2x * bp)187067c431a5SAriel Elior void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
187167c431a5SAriel Elior {
187267c431a5SAriel Elior int i;
187367c431a5SAriel Elior int first_queue_query_index, num_queues_req;
187467c431a5SAriel Elior struct stats_query_entry *cur_query_entry;
187567c431a5SAriel Elior u8 stats_count = 0;
187667c431a5SAriel Elior bool is_fcoe = false;
187767c431a5SAriel Elior
187867c431a5SAriel Elior if (!IS_SRIOV(bp))
187967c431a5SAriel Elior return;
188067c431a5SAriel Elior
188167c431a5SAriel Elior if (!NO_FCOE(bp))
188267c431a5SAriel Elior is_fcoe = true;
188367c431a5SAriel Elior
188467c431a5SAriel Elior /* fcoe adds one global request and one queue request */
188567c431a5SAriel Elior num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
188667c431a5SAriel Elior first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
188767c431a5SAriel Elior (is_fcoe ? 0 : 1);
188867c431a5SAriel Elior
188976ca70faSYuval Mintz DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
189067c431a5SAriel Elior "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
189167c431a5SAriel Elior BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
189267c431a5SAriel Elior first_queue_query_index + num_queues_req);
189367c431a5SAriel Elior
189467c431a5SAriel Elior cur_query_entry = &bp->fw_stats_req->
189567c431a5SAriel Elior query[first_queue_query_index + num_queues_req];
189667c431a5SAriel Elior
189767c431a5SAriel Elior for_each_vf(bp, i) {
189867c431a5SAriel Elior int j;
189967c431a5SAriel Elior struct bnx2x_virtf *vf = BP_VF(bp, i);
190067c431a5SAriel Elior
190167c431a5SAriel Elior if (vf->state != VF_ENABLED) {
190276ca70faSYuval Mintz DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
190367c431a5SAriel Elior "vf %d not enabled so no stats for it\n",
190467c431a5SAriel Elior vf->abs_vfid);
190567c431a5SAriel Elior continue;
190667c431a5SAriel Elior }
190767c431a5SAriel Elior
190835238822SMintz, Yuval if (vf->malicious) {
190935238822SMintz, Yuval DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
191035238822SMintz, Yuval "vf %d malicious so no stats for it\n",
191135238822SMintz, Yuval vf->abs_vfid);
191235238822SMintz, Yuval continue;
191335238822SMintz, Yuval }
191435238822SMintz, Yuval
1915850268d3SMichal Schmidt DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1916850268d3SMichal Schmidt "add addresses for vf %d\n", vf->abs_vfid);
191767c431a5SAriel Elior for_each_vfq(vf, j) {
191867c431a5SAriel Elior struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
191967c431a5SAriel Elior
1920b9871bcfSAriel Elior dma_addr_t q_stats_addr =
1921b9871bcfSAriel Elior vf->fw_stat_map + j * vf->stats_stride;
1922b9871bcfSAriel Elior
192367c431a5SAriel Elior /* collect stats fro active queues only */
192467c431a5SAriel Elior if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
192567c431a5SAriel Elior BNX2X_Q_LOGICAL_STATE_STOPPED)
192667c431a5SAriel Elior continue;
192767c431a5SAriel Elior
192867c431a5SAriel Elior /* create stats query entry for this queue */
192967c431a5SAriel Elior cur_query_entry->kind = STATS_TYPE_QUEUE;
1930b9871bcfSAriel Elior cur_query_entry->index = vfq_stat_id(vf, rxq);
193167c431a5SAriel Elior cur_query_entry->funcID =
193267c431a5SAriel Elior cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
193367c431a5SAriel Elior cur_query_entry->address.hi =
1934b9871bcfSAriel Elior cpu_to_le32(U64_HI(q_stats_addr));
193567c431a5SAriel Elior cur_query_entry->address.lo =
1936b9871bcfSAriel Elior cpu_to_le32(U64_LO(q_stats_addr));
1937850268d3SMichal Schmidt DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
193867c431a5SAriel Elior "added address %x %x for vf %d queue %d client %d\n",
193967c431a5SAriel Elior cur_query_entry->address.hi,
1940850268d3SMichal Schmidt cur_query_entry->address.lo,
1941850268d3SMichal Schmidt cur_query_entry->funcID,
194267c431a5SAriel Elior j, cur_query_entry->index);
194367c431a5SAriel Elior cur_query_entry++;
194467c431a5SAriel Elior stats_count++;
1945b9871bcfSAriel Elior
1946b9871bcfSAriel Elior /* all stats are coalesced to the leading queue */
1947b9871bcfSAriel Elior if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
1948b9871bcfSAriel Elior break;
194967c431a5SAriel Elior }
195067c431a5SAriel Elior }
195167c431a5SAriel Elior bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
195267c431a5SAriel Elior }
195367c431a5SAriel Elior
195467c431a5SAriel Elior /* VF API helpers */
bnx2x_vf_qtbl_set_q(struct bnx2x * bp,u8 abs_vfid,u8 qid,u8 enable)1955b93288d5SAriel Elior static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
1956b93288d5SAriel Elior u8 enable)
1957b93288d5SAriel Elior {
1958b93288d5SAriel Elior u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
1959b93288d5SAriel Elior u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
1960b93288d5SAriel Elior
1961b93288d5SAriel Elior REG_WR(bp, reg, val);
1962b93288d5SAriel Elior }
19638ca5e17eSAriel Elior
bnx2x_vf_clr_qtbl(struct bnx2x * bp,struct bnx2x_virtf * vf)196499e9d211SAriel Elior static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
196599e9d211SAriel Elior {
196699e9d211SAriel Elior int i;
196799e9d211SAriel Elior
196899e9d211SAriel Elior for_each_vfq(vf, i)
196999e9d211SAriel Elior bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
197099e9d211SAriel Elior vfq_qzone_id(vf, vfq_get(vf, i)), false);
197199e9d211SAriel Elior }
197299e9d211SAriel Elior
bnx2x_vf_igu_disable(struct bnx2x * bp,struct bnx2x_virtf * vf)197399e9d211SAriel Elior static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
197499e9d211SAriel Elior {
197599e9d211SAriel Elior u32 val;
197699e9d211SAriel Elior
197799e9d211SAriel Elior /* clear the VF configuration - pretend */
197899e9d211SAriel Elior bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
197999e9d211SAriel Elior val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
198099e9d211SAriel Elior val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
198199e9d211SAriel Elior IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
198299e9d211SAriel Elior REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
198399e9d211SAriel Elior bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
198499e9d211SAriel Elior }
198599e9d211SAriel Elior
bnx2x_vf_max_queue_cnt(struct bnx2x * bp,struct bnx2x_virtf * vf)19868ca5e17eSAriel Elior u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
19878ca5e17eSAriel Elior {
19888ca5e17eSAriel Elior return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
19898ca5e17eSAriel Elior BNX2X_VF_MAX_QUEUES);
19908ca5e17eSAriel Elior }
19918ca5e17eSAriel Elior
19928ca5e17eSAriel Elior static
bnx2x_vf_chk_avail_resc(struct bnx2x * bp,struct bnx2x_virtf * vf,struct vf_pf_resc_request * req_resc)19938ca5e17eSAriel Elior int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
19948ca5e17eSAriel Elior struct vf_pf_resc_request *req_resc)
19958ca5e17eSAriel Elior {
19968ca5e17eSAriel Elior u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
19978ca5e17eSAriel Elior u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
19988ca5e17eSAriel Elior
19998ca5e17eSAriel Elior return ((req_resc->num_rxqs <= rxq_cnt) &&
20008ca5e17eSAriel Elior (req_resc->num_txqs <= txq_cnt) &&
20018ca5e17eSAriel Elior (req_resc->num_sbs <= vf_sb_count(vf)) &&
20028ca5e17eSAriel Elior (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
200305cc5a39SYuval Mintz (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
20048ca5e17eSAriel Elior }
20058ca5e17eSAriel Elior
20068ca5e17eSAriel Elior /* CORE VF API */
bnx2x_vf_acquire(struct bnx2x * bp,struct bnx2x_virtf * vf,struct vf_pf_resc_request * resc)20078ca5e17eSAriel Elior int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
20088ca5e17eSAriel Elior struct vf_pf_resc_request *resc)
20098ca5e17eSAriel Elior {
20108ca5e17eSAriel Elior int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
20118ca5e17eSAriel Elior BNX2X_CIDS_PER_VF;
20128ca5e17eSAriel Elior
20138ca5e17eSAriel Elior union cdu_context *base_cxt = (union cdu_context *)
20148ca5e17eSAriel Elior BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
20158ca5e17eSAriel Elior (base_vf_cid & (ILT_PAGE_CIDS-1));
20168ca5e17eSAriel Elior int i;
20178ca5e17eSAriel Elior
20188ca5e17eSAriel Elior /* if state is 'acquired' the VF was not released or FLR'd, in
20198ca5e17eSAriel Elior * this case the returned resources match the acquired already
20208ca5e17eSAriel Elior * acquired resources. Verify that the requested numbers do
20218ca5e17eSAriel Elior * not exceed the already acquired numbers.
20228ca5e17eSAriel Elior */
20238ca5e17eSAriel Elior if (vf->state == VF_ACQUIRED) {
20248ca5e17eSAriel Elior DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
20258ca5e17eSAriel Elior vf->abs_vfid);
20268ca5e17eSAriel Elior
20278ca5e17eSAriel Elior if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
20288ca5e17eSAriel Elior BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
20298ca5e17eSAriel Elior vf->abs_vfid);
20308ca5e17eSAriel Elior return -EINVAL;
20318ca5e17eSAriel Elior }
20328ca5e17eSAriel Elior return 0;
20338ca5e17eSAriel Elior }
20348ca5e17eSAriel Elior
20358ca5e17eSAriel Elior /* Otherwise vf state must be 'free' or 'reset' */
20368ca5e17eSAriel Elior if (vf->state != VF_FREE && vf->state != VF_RESET) {
20378ca5e17eSAriel Elior BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
20388ca5e17eSAriel Elior vf->abs_vfid, vf->state);
20398ca5e17eSAriel Elior return -EINVAL;
20408ca5e17eSAriel Elior }
20418ca5e17eSAriel Elior
20428ca5e17eSAriel Elior /* static allocation:
204316a5fd92SYuval Mintz * the global maximum number are fixed per VF. Fail the request if
20448ca5e17eSAriel Elior * requested number exceed these globals
20458ca5e17eSAriel Elior */
20468ca5e17eSAriel Elior if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
20478ca5e17eSAriel Elior DP(BNX2X_MSG_IOV,
20488ca5e17eSAriel Elior "cannot fulfill vf resource request. Placing maximal available values in response\n");
20498ca5e17eSAriel Elior /* set the max resource in the vf */
20508ca5e17eSAriel Elior return -ENOMEM;
20518ca5e17eSAriel Elior }
20528ca5e17eSAriel Elior
20538ca5e17eSAriel Elior /* Set resources counters - 0 request means max available */
20548ca5e17eSAriel Elior vf_sb_count(vf) = resc->num_sbs;
20558ca5e17eSAriel Elior vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
20568ca5e17eSAriel Elior vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
20578ca5e17eSAriel Elior
20588ca5e17eSAriel Elior DP(BNX2X_MSG_IOV,
20598ca5e17eSAriel Elior "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
20608ca5e17eSAriel Elior vf_sb_count(vf), vf_rxq_count(vf),
20618ca5e17eSAriel Elior vf_txq_count(vf), vf_mac_rules_cnt(vf),
206205cc5a39SYuval Mintz vf_vlan_rules_cnt(vf));
20638ca5e17eSAriel Elior
20648ca5e17eSAriel Elior /* Initialize the queues */
20658ca5e17eSAriel Elior if (!vf->vfqs) {
20668ca5e17eSAriel Elior DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
20678ca5e17eSAriel Elior return -EINVAL;
20688ca5e17eSAriel Elior }
20698ca5e17eSAriel Elior
20708ca5e17eSAriel Elior for_each_vfq(vf, i) {
20718ca5e17eSAriel Elior struct bnx2x_vf_queue *q = vfq_get(vf, i);
20728ca5e17eSAriel Elior
20738ca5e17eSAriel Elior if (!q) {
2074b9871bcfSAriel Elior BNX2X_ERR("q number %d was not allocated\n", i);
20758ca5e17eSAriel Elior return -EINVAL;
20768ca5e17eSAriel Elior }
20778ca5e17eSAriel Elior
20788ca5e17eSAriel Elior q->index = i;
20798ca5e17eSAriel Elior q->cxt = &((base_cxt + i)->eth);
20808ca5e17eSAriel Elior q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
20818ca5e17eSAriel Elior
20828ca5e17eSAriel Elior DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
20838ca5e17eSAriel Elior vf->abs_vfid, i, q->index, q->cid, q->cxt);
20848ca5e17eSAriel Elior
20858ca5e17eSAriel Elior /* init SP objects */
20868ca5e17eSAriel Elior bnx2x_vfq_init(bp, vf, q);
20878ca5e17eSAriel Elior }
20888ca5e17eSAriel Elior vf->state = VF_ACQUIRED;
20898ca5e17eSAriel Elior return 0;
20908ca5e17eSAriel Elior }
20918ca5e17eSAriel Elior
bnx2x_vf_init(struct bnx2x * bp,struct bnx2x_virtf * vf,dma_addr_t * sb_map)2092b93288d5SAriel Elior int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2093b93288d5SAriel Elior {
2094b93288d5SAriel Elior struct bnx2x_func_init_params func_init = {0};
2095b93288d5SAriel Elior int i;
2096b93288d5SAriel Elior
2097b93288d5SAriel Elior /* the sb resources are initialized at this point, do the
2098b93288d5SAriel Elior * FW/HW initializations
2099b93288d5SAriel Elior */
2100b93288d5SAriel Elior for_each_vf_sb(vf, i)
2101b93288d5SAriel Elior bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2102b93288d5SAriel Elior vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2103b93288d5SAriel Elior
2104b93288d5SAriel Elior /* Sanity checks */
2105b93288d5SAriel Elior if (vf->state != VF_ACQUIRED) {
2106b93288d5SAriel Elior DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2107b93288d5SAriel Elior vf->abs_vfid, vf->state);
2108b93288d5SAriel Elior return -EINVAL;
2109b93288d5SAriel Elior }
211003c22ea3SAriel Elior
211103c22ea3SAriel Elior /* let FLR complete ... */
211203c22ea3SAriel Elior msleep(100);
211303c22ea3SAriel Elior
2114b93288d5SAriel Elior /* FLR cleanup epilogue */
2115b93288d5SAriel Elior if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2116b93288d5SAriel Elior return -EBUSY;
2117b93288d5SAriel Elior
2118b93288d5SAriel Elior /* reset IGU VF statistics: MSIX */
2119b93288d5SAriel Elior REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2120b93288d5SAriel Elior
2121b93288d5SAriel Elior /* function setup */
2122b93288d5SAriel Elior func_init.pf_id = BP_FUNC(bp);
2123b93288d5SAriel Elior func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2124b93288d5SAriel Elior bnx2x_func_init(bp, &func_init);
2125b93288d5SAriel Elior
2126b93288d5SAriel Elior /* Enable the vf */
2127b93288d5SAriel Elior bnx2x_vf_enable_access(bp, vf->abs_vfid);
2128b93288d5SAriel Elior bnx2x_vf_enable_traffic(bp, vf);
2129b93288d5SAriel Elior
2130b93288d5SAriel Elior /* queue protection table */
2131b93288d5SAriel Elior for_each_vfq(vf, i)
2132b93288d5SAriel Elior bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2133b93288d5SAriel Elior vfq_qzone_id(vf, vfq_get(vf, i)), true);
2134b93288d5SAriel Elior
2135b93288d5SAriel Elior vf->state = VF_ENABLED;
2136b93288d5SAriel Elior
2137abc5a021SAriel Elior /* update vf bulletin board */
2138abc5a021SAriel Elior bnx2x_post_vf_bulletin(bp, vf->index);
2139abc5a021SAriel Elior
2140b93288d5SAriel Elior return 0;
2141b93288d5SAriel Elior }
2142b93288d5SAriel Elior
2143a3097bdaSAriel Elior struct set_vf_state_cookie {
2144a3097bdaSAriel Elior struct bnx2x_virtf *vf;
2145a3097bdaSAriel Elior u8 state;
2146a3097bdaSAriel Elior };
2147a3097bdaSAriel Elior
bnx2x_set_vf_state(void * cookie)21488e61777dSSachin Kamat static void bnx2x_set_vf_state(void *cookie)
2149a3097bdaSAriel Elior {
2150a3097bdaSAriel Elior struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2151a3097bdaSAriel Elior
2152a3097bdaSAriel Elior p->vf->state = p->state;
2153a3097bdaSAriel Elior }
2154a3097bdaSAriel Elior
bnx2x_vf_close(struct bnx2x * bp,struct bnx2x_virtf * vf)21552dc33bbcSYuval Mintz int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
215699e9d211SAriel Elior {
21572dc33bbcSYuval Mintz int rc = 0, i;
215899e9d211SAriel Elior
21592dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
21602dc33bbcSYuval Mintz
21612dc33bbcSYuval Mintz /* Close all queues */
21622dc33bbcSYuval Mintz for (i = 0; i < vf_rxq_count(vf); i++) {
21632dc33bbcSYuval Mintz rc = bnx2x_vf_queue_teardown(bp, vf, i);
21642dc33bbcSYuval Mintz if (rc)
216599e9d211SAriel Elior goto op_err;
216699e9d211SAriel Elior }
216799e9d211SAriel Elior
216899e9d211SAriel Elior /* disable the interrupts */
216999e9d211SAriel Elior DP(BNX2X_MSG_IOV, "disabling igu\n");
217099e9d211SAriel Elior bnx2x_vf_igu_disable(bp, vf);
217199e9d211SAriel Elior
217299e9d211SAriel Elior /* disable the VF */
217399e9d211SAriel Elior DP(BNX2X_MSG_IOV, "clearing qtbl\n");
217499e9d211SAriel Elior bnx2x_vf_clr_qtbl(bp, vf);
217599e9d211SAriel Elior
2176a3097bdaSAriel Elior /* need to make sure there are no outstanding stats ramrods which may
2177a3097bdaSAriel Elior * cause the device to access the VF's stats buffer which it will free
2178a3097bdaSAriel Elior * as soon as we return from the close flow.
2179a3097bdaSAriel Elior */
2180a3097bdaSAriel Elior {
2181a3097bdaSAriel Elior struct set_vf_state_cookie cookie;
2182a3097bdaSAriel Elior
2183a3097bdaSAriel Elior cookie.vf = vf;
2184a3097bdaSAriel Elior cookie.state = VF_ACQUIRED;
2185dff173deSYuval Mintz rc = bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2186dff173deSYuval Mintz if (rc)
2187dff173deSYuval Mintz goto op_err;
2188a3097bdaSAriel Elior }
2189a3097bdaSAriel Elior
219099e9d211SAriel Elior DP(BNX2X_MSG_IOV, "set state to acquired\n");
219199e9d211SAriel Elior
21922dc33bbcSYuval Mintz return 0;
21932dc33bbcSYuval Mintz op_err:
21942dc33bbcSYuval Mintz BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);
21952dc33bbcSYuval Mintz return rc;
219699e9d211SAriel Elior }
219799e9d211SAriel Elior
219816a5fd92SYuval Mintz /* VF release can be called either: 1. The VF was acquired but
2199f1929b01SAriel Elior * not enabled 2. the vf was enabled or in the process of being
2200f1929b01SAriel Elior * enabled
2201f1929b01SAriel Elior */
bnx2x_vf_free(struct bnx2x * bp,struct bnx2x_virtf * vf)22022dc33bbcSYuval Mintz int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)
2203f1929b01SAriel Elior {
22042dc33bbcSYuval Mintz int rc;
2205f1929b01SAriel Elior
2206f1929b01SAriel Elior DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2207f1929b01SAriel Elior vf->state == VF_FREE ? "Free" :
2208f1929b01SAriel Elior vf->state == VF_ACQUIRED ? "Acquired" :
2209f1929b01SAriel Elior vf->state == VF_ENABLED ? "Enabled" :
2210f1929b01SAriel Elior vf->state == VF_RESET ? "Reset" :
2211f1929b01SAriel Elior "Unknown");
2212f1929b01SAriel Elior
2213f1929b01SAriel Elior switch (vf->state) {
2214f1929b01SAriel Elior case VF_ENABLED:
22152dc33bbcSYuval Mintz rc = bnx2x_vf_close(bp, vf);
22162dc33bbcSYuval Mintz if (rc)
2217f1929b01SAriel Elior goto op_err;
2218df561f66SGustavo A. R. Silva fallthrough; /* to release resources */
2219f1929b01SAriel Elior case VF_ACQUIRED:
2220f1929b01SAriel Elior DP(BNX2X_MSG_IOV, "about to free resources\n");
2221f1929b01SAriel Elior bnx2x_vf_free_resc(bp, vf);
22222dc33bbcSYuval Mintz break;
2223f1929b01SAriel Elior
2224f1929b01SAriel Elior case VF_FREE:
2225f1929b01SAriel Elior case VF_RESET:
2226f1929b01SAriel Elior default:
22272dc33bbcSYuval Mintz break;
2228f1929b01SAriel Elior }
22292dc33bbcSYuval Mintz return 0;
2230f1929b01SAriel Elior op_err:
22312dc33bbcSYuval Mintz BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);
22322dc33bbcSYuval Mintz return rc;
2233f1929b01SAriel Elior }
2234f1929b01SAriel Elior
bnx2x_vf_rss_update(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_config_rss_params * rss)22352dc33bbcSYuval Mintz int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
22362dc33bbcSYuval Mintz struct bnx2x_config_rss_params *rss)
2237b9871bcfSAriel Elior {
22382dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
22392dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);
22402dc33bbcSYuval Mintz return bnx2x_config_rss(bp, rss);
2241b9871bcfSAriel Elior }
2242b9871bcfSAriel Elior
bnx2x_vf_tpa_update(struct bnx2x * bp,struct bnx2x_virtf * vf,struct vfpf_tpa_tlv * tlv,struct bnx2x_queue_update_tpa_params * params)22432dc33bbcSYuval Mintz int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
22442dc33bbcSYuval Mintz struct vfpf_tpa_tlv *tlv,
22452dc33bbcSYuval Mintz struct bnx2x_queue_update_tpa_params *params)
2246f1929b01SAriel Elior {
22472dc33bbcSYuval Mintz aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;
22482dc33bbcSYuval Mintz struct bnx2x_queue_state_params qstate;
22492dc33bbcSYuval Mintz int qid, rc = 0;
22502dc33bbcSYuval Mintz
22512dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
22522dc33bbcSYuval Mintz
22532dc33bbcSYuval Mintz /* Set ramrod params */
22542dc33bbcSYuval Mintz memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
22552dc33bbcSYuval Mintz memcpy(&qstate.params.update_tpa, params,
22562dc33bbcSYuval Mintz sizeof(struct bnx2x_queue_update_tpa_params));
22572dc33bbcSYuval Mintz qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;
22582dc33bbcSYuval Mintz set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
22592dc33bbcSYuval Mintz
22602dc33bbcSYuval Mintz for (qid = 0; qid < vf_rxq_count(vf); qid++) {
22612dc33bbcSYuval Mintz qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
22622dc33bbcSYuval Mintz qstate.params.update_tpa.sge_map = sge_addr[qid];
22632dc33bbcSYuval Mintz DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",
22642dc33bbcSYuval Mintz vf->abs_vfid, qid, U64_HI(sge_addr[qid]),
22652dc33bbcSYuval Mintz U64_LO(sge_addr[qid]));
22662dc33bbcSYuval Mintz rc = bnx2x_queue_state_change(bp, &qstate);
22672dc33bbcSYuval Mintz if (rc) {
22682dc33bbcSYuval Mintz BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",
22692dc33bbcSYuval Mintz U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),
22702dc33bbcSYuval Mintz vf->abs_vfid, qid);
22712dc33bbcSYuval Mintz return rc;
2272f1929b01SAriel Elior }
2273f1929b01SAriel Elior }
2274f1929b01SAriel Elior
22752dc33bbcSYuval Mintz return rc;
227614a94ebdSMichal Kalderon }
227714a94ebdSMichal Kalderon
2278f1929b01SAriel Elior /* VF release ~ VF close + VF release-resources
2279f1929b01SAriel Elior * Release is the ultimate SW shutdown and is called whenever an
2280f1929b01SAriel Elior * irrecoverable error is encountered.
2281f1929b01SAriel Elior */
bnx2x_vf_release(struct bnx2x * bp,struct bnx2x_virtf * vf)22822dc33bbcSYuval Mintz int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2283f1929b01SAriel Elior {
2284f1929b01SAriel Elior int rc;
2285b9871bcfSAriel Elior
2286b9871bcfSAriel Elior DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
2287f1929b01SAriel Elior bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2288f1929b01SAriel Elior
22892dc33bbcSYuval Mintz rc = bnx2x_vf_free(bp, vf);
2290f1929b01SAriel Elior if (rc)
2291f1929b01SAriel Elior WARN(rc,
2292f1929b01SAriel Elior "VF[%d] Failed to allocate resources for release op- rc=%d\n",
2293f1929b01SAriel Elior vf->abs_vfid, rc);
22942dc33bbcSYuval Mintz bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
22952dc33bbcSYuval Mintz return rc;
2296f1929b01SAriel Elior }
2297f1929b01SAriel Elior
bnx2x_lock_vf_pf_channel(struct bnx2x * bp,struct bnx2x_virtf * vf,enum channel_tlvs tlv)22988ca5e17eSAriel Elior void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
22998ca5e17eSAriel Elior enum channel_tlvs tlv)
23008ca5e17eSAriel Elior {
2301b9871bcfSAriel Elior /* we don't lock the channel for unsupported tlvs */
2302b9871bcfSAriel Elior if (!bnx2x_tlv_supported(tlv)) {
2303b9871bcfSAriel Elior BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
2304b9871bcfSAriel Elior return;
2305b9871bcfSAriel Elior }
2306b9871bcfSAriel Elior
23078ca5e17eSAriel Elior /* lock the channel */
23088ca5e17eSAriel Elior mutex_lock(&vf->op_mutex);
23098ca5e17eSAriel Elior
23108ca5e17eSAriel Elior /* record the locking op */
23118ca5e17eSAriel Elior vf->op_current = tlv;
23128ca5e17eSAriel Elior
23138ca5e17eSAriel Elior /* log the lock */
23148ca5e17eSAriel Elior DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
23158ca5e17eSAriel Elior vf->abs_vfid, tlv);
23168ca5e17eSAriel Elior }
23178ca5e17eSAriel Elior
bnx2x_unlock_vf_pf_channel(struct bnx2x * bp,struct bnx2x_virtf * vf,enum channel_tlvs expected_tlv)23188ca5e17eSAriel Elior void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
23198ca5e17eSAriel Elior enum channel_tlvs expected_tlv)
23208ca5e17eSAriel Elior {
2321b9871bcfSAriel Elior enum channel_tlvs current_tlv;
2322b9871bcfSAriel Elior
2323b9871bcfSAriel Elior if (!vf) {
2324b9871bcfSAriel Elior BNX2X_ERR("VF was %p\n", vf);
2325b9871bcfSAriel Elior return;
2326b9871bcfSAriel Elior }
2327b9871bcfSAriel Elior
2328b9871bcfSAriel Elior current_tlv = vf->op_current;
2329b9871bcfSAriel Elior
2330b9871bcfSAriel Elior /* we don't unlock the channel for unsupported tlvs */
2331b9871bcfSAriel Elior if (!bnx2x_tlv_supported(expected_tlv))
2332b9871bcfSAriel Elior return;
2333b9871bcfSAriel Elior
23348ca5e17eSAriel Elior WARN(expected_tlv != vf->op_current,
23358ca5e17eSAriel Elior "lock mismatch: expected %d found %d", expected_tlv,
23368ca5e17eSAriel Elior vf->op_current);
23378ca5e17eSAriel Elior
2338b9871bcfSAriel Elior /* record the locking op */
2339b9871bcfSAriel Elior vf->op_current = CHANNEL_TLV_NONE;
2340b9871bcfSAriel Elior
23418ca5e17eSAriel Elior /* lock the channel */
23428ca5e17eSAriel Elior mutex_unlock(&vf->op_mutex);
23438ca5e17eSAriel Elior
23448ca5e17eSAriel Elior /* log the unlock */
23458ca5e17eSAriel Elior DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
23460c23ad37SYuval Mintz vf->abs_vfid, current_tlv);
23478ca5e17eSAriel Elior }
23486411280aSAriel Elior
bnx2x_set_pf_tx_switching(struct bnx2x * bp,bool enable)2349c14db202SYuval Mintz static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
2350c14db202SYuval Mintz {
2351c14db202SYuval Mintz struct bnx2x_queue_state_params q_params;
2352c14db202SYuval Mintz u32 prev_flags;
2353c14db202SYuval Mintz int i, rc;
2354c14db202SYuval Mintz
2355c14db202SYuval Mintz /* Verify changes are needed and record current Tx switching state */
2356c14db202SYuval Mintz prev_flags = bp->flags;
2357c14db202SYuval Mintz if (enable)
2358c14db202SYuval Mintz bp->flags |= TX_SWITCHING;
2359c14db202SYuval Mintz else
2360c14db202SYuval Mintz bp->flags &= ~TX_SWITCHING;
2361c14db202SYuval Mintz if (prev_flags == bp->flags)
2362c14db202SYuval Mintz return 0;
2363c14db202SYuval Mintz
2364c14db202SYuval Mintz /* Verify state enables the sending of queue ramrods */
2365c14db202SYuval Mintz if ((bp->state != BNX2X_STATE_OPEN) ||
2366c14db202SYuval Mintz (bnx2x_get_q_logical_state(bp,
2367c14db202SYuval Mintz &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
2368c14db202SYuval Mintz BNX2X_Q_LOGICAL_STATE_ACTIVE))
2369c14db202SYuval Mintz return 0;
2370c14db202SYuval Mintz
2371c14db202SYuval Mintz /* send q. update ramrod to configure Tx switching */
2372c14db202SYuval Mintz memset(&q_params, 0, sizeof(q_params));
2373c14db202SYuval Mintz __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2374c14db202SYuval Mintz q_params.cmd = BNX2X_Q_CMD_UPDATE;
2375c14db202SYuval Mintz __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
2376c14db202SYuval Mintz &q_params.params.update.update_flags);
2377c14db202SYuval Mintz if (enable)
2378c14db202SYuval Mintz __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2379c14db202SYuval Mintz &q_params.params.update.update_flags);
2380c14db202SYuval Mintz else
2381c14db202SYuval Mintz __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2382c14db202SYuval Mintz &q_params.params.update.update_flags);
2383c14db202SYuval Mintz
2384c14db202SYuval Mintz /* send the ramrod on all the queues of the PF */
2385c14db202SYuval Mintz for_each_eth_queue(bp, i) {
2386c14db202SYuval Mintz struct bnx2x_fastpath *fp = &bp->fp[i];
2387dc5a3d79SManish Chopra int tx_idx;
2388c14db202SYuval Mintz
2389c14db202SYuval Mintz /* Set the appropriate Queue object */
2390c14db202SYuval Mintz q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
2391c14db202SYuval Mintz
2392dc5a3d79SManish Chopra for (tx_idx = FIRST_TX_COS_INDEX;
2393dc5a3d79SManish Chopra tx_idx < fp->max_cos; tx_idx++) {
2394dc5a3d79SManish Chopra q_params.params.update.cid_index = tx_idx;
2395dc5a3d79SManish Chopra
2396c14db202SYuval Mintz /* Update the Queue state */
2397c14db202SYuval Mintz rc = bnx2x_queue_state_change(bp, &q_params);
2398c14db202SYuval Mintz if (rc) {
2399c14db202SYuval Mintz BNX2X_ERR("Failed to configure Tx switching\n");
2400c14db202SYuval Mintz return rc;
2401c14db202SYuval Mintz }
2402c14db202SYuval Mintz }
2403dc5a3d79SManish Chopra }
2404c14db202SYuval Mintz
2405c14db202SYuval Mintz DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
2406c14db202SYuval Mintz return 0;
2407c14db202SYuval Mintz }
2408c14db202SYuval Mintz
bnx2x_sriov_configure(struct pci_dev * dev,int num_vfs_param)24093c76feffSAriel Elior int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
24106411280aSAriel Elior {
24113c76feffSAriel Elior struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
24126411280aSAriel Elior
2413c8781cf4SMichal Kalderon if (!IS_SRIOV(bp)) {
2414c8781cf4SMichal Kalderon BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
2415c8781cf4SMichal Kalderon return -EINVAL;
2416c8781cf4SMichal Kalderon }
2417c8781cf4SMichal Kalderon
24183c76feffSAriel Elior DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
24193c76feffSAriel Elior num_vfs_param, BNX2X_NR_VIRTFN(bp));
24203c76feffSAriel Elior
24213c76feffSAriel Elior /* HW channel is only operational when PF is up */
24223c76feffSAriel Elior if (bp->state != BNX2X_STATE_OPEN) {
24236bf07b8eSYuval Mintz BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
24243c76feffSAriel Elior return -EINVAL;
24253c76feffSAriel Elior }
24263c76feffSAriel Elior
24273c76feffSAriel Elior /* we are always bound by the total_vfs in the configuration space */
24283c76feffSAriel Elior if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
24293c76feffSAriel Elior BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
24303c76feffSAriel Elior num_vfs_param, BNX2X_NR_VIRTFN(bp));
24313c76feffSAriel Elior num_vfs_param = BNX2X_NR_VIRTFN(bp);
24323c76feffSAriel Elior }
24333c76feffSAriel Elior
24343c76feffSAriel Elior bp->requested_nr_virtfn = num_vfs_param;
24353c76feffSAriel Elior if (num_vfs_param == 0) {
2436c14db202SYuval Mintz bnx2x_set_pf_tx_switching(bp, false);
2437a345ce71SYuval Mintz bnx2x_disable_sriov(bp);
24383c76feffSAriel Elior return 0;
24393c76feffSAriel Elior } else {
24403c76feffSAriel Elior return bnx2x_enable_sriov(bp);
24413c76feffSAriel Elior }
24423c76feffSAriel Elior }
2443c14db202SYuval Mintz
2444b9871bcfSAriel Elior #define IGU_ENTRY_SIZE 4
24453c76feffSAriel Elior
bnx2x_enable_sriov(struct bnx2x * bp)24463c76feffSAriel Elior int bnx2x_enable_sriov(struct bnx2x *bp)
24473c76feffSAriel Elior {
24483c76feffSAriel Elior int rc = 0, req_vfs = bp->requested_nr_virtfn;
2449b9871bcfSAriel Elior int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
2450b9871bcfSAriel Elior u32 igu_entry, address;
2451b9871bcfSAriel Elior u16 num_vf_queues;
24523c76feffSAriel Elior
2453b9871bcfSAriel Elior if (req_vfs == 0)
2454b9871bcfSAriel Elior return 0;
2455b9871bcfSAriel Elior
2456b9871bcfSAriel Elior first_vf = bp->vfdb->sriov.first_vf_in_pf;
2457b9871bcfSAriel Elior
2458b9871bcfSAriel Elior /* statically distribute vf sb pool between VFs */
2459b9871bcfSAriel Elior num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
2460b9871bcfSAriel Elior BP_VFDB(bp)->vf_sbs_pool / req_vfs);
2461b9871bcfSAriel Elior
2462b9871bcfSAriel Elior /* zero previous values learned from igu cam */
2463b9871bcfSAriel Elior for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
2464b9871bcfSAriel Elior struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2465b9871bcfSAriel Elior
2466b9871bcfSAriel Elior vf->sb_count = 0;
2467b9871bcfSAriel Elior vf_sb_count(BP_VF(bp, vf_idx)) = 0;
2468b9871bcfSAriel Elior }
2469b9871bcfSAriel Elior bp->vfdb->vf_sbs_pool = 0;
2470b9871bcfSAriel Elior
2471b9871bcfSAriel Elior /* prepare IGU cam */
2472b9871bcfSAriel Elior sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
2473b9871bcfSAriel Elior address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
2474b9871bcfSAriel Elior for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2475b9871bcfSAriel Elior for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
2476b9871bcfSAriel Elior igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
2477b9871bcfSAriel Elior vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
2478b9871bcfSAriel Elior IGU_REG_MAPPING_MEMORY_VALID;
2479b9871bcfSAriel Elior DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
2480b9871bcfSAriel Elior sb_idx, vf_idx);
2481b9871bcfSAriel Elior REG_WR(bp, address, igu_entry);
2482b9871bcfSAriel Elior sb_idx++;
2483b9871bcfSAriel Elior address += IGU_ENTRY_SIZE;
2484b9871bcfSAriel Elior }
2485b9871bcfSAriel Elior }
2486b9871bcfSAriel Elior
2487b9871bcfSAriel Elior /* Reinitialize vf database according to igu cam */
2488b9871bcfSAriel Elior bnx2x_get_vf_igu_cam_info(bp);
2489b9871bcfSAriel Elior
2490b9871bcfSAriel Elior DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
2491b9871bcfSAriel Elior BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
2492b9871bcfSAriel Elior
2493b9871bcfSAriel Elior qcount = 0;
2494b9871bcfSAriel Elior for_each_vf(bp, vf_idx) {
2495b9871bcfSAriel Elior struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2496b9871bcfSAriel Elior
2497b9871bcfSAriel Elior /* set local queue arrays */
2498b9871bcfSAriel Elior vf->vfqs = &bp->vfdb->vfqs[qcount];
2499b9871bcfSAriel Elior qcount += vf_sb_count(vf);
2500717fa2b9SAriel Elior bnx2x_iov_static_resc(bp, vf);
2501b9871bcfSAriel Elior }
2502b9871bcfSAriel Elior
250389e18ae6SMichal Kalderon /* prepare msix vectors in VF configuration space - the value in the
250489e18ae6SMichal Kalderon * PCI configuration space should be the index of the last entry,
250589e18ae6SMichal Kalderon * namely one less than the actual size of the table
250689e18ae6SMichal Kalderon */
2507b9871bcfSAriel Elior for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2508b9871bcfSAriel Elior bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
2509b9871bcfSAriel Elior REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
251089e18ae6SMichal Kalderon num_vf_queues - 1);
2511717fa2b9SAriel Elior DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
251289e18ae6SMichal Kalderon vf_idx, num_vf_queues - 1);
2513b9871bcfSAriel Elior }
2514b9871bcfSAriel Elior bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2515b9871bcfSAriel Elior
2516b9871bcfSAriel Elior /* enable sriov. This will probe all the VFs, and consequentially cause
2517b9871bcfSAriel Elior * the "acquire" messages to appear on the VF PF channel.
2518b9871bcfSAriel Elior */
2519b9871bcfSAriel Elior DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
2520826cb7b4SAriel Elior bnx2x_disable_sriov(bp);
2521c14db202SYuval Mintz
2522c14db202SYuval Mintz rc = bnx2x_set_pf_tx_switching(bp, true);
2523c14db202SYuval Mintz if (rc)
2524c14db202SYuval Mintz return rc;
2525c14db202SYuval Mintz
25263c76feffSAriel Elior rc = pci_enable_sriov(bp->pdev, req_vfs);
25273c76feffSAriel Elior if (rc) {
25286411280aSAriel Elior BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
25293c76feffSAriel Elior return rc;
25303c76feffSAriel Elior }
25313c76feffSAriel Elior DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
25323c76feffSAriel Elior return req_vfs;
25336411280aSAriel Elior }
25346411280aSAriel Elior
bnx2x_pf_set_vfs_vlan(struct bnx2x * bp)25353ec9f9caSAriel Elior void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
25363ec9f9caSAriel Elior {
25373ec9f9caSAriel Elior int vfidx;
25383ec9f9caSAriel Elior struct pf_vf_bulletin_content *bulletin;
25393ec9f9caSAriel Elior
25403ec9f9caSAriel Elior DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
25413ec9f9caSAriel Elior for_each_vf(bp, vfidx) {
25423ec9f9caSAriel Elior bulletin = BP_VF_BULLETIN(bp, vfidx);
2543c46309c7SYuval Mintz if (bulletin->valid_bitmap & (1 << VLAN_VALID))
254479aab093SMoshe Shemesh bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0,
254579aab093SMoshe Shemesh htons(ETH_P_8021Q));
25463ec9f9caSAriel Elior }
25473ec9f9caSAriel Elior }
25483ec9f9caSAriel Elior
bnx2x_disable_sriov(struct bnx2x * bp)25493c76feffSAriel Elior void bnx2x_disable_sriov(struct bnx2x *bp)
25503c76feffSAriel Elior {
2551a345ce71SYuval Mintz if (pci_vfs_assigned(bp->pdev)) {
2552a345ce71SYuval Mintz DP(BNX2X_MSG_IOV,
2553a345ce71SYuval Mintz "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2554a345ce71SYuval Mintz return;
2555a345ce71SYuval Mintz }
2556a345ce71SYuval Mintz
25573c76feffSAriel Elior pci_disable_sriov(bp->pdev);
25583c76feffSAriel Elior }
25593c76feffSAriel Elior
bnx2x_vf_op_prep(struct bnx2x * bp,int vfidx,struct bnx2x_virtf ** vf,struct pf_vf_bulletin_content ** bulletin,bool test_queue)25606495d15aSDmitry Kravkov static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
25618e61777dSSachin Kamat struct bnx2x_virtf **vf,
25626495d15aSDmitry Kravkov struct pf_vf_bulletin_content **bulletin,
25636495d15aSDmitry Kravkov bool test_queue)
25643ec9f9caSAriel Elior {
2565af902ae4SAriel Elior if (bp->state != BNX2X_STATE_OPEN) {
25666495d15aSDmitry Kravkov BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");
2567af902ae4SAriel Elior return -EINVAL;
2568af902ae4SAriel Elior }
2569af902ae4SAriel Elior
25703ec9f9caSAriel Elior if (!IS_SRIOV(bp)) {
25710c23ad37SYuval Mintz BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");
25723ec9f9caSAriel Elior return -EINVAL;
25733ec9f9caSAriel Elior }
25743ec9f9caSAriel Elior
25753ec9f9caSAriel Elior if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
25766495d15aSDmitry Kravkov BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
25773ec9f9caSAriel Elior vfidx, BNX2X_NR_VIRTFN(bp));
25783ec9f9caSAriel Elior return -EINVAL;
25793ec9f9caSAriel Elior }
25803ec9f9caSAriel Elior
25815ae30d78SAriel Elior /* init members */
25825ae30d78SAriel Elior *vf = BP_VF(bp, vfidx);
25835ae30d78SAriel Elior *bulletin = BP_VF_BULLETIN(bp, vfidx);
25845ae30d78SAriel Elior
25855ae30d78SAriel Elior if (!*vf) {
25866495d15aSDmitry Kravkov BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);
2587b9871bcfSAriel Elior return -EINVAL;
2588b9871bcfSAriel Elior }
2589b9871bcfSAriel Elior
25906495d15aSDmitry Kravkov if (test_queue && !(*vf)->vfqs) {
25916495d15aSDmitry Kravkov BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",
25923ec9f9caSAriel Elior vfidx);
25933ec9f9caSAriel Elior return -EINVAL;
25943ec9f9caSAriel Elior }
25953ec9f9caSAriel Elior
25965ae30d78SAriel Elior if (!*bulletin) {
25976495d15aSDmitry Kravkov BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",
25985ae30d78SAriel Elior vfidx);
25995ae30d78SAriel Elior return -EINVAL;
26005ae30d78SAriel Elior }
26015ae30d78SAriel Elior
26023ec9f9caSAriel Elior return 0;
26033ec9f9caSAriel Elior }
26043ec9f9caSAriel Elior
bnx2x_get_vf_config(struct net_device * dev,int vfidx,struct ifla_vf_info * ivi)26053ec9f9caSAriel Elior int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
26063ec9f9caSAriel Elior struct ifla_vf_info *ivi)
26073ec9f9caSAriel Elior {
26083ec9f9caSAriel Elior struct bnx2x *bp = netdev_priv(dev);
26095ae30d78SAriel Elior struct bnx2x_virtf *vf = NULL;
26105ae30d78SAriel Elior struct pf_vf_bulletin_content *bulletin = NULL;
26115ae30d78SAriel Elior struct bnx2x_vlan_mac_obj *mac_obj;
26125ae30d78SAriel Elior struct bnx2x_vlan_mac_obj *vlan_obj;
26133ec9f9caSAriel Elior int rc;
26143ec9f9caSAriel Elior
26155ae30d78SAriel Elior /* sanity and init */
26166495d15aSDmitry Kravkov rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
26173ec9f9caSAriel Elior if (rc)
26183ec9f9caSAriel Elior return rc;
26196495d15aSDmitry Kravkov
2620b9871bcfSAriel Elior mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2621b9871bcfSAriel Elior vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
26225ae30d78SAriel Elior if (!mac_obj || !vlan_obj) {
26233c76feffSAriel Elior BNX2X_ERR("VF partially initialized\n");
26243c76feffSAriel Elior return -EINVAL;
26253c76feffSAriel Elior }
26263ec9f9caSAriel Elior
26273ec9f9caSAriel Elior ivi->vf = vfidx;
26283ec9f9caSAriel Elior ivi->qos = 0;
2629ed616689SSucheta Chakraborty ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */
2630ed616689SSucheta Chakraborty ivi->min_tx_rate = 0;
263175303965SShahed Shaikh ivi->spoofchk = vf->spoofchk ? 1 : 0;
2632ea65949eSShahed Shaikh ivi->linkstate = vf->link_cfg;
26333ec9f9caSAriel Elior if (vf->state == VF_ENABLED) {
26343ec9f9caSAriel Elior /* mac and vlan are in vlan_mac objects */
26353a3534ecSYuval Mintz if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {
26363ec9f9caSAriel Elior mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
26373ec9f9caSAriel Elior 0, ETH_ALEN);
2638b9871bcfSAriel Elior vlan_obj->get_n_elements(bp, vlan_obj, 1,
2639b9871bcfSAriel Elior (u8 *)&ivi->vlan, 0,
2640b9871bcfSAriel Elior VLAN_HLEN);
26413a3534ecSYuval Mintz }
26423ec9f9caSAriel Elior } else {
26436495d15aSDmitry Kravkov mutex_lock(&bp->vfdb->bulletin_mutex);
26443ec9f9caSAriel Elior /* mac */
26453ec9f9caSAriel Elior if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
26463ec9f9caSAriel Elior /* mac configured by ndo so its in bulletin board */
26473ec9f9caSAriel Elior memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
26483ec9f9caSAriel Elior else
264916a5fd92SYuval Mintz /* function has not been loaded yet. Show mac as 0s */
2650c7bf7169SJoe Perches eth_zero_addr(ivi->mac);
26513ec9f9caSAriel Elior
26523ec9f9caSAriel Elior /* vlan */
26533ec9f9caSAriel Elior if (bulletin->valid_bitmap & (1 << VLAN_VALID))
26543ec9f9caSAriel Elior /* vlan configured by ndo so its in bulletin board */
26553ec9f9caSAriel Elior memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
26563ec9f9caSAriel Elior else
265716a5fd92SYuval Mintz /* function has not been loaded yet. Show vlans as 0s */
26583ec9f9caSAriel Elior memset(&ivi->vlan, 0, VLAN_HLEN);
26596495d15aSDmitry Kravkov
26606495d15aSDmitry Kravkov mutex_unlock(&bp->vfdb->bulletin_mutex);
26613ec9f9caSAriel Elior }
26623ec9f9caSAriel Elior
26633ec9f9caSAriel Elior return 0;
26643ec9f9caSAriel Elior }
26653ec9f9caSAriel Elior
26666411280aSAriel Elior /* New mac for VF. Consider these cases:
26676411280aSAriel Elior * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
26686411280aSAriel Elior * supply at acquire.
26696411280aSAriel Elior * 2. VF has already been acquired but has not yet initialized - store in local
26706411280aSAriel Elior * bulletin board. mac will be posted on VF bulletin board after VF init. VF
26716411280aSAriel Elior * will configure this mac when it is ready.
26726411280aSAriel Elior * 3. VF has already initialized but has not yet setup a queue - post the new
26736411280aSAriel Elior * mac on VF's bulletin board right now. VF will configure this mac when it
26746411280aSAriel Elior * is ready.
26756411280aSAriel Elior * 4. VF has already set a queue - delete any macs already configured for this
26766411280aSAriel Elior * queue and manually config the new mac.
26776411280aSAriel Elior * In any event, once this function has been called refuse any attempts by the
26786411280aSAriel Elior * VF to configure any mac for itself except for this mac. In case of a race
26796411280aSAriel Elior * where the VF fails to see the new post on its bulletin board before sending a
26806411280aSAriel Elior * mac configuration request, the PF will simply fail the request and VF can try
26813ec9f9caSAriel Elior * again after consulting its bulletin board.
26826411280aSAriel Elior */
bnx2x_set_vf_mac(struct net_device * dev,int vfidx,u8 * mac)26833ec9f9caSAriel Elior int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
26846411280aSAriel Elior {
26856411280aSAriel Elior struct bnx2x *bp = netdev_priv(dev);
26863ec9f9caSAriel Elior int rc, q_logical_state;
26875ae30d78SAriel Elior struct bnx2x_virtf *vf = NULL;
26885ae30d78SAriel Elior struct pf_vf_bulletin_content *bulletin = NULL;
26896411280aSAriel Elior
26906411280aSAriel Elior if (!is_valid_ether_addr(mac)) {
26916411280aSAriel Elior BNX2X_ERR("mac address invalid\n");
26926411280aSAriel Elior return -EINVAL;
26936411280aSAriel Elior }
26946411280aSAriel Elior
26956495d15aSDmitry Kravkov /* sanity and init */
26966495d15aSDmitry Kravkov rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
26976495d15aSDmitry Kravkov if (rc)
26986495d15aSDmitry Kravkov return rc;
26996495d15aSDmitry Kravkov
27006495d15aSDmitry Kravkov mutex_lock(&bp->vfdb->bulletin_mutex);
27016495d15aSDmitry Kravkov
270216a5fd92SYuval Mintz /* update PF's copy of the VF's bulletin. Will no longer accept mac
27036411280aSAriel Elior * configuration requests from vf unless match this mac
27046411280aSAriel Elior */
27056411280aSAriel Elior bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
27066411280aSAriel Elior memcpy(bulletin->mac, mac, ETH_ALEN);
27076411280aSAriel Elior
27086411280aSAriel Elior /* Post update on VF's bulletin board */
27096411280aSAriel Elior rc = bnx2x_post_vf_bulletin(bp, vfidx);
27106495d15aSDmitry Kravkov
27116495d15aSDmitry Kravkov /* release lock before checking return code */
27126495d15aSDmitry Kravkov mutex_unlock(&bp->vfdb->bulletin_mutex);
27136495d15aSDmitry Kravkov
27146411280aSAriel Elior if (rc) {
27156411280aSAriel Elior BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
27166411280aSAriel Elior return rc;
27176411280aSAriel Elior }
27186411280aSAriel Elior
27196411280aSAriel Elior q_logical_state =
2720b9871bcfSAriel Elior bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
27216411280aSAriel Elior if (vf->state == VF_ENABLED &&
27226411280aSAriel Elior q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
27236411280aSAriel Elior /* configure the mac in device on this vf's queue */
27243ec9f9caSAriel Elior unsigned long ramrod_flags = 0;
27253a3534ecSYuval Mintz struct bnx2x_vlan_mac_obj *mac_obj;
2726b9871bcfSAriel Elior
27273a3534ecSYuval Mintz /* User should be able to see failure reason in system logs */
27283a3534ecSYuval Mintz if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
27293a3534ecSYuval Mintz return -EINVAL;
27306411280aSAriel Elior
27316411280aSAriel Elior /* must lock vfpf channel to protect against vf flows */
27326411280aSAriel Elior bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
27336411280aSAriel Elior
27346411280aSAriel Elior /* remove existing eth macs */
27353a3534ecSYuval Mintz mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
27366411280aSAriel Elior rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
27376411280aSAriel Elior if (rc) {
27386411280aSAriel Elior BNX2X_ERR("failed to delete eth macs\n");
273931329afdSAriel Elior rc = -EINVAL;
274031329afdSAriel Elior goto out;
27416411280aSAriel Elior }
27426411280aSAriel Elior
27436411280aSAriel Elior /* remove existing uc list macs */
27446411280aSAriel Elior rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
27456411280aSAriel Elior if (rc) {
27466411280aSAriel Elior BNX2X_ERR("failed to delete uc_list macs\n");
274731329afdSAriel Elior rc = -EINVAL;
274831329afdSAriel Elior goto out;
27496411280aSAriel Elior }
27506411280aSAriel Elior
27516411280aSAriel Elior /* configure the new mac to device */
27523ec9f9caSAriel Elior __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
27536411280aSAriel Elior bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
27543ec9f9caSAriel Elior BNX2X_ETH_MAC, &ramrod_flags);
27556411280aSAriel Elior
275631329afdSAriel Elior out:
27576411280aSAriel Elior bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
27586411280aSAriel Elior }
27596411280aSAriel Elior
276002948344SJoe Perches return rc;
27613ec9f9caSAriel Elior }
27623ec9f9caSAriel Elior
bnx2x_set_vf_vlan_acceptance(struct bnx2x * bp,struct bnx2x_virtf * vf,bool accept)276305cc5a39SYuval Mintz static void bnx2x_set_vf_vlan_acceptance(struct bnx2x *bp,
276405cc5a39SYuval Mintz struct bnx2x_virtf *vf, bool accept)
276505cc5a39SYuval Mintz {
276605cc5a39SYuval Mintz struct bnx2x_rx_mode_ramrod_params rx_ramrod;
276705cc5a39SYuval Mintz unsigned long accept_flags;
276805cc5a39SYuval Mintz
276905cc5a39SYuval Mintz /* need to remove/add the VF's accept_any_vlan bit */
277005cc5a39SYuval Mintz accept_flags = bnx2x_leading_vfq(vf, accept_flags);
277105cc5a39SYuval Mintz if (accept)
277205cc5a39SYuval Mintz set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
277305cc5a39SYuval Mintz else
277405cc5a39SYuval Mintz clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
277505cc5a39SYuval Mintz
277605cc5a39SYuval Mintz bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
277705cc5a39SYuval Mintz accept_flags);
277805cc5a39SYuval Mintz bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
277905cc5a39SYuval Mintz bnx2x_config_rx_mode(bp, &rx_ramrod);
278005cc5a39SYuval Mintz }
278105cc5a39SYuval Mintz
bnx2x_set_vf_vlan_filter(struct bnx2x * bp,struct bnx2x_virtf * vf,u16 vlan,bool add)278205cc5a39SYuval Mintz static int bnx2x_set_vf_vlan_filter(struct bnx2x *bp, struct bnx2x_virtf *vf,
278305cc5a39SYuval Mintz u16 vlan, bool add)
278405cc5a39SYuval Mintz {
278505cc5a39SYuval Mintz struct bnx2x_vlan_mac_ramrod_params ramrod_param;
278605cc5a39SYuval Mintz unsigned long ramrod_flags = 0;
278705cc5a39SYuval Mintz int rc = 0;
278805cc5a39SYuval Mintz
278905cc5a39SYuval Mintz /* configure the new vlan to device */
279005cc5a39SYuval Mintz memset(&ramrod_param, 0, sizeof(ramrod_param));
279105cc5a39SYuval Mintz __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
279205cc5a39SYuval Mintz ramrod_param.vlan_mac_obj = &bnx2x_leading_vfq(vf, vlan_obj);
279305cc5a39SYuval Mintz ramrod_param.ramrod_flags = ramrod_flags;
279405cc5a39SYuval Mintz ramrod_param.user_req.u.vlan.vlan = vlan;
279505cc5a39SYuval Mintz ramrod_param.user_req.cmd = add ? BNX2X_VLAN_MAC_ADD
279605cc5a39SYuval Mintz : BNX2X_VLAN_MAC_DEL;
279705cc5a39SYuval Mintz rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
279805cc5a39SYuval Mintz if (rc) {
279905cc5a39SYuval Mintz BNX2X_ERR("failed to configure vlan\n");
280005cc5a39SYuval Mintz return -EINVAL;
280105cc5a39SYuval Mintz }
280205cc5a39SYuval Mintz
280305cc5a39SYuval Mintz return 0;
280405cc5a39SYuval Mintz }
280505cc5a39SYuval Mintz
bnx2x_set_vf_vlan(struct net_device * dev,int vfidx,u16 vlan,u8 qos,__be16 vlan_proto)280679aab093SMoshe Shemesh int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos,
280779aab093SMoshe Shemesh __be16 vlan_proto)
28083ec9f9caSAriel Elior {
28095ae30d78SAriel Elior struct pf_vf_bulletin_content *bulletin = NULL;
2810e8379c79SYuval Mintz struct bnx2x *bp = netdev_priv(dev);
2811e8379c79SYuval Mintz struct bnx2x_vlan_mac_obj *vlan_obj;
2812e8379c79SYuval Mintz unsigned long vlan_mac_flags = 0;
2813e8379c79SYuval Mintz unsigned long ramrod_flags = 0;
2814e8379c79SYuval Mintz struct bnx2x_virtf *vf = NULL;
281505cc5a39SYuval Mintz int i, rc;
28163ec9f9caSAriel Elior
28173ec9f9caSAriel Elior if (vlan > 4095) {
28183ec9f9caSAriel Elior BNX2X_ERR("illegal vlan value %d\n", vlan);
28193ec9f9caSAriel Elior return -EINVAL;
28203ec9f9caSAriel Elior }
28213ec9f9caSAriel Elior
282279aab093SMoshe Shemesh if (vlan_proto != htons(ETH_P_8021Q))
282379aab093SMoshe Shemesh return -EPROTONOSUPPORT;
282479aab093SMoshe Shemesh
28253ec9f9caSAriel Elior DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
28263ec9f9caSAriel Elior vfidx, vlan, 0);
28273ec9f9caSAriel Elior
28286495d15aSDmitry Kravkov /* sanity and init */
28296495d15aSDmitry Kravkov rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
28306495d15aSDmitry Kravkov if (rc)
28316495d15aSDmitry Kravkov return rc;
28326495d15aSDmitry Kravkov
28333ec9f9caSAriel Elior /* update PF's copy of the VF's bulletin. No point in posting the vlan
28343ec9f9caSAriel Elior * to the VF since it doesn't have anything to do with it. But it useful
28353ec9f9caSAriel Elior * to store it here in case the VF is not up yet and we can only
2836e8379c79SYuval Mintz * configure the vlan later when it does. Treat vlan id 0 as remove the
2837e8379c79SYuval Mintz * Host tag.
28383ec9f9caSAriel Elior */
28396495d15aSDmitry Kravkov mutex_lock(&bp->vfdb->bulletin_mutex);
28406495d15aSDmitry Kravkov
2841e8379c79SYuval Mintz if (vlan > 0)
28423ec9f9caSAriel Elior bulletin->valid_bitmap |= 1 << VLAN_VALID;
2843e8379c79SYuval Mintz else
2844e8379c79SYuval Mintz bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
28453ec9f9caSAriel Elior bulletin->vlan = vlan;
28463ec9f9caSAriel Elior
284705cc5a39SYuval Mintz /* Post update on VF's bulletin board */
284805cc5a39SYuval Mintz rc = bnx2x_post_vf_bulletin(bp, vfidx);
284905cc5a39SYuval Mintz if (rc)
285005cc5a39SYuval Mintz BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
28516495d15aSDmitry Kravkov mutex_unlock(&bp->vfdb->bulletin_mutex);
28526495d15aSDmitry Kravkov
28533ec9f9caSAriel Elior /* is vf initialized and queue set up? */
2854e8379c79SYuval Mintz if (vf->state != VF_ENABLED ||
2855e8379c79SYuval Mintz bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2856e8379c79SYuval Mintz BNX2X_Q_LOGICAL_STATE_ACTIVE)
2857e8379c79SYuval Mintz return rc;
28583ec9f9caSAriel Elior
28593a3534ecSYuval Mintz /* User should be able to see error in system logs */
28603a3534ecSYuval Mintz if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
28613a3534ecSYuval Mintz return -EINVAL;
28623ec9f9caSAriel Elior
28633ec9f9caSAriel Elior /* must lock vfpf channel to protect against vf flows */
28643ec9f9caSAriel Elior bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
28653ec9f9caSAriel Elior
28663ec9f9caSAriel Elior /* remove existing vlans */
28673ec9f9caSAriel Elior __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
28683a3534ecSYuval Mintz vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
28693ec9f9caSAriel Elior rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
28703ec9f9caSAriel Elior &ramrod_flags);
28713ec9f9caSAriel Elior if (rc) {
28723ec9f9caSAriel Elior BNX2X_ERR("failed to delete vlans\n");
287331329afdSAriel Elior rc = -EINVAL;
287431329afdSAriel Elior goto out;
28753ec9f9caSAriel Elior }
28763ec9f9caSAriel Elior
287705cc5a39SYuval Mintz /* clear accept_any_vlan when HV forces vlan, otherwise
287805cc5a39SYuval Mintz * according to VF capabilities
28793ec9f9caSAriel Elior */
288005cc5a39SYuval Mintz if (vlan || !(vf->cfg_flags & VF_CFG_VLAN_FILTER))
288105cc5a39SYuval Mintz bnx2x_set_vf_vlan_acceptance(bp, vf, !vlan);
288205cc5a39SYuval Mintz
288305cc5a39SYuval Mintz rc = bnx2x_set_vf_vlan_filter(bp, vf, vlan, true);
288405cc5a39SYuval Mintz if (rc)
288505cc5a39SYuval Mintz goto out;
288605cc5a39SYuval Mintz
288705cc5a39SYuval Mintz /* send queue update ramrods to configure default vlan and
288805cc5a39SYuval Mintz * silent vlan removal
288905cc5a39SYuval Mintz */
289005cc5a39SYuval Mintz for_each_vfq(vf, i) {
289105cc5a39SYuval Mintz struct bnx2x_queue_state_params q_params = {NULL};
289205cc5a39SYuval Mintz struct bnx2x_queue_update_params *update_params;
289305cc5a39SYuval Mintz
289405cc5a39SYuval Mintz q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
289505cc5a39SYuval Mintz
289605cc5a39SYuval Mintz /* validate the Q is UP */
289705cc5a39SYuval Mintz if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
289805cc5a39SYuval Mintz BNX2X_Q_LOGICAL_STATE_ACTIVE)
289905cc5a39SYuval Mintz continue;
290005cc5a39SYuval Mintz
29013ec9f9caSAriel Elior __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
29023ec9f9caSAriel Elior q_params.cmd = BNX2X_Q_CMD_UPDATE;
29033ec9f9caSAriel Elior update_params = &q_params.params.update;
29043ec9f9caSAriel Elior __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
29053ec9f9caSAriel Elior &update_params->update_flags);
29063ec9f9caSAriel Elior __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
29073ec9f9caSAriel Elior &update_params->update_flags);
29083ec9f9caSAriel Elior if (vlan == 0) {
29093ec9f9caSAriel Elior /* if vlan is 0 then we want to leave the VF traffic
29103ec9f9caSAriel Elior * untagged, and leave the incoming traffic untouched
29113ec9f9caSAriel Elior * (i.e. do not remove any vlan tags).
29123ec9f9caSAriel Elior */
29133ec9f9caSAriel Elior __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
29143ec9f9caSAriel Elior &update_params->update_flags);
29153ec9f9caSAriel Elior __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
29163ec9f9caSAriel Elior &update_params->update_flags);
29173ec9f9caSAriel Elior } else {
29183ec9f9caSAriel Elior /* configure default vlan to vf queue and set silent
29193ec9f9caSAriel Elior * vlan removal (the vf remains unaware of this vlan).
29203ec9f9caSAriel Elior */
29213ec9f9caSAriel Elior __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
29223ec9f9caSAriel Elior &update_params->update_flags);
29233ec9f9caSAriel Elior __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
29243ec9f9caSAriel Elior &update_params->update_flags);
29253ec9f9caSAriel Elior update_params->def_vlan = vlan;
2926e8379c79SYuval Mintz update_params->silent_removal_value =
2927e8379c79SYuval Mintz vlan & VLAN_VID_MASK;
2928e8379c79SYuval Mintz update_params->silent_removal_mask = VLAN_VID_MASK;
29293ec9f9caSAriel Elior }
29303ec9f9caSAriel Elior
29313ec9f9caSAriel Elior /* Update the Queue state */
29323ec9f9caSAriel Elior rc = bnx2x_queue_state_change(bp, &q_params);
29333ec9f9caSAriel Elior if (rc) {
293405cc5a39SYuval Mintz BNX2X_ERR("Failed to configure default VLAN queue %d\n",
293505cc5a39SYuval Mintz i);
293631329afdSAriel Elior goto out;
29373ec9f9caSAriel Elior }
293805cc5a39SYuval Mintz }
293931329afdSAriel Elior out:
29403ec9f9caSAriel Elior bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2941e8379c79SYuval Mintz
294205cc5a39SYuval Mintz if (rc)
294305cc5a39SYuval Mintz DP(BNX2X_MSG_IOV,
294405cc5a39SYuval Mintz "updated VF[%d] vlan configuration (vlan = %d)\n",
294505cc5a39SYuval Mintz vfidx, vlan);
294605cc5a39SYuval Mintz
294731329afdSAriel Elior return rc;
29486411280aSAriel Elior }
29496411280aSAriel Elior
bnx2x_set_vf_spoofchk(struct net_device * dev,int idx,bool val)295075303965SShahed Shaikh int bnx2x_set_vf_spoofchk(struct net_device *dev, int idx, bool val)
295175303965SShahed Shaikh {
295275303965SShahed Shaikh struct bnx2x *bp = netdev_priv(dev);
295375303965SShahed Shaikh struct bnx2x_virtf *vf;
295475303965SShahed Shaikh int i, rc = 0;
295575303965SShahed Shaikh
295675303965SShahed Shaikh vf = BP_VF(bp, idx);
295775303965SShahed Shaikh if (!vf)
295875303965SShahed Shaikh return -EINVAL;
295975303965SShahed Shaikh
296075303965SShahed Shaikh /* nothing to do */
296175303965SShahed Shaikh if (vf->spoofchk == val)
296275303965SShahed Shaikh return 0;
296375303965SShahed Shaikh
296475303965SShahed Shaikh vf->spoofchk = val ? 1 : 0;
296575303965SShahed Shaikh
296675303965SShahed Shaikh DP(BNX2X_MSG_IOV, "%s spoofchk for VF %d\n",
296775303965SShahed Shaikh val ? "enabling" : "disabling", idx);
296875303965SShahed Shaikh
296975303965SShahed Shaikh /* is vf initialized and queue set up? */
297075303965SShahed Shaikh if (vf->state != VF_ENABLED ||
297175303965SShahed Shaikh bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
297275303965SShahed Shaikh BNX2X_Q_LOGICAL_STATE_ACTIVE)
297375303965SShahed Shaikh return rc;
297475303965SShahed Shaikh
297575303965SShahed Shaikh /* User should be able to see error in system logs */
297675303965SShahed Shaikh if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
297775303965SShahed Shaikh return -EINVAL;
297875303965SShahed Shaikh
297975303965SShahed Shaikh /* send queue update ramrods to configure spoofchk */
298075303965SShahed Shaikh for_each_vfq(vf, i) {
298175303965SShahed Shaikh struct bnx2x_queue_state_params q_params = {NULL};
298275303965SShahed Shaikh struct bnx2x_queue_update_params *update_params;
298375303965SShahed Shaikh
298475303965SShahed Shaikh q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
298575303965SShahed Shaikh
298675303965SShahed Shaikh /* validate the Q is UP */
298775303965SShahed Shaikh if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
298875303965SShahed Shaikh BNX2X_Q_LOGICAL_STATE_ACTIVE)
298975303965SShahed Shaikh continue;
299075303965SShahed Shaikh
299175303965SShahed Shaikh __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
299275303965SShahed Shaikh q_params.cmd = BNX2X_Q_CMD_UPDATE;
299375303965SShahed Shaikh update_params = &q_params.params.update;
299475303965SShahed Shaikh __set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
299575303965SShahed Shaikh &update_params->update_flags);
299675303965SShahed Shaikh if (val) {
299775303965SShahed Shaikh __set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,
299875303965SShahed Shaikh &update_params->update_flags);
299975303965SShahed Shaikh } else {
300075303965SShahed Shaikh __clear_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,
300175303965SShahed Shaikh &update_params->update_flags);
300275303965SShahed Shaikh }
300375303965SShahed Shaikh
300475303965SShahed Shaikh /* Update the Queue state */
300575303965SShahed Shaikh rc = bnx2x_queue_state_change(bp, &q_params);
300675303965SShahed Shaikh if (rc) {
300775303965SShahed Shaikh BNX2X_ERR("Failed to %s spoofchk on VF %d - vfq %d\n",
300875303965SShahed Shaikh val ? "enable" : "disable", idx, i);
300975303965SShahed Shaikh goto out;
301075303965SShahed Shaikh }
301175303965SShahed Shaikh }
301275303965SShahed Shaikh out:
301375303965SShahed Shaikh if (!rc)
301475303965SShahed Shaikh DP(BNX2X_MSG_IOV,
301575303965SShahed Shaikh "%s spoofchk for VF[%d]\n", val ? "Enabled" : "Disabled",
301675303965SShahed Shaikh idx);
301775303965SShahed Shaikh
301875303965SShahed Shaikh return rc;
301975303965SShahed Shaikh }
302075303965SShahed Shaikh
302116a5fd92SYuval Mintz /* crc is the first field in the bulletin board. Compute the crc over the
302216a5fd92SYuval Mintz * entire bulletin board excluding the crc field itself. Use the length field
302316a5fd92SYuval Mintz * as the Bulletin Board was posted by a PF with possibly a different version
302416a5fd92SYuval Mintz * from the vf which will sample it. Therefore, the length is computed by the
30256495d15aSDmitry Kravkov * PF and then used blindly by the VF.
30266411280aSAriel Elior */
bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content * bulletin)30276495d15aSDmitry Kravkov u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)
30286411280aSAriel Elior {
30296411280aSAriel Elior return crc32(BULLETIN_CRC_SEED,
30306411280aSAriel Elior ((u8 *)bulletin) + sizeof(bulletin->crc),
30314c133c39SAriel Elior bulletin->length - sizeof(bulletin->crc));
30326411280aSAriel Elior }
30336411280aSAriel Elior
30346411280aSAriel Elior /* Check for new posts on the bulletin board */
bnx2x_sample_bulletin(struct bnx2x * bp)30356411280aSAriel Elior enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
30366411280aSAriel Elior {
30376495d15aSDmitry Kravkov struct pf_vf_bulletin_content *bulletin;
30386411280aSAriel Elior int attempts;
30396411280aSAriel Elior
30406411280aSAriel Elior /* sampling structure in mid post may result with corrupted data
30416411280aSAriel Elior * validate crc to ensure coherency.
30426411280aSAriel Elior */
30436411280aSAriel Elior for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
30446495d15aSDmitry Kravkov u32 crc;
30456495d15aSDmitry Kravkov
30466495d15aSDmitry Kravkov /* sample the bulletin board */
30476495d15aSDmitry Kravkov memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,
30486495d15aSDmitry Kravkov sizeof(union pf_vf_bulletin));
30496495d15aSDmitry Kravkov
30506495d15aSDmitry Kravkov crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);
30516495d15aSDmitry Kravkov
30526495d15aSDmitry Kravkov if (bp->shadow_bulletin.content.crc == crc)
30536411280aSAriel Elior break;
30546495d15aSDmitry Kravkov
30556bf07b8eSYuval Mintz BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
30566495d15aSDmitry Kravkov bp->shadow_bulletin.content.crc, crc);
30576411280aSAriel Elior }
30586495d15aSDmitry Kravkov
30596411280aSAriel Elior if (attempts >= BULLETIN_ATTEMPTS) {
30606411280aSAriel Elior BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
30616411280aSAriel Elior attempts);
30626411280aSAriel Elior return PFVF_BULLETIN_CRC_ERR;
30636411280aSAriel Elior }
30646495d15aSDmitry Kravkov bulletin = &bp->shadow_bulletin.content;
30656495d15aSDmitry Kravkov
30666495d15aSDmitry Kravkov /* bulletin board hasn't changed since last sample */
30676495d15aSDmitry Kravkov if (bp->old_bulletin.version == bulletin->version)
30686495d15aSDmitry Kravkov return PFVF_BULLETIN_UNCHANGED;
30696411280aSAriel Elior
30706411280aSAriel Elior /* the mac address in bulletin board is valid and is new */
30716495d15aSDmitry Kravkov if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&
30726495d15aSDmitry Kravkov !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {
30736411280aSAriel Elior /* update new mac to net device */
3074a96d317fSJakub Kicinski eth_hw_addr_set(bp->dev, bulletin->mac);
30756411280aSAriel Elior }
30766411280aSAriel Elior
30776495d15aSDmitry Kravkov if (bulletin->valid_bitmap & (1 << LINK_VALID)) {
30786495d15aSDmitry Kravkov DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",
30796495d15aSDmitry Kravkov bulletin->link_speed, bulletin->link_flags);
30806495d15aSDmitry Kravkov
30816495d15aSDmitry Kravkov bp->vf_link_vars.line_speed = bulletin->link_speed;
30826495d15aSDmitry Kravkov bp->vf_link_vars.link_report_flags = 0;
30836495d15aSDmitry Kravkov /* Link is down */
30846495d15aSDmitry Kravkov if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)
30856495d15aSDmitry Kravkov __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
30866495d15aSDmitry Kravkov &bp->vf_link_vars.link_report_flags);
30876495d15aSDmitry Kravkov /* Full DUPLEX */
30886495d15aSDmitry Kravkov if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)
30896495d15aSDmitry Kravkov __set_bit(BNX2X_LINK_REPORT_FD,
30906495d15aSDmitry Kravkov &bp->vf_link_vars.link_report_flags);
30916495d15aSDmitry Kravkov /* Rx Flow Control is ON */
30926495d15aSDmitry Kravkov if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)
30936495d15aSDmitry Kravkov __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
30946495d15aSDmitry Kravkov &bp->vf_link_vars.link_report_flags);
30956495d15aSDmitry Kravkov /* Tx Flow Control is ON */
30966495d15aSDmitry Kravkov if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)
30976495d15aSDmitry Kravkov __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
30986495d15aSDmitry Kravkov &bp->vf_link_vars.link_report_flags);
30996495d15aSDmitry Kravkov __bnx2x_link_report(bp);
31006495d15aSDmitry Kravkov }
31013ec9f9caSAriel Elior
31026411280aSAriel Elior /* copy new bulletin board to bp */
31036495d15aSDmitry Kravkov memcpy(&bp->old_bulletin, bulletin,
31046495d15aSDmitry Kravkov sizeof(struct pf_vf_bulletin_content));
31056411280aSAriel Elior
31066411280aSAriel Elior return PFVF_BULLETIN_UPDATED;
31076411280aSAriel Elior }
31086411280aSAriel Elior
bnx2x_timer_sriov(struct bnx2x * bp)310937173488SYuval Mintz void bnx2x_timer_sriov(struct bnx2x *bp)
311037173488SYuval Mintz {
311137173488SYuval Mintz bnx2x_sample_bulletin(bp);
311237173488SYuval Mintz
311337173488SYuval Mintz /* if channel is down we need to self destruct */
3114230bb0f3SYuval Mintz if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)
3115230bb0f3SYuval Mintz bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3116230bb0f3SYuval Mintz BNX2X_MSG_IOV);
311737173488SYuval Mintz }
311837173488SYuval Mintz
bnx2x_vf_doorbells(struct bnx2x * bp)31191d6f3cd8SDmitry Kravkov void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
31206411280aSAriel Elior {
31216411280aSAriel Elior /* vf doorbells are embedded within the regview */
31221d6f3cd8SDmitry Kravkov return bp->regview + PXP_VF_ADDR_DB_START;
31236411280aSAriel Elior }
31246411280aSAriel Elior
bnx2x_vf_pci_dealloc(struct bnx2x * bp)3125e2a367f8SYuval Mintz void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
3126e2a367f8SYuval Mintz {
3127e2a367f8SYuval Mintz BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3128e2a367f8SYuval Mintz sizeof(struct bnx2x_vf_mbx_msg));
3129996652c7SMichal Schmidt BNX2X_PCI_FREE(bp->pf2vf_bulletin, bp->pf2vf_bulletin_mapping,
3130e2a367f8SYuval Mintz sizeof(union pf_vf_bulletin));
3131e2a367f8SYuval Mintz }
3132e2a367f8SYuval Mintz
bnx2x_vf_pci_alloc(struct bnx2x * bp)31336411280aSAriel Elior int bnx2x_vf_pci_alloc(struct bnx2x *bp)
31346411280aSAriel Elior {
31358b49a4c7SDmitry Kravkov mutex_init(&bp->vf2pf_mutex);
31368b49a4c7SDmitry Kravkov
31376411280aSAriel Elior /* allocate vf2pf mailbox for vf to pf channel */
3138cd2b0389SJoe Perches bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,
31396411280aSAriel Elior sizeof(struct bnx2x_vf_mbx_msg));
3140cd2b0389SJoe Perches if (!bp->vf2pf_mbox)
3141cd2b0389SJoe Perches goto alloc_mem_err;
31426411280aSAriel Elior
31436411280aSAriel Elior /* allocate pf 2 vf bulletin board */
3144cd2b0389SJoe Perches bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,
31456411280aSAriel Elior sizeof(union pf_vf_bulletin));
3146cd2b0389SJoe Perches if (!bp->pf2vf_bulletin)
3147cd2b0389SJoe Perches goto alloc_mem_err;
31486411280aSAriel Elior
31496495d15aSDmitry Kravkov bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);
31506495d15aSDmitry Kravkov
31516411280aSAriel Elior return 0;
31526411280aSAriel Elior
31536411280aSAriel Elior alloc_mem_err:
3154e2a367f8SYuval Mintz bnx2x_vf_pci_dealloc(bp);
31556411280aSAriel Elior return -ENOMEM;
31566411280aSAriel Elior }
31573c76feffSAriel Elior
bnx2x_iov_channel_down(struct bnx2x * bp)315878c3bcc5SAriel Elior void bnx2x_iov_channel_down(struct bnx2x *bp)
315978c3bcc5SAriel Elior {
316078c3bcc5SAriel Elior int vf_idx;
316178c3bcc5SAriel Elior struct pf_vf_bulletin_content *bulletin;
316278c3bcc5SAriel Elior
316378c3bcc5SAriel Elior if (!IS_SRIOV(bp))
316478c3bcc5SAriel Elior return;
316578c3bcc5SAriel Elior
316678c3bcc5SAriel Elior for_each_vf(bp, vf_idx) {
316778c3bcc5SAriel Elior /* locate this VFs bulletin board and update the channel down
316878c3bcc5SAriel Elior * bit
316978c3bcc5SAriel Elior */
317078c3bcc5SAriel Elior bulletin = BP_VF_BULLETIN(bp, vf_idx);
317178c3bcc5SAriel Elior bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
317278c3bcc5SAriel Elior
317378c3bcc5SAriel Elior /* update vf bulletin board */
317478c3bcc5SAriel Elior bnx2x_post_vf_bulletin(bp, vf_idx);
317578c3bcc5SAriel Elior }
317678c3bcc5SAriel Elior }
3177370d4a26SYuval Mintz
bnx2x_iov_task(struct work_struct * work)3178370d4a26SYuval Mintz void bnx2x_iov_task(struct work_struct *work)
3179370d4a26SYuval Mintz {
3180370d4a26SYuval Mintz struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);
3181370d4a26SYuval Mintz
3182370d4a26SYuval Mintz if (!netif_running(bp->dev))
3183370d4a26SYuval Mintz return;
3184370d4a26SYuval Mintz
3185370d4a26SYuval Mintz if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,
3186370d4a26SYuval Mintz &bp->iov_task_state))
3187370d4a26SYuval Mintz bnx2x_vf_handle_flr_event(bp);
3188370d4a26SYuval Mintz
3189370d4a26SYuval Mintz if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,
3190370d4a26SYuval Mintz &bp->iov_task_state))
3191370d4a26SYuval Mintz bnx2x_vf_mbx(bp);
3192370d4a26SYuval Mintz }
3193370d4a26SYuval Mintz
bnx2x_schedule_iov_task(struct bnx2x * bp,enum bnx2x_iov_flag flag)3194370d4a26SYuval Mintz void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)
3195370d4a26SYuval Mintz {
31964e857c58SPeter Zijlstra smp_mb__before_atomic();
3197370d4a26SYuval Mintz set_bit(flag, &bp->iov_task_state);
31984e857c58SPeter Zijlstra smp_mb__after_atomic();
3199370d4a26SYuval Mintz DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3200370d4a26SYuval Mintz queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);
3201370d4a26SYuval Mintz }
3202