1 /* bnx2x_dcb.c: Broadcom Everest network driver. 2 * 3 * Copyright 2009-2012 Broadcom Corporation 4 * 5 * Unless you and Broadcom execute a separate written software license 6 * agreement governing use of this software, this software is licensed to you 7 * under the terms of the GNU General Public License version 2, available 8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). 9 * 10 * Notwithstanding the above, under no circumstances may you combine this 11 * software in any way with any other Broadcom software provided under a 12 * license other than the GPL, without Broadcom's express prior written 13 * consent. 14 * 15 * Maintained by: Eilon Greenstein <eilong@broadcom.com> 16 * Written by: Dmitry Kravkov 17 * 18 */ 19 20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 21 22 #include <linux/netdevice.h> 23 #include <linux/types.h> 24 #include <linux/errno.h> 25 #include <linux/rtnetlink.h> 26 #include <net/dcbnl.h> 27 28 #include "bnx2x.h" 29 #include "bnx2x_cmn.h" 30 #include "bnx2x_dcb.h" 31 32 /* forward declarations of dcbx related functions */ 33 static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp); 34 static void bnx2x_pfc_set_pfc(struct bnx2x *bp); 35 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp); 36 static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp); 37 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 38 u32 *set_configuration_ets_pg, 39 u32 *pri_pg_tbl); 40 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 41 u32 *pg_pri_orginal_spread, 42 struct pg_help_data *help_data); 43 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 44 struct pg_help_data *help_data, 45 struct dcbx_ets_feature *ets, 46 u32 *pg_pri_orginal_spread); 47 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 48 struct cos_help_data *cos_data, 49 u32 *pg_pri_orginal_spread, 50 struct dcbx_ets_feature *ets); 51 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 52 struct bnx2x_func_tx_start_params*); 53 54 /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */ 55 static void bnx2x_read_data(struct bnx2x *bp, u32 *buff, 56 u32 addr, u32 len) 57 { 58 int i; 59 for (i = 0; i < len; i += 4, buff++) 60 *buff = REG_RD(bp, addr + i); 61 } 62 63 static void bnx2x_write_data(struct bnx2x *bp, u32 *buff, 64 u32 addr, u32 len) 65 { 66 int i; 67 for (i = 0; i < len; i += 4, buff++) 68 REG_WR(bp, addr + i, *buff); 69 } 70 71 static void bnx2x_pfc_set(struct bnx2x *bp) 72 { 73 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0}; 74 u32 pri_bit, val = 0; 75 int i; 76 77 pfc_params.num_of_rx_cos_priority_mask = 78 bp->dcbx_port_params.ets.num_of_cos; 79 80 /* Tx COS configuration */ 81 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++) 82 /* 83 * We configure only the pauseable bits (non pauseable aren't 84 * configured at all) it's done to avoid false pauses from 85 * network 86 */ 87 pfc_params.rx_cos_priority_mask[i] = 88 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask 89 & DCBX_PFC_PRI_PAUSE_MASK(bp); 90 91 /* 92 * Rx COS configuration 93 * Changing PFC RX configuration . 94 * In RX COS0 will always be configured to lossy and COS1 to lossless 95 */ 96 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) { 97 pri_bit = 1 << i; 98 99 if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp)) 100 val |= 1 << (i * 4); 101 } 102 103 pfc_params.pkt_priority_to_cos = val; 104 105 /* RX COS0 */ 106 pfc_params.llfc_low_priority_classes = 0; 107 /* RX COS1 */ 108 pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp); 109 110 /* BRB configuration */ 111 pfc_params.cos0_pauseable = false; 112 pfc_params.cos1_pauseable = true; 113 114 bnx2x_acquire_phy_lock(bp); 115 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED; 116 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params); 117 bnx2x_release_phy_lock(bp); 118 } 119 120 static void bnx2x_pfc_clear(struct bnx2x *bp) 121 { 122 struct bnx2x_nig_brb_pfc_port_params nig_params = {0}; 123 nig_params.pause_enable = 1; 124 bnx2x_acquire_phy_lock(bp); 125 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED; 126 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params); 127 bnx2x_release_phy_lock(bp); 128 } 129 130 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp, 131 struct dcbx_features *features, 132 u32 error) 133 { 134 u8 i = 0; 135 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error); 136 137 /* PG */ 138 DP(NETIF_MSG_LINK, 139 "local_mib.features.ets.enabled %x\n", features->ets.enabled); 140 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) 141 DP(NETIF_MSG_LINK, 142 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i, 143 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i)); 144 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) 145 DP(NETIF_MSG_LINK, 146 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i, 147 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i)); 148 149 /* pfc */ 150 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n", 151 features->pfc.pri_en_bitmap); 152 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n", 153 features->pfc.pfc_caps); 154 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n", 155 features->pfc.enabled); 156 157 DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n", 158 features->app.default_pri); 159 DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n", 160 features->app.tc_supported); 161 DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n", 162 features->app.enabled); 163 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 164 DP(BNX2X_MSG_DCB, 165 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n", 166 i, features->app.app_pri_tbl[i].app_id); 167 DP(BNX2X_MSG_DCB, 168 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n", 169 i, features->app.app_pri_tbl[i].pri_bitmap); 170 DP(BNX2X_MSG_DCB, 171 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n", 172 i, features->app.app_pri_tbl[i].appBitfield); 173 } 174 } 175 176 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp, 177 u8 pri_bitmap, 178 u8 llfc_traf_type) 179 { 180 u32 pri = MAX_PFC_PRIORITIES; 181 u32 index = MAX_PFC_PRIORITIES - 1; 182 u32 pri_mask; 183 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 184 185 /* Choose the highest priority */ 186 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) { 187 pri_mask = 1 << index; 188 if (GET_FLAGS(pri_bitmap, pri_mask)) 189 pri = index ; 190 index--; 191 } 192 193 if (pri < MAX_PFC_PRIORITIES) 194 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri); 195 } 196 197 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp, 198 struct dcbx_app_priority_feature *app, 199 u32 error) { 200 u8 index; 201 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 202 203 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) 204 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n"); 205 206 if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH)) 207 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n"); 208 209 if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND)) 210 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n"); 211 if (app->enabled && 212 !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH | 213 DCBX_REMOTE_APP_TLV_NOT_FOUND)) { 214 215 bp->dcbx_port_params.app.enabled = true; 216 217 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 218 ttp[index] = 0; 219 220 if (app->default_pri < MAX_PFC_PRIORITIES) 221 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri; 222 223 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) { 224 struct dcbx_app_priority_entry *entry = 225 app->app_pri_tbl; 226 227 if (GET_FLAGS(entry[index].appBitfield, 228 DCBX_APP_SF_ETH_TYPE) && 229 ETH_TYPE_FCOE == entry[index].app_id) 230 bnx2x_dcbx_get_ap_priority(bp, 231 entry[index].pri_bitmap, 232 LLFC_TRAFFIC_TYPE_FCOE); 233 234 if (GET_FLAGS(entry[index].appBitfield, 235 DCBX_APP_SF_PORT) && 236 TCP_PORT_ISCSI == entry[index].app_id) 237 bnx2x_dcbx_get_ap_priority(bp, 238 entry[index].pri_bitmap, 239 LLFC_TRAFFIC_TYPE_ISCSI); 240 } 241 } else { 242 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n"); 243 bp->dcbx_port_params.app.enabled = false; 244 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 245 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY; 246 } 247 } 248 249 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, 250 struct dcbx_ets_feature *ets, 251 u32 error) { 252 int i = 0; 253 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0}; 254 struct pg_help_data pg_help_data; 255 struct bnx2x_dcbx_cos_params *cos_params = 256 bp->dcbx_port_params.ets.cos_params; 257 258 memset(&pg_help_data, 0, sizeof(struct pg_help_data)); 259 260 261 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR)) 262 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n"); 263 264 if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND)) 265 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n"); 266 267 /* Clean up old settings of ets on COS */ 268 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) { 269 cos_params[i].pauseable = false; 270 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID; 271 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW; 272 cos_params[i].pri_bitmask = 0; 273 } 274 275 if (bp->dcbx_port_params.app.enabled && ets->enabled && 276 !GET_FLAGS(error, 277 DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) { 278 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n"); 279 bp->dcbx_port_params.ets.enabled = true; 280 281 bnx2x_dcbx_get_ets_pri_pg_tbl(bp, 282 pg_pri_orginal_spread, 283 ets->pri_pg_tbl); 284 285 bnx2x_dcbx_get_num_pg_traf_type(bp, 286 pg_pri_orginal_spread, 287 &pg_help_data); 288 289 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data, 290 ets, pg_pri_orginal_spread); 291 292 } else { 293 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n"); 294 bp->dcbx_port_params.ets.enabled = false; 295 ets->pri_pg_tbl[0] = 0; 296 297 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++) 298 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1); 299 } 300 } 301 302 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp, 303 struct dcbx_pfc_feature *pfc, u32 error) 304 { 305 306 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR)) 307 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n"); 308 309 if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND)) 310 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n"); 311 if (bp->dcbx_port_params.app.enabled && pfc->enabled && 312 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH | 313 DCBX_REMOTE_PFC_TLV_NOT_FOUND)) { 314 bp->dcbx_port_params.pfc.enabled = true; 315 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 316 ~(pfc->pri_en_bitmap); 317 } else { 318 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n"); 319 bp->dcbx_port_params.pfc.enabled = false; 320 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0; 321 } 322 } 323 324 /* maps unmapped priorities to to the same COS as L2 */ 325 static void bnx2x_dcbx_map_nw(struct bnx2x *bp) 326 { 327 int i; 328 u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */ 329 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 330 u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW]; 331 struct bnx2x_dcbx_cos_params *cos_params = 332 bp->dcbx_port_params.ets.cos_params; 333 334 /* get unmapped priorities by clearing mapped bits */ 335 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 336 unmapped &= ~(1 << ttp[i]); 337 338 /* find cos for nw prio and extend it with unmapped */ 339 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) { 340 if (cos_params[i].pri_bitmask & nw_prio) { 341 /* extend the bitmask with unmapped */ 342 DP(BNX2X_MSG_DCB, 343 "cos %d extended with 0x%08x\n", i, unmapped); 344 cos_params[i].pri_bitmask |= unmapped; 345 break; 346 } 347 } 348 } 349 350 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp, 351 struct dcbx_features *features, 352 u32 error) 353 { 354 bnx2x_dcbx_get_ap_feature(bp, &features->app, error); 355 356 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error); 357 358 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error); 359 360 bnx2x_dcbx_map_nw(bp); 361 } 362 363 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100) 364 static int bnx2x_dcbx_read_mib(struct bnx2x *bp, 365 u32 *base_mib_addr, 366 u32 offset, 367 int read_mib_type) 368 { 369 int max_try_read = 0; 370 u32 mib_size, prefix_seq_num, suffix_seq_num; 371 struct lldp_remote_mib *remote_mib ; 372 struct lldp_local_mib *local_mib; 373 374 375 switch (read_mib_type) { 376 case DCBX_READ_LOCAL_MIB: 377 mib_size = sizeof(struct lldp_local_mib); 378 break; 379 case DCBX_READ_REMOTE_MIB: 380 mib_size = sizeof(struct lldp_remote_mib); 381 break; 382 default: 383 return 1; /*error*/ 384 } 385 386 offset += BP_PORT(bp) * mib_size; 387 388 do { 389 bnx2x_read_data(bp, base_mib_addr, offset, mib_size); 390 391 max_try_read++; 392 393 switch (read_mib_type) { 394 case DCBX_READ_LOCAL_MIB: 395 local_mib = (struct lldp_local_mib *) base_mib_addr; 396 prefix_seq_num = local_mib->prefix_seq_num; 397 suffix_seq_num = local_mib->suffix_seq_num; 398 break; 399 case DCBX_READ_REMOTE_MIB: 400 remote_mib = (struct lldp_remote_mib *) base_mib_addr; 401 prefix_seq_num = remote_mib->prefix_seq_num; 402 suffix_seq_num = remote_mib->suffix_seq_num; 403 break; 404 default: 405 return 1; /*error*/ 406 } 407 } while ((prefix_seq_num != suffix_seq_num) && 408 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ)); 409 410 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) { 411 BNX2X_ERR("MIB could not be read\n"); 412 return 1; 413 } 414 415 return 0; 416 } 417 418 static void bnx2x_pfc_set_pfc(struct bnx2x *bp) 419 { 420 if (bp->dcbx_port_params.pfc.enabled && 421 !(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR)) 422 /* 423 * 1. Fills up common PFC structures if required 424 * 2. Configure NIG, MAC and BRB via the elink 425 */ 426 bnx2x_pfc_set(bp); 427 else 428 bnx2x_pfc_clear(bp); 429 } 430 431 static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp) 432 { 433 struct bnx2x_func_state_params func_params = {NULL}; 434 435 func_params.f_obj = &bp->func_obj; 436 func_params.cmd = BNX2X_F_CMD_TX_STOP; 437 438 DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n"); 439 return bnx2x_func_state_change(bp, &func_params); 440 } 441 442 static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp) 443 { 444 struct bnx2x_func_state_params func_params = {NULL}; 445 struct bnx2x_func_tx_start_params *tx_params = 446 &func_params.params.tx_start; 447 448 func_params.f_obj = &bp->func_obj; 449 func_params.cmd = BNX2X_F_CMD_TX_START; 450 451 bnx2x_dcbx_fw_struct(bp, tx_params); 452 453 DP(BNX2X_MSG_DCB, "START TRAFFIC\n"); 454 return bnx2x_func_state_change(bp, &func_params); 455 } 456 457 static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp) 458 { 459 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 460 int rc = 0; 461 462 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) { 463 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos); 464 return; 465 } 466 467 /* valid COS entries */ 468 if (ets->num_of_cos == 1) /* no ETS */ 469 return; 470 471 /* sanity */ 472 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) && 473 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) || 474 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) && 475 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) { 476 BNX2X_ERR("all COS should have at least bw_limit or strict" 477 "ets->cos_params[0].strict= %x" 478 "ets->cos_params[0].bw_tbl= %x" 479 "ets->cos_params[1].strict= %x" 480 "ets->cos_params[1].bw_tbl= %x", 481 ets->cos_params[0].strict, 482 ets->cos_params[0].bw_tbl, 483 ets->cos_params[1].strict, 484 ets->cos_params[1].bw_tbl); 485 return; 486 } 487 /* If we join a group and there is bw_tbl and strict then bw rules */ 488 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) && 489 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) { 490 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl; 491 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl; 492 /* Do not allow 0-100 configuration 493 * since PBF does not support it 494 * force 1-99 instead 495 */ 496 if (bw_tbl_0 == 0) { 497 bw_tbl_0 = 1; 498 bw_tbl_1 = 99; 499 } else if (bw_tbl_1 == 0) { 500 bw_tbl_1 = 1; 501 bw_tbl_0 = 99; 502 } 503 504 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1); 505 } else { 506 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST) 507 rc = bnx2x_ets_strict(&bp->link_params, 0); 508 else if (ets->cos_params[1].strict 509 == BNX2X_DCBX_STRICT_COS_HIGHEST) 510 rc = bnx2x_ets_strict(&bp->link_params, 1); 511 if (rc) 512 BNX2X_ERR("update_ets_params failed\n"); 513 } 514 } 515 516 /* 517 * In E3B0 the configuration may have more than 2 COS. 518 */ 519 static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp) 520 { 521 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 522 struct bnx2x_ets_params ets_params = { 0 }; 523 u8 i; 524 525 ets_params.num_of_cos = ets->num_of_cos; 526 527 for (i = 0; i < ets->num_of_cos; i++) { 528 /* COS is SP */ 529 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) { 530 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) { 531 BNX2X_ERR("COS can't be not BW and not SP\n"); 532 return; 533 } 534 535 ets_params.cos[i].state = bnx2x_cos_state_strict; 536 ets_params.cos[i].params.sp_params.pri = 537 ets->cos_params[i].strict; 538 } else { /* COS is BW */ 539 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) { 540 BNX2X_ERR("COS can't be not BW and not SP\n"); 541 return; 542 } 543 ets_params.cos[i].state = bnx2x_cos_state_bw; 544 ets_params.cos[i].params.bw_params.bw = 545 (u8)ets->cos_params[i].bw_tbl; 546 } 547 } 548 549 /* Configure the ETS in HW */ 550 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars, 551 &ets_params)) { 552 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n"); 553 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 554 } 555 } 556 557 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) 558 { 559 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 560 561 if (!bp->dcbx_port_params.ets.enabled || 562 (bp->dcbx_error & DCBX_REMOTE_MIB_ERROR)) 563 return; 564 565 if (CHIP_IS_E3B0(bp)) 566 bnx2x_dcbx_update_ets_config(bp); 567 else 568 bnx2x_dcbx_2cos_limit_update_ets_config(bp); 569 } 570 571 #ifdef BCM_DCBNL 572 static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp) 573 { 574 struct lldp_remote_mib remote_mib = {0}; 575 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset); 576 int rc; 577 578 DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n", 579 dcbx_remote_mib_offset); 580 581 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) { 582 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n"); 583 return -EINVAL; 584 } 585 586 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset, 587 DCBX_READ_REMOTE_MIB); 588 589 if (rc) { 590 BNX2X_ERR("Faild to read remote mib from FW\n"); 591 return rc; 592 } 593 594 /* save features and flags */ 595 bp->dcbx_remote_feat = remote_mib.features; 596 bp->dcbx_remote_flags = remote_mib.flags; 597 return 0; 598 } 599 #endif 600 601 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp) 602 { 603 struct lldp_local_mib local_mib = {0}; 604 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset); 605 int rc; 606 607 DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset); 608 609 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) { 610 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n"); 611 return -EINVAL; 612 } 613 614 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset, 615 DCBX_READ_LOCAL_MIB); 616 617 if (rc) { 618 BNX2X_ERR("Faild to read local mib from FW\n"); 619 return rc; 620 } 621 622 /* save features and error */ 623 bp->dcbx_local_feat = local_mib.features; 624 bp->dcbx_error = local_mib.error; 625 return 0; 626 } 627 628 629 #ifdef BCM_DCBNL 630 static inline 631 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent) 632 { 633 u8 pri; 634 635 /* Choose the highest priority */ 636 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--) 637 if (ent->pri_bitmap & (1 << pri)) 638 break; 639 return pri; 640 } 641 642 static inline 643 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent) 644 { 645 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) == 646 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM : 647 DCB_APP_IDTYPE_ETHTYPE; 648 } 649 650 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall) 651 { 652 int i, err = 0; 653 654 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) { 655 struct dcbx_app_priority_entry *ent = 656 &bp->dcbx_local_feat.app.app_pri_tbl[i]; 657 658 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 659 u8 up = bnx2x_dcbx_dcbnl_app_up(ent); 660 661 /* avoid invalid user-priority */ 662 if (up) { 663 struct dcb_app app; 664 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 665 app.protocol = ent->app_id; 666 app.priority = delall ? 0 : up; 667 err = dcb_setapp(bp->dev, &app); 668 } 669 } 670 } 671 return err; 672 } 673 #endif 674 675 static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp) 676 { 677 u8 prio, cos; 678 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) { 679 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) { 680 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask 681 & (1 << prio)) { 682 bp->prio_to_cos[prio] = cos; 683 DP(BNX2X_MSG_DCB, 684 "tx_mapping %d --> %d\n", prio, cos); 685 } 686 } 687 } 688 689 /* setup tc must be called under rtnl lock, but we can't take it here 690 * as we are handling an attetntion on a work queue which must be 691 * flushed at some rtnl-locked contexts (e.g. if down) 692 */ 693 if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state)) 694 schedule_delayed_work(&bp->sp_rtnl_task, 0); 695 } 696 697 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) 698 { 699 switch (state) { 700 case BNX2X_DCBX_STATE_NEG_RECEIVED: 701 { 702 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n"); 703 #ifdef BCM_DCBNL 704 /** 705 * Delete app tlvs from dcbnl before reading new 706 * negotiation results 707 */ 708 bnx2x_dcbnl_update_applist(bp, true); 709 710 /* Read rmeote mib if dcbx is in the FW */ 711 if (bnx2x_dcbx_read_shmem_remote_mib(bp)) 712 return; 713 #endif 714 /* Read neg results if dcbx is in the FW */ 715 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 716 return; 717 718 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 719 bp->dcbx_error); 720 721 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 722 bp->dcbx_error); 723 724 /* mark DCBX result for PMF migration */ 725 bnx2x_update_drv_flags(bp, 726 1 << DRV_FLAGS_DCB_CONFIGURED, 727 1); 728 #ifdef BCM_DCBNL 729 /* 730 * Add new app tlvs to dcbnl 731 */ 732 bnx2x_dcbnl_update_applist(bp, false); 733 #endif 734 /* 735 * reconfigure the netdevice with the results of the new 736 * dcbx negotiation. 737 */ 738 bnx2x_dcbx_update_tc_mapping(bp); 739 740 /* 741 * allow other funtions to update their netdevices 742 * accordingly 743 */ 744 if (IS_MF(bp)) 745 bnx2x_link_sync_notify(bp); 746 747 bnx2x_dcbx_stop_hw_tx(bp); 748 749 return; 750 } 751 case BNX2X_DCBX_STATE_TX_PAUSED: 752 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n"); 753 bnx2x_pfc_set_pfc(bp); 754 755 bnx2x_dcbx_update_ets_params(bp); 756 bnx2x_dcbx_resume_hw_tx(bp); 757 758 return; 759 case BNX2X_DCBX_STATE_TX_RELEASED: 760 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n"); 761 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0); 762 #ifdef BCM_DCBNL 763 /* 764 * Send a notification for the new negotiated parameters 765 */ 766 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 767 #endif 768 return; 769 default: 770 BNX2X_ERR("Unknown DCBX_STATE\n"); 771 } 772 } 773 774 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \ 775 BP_PORT(bp)*sizeof(struct lldp_admin_mib)) 776 777 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, 778 u32 dcbx_lldp_params_offset) 779 { 780 struct lldp_admin_mib admin_mib; 781 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0; 782 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp); 783 784 /*shortcuts*/ 785 struct dcbx_features *af = &admin_mib.features; 786 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params; 787 788 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib)); 789 790 /* Read the data first */ 791 bnx2x_read_data(bp, (u32 *)&admin_mib, offset, 792 sizeof(struct lldp_admin_mib)); 793 794 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON) 795 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 796 else 797 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 798 799 if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) { 800 801 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK); 802 admin_mib.ver_cfg_flags |= 803 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) & 804 DCBX_CEE_VERSION_MASK; 805 806 af->ets.enabled = (u8)dp->admin_ets_enable; 807 808 af->pfc.enabled = (u8)dp->admin_pfc_enable; 809 810 /* FOR IEEE dp->admin_tc_supported_tx_enable */ 811 if (dp->admin_ets_configuration_tx_enable) 812 SET_FLAGS(admin_mib.ver_cfg_flags, 813 DCBX_ETS_CONFIG_TX_ENABLED); 814 else 815 RESET_FLAGS(admin_mib.ver_cfg_flags, 816 DCBX_ETS_CONFIG_TX_ENABLED); 817 /* For IEEE admin_ets_recommendation_tx_enable */ 818 if (dp->admin_pfc_tx_enable) 819 SET_FLAGS(admin_mib.ver_cfg_flags, 820 DCBX_PFC_CONFIG_TX_ENABLED); 821 else 822 RESET_FLAGS(admin_mib.ver_cfg_flags, 823 DCBX_PFC_CONFIG_TX_ENABLED); 824 825 if (dp->admin_application_priority_tx_enable) 826 SET_FLAGS(admin_mib.ver_cfg_flags, 827 DCBX_APP_CONFIG_TX_ENABLED); 828 else 829 RESET_FLAGS(admin_mib.ver_cfg_flags, 830 DCBX_APP_CONFIG_TX_ENABLED); 831 832 if (dp->admin_ets_willing) 833 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 834 else 835 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 836 /* For IEEE admin_ets_reco_valid */ 837 if (dp->admin_pfc_willing) 838 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 839 else 840 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 841 842 if (dp->admin_app_priority_willing) 843 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 844 else 845 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 846 847 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) { 848 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i, 849 (u8)dp->admin_configuration_bw_precentage[i]); 850 851 DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n", 852 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i)); 853 } 854 855 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 856 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i, 857 (u8)dp->admin_configuration_ets_pg[i]); 858 859 DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n", 860 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i)); 861 } 862 863 /*For IEEE admin_recommendation_bw_precentage 864 *For IEEE admin_recommendation_ets_pg */ 865 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap; 866 for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 867 if (dp->admin_priority_app_table[i].valid) { 868 struct bnx2x_admin_priority_app_table *table = 869 dp->admin_priority_app_table; 870 if ((ETH_TYPE_FCOE == table[i].app_id) && 871 (TRAFFIC_TYPE_ETH == table[i].traffic_type)) 872 traf_type = FCOE_APP_IDX; 873 else if ((TCP_PORT_ISCSI == table[i].app_id) && 874 (TRAFFIC_TYPE_PORT == table[i].traffic_type)) 875 traf_type = ISCSI_APP_IDX; 876 else 877 traf_type = other_traf_type++; 878 879 af->app.app_pri_tbl[traf_type].app_id = 880 table[i].app_id; 881 882 af->app.app_pri_tbl[traf_type].pri_bitmap = 883 (u8)(1 << table[i].priority); 884 885 af->app.app_pri_tbl[traf_type].appBitfield = 886 (DCBX_APP_ENTRY_VALID); 887 888 af->app.app_pri_tbl[traf_type].appBitfield |= 889 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ? 890 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT; 891 } 892 } 893 894 af->app.default_pri = (u8)dp->admin_default_priority; 895 896 } 897 898 /* Write the data. */ 899 bnx2x_write_data(bp, (u32 *)&admin_mib, offset, 900 sizeof(struct lldp_admin_mib)); 901 902 } 903 904 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled) 905 { 906 if (!CHIP_IS_E1x(bp)) { 907 bp->dcb_state = dcb_on; 908 bp->dcbx_enabled = dcbx_enabled; 909 } else { 910 bp->dcb_state = false; 911 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID; 912 } 913 DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n", 914 dcb_on ? "ON" : "OFF", 915 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" : 916 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" : 917 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ? 918 "on-chip with negotiation" : "invalid"); 919 } 920 921 void bnx2x_dcbx_init_params(struct bnx2x *bp) 922 { 923 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */ 924 bp->dcbx_config_params.admin_ets_willing = 1; 925 bp->dcbx_config_params.admin_pfc_willing = 1; 926 bp->dcbx_config_params.overwrite_settings = 1; 927 bp->dcbx_config_params.admin_ets_enable = 1; 928 bp->dcbx_config_params.admin_pfc_enable = 1; 929 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1; 930 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 931 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 932 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 933 bp->dcbx_config_params.admin_ets_reco_valid = 1; 934 bp->dcbx_config_params.admin_app_priority_willing = 1; 935 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100; 936 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0; 937 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0; 938 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0; 939 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0; 940 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0; 941 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0; 942 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0; 943 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0; 944 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0; 945 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0; 946 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0; 947 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0; 948 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0; 949 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0; 950 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0; 951 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100; 952 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0; 953 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0; 954 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0; 955 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0; 956 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0; 957 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0; 958 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0; 959 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0; 960 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1; 961 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2; 962 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3; 963 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4; 964 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5; 965 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6; 966 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7; 967 bp->dcbx_config_params.admin_pfc_bitmap = 0x0; 968 bp->dcbx_config_params.admin_priority_app_table[0].valid = 0; 969 bp->dcbx_config_params.admin_priority_app_table[1].valid = 0; 970 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0; 971 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0; 972 bp->dcbx_config_params.admin_default_priority = 0; 973 } 974 975 void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem) 976 { 977 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE; 978 979 /* only PMF can send ADMIN msg to MFW in old MFW versions */ 980 if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF))) 981 return; 982 983 if (bp->dcbx_enabled <= 0) 984 return; 985 986 /* validate: 987 * chip of good for dcbx version, 988 * dcb is wanted 989 * shmem2 contains DCBX support fields 990 */ 991 DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n", 992 bp->dcb_state, bp->port.pmf); 993 994 if (bp->dcb_state == BNX2X_DCB_STATE_ON && 995 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) { 996 dcbx_lldp_params_offset = 997 SHMEM2_RD(bp, dcbx_lldp_params_offset); 998 999 DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n", 1000 dcbx_lldp_params_offset); 1001 1002 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0); 1003 1004 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) { 1005 /* need HW lock to avoid scenario of two drivers 1006 * writing in parallel to shmem 1007 */ 1008 bnx2x_acquire_hw_lock(bp, 1009 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1010 if (update_shmem) 1011 bnx2x_dcbx_admin_mib_updated_params(bp, 1012 dcbx_lldp_params_offset); 1013 1014 /* Let HW start negotiation */ 1015 bnx2x_fw_command(bp, 1016 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0); 1017 /* release HW lock only after MFW acks that it finished 1018 * reading values from shmem 1019 */ 1020 bnx2x_release_hw_lock(bp, 1021 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1022 } 1023 } 1024 } 1025 static void 1026 bnx2x_dcbx_print_cos_params(struct bnx2x *bp, 1027 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1028 { 1029 u8 pri = 0; 1030 u8 cos = 0; 1031 1032 DP(BNX2X_MSG_DCB, 1033 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version); 1034 DP(BNX2X_MSG_DCB, 1035 "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n", 1036 bp->dcbx_port_params.pfc.priority_non_pauseable_mask); 1037 1038 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) { 1039 DP(BNX2X_MSG_DCB, 1040 "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n", 1041 cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask); 1042 1043 DP(BNX2X_MSG_DCB, 1044 "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n", 1045 cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl); 1046 1047 DP(BNX2X_MSG_DCB, 1048 "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n", 1049 cos, bp->dcbx_port_params.ets.cos_params[cos].strict); 1050 1051 DP(BNX2X_MSG_DCB, 1052 "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n", 1053 cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable); 1054 } 1055 1056 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1057 DP(BNX2X_MSG_DCB, 1058 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n", 1059 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority); 1060 1061 DP(BNX2X_MSG_DCB, 1062 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n", 1063 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos); 1064 } 1065 } 1066 1067 /* fills help_data according to pg_info */ 1068 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 1069 u32 *pg_pri_orginal_spread, 1070 struct pg_help_data *help_data) 1071 { 1072 bool pg_found = false; 1073 u32 i, traf_type, add_traf_type, add_pg; 1074 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1075 struct pg_entry_help_data *data = help_data->data; /*shotcut*/ 1076 1077 /* Set to invalid */ 1078 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 1079 data[i].pg = DCBX_ILLEGAL_PG; 1080 1081 for (add_traf_type = 0; 1082 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) { 1083 pg_found = false; 1084 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) { 1085 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]]; 1086 for (traf_type = 0; 1087 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1088 traf_type++) { 1089 if (data[traf_type].pg == add_pg) { 1090 if (!(data[traf_type].pg_priority & 1091 (1 << ttp[add_traf_type]))) 1092 data[traf_type]. 1093 num_of_dif_pri++; 1094 data[traf_type].pg_priority |= 1095 (1 << ttp[add_traf_type]); 1096 pg_found = true; 1097 break; 1098 } 1099 } 1100 if (false == pg_found) { 1101 data[help_data->num_of_pg].pg = add_pg; 1102 data[help_data->num_of_pg].pg_priority = 1103 (1 << ttp[add_traf_type]); 1104 data[help_data->num_of_pg].num_of_dif_pri = 1; 1105 help_data->num_of_pg++; 1106 } 1107 } 1108 DP(BNX2X_MSG_DCB, 1109 "add_traf_type %d pg_found %s num_of_pg %d\n", 1110 add_traf_type, (false == pg_found) ? "NO" : "YES", 1111 help_data->num_of_pg); 1112 } 1113 } 1114 1115 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp, 1116 struct cos_help_data *cos_data, 1117 u32 pri_join_mask) 1118 { 1119 /* Only one priority than only one COS */ 1120 cos_data->data[0].pausable = 1121 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1122 cos_data->data[0].pri_join_mask = pri_join_mask; 1123 cos_data->data[0].cos_bw = 100; 1124 cos_data->num_of_cos = 1; 1125 } 1126 1127 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp, 1128 struct cos_entry_help_data *data, 1129 u8 pg_bw) 1130 { 1131 if (data->cos_bw == DCBX_INVALID_COS_BW) 1132 data->cos_bw = pg_bw; 1133 else 1134 data->cos_bw += pg_bw; 1135 } 1136 1137 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 1138 struct cos_help_data *cos_data, 1139 u32 *pg_pri_orginal_spread, 1140 struct dcbx_ets_feature *ets) 1141 { 1142 u32 pri_tested = 0; 1143 u8 i = 0; 1144 u8 entry = 0; 1145 u8 pg_entry = 0; 1146 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1147 1148 cos_data->data[0].pausable = true; 1149 cos_data->data[1].pausable = false; 1150 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1151 1152 for (i = 0 ; i < num_of_pri ; i++) { 1153 pri_tested = 1 << bp->dcbx_port_params. 1154 app.traffic_type_priority[i]; 1155 1156 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) { 1157 cos_data->data[1].pri_join_mask |= pri_tested; 1158 entry = 1; 1159 } else { 1160 cos_data->data[0].pri_join_mask |= pri_tested; 1161 entry = 0; 1162 } 1163 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params. 1164 app.traffic_type_priority[i]]; 1165 /* There can be only one strict pg */ 1166 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) 1167 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry], 1168 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry)); 1169 else 1170 /* If we join a group and one is strict 1171 * than the bw rulls */ 1172 cos_data->data[entry].strict = 1173 BNX2X_DCBX_STRICT_COS_HIGHEST; 1174 } 1175 if ((0 == cos_data->data[0].pri_join_mask) && 1176 (0 == cos_data->data[1].pri_join_mask)) 1177 BNX2X_ERR("dcbx error: Both groups must have priorities\n"); 1178 } 1179 1180 1181 #ifndef POWER_OF_2 1182 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) 1183 #endif 1184 1185 static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp, 1186 struct pg_help_data *pg_help_data, 1187 struct cos_help_data *cos_data, 1188 u32 pri_join_mask, 1189 u8 num_of_dif_pri) 1190 { 1191 u8 i = 0; 1192 u32 pri_tested = 0; 1193 u32 pri_mask_without_pri = 0; 1194 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1195 /*debug*/ 1196 if (num_of_dif_pri == 1) { 1197 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask); 1198 return; 1199 } 1200 /* single priority group */ 1201 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1202 /* If there are both pauseable and non-pauseable priorities, 1203 * the pauseable priorities go to the first queue and 1204 * the non-pauseable priorities go to the second queue. 1205 */ 1206 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1207 /* Pauseable */ 1208 cos_data->data[0].pausable = true; 1209 /* Non pauseable.*/ 1210 cos_data->data[1].pausable = false; 1211 1212 if (2 == num_of_dif_pri) { 1213 cos_data->data[0].cos_bw = 50; 1214 cos_data->data[1].cos_bw = 50; 1215 } 1216 1217 if (3 == num_of_dif_pri) { 1218 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp, 1219 pri_join_mask))) { 1220 cos_data->data[0].cos_bw = 33; 1221 cos_data->data[1].cos_bw = 67; 1222 } else { 1223 cos_data->data[0].cos_bw = 67; 1224 cos_data->data[1].cos_bw = 33; 1225 } 1226 } 1227 1228 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) { 1229 /* If there are only pauseable priorities, 1230 * then one/two priorities go to the first queue 1231 * and one priority goes to the second queue. 1232 */ 1233 if (2 == num_of_dif_pri) { 1234 cos_data->data[0].cos_bw = 50; 1235 cos_data->data[1].cos_bw = 50; 1236 } else { 1237 cos_data->data[0].cos_bw = 67; 1238 cos_data->data[1].cos_bw = 33; 1239 } 1240 cos_data->data[1].pausable = true; 1241 cos_data->data[0].pausable = true; 1242 /* All priorities except FCOE */ 1243 cos_data->data[0].pri_join_mask = (pri_join_mask & 1244 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]))); 1245 /* Only FCOE priority.*/ 1246 cos_data->data[1].pri_join_mask = 1247 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]); 1248 } else 1249 /* If there are only non-pauseable priorities, 1250 * they will all go to the same queue. 1251 */ 1252 bnx2x_dcbx_ets_disabled_entry_data(bp, 1253 cos_data, pri_join_mask); 1254 } else { 1255 /* priority group which is not BW limited (PG#15):*/ 1256 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1257 /* If there are both pauseable and non-pauseable 1258 * priorities, the pauseable priorities go to the first 1259 * queue and the non-pauseable priorities 1260 * go to the second queue. 1261 */ 1262 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) > 1263 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) { 1264 cos_data->data[0].strict = 1265 BNX2X_DCBX_STRICT_COS_HIGHEST; 1266 cos_data->data[1].strict = 1267 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1268 BNX2X_DCBX_STRICT_COS_HIGHEST); 1269 } else { 1270 cos_data->data[0].strict = 1271 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1272 BNX2X_DCBX_STRICT_COS_HIGHEST); 1273 cos_data->data[1].strict = 1274 BNX2X_DCBX_STRICT_COS_HIGHEST; 1275 } 1276 /* Pauseable */ 1277 cos_data->data[0].pausable = true; 1278 /* Non pause-able.*/ 1279 cos_data->data[1].pausable = false; 1280 } else { 1281 /* If there are only pauseable priorities or 1282 * only non-pauseable,* the lower priorities go 1283 * to the first queue and the higherpriorities go 1284 * to the second queue. 1285 */ 1286 cos_data->data[0].pausable = 1287 cos_data->data[1].pausable = 1288 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1289 1290 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) { 1291 pri_tested = 1 << bp->dcbx_port_params. 1292 app.traffic_type_priority[i]; 1293 /* Remove priority tested */ 1294 pri_mask_without_pri = 1295 (pri_join_mask & ((u8)(~pri_tested))); 1296 if (pri_mask_without_pri < pri_tested) 1297 break; 1298 } 1299 1300 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX) 1301 BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n"); 1302 1303 cos_data->data[0].pri_join_mask = pri_mask_without_pri; 1304 cos_data->data[1].pri_join_mask = pri_tested; 1305 /* Both queues are strict priority, 1306 * and that with the highest priority 1307 * gets the highest strict priority in the arbiter. 1308 */ 1309 cos_data->data[0].strict = 1310 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1311 BNX2X_DCBX_STRICT_COS_HIGHEST); 1312 cos_data->data[1].strict = 1313 BNX2X_DCBX_STRICT_COS_HIGHEST; 1314 } 1315 } 1316 } 1317 1318 static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1319 struct bnx2x *bp, 1320 struct pg_help_data *pg_help_data, 1321 struct dcbx_ets_feature *ets, 1322 struct cos_help_data *cos_data, 1323 u32 *pg_pri_orginal_spread, 1324 u32 pri_join_mask, 1325 u8 num_of_dif_pri) 1326 { 1327 u8 i = 0; 1328 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 }; 1329 1330 /* If there are both pauseable and non-pauseable priorities, 1331 * the pauseable priorities go to the first queue and 1332 * the non-pauseable priorities go to the second queue. 1333 */ 1334 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1335 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1336 pg_help_data->data[0].pg_priority) || 1337 IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1338 pg_help_data->data[1].pg_priority)) { 1339 /* If one PG contains both pauseable and 1340 * non-pauseable priorities then ETS is disabled. 1341 */ 1342 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data, 1343 pg_pri_orginal_spread, ets); 1344 bp->dcbx_port_params.ets.enabled = false; 1345 return; 1346 } 1347 1348 /* Pauseable */ 1349 cos_data->data[0].pausable = true; 1350 /* Non pauseable. */ 1351 cos_data->data[1].pausable = false; 1352 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, 1353 pg_help_data->data[0].pg_priority)) { 1354 /* 0 is pauseable */ 1355 cos_data->data[0].pri_join_mask = 1356 pg_help_data->data[0].pg_priority; 1357 pg[0] = pg_help_data->data[0].pg; 1358 cos_data->data[1].pri_join_mask = 1359 pg_help_data->data[1].pg_priority; 1360 pg[1] = pg_help_data->data[1].pg; 1361 } else {/* 1 is pauseable */ 1362 cos_data->data[0].pri_join_mask = 1363 pg_help_data->data[1].pg_priority; 1364 pg[0] = pg_help_data->data[1].pg; 1365 cos_data->data[1].pri_join_mask = 1366 pg_help_data->data[0].pg_priority; 1367 pg[1] = pg_help_data->data[0].pg; 1368 } 1369 } else { 1370 /* If there are only pauseable priorities or 1371 * only non-pauseable, each PG goes to a queue. 1372 */ 1373 cos_data->data[0].pausable = cos_data->data[1].pausable = 1374 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1375 cos_data->data[0].pri_join_mask = 1376 pg_help_data->data[0].pg_priority; 1377 pg[0] = pg_help_data->data[0].pg; 1378 cos_data->data[1].pri_join_mask = 1379 pg_help_data->data[1].pg_priority; 1380 pg[1] = pg_help_data->data[1].pg; 1381 } 1382 1383 /* There can be only one strict pg */ 1384 for (i = 0 ; i < ARRAY_SIZE(pg); i++) { 1385 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES) 1386 cos_data->data[i].cos_bw = 1387 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]); 1388 else 1389 cos_data->data[i].strict = 1390 BNX2X_DCBX_STRICT_COS_HIGHEST; 1391 } 1392 } 1393 1394 static int bnx2x_dcbx_join_pgs( 1395 struct bnx2x *bp, 1396 struct dcbx_ets_feature *ets, 1397 struct pg_help_data *pg_help_data, 1398 u8 required_num_of_pg) 1399 { 1400 u8 entry_joined = pg_help_data->num_of_pg - 1; 1401 u8 entry_removed = entry_joined + 1; 1402 u8 pg_joined = 0; 1403 1404 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data) 1405 <= pg_help_data->num_of_pg) { 1406 1407 BNX2X_ERR("required_num_of_pg can't be zero\n"); 1408 return -EINVAL; 1409 } 1410 1411 while (required_num_of_pg < pg_help_data->num_of_pg) { 1412 entry_joined = pg_help_data->num_of_pg - 2; 1413 entry_removed = entry_joined + 1; 1414 /* protect index */ 1415 entry_removed %= ARRAY_SIZE(pg_help_data->data); 1416 1417 pg_help_data->data[entry_joined].pg_priority |= 1418 pg_help_data->data[entry_removed].pg_priority; 1419 1420 pg_help_data->data[entry_joined].num_of_dif_pri += 1421 pg_help_data->data[entry_removed].num_of_dif_pri; 1422 1423 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG || 1424 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG) 1425 /* Entries joined strict priority rules */ 1426 pg_help_data->data[entry_joined].pg = 1427 DCBX_STRICT_PRI_PG; 1428 else { 1429 /* Entries can be joined join BW */ 1430 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl, 1431 pg_help_data->data[entry_joined].pg) + 1432 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1433 pg_help_data->data[entry_removed].pg); 1434 1435 DCBX_PG_BW_SET(ets->pg_bw_tbl, 1436 pg_help_data->data[entry_joined].pg, pg_joined); 1437 } 1438 /* Joined the entries */ 1439 pg_help_data->num_of_pg--; 1440 } 1441 1442 return 0; 1443 } 1444 1445 static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1446 struct bnx2x *bp, 1447 struct pg_help_data *pg_help_data, 1448 struct dcbx_ets_feature *ets, 1449 struct cos_help_data *cos_data, 1450 u32 *pg_pri_orginal_spread, 1451 u32 pri_join_mask, 1452 u8 num_of_dif_pri) 1453 { 1454 u8 i = 0; 1455 u32 pri_tested = 0; 1456 u8 entry = 0; 1457 u8 pg_entry = 0; 1458 bool b_found_strict = false; 1459 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1460 1461 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1462 /* If there are both pauseable and non-pauseable priorities, 1463 * the pauseable priorities go to the first queue and the 1464 * non-pauseable priorities go to the second queue. 1465 */ 1466 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) 1467 bnx2x_dcbx_separate_pauseable_from_non(bp, 1468 cos_data, pg_pri_orginal_spread, ets); 1469 else { 1470 /* If two BW-limited PG-s were combined to one queue, 1471 * the BW is their sum. 1472 * 1473 * If there are only pauseable priorities or only non-pauseable, 1474 * and there are both BW-limited and non-BW-limited PG-s, 1475 * the BW-limited PG/s go to one queue and the non-BW-limited 1476 * PG/s go to the second queue. 1477 * 1478 * If there are only pauseable priorities or only non-pauseable 1479 * and all are BW limited, then two priorities go to the first 1480 * queue and one priority goes to the second queue. 1481 * 1482 * We will join this two cases: 1483 * if one is BW limited it will go to the secoend queue 1484 * otherwise the last priority will get it 1485 */ 1486 1487 cos_data->data[0].pausable = cos_data->data[1].pausable = 1488 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1489 1490 for (i = 0 ; i < num_of_pri; i++) { 1491 pri_tested = 1 << bp->dcbx_port_params. 1492 app.traffic_type_priority[i]; 1493 pg_entry = (u8)pg_pri_orginal_spread[bp-> 1494 dcbx_port_params.app.traffic_type_priority[i]]; 1495 1496 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1497 entry = 0; 1498 1499 if (i == (num_of_pri-1) && 1500 false == b_found_strict) 1501 /* last entry will be handled separately 1502 * If no priority is strict than last 1503 * enty goes to last queue.*/ 1504 entry = 1; 1505 cos_data->data[entry].pri_join_mask |= 1506 pri_tested; 1507 bnx2x_dcbx_add_to_cos_bw(bp, 1508 &cos_data->data[entry], 1509 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1510 pg_entry)); 1511 } else { 1512 b_found_strict = true; 1513 cos_data->data[1].pri_join_mask |= pri_tested; 1514 /* If we join a group and one is strict 1515 * than the bw rulls */ 1516 cos_data->data[1].strict = 1517 BNX2X_DCBX_STRICT_COS_HIGHEST; 1518 } 1519 } 1520 } 1521 } 1522 1523 1524 static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, 1525 struct pg_help_data *help_data, 1526 struct dcbx_ets_feature *ets, 1527 struct cos_help_data *cos_data, 1528 u32 *pg_pri_orginal_spread, 1529 u32 pri_join_mask, 1530 u8 num_of_dif_pri) 1531 { 1532 1533 /* default E2 settings */ 1534 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2; 1535 1536 switch (help_data->num_of_pg) { 1537 case 1: 1538 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params( 1539 bp, 1540 help_data, 1541 cos_data, 1542 pri_join_mask, 1543 num_of_dif_pri); 1544 break; 1545 case 2: 1546 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1547 bp, 1548 help_data, 1549 ets, 1550 cos_data, 1551 pg_pri_orginal_spread, 1552 pri_join_mask, 1553 num_of_dif_pri); 1554 break; 1555 1556 case 3: 1557 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1558 bp, 1559 help_data, 1560 ets, 1561 cos_data, 1562 pg_pri_orginal_spread, 1563 pri_join_mask, 1564 num_of_dif_pri); 1565 break; 1566 default: 1567 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n"); 1568 bnx2x_dcbx_ets_disabled_entry_data(bp, 1569 cos_data, pri_join_mask); 1570 } 1571 } 1572 1573 static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp, 1574 struct cos_help_data *cos_data, 1575 u8 entry, 1576 u8 num_spread_of_entries, 1577 u8 strict_app_pris) 1578 { 1579 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST; 1580 u8 num_of_app_pri = MAX_PFC_PRIORITIES; 1581 u8 app_pri_bit = 0; 1582 1583 while (num_spread_of_entries && num_of_app_pri > 0) { 1584 app_pri_bit = 1 << (num_of_app_pri - 1); 1585 if (app_pri_bit & strict_app_pris) { 1586 struct cos_entry_help_data *data = &cos_data-> 1587 data[entry]; 1588 num_spread_of_entries--; 1589 if (num_spread_of_entries == 0) { 1590 /* last entry needed put all the entries left */ 1591 data->cos_bw = DCBX_INVALID_COS_BW; 1592 data->strict = strict_pri; 1593 data->pri_join_mask = strict_app_pris; 1594 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1595 data->pri_join_mask); 1596 } else { 1597 strict_app_pris &= ~app_pri_bit; 1598 1599 data->cos_bw = DCBX_INVALID_COS_BW; 1600 data->strict = strict_pri; 1601 data->pri_join_mask = app_pri_bit; 1602 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1603 data->pri_join_mask); 1604 } 1605 1606 strict_pri = 1607 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri); 1608 entry++; 1609 } 1610 1611 num_of_app_pri--; 1612 } 1613 1614 if (num_spread_of_entries) { 1615 BNX2X_ERR("Didn't succeed to spread strict priorities\n"); 1616 return -EINVAL; 1617 } 1618 1619 return 0; 1620 } 1621 1622 static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp, 1623 struct cos_help_data *cos_data, 1624 u8 entry, 1625 u8 num_spread_of_entries, 1626 u8 strict_app_pris) 1627 { 1628 1629 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry, 1630 num_spread_of_entries, 1631 strict_app_pris)) { 1632 struct cos_entry_help_data *data = &cos_data-> 1633 data[entry]; 1634 /* Fill BW entry */ 1635 data->cos_bw = DCBX_INVALID_COS_BW; 1636 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST; 1637 data->pri_join_mask = strict_app_pris; 1638 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1639 data->pri_join_mask); 1640 return 1; 1641 } 1642 1643 return num_spread_of_entries; 1644 } 1645 1646 static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp, 1647 struct pg_help_data *help_data, 1648 struct dcbx_ets_feature *ets, 1649 struct cos_help_data *cos_data, 1650 u32 pri_join_mask) 1651 1652 { 1653 u8 need_num_of_entries = 0; 1654 u8 i = 0; 1655 u8 entry = 0; 1656 1657 /* 1658 * if the number of requested PG-s in CEE is greater than 3 1659 * then the results are not determined since this is a violation 1660 * of the standard. 1661 */ 1662 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) { 1663 if (bnx2x_dcbx_join_pgs(bp, ets, help_data, 1664 DCBX_COS_MAX_NUM_E3B0)) { 1665 BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n"); 1666 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, 1667 pri_join_mask); 1668 return; 1669 } 1670 } 1671 1672 for (i = 0 ; i < help_data->num_of_pg; i++) { 1673 struct pg_entry_help_data *pg = &help_data->data[i]; 1674 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1675 struct cos_entry_help_data *data = &cos_data-> 1676 data[entry]; 1677 /* Fill BW entry */ 1678 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg); 1679 data->strict = BNX2X_DCBX_STRICT_INVALID; 1680 data->pri_join_mask = pg->pg_priority; 1681 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1682 data->pri_join_mask); 1683 1684 entry++; 1685 } else { 1686 need_num_of_entries = min_t(u8, 1687 (u8)pg->num_of_dif_pri, 1688 (u8)DCBX_COS_MAX_NUM_E3B0 - 1689 help_data->num_of_pg + 1); 1690 /* 1691 * If there are still VOQ-s which have no associated PG, 1692 * then associate these VOQ-s to PG15. These PG-s will 1693 * be used for SP between priorities on PG15. 1694 */ 1695 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data, 1696 entry, need_num_of_entries, pg->pg_priority); 1697 } 1698 } 1699 1700 /* the entry will represent the number of COSes used */ 1701 cos_data->num_of_cos = entry; 1702 } 1703 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 1704 struct pg_help_data *help_data, 1705 struct dcbx_ets_feature *ets, 1706 u32 *pg_pri_orginal_spread) 1707 { 1708 struct cos_help_data cos_data; 1709 u8 i = 0; 1710 u32 pri_join_mask = 0; 1711 u8 num_of_dif_pri = 0; 1712 1713 memset(&cos_data, 0, sizeof(cos_data)); 1714 1715 /* Validate the pg value */ 1716 for (i = 0; i < help_data->num_of_pg ; i++) { 1717 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg && 1718 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg) 1719 BNX2X_ERR("Invalid pg[%d] data %x\n", i, 1720 help_data->data[i].pg); 1721 pri_join_mask |= help_data->data[i].pg_priority; 1722 num_of_dif_pri += help_data->data[i].num_of_dif_pri; 1723 } 1724 1725 /* defaults */ 1726 cos_data.num_of_cos = 1; 1727 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) { 1728 cos_data.data[i].pri_join_mask = 0; 1729 cos_data.data[i].pausable = false; 1730 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID; 1731 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW; 1732 } 1733 1734 if (CHIP_IS_E3B0(bp)) 1735 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets, 1736 &cos_data, pri_join_mask); 1737 else /* E2 + E3A0 */ 1738 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp, 1739 help_data, ets, 1740 &cos_data, 1741 pg_pri_orginal_spread, 1742 pri_join_mask, 1743 num_of_dif_pri); 1744 1745 for (i = 0; i < cos_data.num_of_cos ; i++) { 1746 struct bnx2x_dcbx_cos_params *p = 1747 &bp->dcbx_port_params.ets.cos_params[i]; 1748 1749 p->strict = cos_data.data[i].strict; 1750 p->bw_tbl = cos_data.data[i].cos_bw; 1751 p->pri_bitmask = cos_data.data[i].pri_join_mask; 1752 p->pauseable = cos_data.data[i].pausable; 1753 1754 /* sanity */ 1755 if (p->bw_tbl != DCBX_INVALID_COS_BW || 1756 p->strict != BNX2X_DCBX_STRICT_INVALID) { 1757 if (p->pri_bitmask == 0) 1758 BNX2X_ERR("Invalid pri_bitmask for %d\n", i); 1759 1760 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) { 1761 1762 if (p->pauseable && 1763 DCBX_PFC_PRI_GET_NON_PAUSE(bp, 1764 p->pri_bitmask) != 0) 1765 BNX2X_ERR("Inconsistent config for pausable COS %d\n", 1766 i); 1767 1768 if (!p->pauseable && 1769 DCBX_PFC_PRI_GET_PAUSE(bp, 1770 p->pri_bitmask) != 0) 1771 BNX2X_ERR("Inconsistent config for nonpausable COS %d\n", 1772 i); 1773 } 1774 } 1775 1776 if (p->pauseable) 1777 DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n", 1778 i, cos_data.data[i].pri_join_mask); 1779 else 1780 DP(BNX2X_MSG_DCB, 1781 "COS %d NONPAUSABLE prijoinmask 0x%x\n", 1782 i, cos_data.data[i].pri_join_mask); 1783 } 1784 1785 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ; 1786 } 1787 1788 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 1789 u32 *set_configuration_ets_pg, 1790 u32 *pri_pg_tbl) 1791 { 1792 int i; 1793 1794 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 1795 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i); 1796 1797 DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n", 1798 i, set_configuration_ets_pg[i]); 1799 } 1800 } 1801 1802 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 1803 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1804 { 1805 u16 pri_bit = 0; 1806 u8 cos = 0, pri = 0; 1807 struct priority_cos *tt2cos; 1808 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1809 1810 memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg)); 1811 1812 /* to disable DCB - the structure must be zeroed */ 1813 if (bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) 1814 return; 1815 1816 /*shortcut*/ 1817 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos; 1818 1819 /* Fw version should be incremented each update */ 1820 pfc_fw_cfg->dcb_version = ++bp->dcb_version; 1821 pfc_fw_cfg->dcb_enabled = 1; 1822 1823 /* Fill priority parameters */ 1824 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1825 tt2cos[pri].priority = ttp[pri]; 1826 pri_bit = 1 << tt2cos[pri].priority; 1827 1828 /* Fill COS parameters based on COS calculated to 1829 * make it more general for future use */ 1830 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) 1831 if (bp->dcbx_port_params.ets.cos_params[cos]. 1832 pri_bitmask & pri_bit) 1833 tt2cos[pri].cos = cos; 1834 } 1835 1836 /* we never want the FW to add a 0 vlan tag */ 1837 pfc_fw_cfg->dont_add_pri_0_en = 1; 1838 1839 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg); 1840 } 1841 1842 void bnx2x_dcbx_pmf_update(struct bnx2x *bp) 1843 { 1844 /* if we need to syncronize DCBX result from prev PMF 1845 * read it from shmem and update bp and netdev accordingly 1846 */ 1847 if (SHMEM2_HAS(bp, drv_flags) && 1848 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) { 1849 /* Read neg results if dcbx is in the FW */ 1850 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 1851 return; 1852 1853 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1854 bp->dcbx_error); 1855 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1856 bp->dcbx_error); 1857 #ifdef BCM_DCBNL 1858 /* 1859 * Add new app tlvs to dcbnl 1860 */ 1861 bnx2x_dcbnl_update_applist(bp, false); 1862 /* 1863 * Send a notification for the new negotiated parameters 1864 */ 1865 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 1866 #endif 1867 /* 1868 * reconfigure the netdevice with the results of the new 1869 * dcbx negotiation. 1870 */ 1871 bnx2x_dcbx_update_tc_mapping(bp); 1872 1873 } 1874 } 1875 1876 /* DCB netlink */ 1877 #ifdef BCM_DCBNL 1878 1879 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \ 1880 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC) 1881 1882 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp) 1883 { 1884 /* validate dcbnl call that may change HW state: 1885 * DCB is on and DCBX mode was SUCCESSFULLY set by the user. 1886 */ 1887 return bp->dcb_state && bp->dcbx_mode_uset; 1888 } 1889 1890 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev) 1891 { 1892 struct bnx2x *bp = netdev_priv(netdev); 1893 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state); 1894 return bp->dcb_state; 1895 } 1896 1897 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state) 1898 { 1899 struct bnx2x *bp = netdev_priv(netdev); 1900 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 1901 1902 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled); 1903 return 0; 1904 } 1905 1906 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev, 1907 u8 *perm_addr) 1908 { 1909 struct bnx2x *bp = netdev_priv(netdev); 1910 DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n"); 1911 1912 /* first the HW mac address */ 1913 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len); 1914 1915 #ifdef BCM_CNIC 1916 /* second SAN address */ 1917 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, netdev->addr_len); 1918 #endif 1919 } 1920 1921 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio, 1922 u8 prio_type, u8 pgid, u8 bw_pct, 1923 u8 up_map) 1924 { 1925 struct bnx2x *bp = netdev_priv(netdev); 1926 1927 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid); 1928 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 1929 return; 1930 1931 /** 1932 * bw_pct ingnored - band-width percentage devision between user 1933 * priorities within the same group is not 1934 * standard and hence not supported 1935 * 1936 * prio_type igonred - priority levels within the same group are not 1937 * standard and hence are not supported. According 1938 * to the standard pgid 15 is dedicated to strict 1939 * prioirty traffic (on the port level). 1940 * 1941 * up_map ignored 1942 */ 1943 1944 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid; 1945 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1946 } 1947 1948 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev, 1949 int pgid, u8 bw_pct) 1950 { 1951 struct bnx2x *bp = netdev_priv(netdev); 1952 DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct); 1953 1954 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 1955 return; 1956 1957 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct; 1958 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1959 } 1960 1961 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio, 1962 u8 prio_type, u8 pgid, u8 bw_pct, 1963 u8 up_map) 1964 { 1965 struct bnx2x *bp = netdev_priv(netdev); 1966 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 1967 } 1968 1969 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev, 1970 int pgid, u8 bw_pct) 1971 { 1972 struct bnx2x *bp = netdev_priv(netdev); 1973 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 1974 } 1975 1976 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio, 1977 u8 *prio_type, u8 *pgid, u8 *bw_pct, 1978 u8 *up_map) 1979 { 1980 struct bnx2x *bp = netdev_priv(netdev); 1981 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 1982 1983 /** 1984 * bw_pct ingnored - band-width percentage devision between user 1985 * priorities within the same group is not 1986 * standard and hence not supported 1987 * 1988 * prio_type igonred - priority levels within the same group are not 1989 * standard and hence are not supported. According 1990 * to the standard pgid 15 is dedicated to strict 1991 * prioirty traffic (on the port level). 1992 * 1993 * up_map ignored 1994 */ 1995 *up_map = *bw_pct = *prio_type = *pgid = 0; 1996 1997 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 1998 return; 1999 2000 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio); 2001 } 2002 2003 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev, 2004 int pgid, u8 *bw_pct) 2005 { 2006 struct bnx2x *bp = netdev_priv(netdev); 2007 DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid); 2008 2009 *bw_pct = 0; 2010 2011 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 2012 return; 2013 2014 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid); 2015 } 2016 2017 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio, 2018 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2019 u8 *up_map) 2020 { 2021 struct bnx2x *bp = netdev_priv(netdev); 2022 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2023 2024 *prio_type = *pgid = *bw_pct = *up_map = 0; 2025 } 2026 2027 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev, 2028 int pgid, u8 *bw_pct) 2029 { 2030 struct bnx2x *bp = netdev_priv(netdev); 2031 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2032 2033 *bw_pct = 0; 2034 } 2035 2036 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio, 2037 u8 setting) 2038 { 2039 struct bnx2x *bp = netdev_priv(netdev); 2040 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting); 2041 2042 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES) 2043 return; 2044 2045 bp->dcbx_config_params.admin_pfc_bitmap |= ((setting ? 1 : 0) << prio); 2046 2047 if (setting) 2048 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 2049 } 2050 2051 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio, 2052 u8 *setting) 2053 { 2054 struct bnx2x *bp = netdev_priv(netdev); 2055 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2056 2057 *setting = 0; 2058 2059 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES) 2060 return; 2061 2062 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1; 2063 } 2064 2065 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev) 2066 { 2067 struct bnx2x *bp = netdev_priv(netdev); 2068 int rc = 0; 2069 2070 DP(BNX2X_MSG_DCB, "SET-ALL\n"); 2071 2072 if (!bnx2x_dcbnl_set_valid(bp)) 2073 return 1; 2074 2075 if (bp->recovery_state != BNX2X_RECOVERY_DONE) { 2076 netdev_err(bp->dev, 2077 "Handling parity error recovery. Try again later\n"); 2078 return 1; 2079 } 2080 if (netif_running(bp->dev)) 2081 bnx2x_dcbx_init(bp, true); 2082 DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc); 2083 if (rc) 2084 return 1; 2085 2086 return 0; 2087 } 2088 2089 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap) 2090 { 2091 struct bnx2x *bp = netdev_priv(netdev); 2092 u8 rval = 0; 2093 2094 if (bp->dcb_state) { 2095 switch (capid) { 2096 case DCB_CAP_ATTR_PG: 2097 *cap = true; 2098 break; 2099 case DCB_CAP_ATTR_PFC: 2100 *cap = true; 2101 break; 2102 case DCB_CAP_ATTR_UP2TC: 2103 *cap = false; 2104 break; 2105 case DCB_CAP_ATTR_PG_TCS: 2106 *cap = 0x80; /* 8 priorities for PGs */ 2107 break; 2108 case DCB_CAP_ATTR_PFC_TCS: 2109 *cap = 0x80; /* 8 priorities for PFC */ 2110 break; 2111 case DCB_CAP_ATTR_GSP: 2112 *cap = true; 2113 break; 2114 case DCB_CAP_ATTR_BCN: 2115 *cap = false; 2116 break; 2117 case DCB_CAP_ATTR_DCBX: 2118 *cap = BNX2X_DCBX_CAPS; 2119 break; 2120 default: 2121 BNX2X_ERR("Non valid capability ID\n"); 2122 rval = -EINVAL; 2123 break; 2124 } 2125 } else { 2126 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2127 rval = -EINVAL; 2128 } 2129 2130 DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap); 2131 return rval; 2132 } 2133 2134 static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num) 2135 { 2136 struct bnx2x *bp = netdev_priv(netdev); 2137 u8 rval = 0; 2138 2139 DP(BNX2X_MSG_DCB, "tcid %d\n", tcid); 2140 2141 if (bp->dcb_state) { 2142 switch (tcid) { 2143 case DCB_NUMTCS_ATTR_PG: 2144 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2145 DCBX_COS_MAX_NUM_E2; 2146 break; 2147 case DCB_NUMTCS_ATTR_PFC: 2148 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2149 DCBX_COS_MAX_NUM_E2; 2150 break; 2151 default: 2152 BNX2X_ERR("Non valid TC-ID\n"); 2153 rval = -EINVAL; 2154 break; 2155 } 2156 } else { 2157 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2158 rval = -EINVAL; 2159 } 2160 2161 return rval; 2162 } 2163 2164 static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) 2165 { 2166 struct bnx2x *bp = netdev_priv(netdev); 2167 DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num); 2168 return -EINVAL; 2169 } 2170 2171 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) 2172 { 2173 struct bnx2x *bp = netdev_priv(netdev); 2174 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled); 2175 2176 if (!bp->dcb_state) 2177 return 0; 2178 2179 return bp->dcbx_local_feat.pfc.enabled; 2180 } 2181 2182 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state) 2183 { 2184 struct bnx2x *bp = netdev_priv(netdev); 2185 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 2186 2187 if (!bnx2x_dcbnl_set_valid(bp)) 2188 return; 2189 2190 bp->dcbx_config_params.admin_pfc_tx_enable = 2191 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0); 2192 } 2193 2194 static void bnx2x_admin_app_set_ent( 2195 struct bnx2x_admin_priority_app_table *app_ent, 2196 u8 idtype, u16 idval, u8 up) 2197 { 2198 app_ent->valid = 1; 2199 2200 switch (idtype) { 2201 case DCB_APP_IDTYPE_ETHTYPE: 2202 app_ent->traffic_type = TRAFFIC_TYPE_ETH; 2203 break; 2204 case DCB_APP_IDTYPE_PORTNUM: 2205 app_ent->traffic_type = TRAFFIC_TYPE_PORT; 2206 break; 2207 default: 2208 break; /* never gets here */ 2209 } 2210 app_ent->app_id = idval; 2211 app_ent->priority = up; 2212 } 2213 2214 static bool bnx2x_admin_app_is_equal( 2215 struct bnx2x_admin_priority_app_table *app_ent, 2216 u8 idtype, u16 idval) 2217 { 2218 if (!app_ent->valid) 2219 return false; 2220 2221 switch (idtype) { 2222 case DCB_APP_IDTYPE_ETHTYPE: 2223 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH) 2224 return false; 2225 break; 2226 case DCB_APP_IDTYPE_PORTNUM: 2227 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT) 2228 return false; 2229 break; 2230 default: 2231 return false; 2232 } 2233 if (app_ent->app_id != idval) 2234 return false; 2235 2236 return true; 2237 } 2238 2239 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up) 2240 { 2241 int i, ff; 2242 2243 /* iterate over the app entries looking for idtype and idval */ 2244 for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 2245 struct bnx2x_admin_priority_app_table *app_ent = 2246 &bp->dcbx_config_params.admin_priority_app_table[i]; 2247 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval)) 2248 break; 2249 2250 if (ff < 0 && !app_ent->valid) 2251 ff = i; 2252 } 2253 if (i < DCBX_CONFIG_MAX_APP_PROTOCOL) 2254 /* if found overwrite up */ 2255 bp->dcbx_config_params. 2256 admin_priority_app_table[i].priority = up; 2257 else if (ff >= 0) 2258 /* not found use first-free */ 2259 bnx2x_admin_app_set_ent( 2260 &bp->dcbx_config_params.admin_priority_app_table[ff], 2261 idtype, idval, up); 2262 else { 2263 /* app table is full */ 2264 BNX2X_ERR("Application table is too large\n"); 2265 return -EBUSY; 2266 } 2267 2268 /* up configured, if not 0 make sure feature is enabled */ 2269 if (up) 2270 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 2271 2272 return 0; 2273 } 2274 2275 static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype, 2276 u16 idval, u8 up) 2277 { 2278 struct bnx2x *bp = netdev_priv(netdev); 2279 2280 DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n", 2281 idtype, idval, up); 2282 2283 if (!bnx2x_dcbnl_set_valid(bp)) { 2284 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2285 return -EINVAL; 2286 } 2287 2288 /* verify idtype */ 2289 switch (idtype) { 2290 case DCB_APP_IDTYPE_ETHTYPE: 2291 case DCB_APP_IDTYPE_PORTNUM: 2292 break; 2293 default: 2294 DP(BNX2X_MSG_DCB, "Wrong ID type\n"); 2295 return -EINVAL; 2296 } 2297 return bnx2x_set_admin_app_up(bp, idtype, idval, up); 2298 } 2299 2300 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev) 2301 { 2302 struct bnx2x *bp = netdev_priv(netdev); 2303 u8 state; 2304 2305 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE; 2306 2307 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF) 2308 state |= DCB_CAP_DCBX_STATIC; 2309 2310 return state; 2311 } 2312 2313 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state) 2314 { 2315 struct bnx2x *bp = netdev_priv(netdev); 2316 DP(BNX2X_MSG_DCB, "state = %02x\n", state); 2317 2318 /* set dcbx mode */ 2319 2320 if ((state & BNX2X_DCBX_CAPS) != state) { 2321 BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n", 2322 state); 2323 return 1; 2324 } 2325 2326 if (bp->dcb_state != BNX2X_DCB_STATE_ON) { 2327 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n"); 2328 return 1; 2329 } 2330 2331 if (state & DCB_CAP_DCBX_STATIC) 2332 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF; 2333 else 2334 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON; 2335 2336 bp->dcbx_mode_uset = true; 2337 return 0; 2338 } 2339 2340 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, 2341 u8 *flags) 2342 { 2343 struct bnx2x *bp = netdev_priv(netdev); 2344 u8 rval = 0; 2345 2346 DP(BNX2X_MSG_DCB, "featid %d\n", featid); 2347 2348 if (bp->dcb_state) { 2349 *flags = 0; 2350 switch (featid) { 2351 case DCB_FEATCFG_ATTR_PG: 2352 if (bp->dcbx_local_feat.ets.enabled) 2353 *flags |= DCB_FEATCFG_ENABLE; 2354 if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR) 2355 *flags |= DCB_FEATCFG_ERROR; 2356 break; 2357 case DCB_FEATCFG_ATTR_PFC: 2358 if (bp->dcbx_local_feat.pfc.enabled) 2359 *flags |= DCB_FEATCFG_ENABLE; 2360 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR | 2361 DCBX_LOCAL_PFC_MISMATCH)) 2362 *flags |= DCB_FEATCFG_ERROR; 2363 break; 2364 case DCB_FEATCFG_ATTR_APP: 2365 if (bp->dcbx_local_feat.app.enabled) 2366 *flags |= DCB_FEATCFG_ENABLE; 2367 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR | 2368 DCBX_LOCAL_APP_MISMATCH)) 2369 *flags |= DCB_FEATCFG_ERROR; 2370 break; 2371 default: 2372 BNX2X_ERR("Non valid featrue-ID\n"); 2373 rval = -EINVAL; 2374 break; 2375 } 2376 } else { 2377 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2378 rval = -EINVAL; 2379 } 2380 2381 return rval; 2382 } 2383 2384 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, 2385 u8 flags) 2386 { 2387 struct bnx2x *bp = netdev_priv(netdev); 2388 u8 rval = 0; 2389 2390 DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags); 2391 2392 /* ignore the 'advertise' flag */ 2393 if (bnx2x_dcbnl_set_valid(bp)) { 2394 switch (featid) { 2395 case DCB_FEATCFG_ATTR_PG: 2396 bp->dcbx_config_params.admin_ets_enable = 2397 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2398 bp->dcbx_config_params.admin_ets_willing = 2399 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2400 break; 2401 case DCB_FEATCFG_ATTR_PFC: 2402 bp->dcbx_config_params.admin_pfc_enable = 2403 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2404 bp->dcbx_config_params.admin_pfc_willing = 2405 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2406 break; 2407 case DCB_FEATCFG_ATTR_APP: 2408 /* ignore enable, always enabled */ 2409 bp->dcbx_config_params.admin_app_priority_willing = 2410 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2411 break; 2412 default: 2413 BNX2X_ERR("Non valid featrue-ID\n"); 2414 rval = -EINVAL; 2415 break; 2416 } 2417 } else { 2418 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2419 rval = -EINVAL; 2420 } 2421 2422 return rval; 2423 } 2424 2425 static int bnx2x_peer_appinfo(struct net_device *netdev, 2426 struct dcb_peer_app_info *info, u16* app_count) 2427 { 2428 int i; 2429 struct bnx2x *bp = netdev_priv(netdev); 2430 2431 DP(BNX2X_MSG_DCB, "APP-INFO\n"); 2432 2433 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0; 2434 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0; 2435 *app_count = 0; 2436 2437 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) 2438 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield & 2439 DCBX_APP_ENTRY_VALID) 2440 (*app_count)++; 2441 return 0; 2442 } 2443 2444 static int bnx2x_peer_apptable(struct net_device *netdev, 2445 struct dcb_app *table) 2446 { 2447 int i, j; 2448 struct bnx2x *bp = netdev_priv(netdev); 2449 2450 DP(BNX2X_MSG_DCB, "APP-TABLE\n"); 2451 2452 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 2453 struct dcbx_app_priority_entry *ent = 2454 &bp->dcbx_remote_feat.app.app_pri_tbl[i]; 2455 2456 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 2457 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 2458 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent); 2459 table[j++].protocol = ent->app_id; 2460 } 2461 } 2462 return 0; 2463 } 2464 2465 static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg) 2466 { 2467 int i; 2468 struct bnx2x *bp = netdev_priv(netdev); 2469 2470 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0; 2471 2472 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) { 2473 pg->pg_bw[i] = 2474 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i); 2475 pg->prio_pg[i] = 2476 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i); 2477 } 2478 return 0; 2479 } 2480 2481 static int bnx2x_cee_peer_getpfc(struct net_device *netdev, 2482 struct cee_pfc *pfc) 2483 { 2484 struct bnx2x *bp = netdev_priv(netdev); 2485 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps; 2486 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap; 2487 return 0; 2488 } 2489 2490 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = { 2491 .getstate = bnx2x_dcbnl_get_state, 2492 .setstate = bnx2x_dcbnl_set_state, 2493 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr, 2494 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx, 2495 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx, 2496 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx, 2497 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx, 2498 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx, 2499 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx, 2500 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx, 2501 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx, 2502 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg, 2503 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg, 2504 .setall = bnx2x_dcbnl_set_all, 2505 .getcap = bnx2x_dcbnl_get_cap, 2506 .getnumtcs = bnx2x_dcbnl_get_numtcs, 2507 .setnumtcs = bnx2x_dcbnl_set_numtcs, 2508 .getpfcstate = bnx2x_dcbnl_get_pfc_state, 2509 .setpfcstate = bnx2x_dcbnl_set_pfc_state, 2510 .setapp = bnx2x_dcbnl_set_app_up, 2511 .getdcbx = bnx2x_dcbnl_get_dcbx, 2512 .setdcbx = bnx2x_dcbnl_set_dcbx, 2513 .getfeatcfg = bnx2x_dcbnl_get_featcfg, 2514 .setfeatcfg = bnx2x_dcbnl_set_featcfg, 2515 .peer_getappinfo = bnx2x_peer_appinfo, 2516 .peer_getapptable = bnx2x_peer_apptable, 2517 .cee_peer_getpg = bnx2x_cee_peer_getpg, 2518 .cee_peer_getpfc = bnx2x_cee_peer_getpfc, 2519 }; 2520 2521 #endif /* BCM_DCBNL */ 2522