1 /* bnx2x_dcb.c: Broadcom Everest network driver. 2 * 3 * Copyright 2009-2013 Broadcom Corporation 4 * 5 * Unless you and Broadcom execute a separate written software license 6 * agreement governing use of this software, this software is licensed to you 7 * under the terms of the GNU General Public License version 2, available 8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). 9 * 10 * Notwithstanding the above, under no circumstances may you combine this 11 * software in any way with any other Broadcom software provided under a 12 * license other than the GPL, without Broadcom's express prior written 13 * consent. 14 * 15 * Maintained by: Eilon Greenstein <eilong@broadcom.com> 16 * Written by: Dmitry Kravkov 17 * 18 */ 19 20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 21 22 #include <linux/netdevice.h> 23 #include <linux/types.h> 24 #include <linux/errno.h> 25 #include <linux/rtnetlink.h> 26 #include <net/dcbnl.h> 27 28 #include "bnx2x.h" 29 #include "bnx2x_cmn.h" 30 #include "bnx2x_dcb.h" 31 32 /* forward declarations of dcbx related functions */ 33 static void bnx2x_pfc_set_pfc(struct bnx2x *bp); 34 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp); 35 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 36 u32 *set_configuration_ets_pg, 37 u32 *pri_pg_tbl); 38 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 39 u32 *pg_pri_orginal_spread, 40 struct pg_help_data *help_data); 41 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 42 struct pg_help_data *help_data, 43 struct dcbx_ets_feature *ets, 44 u32 *pg_pri_orginal_spread); 45 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 46 struct cos_help_data *cos_data, 47 u32 *pg_pri_orginal_spread, 48 struct dcbx_ets_feature *ets); 49 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 50 struct bnx2x_func_tx_start_params*); 51 52 /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */ 53 static void bnx2x_read_data(struct bnx2x *bp, u32 *buff, 54 u32 addr, u32 len) 55 { 56 int i; 57 for (i = 0; i < len; i += 4, buff++) 58 *buff = REG_RD(bp, addr + i); 59 } 60 61 static void bnx2x_write_data(struct bnx2x *bp, u32 *buff, 62 u32 addr, u32 len) 63 { 64 int i; 65 for (i = 0; i < len; i += 4, buff++) 66 REG_WR(bp, addr + i, *buff); 67 } 68 69 static void bnx2x_pfc_set(struct bnx2x *bp) 70 { 71 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0}; 72 u32 pri_bit, val = 0; 73 int i; 74 75 pfc_params.num_of_rx_cos_priority_mask = 76 bp->dcbx_port_params.ets.num_of_cos; 77 78 /* Tx COS configuration */ 79 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++) 80 /* 81 * We configure only the pauseable bits (non pauseable aren't 82 * configured at all) it's done to avoid false pauses from 83 * network 84 */ 85 pfc_params.rx_cos_priority_mask[i] = 86 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask 87 & DCBX_PFC_PRI_PAUSE_MASK(bp); 88 89 /* 90 * Rx COS configuration 91 * Changing PFC RX configuration . 92 * In RX COS0 will always be configured to lossless and COS1 to lossy 93 */ 94 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) { 95 pri_bit = 1 << i; 96 97 if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))) 98 val |= 1 << (i * 4); 99 } 100 101 pfc_params.pkt_priority_to_cos = val; 102 103 /* RX COS0 */ 104 pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp); 105 /* RX COS1 */ 106 pfc_params.llfc_high_priority_classes = 0; 107 108 bnx2x_acquire_phy_lock(bp); 109 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED; 110 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params); 111 bnx2x_release_phy_lock(bp); 112 } 113 114 static void bnx2x_pfc_clear(struct bnx2x *bp) 115 { 116 struct bnx2x_nig_brb_pfc_port_params nig_params = {0}; 117 nig_params.pause_enable = 1; 118 bnx2x_acquire_phy_lock(bp); 119 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED; 120 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params); 121 bnx2x_release_phy_lock(bp); 122 } 123 124 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp, 125 struct dcbx_features *features, 126 u32 error) 127 { 128 u8 i = 0; 129 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error); 130 131 /* PG */ 132 DP(NETIF_MSG_LINK, 133 "local_mib.features.ets.enabled %x\n", features->ets.enabled); 134 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) 135 DP(NETIF_MSG_LINK, 136 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i, 137 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i)); 138 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) 139 DP(NETIF_MSG_LINK, 140 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i, 141 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i)); 142 143 /* pfc */ 144 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n", 145 features->pfc.pri_en_bitmap); 146 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n", 147 features->pfc.pfc_caps); 148 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n", 149 features->pfc.enabled); 150 151 DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n", 152 features->app.default_pri); 153 DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n", 154 features->app.tc_supported); 155 DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n", 156 features->app.enabled); 157 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 158 DP(BNX2X_MSG_DCB, 159 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n", 160 i, features->app.app_pri_tbl[i].app_id); 161 DP(BNX2X_MSG_DCB, 162 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n", 163 i, features->app.app_pri_tbl[i].pri_bitmap); 164 DP(BNX2X_MSG_DCB, 165 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n", 166 i, features->app.app_pri_tbl[i].appBitfield); 167 } 168 } 169 170 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp, 171 u8 pri_bitmap, 172 u8 llfc_traf_type) 173 { 174 u32 pri = MAX_PFC_PRIORITIES; 175 u32 index = MAX_PFC_PRIORITIES - 1; 176 u32 pri_mask; 177 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 178 179 /* Choose the highest priority */ 180 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) { 181 pri_mask = 1 << index; 182 if (GET_FLAGS(pri_bitmap, pri_mask)) 183 pri = index ; 184 index--; 185 } 186 187 if (pri < MAX_PFC_PRIORITIES) 188 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri); 189 } 190 191 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp, 192 struct dcbx_app_priority_feature *app, 193 u32 error) { 194 u8 index; 195 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 196 197 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) 198 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n"); 199 200 if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH)) 201 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n"); 202 203 if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND)) 204 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n"); 205 if (app->enabled && 206 !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH | 207 DCBX_REMOTE_APP_TLV_NOT_FOUND)) { 208 209 bp->dcbx_port_params.app.enabled = true; 210 211 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 212 ttp[index] = 0; 213 214 if (app->default_pri < MAX_PFC_PRIORITIES) 215 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri; 216 217 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) { 218 struct dcbx_app_priority_entry *entry = 219 app->app_pri_tbl; 220 221 if (GET_FLAGS(entry[index].appBitfield, 222 DCBX_APP_SF_ETH_TYPE) && 223 ETH_TYPE_FCOE == entry[index].app_id) 224 bnx2x_dcbx_get_ap_priority(bp, 225 entry[index].pri_bitmap, 226 LLFC_TRAFFIC_TYPE_FCOE); 227 228 if (GET_FLAGS(entry[index].appBitfield, 229 DCBX_APP_SF_PORT) && 230 TCP_PORT_ISCSI == entry[index].app_id) 231 bnx2x_dcbx_get_ap_priority(bp, 232 entry[index].pri_bitmap, 233 LLFC_TRAFFIC_TYPE_ISCSI); 234 } 235 } else { 236 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n"); 237 bp->dcbx_port_params.app.enabled = false; 238 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 239 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY; 240 } 241 } 242 243 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, 244 struct dcbx_ets_feature *ets, 245 u32 error) { 246 int i = 0; 247 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0}; 248 struct pg_help_data pg_help_data; 249 struct bnx2x_dcbx_cos_params *cos_params = 250 bp->dcbx_port_params.ets.cos_params; 251 252 memset(&pg_help_data, 0, sizeof(struct pg_help_data)); 253 254 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR)) 255 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n"); 256 257 if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND)) 258 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n"); 259 260 /* Clean up old settings of ets on COS */ 261 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) { 262 cos_params[i].pauseable = false; 263 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID; 264 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW; 265 cos_params[i].pri_bitmask = 0; 266 } 267 268 if (bp->dcbx_port_params.app.enabled && ets->enabled && 269 !GET_FLAGS(error, 270 DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) { 271 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n"); 272 bp->dcbx_port_params.ets.enabled = true; 273 274 bnx2x_dcbx_get_ets_pri_pg_tbl(bp, 275 pg_pri_orginal_spread, 276 ets->pri_pg_tbl); 277 278 bnx2x_dcbx_get_num_pg_traf_type(bp, 279 pg_pri_orginal_spread, 280 &pg_help_data); 281 282 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data, 283 ets, pg_pri_orginal_spread); 284 285 } else { 286 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n"); 287 bp->dcbx_port_params.ets.enabled = false; 288 ets->pri_pg_tbl[0] = 0; 289 290 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++) 291 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1); 292 } 293 } 294 295 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp, 296 struct dcbx_pfc_feature *pfc, u32 error) 297 { 298 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR)) 299 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n"); 300 301 if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND)) 302 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n"); 303 if (bp->dcbx_port_params.app.enabled && pfc->enabled && 304 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH | 305 DCBX_REMOTE_PFC_TLV_NOT_FOUND)) { 306 bp->dcbx_port_params.pfc.enabled = true; 307 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 308 ~(pfc->pri_en_bitmap); 309 } else { 310 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n"); 311 bp->dcbx_port_params.pfc.enabled = false; 312 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0; 313 } 314 } 315 316 /* maps unmapped priorities to to the same COS as L2 */ 317 static void bnx2x_dcbx_map_nw(struct bnx2x *bp) 318 { 319 int i; 320 u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */ 321 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 322 u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW]; 323 struct bnx2x_dcbx_cos_params *cos_params = 324 bp->dcbx_port_params.ets.cos_params; 325 326 /* get unmapped priorities by clearing mapped bits */ 327 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 328 unmapped &= ~(1 << ttp[i]); 329 330 /* find cos for nw prio and extend it with unmapped */ 331 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) { 332 if (cos_params[i].pri_bitmask & nw_prio) { 333 /* extend the bitmask with unmapped */ 334 DP(BNX2X_MSG_DCB, 335 "cos %d extended with 0x%08x\n", i, unmapped); 336 cos_params[i].pri_bitmask |= unmapped; 337 break; 338 } 339 } 340 } 341 342 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp, 343 struct dcbx_features *features, 344 u32 error) 345 { 346 bnx2x_dcbx_get_ap_feature(bp, &features->app, error); 347 348 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error); 349 350 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error); 351 352 bnx2x_dcbx_map_nw(bp); 353 } 354 355 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100) 356 static int bnx2x_dcbx_read_mib(struct bnx2x *bp, 357 u32 *base_mib_addr, 358 u32 offset, 359 int read_mib_type) 360 { 361 int max_try_read = 0; 362 u32 mib_size, prefix_seq_num, suffix_seq_num; 363 struct lldp_remote_mib *remote_mib ; 364 struct lldp_local_mib *local_mib; 365 366 switch (read_mib_type) { 367 case DCBX_READ_LOCAL_MIB: 368 mib_size = sizeof(struct lldp_local_mib); 369 break; 370 case DCBX_READ_REMOTE_MIB: 371 mib_size = sizeof(struct lldp_remote_mib); 372 break; 373 default: 374 return 1; /*error*/ 375 } 376 377 offset += BP_PORT(bp) * mib_size; 378 379 do { 380 bnx2x_read_data(bp, base_mib_addr, offset, mib_size); 381 382 max_try_read++; 383 384 switch (read_mib_type) { 385 case DCBX_READ_LOCAL_MIB: 386 local_mib = (struct lldp_local_mib *) base_mib_addr; 387 prefix_seq_num = local_mib->prefix_seq_num; 388 suffix_seq_num = local_mib->suffix_seq_num; 389 break; 390 case DCBX_READ_REMOTE_MIB: 391 remote_mib = (struct lldp_remote_mib *) base_mib_addr; 392 prefix_seq_num = remote_mib->prefix_seq_num; 393 suffix_seq_num = remote_mib->suffix_seq_num; 394 break; 395 default: 396 return 1; /*error*/ 397 } 398 } while ((prefix_seq_num != suffix_seq_num) && 399 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ)); 400 401 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) { 402 BNX2X_ERR("MIB could not be read\n"); 403 return 1; 404 } 405 406 return 0; 407 } 408 409 static void bnx2x_pfc_set_pfc(struct bnx2x *bp) 410 { 411 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 412 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 413 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 414 415 if (bp->dcbx_port_params.pfc.enabled && 416 (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured)) 417 /* 418 * 1. Fills up common PFC structures if required 419 * 2. Configure NIG, MAC and BRB via the elink 420 */ 421 bnx2x_pfc_set(bp); 422 else 423 bnx2x_pfc_clear(bp); 424 } 425 426 int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp) 427 { 428 struct bnx2x_func_state_params func_params = {NULL}; 429 int rc; 430 431 func_params.f_obj = &bp->func_obj; 432 func_params.cmd = BNX2X_F_CMD_TX_STOP; 433 434 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 435 __set_bit(RAMROD_RETRY, &func_params.ramrod_flags); 436 437 DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n"); 438 439 rc = bnx2x_func_state_change(bp, &func_params); 440 if (rc) { 441 BNX2X_ERR("Unable to hold traffic for HW configuration\n"); 442 bnx2x_panic(); 443 } 444 445 return rc; 446 } 447 448 int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp) 449 { 450 struct bnx2x_func_state_params func_params = {NULL}; 451 struct bnx2x_func_tx_start_params *tx_params = 452 &func_params.params.tx_start; 453 int rc; 454 455 func_params.f_obj = &bp->func_obj; 456 func_params.cmd = BNX2X_F_CMD_TX_START; 457 458 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 459 __set_bit(RAMROD_RETRY, &func_params.ramrod_flags); 460 461 bnx2x_dcbx_fw_struct(bp, tx_params); 462 463 DP(BNX2X_MSG_DCB, "START TRAFFIC\n"); 464 465 rc = bnx2x_func_state_change(bp, &func_params); 466 if (rc) { 467 BNX2X_ERR("Unable to resume traffic after HW configuration\n"); 468 bnx2x_panic(); 469 } 470 471 return rc; 472 } 473 474 static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp) 475 { 476 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 477 int rc = 0; 478 479 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) { 480 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos); 481 return; 482 } 483 484 /* valid COS entries */ 485 if (ets->num_of_cos == 1) /* no ETS */ 486 return; 487 488 /* sanity */ 489 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) && 490 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) || 491 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) && 492 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) { 493 BNX2X_ERR("all COS should have at least bw_limit or strict" 494 "ets->cos_params[0].strict= %x" 495 "ets->cos_params[0].bw_tbl= %x" 496 "ets->cos_params[1].strict= %x" 497 "ets->cos_params[1].bw_tbl= %x", 498 ets->cos_params[0].strict, 499 ets->cos_params[0].bw_tbl, 500 ets->cos_params[1].strict, 501 ets->cos_params[1].bw_tbl); 502 return; 503 } 504 /* If we join a group and there is bw_tbl and strict then bw rules */ 505 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) && 506 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) { 507 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl; 508 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl; 509 /* Do not allow 0-100 configuration 510 * since PBF does not support it 511 * force 1-99 instead 512 */ 513 if (bw_tbl_0 == 0) { 514 bw_tbl_0 = 1; 515 bw_tbl_1 = 99; 516 } else if (bw_tbl_1 == 0) { 517 bw_tbl_1 = 1; 518 bw_tbl_0 = 99; 519 } 520 521 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1); 522 } else { 523 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST) 524 rc = bnx2x_ets_strict(&bp->link_params, 0); 525 else if (ets->cos_params[1].strict 526 == BNX2X_DCBX_STRICT_COS_HIGHEST) 527 rc = bnx2x_ets_strict(&bp->link_params, 1); 528 if (rc) 529 BNX2X_ERR("update_ets_params failed\n"); 530 } 531 } 532 533 /* 534 * In E3B0 the configuration may have more than 2 COS. 535 */ 536 static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp) 537 { 538 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 539 struct bnx2x_ets_params ets_params = { 0 }; 540 u8 i; 541 542 ets_params.num_of_cos = ets->num_of_cos; 543 544 for (i = 0; i < ets->num_of_cos; i++) { 545 /* COS is SP */ 546 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) { 547 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) { 548 BNX2X_ERR("COS can't be not BW and not SP\n"); 549 return; 550 } 551 552 ets_params.cos[i].state = bnx2x_cos_state_strict; 553 ets_params.cos[i].params.sp_params.pri = 554 ets->cos_params[i].strict; 555 } else { /* COS is BW */ 556 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) { 557 BNX2X_ERR("COS can't be not BW and not SP\n"); 558 return; 559 } 560 ets_params.cos[i].state = bnx2x_cos_state_bw; 561 ets_params.cos[i].params.bw_params.bw = 562 (u8)ets->cos_params[i].bw_tbl; 563 } 564 } 565 566 /* Configure the ETS in HW */ 567 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars, 568 &ets_params)) { 569 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n"); 570 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 571 } 572 } 573 574 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) 575 { 576 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 577 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 578 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 579 580 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 581 582 if (!bp->dcbx_port_params.ets.enabled || 583 ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)) 584 return; 585 586 if (CHIP_IS_E3B0(bp)) 587 bnx2x_dcbx_update_ets_config(bp); 588 else 589 bnx2x_dcbx_2cos_limit_update_ets_config(bp); 590 } 591 592 #ifdef BCM_DCBNL 593 static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp) 594 { 595 struct lldp_remote_mib remote_mib = {0}; 596 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset); 597 int rc; 598 599 DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n", 600 dcbx_remote_mib_offset); 601 602 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) { 603 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n"); 604 return -EINVAL; 605 } 606 607 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset, 608 DCBX_READ_REMOTE_MIB); 609 610 if (rc) { 611 BNX2X_ERR("Failed to read remote mib from FW\n"); 612 return rc; 613 } 614 615 /* save features and flags */ 616 bp->dcbx_remote_feat = remote_mib.features; 617 bp->dcbx_remote_flags = remote_mib.flags; 618 return 0; 619 } 620 #endif 621 622 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp) 623 { 624 struct lldp_local_mib local_mib = {0}; 625 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset); 626 int rc; 627 628 DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset); 629 630 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) { 631 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n"); 632 return -EINVAL; 633 } 634 635 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset, 636 DCBX_READ_LOCAL_MIB); 637 638 if (rc) { 639 BNX2X_ERR("Failed to read local mib from FW\n"); 640 return rc; 641 } 642 643 /* save features and error */ 644 bp->dcbx_local_feat = local_mib.features; 645 bp->dcbx_error = local_mib.error; 646 return 0; 647 } 648 649 #ifdef BCM_DCBNL 650 static inline 651 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent) 652 { 653 u8 pri; 654 655 /* Choose the highest priority */ 656 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--) 657 if (ent->pri_bitmap & (1 << pri)) 658 break; 659 return pri; 660 } 661 662 static inline 663 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent) 664 { 665 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) == 666 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM : 667 DCB_APP_IDTYPE_ETHTYPE; 668 } 669 670 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall) 671 { 672 int i, err = 0; 673 674 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) { 675 struct dcbx_app_priority_entry *ent = 676 &bp->dcbx_local_feat.app.app_pri_tbl[i]; 677 678 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 679 u8 up = bnx2x_dcbx_dcbnl_app_up(ent); 680 681 /* avoid invalid user-priority */ 682 if (up) { 683 struct dcb_app app; 684 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 685 app.protocol = ent->app_id; 686 app.priority = delall ? 0 : up; 687 err = dcb_setapp(bp->dev, &app); 688 } 689 } 690 } 691 return err; 692 } 693 #endif 694 695 static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp) 696 { 697 u8 prio, cos; 698 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) { 699 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) { 700 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask 701 & (1 << prio)) { 702 bp->prio_to_cos[prio] = cos; 703 DP(BNX2X_MSG_DCB, 704 "tx_mapping %d --> %d\n", prio, cos); 705 } 706 } 707 } 708 709 /* setup tc must be called under rtnl lock, but we can't take it here 710 * as we are handling an attention on a work queue which must be 711 * flushed at some rtnl-locked contexts (e.g. if down) 712 */ 713 if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state)) 714 schedule_delayed_work(&bp->sp_rtnl_task, 0); 715 } 716 717 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) 718 { 719 switch (state) { 720 case BNX2X_DCBX_STATE_NEG_RECEIVED: 721 { 722 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n"); 723 #ifdef BCM_DCBNL 724 /** 725 * Delete app tlvs from dcbnl before reading new 726 * negotiation results 727 */ 728 bnx2x_dcbnl_update_applist(bp, true); 729 730 /* Read remote mib if dcbx is in the FW */ 731 if (bnx2x_dcbx_read_shmem_remote_mib(bp)) 732 return; 733 #endif 734 /* Read neg results if dcbx is in the FW */ 735 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 736 return; 737 738 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 739 bp->dcbx_error); 740 741 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 742 bp->dcbx_error); 743 744 /* mark DCBX result for PMF migration */ 745 bnx2x_update_drv_flags(bp, 746 1 << DRV_FLAGS_DCB_CONFIGURED, 747 1); 748 #ifdef BCM_DCBNL 749 /* 750 * Add new app tlvs to dcbnl 751 */ 752 bnx2x_dcbnl_update_applist(bp, false); 753 #endif 754 /* 755 * reconfigure the netdevice with the results of the new 756 * dcbx negotiation. 757 */ 758 bnx2x_dcbx_update_tc_mapping(bp); 759 760 /* 761 * allow other functions to update their netdevices 762 * accordingly 763 */ 764 if (IS_MF(bp)) 765 bnx2x_link_sync_notify(bp); 766 767 set_bit(BNX2X_SP_RTNL_TX_STOP, &bp->sp_rtnl_state); 768 769 schedule_delayed_work(&bp->sp_rtnl_task, 0); 770 771 return; 772 } 773 case BNX2X_DCBX_STATE_TX_PAUSED: 774 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n"); 775 bnx2x_pfc_set_pfc(bp); 776 777 bnx2x_dcbx_update_ets_params(bp); 778 779 /* ets may affect cmng configuration: reinit it in hw */ 780 bnx2x_set_local_cmng(bp); 781 return; 782 case BNX2X_DCBX_STATE_TX_RELEASED: 783 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n"); 784 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0); 785 #ifdef BCM_DCBNL 786 /* 787 * Send a notification for the new negotiated parameters 788 */ 789 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 790 #endif 791 return; 792 default: 793 BNX2X_ERR("Unknown DCBX_STATE\n"); 794 } 795 } 796 797 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \ 798 BP_PORT(bp)*sizeof(struct lldp_admin_mib)) 799 800 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, 801 u32 dcbx_lldp_params_offset) 802 { 803 struct lldp_admin_mib admin_mib; 804 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0; 805 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp); 806 807 /*shortcuts*/ 808 struct dcbx_features *af = &admin_mib.features; 809 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params; 810 811 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib)); 812 813 /* Read the data first */ 814 bnx2x_read_data(bp, (u32 *)&admin_mib, offset, 815 sizeof(struct lldp_admin_mib)); 816 817 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON) 818 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 819 else 820 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 821 822 if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) { 823 824 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK); 825 admin_mib.ver_cfg_flags |= 826 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) & 827 DCBX_CEE_VERSION_MASK; 828 829 af->ets.enabled = (u8)dp->admin_ets_enable; 830 831 af->pfc.enabled = (u8)dp->admin_pfc_enable; 832 833 /* FOR IEEE dp->admin_tc_supported_tx_enable */ 834 if (dp->admin_ets_configuration_tx_enable) 835 SET_FLAGS(admin_mib.ver_cfg_flags, 836 DCBX_ETS_CONFIG_TX_ENABLED); 837 else 838 RESET_FLAGS(admin_mib.ver_cfg_flags, 839 DCBX_ETS_CONFIG_TX_ENABLED); 840 /* For IEEE admin_ets_recommendation_tx_enable */ 841 if (dp->admin_pfc_tx_enable) 842 SET_FLAGS(admin_mib.ver_cfg_flags, 843 DCBX_PFC_CONFIG_TX_ENABLED); 844 else 845 RESET_FLAGS(admin_mib.ver_cfg_flags, 846 DCBX_PFC_CONFIG_TX_ENABLED); 847 848 if (dp->admin_application_priority_tx_enable) 849 SET_FLAGS(admin_mib.ver_cfg_flags, 850 DCBX_APP_CONFIG_TX_ENABLED); 851 else 852 RESET_FLAGS(admin_mib.ver_cfg_flags, 853 DCBX_APP_CONFIG_TX_ENABLED); 854 855 if (dp->admin_ets_willing) 856 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 857 else 858 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 859 /* For IEEE admin_ets_reco_valid */ 860 if (dp->admin_pfc_willing) 861 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 862 else 863 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 864 865 if (dp->admin_app_priority_willing) 866 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 867 else 868 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 869 870 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) { 871 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i, 872 (u8)dp->admin_configuration_bw_precentage[i]); 873 874 DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n", 875 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i)); 876 } 877 878 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 879 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i, 880 (u8)dp->admin_configuration_ets_pg[i]); 881 882 DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n", 883 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i)); 884 } 885 886 /*For IEEE admin_recommendation_bw_percentage 887 *For IEEE admin_recommendation_ets_pg */ 888 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap; 889 for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 890 if (dp->admin_priority_app_table[i].valid) { 891 struct bnx2x_admin_priority_app_table *table = 892 dp->admin_priority_app_table; 893 if ((ETH_TYPE_FCOE == table[i].app_id) && 894 (TRAFFIC_TYPE_ETH == table[i].traffic_type)) 895 traf_type = FCOE_APP_IDX; 896 else if ((TCP_PORT_ISCSI == table[i].app_id) && 897 (TRAFFIC_TYPE_PORT == table[i].traffic_type)) 898 traf_type = ISCSI_APP_IDX; 899 else 900 traf_type = other_traf_type++; 901 902 af->app.app_pri_tbl[traf_type].app_id = 903 table[i].app_id; 904 905 af->app.app_pri_tbl[traf_type].pri_bitmap = 906 (u8)(1 << table[i].priority); 907 908 af->app.app_pri_tbl[traf_type].appBitfield = 909 (DCBX_APP_ENTRY_VALID); 910 911 af->app.app_pri_tbl[traf_type].appBitfield |= 912 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ? 913 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT; 914 } 915 } 916 917 af->app.default_pri = (u8)dp->admin_default_priority; 918 } 919 920 /* Write the data. */ 921 bnx2x_write_data(bp, (u32 *)&admin_mib, offset, 922 sizeof(struct lldp_admin_mib)); 923 } 924 925 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled) 926 { 927 if (!CHIP_IS_E1x(bp)) { 928 bp->dcb_state = dcb_on; 929 bp->dcbx_enabled = dcbx_enabled; 930 } else { 931 bp->dcb_state = false; 932 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID; 933 } 934 DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n", 935 dcb_on ? "ON" : "OFF", 936 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" : 937 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" : 938 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ? 939 "on-chip with negotiation" : "invalid"); 940 } 941 942 void bnx2x_dcbx_init_params(struct bnx2x *bp) 943 { 944 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */ 945 bp->dcbx_config_params.admin_ets_willing = 1; 946 bp->dcbx_config_params.admin_pfc_willing = 1; 947 bp->dcbx_config_params.overwrite_settings = 1; 948 bp->dcbx_config_params.admin_ets_enable = 1; 949 bp->dcbx_config_params.admin_pfc_enable = 1; 950 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1; 951 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 952 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 953 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 954 bp->dcbx_config_params.admin_ets_reco_valid = 1; 955 bp->dcbx_config_params.admin_app_priority_willing = 1; 956 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100; 957 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0; 958 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0; 959 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0; 960 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0; 961 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0; 962 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0; 963 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0; 964 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0; 965 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0; 966 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0; 967 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0; 968 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0; 969 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0; 970 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0; 971 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0; 972 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100; 973 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0; 974 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0; 975 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0; 976 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0; 977 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0; 978 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0; 979 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0; 980 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0; 981 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1; 982 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2; 983 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3; 984 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4; 985 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5; 986 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6; 987 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7; 988 bp->dcbx_config_params.admin_pfc_bitmap = 0x0; 989 bp->dcbx_config_params.admin_priority_app_table[0].valid = 0; 990 bp->dcbx_config_params.admin_priority_app_table[1].valid = 0; 991 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0; 992 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0; 993 bp->dcbx_config_params.admin_default_priority = 0; 994 } 995 996 void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem) 997 { 998 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE; 999 1000 /* only PMF can send ADMIN msg to MFW in old MFW versions */ 1001 if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF))) 1002 return; 1003 1004 if (bp->dcbx_enabled <= 0) 1005 return; 1006 1007 /* validate: 1008 * chip of good for dcbx version, 1009 * dcb is wanted 1010 * shmem2 contains DCBX support fields 1011 */ 1012 DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n", 1013 bp->dcb_state, bp->port.pmf); 1014 1015 if (bp->dcb_state == BNX2X_DCB_STATE_ON && 1016 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) { 1017 dcbx_lldp_params_offset = 1018 SHMEM2_RD(bp, dcbx_lldp_params_offset); 1019 1020 DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n", 1021 dcbx_lldp_params_offset); 1022 1023 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0); 1024 1025 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) { 1026 /* need HW lock to avoid scenario of two drivers 1027 * writing in parallel to shmem 1028 */ 1029 bnx2x_acquire_hw_lock(bp, 1030 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1031 if (update_shmem) 1032 bnx2x_dcbx_admin_mib_updated_params(bp, 1033 dcbx_lldp_params_offset); 1034 1035 /* Let HW start negotiation */ 1036 bnx2x_fw_command(bp, 1037 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0); 1038 /* release HW lock only after MFW acks that it finished 1039 * reading values from shmem 1040 */ 1041 bnx2x_release_hw_lock(bp, 1042 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1043 } 1044 } 1045 } 1046 static void 1047 bnx2x_dcbx_print_cos_params(struct bnx2x *bp, 1048 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1049 { 1050 u8 pri = 0; 1051 u8 cos = 0; 1052 1053 DP(BNX2X_MSG_DCB, 1054 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version); 1055 DP(BNX2X_MSG_DCB, 1056 "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n", 1057 bp->dcbx_port_params.pfc.priority_non_pauseable_mask); 1058 1059 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) { 1060 DP(BNX2X_MSG_DCB, 1061 "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n", 1062 cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask); 1063 1064 DP(BNX2X_MSG_DCB, 1065 "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n", 1066 cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl); 1067 1068 DP(BNX2X_MSG_DCB, 1069 "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n", 1070 cos, bp->dcbx_port_params.ets.cos_params[cos].strict); 1071 1072 DP(BNX2X_MSG_DCB, 1073 "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n", 1074 cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable); 1075 } 1076 1077 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1078 DP(BNX2X_MSG_DCB, 1079 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n", 1080 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority); 1081 1082 DP(BNX2X_MSG_DCB, 1083 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n", 1084 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos); 1085 } 1086 } 1087 1088 /* fills help_data according to pg_info */ 1089 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 1090 u32 *pg_pri_orginal_spread, 1091 struct pg_help_data *help_data) 1092 { 1093 bool pg_found = false; 1094 u32 i, traf_type, add_traf_type, add_pg; 1095 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1096 struct pg_entry_help_data *data = help_data->data; /*shortcut*/ 1097 1098 /* Set to invalid */ 1099 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 1100 data[i].pg = DCBX_ILLEGAL_PG; 1101 1102 for (add_traf_type = 0; 1103 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) { 1104 pg_found = false; 1105 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) { 1106 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]]; 1107 for (traf_type = 0; 1108 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1109 traf_type++) { 1110 if (data[traf_type].pg == add_pg) { 1111 if (!(data[traf_type].pg_priority & 1112 (1 << ttp[add_traf_type]))) 1113 data[traf_type]. 1114 num_of_dif_pri++; 1115 data[traf_type].pg_priority |= 1116 (1 << ttp[add_traf_type]); 1117 pg_found = true; 1118 break; 1119 } 1120 } 1121 if (false == pg_found) { 1122 data[help_data->num_of_pg].pg = add_pg; 1123 data[help_data->num_of_pg].pg_priority = 1124 (1 << ttp[add_traf_type]); 1125 data[help_data->num_of_pg].num_of_dif_pri = 1; 1126 help_data->num_of_pg++; 1127 } 1128 } 1129 DP(BNX2X_MSG_DCB, 1130 "add_traf_type %d pg_found %s num_of_pg %d\n", 1131 add_traf_type, (false == pg_found) ? "NO" : "YES", 1132 help_data->num_of_pg); 1133 } 1134 } 1135 1136 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp, 1137 struct cos_help_data *cos_data, 1138 u32 pri_join_mask) 1139 { 1140 /* Only one priority than only one COS */ 1141 cos_data->data[0].pausable = 1142 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1143 cos_data->data[0].pri_join_mask = pri_join_mask; 1144 cos_data->data[0].cos_bw = 100; 1145 cos_data->num_of_cos = 1; 1146 } 1147 1148 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp, 1149 struct cos_entry_help_data *data, 1150 u8 pg_bw) 1151 { 1152 if (data->cos_bw == DCBX_INVALID_COS_BW) 1153 data->cos_bw = pg_bw; 1154 else 1155 data->cos_bw += pg_bw; 1156 } 1157 1158 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 1159 struct cos_help_data *cos_data, 1160 u32 *pg_pri_orginal_spread, 1161 struct dcbx_ets_feature *ets) 1162 { 1163 u32 pri_tested = 0; 1164 u8 i = 0; 1165 u8 entry = 0; 1166 u8 pg_entry = 0; 1167 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1168 1169 cos_data->data[0].pausable = true; 1170 cos_data->data[1].pausable = false; 1171 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1172 1173 for (i = 0 ; i < num_of_pri ; i++) { 1174 pri_tested = 1 << bp->dcbx_port_params. 1175 app.traffic_type_priority[i]; 1176 1177 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) { 1178 cos_data->data[1].pri_join_mask |= pri_tested; 1179 entry = 1; 1180 } else { 1181 cos_data->data[0].pri_join_mask |= pri_tested; 1182 entry = 0; 1183 } 1184 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params. 1185 app.traffic_type_priority[i]]; 1186 /* There can be only one strict pg */ 1187 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) 1188 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry], 1189 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry)); 1190 else 1191 /* If we join a group and one is strict 1192 * than the bw rules 1193 */ 1194 cos_data->data[entry].strict = 1195 BNX2X_DCBX_STRICT_COS_HIGHEST; 1196 } 1197 if ((0 == cos_data->data[0].pri_join_mask) && 1198 (0 == cos_data->data[1].pri_join_mask)) 1199 BNX2X_ERR("dcbx error: Both groups must have priorities\n"); 1200 } 1201 1202 #ifndef POWER_OF_2 1203 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) 1204 #endif 1205 1206 static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp, 1207 struct pg_help_data *pg_help_data, 1208 struct cos_help_data *cos_data, 1209 u32 pri_join_mask, 1210 u8 num_of_dif_pri) 1211 { 1212 u8 i = 0; 1213 u32 pri_tested = 0; 1214 u32 pri_mask_without_pri = 0; 1215 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1216 /*debug*/ 1217 if (num_of_dif_pri == 1) { 1218 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask); 1219 return; 1220 } 1221 /* single priority group */ 1222 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1223 /* If there are both pauseable and non-pauseable priorities, 1224 * the pauseable priorities go to the first queue and 1225 * the non-pauseable priorities go to the second queue. 1226 */ 1227 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1228 /* Pauseable */ 1229 cos_data->data[0].pausable = true; 1230 /* Non pauseable.*/ 1231 cos_data->data[1].pausable = false; 1232 1233 if (2 == num_of_dif_pri) { 1234 cos_data->data[0].cos_bw = 50; 1235 cos_data->data[1].cos_bw = 50; 1236 } 1237 1238 if (3 == num_of_dif_pri) { 1239 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp, 1240 pri_join_mask))) { 1241 cos_data->data[0].cos_bw = 33; 1242 cos_data->data[1].cos_bw = 67; 1243 } else { 1244 cos_data->data[0].cos_bw = 67; 1245 cos_data->data[1].cos_bw = 33; 1246 } 1247 } 1248 1249 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) { 1250 /* If there are only pauseable priorities, 1251 * then one/two priorities go to the first queue 1252 * and one priority goes to the second queue. 1253 */ 1254 if (2 == num_of_dif_pri) { 1255 cos_data->data[0].cos_bw = 50; 1256 cos_data->data[1].cos_bw = 50; 1257 } else { 1258 cos_data->data[0].cos_bw = 67; 1259 cos_data->data[1].cos_bw = 33; 1260 } 1261 cos_data->data[1].pausable = true; 1262 cos_data->data[0].pausable = true; 1263 /* All priorities except FCOE */ 1264 cos_data->data[0].pri_join_mask = (pri_join_mask & 1265 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]))); 1266 /* Only FCOE priority.*/ 1267 cos_data->data[1].pri_join_mask = 1268 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]); 1269 } else 1270 /* If there are only non-pauseable priorities, 1271 * they will all go to the same queue. 1272 */ 1273 bnx2x_dcbx_ets_disabled_entry_data(bp, 1274 cos_data, pri_join_mask); 1275 } else { 1276 /* priority group which is not BW limited (PG#15):*/ 1277 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1278 /* If there are both pauseable and non-pauseable 1279 * priorities, the pauseable priorities go to the first 1280 * queue and the non-pauseable priorities 1281 * go to the second queue. 1282 */ 1283 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) > 1284 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) { 1285 cos_data->data[0].strict = 1286 BNX2X_DCBX_STRICT_COS_HIGHEST; 1287 cos_data->data[1].strict = 1288 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1289 BNX2X_DCBX_STRICT_COS_HIGHEST); 1290 } else { 1291 cos_data->data[0].strict = 1292 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1293 BNX2X_DCBX_STRICT_COS_HIGHEST); 1294 cos_data->data[1].strict = 1295 BNX2X_DCBX_STRICT_COS_HIGHEST; 1296 } 1297 /* Pauseable */ 1298 cos_data->data[0].pausable = true; 1299 /* Non pause-able.*/ 1300 cos_data->data[1].pausable = false; 1301 } else { 1302 /* If there are only pauseable priorities or 1303 * only non-pauseable,* the lower priorities go 1304 * to the first queue and the higher priorities go 1305 * to the second queue. 1306 */ 1307 cos_data->data[0].pausable = 1308 cos_data->data[1].pausable = 1309 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1310 1311 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) { 1312 pri_tested = 1 << bp->dcbx_port_params. 1313 app.traffic_type_priority[i]; 1314 /* Remove priority tested */ 1315 pri_mask_without_pri = 1316 (pri_join_mask & ((u8)(~pri_tested))); 1317 if (pri_mask_without_pri < pri_tested) 1318 break; 1319 } 1320 1321 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX) 1322 BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n"); 1323 1324 cos_data->data[0].pri_join_mask = pri_mask_without_pri; 1325 cos_data->data[1].pri_join_mask = pri_tested; 1326 /* Both queues are strict priority, 1327 * and that with the highest priority 1328 * gets the highest strict priority in the arbiter. 1329 */ 1330 cos_data->data[0].strict = 1331 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1332 BNX2X_DCBX_STRICT_COS_HIGHEST); 1333 cos_data->data[1].strict = 1334 BNX2X_DCBX_STRICT_COS_HIGHEST; 1335 } 1336 } 1337 } 1338 1339 static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1340 struct bnx2x *bp, 1341 struct pg_help_data *pg_help_data, 1342 struct dcbx_ets_feature *ets, 1343 struct cos_help_data *cos_data, 1344 u32 *pg_pri_orginal_spread, 1345 u32 pri_join_mask, 1346 u8 num_of_dif_pri) 1347 { 1348 u8 i = 0; 1349 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 }; 1350 1351 /* If there are both pauseable and non-pauseable priorities, 1352 * the pauseable priorities go to the first queue and 1353 * the non-pauseable priorities go to the second queue. 1354 */ 1355 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1356 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1357 pg_help_data->data[0].pg_priority) || 1358 IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1359 pg_help_data->data[1].pg_priority)) { 1360 /* If one PG contains both pauseable and 1361 * non-pauseable priorities then ETS is disabled. 1362 */ 1363 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data, 1364 pg_pri_orginal_spread, ets); 1365 bp->dcbx_port_params.ets.enabled = false; 1366 return; 1367 } 1368 1369 /* Pauseable */ 1370 cos_data->data[0].pausable = true; 1371 /* Non pauseable. */ 1372 cos_data->data[1].pausable = false; 1373 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, 1374 pg_help_data->data[0].pg_priority)) { 1375 /* 0 is pauseable */ 1376 cos_data->data[0].pri_join_mask = 1377 pg_help_data->data[0].pg_priority; 1378 pg[0] = pg_help_data->data[0].pg; 1379 cos_data->data[1].pri_join_mask = 1380 pg_help_data->data[1].pg_priority; 1381 pg[1] = pg_help_data->data[1].pg; 1382 } else {/* 1 is pauseable */ 1383 cos_data->data[0].pri_join_mask = 1384 pg_help_data->data[1].pg_priority; 1385 pg[0] = pg_help_data->data[1].pg; 1386 cos_data->data[1].pri_join_mask = 1387 pg_help_data->data[0].pg_priority; 1388 pg[1] = pg_help_data->data[0].pg; 1389 } 1390 } else { 1391 /* If there are only pauseable priorities or 1392 * only non-pauseable, each PG goes to a queue. 1393 */ 1394 cos_data->data[0].pausable = cos_data->data[1].pausable = 1395 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1396 cos_data->data[0].pri_join_mask = 1397 pg_help_data->data[0].pg_priority; 1398 pg[0] = pg_help_data->data[0].pg; 1399 cos_data->data[1].pri_join_mask = 1400 pg_help_data->data[1].pg_priority; 1401 pg[1] = pg_help_data->data[1].pg; 1402 } 1403 1404 /* There can be only one strict pg */ 1405 for (i = 0 ; i < ARRAY_SIZE(pg); i++) { 1406 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES) 1407 cos_data->data[i].cos_bw = 1408 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]); 1409 else 1410 cos_data->data[i].strict = 1411 BNX2X_DCBX_STRICT_COS_HIGHEST; 1412 } 1413 } 1414 1415 static int bnx2x_dcbx_join_pgs( 1416 struct bnx2x *bp, 1417 struct dcbx_ets_feature *ets, 1418 struct pg_help_data *pg_help_data, 1419 u8 required_num_of_pg) 1420 { 1421 u8 entry_joined = pg_help_data->num_of_pg - 1; 1422 u8 entry_removed = entry_joined + 1; 1423 u8 pg_joined = 0; 1424 1425 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data) 1426 <= pg_help_data->num_of_pg) { 1427 1428 BNX2X_ERR("required_num_of_pg can't be zero\n"); 1429 return -EINVAL; 1430 } 1431 1432 while (required_num_of_pg < pg_help_data->num_of_pg) { 1433 entry_joined = pg_help_data->num_of_pg - 2; 1434 entry_removed = entry_joined + 1; 1435 /* protect index */ 1436 entry_removed %= ARRAY_SIZE(pg_help_data->data); 1437 1438 pg_help_data->data[entry_joined].pg_priority |= 1439 pg_help_data->data[entry_removed].pg_priority; 1440 1441 pg_help_data->data[entry_joined].num_of_dif_pri += 1442 pg_help_data->data[entry_removed].num_of_dif_pri; 1443 1444 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG || 1445 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG) 1446 /* Entries joined strict priority rules */ 1447 pg_help_data->data[entry_joined].pg = 1448 DCBX_STRICT_PRI_PG; 1449 else { 1450 /* Entries can be joined join BW */ 1451 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl, 1452 pg_help_data->data[entry_joined].pg) + 1453 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1454 pg_help_data->data[entry_removed].pg); 1455 1456 DCBX_PG_BW_SET(ets->pg_bw_tbl, 1457 pg_help_data->data[entry_joined].pg, pg_joined); 1458 } 1459 /* Joined the entries */ 1460 pg_help_data->num_of_pg--; 1461 } 1462 1463 return 0; 1464 } 1465 1466 static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1467 struct bnx2x *bp, 1468 struct pg_help_data *pg_help_data, 1469 struct dcbx_ets_feature *ets, 1470 struct cos_help_data *cos_data, 1471 u32 *pg_pri_orginal_spread, 1472 u32 pri_join_mask, 1473 u8 num_of_dif_pri) 1474 { 1475 u8 i = 0; 1476 u32 pri_tested = 0; 1477 u8 entry = 0; 1478 u8 pg_entry = 0; 1479 bool b_found_strict = false; 1480 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1481 1482 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1483 /* If there are both pauseable and non-pauseable priorities, 1484 * the pauseable priorities go to the first queue and the 1485 * non-pauseable priorities go to the second queue. 1486 */ 1487 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) 1488 bnx2x_dcbx_separate_pauseable_from_non(bp, 1489 cos_data, pg_pri_orginal_spread, ets); 1490 else { 1491 /* If two BW-limited PG-s were combined to one queue, 1492 * the BW is their sum. 1493 * 1494 * If there are only pauseable priorities or only non-pauseable, 1495 * and there are both BW-limited and non-BW-limited PG-s, 1496 * the BW-limited PG/s go to one queue and the non-BW-limited 1497 * PG/s go to the second queue. 1498 * 1499 * If there are only pauseable priorities or only non-pauseable 1500 * and all are BW limited, then two priorities go to the first 1501 * queue and one priority goes to the second queue. 1502 * 1503 * We will join this two cases: 1504 * if one is BW limited it will go to the second queue 1505 * otherwise the last priority will get it 1506 */ 1507 1508 cos_data->data[0].pausable = cos_data->data[1].pausable = 1509 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1510 1511 for (i = 0 ; i < num_of_pri; i++) { 1512 pri_tested = 1 << bp->dcbx_port_params. 1513 app.traffic_type_priority[i]; 1514 pg_entry = (u8)pg_pri_orginal_spread[bp-> 1515 dcbx_port_params.app.traffic_type_priority[i]]; 1516 1517 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1518 entry = 0; 1519 1520 if (i == (num_of_pri-1) && 1521 false == b_found_strict) 1522 /* last entry will be handled separately 1523 * If no priority is strict than last 1524 * entry goes to last queue. 1525 */ 1526 entry = 1; 1527 cos_data->data[entry].pri_join_mask |= 1528 pri_tested; 1529 bnx2x_dcbx_add_to_cos_bw(bp, 1530 &cos_data->data[entry], 1531 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1532 pg_entry)); 1533 } else { 1534 b_found_strict = true; 1535 cos_data->data[1].pri_join_mask |= pri_tested; 1536 /* If we join a group and one is strict 1537 * than the bw rules 1538 */ 1539 cos_data->data[1].strict = 1540 BNX2X_DCBX_STRICT_COS_HIGHEST; 1541 } 1542 } 1543 } 1544 } 1545 1546 static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, 1547 struct pg_help_data *help_data, 1548 struct dcbx_ets_feature *ets, 1549 struct cos_help_data *cos_data, 1550 u32 *pg_pri_orginal_spread, 1551 u32 pri_join_mask, 1552 u8 num_of_dif_pri) 1553 { 1554 /* default E2 settings */ 1555 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2; 1556 1557 switch (help_data->num_of_pg) { 1558 case 1: 1559 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params( 1560 bp, 1561 help_data, 1562 cos_data, 1563 pri_join_mask, 1564 num_of_dif_pri); 1565 break; 1566 case 2: 1567 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1568 bp, 1569 help_data, 1570 ets, 1571 cos_data, 1572 pg_pri_orginal_spread, 1573 pri_join_mask, 1574 num_of_dif_pri); 1575 break; 1576 1577 case 3: 1578 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1579 bp, 1580 help_data, 1581 ets, 1582 cos_data, 1583 pg_pri_orginal_spread, 1584 pri_join_mask, 1585 num_of_dif_pri); 1586 break; 1587 default: 1588 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n"); 1589 bnx2x_dcbx_ets_disabled_entry_data(bp, 1590 cos_data, pri_join_mask); 1591 } 1592 } 1593 1594 static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp, 1595 struct cos_help_data *cos_data, 1596 u8 entry, 1597 u8 num_spread_of_entries, 1598 u8 strict_app_pris) 1599 { 1600 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST; 1601 u8 num_of_app_pri = MAX_PFC_PRIORITIES; 1602 u8 app_pri_bit = 0; 1603 1604 while (num_spread_of_entries && num_of_app_pri > 0) { 1605 app_pri_bit = 1 << (num_of_app_pri - 1); 1606 if (app_pri_bit & strict_app_pris) { 1607 struct cos_entry_help_data *data = &cos_data-> 1608 data[entry]; 1609 num_spread_of_entries--; 1610 if (num_spread_of_entries == 0) { 1611 /* last entry needed put all the entries left */ 1612 data->cos_bw = DCBX_INVALID_COS_BW; 1613 data->strict = strict_pri; 1614 data->pri_join_mask = strict_app_pris; 1615 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1616 data->pri_join_mask); 1617 } else { 1618 strict_app_pris &= ~app_pri_bit; 1619 1620 data->cos_bw = DCBX_INVALID_COS_BW; 1621 data->strict = strict_pri; 1622 data->pri_join_mask = app_pri_bit; 1623 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1624 data->pri_join_mask); 1625 } 1626 1627 strict_pri = 1628 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri); 1629 entry++; 1630 } 1631 1632 num_of_app_pri--; 1633 } 1634 1635 if (num_spread_of_entries) { 1636 BNX2X_ERR("Didn't succeed to spread strict priorities\n"); 1637 return -EINVAL; 1638 } 1639 1640 return 0; 1641 } 1642 1643 static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp, 1644 struct cos_help_data *cos_data, 1645 u8 entry, 1646 u8 num_spread_of_entries, 1647 u8 strict_app_pris) 1648 { 1649 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry, 1650 num_spread_of_entries, 1651 strict_app_pris)) { 1652 struct cos_entry_help_data *data = &cos_data-> 1653 data[entry]; 1654 /* Fill BW entry */ 1655 data->cos_bw = DCBX_INVALID_COS_BW; 1656 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST; 1657 data->pri_join_mask = strict_app_pris; 1658 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1659 data->pri_join_mask); 1660 return 1; 1661 } 1662 1663 return num_spread_of_entries; 1664 } 1665 1666 static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp, 1667 struct pg_help_data *help_data, 1668 struct dcbx_ets_feature *ets, 1669 struct cos_help_data *cos_data, 1670 u32 pri_join_mask) 1671 1672 { 1673 u8 need_num_of_entries = 0; 1674 u8 i = 0; 1675 u8 entry = 0; 1676 1677 /* 1678 * if the number of requested PG-s in CEE is greater than 3 1679 * then the results are not determined since this is a violation 1680 * of the standard. 1681 */ 1682 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) { 1683 if (bnx2x_dcbx_join_pgs(bp, ets, help_data, 1684 DCBX_COS_MAX_NUM_E3B0)) { 1685 BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n"); 1686 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, 1687 pri_join_mask); 1688 return; 1689 } 1690 } 1691 1692 for (i = 0 ; i < help_data->num_of_pg; i++) { 1693 struct pg_entry_help_data *pg = &help_data->data[i]; 1694 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1695 struct cos_entry_help_data *data = &cos_data-> 1696 data[entry]; 1697 /* Fill BW entry */ 1698 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg); 1699 data->strict = BNX2X_DCBX_STRICT_INVALID; 1700 data->pri_join_mask = pg->pg_priority; 1701 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1702 data->pri_join_mask); 1703 1704 entry++; 1705 } else { 1706 need_num_of_entries = min_t(u8, 1707 (u8)pg->num_of_dif_pri, 1708 (u8)DCBX_COS_MAX_NUM_E3B0 - 1709 help_data->num_of_pg + 1); 1710 /* 1711 * If there are still VOQ-s which have no associated PG, 1712 * then associate these VOQ-s to PG15. These PG-s will 1713 * be used for SP between priorities on PG15. 1714 */ 1715 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data, 1716 entry, need_num_of_entries, pg->pg_priority); 1717 } 1718 } 1719 1720 /* the entry will represent the number of COSes used */ 1721 cos_data->num_of_cos = entry; 1722 } 1723 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 1724 struct pg_help_data *help_data, 1725 struct dcbx_ets_feature *ets, 1726 u32 *pg_pri_orginal_spread) 1727 { 1728 struct cos_help_data cos_data; 1729 u8 i = 0; 1730 u32 pri_join_mask = 0; 1731 u8 num_of_dif_pri = 0; 1732 1733 memset(&cos_data, 0, sizeof(cos_data)); 1734 1735 /* Validate the pg value */ 1736 for (i = 0; i < help_data->num_of_pg ; i++) { 1737 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg && 1738 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg) 1739 BNX2X_ERR("Invalid pg[%d] data %x\n", i, 1740 help_data->data[i].pg); 1741 pri_join_mask |= help_data->data[i].pg_priority; 1742 num_of_dif_pri += help_data->data[i].num_of_dif_pri; 1743 } 1744 1745 /* defaults */ 1746 cos_data.num_of_cos = 1; 1747 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) { 1748 cos_data.data[i].pri_join_mask = 0; 1749 cos_data.data[i].pausable = false; 1750 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID; 1751 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW; 1752 } 1753 1754 if (CHIP_IS_E3B0(bp)) 1755 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets, 1756 &cos_data, pri_join_mask); 1757 else /* E2 + E3A0 */ 1758 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp, 1759 help_data, ets, 1760 &cos_data, 1761 pg_pri_orginal_spread, 1762 pri_join_mask, 1763 num_of_dif_pri); 1764 1765 for (i = 0; i < cos_data.num_of_cos ; i++) { 1766 struct bnx2x_dcbx_cos_params *p = 1767 &bp->dcbx_port_params.ets.cos_params[i]; 1768 1769 p->strict = cos_data.data[i].strict; 1770 p->bw_tbl = cos_data.data[i].cos_bw; 1771 p->pri_bitmask = cos_data.data[i].pri_join_mask; 1772 p->pauseable = cos_data.data[i].pausable; 1773 1774 /* sanity */ 1775 if (p->bw_tbl != DCBX_INVALID_COS_BW || 1776 p->strict != BNX2X_DCBX_STRICT_INVALID) { 1777 if (p->pri_bitmask == 0) 1778 BNX2X_ERR("Invalid pri_bitmask for %d\n", i); 1779 1780 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) { 1781 1782 if (p->pauseable && 1783 DCBX_PFC_PRI_GET_NON_PAUSE(bp, 1784 p->pri_bitmask) != 0) 1785 BNX2X_ERR("Inconsistent config for pausable COS %d\n", 1786 i); 1787 1788 if (!p->pauseable && 1789 DCBX_PFC_PRI_GET_PAUSE(bp, 1790 p->pri_bitmask) != 0) 1791 BNX2X_ERR("Inconsistent config for nonpausable COS %d\n", 1792 i); 1793 } 1794 } 1795 1796 if (p->pauseable) 1797 DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n", 1798 i, cos_data.data[i].pri_join_mask); 1799 else 1800 DP(BNX2X_MSG_DCB, 1801 "COS %d NONPAUSABLE prijoinmask 0x%x\n", 1802 i, cos_data.data[i].pri_join_mask); 1803 } 1804 1805 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ; 1806 } 1807 1808 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 1809 u32 *set_configuration_ets_pg, 1810 u32 *pri_pg_tbl) 1811 { 1812 int i; 1813 1814 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 1815 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i); 1816 1817 DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n", 1818 i, set_configuration_ets_pg[i]); 1819 } 1820 } 1821 1822 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 1823 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1824 { 1825 u16 pri_bit = 0; 1826 u8 cos = 0, pri = 0; 1827 struct priority_cos *tt2cos; 1828 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1829 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 1830 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1831 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 1832 1833 memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg)); 1834 1835 /* to disable DCB - the structure must be zeroed */ 1836 if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured) 1837 return; 1838 1839 /*shortcut*/ 1840 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos; 1841 1842 /* Fw version should be incremented each update */ 1843 pfc_fw_cfg->dcb_version = ++bp->dcb_version; 1844 pfc_fw_cfg->dcb_enabled = 1; 1845 1846 /* Fill priority parameters */ 1847 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1848 tt2cos[pri].priority = ttp[pri]; 1849 pri_bit = 1 << tt2cos[pri].priority; 1850 1851 /* Fill COS parameters based on COS calculated to 1852 * make it more general for future use */ 1853 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) 1854 if (bp->dcbx_port_params.ets.cos_params[cos]. 1855 pri_bitmask & pri_bit) 1856 tt2cos[pri].cos = cos; 1857 } 1858 1859 /* we never want the FW to add a 0 vlan tag */ 1860 pfc_fw_cfg->dont_add_pri_0_en = 1; 1861 1862 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg); 1863 } 1864 1865 void bnx2x_dcbx_pmf_update(struct bnx2x *bp) 1866 { 1867 /* if we need to synchronize DCBX result from prev PMF 1868 * read it from shmem and update bp and netdev accordingly 1869 */ 1870 if (SHMEM2_HAS(bp, drv_flags) && 1871 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) { 1872 /* Read neg results if dcbx is in the FW */ 1873 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 1874 return; 1875 1876 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1877 bp->dcbx_error); 1878 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1879 bp->dcbx_error); 1880 #ifdef BCM_DCBNL 1881 /* 1882 * Add new app tlvs to dcbnl 1883 */ 1884 bnx2x_dcbnl_update_applist(bp, false); 1885 /* 1886 * Send a notification for the new negotiated parameters 1887 */ 1888 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 1889 #endif 1890 /* 1891 * reconfigure the netdevice with the results of the new 1892 * dcbx negotiation. 1893 */ 1894 bnx2x_dcbx_update_tc_mapping(bp); 1895 } 1896 } 1897 1898 /* DCB netlink */ 1899 #ifdef BCM_DCBNL 1900 1901 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \ 1902 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC) 1903 1904 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp) 1905 { 1906 /* validate dcbnl call that may change HW state: 1907 * DCB is on and DCBX mode was SUCCESSFULLY set by the user. 1908 */ 1909 return bp->dcb_state && bp->dcbx_mode_uset; 1910 } 1911 1912 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev) 1913 { 1914 struct bnx2x *bp = netdev_priv(netdev); 1915 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state); 1916 return bp->dcb_state; 1917 } 1918 1919 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state) 1920 { 1921 struct bnx2x *bp = netdev_priv(netdev); 1922 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 1923 1924 /* Fail to set state to "enabled" if dcbx is disabled in nvram */ 1925 if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) || 1926 (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) { 1927 DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n"); 1928 return 1; 1929 } 1930 1931 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled); 1932 return 0; 1933 } 1934 1935 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev, 1936 u8 *perm_addr) 1937 { 1938 struct bnx2x *bp = netdev_priv(netdev); 1939 DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n"); 1940 1941 /* first the HW mac address */ 1942 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len); 1943 1944 if (CNIC_LOADED(bp)) 1945 /* second SAN address */ 1946 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, 1947 netdev->addr_len); 1948 } 1949 1950 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio, 1951 u8 prio_type, u8 pgid, u8 bw_pct, 1952 u8 up_map) 1953 { 1954 struct bnx2x *bp = netdev_priv(netdev); 1955 1956 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid); 1957 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 1958 return; 1959 1960 /** 1961 * bw_pct ignored - band-width percentage devision between user 1962 * priorities within the same group is not 1963 * standard and hence not supported 1964 * 1965 * prio_type ignored - priority levels within the same group are not 1966 * standard and hence are not supported. According 1967 * to the standard pgid 15 is dedicated to strict 1968 * priority traffic (on the port level). 1969 * 1970 * up_map ignored 1971 */ 1972 1973 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid; 1974 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1975 } 1976 1977 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev, 1978 int pgid, u8 bw_pct) 1979 { 1980 struct bnx2x *bp = netdev_priv(netdev); 1981 DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct); 1982 1983 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 1984 return; 1985 1986 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct; 1987 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1988 } 1989 1990 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio, 1991 u8 prio_type, u8 pgid, u8 bw_pct, 1992 u8 up_map) 1993 { 1994 struct bnx2x *bp = netdev_priv(netdev); 1995 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 1996 } 1997 1998 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev, 1999 int pgid, u8 bw_pct) 2000 { 2001 struct bnx2x *bp = netdev_priv(netdev); 2002 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 2003 } 2004 2005 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio, 2006 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2007 u8 *up_map) 2008 { 2009 struct bnx2x *bp = netdev_priv(netdev); 2010 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2011 2012 /** 2013 * bw_pct ignored - band-width percentage devision between user 2014 * priorities within the same group is not 2015 * standard and hence not supported 2016 * 2017 * prio_type ignored - priority levels within the same group are not 2018 * standard and hence are not supported. According 2019 * to the standard pgid 15 is dedicated to strict 2020 * priority traffic (on the port level). 2021 * 2022 * up_map ignored 2023 */ 2024 *up_map = *bw_pct = *prio_type = *pgid = 0; 2025 2026 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 2027 return; 2028 2029 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio); 2030 } 2031 2032 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev, 2033 int pgid, u8 *bw_pct) 2034 { 2035 struct bnx2x *bp = netdev_priv(netdev); 2036 DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid); 2037 2038 *bw_pct = 0; 2039 2040 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 2041 return; 2042 2043 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid); 2044 } 2045 2046 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio, 2047 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2048 u8 *up_map) 2049 { 2050 struct bnx2x *bp = netdev_priv(netdev); 2051 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2052 2053 *prio_type = *pgid = *bw_pct = *up_map = 0; 2054 } 2055 2056 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev, 2057 int pgid, u8 *bw_pct) 2058 { 2059 struct bnx2x *bp = netdev_priv(netdev); 2060 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2061 2062 *bw_pct = 0; 2063 } 2064 2065 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio, 2066 u8 setting) 2067 { 2068 struct bnx2x *bp = netdev_priv(netdev); 2069 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting); 2070 2071 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES) 2072 return; 2073 2074 if (setting) { 2075 bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio); 2076 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 2077 } else { 2078 bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio); 2079 } 2080 } 2081 2082 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio, 2083 u8 *setting) 2084 { 2085 struct bnx2x *bp = netdev_priv(netdev); 2086 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2087 2088 *setting = 0; 2089 2090 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES) 2091 return; 2092 2093 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1; 2094 } 2095 2096 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev) 2097 { 2098 struct bnx2x *bp = netdev_priv(netdev); 2099 int rc = 0; 2100 2101 DP(BNX2X_MSG_DCB, "SET-ALL\n"); 2102 2103 if (!bnx2x_dcbnl_set_valid(bp)) 2104 return 1; 2105 2106 if (bp->recovery_state != BNX2X_RECOVERY_DONE) { 2107 netdev_err(bp->dev, 2108 "Handling parity error recovery. Try again later\n"); 2109 return 1; 2110 } 2111 if (netif_running(bp->dev)) { 2112 bnx2x_update_drv_flags(bp, 2113 1 << DRV_FLAGS_DCB_MFW_CONFIGURED, 2114 1); 2115 bnx2x_dcbx_init(bp, true); 2116 } 2117 DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc); 2118 if (rc) 2119 return 1; 2120 2121 return 0; 2122 } 2123 2124 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap) 2125 { 2126 struct bnx2x *bp = netdev_priv(netdev); 2127 u8 rval = 0; 2128 2129 if (bp->dcb_state) { 2130 switch (capid) { 2131 case DCB_CAP_ATTR_PG: 2132 *cap = true; 2133 break; 2134 case DCB_CAP_ATTR_PFC: 2135 *cap = true; 2136 break; 2137 case DCB_CAP_ATTR_UP2TC: 2138 *cap = false; 2139 break; 2140 case DCB_CAP_ATTR_PG_TCS: 2141 *cap = 0x80; /* 8 priorities for PGs */ 2142 break; 2143 case DCB_CAP_ATTR_PFC_TCS: 2144 *cap = 0x80; /* 8 priorities for PFC */ 2145 break; 2146 case DCB_CAP_ATTR_GSP: 2147 *cap = true; 2148 break; 2149 case DCB_CAP_ATTR_BCN: 2150 *cap = false; 2151 break; 2152 case DCB_CAP_ATTR_DCBX: 2153 *cap = BNX2X_DCBX_CAPS; 2154 break; 2155 default: 2156 BNX2X_ERR("Non valid capability ID\n"); 2157 rval = 1; 2158 break; 2159 } 2160 } else { 2161 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2162 rval = 1; 2163 } 2164 2165 DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap); 2166 return rval; 2167 } 2168 2169 static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num) 2170 { 2171 struct bnx2x *bp = netdev_priv(netdev); 2172 u8 rval = 0; 2173 2174 DP(BNX2X_MSG_DCB, "tcid %d\n", tcid); 2175 2176 if (bp->dcb_state) { 2177 switch (tcid) { 2178 case DCB_NUMTCS_ATTR_PG: 2179 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2180 DCBX_COS_MAX_NUM_E2; 2181 break; 2182 case DCB_NUMTCS_ATTR_PFC: 2183 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2184 DCBX_COS_MAX_NUM_E2; 2185 break; 2186 default: 2187 BNX2X_ERR("Non valid TC-ID\n"); 2188 rval = 1; 2189 break; 2190 } 2191 } else { 2192 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2193 rval = 1; 2194 } 2195 2196 return rval; 2197 } 2198 2199 static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) 2200 { 2201 struct bnx2x *bp = netdev_priv(netdev); 2202 DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num); 2203 return -EINVAL; 2204 } 2205 2206 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) 2207 { 2208 struct bnx2x *bp = netdev_priv(netdev); 2209 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled); 2210 2211 if (!bp->dcb_state) 2212 return 0; 2213 2214 return bp->dcbx_local_feat.pfc.enabled; 2215 } 2216 2217 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state) 2218 { 2219 struct bnx2x *bp = netdev_priv(netdev); 2220 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 2221 2222 if (!bnx2x_dcbnl_set_valid(bp)) 2223 return; 2224 2225 bp->dcbx_config_params.admin_pfc_tx_enable = 2226 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0); 2227 } 2228 2229 static void bnx2x_admin_app_set_ent( 2230 struct bnx2x_admin_priority_app_table *app_ent, 2231 u8 idtype, u16 idval, u8 up) 2232 { 2233 app_ent->valid = 1; 2234 2235 switch (idtype) { 2236 case DCB_APP_IDTYPE_ETHTYPE: 2237 app_ent->traffic_type = TRAFFIC_TYPE_ETH; 2238 break; 2239 case DCB_APP_IDTYPE_PORTNUM: 2240 app_ent->traffic_type = TRAFFIC_TYPE_PORT; 2241 break; 2242 default: 2243 break; /* never gets here */ 2244 } 2245 app_ent->app_id = idval; 2246 app_ent->priority = up; 2247 } 2248 2249 static bool bnx2x_admin_app_is_equal( 2250 struct bnx2x_admin_priority_app_table *app_ent, 2251 u8 idtype, u16 idval) 2252 { 2253 if (!app_ent->valid) 2254 return false; 2255 2256 switch (idtype) { 2257 case DCB_APP_IDTYPE_ETHTYPE: 2258 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH) 2259 return false; 2260 break; 2261 case DCB_APP_IDTYPE_PORTNUM: 2262 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT) 2263 return false; 2264 break; 2265 default: 2266 return false; 2267 } 2268 if (app_ent->app_id != idval) 2269 return false; 2270 2271 return true; 2272 } 2273 2274 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up) 2275 { 2276 int i, ff; 2277 2278 /* iterate over the app entries looking for idtype and idval */ 2279 for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 2280 struct bnx2x_admin_priority_app_table *app_ent = 2281 &bp->dcbx_config_params.admin_priority_app_table[i]; 2282 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval)) 2283 break; 2284 2285 if (ff < 0 && !app_ent->valid) 2286 ff = i; 2287 } 2288 if (i < DCBX_CONFIG_MAX_APP_PROTOCOL) 2289 /* if found overwrite up */ 2290 bp->dcbx_config_params. 2291 admin_priority_app_table[i].priority = up; 2292 else if (ff >= 0) 2293 /* not found use first-free */ 2294 bnx2x_admin_app_set_ent( 2295 &bp->dcbx_config_params.admin_priority_app_table[ff], 2296 idtype, idval, up); 2297 else { 2298 /* app table is full */ 2299 BNX2X_ERR("Application table is too large\n"); 2300 return -EBUSY; 2301 } 2302 2303 /* up configured, if not 0 make sure feature is enabled */ 2304 if (up) 2305 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 2306 2307 return 0; 2308 } 2309 2310 static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype, 2311 u16 idval, u8 up) 2312 { 2313 struct bnx2x *bp = netdev_priv(netdev); 2314 2315 DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n", 2316 idtype, idval, up); 2317 2318 if (!bnx2x_dcbnl_set_valid(bp)) { 2319 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2320 return -EINVAL; 2321 } 2322 2323 /* verify idtype */ 2324 switch (idtype) { 2325 case DCB_APP_IDTYPE_ETHTYPE: 2326 case DCB_APP_IDTYPE_PORTNUM: 2327 break; 2328 default: 2329 DP(BNX2X_MSG_DCB, "Wrong ID type\n"); 2330 return -EINVAL; 2331 } 2332 return bnx2x_set_admin_app_up(bp, idtype, idval, up); 2333 } 2334 2335 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev) 2336 { 2337 struct bnx2x *bp = netdev_priv(netdev); 2338 u8 state; 2339 2340 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE; 2341 2342 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF) 2343 state |= DCB_CAP_DCBX_STATIC; 2344 2345 return state; 2346 } 2347 2348 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state) 2349 { 2350 struct bnx2x *bp = netdev_priv(netdev); 2351 DP(BNX2X_MSG_DCB, "state = %02x\n", state); 2352 2353 /* set dcbx mode */ 2354 2355 if ((state & BNX2X_DCBX_CAPS) != state) { 2356 BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n", 2357 state); 2358 return 1; 2359 } 2360 2361 if (bp->dcb_state != BNX2X_DCB_STATE_ON) { 2362 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n"); 2363 return 1; 2364 } 2365 2366 if (state & DCB_CAP_DCBX_STATIC) 2367 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF; 2368 else 2369 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON; 2370 2371 bp->dcbx_mode_uset = true; 2372 return 0; 2373 } 2374 2375 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, 2376 u8 *flags) 2377 { 2378 struct bnx2x *bp = netdev_priv(netdev); 2379 u8 rval = 0; 2380 2381 DP(BNX2X_MSG_DCB, "featid %d\n", featid); 2382 2383 if (bp->dcb_state) { 2384 *flags = 0; 2385 switch (featid) { 2386 case DCB_FEATCFG_ATTR_PG: 2387 if (bp->dcbx_local_feat.ets.enabled) 2388 *flags |= DCB_FEATCFG_ENABLE; 2389 if (bp->dcbx_error & (DCBX_LOCAL_ETS_ERROR | 2390 DCBX_REMOTE_MIB_ERROR)) 2391 *flags |= DCB_FEATCFG_ERROR; 2392 break; 2393 case DCB_FEATCFG_ATTR_PFC: 2394 if (bp->dcbx_local_feat.pfc.enabled) 2395 *flags |= DCB_FEATCFG_ENABLE; 2396 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR | 2397 DCBX_LOCAL_PFC_MISMATCH | 2398 DCBX_REMOTE_MIB_ERROR)) 2399 *flags |= DCB_FEATCFG_ERROR; 2400 break; 2401 case DCB_FEATCFG_ATTR_APP: 2402 if (bp->dcbx_local_feat.app.enabled) 2403 *flags |= DCB_FEATCFG_ENABLE; 2404 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR | 2405 DCBX_LOCAL_APP_MISMATCH | 2406 DCBX_REMOTE_MIB_ERROR)) 2407 *flags |= DCB_FEATCFG_ERROR; 2408 break; 2409 default: 2410 BNX2X_ERR("Non valid feature-ID\n"); 2411 rval = 1; 2412 break; 2413 } 2414 } else { 2415 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2416 rval = 1; 2417 } 2418 2419 return rval; 2420 } 2421 2422 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, 2423 u8 flags) 2424 { 2425 struct bnx2x *bp = netdev_priv(netdev); 2426 u8 rval = 0; 2427 2428 DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags); 2429 2430 /* ignore the 'advertise' flag */ 2431 if (bnx2x_dcbnl_set_valid(bp)) { 2432 switch (featid) { 2433 case DCB_FEATCFG_ATTR_PG: 2434 bp->dcbx_config_params.admin_ets_enable = 2435 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2436 bp->dcbx_config_params.admin_ets_willing = 2437 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2438 break; 2439 case DCB_FEATCFG_ATTR_PFC: 2440 bp->dcbx_config_params.admin_pfc_enable = 2441 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2442 bp->dcbx_config_params.admin_pfc_willing = 2443 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2444 break; 2445 case DCB_FEATCFG_ATTR_APP: 2446 /* ignore enable, always enabled */ 2447 bp->dcbx_config_params.admin_app_priority_willing = 2448 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2449 break; 2450 default: 2451 BNX2X_ERR("Non valid feature-ID\n"); 2452 rval = 1; 2453 break; 2454 } 2455 } else { 2456 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2457 rval = 1; 2458 } 2459 2460 return rval; 2461 } 2462 2463 static int bnx2x_peer_appinfo(struct net_device *netdev, 2464 struct dcb_peer_app_info *info, u16* app_count) 2465 { 2466 int i; 2467 struct bnx2x *bp = netdev_priv(netdev); 2468 2469 DP(BNX2X_MSG_DCB, "APP-INFO\n"); 2470 2471 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0; 2472 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0; 2473 *app_count = 0; 2474 2475 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) 2476 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield & 2477 DCBX_APP_ENTRY_VALID) 2478 (*app_count)++; 2479 return 0; 2480 } 2481 2482 static int bnx2x_peer_apptable(struct net_device *netdev, 2483 struct dcb_app *table) 2484 { 2485 int i, j; 2486 struct bnx2x *bp = netdev_priv(netdev); 2487 2488 DP(BNX2X_MSG_DCB, "APP-TABLE\n"); 2489 2490 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 2491 struct dcbx_app_priority_entry *ent = 2492 &bp->dcbx_remote_feat.app.app_pri_tbl[i]; 2493 2494 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 2495 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 2496 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent); 2497 table[j++].protocol = ent->app_id; 2498 } 2499 } 2500 return 0; 2501 } 2502 2503 static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg) 2504 { 2505 int i; 2506 struct bnx2x *bp = netdev_priv(netdev); 2507 2508 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0; 2509 2510 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) { 2511 pg->pg_bw[i] = 2512 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i); 2513 pg->prio_pg[i] = 2514 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i); 2515 } 2516 return 0; 2517 } 2518 2519 static int bnx2x_cee_peer_getpfc(struct net_device *netdev, 2520 struct cee_pfc *pfc) 2521 { 2522 struct bnx2x *bp = netdev_priv(netdev); 2523 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps; 2524 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap; 2525 return 0; 2526 } 2527 2528 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = { 2529 .getstate = bnx2x_dcbnl_get_state, 2530 .setstate = bnx2x_dcbnl_set_state, 2531 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr, 2532 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx, 2533 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx, 2534 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx, 2535 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx, 2536 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx, 2537 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx, 2538 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx, 2539 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx, 2540 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg, 2541 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg, 2542 .setall = bnx2x_dcbnl_set_all, 2543 .getcap = bnx2x_dcbnl_get_cap, 2544 .getnumtcs = bnx2x_dcbnl_get_numtcs, 2545 .setnumtcs = bnx2x_dcbnl_set_numtcs, 2546 .getpfcstate = bnx2x_dcbnl_get_pfc_state, 2547 .setpfcstate = bnx2x_dcbnl_set_pfc_state, 2548 .setapp = bnx2x_dcbnl_set_app_up, 2549 .getdcbx = bnx2x_dcbnl_get_dcbx, 2550 .setdcbx = bnx2x_dcbnl_set_dcbx, 2551 .getfeatcfg = bnx2x_dcbnl_get_featcfg, 2552 .setfeatcfg = bnx2x_dcbnl_set_featcfg, 2553 .peer_getappinfo = bnx2x_peer_appinfo, 2554 .peer_getapptable = bnx2x_peer_apptable, 2555 .cee_peer_getpg = bnx2x_cee_peer_getpg, 2556 .cee_peer_getpfc = bnx2x_cee_peer_getpfc, 2557 }; 2558 2559 #endif /* BCM_DCBNL */ 2560