1 /* bnx2x_dcb.c: QLogic Everest network driver. 2 * 3 * Copyright 2009-2013 Broadcom Corporation 4 * Copyright 2014 QLogic Corporation 5 * All rights reserved 6 * 7 * Unless you and QLogic execute a separate written software license 8 * agreement governing use of this software, this software is licensed to you 9 * under the terms of the GNU General Public License version 2, available 10 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). 11 * 12 * Notwithstanding the above, under no circumstances may you combine this 13 * software in any way with any other QLogic software provided under a 14 * license other than the GPL, without QLogic's express prior written 15 * consent. 16 * 17 * Maintained by: Ariel Elior <ariel.elior@qlogic.com> 18 * Written by: Dmitry Kravkov 19 * 20 */ 21 22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 23 24 #include <linux/netdevice.h> 25 #include <linux/types.h> 26 #include <linux/errno.h> 27 #include <linux/rtnetlink.h> 28 #include <net/dcbnl.h> 29 30 #include "bnx2x.h" 31 #include "bnx2x_cmn.h" 32 #include "bnx2x_dcb.h" 33 34 /* forward declarations of dcbx related functions */ 35 static void bnx2x_pfc_set_pfc(struct bnx2x *bp); 36 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp); 37 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 38 u32 *set_configuration_ets_pg, 39 u32 *pri_pg_tbl); 40 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 41 u32 *pg_pri_orginal_spread, 42 struct pg_help_data *help_data); 43 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 44 struct pg_help_data *help_data, 45 struct dcbx_ets_feature *ets, 46 u32 *pg_pri_orginal_spread); 47 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 48 struct cos_help_data *cos_data, 49 u32 *pg_pri_orginal_spread, 50 struct dcbx_ets_feature *ets); 51 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 52 struct bnx2x_func_tx_start_params*); 53 54 /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */ 55 static void bnx2x_read_data(struct bnx2x *bp, u32 *buff, 56 u32 addr, u32 len) 57 { 58 int i; 59 for (i = 0; i < len; i += 4, buff++) 60 *buff = REG_RD(bp, addr + i); 61 } 62 63 static void bnx2x_write_data(struct bnx2x *bp, u32 *buff, 64 u32 addr, u32 len) 65 { 66 int i; 67 for (i = 0; i < len; i += 4, buff++) 68 REG_WR(bp, addr + i, *buff); 69 } 70 71 static void bnx2x_pfc_set(struct bnx2x *bp) 72 { 73 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0}; 74 u32 pri_bit, val = 0; 75 int i; 76 77 pfc_params.num_of_rx_cos_priority_mask = 78 bp->dcbx_port_params.ets.num_of_cos; 79 80 /* Tx COS configuration */ 81 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++) 82 /* 83 * We configure only the pauseable bits (non pauseable aren't 84 * configured at all) it's done to avoid false pauses from 85 * network 86 */ 87 pfc_params.rx_cos_priority_mask[i] = 88 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask 89 & DCBX_PFC_PRI_PAUSE_MASK(bp); 90 91 /* 92 * Rx COS configuration 93 * Changing PFC RX configuration . 94 * In RX COS0 will always be configured to lossless and COS1 to lossy 95 */ 96 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) { 97 pri_bit = 1 << i; 98 99 if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))) 100 val |= 1 << (i * 4); 101 } 102 103 pfc_params.pkt_priority_to_cos = val; 104 105 /* RX COS0 */ 106 pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp); 107 /* RX COS1 */ 108 pfc_params.llfc_high_priority_classes = 0; 109 110 bnx2x_acquire_phy_lock(bp); 111 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED; 112 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params); 113 bnx2x_release_phy_lock(bp); 114 } 115 116 static void bnx2x_pfc_clear(struct bnx2x *bp) 117 { 118 struct bnx2x_nig_brb_pfc_port_params nig_params = {0}; 119 nig_params.pause_enable = 1; 120 bnx2x_acquire_phy_lock(bp); 121 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED; 122 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params); 123 bnx2x_release_phy_lock(bp); 124 } 125 126 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp, 127 struct dcbx_features *features, 128 u32 error) 129 { 130 u8 i = 0; 131 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error); 132 133 /* PG */ 134 DP(NETIF_MSG_LINK, 135 "local_mib.features.ets.enabled %x\n", features->ets.enabled); 136 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) 137 DP(NETIF_MSG_LINK, 138 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i, 139 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i)); 140 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) 141 DP(NETIF_MSG_LINK, 142 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i, 143 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i)); 144 145 /* pfc */ 146 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n", 147 features->pfc.pri_en_bitmap); 148 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n", 149 features->pfc.pfc_caps); 150 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n", 151 features->pfc.enabled); 152 153 DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n", 154 features->app.default_pri); 155 DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n", 156 features->app.tc_supported); 157 DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n", 158 features->app.enabled); 159 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 160 DP(BNX2X_MSG_DCB, 161 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n", 162 i, features->app.app_pri_tbl[i].app_id); 163 DP(BNX2X_MSG_DCB, 164 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n", 165 i, features->app.app_pri_tbl[i].pri_bitmap); 166 DP(BNX2X_MSG_DCB, 167 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n", 168 i, features->app.app_pri_tbl[i].appBitfield); 169 } 170 } 171 172 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp, 173 u8 pri_bitmap, 174 u8 llfc_traf_type) 175 { 176 u32 pri = MAX_PFC_PRIORITIES; 177 u32 index = MAX_PFC_PRIORITIES - 1; 178 u32 pri_mask; 179 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 180 181 /* Choose the highest priority */ 182 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) { 183 pri_mask = 1 << index; 184 if (GET_FLAGS(pri_bitmap, pri_mask)) 185 pri = index ; 186 index--; 187 } 188 189 if (pri < MAX_PFC_PRIORITIES) 190 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri); 191 } 192 193 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp, 194 struct dcbx_app_priority_feature *app, 195 u32 error) { 196 u8 index; 197 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 198 199 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) 200 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n"); 201 202 if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH)) 203 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n"); 204 205 if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND)) 206 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n"); 207 if (app->enabled && 208 !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH | 209 DCBX_REMOTE_APP_TLV_NOT_FOUND)) { 210 211 bp->dcbx_port_params.app.enabled = true; 212 213 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 214 ttp[index] = 0; 215 216 if (app->default_pri < MAX_PFC_PRIORITIES) 217 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri; 218 219 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) { 220 struct dcbx_app_priority_entry *entry = 221 app->app_pri_tbl; 222 223 if (GET_FLAGS(entry[index].appBitfield, 224 DCBX_APP_SF_ETH_TYPE) && 225 ETH_TYPE_FCOE == entry[index].app_id) 226 bnx2x_dcbx_get_ap_priority(bp, 227 entry[index].pri_bitmap, 228 LLFC_TRAFFIC_TYPE_FCOE); 229 230 if (GET_FLAGS(entry[index].appBitfield, 231 DCBX_APP_SF_PORT) && 232 TCP_PORT_ISCSI == entry[index].app_id) 233 bnx2x_dcbx_get_ap_priority(bp, 234 entry[index].pri_bitmap, 235 LLFC_TRAFFIC_TYPE_ISCSI); 236 } 237 } else { 238 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n"); 239 bp->dcbx_port_params.app.enabled = false; 240 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 241 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY; 242 } 243 } 244 245 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, 246 struct dcbx_ets_feature *ets, 247 u32 error) { 248 int i = 0; 249 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0}; 250 struct pg_help_data pg_help_data; 251 struct bnx2x_dcbx_cos_params *cos_params = 252 bp->dcbx_port_params.ets.cos_params; 253 254 memset(&pg_help_data, 0, sizeof(struct pg_help_data)); 255 256 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR)) 257 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n"); 258 259 if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND)) 260 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n"); 261 262 /* Clean up old settings of ets on COS */ 263 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) { 264 cos_params[i].pauseable = false; 265 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID; 266 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW; 267 cos_params[i].pri_bitmask = 0; 268 } 269 270 if (bp->dcbx_port_params.app.enabled && ets->enabled && 271 !GET_FLAGS(error, 272 DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) { 273 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n"); 274 bp->dcbx_port_params.ets.enabled = true; 275 276 bnx2x_dcbx_get_ets_pri_pg_tbl(bp, 277 pg_pri_orginal_spread, 278 ets->pri_pg_tbl); 279 280 bnx2x_dcbx_get_num_pg_traf_type(bp, 281 pg_pri_orginal_spread, 282 &pg_help_data); 283 284 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data, 285 ets, pg_pri_orginal_spread); 286 287 } else { 288 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n"); 289 bp->dcbx_port_params.ets.enabled = false; 290 ets->pri_pg_tbl[0] = 0; 291 292 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++) 293 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1); 294 } 295 } 296 297 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp, 298 struct dcbx_pfc_feature *pfc, u32 error) 299 { 300 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR)) 301 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n"); 302 303 if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND)) 304 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n"); 305 if (bp->dcbx_port_params.app.enabled && pfc->enabled && 306 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH | 307 DCBX_REMOTE_PFC_TLV_NOT_FOUND)) { 308 bp->dcbx_port_params.pfc.enabled = true; 309 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 310 ~(pfc->pri_en_bitmap); 311 } else { 312 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n"); 313 bp->dcbx_port_params.pfc.enabled = false; 314 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0; 315 } 316 } 317 318 /* maps unmapped priorities to to the same COS as L2 */ 319 static void bnx2x_dcbx_map_nw(struct bnx2x *bp) 320 { 321 int i; 322 u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */ 323 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 324 u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW]; 325 struct bnx2x_dcbx_cos_params *cos_params = 326 bp->dcbx_port_params.ets.cos_params; 327 328 /* get unmapped priorities by clearing mapped bits */ 329 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 330 unmapped &= ~(1 << ttp[i]); 331 332 /* find cos for nw prio and extend it with unmapped */ 333 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) { 334 if (cos_params[i].pri_bitmask & nw_prio) { 335 /* extend the bitmask with unmapped */ 336 DP(BNX2X_MSG_DCB, 337 "cos %d extended with 0x%08x\n", i, unmapped); 338 cos_params[i].pri_bitmask |= unmapped; 339 break; 340 } 341 } 342 } 343 344 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp, 345 struct dcbx_features *features, 346 u32 error) 347 { 348 bnx2x_dcbx_get_ap_feature(bp, &features->app, error); 349 350 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error); 351 352 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error); 353 354 bnx2x_dcbx_map_nw(bp); 355 } 356 357 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100) 358 static int bnx2x_dcbx_read_mib(struct bnx2x *bp, 359 u32 *base_mib_addr, 360 u32 offset, 361 int read_mib_type) 362 { 363 int max_try_read = 0; 364 u32 mib_size, prefix_seq_num, suffix_seq_num; 365 struct lldp_remote_mib *remote_mib ; 366 struct lldp_local_mib *local_mib; 367 368 switch (read_mib_type) { 369 case DCBX_READ_LOCAL_MIB: 370 mib_size = sizeof(struct lldp_local_mib); 371 break; 372 case DCBX_READ_REMOTE_MIB: 373 mib_size = sizeof(struct lldp_remote_mib); 374 break; 375 default: 376 return 1; /*error*/ 377 } 378 379 offset += BP_PORT(bp) * mib_size; 380 381 do { 382 bnx2x_read_data(bp, base_mib_addr, offset, mib_size); 383 384 max_try_read++; 385 386 switch (read_mib_type) { 387 case DCBX_READ_LOCAL_MIB: 388 local_mib = (struct lldp_local_mib *) base_mib_addr; 389 prefix_seq_num = local_mib->prefix_seq_num; 390 suffix_seq_num = local_mib->suffix_seq_num; 391 break; 392 case DCBX_READ_REMOTE_MIB: 393 remote_mib = (struct lldp_remote_mib *) base_mib_addr; 394 prefix_seq_num = remote_mib->prefix_seq_num; 395 suffix_seq_num = remote_mib->suffix_seq_num; 396 break; 397 default: 398 return 1; /*error*/ 399 } 400 } while ((prefix_seq_num != suffix_seq_num) && 401 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ)); 402 403 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) { 404 BNX2X_ERR("MIB could not be read\n"); 405 return 1; 406 } 407 408 return 0; 409 } 410 411 static void bnx2x_pfc_set_pfc(struct bnx2x *bp) 412 { 413 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 414 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 415 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 416 417 if (bp->dcbx_port_params.pfc.enabled && 418 (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured)) 419 /* 420 * 1. Fills up common PFC structures if required 421 * 2. Configure NIG, MAC and BRB via the elink 422 */ 423 bnx2x_pfc_set(bp); 424 else 425 bnx2x_pfc_clear(bp); 426 } 427 428 int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp) 429 { 430 struct bnx2x_func_state_params func_params = {NULL}; 431 int rc; 432 433 func_params.f_obj = &bp->func_obj; 434 func_params.cmd = BNX2X_F_CMD_TX_STOP; 435 436 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 437 __set_bit(RAMROD_RETRY, &func_params.ramrod_flags); 438 439 DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n"); 440 441 rc = bnx2x_func_state_change(bp, &func_params); 442 if (rc) { 443 BNX2X_ERR("Unable to hold traffic for HW configuration\n"); 444 bnx2x_panic(); 445 } 446 447 return rc; 448 } 449 450 int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp) 451 { 452 struct bnx2x_func_state_params func_params = {NULL}; 453 struct bnx2x_func_tx_start_params *tx_params = 454 &func_params.params.tx_start; 455 int rc; 456 457 func_params.f_obj = &bp->func_obj; 458 func_params.cmd = BNX2X_F_CMD_TX_START; 459 460 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 461 __set_bit(RAMROD_RETRY, &func_params.ramrod_flags); 462 463 bnx2x_dcbx_fw_struct(bp, tx_params); 464 465 DP(BNX2X_MSG_DCB, "START TRAFFIC\n"); 466 467 rc = bnx2x_func_state_change(bp, &func_params); 468 if (rc) { 469 BNX2X_ERR("Unable to resume traffic after HW configuration\n"); 470 bnx2x_panic(); 471 } 472 473 return rc; 474 } 475 476 static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp) 477 { 478 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 479 int rc = 0; 480 481 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) { 482 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos); 483 return; 484 } 485 486 /* valid COS entries */ 487 if (ets->num_of_cos == 1) /* no ETS */ 488 return; 489 490 /* sanity */ 491 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) && 492 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) || 493 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) && 494 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) { 495 BNX2X_ERR("all COS should have at least bw_limit or strict" 496 "ets->cos_params[0].strict= %x" 497 "ets->cos_params[0].bw_tbl= %x" 498 "ets->cos_params[1].strict= %x" 499 "ets->cos_params[1].bw_tbl= %x", 500 ets->cos_params[0].strict, 501 ets->cos_params[0].bw_tbl, 502 ets->cos_params[1].strict, 503 ets->cos_params[1].bw_tbl); 504 return; 505 } 506 /* If we join a group and there is bw_tbl and strict then bw rules */ 507 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) && 508 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) { 509 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl; 510 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl; 511 /* Do not allow 0-100 configuration 512 * since PBF does not support it 513 * force 1-99 instead 514 */ 515 if (bw_tbl_0 == 0) { 516 bw_tbl_0 = 1; 517 bw_tbl_1 = 99; 518 } else if (bw_tbl_1 == 0) { 519 bw_tbl_1 = 1; 520 bw_tbl_0 = 99; 521 } 522 523 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1); 524 } else { 525 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST) 526 rc = bnx2x_ets_strict(&bp->link_params, 0); 527 else if (ets->cos_params[1].strict 528 == BNX2X_DCBX_STRICT_COS_HIGHEST) 529 rc = bnx2x_ets_strict(&bp->link_params, 1); 530 if (rc) 531 BNX2X_ERR("update_ets_params failed\n"); 532 } 533 } 534 535 /* 536 * In E3B0 the configuration may have more than 2 COS. 537 */ 538 static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp) 539 { 540 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 541 struct bnx2x_ets_params ets_params = { 0 }; 542 u8 i; 543 544 ets_params.num_of_cos = ets->num_of_cos; 545 546 for (i = 0; i < ets->num_of_cos; i++) { 547 /* COS is SP */ 548 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) { 549 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) { 550 BNX2X_ERR("COS can't be not BW and not SP\n"); 551 return; 552 } 553 554 ets_params.cos[i].state = bnx2x_cos_state_strict; 555 ets_params.cos[i].params.sp_params.pri = 556 ets->cos_params[i].strict; 557 } else { /* COS is BW */ 558 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) { 559 BNX2X_ERR("COS can't be not BW and not SP\n"); 560 return; 561 } 562 ets_params.cos[i].state = bnx2x_cos_state_bw; 563 ets_params.cos[i].params.bw_params.bw = 564 (u8)ets->cos_params[i].bw_tbl; 565 } 566 } 567 568 /* Configure the ETS in HW */ 569 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars, 570 &ets_params)) { 571 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n"); 572 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 573 } 574 } 575 576 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) 577 { 578 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 579 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 580 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 581 582 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 583 584 if (!bp->dcbx_port_params.ets.enabled || 585 ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)) 586 return; 587 588 if (CHIP_IS_E3B0(bp)) 589 bnx2x_dcbx_update_ets_config(bp); 590 else 591 bnx2x_dcbx_2cos_limit_update_ets_config(bp); 592 } 593 594 #ifdef BCM_DCBNL 595 static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp) 596 { 597 struct lldp_remote_mib remote_mib = {0}; 598 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset); 599 int rc; 600 601 DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n", 602 dcbx_remote_mib_offset); 603 604 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) { 605 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n"); 606 return -EINVAL; 607 } 608 609 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset, 610 DCBX_READ_REMOTE_MIB); 611 612 if (rc) { 613 BNX2X_ERR("Failed to read remote mib from FW\n"); 614 return rc; 615 } 616 617 /* save features and flags */ 618 bp->dcbx_remote_feat = remote_mib.features; 619 bp->dcbx_remote_flags = remote_mib.flags; 620 return 0; 621 } 622 #endif 623 624 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp) 625 { 626 struct lldp_local_mib local_mib = {0}; 627 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset); 628 int rc; 629 630 DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset); 631 632 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) { 633 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n"); 634 return -EINVAL; 635 } 636 637 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset, 638 DCBX_READ_LOCAL_MIB); 639 640 if (rc) { 641 BNX2X_ERR("Failed to read local mib from FW\n"); 642 return rc; 643 } 644 645 /* save features and error */ 646 bp->dcbx_local_feat = local_mib.features; 647 bp->dcbx_error = local_mib.error; 648 return 0; 649 } 650 651 #ifdef BCM_DCBNL 652 static inline 653 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent) 654 { 655 u8 pri; 656 657 /* Choose the highest priority */ 658 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--) 659 if (ent->pri_bitmap & (1 << pri)) 660 break; 661 return pri; 662 } 663 664 static inline 665 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent) 666 { 667 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) == 668 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM : 669 DCB_APP_IDTYPE_ETHTYPE; 670 } 671 672 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall) 673 { 674 int i, err = 0; 675 676 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) { 677 struct dcbx_app_priority_entry *ent = 678 &bp->dcbx_local_feat.app.app_pri_tbl[i]; 679 680 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 681 u8 up = bnx2x_dcbx_dcbnl_app_up(ent); 682 683 /* avoid invalid user-priority */ 684 if (up) { 685 struct dcb_app app; 686 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 687 app.protocol = ent->app_id; 688 app.priority = delall ? 0 : up; 689 err = dcb_setapp(bp->dev, &app); 690 } 691 } 692 } 693 return err; 694 } 695 #endif 696 697 static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp) 698 { 699 u8 prio, cos; 700 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) { 701 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) { 702 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask 703 & (1 << prio)) { 704 bp->prio_to_cos[prio] = cos; 705 DP(BNX2X_MSG_DCB, 706 "tx_mapping %d --> %d\n", prio, cos); 707 } 708 } 709 } 710 711 /* setup tc must be called under rtnl lock, but we can't take it here 712 * as we are handling an attention on a work queue which must be 713 * flushed at some rtnl-locked contexts (e.g. if down) 714 */ 715 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_SETUP_TC, 0); 716 } 717 718 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) 719 { 720 switch (state) { 721 case BNX2X_DCBX_STATE_NEG_RECEIVED: 722 { 723 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n"); 724 #ifdef BCM_DCBNL 725 /** 726 * Delete app tlvs from dcbnl before reading new 727 * negotiation results 728 */ 729 bnx2x_dcbnl_update_applist(bp, true); 730 731 /* Read remote mib if dcbx is in the FW */ 732 if (bnx2x_dcbx_read_shmem_remote_mib(bp)) 733 return; 734 #endif 735 /* Read neg results if dcbx is in the FW */ 736 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 737 return; 738 739 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 740 bp->dcbx_error); 741 742 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 743 bp->dcbx_error); 744 745 /* mark DCBX result for PMF migration */ 746 bnx2x_update_drv_flags(bp, 747 1 << DRV_FLAGS_DCB_CONFIGURED, 748 1); 749 #ifdef BCM_DCBNL 750 /* 751 * Add new app tlvs to dcbnl 752 */ 753 bnx2x_dcbnl_update_applist(bp, false); 754 #endif 755 /* 756 * reconfigure the netdevice with the results of the new 757 * dcbx negotiation. 758 */ 759 bnx2x_dcbx_update_tc_mapping(bp); 760 761 /* 762 * allow other functions to update their netdevices 763 * accordingly 764 */ 765 if (IS_MF(bp)) 766 bnx2x_link_sync_notify(bp); 767 768 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_TX_STOP, 0); 769 return; 770 } 771 case BNX2X_DCBX_STATE_TX_PAUSED: 772 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n"); 773 bnx2x_pfc_set_pfc(bp); 774 775 bnx2x_dcbx_update_ets_params(bp); 776 777 /* ets may affect cmng configuration: reinit it in hw */ 778 bnx2x_set_local_cmng(bp); 779 return; 780 case BNX2X_DCBX_STATE_TX_RELEASED: 781 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n"); 782 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0); 783 #ifdef BCM_DCBNL 784 /* 785 * Send a notification for the new negotiated parameters 786 */ 787 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 788 #endif 789 return; 790 default: 791 BNX2X_ERR("Unknown DCBX_STATE\n"); 792 } 793 } 794 795 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \ 796 BP_PORT(bp)*sizeof(struct lldp_admin_mib)) 797 798 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, 799 u32 dcbx_lldp_params_offset) 800 { 801 struct lldp_admin_mib admin_mib; 802 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0; 803 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp); 804 805 /*shortcuts*/ 806 struct dcbx_features *af = &admin_mib.features; 807 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params; 808 809 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib)); 810 811 /* Read the data first */ 812 bnx2x_read_data(bp, (u32 *)&admin_mib, offset, 813 sizeof(struct lldp_admin_mib)); 814 815 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON) 816 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 817 else 818 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 819 820 if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) { 821 822 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK); 823 admin_mib.ver_cfg_flags |= 824 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) & 825 DCBX_CEE_VERSION_MASK; 826 827 af->ets.enabled = (u8)dp->admin_ets_enable; 828 829 af->pfc.enabled = (u8)dp->admin_pfc_enable; 830 831 /* FOR IEEE dp->admin_tc_supported_tx_enable */ 832 if (dp->admin_ets_configuration_tx_enable) 833 SET_FLAGS(admin_mib.ver_cfg_flags, 834 DCBX_ETS_CONFIG_TX_ENABLED); 835 else 836 RESET_FLAGS(admin_mib.ver_cfg_flags, 837 DCBX_ETS_CONFIG_TX_ENABLED); 838 /* For IEEE admin_ets_recommendation_tx_enable */ 839 if (dp->admin_pfc_tx_enable) 840 SET_FLAGS(admin_mib.ver_cfg_flags, 841 DCBX_PFC_CONFIG_TX_ENABLED); 842 else 843 RESET_FLAGS(admin_mib.ver_cfg_flags, 844 DCBX_PFC_CONFIG_TX_ENABLED); 845 846 if (dp->admin_application_priority_tx_enable) 847 SET_FLAGS(admin_mib.ver_cfg_flags, 848 DCBX_APP_CONFIG_TX_ENABLED); 849 else 850 RESET_FLAGS(admin_mib.ver_cfg_flags, 851 DCBX_APP_CONFIG_TX_ENABLED); 852 853 if (dp->admin_ets_willing) 854 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 855 else 856 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 857 /* For IEEE admin_ets_reco_valid */ 858 if (dp->admin_pfc_willing) 859 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 860 else 861 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 862 863 if (dp->admin_app_priority_willing) 864 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 865 else 866 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 867 868 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) { 869 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i, 870 (u8)dp->admin_configuration_bw_precentage[i]); 871 872 DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n", 873 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i)); 874 } 875 876 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 877 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i, 878 (u8)dp->admin_configuration_ets_pg[i]); 879 880 DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n", 881 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i)); 882 } 883 884 /*For IEEE admin_recommendation_bw_percentage 885 *For IEEE admin_recommendation_ets_pg */ 886 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap; 887 for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 888 if (dp->admin_priority_app_table[i].valid) { 889 struct bnx2x_admin_priority_app_table *table = 890 dp->admin_priority_app_table; 891 if ((ETH_TYPE_FCOE == table[i].app_id) && 892 (TRAFFIC_TYPE_ETH == table[i].traffic_type)) 893 traf_type = FCOE_APP_IDX; 894 else if ((TCP_PORT_ISCSI == table[i].app_id) && 895 (TRAFFIC_TYPE_PORT == table[i].traffic_type)) 896 traf_type = ISCSI_APP_IDX; 897 else 898 traf_type = other_traf_type++; 899 900 af->app.app_pri_tbl[traf_type].app_id = 901 table[i].app_id; 902 903 af->app.app_pri_tbl[traf_type].pri_bitmap = 904 (u8)(1 << table[i].priority); 905 906 af->app.app_pri_tbl[traf_type].appBitfield = 907 (DCBX_APP_ENTRY_VALID); 908 909 af->app.app_pri_tbl[traf_type].appBitfield |= 910 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ? 911 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT; 912 } 913 } 914 915 af->app.default_pri = (u8)dp->admin_default_priority; 916 } 917 918 /* Write the data. */ 919 bnx2x_write_data(bp, (u32 *)&admin_mib, offset, 920 sizeof(struct lldp_admin_mib)); 921 } 922 923 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled) 924 { 925 if (!CHIP_IS_E1x(bp)) { 926 bp->dcb_state = dcb_on; 927 bp->dcbx_enabled = dcbx_enabled; 928 } else { 929 bp->dcb_state = false; 930 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID; 931 } 932 DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n", 933 dcb_on ? "ON" : "OFF", 934 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" : 935 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" : 936 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ? 937 "on-chip with negotiation" : "invalid"); 938 } 939 940 void bnx2x_dcbx_init_params(struct bnx2x *bp) 941 { 942 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */ 943 bp->dcbx_config_params.admin_ets_willing = 1; 944 bp->dcbx_config_params.admin_pfc_willing = 1; 945 bp->dcbx_config_params.overwrite_settings = 1; 946 bp->dcbx_config_params.admin_ets_enable = 1; 947 bp->dcbx_config_params.admin_pfc_enable = 1; 948 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1; 949 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 950 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 951 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 952 bp->dcbx_config_params.admin_ets_reco_valid = 1; 953 bp->dcbx_config_params.admin_app_priority_willing = 1; 954 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100; 955 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0; 956 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0; 957 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0; 958 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0; 959 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0; 960 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0; 961 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0; 962 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0; 963 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0; 964 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0; 965 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0; 966 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0; 967 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0; 968 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0; 969 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0; 970 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100; 971 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0; 972 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0; 973 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0; 974 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0; 975 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0; 976 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0; 977 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0; 978 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0; 979 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1; 980 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2; 981 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3; 982 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4; 983 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5; 984 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6; 985 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7; 986 bp->dcbx_config_params.admin_pfc_bitmap = 0x0; 987 bp->dcbx_config_params.admin_priority_app_table[0].valid = 0; 988 bp->dcbx_config_params.admin_priority_app_table[1].valid = 0; 989 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0; 990 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0; 991 bp->dcbx_config_params.admin_default_priority = 0; 992 } 993 994 void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem) 995 { 996 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE; 997 998 /* only PMF can send ADMIN msg to MFW in old MFW versions */ 999 if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF))) 1000 return; 1001 1002 if (bp->dcbx_enabled <= 0) 1003 return; 1004 1005 /* validate: 1006 * chip of good for dcbx version, 1007 * dcb is wanted 1008 * shmem2 contains DCBX support fields 1009 */ 1010 DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n", 1011 bp->dcb_state, bp->port.pmf); 1012 1013 if (bp->dcb_state == BNX2X_DCB_STATE_ON && 1014 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) { 1015 dcbx_lldp_params_offset = 1016 SHMEM2_RD(bp, dcbx_lldp_params_offset); 1017 1018 DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n", 1019 dcbx_lldp_params_offset); 1020 1021 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0); 1022 1023 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) { 1024 /* need HW lock to avoid scenario of two drivers 1025 * writing in parallel to shmem 1026 */ 1027 bnx2x_acquire_hw_lock(bp, 1028 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1029 if (update_shmem) 1030 bnx2x_dcbx_admin_mib_updated_params(bp, 1031 dcbx_lldp_params_offset); 1032 1033 /* Let HW start negotiation */ 1034 bnx2x_fw_command(bp, 1035 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0); 1036 /* release HW lock only after MFW acks that it finished 1037 * reading values from shmem 1038 */ 1039 bnx2x_release_hw_lock(bp, 1040 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1041 } 1042 } 1043 } 1044 static void 1045 bnx2x_dcbx_print_cos_params(struct bnx2x *bp, 1046 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1047 { 1048 u8 pri = 0; 1049 u8 cos = 0; 1050 1051 DP(BNX2X_MSG_DCB, 1052 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version); 1053 DP(BNX2X_MSG_DCB, 1054 "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n", 1055 bp->dcbx_port_params.pfc.priority_non_pauseable_mask); 1056 1057 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) { 1058 DP(BNX2X_MSG_DCB, 1059 "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n", 1060 cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask); 1061 1062 DP(BNX2X_MSG_DCB, 1063 "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n", 1064 cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl); 1065 1066 DP(BNX2X_MSG_DCB, 1067 "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n", 1068 cos, bp->dcbx_port_params.ets.cos_params[cos].strict); 1069 1070 DP(BNX2X_MSG_DCB, 1071 "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n", 1072 cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable); 1073 } 1074 1075 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1076 DP(BNX2X_MSG_DCB, 1077 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n", 1078 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority); 1079 1080 DP(BNX2X_MSG_DCB, 1081 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n", 1082 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos); 1083 } 1084 } 1085 1086 /* fills help_data according to pg_info */ 1087 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 1088 u32 *pg_pri_orginal_spread, 1089 struct pg_help_data *help_data) 1090 { 1091 bool pg_found = false; 1092 u32 i, traf_type, add_traf_type, add_pg; 1093 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1094 struct pg_entry_help_data *data = help_data->data; /*shortcut*/ 1095 1096 /* Set to invalid */ 1097 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 1098 data[i].pg = DCBX_ILLEGAL_PG; 1099 1100 for (add_traf_type = 0; 1101 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) { 1102 pg_found = false; 1103 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) { 1104 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]]; 1105 for (traf_type = 0; 1106 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1107 traf_type++) { 1108 if (data[traf_type].pg == add_pg) { 1109 if (!(data[traf_type].pg_priority & 1110 (1 << ttp[add_traf_type]))) 1111 data[traf_type]. 1112 num_of_dif_pri++; 1113 data[traf_type].pg_priority |= 1114 (1 << ttp[add_traf_type]); 1115 pg_found = true; 1116 break; 1117 } 1118 } 1119 if (false == pg_found) { 1120 data[help_data->num_of_pg].pg = add_pg; 1121 data[help_data->num_of_pg].pg_priority = 1122 (1 << ttp[add_traf_type]); 1123 data[help_data->num_of_pg].num_of_dif_pri = 1; 1124 help_data->num_of_pg++; 1125 } 1126 } 1127 DP(BNX2X_MSG_DCB, 1128 "add_traf_type %d pg_found %s num_of_pg %d\n", 1129 add_traf_type, (false == pg_found) ? "NO" : "YES", 1130 help_data->num_of_pg); 1131 } 1132 } 1133 1134 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp, 1135 struct cos_help_data *cos_data, 1136 u32 pri_join_mask) 1137 { 1138 /* Only one priority than only one COS */ 1139 cos_data->data[0].pausable = 1140 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1141 cos_data->data[0].pri_join_mask = pri_join_mask; 1142 cos_data->data[0].cos_bw = 100; 1143 cos_data->num_of_cos = 1; 1144 } 1145 1146 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp, 1147 struct cos_entry_help_data *data, 1148 u8 pg_bw) 1149 { 1150 if (data->cos_bw == DCBX_INVALID_COS_BW) 1151 data->cos_bw = pg_bw; 1152 else 1153 data->cos_bw += pg_bw; 1154 } 1155 1156 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 1157 struct cos_help_data *cos_data, 1158 u32 *pg_pri_orginal_spread, 1159 struct dcbx_ets_feature *ets) 1160 { 1161 u32 pri_tested = 0; 1162 u8 i = 0; 1163 u8 entry = 0; 1164 u8 pg_entry = 0; 1165 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1166 1167 cos_data->data[0].pausable = true; 1168 cos_data->data[1].pausable = false; 1169 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1170 1171 for (i = 0 ; i < num_of_pri ; i++) { 1172 pri_tested = 1 << bp->dcbx_port_params. 1173 app.traffic_type_priority[i]; 1174 1175 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) { 1176 cos_data->data[1].pri_join_mask |= pri_tested; 1177 entry = 1; 1178 } else { 1179 cos_data->data[0].pri_join_mask |= pri_tested; 1180 entry = 0; 1181 } 1182 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params. 1183 app.traffic_type_priority[i]]; 1184 /* There can be only one strict pg */ 1185 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) 1186 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry], 1187 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry)); 1188 else 1189 /* If we join a group and one is strict 1190 * than the bw rules 1191 */ 1192 cos_data->data[entry].strict = 1193 BNX2X_DCBX_STRICT_COS_HIGHEST; 1194 } 1195 if ((0 == cos_data->data[0].pri_join_mask) && 1196 (0 == cos_data->data[1].pri_join_mask)) 1197 BNX2X_ERR("dcbx error: Both groups must have priorities\n"); 1198 } 1199 1200 #ifndef POWER_OF_2 1201 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) 1202 #endif 1203 1204 static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp, 1205 struct pg_help_data *pg_help_data, 1206 struct cos_help_data *cos_data, 1207 u32 pri_join_mask, 1208 u8 num_of_dif_pri) 1209 { 1210 u8 i = 0; 1211 u32 pri_tested = 0; 1212 u32 pri_mask_without_pri = 0; 1213 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1214 /*debug*/ 1215 if (num_of_dif_pri == 1) { 1216 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask); 1217 return; 1218 } 1219 /* single priority group */ 1220 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1221 /* If there are both pauseable and non-pauseable priorities, 1222 * the pauseable priorities go to the first queue and 1223 * the non-pauseable priorities go to the second queue. 1224 */ 1225 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1226 /* Pauseable */ 1227 cos_data->data[0].pausable = true; 1228 /* Non pauseable.*/ 1229 cos_data->data[1].pausable = false; 1230 1231 if (2 == num_of_dif_pri) { 1232 cos_data->data[0].cos_bw = 50; 1233 cos_data->data[1].cos_bw = 50; 1234 } 1235 1236 if (3 == num_of_dif_pri) { 1237 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp, 1238 pri_join_mask))) { 1239 cos_data->data[0].cos_bw = 33; 1240 cos_data->data[1].cos_bw = 67; 1241 } else { 1242 cos_data->data[0].cos_bw = 67; 1243 cos_data->data[1].cos_bw = 33; 1244 } 1245 } 1246 1247 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) { 1248 /* If there are only pauseable priorities, 1249 * then one/two priorities go to the first queue 1250 * and one priority goes to the second queue. 1251 */ 1252 if (2 == num_of_dif_pri) { 1253 cos_data->data[0].cos_bw = 50; 1254 cos_data->data[1].cos_bw = 50; 1255 } else { 1256 cos_data->data[0].cos_bw = 67; 1257 cos_data->data[1].cos_bw = 33; 1258 } 1259 cos_data->data[1].pausable = true; 1260 cos_data->data[0].pausable = true; 1261 /* All priorities except FCOE */ 1262 cos_data->data[0].pri_join_mask = (pri_join_mask & 1263 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]))); 1264 /* Only FCOE priority.*/ 1265 cos_data->data[1].pri_join_mask = 1266 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]); 1267 } else 1268 /* If there are only non-pauseable priorities, 1269 * they will all go to the same queue. 1270 */ 1271 bnx2x_dcbx_ets_disabled_entry_data(bp, 1272 cos_data, pri_join_mask); 1273 } else { 1274 /* priority group which is not BW limited (PG#15):*/ 1275 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1276 /* If there are both pauseable and non-pauseable 1277 * priorities, the pauseable priorities go to the first 1278 * queue and the non-pauseable priorities 1279 * go to the second queue. 1280 */ 1281 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) > 1282 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) { 1283 cos_data->data[0].strict = 1284 BNX2X_DCBX_STRICT_COS_HIGHEST; 1285 cos_data->data[1].strict = 1286 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1287 BNX2X_DCBX_STRICT_COS_HIGHEST); 1288 } else { 1289 cos_data->data[0].strict = 1290 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1291 BNX2X_DCBX_STRICT_COS_HIGHEST); 1292 cos_data->data[1].strict = 1293 BNX2X_DCBX_STRICT_COS_HIGHEST; 1294 } 1295 /* Pauseable */ 1296 cos_data->data[0].pausable = true; 1297 /* Non pause-able.*/ 1298 cos_data->data[1].pausable = false; 1299 } else { 1300 /* If there are only pauseable priorities or 1301 * only non-pauseable,* the lower priorities go 1302 * to the first queue and the higher priorities go 1303 * to the second queue. 1304 */ 1305 cos_data->data[0].pausable = 1306 cos_data->data[1].pausable = 1307 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1308 1309 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) { 1310 pri_tested = 1 << bp->dcbx_port_params. 1311 app.traffic_type_priority[i]; 1312 /* Remove priority tested */ 1313 pri_mask_without_pri = 1314 (pri_join_mask & ((u8)(~pri_tested))); 1315 if (pri_mask_without_pri < pri_tested) 1316 break; 1317 } 1318 1319 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX) 1320 BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n"); 1321 1322 cos_data->data[0].pri_join_mask = pri_mask_without_pri; 1323 cos_data->data[1].pri_join_mask = pri_tested; 1324 /* Both queues are strict priority, 1325 * and that with the highest priority 1326 * gets the highest strict priority in the arbiter. 1327 */ 1328 cos_data->data[0].strict = 1329 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1330 BNX2X_DCBX_STRICT_COS_HIGHEST); 1331 cos_data->data[1].strict = 1332 BNX2X_DCBX_STRICT_COS_HIGHEST; 1333 } 1334 } 1335 } 1336 1337 static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1338 struct bnx2x *bp, 1339 struct pg_help_data *pg_help_data, 1340 struct dcbx_ets_feature *ets, 1341 struct cos_help_data *cos_data, 1342 u32 *pg_pri_orginal_spread, 1343 u32 pri_join_mask, 1344 u8 num_of_dif_pri) 1345 { 1346 u8 i = 0; 1347 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 }; 1348 1349 /* If there are both pauseable and non-pauseable priorities, 1350 * the pauseable priorities go to the first queue and 1351 * the non-pauseable priorities go to the second queue. 1352 */ 1353 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1354 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1355 pg_help_data->data[0].pg_priority) || 1356 IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1357 pg_help_data->data[1].pg_priority)) { 1358 /* If one PG contains both pauseable and 1359 * non-pauseable priorities then ETS is disabled. 1360 */ 1361 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data, 1362 pg_pri_orginal_spread, ets); 1363 bp->dcbx_port_params.ets.enabled = false; 1364 return; 1365 } 1366 1367 /* Pauseable */ 1368 cos_data->data[0].pausable = true; 1369 /* Non pauseable. */ 1370 cos_data->data[1].pausable = false; 1371 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, 1372 pg_help_data->data[0].pg_priority)) { 1373 /* 0 is pauseable */ 1374 cos_data->data[0].pri_join_mask = 1375 pg_help_data->data[0].pg_priority; 1376 pg[0] = pg_help_data->data[0].pg; 1377 cos_data->data[1].pri_join_mask = 1378 pg_help_data->data[1].pg_priority; 1379 pg[1] = pg_help_data->data[1].pg; 1380 } else {/* 1 is pauseable */ 1381 cos_data->data[0].pri_join_mask = 1382 pg_help_data->data[1].pg_priority; 1383 pg[0] = pg_help_data->data[1].pg; 1384 cos_data->data[1].pri_join_mask = 1385 pg_help_data->data[0].pg_priority; 1386 pg[1] = pg_help_data->data[0].pg; 1387 } 1388 } else { 1389 /* If there are only pauseable priorities or 1390 * only non-pauseable, each PG goes to a queue. 1391 */ 1392 cos_data->data[0].pausable = cos_data->data[1].pausable = 1393 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1394 cos_data->data[0].pri_join_mask = 1395 pg_help_data->data[0].pg_priority; 1396 pg[0] = pg_help_data->data[0].pg; 1397 cos_data->data[1].pri_join_mask = 1398 pg_help_data->data[1].pg_priority; 1399 pg[1] = pg_help_data->data[1].pg; 1400 } 1401 1402 /* There can be only one strict pg */ 1403 for (i = 0 ; i < ARRAY_SIZE(pg); i++) { 1404 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES) 1405 cos_data->data[i].cos_bw = 1406 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]); 1407 else 1408 cos_data->data[i].strict = 1409 BNX2X_DCBX_STRICT_COS_HIGHEST; 1410 } 1411 } 1412 1413 static int bnx2x_dcbx_join_pgs( 1414 struct bnx2x *bp, 1415 struct dcbx_ets_feature *ets, 1416 struct pg_help_data *pg_help_data, 1417 u8 required_num_of_pg) 1418 { 1419 u8 entry_joined = pg_help_data->num_of_pg - 1; 1420 u8 entry_removed = entry_joined + 1; 1421 u8 pg_joined = 0; 1422 1423 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data) 1424 <= pg_help_data->num_of_pg) { 1425 1426 BNX2X_ERR("required_num_of_pg can't be zero\n"); 1427 return -EINVAL; 1428 } 1429 1430 while (required_num_of_pg < pg_help_data->num_of_pg) { 1431 entry_joined = pg_help_data->num_of_pg - 2; 1432 entry_removed = entry_joined + 1; 1433 /* protect index */ 1434 entry_removed %= ARRAY_SIZE(pg_help_data->data); 1435 1436 pg_help_data->data[entry_joined].pg_priority |= 1437 pg_help_data->data[entry_removed].pg_priority; 1438 1439 pg_help_data->data[entry_joined].num_of_dif_pri += 1440 pg_help_data->data[entry_removed].num_of_dif_pri; 1441 1442 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG || 1443 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG) 1444 /* Entries joined strict priority rules */ 1445 pg_help_data->data[entry_joined].pg = 1446 DCBX_STRICT_PRI_PG; 1447 else { 1448 /* Entries can be joined join BW */ 1449 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl, 1450 pg_help_data->data[entry_joined].pg) + 1451 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1452 pg_help_data->data[entry_removed].pg); 1453 1454 DCBX_PG_BW_SET(ets->pg_bw_tbl, 1455 pg_help_data->data[entry_joined].pg, pg_joined); 1456 } 1457 /* Joined the entries */ 1458 pg_help_data->num_of_pg--; 1459 } 1460 1461 return 0; 1462 } 1463 1464 static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1465 struct bnx2x *bp, 1466 struct pg_help_data *pg_help_data, 1467 struct dcbx_ets_feature *ets, 1468 struct cos_help_data *cos_data, 1469 u32 *pg_pri_orginal_spread, 1470 u32 pri_join_mask, 1471 u8 num_of_dif_pri) 1472 { 1473 u8 i = 0; 1474 u32 pri_tested = 0; 1475 u8 entry = 0; 1476 u8 pg_entry = 0; 1477 bool b_found_strict = false; 1478 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1479 1480 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1481 /* If there are both pauseable and non-pauseable priorities, 1482 * the pauseable priorities go to the first queue and the 1483 * non-pauseable priorities go to the second queue. 1484 */ 1485 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) 1486 bnx2x_dcbx_separate_pauseable_from_non(bp, 1487 cos_data, pg_pri_orginal_spread, ets); 1488 else { 1489 /* If two BW-limited PG-s were combined to one queue, 1490 * the BW is their sum. 1491 * 1492 * If there are only pauseable priorities or only non-pauseable, 1493 * and there are both BW-limited and non-BW-limited PG-s, 1494 * the BW-limited PG/s go to one queue and the non-BW-limited 1495 * PG/s go to the second queue. 1496 * 1497 * If there are only pauseable priorities or only non-pauseable 1498 * and all are BW limited, then two priorities go to the first 1499 * queue and one priority goes to the second queue. 1500 * 1501 * We will join this two cases: 1502 * if one is BW limited it will go to the second queue 1503 * otherwise the last priority will get it 1504 */ 1505 1506 cos_data->data[0].pausable = cos_data->data[1].pausable = 1507 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1508 1509 for (i = 0 ; i < num_of_pri; i++) { 1510 pri_tested = 1 << bp->dcbx_port_params. 1511 app.traffic_type_priority[i]; 1512 pg_entry = (u8)pg_pri_orginal_spread[bp-> 1513 dcbx_port_params.app.traffic_type_priority[i]]; 1514 1515 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1516 entry = 0; 1517 1518 if (i == (num_of_pri-1) && 1519 false == b_found_strict) 1520 /* last entry will be handled separately 1521 * If no priority is strict than last 1522 * entry goes to last queue. 1523 */ 1524 entry = 1; 1525 cos_data->data[entry].pri_join_mask |= 1526 pri_tested; 1527 bnx2x_dcbx_add_to_cos_bw(bp, 1528 &cos_data->data[entry], 1529 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1530 pg_entry)); 1531 } else { 1532 b_found_strict = true; 1533 cos_data->data[1].pri_join_mask |= pri_tested; 1534 /* If we join a group and one is strict 1535 * than the bw rules 1536 */ 1537 cos_data->data[1].strict = 1538 BNX2X_DCBX_STRICT_COS_HIGHEST; 1539 } 1540 } 1541 } 1542 } 1543 1544 static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, 1545 struct pg_help_data *help_data, 1546 struct dcbx_ets_feature *ets, 1547 struct cos_help_data *cos_data, 1548 u32 *pg_pri_orginal_spread, 1549 u32 pri_join_mask, 1550 u8 num_of_dif_pri) 1551 { 1552 /* default E2 settings */ 1553 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2; 1554 1555 switch (help_data->num_of_pg) { 1556 case 1: 1557 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params( 1558 bp, 1559 help_data, 1560 cos_data, 1561 pri_join_mask, 1562 num_of_dif_pri); 1563 break; 1564 case 2: 1565 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1566 bp, 1567 help_data, 1568 ets, 1569 cos_data, 1570 pg_pri_orginal_spread, 1571 pri_join_mask, 1572 num_of_dif_pri); 1573 break; 1574 1575 case 3: 1576 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1577 bp, 1578 help_data, 1579 ets, 1580 cos_data, 1581 pg_pri_orginal_spread, 1582 pri_join_mask, 1583 num_of_dif_pri); 1584 break; 1585 default: 1586 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n"); 1587 bnx2x_dcbx_ets_disabled_entry_data(bp, 1588 cos_data, pri_join_mask); 1589 } 1590 } 1591 1592 static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp, 1593 struct cos_help_data *cos_data, 1594 u8 entry, 1595 u8 num_spread_of_entries, 1596 u8 strict_app_pris) 1597 { 1598 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST; 1599 u8 num_of_app_pri = MAX_PFC_PRIORITIES; 1600 u8 app_pri_bit = 0; 1601 1602 while (num_spread_of_entries && num_of_app_pri > 0) { 1603 app_pri_bit = 1 << (num_of_app_pri - 1); 1604 if (app_pri_bit & strict_app_pris) { 1605 struct cos_entry_help_data *data = &cos_data-> 1606 data[entry]; 1607 num_spread_of_entries--; 1608 if (num_spread_of_entries == 0) { 1609 /* last entry needed put all the entries left */ 1610 data->cos_bw = DCBX_INVALID_COS_BW; 1611 data->strict = strict_pri; 1612 data->pri_join_mask = strict_app_pris; 1613 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1614 data->pri_join_mask); 1615 } else { 1616 strict_app_pris &= ~app_pri_bit; 1617 1618 data->cos_bw = DCBX_INVALID_COS_BW; 1619 data->strict = strict_pri; 1620 data->pri_join_mask = app_pri_bit; 1621 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1622 data->pri_join_mask); 1623 } 1624 1625 strict_pri = 1626 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri); 1627 entry++; 1628 } 1629 1630 num_of_app_pri--; 1631 } 1632 1633 if (num_spread_of_entries) { 1634 BNX2X_ERR("Didn't succeed to spread strict priorities\n"); 1635 return -EINVAL; 1636 } 1637 1638 return 0; 1639 } 1640 1641 static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp, 1642 struct cos_help_data *cos_data, 1643 u8 entry, 1644 u8 num_spread_of_entries, 1645 u8 strict_app_pris) 1646 { 1647 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry, 1648 num_spread_of_entries, 1649 strict_app_pris)) { 1650 struct cos_entry_help_data *data = &cos_data-> 1651 data[entry]; 1652 /* Fill BW entry */ 1653 data->cos_bw = DCBX_INVALID_COS_BW; 1654 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST; 1655 data->pri_join_mask = strict_app_pris; 1656 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1657 data->pri_join_mask); 1658 return 1; 1659 } 1660 1661 return num_spread_of_entries; 1662 } 1663 1664 static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp, 1665 struct pg_help_data *help_data, 1666 struct dcbx_ets_feature *ets, 1667 struct cos_help_data *cos_data, 1668 u32 pri_join_mask) 1669 1670 { 1671 u8 need_num_of_entries = 0; 1672 u8 i = 0; 1673 u8 entry = 0; 1674 1675 /* 1676 * if the number of requested PG-s in CEE is greater than 3 1677 * then the results are not determined since this is a violation 1678 * of the standard. 1679 */ 1680 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) { 1681 if (bnx2x_dcbx_join_pgs(bp, ets, help_data, 1682 DCBX_COS_MAX_NUM_E3B0)) { 1683 BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n"); 1684 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, 1685 pri_join_mask); 1686 return; 1687 } 1688 } 1689 1690 for (i = 0 ; i < help_data->num_of_pg; i++) { 1691 struct pg_entry_help_data *pg = &help_data->data[i]; 1692 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1693 struct cos_entry_help_data *data = &cos_data-> 1694 data[entry]; 1695 /* Fill BW entry */ 1696 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg); 1697 data->strict = BNX2X_DCBX_STRICT_INVALID; 1698 data->pri_join_mask = pg->pg_priority; 1699 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1700 data->pri_join_mask); 1701 1702 entry++; 1703 } else { 1704 need_num_of_entries = min_t(u8, 1705 (u8)pg->num_of_dif_pri, 1706 (u8)DCBX_COS_MAX_NUM_E3B0 - 1707 help_data->num_of_pg + 1); 1708 /* 1709 * If there are still VOQ-s which have no associated PG, 1710 * then associate these VOQ-s to PG15. These PG-s will 1711 * be used for SP between priorities on PG15. 1712 */ 1713 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data, 1714 entry, need_num_of_entries, pg->pg_priority); 1715 } 1716 } 1717 1718 /* the entry will represent the number of COSes used */ 1719 cos_data->num_of_cos = entry; 1720 } 1721 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 1722 struct pg_help_data *help_data, 1723 struct dcbx_ets_feature *ets, 1724 u32 *pg_pri_orginal_spread) 1725 { 1726 struct cos_help_data cos_data; 1727 u8 i = 0; 1728 u32 pri_join_mask = 0; 1729 u8 num_of_dif_pri = 0; 1730 1731 memset(&cos_data, 0, sizeof(cos_data)); 1732 1733 /* Validate the pg value */ 1734 for (i = 0; i < help_data->num_of_pg ; i++) { 1735 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg && 1736 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg) 1737 BNX2X_ERR("Invalid pg[%d] data %x\n", i, 1738 help_data->data[i].pg); 1739 pri_join_mask |= help_data->data[i].pg_priority; 1740 num_of_dif_pri += help_data->data[i].num_of_dif_pri; 1741 } 1742 1743 /* defaults */ 1744 cos_data.num_of_cos = 1; 1745 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) { 1746 cos_data.data[i].pri_join_mask = 0; 1747 cos_data.data[i].pausable = false; 1748 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID; 1749 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW; 1750 } 1751 1752 if (CHIP_IS_E3B0(bp)) 1753 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets, 1754 &cos_data, pri_join_mask); 1755 else /* E2 + E3A0 */ 1756 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp, 1757 help_data, ets, 1758 &cos_data, 1759 pg_pri_orginal_spread, 1760 pri_join_mask, 1761 num_of_dif_pri); 1762 1763 for (i = 0; i < cos_data.num_of_cos ; i++) { 1764 struct bnx2x_dcbx_cos_params *p = 1765 &bp->dcbx_port_params.ets.cos_params[i]; 1766 1767 p->strict = cos_data.data[i].strict; 1768 p->bw_tbl = cos_data.data[i].cos_bw; 1769 p->pri_bitmask = cos_data.data[i].pri_join_mask; 1770 p->pauseable = cos_data.data[i].pausable; 1771 1772 /* sanity */ 1773 if (p->bw_tbl != DCBX_INVALID_COS_BW || 1774 p->strict != BNX2X_DCBX_STRICT_INVALID) { 1775 if (p->pri_bitmask == 0) 1776 BNX2X_ERR("Invalid pri_bitmask for %d\n", i); 1777 1778 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) { 1779 1780 if (p->pauseable && 1781 DCBX_PFC_PRI_GET_NON_PAUSE(bp, 1782 p->pri_bitmask) != 0) 1783 BNX2X_ERR("Inconsistent config for pausable COS %d\n", 1784 i); 1785 1786 if (!p->pauseable && 1787 DCBX_PFC_PRI_GET_PAUSE(bp, 1788 p->pri_bitmask) != 0) 1789 BNX2X_ERR("Inconsistent config for nonpausable COS %d\n", 1790 i); 1791 } 1792 } 1793 1794 if (p->pauseable) 1795 DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n", 1796 i, cos_data.data[i].pri_join_mask); 1797 else 1798 DP(BNX2X_MSG_DCB, 1799 "COS %d NONPAUSABLE prijoinmask 0x%x\n", 1800 i, cos_data.data[i].pri_join_mask); 1801 } 1802 1803 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ; 1804 } 1805 1806 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 1807 u32 *set_configuration_ets_pg, 1808 u32 *pri_pg_tbl) 1809 { 1810 int i; 1811 1812 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 1813 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i); 1814 1815 DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n", 1816 i, set_configuration_ets_pg[i]); 1817 } 1818 } 1819 1820 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 1821 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1822 { 1823 u16 pri_bit = 0; 1824 u8 cos = 0, pri = 0; 1825 struct priority_cos *tt2cos; 1826 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1827 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 1828 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1829 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 1830 1831 memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg)); 1832 1833 /* to disable DCB - the structure must be zeroed */ 1834 if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured) 1835 return; 1836 1837 /*shortcut*/ 1838 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos; 1839 1840 /* Fw version should be incremented each update */ 1841 pfc_fw_cfg->dcb_version = ++bp->dcb_version; 1842 pfc_fw_cfg->dcb_enabled = 1; 1843 1844 /* Fill priority parameters */ 1845 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1846 tt2cos[pri].priority = ttp[pri]; 1847 pri_bit = 1 << tt2cos[pri].priority; 1848 1849 /* Fill COS parameters based on COS calculated to 1850 * make it more general for future use */ 1851 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) 1852 if (bp->dcbx_port_params.ets.cos_params[cos]. 1853 pri_bitmask & pri_bit) 1854 tt2cos[pri].cos = cos; 1855 1856 pfc_fw_cfg->dcb_outer_pri[pri] = ttp[pri]; 1857 } 1858 1859 /* we never want the FW to add a 0 vlan tag */ 1860 pfc_fw_cfg->dont_add_pri_0_en = 1; 1861 1862 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg); 1863 } 1864 1865 void bnx2x_dcbx_pmf_update(struct bnx2x *bp) 1866 { 1867 /* if we need to synchronize DCBX result from prev PMF 1868 * read it from shmem and update bp and netdev accordingly 1869 */ 1870 if (SHMEM2_HAS(bp, drv_flags) && 1871 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) { 1872 /* Read neg results if dcbx is in the FW */ 1873 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 1874 return; 1875 1876 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1877 bp->dcbx_error); 1878 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1879 bp->dcbx_error); 1880 #ifdef BCM_DCBNL 1881 /* 1882 * Add new app tlvs to dcbnl 1883 */ 1884 bnx2x_dcbnl_update_applist(bp, false); 1885 /* 1886 * Send a notification for the new negotiated parameters 1887 */ 1888 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 1889 #endif 1890 /* 1891 * reconfigure the netdevice with the results of the new 1892 * dcbx negotiation. 1893 */ 1894 bnx2x_dcbx_update_tc_mapping(bp); 1895 } 1896 } 1897 1898 /* DCB netlink */ 1899 #ifdef BCM_DCBNL 1900 1901 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \ 1902 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC) 1903 1904 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp) 1905 { 1906 /* validate dcbnl call that may change HW state: 1907 * DCB is on and DCBX mode was SUCCESSFULLY set by the user. 1908 */ 1909 return bp->dcb_state && bp->dcbx_mode_uset; 1910 } 1911 1912 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev) 1913 { 1914 struct bnx2x *bp = netdev_priv(netdev); 1915 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state); 1916 return bp->dcb_state; 1917 } 1918 1919 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state) 1920 { 1921 struct bnx2x *bp = netdev_priv(netdev); 1922 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 1923 1924 /* Fail to set state to "enabled" if dcbx is disabled in nvram */ 1925 if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) || 1926 (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) { 1927 DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n"); 1928 return 1; 1929 } 1930 1931 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled); 1932 return 0; 1933 } 1934 1935 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev, 1936 u8 *perm_addr) 1937 { 1938 struct bnx2x *bp = netdev_priv(netdev); 1939 DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n"); 1940 1941 /* first the HW mac address */ 1942 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len); 1943 1944 if (CNIC_LOADED(bp)) 1945 /* second SAN address */ 1946 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, 1947 netdev->addr_len); 1948 } 1949 1950 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio, 1951 u8 prio_type, u8 pgid, u8 bw_pct, 1952 u8 up_map) 1953 { 1954 struct bnx2x *bp = netdev_priv(netdev); 1955 1956 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid); 1957 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 1958 return; 1959 1960 /** 1961 * bw_pct ignored - band-width percentage devision between user 1962 * priorities within the same group is not 1963 * standard and hence not supported 1964 * 1965 * prio_type ignored - priority levels within the same group are not 1966 * standard and hence are not supported. According 1967 * to the standard pgid 15 is dedicated to strict 1968 * priority traffic (on the port level). 1969 * 1970 * up_map ignored 1971 */ 1972 1973 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid; 1974 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1975 } 1976 1977 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev, 1978 int pgid, u8 bw_pct) 1979 { 1980 struct bnx2x *bp = netdev_priv(netdev); 1981 DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct); 1982 1983 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 1984 return; 1985 1986 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct; 1987 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1988 } 1989 1990 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio, 1991 u8 prio_type, u8 pgid, u8 bw_pct, 1992 u8 up_map) 1993 { 1994 struct bnx2x *bp = netdev_priv(netdev); 1995 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 1996 } 1997 1998 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev, 1999 int pgid, u8 bw_pct) 2000 { 2001 struct bnx2x *bp = netdev_priv(netdev); 2002 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 2003 } 2004 2005 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio, 2006 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2007 u8 *up_map) 2008 { 2009 struct bnx2x *bp = netdev_priv(netdev); 2010 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2011 2012 /** 2013 * bw_pct ignored - band-width percentage devision between user 2014 * priorities within the same group is not 2015 * standard and hence not supported 2016 * 2017 * prio_type ignored - priority levels within the same group are not 2018 * standard and hence are not supported. According 2019 * to the standard pgid 15 is dedicated to strict 2020 * priority traffic (on the port level). 2021 * 2022 * up_map ignored 2023 */ 2024 *up_map = *bw_pct = *prio_type = *pgid = 0; 2025 2026 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 2027 return; 2028 2029 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio); 2030 } 2031 2032 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev, 2033 int pgid, u8 *bw_pct) 2034 { 2035 struct bnx2x *bp = netdev_priv(netdev); 2036 DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid); 2037 2038 *bw_pct = 0; 2039 2040 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 2041 return; 2042 2043 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid); 2044 } 2045 2046 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio, 2047 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2048 u8 *up_map) 2049 { 2050 struct bnx2x *bp = netdev_priv(netdev); 2051 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2052 2053 *prio_type = *pgid = *bw_pct = *up_map = 0; 2054 } 2055 2056 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev, 2057 int pgid, u8 *bw_pct) 2058 { 2059 struct bnx2x *bp = netdev_priv(netdev); 2060 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2061 2062 *bw_pct = 0; 2063 } 2064 2065 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio, 2066 u8 setting) 2067 { 2068 struct bnx2x *bp = netdev_priv(netdev); 2069 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting); 2070 2071 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES) 2072 return; 2073 2074 if (setting) { 2075 bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio); 2076 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 2077 } else { 2078 bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio); 2079 } 2080 } 2081 2082 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio, 2083 u8 *setting) 2084 { 2085 struct bnx2x *bp = netdev_priv(netdev); 2086 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2087 2088 *setting = 0; 2089 2090 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES) 2091 return; 2092 2093 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1; 2094 } 2095 2096 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev) 2097 { 2098 struct bnx2x *bp = netdev_priv(netdev); 2099 2100 DP(BNX2X_MSG_DCB, "SET-ALL\n"); 2101 2102 if (!bnx2x_dcbnl_set_valid(bp)) 2103 return 1; 2104 2105 if (bp->recovery_state != BNX2X_RECOVERY_DONE) { 2106 netdev_err(bp->dev, 2107 "Handling parity error recovery. Try again later\n"); 2108 return 1; 2109 } 2110 if (netif_running(bp->dev)) { 2111 bnx2x_update_drv_flags(bp, 2112 1 << DRV_FLAGS_DCB_MFW_CONFIGURED, 2113 1); 2114 bnx2x_dcbx_init(bp, true); 2115 } 2116 DP(BNX2X_MSG_DCB, "set_dcbx_params done\n"); 2117 2118 return 0; 2119 } 2120 2121 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap) 2122 { 2123 struct bnx2x *bp = netdev_priv(netdev); 2124 u8 rval = 0; 2125 2126 if (bp->dcb_state) { 2127 switch (capid) { 2128 case DCB_CAP_ATTR_PG: 2129 *cap = true; 2130 break; 2131 case DCB_CAP_ATTR_PFC: 2132 *cap = true; 2133 break; 2134 case DCB_CAP_ATTR_UP2TC: 2135 *cap = false; 2136 break; 2137 case DCB_CAP_ATTR_PG_TCS: 2138 *cap = 0x80; /* 8 priorities for PGs */ 2139 break; 2140 case DCB_CAP_ATTR_PFC_TCS: 2141 *cap = 0x80; /* 8 priorities for PFC */ 2142 break; 2143 case DCB_CAP_ATTR_GSP: 2144 *cap = true; 2145 break; 2146 case DCB_CAP_ATTR_BCN: 2147 *cap = false; 2148 break; 2149 case DCB_CAP_ATTR_DCBX: 2150 *cap = BNX2X_DCBX_CAPS; 2151 break; 2152 default: 2153 BNX2X_ERR("Non valid capability ID\n"); 2154 rval = 1; 2155 break; 2156 } 2157 } else { 2158 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2159 rval = 1; 2160 } 2161 2162 DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap); 2163 return rval; 2164 } 2165 2166 static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num) 2167 { 2168 struct bnx2x *bp = netdev_priv(netdev); 2169 u8 rval = 0; 2170 2171 DP(BNX2X_MSG_DCB, "tcid %d\n", tcid); 2172 2173 if (bp->dcb_state) { 2174 switch (tcid) { 2175 case DCB_NUMTCS_ATTR_PG: 2176 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2177 DCBX_COS_MAX_NUM_E2; 2178 break; 2179 case DCB_NUMTCS_ATTR_PFC: 2180 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2181 DCBX_COS_MAX_NUM_E2; 2182 break; 2183 default: 2184 BNX2X_ERR("Non valid TC-ID\n"); 2185 rval = 1; 2186 break; 2187 } 2188 } else { 2189 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2190 rval = 1; 2191 } 2192 2193 return rval; 2194 } 2195 2196 static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) 2197 { 2198 struct bnx2x *bp = netdev_priv(netdev); 2199 DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num); 2200 return -EINVAL; 2201 } 2202 2203 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) 2204 { 2205 struct bnx2x *bp = netdev_priv(netdev); 2206 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled); 2207 2208 if (!bp->dcb_state) 2209 return 0; 2210 2211 return bp->dcbx_local_feat.pfc.enabled; 2212 } 2213 2214 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state) 2215 { 2216 struct bnx2x *bp = netdev_priv(netdev); 2217 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 2218 2219 if (!bnx2x_dcbnl_set_valid(bp)) 2220 return; 2221 2222 bp->dcbx_config_params.admin_pfc_tx_enable = 2223 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0); 2224 } 2225 2226 static void bnx2x_admin_app_set_ent( 2227 struct bnx2x_admin_priority_app_table *app_ent, 2228 u8 idtype, u16 idval, u8 up) 2229 { 2230 app_ent->valid = 1; 2231 2232 switch (idtype) { 2233 case DCB_APP_IDTYPE_ETHTYPE: 2234 app_ent->traffic_type = TRAFFIC_TYPE_ETH; 2235 break; 2236 case DCB_APP_IDTYPE_PORTNUM: 2237 app_ent->traffic_type = TRAFFIC_TYPE_PORT; 2238 break; 2239 default: 2240 break; /* never gets here */ 2241 } 2242 app_ent->app_id = idval; 2243 app_ent->priority = up; 2244 } 2245 2246 static bool bnx2x_admin_app_is_equal( 2247 struct bnx2x_admin_priority_app_table *app_ent, 2248 u8 idtype, u16 idval) 2249 { 2250 if (!app_ent->valid) 2251 return false; 2252 2253 switch (idtype) { 2254 case DCB_APP_IDTYPE_ETHTYPE: 2255 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH) 2256 return false; 2257 break; 2258 case DCB_APP_IDTYPE_PORTNUM: 2259 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT) 2260 return false; 2261 break; 2262 default: 2263 return false; 2264 } 2265 if (app_ent->app_id != idval) 2266 return false; 2267 2268 return true; 2269 } 2270 2271 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up) 2272 { 2273 int i, ff; 2274 2275 /* iterate over the app entries looking for idtype and idval */ 2276 for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 2277 struct bnx2x_admin_priority_app_table *app_ent = 2278 &bp->dcbx_config_params.admin_priority_app_table[i]; 2279 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval)) 2280 break; 2281 2282 if (ff < 0 && !app_ent->valid) 2283 ff = i; 2284 } 2285 if (i < DCBX_CONFIG_MAX_APP_PROTOCOL) 2286 /* if found overwrite up */ 2287 bp->dcbx_config_params. 2288 admin_priority_app_table[i].priority = up; 2289 else if (ff >= 0) 2290 /* not found use first-free */ 2291 bnx2x_admin_app_set_ent( 2292 &bp->dcbx_config_params.admin_priority_app_table[ff], 2293 idtype, idval, up); 2294 else { 2295 /* app table is full */ 2296 BNX2X_ERR("Application table is too large\n"); 2297 return -EBUSY; 2298 } 2299 2300 /* up configured, if not 0 make sure feature is enabled */ 2301 if (up) 2302 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 2303 2304 return 0; 2305 } 2306 2307 static int bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype, 2308 u16 idval, u8 up) 2309 { 2310 struct bnx2x *bp = netdev_priv(netdev); 2311 2312 DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n", 2313 idtype, idval, up); 2314 2315 if (!bnx2x_dcbnl_set_valid(bp)) { 2316 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2317 return -EINVAL; 2318 } 2319 2320 /* verify idtype */ 2321 switch (idtype) { 2322 case DCB_APP_IDTYPE_ETHTYPE: 2323 case DCB_APP_IDTYPE_PORTNUM: 2324 break; 2325 default: 2326 DP(BNX2X_MSG_DCB, "Wrong ID type\n"); 2327 return -EINVAL; 2328 } 2329 return bnx2x_set_admin_app_up(bp, idtype, idval, up); 2330 } 2331 2332 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev) 2333 { 2334 struct bnx2x *bp = netdev_priv(netdev); 2335 u8 state; 2336 2337 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE; 2338 2339 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF) 2340 state |= DCB_CAP_DCBX_STATIC; 2341 2342 return state; 2343 } 2344 2345 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state) 2346 { 2347 struct bnx2x *bp = netdev_priv(netdev); 2348 DP(BNX2X_MSG_DCB, "state = %02x\n", state); 2349 2350 /* set dcbx mode */ 2351 2352 if ((state & BNX2X_DCBX_CAPS) != state) { 2353 BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n", 2354 state); 2355 return 1; 2356 } 2357 2358 if (bp->dcb_state != BNX2X_DCB_STATE_ON) { 2359 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n"); 2360 return 1; 2361 } 2362 2363 if (state & DCB_CAP_DCBX_STATIC) 2364 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF; 2365 else 2366 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON; 2367 2368 bp->dcbx_mode_uset = true; 2369 return 0; 2370 } 2371 2372 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, 2373 u8 *flags) 2374 { 2375 struct bnx2x *bp = netdev_priv(netdev); 2376 u8 rval = 0; 2377 2378 DP(BNX2X_MSG_DCB, "featid %d\n", featid); 2379 2380 if (bp->dcb_state) { 2381 *flags = 0; 2382 switch (featid) { 2383 case DCB_FEATCFG_ATTR_PG: 2384 if (bp->dcbx_local_feat.ets.enabled) 2385 *flags |= DCB_FEATCFG_ENABLE; 2386 if (bp->dcbx_error & (DCBX_LOCAL_ETS_ERROR | 2387 DCBX_REMOTE_MIB_ERROR)) 2388 *flags |= DCB_FEATCFG_ERROR; 2389 break; 2390 case DCB_FEATCFG_ATTR_PFC: 2391 if (bp->dcbx_local_feat.pfc.enabled) 2392 *flags |= DCB_FEATCFG_ENABLE; 2393 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR | 2394 DCBX_LOCAL_PFC_MISMATCH | 2395 DCBX_REMOTE_MIB_ERROR)) 2396 *flags |= DCB_FEATCFG_ERROR; 2397 break; 2398 case DCB_FEATCFG_ATTR_APP: 2399 if (bp->dcbx_local_feat.app.enabled) 2400 *flags |= DCB_FEATCFG_ENABLE; 2401 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR | 2402 DCBX_LOCAL_APP_MISMATCH | 2403 DCBX_REMOTE_MIB_ERROR)) 2404 *flags |= DCB_FEATCFG_ERROR; 2405 break; 2406 default: 2407 BNX2X_ERR("Non valid feature-ID\n"); 2408 rval = 1; 2409 break; 2410 } 2411 } else { 2412 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2413 rval = 1; 2414 } 2415 2416 return rval; 2417 } 2418 2419 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, 2420 u8 flags) 2421 { 2422 struct bnx2x *bp = netdev_priv(netdev); 2423 u8 rval = 0; 2424 2425 DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags); 2426 2427 /* ignore the 'advertise' flag */ 2428 if (bnx2x_dcbnl_set_valid(bp)) { 2429 switch (featid) { 2430 case DCB_FEATCFG_ATTR_PG: 2431 bp->dcbx_config_params.admin_ets_enable = 2432 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2433 bp->dcbx_config_params.admin_ets_willing = 2434 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2435 break; 2436 case DCB_FEATCFG_ATTR_PFC: 2437 bp->dcbx_config_params.admin_pfc_enable = 2438 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2439 bp->dcbx_config_params.admin_pfc_willing = 2440 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2441 break; 2442 case DCB_FEATCFG_ATTR_APP: 2443 /* ignore enable, always enabled */ 2444 bp->dcbx_config_params.admin_app_priority_willing = 2445 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2446 break; 2447 default: 2448 BNX2X_ERR("Non valid feature-ID\n"); 2449 rval = 1; 2450 break; 2451 } 2452 } else { 2453 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2454 rval = 1; 2455 } 2456 2457 return rval; 2458 } 2459 2460 static int bnx2x_peer_appinfo(struct net_device *netdev, 2461 struct dcb_peer_app_info *info, u16* app_count) 2462 { 2463 int i; 2464 struct bnx2x *bp = netdev_priv(netdev); 2465 2466 DP(BNX2X_MSG_DCB, "APP-INFO\n"); 2467 2468 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0; 2469 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0; 2470 *app_count = 0; 2471 2472 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) 2473 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield & 2474 DCBX_APP_ENTRY_VALID) 2475 (*app_count)++; 2476 return 0; 2477 } 2478 2479 static int bnx2x_peer_apptable(struct net_device *netdev, 2480 struct dcb_app *table) 2481 { 2482 int i, j; 2483 struct bnx2x *bp = netdev_priv(netdev); 2484 2485 DP(BNX2X_MSG_DCB, "APP-TABLE\n"); 2486 2487 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 2488 struct dcbx_app_priority_entry *ent = 2489 &bp->dcbx_remote_feat.app.app_pri_tbl[i]; 2490 2491 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 2492 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 2493 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent); 2494 table[j++].protocol = ent->app_id; 2495 } 2496 } 2497 return 0; 2498 } 2499 2500 static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg) 2501 { 2502 int i; 2503 struct bnx2x *bp = netdev_priv(netdev); 2504 2505 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0; 2506 2507 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) { 2508 pg->pg_bw[i] = 2509 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i); 2510 pg->prio_pg[i] = 2511 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i); 2512 } 2513 return 0; 2514 } 2515 2516 static int bnx2x_cee_peer_getpfc(struct net_device *netdev, 2517 struct cee_pfc *pfc) 2518 { 2519 struct bnx2x *bp = netdev_priv(netdev); 2520 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps; 2521 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap; 2522 return 0; 2523 } 2524 2525 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = { 2526 .getstate = bnx2x_dcbnl_get_state, 2527 .setstate = bnx2x_dcbnl_set_state, 2528 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr, 2529 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx, 2530 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx, 2531 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx, 2532 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx, 2533 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx, 2534 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx, 2535 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx, 2536 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx, 2537 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg, 2538 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg, 2539 .setall = bnx2x_dcbnl_set_all, 2540 .getcap = bnx2x_dcbnl_get_cap, 2541 .getnumtcs = bnx2x_dcbnl_get_numtcs, 2542 .setnumtcs = bnx2x_dcbnl_set_numtcs, 2543 .getpfcstate = bnx2x_dcbnl_get_pfc_state, 2544 .setpfcstate = bnx2x_dcbnl_set_pfc_state, 2545 .setapp = bnx2x_dcbnl_set_app_up, 2546 .getdcbx = bnx2x_dcbnl_get_dcbx, 2547 .setdcbx = bnx2x_dcbnl_set_dcbx, 2548 .getfeatcfg = bnx2x_dcbnl_get_featcfg, 2549 .setfeatcfg = bnx2x_dcbnl_set_featcfg, 2550 .peer_getappinfo = bnx2x_peer_appinfo, 2551 .peer_getapptable = bnx2x_peer_apptable, 2552 .cee_peer_getpg = bnx2x_cee_peer_getpg, 2553 .cee_peer_getpfc = bnx2x_cee_peer_getpfc, 2554 }; 2555 2556 #endif /* BCM_DCBNL */ 2557