1 /* bnx2x_dcb.c: Broadcom Everest network driver. 2 * 3 * Copyright 2009-2013 Broadcom Corporation 4 * 5 * Unless you and Broadcom execute a separate written software license 6 * agreement governing use of this software, this software is licensed to you 7 * under the terms of the GNU General Public License version 2, available 8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). 9 * 10 * Notwithstanding the above, under no circumstances may you combine this 11 * software in any way with any other Broadcom software provided under a 12 * license other than the GPL, without Broadcom's express prior written 13 * consent. 14 * 15 * Maintained by: Eilon Greenstein <eilong@broadcom.com> 16 * Written by: Dmitry Kravkov 17 * 18 */ 19 20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 21 22 #include <linux/netdevice.h> 23 #include <linux/types.h> 24 #include <linux/errno.h> 25 #include <linux/rtnetlink.h> 26 #include <net/dcbnl.h> 27 28 #include "bnx2x.h" 29 #include "bnx2x_cmn.h" 30 #include "bnx2x_dcb.h" 31 32 /* forward declarations of dcbx related functions */ 33 static void bnx2x_pfc_set_pfc(struct bnx2x *bp); 34 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp); 35 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 36 u32 *set_configuration_ets_pg, 37 u32 *pri_pg_tbl); 38 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 39 u32 *pg_pri_orginal_spread, 40 struct pg_help_data *help_data); 41 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 42 struct pg_help_data *help_data, 43 struct dcbx_ets_feature *ets, 44 u32 *pg_pri_orginal_spread); 45 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 46 struct cos_help_data *cos_data, 47 u32 *pg_pri_orginal_spread, 48 struct dcbx_ets_feature *ets); 49 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 50 struct bnx2x_func_tx_start_params*); 51 52 /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */ 53 static void bnx2x_read_data(struct bnx2x *bp, u32 *buff, 54 u32 addr, u32 len) 55 { 56 int i; 57 for (i = 0; i < len; i += 4, buff++) 58 *buff = REG_RD(bp, addr + i); 59 } 60 61 static void bnx2x_write_data(struct bnx2x *bp, u32 *buff, 62 u32 addr, u32 len) 63 { 64 int i; 65 for (i = 0; i < len; i += 4, buff++) 66 REG_WR(bp, addr + i, *buff); 67 } 68 69 static void bnx2x_pfc_set(struct bnx2x *bp) 70 { 71 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0}; 72 u32 pri_bit, val = 0; 73 int i; 74 75 pfc_params.num_of_rx_cos_priority_mask = 76 bp->dcbx_port_params.ets.num_of_cos; 77 78 /* Tx COS configuration */ 79 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++) 80 /* 81 * We configure only the pauseable bits (non pauseable aren't 82 * configured at all) it's done to avoid false pauses from 83 * network 84 */ 85 pfc_params.rx_cos_priority_mask[i] = 86 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask 87 & DCBX_PFC_PRI_PAUSE_MASK(bp); 88 89 /* 90 * Rx COS configuration 91 * Changing PFC RX configuration . 92 * In RX COS0 will always be configured to lossless and COS1 to lossy 93 */ 94 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) { 95 pri_bit = 1 << i; 96 97 if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))) 98 val |= 1 << (i * 4); 99 } 100 101 pfc_params.pkt_priority_to_cos = val; 102 103 /* RX COS0 */ 104 pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp); 105 /* RX COS1 */ 106 pfc_params.llfc_high_priority_classes = 0; 107 108 bnx2x_acquire_phy_lock(bp); 109 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED; 110 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params); 111 bnx2x_release_phy_lock(bp); 112 } 113 114 static void bnx2x_pfc_clear(struct bnx2x *bp) 115 { 116 struct bnx2x_nig_brb_pfc_port_params nig_params = {0}; 117 nig_params.pause_enable = 1; 118 bnx2x_acquire_phy_lock(bp); 119 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED; 120 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params); 121 bnx2x_release_phy_lock(bp); 122 } 123 124 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp, 125 struct dcbx_features *features, 126 u32 error) 127 { 128 u8 i = 0; 129 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error); 130 131 /* PG */ 132 DP(NETIF_MSG_LINK, 133 "local_mib.features.ets.enabled %x\n", features->ets.enabled); 134 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) 135 DP(NETIF_MSG_LINK, 136 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i, 137 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i)); 138 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) 139 DP(NETIF_MSG_LINK, 140 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i, 141 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i)); 142 143 /* pfc */ 144 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n", 145 features->pfc.pri_en_bitmap); 146 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n", 147 features->pfc.pfc_caps); 148 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n", 149 features->pfc.enabled); 150 151 DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n", 152 features->app.default_pri); 153 DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n", 154 features->app.tc_supported); 155 DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n", 156 features->app.enabled); 157 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 158 DP(BNX2X_MSG_DCB, 159 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n", 160 i, features->app.app_pri_tbl[i].app_id); 161 DP(BNX2X_MSG_DCB, 162 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n", 163 i, features->app.app_pri_tbl[i].pri_bitmap); 164 DP(BNX2X_MSG_DCB, 165 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n", 166 i, features->app.app_pri_tbl[i].appBitfield); 167 } 168 } 169 170 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp, 171 u8 pri_bitmap, 172 u8 llfc_traf_type) 173 { 174 u32 pri = MAX_PFC_PRIORITIES; 175 u32 index = MAX_PFC_PRIORITIES - 1; 176 u32 pri_mask; 177 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 178 179 /* Choose the highest priority */ 180 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) { 181 pri_mask = 1 << index; 182 if (GET_FLAGS(pri_bitmap, pri_mask)) 183 pri = index ; 184 index--; 185 } 186 187 if (pri < MAX_PFC_PRIORITIES) 188 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri); 189 } 190 191 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp, 192 struct dcbx_app_priority_feature *app, 193 u32 error) { 194 u8 index; 195 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 196 197 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) 198 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n"); 199 200 if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH)) 201 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n"); 202 203 if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND)) 204 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n"); 205 if (app->enabled && 206 !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH | 207 DCBX_REMOTE_APP_TLV_NOT_FOUND)) { 208 209 bp->dcbx_port_params.app.enabled = true; 210 211 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 212 ttp[index] = 0; 213 214 if (app->default_pri < MAX_PFC_PRIORITIES) 215 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri; 216 217 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) { 218 struct dcbx_app_priority_entry *entry = 219 app->app_pri_tbl; 220 221 if (GET_FLAGS(entry[index].appBitfield, 222 DCBX_APP_SF_ETH_TYPE) && 223 ETH_TYPE_FCOE == entry[index].app_id) 224 bnx2x_dcbx_get_ap_priority(bp, 225 entry[index].pri_bitmap, 226 LLFC_TRAFFIC_TYPE_FCOE); 227 228 if (GET_FLAGS(entry[index].appBitfield, 229 DCBX_APP_SF_PORT) && 230 TCP_PORT_ISCSI == entry[index].app_id) 231 bnx2x_dcbx_get_ap_priority(bp, 232 entry[index].pri_bitmap, 233 LLFC_TRAFFIC_TYPE_ISCSI); 234 } 235 } else { 236 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n"); 237 bp->dcbx_port_params.app.enabled = false; 238 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 239 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY; 240 } 241 } 242 243 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, 244 struct dcbx_ets_feature *ets, 245 u32 error) { 246 int i = 0; 247 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0}; 248 struct pg_help_data pg_help_data; 249 struct bnx2x_dcbx_cos_params *cos_params = 250 bp->dcbx_port_params.ets.cos_params; 251 252 memset(&pg_help_data, 0, sizeof(struct pg_help_data)); 253 254 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR)) 255 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n"); 256 257 if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND)) 258 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n"); 259 260 /* Clean up old settings of ets on COS */ 261 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) { 262 cos_params[i].pauseable = false; 263 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID; 264 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW; 265 cos_params[i].pri_bitmask = 0; 266 } 267 268 if (bp->dcbx_port_params.app.enabled && ets->enabled && 269 !GET_FLAGS(error, 270 DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) { 271 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n"); 272 bp->dcbx_port_params.ets.enabled = true; 273 274 bnx2x_dcbx_get_ets_pri_pg_tbl(bp, 275 pg_pri_orginal_spread, 276 ets->pri_pg_tbl); 277 278 bnx2x_dcbx_get_num_pg_traf_type(bp, 279 pg_pri_orginal_spread, 280 &pg_help_data); 281 282 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data, 283 ets, pg_pri_orginal_spread); 284 285 } else { 286 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n"); 287 bp->dcbx_port_params.ets.enabled = false; 288 ets->pri_pg_tbl[0] = 0; 289 290 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++) 291 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1); 292 } 293 } 294 295 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp, 296 struct dcbx_pfc_feature *pfc, u32 error) 297 { 298 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR)) 299 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n"); 300 301 if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND)) 302 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n"); 303 if (bp->dcbx_port_params.app.enabled && pfc->enabled && 304 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH | 305 DCBX_REMOTE_PFC_TLV_NOT_FOUND)) { 306 bp->dcbx_port_params.pfc.enabled = true; 307 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 308 ~(pfc->pri_en_bitmap); 309 } else { 310 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n"); 311 bp->dcbx_port_params.pfc.enabled = false; 312 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0; 313 } 314 } 315 316 /* maps unmapped priorities to to the same COS as L2 */ 317 static void bnx2x_dcbx_map_nw(struct bnx2x *bp) 318 { 319 int i; 320 u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */ 321 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 322 u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW]; 323 struct bnx2x_dcbx_cos_params *cos_params = 324 bp->dcbx_port_params.ets.cos_params; 325 326 /* get unmapped priorities by clearing mapped bits */ 327 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 328 unmapped &= ~(1 << ttp[i]); 329 330 /* find cos for nw prio and extend it with unmapped */ 331 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) { 332 if (cos_params[i].pri_bitmask & nw_prio) { 333 /* extend the bitmask with unmapped */ 334 DP(BNX2X_MSG_DCB, 335 "cos %d extended with 0x%08x\n", i, unmapped); 336 cos_params[i].pri_bitmask |= unmapped; 337 break; 338 } 339 } 340 } 341 342 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp, 343 struct dcbx_features *features, 344 u32 error) 345 { 346 bnx2x_dcbx_get_ap_feature(bp, &features->app, error); 347 348 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error); 349 350 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error); 351 352 bnx2x_dcbx_map_nw(bp); 353 } 354 355 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100) 356 static int bnx2x_dcbx_read_mib(struct bnx2x *bp, 357 u32 *base_mib_addr, 358 u32 offset, 359 int read_mib_type) 360 { 361 int max_try_read = 0; 362 u32 mib_size, prefix_seq_num, suffix_seq_num; 363 struct lldp_remote_mib *remote_mib ; 364 struct lldp_local_mib *local_mib; 365 366 switch (read_mib_type) { 367 case DCBX_READ_LOCAL_MIB: 368 mib_size = sizeof(struct lldp_local_mib); 369 break; 370 case DCBX_READ_REMOTE_MIB: 371 mib_size = sizeof(struct lldp_remote_mib); 372 break; 373 default: 374 return 1; /*error*/ 375 } 376 377 offset += BP_PORT(bp) * mib_size; 378 379 do { 380 bnx2x_read_data(bp, base_mib_addr, offset, mib_size); 381 382 max_try_read++; 383 384 switch (read_mib_type) { 385 case DCBX_READ_LOCAL_MIB: 386 local_mib = (struct lldp_local_mib *) base_mib_addr; 387 prefix_seq_num = local_mib->prefix_seq_num; 388 suffix_seq_num = local_mib->suffix_seq_num; 389 break; 390 case DCBX_READ_REMOTE_MIB: 391 remote_mib = (struct lldp_remote_mib *) base_mib_addr; 392 prefix_seq_num = remote_mib->prefix_seq_num; 393 suffix_seq_num = remote_mib->suffix_seq_num; 394 break; 395 default: 396 return 1; /*error*/ 397 } 398 } while ((prefix_seq_num != suffix_seq_num) && 399 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ)); 400 401 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) { 402 BNX2X_ERR("MIB could not be read\n"); 403 return 1; 404 } 405 406 return 0; 407 } 408 409 static void bnx2x_pfc_set_pfc(struct bnx2x *bp) 410 { 411 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 412 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 413 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 414 415 if (bp->dcbx_port_params.pfc.enabled && 416 (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured)) 417 /* 418 * 1. Fills up common PFC structures if required 419 * 2. Configure NIG, MAC and BRB via the elink 420 */ 421 bnx2x_pfc_set(bp); 422 else 423 bnx2x_pfc_clear(bp); 424 } 425 426 int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp) 427 { 428 struct bnx2x_func_state_params func_params = {NULL}; 429 int rc; 430 431 func_params.f_obj = &bp->func_obj; 432 func_params.cmd = BNX2X_F_CMD_TX_STOP; 433 434 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 435 __set_bit(RAMROD_RETRY, &func_params.ramrod_flags); 436 437 DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n"); 438 439 rc = bnx2x_func_state_change(bp, &func_params); 440 if (rc) { 441 BNX2X_ERR("Unable to hold traffic for HW configuration\n"); 442 bnx2x_panic(); 443 } 444 445 return rc; 446 } 447 448 int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp) 449 { 450 struct bnx2x_func_state_params func_params = {NULL}; 451 struct bnx2x_func_tx_start_params *tx_params = 452 &func_params.params.tx_start; 453 int rc; 454 455 func_params.f_obj = &bp->func_obj; 456 func_params.cmd = BNX2X_F_CMD_TX_START; 457 458 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 459 __set_bit(RAMROD_RETRY, &func_params.ramrod_flags); 460 461 bnx2x_dcbx_fw_struct(bp, tx_params); 462 463 DP(BNX2X_MSG_DCB, "START TRAFFIC\n"); 464 465 rc = bnx2x_func_state_change(bp, &func_params); 466 if (rc) { 467 BNX2X_ERR("Unable to resume traffic after HW configuration\n"); 468 bnx2x_panic(); 469 } 470 471 return rc; 472 } 473 474 static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp) 475 { 476 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 477 int rc = 0; 478 479 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) { 480 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos); 481 return; 482 } 483 484 /* valid COS entries */ 485 if (ets->num_of_cos == 1) /* no ETS */ 486 return; 487 488 /* sanity */ 489 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) && 490 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) || 491 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) && 492 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) { 493 BNX2X_ERR("all COS should have at least bw_limit or strict" 494 "ets->cos_params[0].strict= %x" 495 "ets->cos_params[0].bw_tbl= %x" 496 "ets->cos_params[1].strict= %x" 497 "ets->cos_params[1].bw_tbl= %x", 498 ets->cos_params[0].strict, 499 ets->cos_params[0].bw_tbl, 500 ets->cos_params[1].strict, 501 ets->cos_params[1].bw_tbl); 502 return; 503 } 504 /* If we join a group and there is bw_tbl and strict then bw rules */ 505 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) && 506 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) { 507 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl; 508 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl; 509 /* Do not allow 0-100 configuration 510 * since PBF does not support it 511 * force 1-99 instead 512 */ 513 if (bw_tbl_0 == 0) { 514 bw_tbl_0 = 1; 515 bw_tbl_1 = 99; 516 } else if (bw_tbl_1 == 0) { 517 bw_tbl_1 = 1; 518 bw_tbl_0 = 99; 519 } 520 521 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1); 522 } else { 523 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST) 524 rc = bnx2x_ets_strict(&bp->link_params, 0); 525 else if (ets->cos_params[1].strict 526 == BNX2X_DCBX_STRICT_COS_HIGHEST) 527 rc = bnx2x_ets_strict(&bp->link_params, 1); 528 if (rc) 529 BNX2X_ERR("update_ets_params failed\n"); 530 } 531 } 532 533 /* 534 * In E3B0 the configuration may have more than 2 COS. 535 */ 536 static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp) 537 { 538 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 539 struct bnx2x_ets_params ets_params = { 0 }; 540 u8 i; 541 542 ets_params.num_of_cos = ets->num_of_cos; 543 544 for (i = 0; i < ets->num_of_cos; i++) { 545 /* COS is SP */ 546 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) { 547 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) { 548 BNX2X_ERR("COS can't be not BW and not SP\n"); 549 return; 550 } 551 552 ets_params.cos[i].state = bnx2x_cos_state_strict; 553 ets_params.cos[i].params.sp_params.pri = 554 ets->cos_params[i].strict; 555 } else { /* COS is BW */ 556 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) { 557 BNX2X_ERR("COS can't be not BW and not SP\n"); 558 return; 559 } 560 ets_params.cos[i].state = bnx2x_cos_state_bw; 561 ets_params.cos[i].params.bw_params.bw = 562 (u8)ets->cos_params[i].bw_tbl; 563 } 564 } 565 566 /* Configure the ETS in HW */ 567 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars, 568 &ets_params)) { 569 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n"); 570 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 571 } 572 } 573 574 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) 575 { 576 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 577 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 578 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 579 580 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 581 582 if (!bp->dcbx_port_params.ets.enabled || 583 ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)) 584 return; 585 586 if (CHIP_IS_E3B0(bp)) 587 bnx2x_dcbx_update_ets_config(bp); 588 else 589 bnx2x_dcbx_2cos_limit_update_ets_config(bp); 590 } 591 592 #ifdef BCM_DCBNL 593 static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp) 594 { 595 struct lldp_remote_mib remote_mib = {0}; 596 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset); 597 int rc; 598 599 DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n", 600 dcbx_remote_mib_offset); 601 602 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) { 603 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n"); 604 return -EINVAL; 605 } 606 607 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset, 608 DCBX_READ_REMOTE_MIB); 609 610 if (rc) { 611 BNX2X_ERR("Failed to read remote mib from FW\n"); 612 return rc; 613 } 614 615 /* save features and flags */ 616 bp->dcbx_remote_feat = remote_mib.features; 617 bp->dcbx_remote_flags = remote_mib.flags; 618 return 0; 619 } 620 #endif 621 622 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp) 623 { 624 struct lldp_local_mib local_mib = {0}; 625 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset); 626 int rc; 627 628 DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset); 629 630 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) { 631 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n"); 632 return -EINVAL; 633 } 634 635 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset, 636 DCBX_READ_LOCAL_MIB); 637 638 if (rc) { 639 BNX2X_ERR("Failed to read local mib from FW\n"); 640 return rc; 641 } 642 643 /* save features and error */ 644 bp->dcbx_local_feat = local_mib.features; 645 bp->dcbx_error = local_mib.error; 646 return 0; 647 } 648 649 #ifdef BCM_DCBNL 650 static inline 651 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent) 652 { 653 u8 pri; 654 655 /* Choose the highest priority */ 656 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--) 657 if (ent->pri_bitmap & (1 << pri)) 658 break; 659 return pri; 660 } 661 662 static inline 663 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent) 664 { 665 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) == 666 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM : 667 DCB_APP_IDTYPE_ETHTYPE; 668 } 669 670 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall) 671 { 672 int i, err = 0; 673 674 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) { 675 struct dcbx_app_priority_entry *ent = 676 &bp->dcbx_local_feat.app.app_pri_tbl[i]; 677 678 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 679 u8 up = bnx2x_dcbx_dcbnl_app_up(ent); 680 681 /* avoid invalid user-priority */ 682 if (up) { 683 struct dcb_app app; 684 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 685 app.protocol = ent->app_id; 686 app.priority = delall ? 0 : up; 687 err = dcb_setapp(bp->dev, &app); 688 } 689 } 690 } 691 return err; 692 } 693 #endif 694 695 static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp) 696 { 697 u8 prio, cos; 698 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) { 699 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) { 700 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask 701 & (1 << prio)) { 702 bp->prio_to_cos[prio] = cos; 703 DP(BNX2X_MSG_DCB, 704 "tx_mapping %d --> %d\n", prio, cos); 705 } 706 } 707 } 708 709 /* setup tc must be called under rtnl lock, but we can't take it here 710 * as we are handling an attention on a work queue which must be 711 * flushed at some rtnl-locked contexts (e.g. if down) 712 */ 713 if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state)) 714 schedule_delayed_work(&bp->sp_rtnl_task, 0); 715 } 716 717 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) 718 { 719 switch (state) { 720 case BNX2X_DCBX_STATE_NEG_RECEIVED: 721 { 722 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n"); 723 #ifdef BCM_DCBNL 724 /** 725 * Delete app tlvs from dcbnl before reading new 726 * negotiation results 727 */ 728 bnx2x_dcbnl_update_applist(bp, true); 729 730 /* Read remote mib if dcbx is in the FW */ 731 if (bnx2x_dcbx_read_shmem_remote_mib(bp)) 732 return; 733 #endif 734 /* Read neg results if dcbx is in the FW */ 735 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 736 return; 737 738 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 739 bp->dcbx_error); 740 741 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 742 bp->dcbx_error); 743 744 /* mark DCBX result for PMF migration */ 745 bnx2x_update_drv_flags(bp, 746 1 << DRV_FLAGS_DCB_CONFIGURED, 747 1); 748 #ifdef BCM_DCBNL 749 /* 750 * Add new app tlvs to dcbnl 751 */ 752 bnx2x_dcbnl_update_applist(bp, false); 753 #endif 754 /* 755 * reconfigure the netdevice with the results of the new 756 * dcbx negotiation. 757 */ 758 bnx2x_dcbx_update_tc_mapping(bp); 759 760 /* 761 * allow other functions to update their netdevices 762 * accordingly 763 */ 764 if (IS_MF(bp)) 765 bnx2x_link_sync_notify(bp); 766 767 set_bit(BNX2X_SP_RTNL_TX_STOP, &bp->sp_rtnl_state); 768 769 schedule_delayed_work(&bp->sp_rtnl_task, 0); 770 771 return; 772 } 773 case BNX2X_DCBX_STATE_TX_PAUSED: 774 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n"); 775 bnx2x_pfc_set_pfc(bp); 776 777 bnx2x_dcbx_update_ets_params(bp); 778 779 /* ets may affect cmng configuration: reinit it in hw */ 780 bnx2x_set_local_cmng(bp); 781 782 set_bit(BNX2X_SP_RTNL_TX_RESUME, &bp->sp_rtnl_state); 783 784 schedule_delayed_work(&bp->sp_rtnl_task, 0); 785 786 return; 787 case BNX2X_DCBX_STATE_TX_RELEASED: 788 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n"); 789 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0); 790 #ifdef BCM_DCBNL 791 /* 792 * Send a notification for the new negotiated parameters 793 */ 794 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 795 #endif 796 return; 797 default: 798 BNX2X_ERR("Unknown DCBX_STATE\n"); 799 } 800 } 801 802 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \ 803 BP_PORT(bp)*sizeof(struct lldp_admin_mib)) 804 805 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, 806 u32 dcbx_lldp_params_offset) 807 { 808 struct lldp_admin_mib admin_mib; 809 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0; 810 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp); 811 812 /*shortcuts*/ 813 struct dcbx_features *af = &admin_mib.features; 814 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params; 815 816 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib)); 817 818 /* Read the data first */ 819 bnx2x_read_data(bp, (u32 *)&admin_mib, offset, 820 sizeof(struct lldp_admin_mib)); 821 822 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON) 823 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 824 else 825 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 826 827 if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) { 828 829 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK); 830 admin_mib.ver_cfg_flags |= 831 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) & 832 DCBX_CEE_VERSION_MASK; 833 834 af->ets.enabled = (u8)dp->admin_ets_enable; 835 836 af->pfc.enabled = (u8)dp->admin_pfc_enable; 837 838 /* FOR IEEE dp->admin_tc_supported_tx_enable */ 839 if (dp->admin_ets_configuration_tx_enable) 840 SET_FLAGS(admin_mib.ver_cfg_flags, 841 DCBX_ETS_CONFIG_TX_ENABLED); 842 else 843 RESET_FLAGS(admin_mib.ver_cfg_flags, 844 DCBX_ETS_CONFIG_TX_ENABLED); 845 /* For IEEE admin_ets_recommendation_tx_enable */ 846 if (dp->admin_pfc_tx_enable) 847 SET_FLAGS(admin_mib.ver_cfg_flags, 848 DCBX_PFC_CONFIG_TX_ENABLED); 849 else 850 RESET_FLAGS(admin_mib.ver_cfg_flags, 851 DCBX_PFC_CONFIG_TX_ENABLED); 852 853 if (dp->admin_application_priority_tx_enable) 854 SET_FLAGS(admin_mib.ver_cfg_flags, 855 DCBX_APP_CONFIG_TX_ENABLED); 856 else 857 RESET_FLAGS(admin_mib.ver_cfg_flags, 858 DCBX_APP_CONFIG_TX_ENABLED); 859 860 if (dp->admin_ets_willing) 861 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 862 else 863 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 864 /* For IEEE admin_ets_reco_valid */ 865 if (dp->admin_pfc_willing) 866 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 867 else 868 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 869 870 if (dp->admin_app_priority_willing) 871 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 872 else 873 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 874 875 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) { 876 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i, 877 (u8)dp->admin_configuration_bw_precentage[i]); 878 879 DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n", 880 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i)); 881 } 882 883 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 884 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i, 885 (u8)dp->admin_configuration_ets_pg[i]); 886 887 DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n", 888 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i)); 889 } 890 891 /*For IEEE admin_recommendation_bw_percentage 892 *For IEEE admin_recommendation_ets_pg */ 893 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap; 894 for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 895 if (dp->admin_priority_app_table[i].valid) { 896 struct bnx2x_admin_priority_app_table *table = 897 dp->admin_priority_app_table; 898 if ((ETH_TYPE_FCOE == table[i].app_id) && 899 (TRAFFIC_TYPE_ETH == table[i].traffic_type)) 900 traf_type = FCOE_APP_IDX; 901 else if ((TCP_PORT_ISCSI == table[i].app_id) && 902 (TRAFFIC_TYPE_PORT == table[i].traffic_type)) 903 traf_type = ISCSI_APP_IDX; 904 else 905 traf_type = other_traf_type++; 906 907 af->app.app_pri_tbl[traf_type].app_id = 908 table[i].app_id; 909 910 af->app.app_pri_tbl[traf_type].pri_bitmap = 911 (u8)(1 << table[i].priority); 912 913 af->app.app_pri_tbl[traf_type].appBitfield = 914 (DCBX_APP_ENTRY_VALID); 915 916 af->app.app_pri_tbl[traf_type].appBitfield |= 917 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ? 918 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT; 919 } 920 } 921 922 af->app.default_pri = (u8)dp->admin_default_priority; 923 } 924 925 /* Write the data. */ 926 bnx2x_write_data(bp, (u32 *)&admin_mib, offset, 927 sizeof(struct lldp_admin_mib)); 928 } 929 930 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled) 931 { 932 if (!CHIP_IS_E1x(bp)) { 933 bp->dcb_state = dcb_on; 934 bp->dcbx_enabled = dcbx_enabled; 935 } else { 936 bp->dcb_state = false; 937 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID; 938 } 939 DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n", 940 dcb_on ? "ON" : "OFF", 941 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" : 942 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" : 943 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ? 944 "on-chip with negotiation" : "invalid"); 945 } 946 947 void bnx2x_dcbx_init_params(struct bnx2x *bp) 948 { 949 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */ 950 bp->dcbx_config_params.admin_ets_willing = 1; 951 bp->dcbx_config_params.admin_pfc_willing = 1; 952 bp->dcbx_config_params.overwrite_settings = 1; 953 bp->dcbx_config_params.admin_ets_enable = 1; 954 bp->dcbx_config_params.admin_pfc_enable = 1; 955 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1; 956 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 957 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 958 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 959 bp->dcbx_config_params.admin_ets_reco_valid = 1; 960 bp->dcbx_config_params.admin_app_priority_willing = 1; 961 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100; 962 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0; 963 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0; 964 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0; 965 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0; 966 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0; 967 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0; 968 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0; 969 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0; 970 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0; 971 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0; 972 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0; 973 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0; 974 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0; 975 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0; 976 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0; 977 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100; 978 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0; 979 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0; 980 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0; 981 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0; 982 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0; 983 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0; 984 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0; 985 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0; 986 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1; 987 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2; 988 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3; 989 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4; 990 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5; 991 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6; 992 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7; 993 bp->dcbx_config_params.admin_pfc_bitmap = 0x0; 994 bp->dcbx_config_params.admin_priority_app_table[0].valid = 0; 995 bp->dcbx_config_params.admin_priority_app_table[1].valid = 0; 996 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0; 997 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0; 998 bp->dcbx_config_params.admin_default_priority = 0; 999 } 1000 1001 void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem) 1002 { 1003 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE; 1004 1005 /* only PMF can send ADMIN msg to MFW in old MFW versions */ 1006 if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF))) 1007 return; 1008 1009 if (bp->dcbx_enabled <= 0) 1010 return; 1011 1012 /* validate: 1013 * chip of good for dcbx version, 1014 * dcb is wanted 1015 * shmem2 contains DCBX support fields 1016 */ 1017 DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n", 1018 bp->dcb_state, bp->port.pmf); 1019 1020 if (bp->dcb_state == BNX2X_DCB_STATE_ON && 1021 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) { 1022 dcbx_lldp_params_offset = 1023 SHMEM2_RD(bp, dcbx_lldp_params_offset); 1024 1025 DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n", 1026 dcbx_lldp_params_offset); 1027 1028 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0); 1029 1030 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) { 1031 /* need HW lock to avoid scenario of two drivers 1032 * writing in parallel to shmem 1033 */ 1034 bnx2x_acquire_hw_lock(bp, 1035 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1036 if (update_shmem) 1037 bnx2x_dcbx_admin_mib_updated_params(bp, 1038 dcbx_lldp_params_offset); 1039 1040 /* Let HW start negotiation */ 1041 bnx2x_fw_command(bp, 1042 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0); 1043 /* release HW lock only after MFW acks that it finished 1044 * reading values from shmem 1045 */ 1046 bnx2x_release_hw_lock(bp, 1047 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1048 } 1049 } 1050 } 1051 static void 1052 bnx2x_dcbx_print_cos_params(struct bnx2x *bp, 1053 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1054 { 1055 u8 pri = 0; 1056 u8 cos = 0; 1057 1058 DP(BNX2X_MSG_DCB, 1059 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version); 1060 DP(BNX2X_MSG_DCB, 1061 "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n", 1062 bp->dcbx_port_params.pfc.priority_non_pauseable_mask); 1063 1064 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) { 1065 DP(BNX2X_MSG_DCB, 1066 "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n", 1067 cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask); 1068 1069 DP(BNX2X_MSG_DCB, 1070 "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n", 1071 cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl); 1072 1073 DP(BNX2X_MSG_DCB, 1074 "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n", 1075 cos, bp->dcbx_port_params.ets.cos_params[cos].strict); 1076 1077 DP(BNX2X_MSG_DCB, 1078 "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n", 1079 cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable); 1080 } 1081 1082 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1083 DP(BNX2X_MSG_DCB, 1084 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n", 1085 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority); 1086 1087 DP(BNX2X_MSG_DCB, 1088 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n", 1089 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos); 1090 } 1091 } 1092 1093 /* fills help_data according to pg_info */ 1094 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 1095 u32 *pg_pri_orginal_spread, 1096 struct pg_help_data *help_data) 1097 { 1098 bool pg_found = false; 1099 u32 i, traf_type, add_traf_type, add_pg; 1100 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1101 struct pg_entry_help_data *data = help_data->data; /*shortcut*/ 1102 1103 /* Set to invalid */ 1104 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 1105 data[i].pg = DCBX_ILLEGAL_PG; 1106 1107 for (add_traf_type = 0; 1108 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) { 1109 pg_found = false; 1110 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) { 1111 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]]; 1112 for (traf_type = 0; 1113 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1114 traf_type++) { 1115 if (data[traf_type].pg == add_pg) { 1116 if (!(data[traf_type].pg_priority & 1117 (1 << ttp[add_traf_type]))) 1118 data[traf_type]. 1119 num_of_dif_pri++; 1120 data[traf_type].pg_priority |= 1121 (1 << ttp[add_traf_type]); 1122 pg_found = true; 1123 break; 1124 } 1125 } 1126 if (false == pg_found) { 1127 data[help_data->num_of_pg].pg = add_pg; 1128 data[help_data->num_of_pg].pg_priority = 1129 (1 << ttp[add_traf_type]); 1130 data[help_data->num_of_pg].num_of_dif_pri = 1; 1131 help_data->num_of_pg++; 1132 } 1133 } 1134 DP(BNX2X_MSG_DCB, 1135 "add_traf_type %d pg_found %s num_of_pg %d\n", 1136 add_traf_type, (false == pg_found) ? "NO" : "YES", 1137 help_data->num_of_pg); 1138 } 1139 } 1140 1141 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp, 1142 struct cos_help_data *cos_data, 1143 u32 pri_join_mask) 1144 { 1145 /* Only one priority than only one COS */ 1146 cos_data->data[0].pausable = 1147 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1148 cos_data->data[0].pri_join_mask = pri_join_mask; 1149 cos_data->data[0].cos_bw = 100; 1150 cos_data->num_of_cos = 1; 1151 } 1152 1153 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp, 1154 struct cos_entry_help_data *data, 1155 u8 pg_bw) 1156 { 1157 if (data->cos_bw == DCBX_INVALID_COS_BW) 1158 data->cos_bw = pg_bw; 1159 else 1160 data->cos_bw += pg_bw; 1161 } 1162 1163 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 1164 struct cos_help_data *cos_data, 1165 u32 *pg_pri_orginal_spread, 1166 struct dcbx_ets_feature *ets) 1167 { 1168 u32 pri_tested = 0; 1169 u8 i = 0; 1170 u8 entry = 0; 1171 u8 pg_entry = 0; 1172 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1173 1174 cos_data->data[0].pausable = true; 1175 cos_data->data[1].pausable = false; 1176 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1177 1178 for (i = 0 ; i < num_of_pri ; i++) { 1179 pri_tested = 1 << bp->dcbx_port_params. 1180 app.traffic_type_priority[i]; 1181 1182 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) { 1183 cos_data->data[1].pri_join_mask |= pri_tested; 1184 entry = 1; 1185 } else { 1186 cos_data->data[0].pri_join_mask |= pri_tested; 1187 entry = 0; 1188 } 1189 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params. 1190 app.traffic_type_priority[i]]; 1191 /* There can be only one strict pg */ 1192 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) 1193 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry], 1194 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry)); 1195 else 1196 /* If we join a group and one is strict 1197 * than the bw rules 1198 */ 1199 cos_data->data[entry].strict = 1200 BNX2X_DCBX_STRICT_COS_HIGHEST; 1201 } 1202 if ((0 == cos_data->data[0].pri_join_mask) && 1203 (0 == cos_data->data[1].pri_join_mask)) 1204 BNX2X_ERR("dcbx error: Both groups must have priorities\n"); 1205 } 1206 1207 #ifndef POWER_OF_2 1208 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) 1209 #endif 1210 1211 static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp, 1212 struct pg_help_data *pg_help_data, 1213 struct cos_help_data *cos_data, 1214 u32 pri_join_mask, 1215 u8 num_of_dif_pri) 1216 { 1217 u8 i = 0; 1218 u32 pri_tested = 0; 1219 u32 pri_mask_without_pri = 0; 1220 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1221 /*debug*/ 1222 if (num_of_dif_pri == 1) { 1223 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask); 1224 return; 1225 } 1226 /* single priority group */ 1227 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1228 /* If there are both pauseable and non-pauseable priorities, 1229 * the pauseable priorities go to the first queue and 1230 * the non-pauseable priorities go to the second queue. 1231 */ 1232 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1233 /* Pauseable */ 1234 cos_data->data[0].pausable = true; 1235 /* Non pauseable.*/ 1236 cos_data->data[1].pausable = false; 1237 1238 if (2 == num_of_dif_pri) { 1239 cos_data->data[0].cos_bw = 50; 1240 cos_data->data[1].cos_bw = 50; 1241 } 1242 1243 if (3 == num_of_dif_pri) { 1244 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp, 1245 pri_join_mask))) { 1246 cos_data->data[0].cos_bw = 33; 1247 cos_data->data[1].cos_bw = 67; 1248 } else { 1249 cos_data->data[0].cos_bw = 67; 1250 cos_data->data[1].cos_bw = 33; 1251 } 1252 } 1253 1254 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) { 1255 /* If there are only pauseable priorities, 1256 * then one/two priorities go to the first queue 1257 * and one priority goes to the second queue. 1258 */ 1259 if (2 == num_of_dif_pri) { 1260 cos_data->data[0].cos_bw = 50; 1261 cos_data->data[1].cos_bw = 50; 1262 } else { 1263 cos_data->data[0].cos_bw = 67; 1264 cos_data->data[1].cos_bw = 33; 1265 } 1266 cos_data->data[1].pausable = true; 1267 cos_data->data[0].pausable = true; 1268 /* All priorities except FCOE */ 1269 cos_data->data[0].pri_join_mask = (pri_join_mask & 1270 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]))); 1271 /* Only FCOE priority.*/ 1272 cos_data->data[1].pri_join_mask = 1273 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]); 1274 } else 1275 /* If there are only non-pauseable priorities, 1276 * they will all go to the same queue. 1277 */ 1278 bnx2x_dcbx_ets_disabled_entry_data(bp, 1279 cos_data, pri_join_mask); 1280 } else { 1281 /* priority group which is not BW limited (PG#15):*/ 1282 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1283 /* If there are both pauseable and non-pauseable 1284 * priorities, the pauseable priorities go to the first 1285 * queue and the non-pauseable priorities 1286 * go to the second queue. 1287 */ 1288 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) > 1289 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) { 1290 cos_data->data[0].strict = 1291 BNX2X_DCBX_STRICT_COS_HIGHEST; 1292 cos_data->data[1].strict = 1293 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1294 BNX2X_DCBX_STRICT_COS_HIGHEST); 1295 } else { 1296 cos_data->data[0].strict = 1297 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1298 BNX2X_DCBX_STRICT_COS_HIGHEST); 1299 cos_data->data[1].strict = 1300 BNX2X_DCBX_STRICT_COS_HIGHEST; 1301 } 1302 /* Pauseable */ 1303 cos_data->data[0].pausable = true; 1304 /* Non pause-able.*/ 1305 cos_data->data[1].pausable = false; 1306 } else { 1307 /* If there are only pauseable priorities or 1308 * only non-pauseable,* the lower priorities go 1309 * to the first queue and the higher priorities go 1310 * to the second queue. 1311 */ 1312 cos_data->data[0].pausable = 1313 cos_data->data[1].pausable = 1314 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1315 1316 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) { 1317 pri_tested = 1 << bp->dcbx_port_params. 1318 app.traffic_type_priority[i]; 1319 /* Remove priority tested */ 1320 pri_mask_without_pri = 1321 (pri_join_mask & ((u8)(~pri_tested))); 1322 if (pri_mask_without_pri < pri_tested) 1323 break; 1324 } 1325 1326 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX) 1327 BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n"); 1328 1329 cos_data->data[0].pri_join_mask = pri_mask_without_pri; 1330 cos_data->data[1].pri_join_mask = pri_tested; 1331 /* Both queues are strict priority, 1332 * and that with the highest priority 1333 * gets the highest strict priority in the arbiter. 1334 */ 1335 cos_data->data[0].strict = 1336 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1337 BNX2X_DCBX_STRICT_COS_HIGHEST); 1338 cos_data->data[1].strict = 1339 BNX2X_DCBX_STRICT_COS_HIGHEST; 1340 } 1341 } 1342 } 1343 1344 static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1345 struct bnx2x *bp, 1346 struct pg_help_data *pg_help_data, 1347 struct dcbx_ets_feature *ets, 1348 struct cos_help_data *cos_data, 1349 u32 *pg_pri_orginal_spread, 1350 u32 pri_join_mask, 1351 u8 num_of_dif_pri) 1352 { 1353 u8 i = 0; 1354 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 }; 1355 1356 /* If there are both pauseable and non-pauseable priorities, 1357 * the pauseable priorities go to the first queue and 1358 * the non-pauseable priorities go to the second queue. 1359 */ 1360 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1361 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1362 pg_help_data->data[0].pg_priority) || 1363 IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1364 pg_help_data->data[1].pg_priority)) { 1365 /* If one PG contains both pauseable and 1366 * non-pauseable priorities then ETS is disabled. 1367 */ 1368 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data, 1369 pg_pri_orginal_spread, ets); 1370 bp->dcbx_port_params.ets.enabled = false; 1371 return; 1372 } 1373 1374 /* Pauseable */ 1375 cos_data->data[0].pausable = true; 1376 /* Non pauseable. */ 1377 cos_data->data[1].pausable = false; 1378 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, 1379 pg_help_data->data[0].pg_priority)) { 1380 /* 0 is pauseable */ 1381 cos_data->data[0].pri_join_mask = 1382 pg_help_data->data[0].pg_priority; 1383 pg[0] = pg_help_data->data[0].pg; 1384 cos_data->data[1].pri_join_mask = 1385 pg_help_data->data[1].pg_priority; 1386 pg[1] = pg_help_data->data[1].pg; 1387 } else {/* 1 is pauseable */ 1388 cos_data->data[0].pri_join_mask = 1389 pg_help_data->data[1].pg_priority; 1390 pg[0] = pg_help_data->data[1].pg; 1391 cos_data->data[1].pri_join_mask = 1392 pg_help_data->data[0].pg_priority; 1393 pg[1] = pg_help_data->data[0].pg; 1394 } 1395 } else { 1396 /* If there are only pauseable priorities or 1397 * only non-pauseable, each PG goes to a queue. 1398 */ 1399 cos_data->data[0].pausable = cos_data->data[1].pausable = 1400 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1401 cos_data->data[0].pri_join_mask = 1402 pg_help_data->data[0].pg_priority; 1403 pg[0] = pg_help_data->data[0].pg; 1404 cos_data->data[1].pri_join_mask = 1405 pg_help_data->data[1].pg_priority; 1406 pg[1] = pg_help_data->data[1].pg; 1407 } 1408 1409 /* There can be only one strict pg */ 1410 for (i = 0 ; i < ARRAY_SIZE(pg); i++) { 1411 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES) 1412 cos_data->data[i].cos_bw = 1413 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]); 1414 else 1415 cos_data->data[i].strict = 1416 BNX2X_DCBX_STRICT_COS_HIGHEST; 1417 } 1418 } 1419 1420 static int bnx2x_dcbx_join_pgs( 1421 struct bnx2x *bp, 1422 struct dcbx_ets_feature *ets, 1423 struct pg_help_data *pg_help_data, 1424 u8 required_num_of_pg) 1425 { 1426 u8 entry_joined = pg_help_data->num_of_pg - 1; 1427 u8 entry_removed = entry_joined + 1; 1428 u8 pg_joined = 0; 1429 1430 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data) 1431 <= pg_help_data->num_of_pg) { 1432 1433 BNX2X_ERR("required_num_of_pg can't be zero\n"); 1434 return -EINVAL; 1435 } 1436 1437 while (required_num_of_pg < pg_help_data->num_of_pg) { 1438 entry_joined = pg_help_data->num_of_pg - 2; 1439 entry_removed = entry_joined + 1; 1440 /* protect index */ 1441 entry_removed %= ARRAY_SIZE(pg_help_data->data); 1442 1443 pg_help_data->data[entry_joined].pg_priority |= 1444 pg_help_data->data[entry_removed].pg_priority; 1445 1446 pg_help_data->data[entry_joined].num_of_dif_pri += 1447 pg_help_data->data[entry_removed].num_of_dif_pri; 1448 1449 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG || 1450 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG) 1451 /* Entries joined strict priority rules */ 1452 pg_help_data->data[entry_joined].pg = 1453 DCBX_STRICT_PRI_PG; 1454 else { 1455 /* Entries can be joined join BW */ 1456 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl, 1457 pg_help_data->data[entry_joined].pg) + 1458 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1459 pg_help_data->data[entry_removed].pg); 1460 1461 DCBX_PG_BW_SET(ets->pg_bw_tbl, 1462 pg_help_data->data[entry_joined].pg, pg_joined); 1463 } 1464 /* Joined the entries */ 1465 pg_help_data->num_of_pg--; 1466 } 1467 1468 return 0; 1469 } 1470 1471 static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1472 struct bnx2x *bp, 1473 struct pg_help_data *pg_help_data, 1474 struct dcbx_ets_feature *ets, 1475 struct cos_help_data *cos_data, 1476 u32 *pg_pri_orginal_spread, 1477 u32 pri_join_mask, 1478 u8 num_of_dif_pri) 1479 { 1480 u8 i = 0; 1481 u32 pri_tested = 0; 1482 u8 entry = 0; 1483 u8 pg_entry = 0; 1484 bool b_found_strict = false; 1485 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1486 1487 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1488 /* If there are both pauseable and non-pauseable priorities, 1489 * the pauseable priorities go to the first queue and the 1490 * non-pauseable priorities go to the second queue. 1491 */ 1492 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) 1493 bnx2x_dcbx_separate_pauseable_from_non(bp, 1494 cos_data, pg_pri_orginal_spread, ets); 1495 else { 1496 /* If two BW-limited PG-s were combined to one queue, 1497 * the BW is their sum. 1498 * 1499 * If there are only pauseable priorities or only non-pauseable, 1500 * and there are both BW-limited and non-BW-limited PG-s, 1501 * the BW-limited PG/s go to one queue and the non-BW-limited 1502 * PG/s go to the second queue. 1503 * 1504 * If there are only pauseable priorities or only non-pauseable 1505 * and all are BW limited, then two priorities go to the first 1506 * queue and one priority goes to the second queue. 1507 * 1508 * We will join this two cases: 1509 * if one is BW limited it will go to the second queue 1510 * otherwise the last priority will get it 1511 */ 1512 1513 cos_data->data[0].pausable = cos_data->data[1].pausable = 1514 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1515 1516 for (i = 0 ; i < num_of_pri; i++) { 1517 pri_tested = 1 << bp->dcbx_port_params. 1518 app.traffic_type_priority[i]; 1519 pg_entry = (u8)pg_pri_orginal_spread[bp-> 1520 dcbx_port_params.app.traffic_type_priority[i]]; 1521 1522 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1523 entry = 0; 1524 1525 if (i == (num_of_pri-1) && 1526 false == b_found_strict) 1527 /* last entry will be handled separately 1528 * If no priority is strict than last 1529 * entry goes to last queue. 1530 */ 1531 entry = 1; 1532 cos_data->data[entry].pri_join_mask |= 1533 pri_tested; 1534 bnx2x_dcbx_add_to_cos_bw(bp, 1535 &cos_data->data[entry], 1536 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1537 pg_entry)); 1538 } else { 1539 b_found_strict = true; 1540 cos_data->data[1].pri_join_mask |= pri_tested; 1541 /* If we join a group and one is strict 1542 * than the bw rules 1543 */ 1544 cos_data->data[1].strict = 1545 BNX2X_DCBX_STRICT_COS_HIGHEST; 1546 } 1547 } 1548 } 1549 } 1550 1551 static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, 1552 struct pg_help_data *help_data, 1553 struct dcbx_ets_feature *ets, 1554 struct cos_help_data *cos_data, 1555 u32 *pg_pri_orginal_spread, 1556 u32 pri_join_mask, 1557 u8 num_of_dif_pri) 1558 { 1559 /* default E2 settings */ 1560 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2; 1561 1562 switch (help_data->num_of_pg) { 1563 case 1: 1564 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params( 1565 bp, 1566 help_data, 1567 cos_data, 1568 pri_join_mask, 1569 num_of_dif_pri); 1570 break; 1571 case 2: 1572 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1573 bp, 1574 help_data, 1575 ets, 1576 cos_data, 1577 pg_pri_orginal_spread, 1578 pri_join_mask, 1579 num_of_dif_pri); 1580 break; 1581 1582 case 3: 1583 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1584 bp, 1585 help_data, 1586 ets, 1587 cos_data, 1588 pg_pri_orginal_spread, 1589 pri_join_mask, 1590 num_of_dif_pri); 1591 break; 1592 default: 1593 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n"); 1594 bnx2x_dcbx_ets_disabled_entry_data(bp, 1595 cos_data, pri_join_mask); 1596 } 1597 } 1598 1599 static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp, 1600 struct cos_help_data *cos_data, 1601 u8 entry, 1602 u8 num_spread_of_entries, 1603 u8 strict_app_pris) 1604 { 1605 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST; 1606 u8 num_of_app_pri = MAX_PFC_PRIORITIES; 1607 u8 app_pri_bit = 0; 1608 1609 while (num_spread_of_entries && num_of_app_pri > 0) { 1610 app_pri_bit = 1 << (num_of_app_pri - 1); 1611 if (app_pri_bit & strict_app_pris) { 1612 struct cos_entry_help_data *data = &cos_data-> 1613 data[entry]; 1614 num_spread_of_entries--; 1615 if (num_spread_of_entries == 0) { 1616 /* last entry needed put all the entries left */ 1617 data->cos_bw = DCBX_INVALID_COS_BW; 1618 data->strict = strict_pri; 1619 data->pri_join_mask = strict_app_pris; 1620 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1621 data->pri_join_mask); 1622 } else { 1623 strict_app_pris &= ~app_pri_bit; 1624 1625 data->cos_bw = DCBX_INVALID_COS_BW; 1626 data->strict = strict_pri; 1627 data->pri_join_mask = app_pri_bit; 1628 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1629 data->pri_join_mask); 1630 } 1631 1632 strict_pri = 1633 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri); 1634 entry++; 1635 } 1636 1637 num_of_app_pri--; 1638 } 1639 1640 if (num_spread_of_entries) { 1641 BNX2X_ERR("Didn't succeed to spread strict priorities\n"); 1642 return -EINVAL; 1643 } 1644 1645 return 0; 1646 } 1647 1648 static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp, 1649 struct cos_help_data *cos_data, 1650 u8 entry, 1651 u8 num_spread_of_entries, 1652 u8 strict_app_pris) 1653 { 1654 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry, 1655 num_spread_of_entries, 1656 strict_app_pris)) { 1657 struct cos_entry_help_data *data = &cos_data-> 1658 data[entry]; 1659 /* Fill BW entry */ 1660 data->cos_bw = DCBX_INVALID_COS_BW; 1661 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST; 1662 data->pri_join_mask = strict_app_pris; 1663 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1664 data->pri_join_mask); 1665 return 1; 1666 } 1667 1668 return num_spread_of_entries; 1669 } 1670 1671 static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp, 1672 struct pg_help_data *help_data, 1673 struct dcbx_ets_feature *ets, 1674 struct cos_help_data *cos_data, 1675 u32 pri_join_mask) 1676 1677 { 1678 u8 need_num_of_entries = 0; 1679 u8 i = 0; 1680 u8 entry = 0; 1681 1682 /* 1683 * if the number of requested PG-s in CEE is greater than 3 1684 * then the results are not determined since this is a violation 1685 * of the standard. 1686 */ 1687 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) { 1688 if (bnx2x_dcbx_join_pgs(bp, ets, help_data, 1689 DCBX_COS_MAX_NUM_E3B0)) { 1690 BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n"); 1691 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, 1692 pri_join_mask); 1693 return; 1694 } 1695 } 1696 1697 for (i = 0 ; i < help_data->num_of_pg; i++) { 1698 struct pg_entry_help_data *pg = &help_data->data[i]; 1699 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1700 struct cos_entry_help_data *data = &cos_data-> 1701 data[entry]; 1702 /* Fill BW entry */ 1703 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg); 1704 data->strict = BNX2X_DCBX_STRICT_INVALID; 1705 data->pri_join_mask = pg->pg_priority; 1706 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1707 data->pri_join_mask); 1708 1709 entry++; 1710 } else { 1711 need_num_of_entries = min_t(u8, 1712 (u8)pg->num_of_dif_pri, 1713 (u8)DCBX_COS_MAX_NUM_E3B0 - 1714 help_data->num_of_pg + 1); 1715 /* 1716 * If there are still VOQ-s which have no associated PG, 1717 * then associate these VOQ-s to PG15. These PG-s will 1718 * be used for SP between priorities on PG15. 1719 */ 1720 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data, 1721 entry, need_num_of_entries, pg->pg_priority); 1722 } 1723 } 1724 1725 /* the entry will represent the number of COSes used */ 1726 cos_data->num_of_cos = entry; 1727 } 1728 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 1729 struct pg_help_data *help_data, 1730 struct dcbx_ets_feature *ets, 1731 u32 *pg_pri_orginal_spread) 1732 { 1733 struct cos_help_data cos_data; 1734 u8 i = 0; 1735 u32 pri_join_mask = 0; 1736 u8 num_of_dif_pri = 0; 1737 1738 memset(&cos_data, 0, sizeof(cos_data)); 1739 1740 /* Validate the pg value */ 1741 for (i = 0; i < help_data->num_of_pg ; i++) { 1742 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg && 1743 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg) 1744 BNX2X_ERR("Invalid pg[%d] data %x\n", i, 1745 help_data->data[i].pg); 1746 pri_join_mask |= help_data->data[i].pg_priority; 1747 num_of_dif_pri += help_data->data[i].num_of_dif_pri; 1748 } 1749 1750 /* defaults */ 1751 cos_data.num_of_cos = 1; 1752 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) { 1753 cos_data.data[i].pri_join_mask = 0; 1754 cos_data.data[i].pausable = false; 1755 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID; 1756 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW; 1757 } 1758 1759 if (CHIP_IS_E3B0(bp)) 1760 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets, 1761 &cos_data, pri_join_mask); 1762 else /* E2 + E3A0 */ 1763 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp, 1764 help_data, ets, 1765 &cos_data, 1766 pg_pri_orginal_spread, 1767 pri_join_mask, 1768 num_of_dif_pri); 1769 1770 for (i = 0; i < cos_data.num_of_cos ; i++) { 1771 struct bnx2x_dcbx_cos_params *p = 1772 &bp->dcbx_port_params.ets.cos_params[i]; 1773 1774 p->strict = cos_data.data[i].strict; 1775 p->bw_tbl = cos_data.data[i].cos_bw; 1776 p->pri_bitmask = cos_data.data[i].pri_join_mask; 1777 p->pauseable = cos_data.data[i].pausable; 1778 1779 /* sanity */ 1780 if (p->bw_tbl != DCBX_INVALID_COS_BW || 1781 p->strict != BNX2X_DCBX_STRICT_INVALID) { 1782 if (p->pri_bitmask == 0) 1783 BNX2X_ERR("Invalid pri_bitmask for %d\n", i); 1784 1785 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) { 1786 1787 if (p->pauseable && 1788 DCBX_PFC_PRI_GET_NON_PAUSE(bp, 1789 p->pri_bitmask) != 0) 1790 BNX2X_ERR("Inconsistent config for pausable COS %d\n", 1791 i); 1792 1793 if (!p->pauseable && 1794 DCBX_PFC_PRI_GET_PAUSE(bp, 1795 p->pri_bitmask) != 0) 1796 BNX2X_ERR("Inconsistent config for nonpausable COS %d\n", 1797 i); 1798 } 1799 } 1800 1801 if (p->pauseable) 1802 DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n", 1803 i, cos_data.data[i].pri_join_mask); 1804 else 1805 DP(BNX2X_MSG_DCB, 1806 "COS %d NONPAUSABLE prijoinmask 0x%x\n", 1807 i, cos_data.data[i].pri_join_mask); 1808 } 1809 1810 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ; 1811 } 1812 1813 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 1814 u32 *set_configuration_ets_pg, 1815 u32 *pri_pg_tbl) 1816 { 1817 int i; 1818 1819 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 1820 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i); 1821 1822 DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n", 1823 i, set_configuration_ets_pg[i]); 1824 } 1825 } 1826 1827 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 1828 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1829 { 1830 u16 pri_bit = 0; 1831 u8 cos = 0, pri = 0; 1832 struct priority_cos *tt2cos; 1833 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1834 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 1835 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1836 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 1837 1838 memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg)); 1839 1840 /* to disable DCB - the structure must be zeroed */ 1841 if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured) 1842 return; 1843 1844 /*shortcut*/ 1845 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos; 1846 1847 /* Fw version should be incremented each update */ 1848 pfc_fw_cfg->dcb_version = ++bp->dcb_version; 1849 pfc_fw_cfg->dcb_enabled = 1; 1850 1851 /* Fill priority parameters */ 1852 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1853 tt2cos[pri].priority = ttp[pri]; 1854 pri_bit = 1 << tt2cos[pri].priority; 1855 1856 /* Fill COS parameters based on COS calculated to 1857 * make it more general for future use */ 1858 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) 1859 if (bp->dcbx_port_params.ets.cos_params[cos]. 1860 pri_bitmask & pri_bit) 1861 tt2cos[pri].cos = cos; 1862 } 1863 1864 /* we never want the FW to add a 0 vlan tag */ 1865 pfc_fw_cfg->dont_add_pri_0_en = 1; 1866 1867 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg); 1868 } 1869 1870 void bnx2x_dcbx_pmf_update(struct bnx2x *bp) 1871 { 1872 /* if we need to synchronize DCBX result from prev PMF 1873 * read it from shmem and update bp and netdev accordingly 1874 */ 1875 if (SHMEM2_HAS(bp, drv_flags) && 1876 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) { 1877 /* Read neg results if dcbx is in the FW */ 1878 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 1879 return; 1880 1881 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1882 bp->dcbx_error); 1883 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1884 bp->dcbx_error); 1885 #ifdef BCM_DCBNL 1886 /* 1887 * Add new app tlvs to dcbnl 1888 */ 1889 bnx2x_dcbnl_update_applist(bp, false); 1890 /* 1891 * Send a notification for the new negotiated parameters 1892 */ 1893 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 1894 #endif 1895 /* 1896 * reconfigure the netdevice with the results of the new 1897 * dcbx negotiation. 1898 */ 1899 bnx2x_dcbx_update_tc_mapping(bp); 1900 } 1901 } 1902 1903 /* DCB netlink */ 1904 #ifdef BCM_DCBNL 1905 1906 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \ 1907 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC) 1908 1909 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp) 1910 { 1911 /* validate dcbnl call that may change HW state: 1912 * DCB is on and DCBX mode was SUCCESSFULLY set by the user. 1913 */ 1914 return bp->dcb_state && bp->dcbx_mode_uset; 1915 } 1916 1917 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev) 1918 { 1919 struct bnx2x *bp = netdev_priv(netdev); 1920 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state); 1921 return bp->dcb_state; 1922 } 1923 1924 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state) 1925 { 1926 struct bnx2x *bp = netdev_priv(netdev); 1927 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 1928 1929 /* Fail to set state to "enabled" if dcbx is disabled in nvram */ 1930 if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) || 1931 (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) { 1932 DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n"); 1933 return 1; 1934 } 1935 1936 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled); 1937 return 0; 1938 } 1939 1940 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev, 1941 u8 *perm_addr) 1942 { 1943 struct bnx2x *bp = netdev_priv(netdev); 1944 DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n"); 1945 1946 /* first the HW mac address */ 1947 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len); 1948 1949 if (CNIC_LOADED(bp)) 1950 /* second SAN address */ 1951 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, 1952 netdev->addr_len); 1953 } 1954 1955 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio, 1956 u8 prio_type, u8 pgid, u8 bw_pct, 1957 u8 up_map) 1958 { 1959 struct bnx2x *bp = netdev_priv(netdev); 1960 1961 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid); 1962 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 1963 return; 1964 1965 /** 1966 * bw_pct ignored - band-width percentage devision between user 1967 * priorities within the same group is not 1968 * standard and hence not supported 1969 * 1970 * prio_type ignored - priority levels within the same group are not 1971 * standard and hence are not supported. According 1972 * to the standard pgid 15 is dedicated to strict 1973 * priority traffic (on the port level). 1974 * 1975 * up_map ignored 1976 */ 1977 1978 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid; 1979 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1980 } 1981 1982 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev, 1983 int pgid, u8 bw_pct) 1984 { 1985 struct bnx2x *bp = netdev_priv(netdev); 1986 DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct); 1987 1988 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 1989 return; 1990 1991 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct; 1992 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1993 } 1994 1995 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio, 1996 u8 prio_type, u8 pgid, u8 bw_pct, 1997 u8 up_map) 1998 { 1999 struct bnx2x *bp = netdev_priv(netdev); 2000 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 2001 } 2002 2003 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev, 2004 int pgid, u8 bw_pct) 2005 { 2006 struct bnx2x *bp = netdev_priv(netdev); 2007 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 2008 } 2009 2010 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio, 2011 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2012 u8 *up_map) 2013 { 2014 struct bnx2x *bp = netdev_priv(netdev); 2015 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2016 2017 /** 2018 * bw_pct ignored - band-width percentage devision between user 2019 * priorities within the same group is not 2020 * standard and hence not supported 2021 * 2022 * prio_type ignored - priority levels within the same group are not 2023 * standard and hence are not supported. According 2024 * to the standard pgid 15 is dedicated to strict 2025 * priority traffic (on the port level). 2026 * 2027 * up_map ignored 2028 */ 2029 *up_map = *bw_pct = *prio_type = *pgid = 0; 2030 2031 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 2032 return; 2033 2034 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio); 2035 } 2036 2037 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev, 2038 int pgid, u8 *bw_pct) 2039 { 2040 struct bnx2x *bp = netdev_priv(netdev); 2041 DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid); 2042 2043 *bw_pct = 0; 2044 2045 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 2046 return; 2047 2048 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid); 2049 } 2050 2051 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio, 2052 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2053 u8 *up_map) 2054 { 2055 struct bnx2x *bp = netdev_priv(netdev); 2056 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2057 2058 *prio_type = *pgid = *bw_pct = *up_map = 0; 2059 } 2060 2061 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev, 2062 int pgid, u8 *bw_pct) 2063 { 2064 struct bnx2x *bp = netdev_priv(netdev); 2065 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2066 2067 *bw_pct = 0; 2068 } 2069 2070 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio, 2071 u8 setting) 2072 { 2073 struct bnx2x *bp = netdev_priv(netdev); 2074 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting); 2075 2076 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES) 2077 return; 2078 2079 if (setting) { 2080 bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio); 2081 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 2082 } else { 2083 bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio); 2084 } 2085 } 2086 2087 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio, 2088 u8 *setting) 2089 { 2090 struct bnx2x *bp = netdev_priv(netdev); 2091 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2092 2093 *setting = 0; 2094 2095 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES) 2096 return; 2097 2098 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1; 2099 } 2100 2101 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev) 2102 { 2103 struct bnx2x *bp = netdev_priv(netdev); 2104 int rc = 0; 2105 2106 DP(BNX2X_MSG_DCB, "SET-ALL\n"); 2107 2108 if (!bnx2x_dcbnl_set_valid(bp)) 2109 return 1; 2110 2111 if (bp->recovery_state != BNX2X_RECOVERY_DONE) { 2112 netdev_err(bp->dev, 2113 "Handling parity error recovery. Try again later\n"); 2114 return 1; 2115 } 2116 if (netif_running(bp->dev)) { 2117 bnx2x_update_drv_flags(bp, 2118 1 << DRV_FLAGS_DCB_MFW_CONFIGURED, 2119 1); 2120 bnx2x_dcbx_init(bp, true); 2121 } 2122 DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc); 2123 if (rc) 2124 return 1; 2125 2126 return 0; 2127 } 2128 2129 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap) 2130 { 2131 struct bnx2x *bp = netdev_priv(netdev); 2132 u8 rval = 0; 2133 2134 if (bp->dcb_state) { 2135 switch (capid) { 2136 case DCB_CAP_ATTR_PG: 2137 *cap = true; 2138 break; 2139 case DCB_CAP_ATTR_PFC: 2140 *cap = true; 2141 break; 2142 case DCB_CAP_ATTR_UP2TC: 2143 *cap = false; 2144 break; 2145 case DCB_CAP_ATTR_PG_TCS: 2146 *cap = 0x80; /* 8 priorities for PGs */ 2147 break; 2148 case DCB_CAP_ATTR_PFC_TCS: 2149 *cap = 0x80; /* 8 priorities for PFC */ 2150 break; 2151 case DCB_CAP_ATTR_GSP: 2152 *cap = true; 2153 break; 2154 case DCB_CAP_ATTR_BCN: 2155 *cap = false; 2156 break; 2157 case DCB_CAP_ATTR_DCBX: 2158 *cap = BNX2X_DCBX_CAPS; 2159 break; 2160 default: 2161 BNX2X_ERR("Non valid capability ID\n"); 2162 rval = 1; 2163 break; 2164 } 2165 } else { 2166 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2167 rval = 1; 2168 } 2169 2170 DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap); 2171 return rval; 2172 } 2173 2174 static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num) 2175 { 2176 struct bnx2x *bp = netdev_priv(netdev); 2177 u8 rval = 0; 2178 2179 DP(BNX2X_MSG_DCB, "tcid %d\n", tcid); 2180 2181 if (bp->dcb_state) { 2182 switch (tcid) { 2183 case DCB_NUMTCS_ATTR_PG: 2184 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2185 DCBX_COS_MAX_NUM_E2; 2186 break; 2187 case DCB_NUMTCS_ATTR_PFC: 2188 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2189 DCBX_COS_MAX_NUM_E2; 2190 break; 2191 default: 2192 BNX2X_ERR("Non valid TC-ID\n"); 2193 rval = 1; 2194 break; 2195 } 2196 } else { 2197 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2198 rval = 1; 2199 } 2200 2201 return rval; 2202 } 2203 2204 static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) 2205 { 2206 struct bnx2x *bp = netdev_priv(netdev); 2207 DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num); 2208 return -EINVAL; 2209 } 2210 2211 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) 2212 { 2213 struct bnx2x *bp = netdev_priv(netdev); 2214 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled); 2215 2216 if (!bp->dcb_state) 2217 return 0; 2218 2219 return bp->dcbx_local_feat.pfc.enabled; 2220 } 2221 2222 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state) 2223 { 2224 struct bnx2x *bp = netdev_priv(netdev); 2225 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 2226 2227 if (!bnx2x_dcbnl_set_valid(bp)) 2228 return; 2229 2230 bp->dcbx_config_params.admin_pfc_tx_enable = 2231 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0); 2232 } 2233 2234 static void bnx2x_admin_app_set_ent( 2235 struct bnx2x_admin_priority_app_table *app_ent, 2236 u8 idtype, u16 idval, u8 up) 2237 { 2238 app_ent->valid = 1; 2239 2240 switch (idtype) { 2241 case DCB_APP_IDTYPE_ETHTYPE: 2242 app_ent->traffic_type = TRAFFIC_TYPE_ETH; 2243 break; 2244 case DCB_APP_IDTYPE_PORTNUM: 2245 app_ent->traffic_type = TRAFFIC_TYPE_PORT; 2246 break; 2247 default: 2248 break; /* never gets here */ 2249 } 2250 app_ent->app_id = idval; 2251 app_ent->priority = up; 2252 } 2253 2254 static bool bnx2x_admin_app_is_equal( 2255 struct bnx2x_admin_priority_app_table *app_ent, 2256 u8 idtype, u16 idval) 2257 { 2258 if (!app_ent->valid) 2259 return false; 2260 2261 switch (idtype) { 2262 case DCB_APP_IDTYPE_ETHTYPE: 2263 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH) 2264 return false; 2265 break; 2266 case DCB_APP_IDTYPE_PORTNUM: 2267 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT) 2268 return false; 2269 break; 2270 default: 2271 return false; 2272 } 2273 if (app_ent->app_id != idval) 2274 return false; 2275 2276 return true; 2277 } 2278 2279 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up) 2280 { 2281 int i, ff; 2282 2283 /* iterate over the app entries looking for idtype and idval */ 2284 for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 2285 struct bnx2x_admin_priority_app_table *app_ent = 2286 &bp->dcbx_config_params.admin_priority_app_table[i]; 2287 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval)) 2288 break; 2289 2290 if (ff < 0 && !app_ent->valid) 2291 ff = i; 2292 } 2293 if (i < DCBX_CONFIG_MAX_APP_PROTOCOL) 2294 /* if found overwrite up */ 2295 bp->dcbx_config_params. 2296 admin_priority_app_table[i].priority = up; 2297 else if (ff >= 0) 2298 /* not found use first-free */ 2299 bnx2x_admin_app_set_ent( 2300 &bp->dcbx_config_params.admin_priority_app_table[ff], 2301 idtype, idval, up); 2302 else { 2303 /* app table is full */ 2304 BNX2X_ERR("Application table is too large\n"); 2305 return -EBUSY; 2306 } 2307 2308 /* up configured, if not 0 make sure feature is enabled */ 2309 if (up) 2310 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 2311 2312 return 0; 2313 } 2314 2315 static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype, 2316 u16 idval, u8 up) 2317 { 2318 struct bnx2x *bp = netdev_priv(netdev); 2319 2320 DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n", 2321 idtype, idval, up); 2322 2323 if (!bnx2x_dcbnl_set_valid(bp)) { 2324 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2325 return -EINVAL; 2326 } 2327 2328 /* verify idtype */ 2329 switch (idtype) { 2330 case DCB_APP_IDTYPE_ETHTYPE: 2331 case DCB_APP_IDTYPE_PORTNUM: 2332 break; 2333 default: 2334 DP(BNX2X_MSG_DCB, "Wrong ID type\n"); 2335 return -EINVAL; 2336 } 2337 return bnx2x_set_admin_app_up(bp, idtype, idval, up); 2338 } 2339 2340 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev) 2341 { 2342 struct bnx2x *bp = netdev_priv(netdev); 2343 u8 state; 2344 2345 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE; 2346 2347 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF) 2348 state |= DCB_CAP_DCBX_STATIC; 2349 2350 return state; 2351 } 2352 2353 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state) 2354 { 2355 struct bnx2x *bp = netdev_priv(netdev); 2356 DP(BNX2X_MSG_DCB, "state = %02x\n", state); 2357 2358 /* set dcbx mode */ 2359 2360 if ((state & BNX2X_DCBX_CAPS) != state) { 2361 BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n", 2362 state); 2363 return 1; 2364 } 2365 2366 if (bp->dcb_state != BNX2X_DCB_STATE_ON) { 2367 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n"); 2368 return 1; 2369 } 2370 2371 if (state & DCB_CAP_DCBX_STATIC) 2372 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF; 2373 else 2374 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON; 2375 2376 bp->dcbx_mode_uset = true; 2377 return 0; 2378 } 2379 2380 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, 2381 u8 *flags) 2382 { 2383 struct bnx2x *bp = netdev_priv(netdev); 2384 u8 rval = 0; 2385 2386 DP(BNX2X_MSG_DCB, "featid %d\n", featid); 2387 2388 if (bp->dcb_state) { 2389 *flags = 0; 2390 switch (featid) { 2391 case DCB_FEATCFG_ATTR_PG: 2392 if (bp->dcbx_local_feat.ets.enabled) 2393 *flags |= DCB_FEATCFG_ENABLE; 2394 if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR) 2395 *flags |= DCB_FEATCFG_ERROR; 2396 break; 2397 case DCB_FEATCFG_ATTR_PFC: 2398 if (bp->dcbx_local_feat.pfc.enabled) 2399 *flags |= DCB_FEATCFG_ENABLE; 2400 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR | 2401 DCBX_LOCAL_PFC_MISMATCH)) 2402 *flags |= DCB_FEATCFG_ERROR; 2403 break; 2404 case DCB_FEATCFG_ATTR_APP: 2405 if (bp->dcbx_local_feat.app.enabled) 2406 *flags |= DCB_FEATCFG_ENABLE; 2407 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR | 2408 DCBX_LOCAL_APP_MISMATCH)) 2409 *flags |= DCB_FEATCFG_ERROR; 2410 break; 2411 default: 2412 BNX2X_ERR("Non valid feature-ID\n"); 2413 rval = 1; 2414 break; 2415 } 2416 } else { 2417 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2418 rval = 1; 2419 } 2420 2421 return rval; 2422 } 2423 2424 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, 2425 u8 flags) 2426 { 2427 struct bnx2x *bp = netdev_priv(netdev); 2428 u8 rval = 0; 2429 2430 DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags); 2431 2432 /* ignore the 'advertise' flag */ 2433 if (bnx2x_dcbnl_set_valid(bp)) { 2434 switch (featid) { 2435 case DCB_FEATCFG_ATTR_PG: 2436 bp->dcbx_config_params.admin_ets_enable = 2437 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2438 bp->dcbx_config_params.admin_ets_willing = 2439 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2440 break; 2441 case DCB_FEATCFG_ATTR_PFC: 2442 bp->dcbx_config_params.admin_pfc_enable = 2443 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2444 bp->dcbx_config_params.admin_pfc_willing = 2445 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2446 break; 2447 case DCB_FEATCFG_ATTR_APP: 2448 /* ignore enable, always enabled */ 2449 bp->dcbx_config_params.admin_app_priority_willing = 2450 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2451 break; 2452 default: 2453 BNX2X_ERR("Non valid feature-ID\n"); 2454 rval = 1; 2455 break; 2456 } 2457 } else { 2458 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2459 rval = 1; 2460 } 2461 2462 return rval; 2463 } 2464 2465 static int bnx2x_peer_appinfo(struct net_device *netdev, 2466 struct dcb_peer_app_info *info, u16* app_count) 2467 { 2468 int i; 2469 struct bnx2x *bp = netdev_priv(netdev); 2470 2471 DP(BNX2X_MSG_DCB, "APP-INFO\n"); 2472 2473 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0; 2474 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0; 2475 *app_count = 0; 2476 2477 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) 2478 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield & 2479 DCBX_APP_ENTRY_VALID) 2480 (*app_count)++; 2481 return 0; 2482 } 2483 2484 static int bnx2x_peer_apptable(struct net_device *netdev, 2485 struct dcb_app *table) 2486 { 2487 int i, j; 2488 struct bnx2x *bp = netdev_priv(netdev); 2489 2490 DP(BNX2X_MSG_DCB, "APP-TABLE\n"); 2491 2492 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 2493 struct dcbx_app_priority_entry *ent = 2494 &bp->dcbx_remote_feat.app.app_pri_tbl[i]; 2495 2496 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 2497 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 2498 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent); 2499 table[j++].protocol = ent->app_id; 2500 } 2501 } 2502 return 0; 2503 } 2504 2505 static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg) 2506 { 2507 int i; 2508 struct bnx2x *bp = netdev_priv(netdev); 2509 2510 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0; 2511 2512 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) { 2513 pg->pg_bw[i] = 2514 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i); 2515 pg->prio_pg[i] = 2516 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i); 2517 } 2518 return 0; 2519 } 2520 2521 static int bnx2x_cee_peer_getpfc(struct net_device *netdev, 2522 struct cee_pfc *pfc) 2523 { 2524 struct bnx2x *bp = netdev_priv(netdev); 2525 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps; 2526 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap; 2527 return 0; 2528 } 2529 2530 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = { 2531 .getstate = bnx2x_dcbnl_get_state, 2532 .setstate = bnx2x_dcbnl_set_state, 2533 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr, 2534 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx, 2535 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx, 2536 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx, 2537 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx, 2538 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx, 2539 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx, 2540 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx, 2541 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx, 2542 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg, 2543 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg, 2544 .setall = bnx2x_dcbnl_set_all, 2545 .getcap = bnx2x_dcbnl_get_cap, 2546 .getnumtcs = bnx2x_dcbnl_get_numtcs, 2547 .setnumtcs = bnx2x_dcbnl_set_numtcs, 2548 .getpfcstate = bnx2x_dcbnl_get_pfc_state, 2549 .setpfcstate = bnx2x_dcbnl_set_pfc_state, 2550 .setapp = bnx2x_dcbnl_set_app_up, 2551 .getdcbx = bnx2x_dcbnl_get_dcbx, 2552 .setdcbx = bnx2x_dcbnl_set_dcbx, 2553 .getfeatcfg = bnx2x_dcbnl_get_featcfg, 2554 .setfeatcfg = bnx2x_dcbnl_set_featcfg, 2555 .peer_getappinfo = bnx2x_peer_appinfo, 2556 .peer_getapptable = bnx2x_peer_apptable, 2557 .cee_peer_getpg = bnx2x_cee_peer_getpg, 2558 .cee_peer_getpfc = bnx2x_cee_peer_getpfc, 2559 }; 2560 2561 #endif /* BCM_DCBNL */ 2562