1 /* bnx2x_dcb.c: Broadcom Everest network driver. 2 * 3 * Copyright 2009-2012 Broadcom Corporation 4 * 5 * Unless you and Broadcom execute a separate written software license 6 * agreement governing use of this software, this software is licensed to you 7 * under the terms of the GNU General Public License version 2, available 8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). 9 * 10 * Notwithstanding the above, under no circumstances may you combine this 11 * software in any way with any other Broadcom software provided under a 12 * license other than the GPL, without Broadcom's express prior written 13 * consent. 14 * 15 * Maintained by: Eilon Greenstein <eilong@broadcom.com> 16 * Written by: Dmitry Kravkov 17 * 18 */ 19 20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 21 22 #include <linux/netdevice.h> 23 #include <linux/types.h> 24 #include <linux/errno.h> 25 #include <linux/rtnetlink.h> 26 #include <net/dcbnl.h> 27 28 #include "bnx2x.h" 29 #include "bnx2x_cmn.h" 30 #include "bnx2x_dcb.h" 31 32 /* forward declarations of dcbx related functions */ 33 static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp); 34 static void bnx2x_pfc_set_pfc(struct bnx2x *bp); 35 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp); 36 static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp); 37 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 38 u32 *set_configuration_ets_pg, 39 u32 *pri_pg_tbl); 40 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 41 u32 *pg_pri_orginal_spread, 42 struct pg_help_data *help_data); 43 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 44 struct pg_help_data *help_data, 45 struct dcbx_ets_feature *ets, 46 u32 *pg_pri_orginal_spread); 47 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 48 struct cos_help_data *cos_data, 49 u32 *pg_pri_orginal_spread, 50 struct dcbx_ets_feature *ets); 51 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 52 struct bnx2x_func_tx_start_params*); 53 54 /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */ 55 static void bnx2x_read_data(struct bnx2x *bp, u32 *buff, 56 u32 addr, u32 len) 57 { 58 int i; 59 for (i = 0; i < len; i += 4, buff++) 60 *buff = REG_RD(bp, addr + i); 61 } 62 63 static void bnx2x_write_data(struct bnx2x *bp, u32 *buff, 64 u32 addr, u32 len) 65 { 66 int i; 67 for (i = 0; i < len; i += 4, buff++) 68 REG_WR(bp, addr + i, *buff); 69 } 70 71 static void bnx2x_pfc_set(struct bnx2x *bp) 72 { 73 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0}; 74 u32 pri_bit, val = 0; 75 int i; 76 77 pfc_params.num_of_rx_cos_priority_mask = 78 bp->dcbx_port_params.ets.num_of_cos; 79 80 /* Tx COS configuration */ 81 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++) 82 /* 83 * We configure only the pauseable bits (non pauseable aren't 84 * configured at all) it's done to avoid false pauses from 85 * network 86 */ 87 pfc_params.rx_cos_priority_mask[i] = 88 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask 89 & DCBX_PFC_PRI_PAUSE_MASK(bp); 90 91 /* 92 * Rx COS configuration 93 * Changing PFC RX configuration . 94 * In RX COS0 will always be configured to lossless and COS1 to lossy 95 */ 96 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) { 97 pri_bit = 1 << i; 98 99 if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))) 100 val |= 1 << (i * 4); 101 } 102 103 pfc_params.pkt_priority_to_cos = val; 104 105 /* RX COS0 */ 106 pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp); 107 /* RX COS1 */ 108 pfc_params.llfc_high_priority_classes = 0; 109 110 bnx2x_acquire_phy_lock(bp); 111 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED; 112 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params); 113 bnx2x_release_phy_lock(bp); 114 } 115 116 static void bnx2x_pfc_clear(struct bnx2x *bp) 117 { 118 struct bnx2x_nig_brb_pfc_port_params nig_params = {0}; 119 nig_params.pause_enable = 1; 120 bnx2x_acquire_phy_lock(bp); 121 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED; 122 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params); 123 bnx2x_release_phy_lock(bp); 124 } 125 126 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp, 127 struct dcbx_features *features, 128 u32 error) 129 { 130 u8 i = 0; 131 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error); 132 133 /* PG */ 134 DP(NETIF_MSG_LINK, 135 "local_mib.features.ets.enabled %x\n", features->ets.enabled); 136 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) 137 DP(NETIF_MSG_LINK, 138 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i, 139 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i)); 140 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) 141 DP(NETIF_MSG_LINK, 142 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i, 143 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i)); 144 145 /* pfc */ 146 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n", 147 features->pfc.pri_en_bitmap); 148 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n", 149 features->pfc.pfc_caps); 150 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n", 151 features->pfc.enabled); 152 153 DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n", 154 features->app.default_pri); 155 DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n", 156 features->app.tc_supported); 157 DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n", 158 features->app.enabled); 159 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 160 DP(BNX2X_MSG_DCB, 161 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n", 162 i, features->app.app_pri_tbl[i].app_id); 163 DP(BNX2X_MSG_DCB, 164 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n", 165 i, features->app.app_pri_tbl[i].pri_bitmap); 166 DP(BNX2X_MSG_DCB, 167 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n", 168 i, features->app.app_pri_tbl[i].appBitfield); 169 } 170 } 171 172 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp, 173 u8 pri_bitmap, 174 u8 llfc_traf_type) 175 { 176 u32 pri = MAX_PFC_PRIORITIES; 177 u32 index = MAX_PFC_PRIORITIES - 1; 178 u32 pri_mask; 179 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 180 181 /* Choose the highest priority */ 182 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) { 183 pri_mask = 1 << index; 184 if (GET_FLAGS(pri_bitmap, pri_mask)) 185 pri = index ; 186 index--; 187 } 188 189 if (pri < MAX_PFC_PRIORITIES) 190 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri); 191 } 192 193 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp, 194 struct dcbx_app_priority_feature *app, 195 u32 error) { 196 u8 index; 197 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 198 199 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) 200 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n"); 201 202 if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH)) 203 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n"); 204 205 if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND)) 206 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n"); 207 if (app->enabled && 208 !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH | 209 DCBX_REMOTE_APP_TLV_NOT_FOUND)) { 210 211 bp->dcbx_port_params.app.enabled = true; 212 213 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 214 ttp[index] = 0; 215 216 if (app->default_pri < MAX_PFC_PRIORITIES) 217 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri; 218 219 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) { 220 struct dcbx_app_priority_entry *entry = 221 app->app_pri_tbl; 222 223 if (GET_FLAGS(entry[index].appBitfield, 224 DCBX_APP_SF_ETH_TYPE) && 225 ETH_TYPE_FCOE == entry[index].app_id) 226 bnx2x_dcbx_get_ap_priority(bp, 227 entry[index].pri_bitmap, 228 LLFC_TRAFFIC_TYPE_FCOE); 229 230 if (GET_FLAGS(entry[index].appBitfield, 231 DCBX_APP_SF_PORT) && 232 TCP_PORT_ISCSI == entry[index].app_id) 233 bnx2x_dcbx_get_ap_priority(bp, 234 entry[index].pri_bitmap, 235 LLFC_TRAFFIC_TYPE_ISCSI); 236 } 237 } else { 238 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n"); 239 bp->dcbx_port_params.app.enabled = false; 240 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 241 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY; 242 } 243 } 244 245 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, 246 struct dcbx_ets_feature *ets, 247 u32 error) { 248 int i = 0; 249 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0}; 250 struct pg_help_data pg_help_data; 251 struct bnx2x_dcbx_cos_params *cos_params = 252 bp->dcbx_port_params.ets.cos_params; 253 254 memset(&pg_help_data, 0, sizeof(struct pg_help_data)); 255 256 257 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR)) 258 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n"); 259 260 if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND)) 261 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n"); 262 263 /* Clean up old settings of ets on COS */ 264 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) { 265 cos_params[i].pauseable = false; 266 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID; 267 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW; 268 cos_params[i].pri_bitmask = 0; 269 } 270 271 if (bp->dcbx_port_params.app.enabled && ets->enabled && 272 !GET_FLAGS(error, 273 DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) { 274 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n"); 275 bp->dcbx_port_params.ets.enabled = true; 276 277 bnx2x_dcbx_get_ets_pri_pg_tbl(bp, 278 pg_pri_orginal_spread, 279 ets->pri_pg_tbl); 280 281 bnx2x_dcbx_get_num_pg_traf_type(bp, 282 pg_pri_orginal_spread, 283 &pg_help_data); 284 285 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data, 286 ets, pg_pri_orginal_spread); 287 288 } else { 289 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n"); 290 bp->dcbx_port_params.ets.enabled = false; 291 ets->pri_pg_tbl[0] = 0; 292 293 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++) 294 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1); 295 } 296 } 297 298 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp, 299 struct dcbx_pfc_feature *pfc, u32 error) 300 { 301 302 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR)) 303 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n"); 304 305 if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND)) 306 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n"); 307 if (bp->dcbx_port_params.app.enabled && pfc->enabled && 308 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH | 309 DCBX_REMOTE_PFC_TLV_NOT_FOUND)) { 310 bp->dcbx_port_params.pfc.enabled = true; 311 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 312 ~(pfc->pri_en_bitmap); 313 } else { 314 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n"); 315 bp->dcbx_port_params.pfc.enabled = false; 316 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0; 317 } 318 } 319 320 /* maps unmapped priorities to to the same COS as L2 */ 321 static void bnx2x_dcbx_map_nw(struct bnx2x *bp) 322 { 323 int i; 324 u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */ 325 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 326 u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW]; 327 struct bnx2x_dcbx_cos_params *cos_params = 328 bp->dcbx_port_params.ets.cos_params; 329 330 /* get unmapped priorities by clearing mapped bits */ 331 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 332 unmapped &= ~(1 << ttp[i]); 333 334 /* find cos for nw prio and extend it with unmapped */ 335 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) { 336 if (cos_params[i].pri_bitmask & nw_prio) { 337 /* extend the bitmask with unmapped */ 338 DP(BNX2X_MSG_DCB, 339 "cos %d extended with 0x%08x\n", i, unmapped); 340 cos_params[i].pri_bitmask |= unmapped; 341 break; 342 } 343 } 344 } 345 346 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp, 347 struct dcbx_features *features, 348 u32 error) 349 { 350 bnx2x_dcbx_get_ap_feature(bp, &features->app, error); 351 352 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error); 353 354 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error); 355 356 bnx2x_dcbx_map_nw(bp); 357 } 358 359 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100) 360 static int bnx2x_dcbx_read_mib(struct bnx2x *bp, 361 u32 *base_mib_addr, 362 u32 offset, 363 int read_mib_type) 364 { 365 int max_try_read = 0; 366 u32 mib_size, prefix_seq_num, suffix_seq_num; 367 struct lldp_remote_mib *remote_mib ; 368 struct lldp_local_mib *local_mib; 369 370 371 switch (read_mib_type) { 372 case DCBX_READ_LOCAL_MIB: 373 mib_size = sizeof(struct lldp_local_mib); 374 break; 375 case DCBX_READ_REMOTE_MIB: 376 mib_size = sizeof(struct lldp_remote_mib); 377 break; 378 default: 379 return 1; /*error*/ 380 } 381 382 offset += BP_PORT(bp) * mib_size; 383 384 do { 385 bnx2x_read_data(bp, base_mib_addr, offset, mib_size); 386 387 max_try_read++; 388 389 switch (read_mib_type) { 390 case DCBX_READ_LOCAL_MIB: 391 local_mib = (struct lldp_local_mib *) base_mib_addr; 392 prefix_seq_num = local_mib->prefix_seq_num; 393 suffix_seq_num = local_mib->suffix_seq_num; 394 break; 395 case DCBX_READ_REMOTE_MIB: 396 remote_mib = (struct lldp_remote_mib *) base_mib_addr; 397 prefix_seq_num = remote_mib->prefix_seq_num; 398 suffix_seq_num = remote_mib->suffix_seq_num; 399 break; 400 default: 401 return 1; /*error*/ 402 } 403 } while ((prefix_seq_num != suffix_seq_num) && 404 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ)); 405 406 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) { 407 BNX2X_ERR("MIB could not be read\n"); 408 return 1; 409 } 410 411 return 0; 412 } 413 414 static void bnx2x_pfc_set_pfc(struct bnx2x *bp) 415 { 416 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 417 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 418 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 419 if (bp->dcbx_port_params.pfc.enabled && 420 (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured)) 421 /* 422 * 1. Fills up common PFC structures if required 423 * 2. Configure NIG, MAC and BRB via the elink 424 */ 425 bnx2x_pfc_set(bp); 426 else 427 bnx2x_pfc_clear(bp); 428 } 429 430 static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp) 431 { 432 struct bnx2x_func_state_params func_params = {NULL}; 433 434 func_params.f_obj = &bp->func_obj; 435 func_params.cmd = BNX2X_F_CMD_TX_STOP; 436 437 DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n"); 438 return bnx2x_func_state_change(bp, &func_params); 439 } 440 441 static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp) 442 { 443 struct bnx2x_func_state_params func_params = {NULL}; 444 struct bnx2x_func_tx_start_params *tx_params = 445 &func_params.params.tx_start; 446 447 func_params.f_obj = &bp->func_obj; 448 func_params.cmd = BNX2X_F_CMD_TX_START; 449 450 bnx2x_dcbx_fw_struct(bp, tx_params); 451 452 DP(BNX2X_MSG_DCB, "START TRAFFIC\n"); 453 return bnx2x_func_state_change(bp, &func_params); 454 } 455 456 static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp) 457 { 458 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 459 int rc = 0; 460 461 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) { 462 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos); 463 return; 464 } 465 466 /* valid COS entries */ 467 if (ets->num_of_cos == 1) /* no ETS */ 468 return; 469 470 /* sanity */ 471 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) && 472 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) || 473 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) && 474 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) { 475 BNX2X_ERR("all COS should have at least bw_limit or strict" 476 "ets->cos_params[0].strict= %x" 477 "ets->cos_params[0].bw_tbl= %x" 478 "ets->cos_params[1].strict= %x" 479 "ets->cos_params[1].bw_tbl= %x", 480 ets->cos_params[0].strict, 481 ets->cos_params[0].bw_tbl, 482 ets->cos_params[1].strict, 483 ets->cos_params[1].bw_tbl); 484 return; 485 } 486 /* If we join a group and there is bw_tbl and strict then bw rules */ 487 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) && 488 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) { 489 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl; 490 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl; 491 /* Do not allow 0-100 configuration 492 * since PBF does not support it 493 * force 1-99 instead 494 */ 495 if (bw_tbl_0 == 0) { 496 bw_tbl_0 = 1; 497 bw_tbl_1 = 99; 498 } else if (bw_tbl_1 == 0) { 499 bw_tbl_1 = 1; 500 bw_tbl_0 = 99; 501 } 502 503 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1); 504 } else { 505 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST) 506 rc = bnx2x_ets_strict(&bp->link_params, 0); 507 else if (ets->cos_params[1].strict 508 == BNX2X_DCBX_STRICT_COS_HIGHEST) 509 rc = bnx2x_ets_strict(&bp->link_params, 1); 510 if (rc) 511 BNX2X_ERR("update_ets_params failed\n"); 512 } 513 } 514 515 /* 516 * In E3B0 the configuration may have more than 2 COS. 517 */ 518 static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp) 519 { 520 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 521 struct bnx2x_ets_params ets_params = { 0 }; 522 u8 i; 523 524 ets_params.num_of_cos = ets->num_of_cos; 525 526 for (i = 0; i < ets->num_of_cos; i++) { 527 /* COS is SP */ 528 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) { 529 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) { 530 BNX2X_ERR("COS can't be not BW and not SP\n"); 531 return; 532 } 533 534 ets_params.cos[i].state = bnx2x_cos_state_strict; 535 ets_params.cos[i].params.sp_params.pri = 536 ets->cos_params[i].strict; 537 } else { /* COS is BW */ 538 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) { 539 BNX2X_ERR("COS can't be not BW and not SP\n"); 540 return; 541 } 542 ets_params.cos[i].state = bnx2x_cos_state_bw; 543 ets_params.cos[i].params.bw_params.bw = 544 (u8)ets->cos_params[i].bw_tbl; 545 } 546 } 547 548 /* Configure the ETS in HW */ 549 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars, 550 &ets_params)) { 551 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n"); 552 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 553 } 554 } 555 556 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) 557 { 558 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 559 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 560 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 561 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 562 563 if (!bp->dcbx_port_params.ets.enabled || 564 ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)) 565 return; 566 567 if (CHIP_IS_E3B0(bp)) 568 bnx2x_dcbx_update_ets_config(bp); 569 else 570 bnx2x_dcbx_2cos_limit_update_ets_config(bp); 571 } 572 573 #ifdef BCM_DCBNL 574 static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp) 575 { 576 struct lldp_remote_mib remote_mib = {0}; 577 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset); 578 int rc; 579 580 DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n", 581 dcbx_remote_mib_offset); 582 583 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) { 584 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n"); 585 return -EINVAL; 586 } 587 588 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset, 589 DCBX_READ_REMOTE_MIB); 590 591 if (rc) { 592 BNX2X_ERR("Faild to read remote mib from FW\n"); 593 return rc; 594 } 595 596 /* save features and flags */ 597 bp->dcbx_remote_feat = remote_mib.features; 598 bp->dcbx_remote_flags = remote_mib.flags; 599 return 0; 600 } 601 #endif 602 603 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp) 604 { 605 struct lldp_local_mib local_mib = {0}; 606 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset); 607 int rc; 608 609 DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset); 610 611 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) { 612 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n"); 613 return -EINVAL; 614 } 615 616 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset, 617 DCBX_READ_LOCAL_MIB); 618 619 if (rc) { 620 BNX2X_ERR("Faild to read local mib from FW\n"); 621 return rc; 622 } 623 624 /* save features and error */ 625 bp->dcbx_local_feat = local_mib.features; 626 bp->dcbx_error = local_mib.error; 627 return 0; 628 } 629 630 631 #ifdef BCM_DCBNL 632 static inline 633 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent) 634 { 635 u8 pri; 636 637 /* Choose the highest priority */ 638 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--) 639 if (ent->pri_bitmap & (1 << pri)) 640 break; 641 return pri; 642 } 643 644 static inline 645 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent) 646 { 647 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) == 648 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM : 649 DCB_APP_IDTYPE_ETHTYPE; 650 } 651 652 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall) 653 { 654 int i, err = 0; 655 656 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) { 657 struct dcbx_app_priority_entry *ent = 658 &bp->dcbx_local_feat.app.app_pri_tbl[i]; 659 660 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 661 u8 up = bnx2x_dcbx_dcbnl_app_up(ent); 662 663 /* avoid invalid user-priority */ 664 if (up) { 665 struct dcb_app app; 666 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 667 app.protocol = ent->app_id; 668 app.priority = delall ? 0 : up; 669 err = dcb_setapp(bp->dev, &app); 670 } 671 } 672 } 673 return err; 674 } 675 #endif 676 677 static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp) 678 { 679 u8 prio, cos; 680 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) { 681 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) { 682 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask 683 & (1 << prio)) { 684 bp->prio_to_cos[prio] = cos; 685 DP(BNX2X_MSG_DCB, 686 "tx_mapping %d --> %d\n", prio, cos); 687 } 688 } 689 } 690 691 /* setup tc must be called under rtnl lock, but we can't take it here 692 * as we are handling an attetntion on a work queue which must be 693 * flushed at some rtnl-locked contexts (e.g. if down) 694 */ 695 if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state)) 696 schedule_delayed_work(&bp->sp_rtnl_task, 0); 697 } 698 699 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) 700 { 701 switch (state) { 702 case BNX2X_DCBX_STATE_NEG_RECEIVED: 703 { 704 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n"); 705 #ifdef BCM_DCBNL 706 /** 707 * Delete app tlvs from dcbnl before reading new 708 * negotiation results 709 */ 710 bnx2x_dcbnl_update_applist(bp, true); 711 712 /* Read rmeote mib if dcbx is in the FW */ 713 if (bnx2x_dcbx_read_shmem_remote_mib(bp)) 714 return; 715 #endif 716 /* Read neg results if dcbx is in the FW */ 717 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 718 return; 719 720 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 721 bp->dcbx_error); 722 723 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 724 bp->dcbx_error); 725 726 /* mark DCBX result for PMF migration */ 727 bnx2x_update_drv_flags(bp, 728 1 << DRV_FLAGS_DCB_CONFIGURED, 729 1); 730 #ifdef BCM_DCBNL 731 /* 732 * Add new app tlvs to dcbnl 733 */ 734 bnx2x_dcbnl_update_applist(bp, false); 735 #endif 736 /* 737 * reconfigure the netdevice with the results of the new 738 * dcbx negotiation. 739 */ 740 bnx2x_dcbx_update_tc_mapping(bp); 741 742 /* 743 * allow other funtions to update their netdevices 744 * accordingly 745 */ 746 if (IS_MF(bp)) 747 bnx2x_link_sync_notify(bp); 748 749 bnx2x_dcbx_stop_hw_tx(bp); 750 751 return; 752 } 753 case BNX2X_DCBX_STATE_TX_PAUSED: 754 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n"); 755 bnx2x_pfc_set_pfc(bp); 756 757 bnx2x_dcbx_update_ets_params(bp); 758 bnx2x_dcbx_resume_hw_tx(bp); 759 760 return; 761 case BNX2X_DCBX_STATE_TX_RELEASED: 762 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n"); 763 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0); 764 #ifdef BCM_DCBNL 765 /* 766 * Send a notification for the new negotiated parameters 767 */ 768 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 769 #endif 770 return; 771 default: 772 BNX2X_ERR("Unknown DCBX_STATE\n"); 773 } 774 } 775 776 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \ 777 BP_PORT(bp)*sizeof(struct lldp_admin_mib)) 778 779 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, 780 u32 dcbx_lldp_params_offset) 781 { 782 struct lldp_admin_mib admin_mib; 783 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0; 784 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp); 785 786 /*shortcuts*/ 787 struct dcbx_features *af = &admin_mib.features; 788 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params; 789 790 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib)); 791 792 /* Read the data first */ 793 bnx2x_read_data(bp, (u32 *)&admin_mib, offset, 794 sizeof(struct lldp_admin_mib)); 795 796 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON) 797 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 798 else 799 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 800 801 if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) { 802 803 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK); 804 admin_mib.ver_cfg_flags |= 805 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) & 806 DCBX_CEE_VERSION_MASK; 807 808 af->ets.enabled = (u8)dp->admin_ets_enable; 809 810 af->pfc.enabled = (u8)dp->admin_pfc_enable; 811 812 /* FOR IEEE dp->admin_tc_supported_tx_enable */ 813 if (dp->admin_ets_configuration_tx_enable) 814 SET_FLAGS(admin_mib.ver_cfg_flags, 815 DCBX_ETS_CONFIG_TX_ENABLED); 816 else 817 RESET_FLAGS(admin_mib.ver_cfg_flags, 818 DCBX_ETS_CONFIG_TX_ENABLED); 819 /* For IEEE admin_ets_recommendation_tx_enable */ 820 if (dp->admin_pfc_tx_enable) 821 SET_FLAGS(admin_mib.ver_cfg_flags, 822 DCBX_PFC_CONFIG_TX_ENABLED); 823 else 824 RESET_FLAGS(admin_mib.ver_cfg_flags, 825 DCBX_PFC_CONFIG_TX_ENABLED); 826 827 if (dp->admin_application_priority_tx_enable) 828 SET_FLAGS(admin_mib.ver_cfg_flags, 829 DCBX_APP_CONFIG_TX_ENABLED); 830 else 831 RESET_FLAGS(admin_mib.ver_cfg_flags, 832 DCBX_APP_CONFIG_TX_ENABLED); 833 834 if (dp->admin_ets_willing) 835 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 836 else 837 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 838 /* For IEEE admin_ets_reco_valid */ 839 if (dp->admin_pfc_willing) 840 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 841 else 842 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 843 844 if (dp->admin_app_priority_willing) 845 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 846 else 847 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 848 849 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) { 850 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i, 851 (u8)dp->admin_configuration_bw_precentage[i]); 852 853 DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n", 854 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i)); 855 } 856 857 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 858 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i, 859 (u8)dp->admin_configuration_ets_pg[i]); 860 861 DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n", 862 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i)); 863 } 864 865 /*For IEEE admin_recommendation_bw_precentage 866 *For IEEE admin_recommendation_ets_pg */ 867 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap; 868 for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 869 if (dp->admin_priority_app_table[i].valid) { 870 struct bnx2x_admin_priority_app_table *table = 871 dp->admin_priority_app_table; 872 if ((ETH_TYPE_FCOE == table[i].app_id) && 873 (TRAFFIC_TYPE_ETH == table[i].traffic_type)) 874 traf_type = FCOE_APP_IDX; 875 else if ((TCP_PORT_ISCSI == table[i].app_id) && 876 (TRAFFIC_TYPE_PORT == table[i].traffic_type)) 877 traf_type = ISCSI_APP_IDX; 878 else 879 traf_type = other_traf_type++; 880 881 af->app.app_pri_tbl[traf_type].app_id = 882 table[i].app_id; 883 884 af->app.app_pri_tbl[traf_type].pri_bitmap = 885 (u8)(1 << table[i].priority); 886 887 af->app.app_pri_tbl[traf_type].appBitfield = 888 (DCBX_APP_ENTRY_VALID); 889 890 af->app.app_pri_tbl[traf_type].appBitfield |= 891 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ? 892 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT; 893 } 894 } 895 896 af->app.default_pri = (u8)dp->admin_default_priority; 897 898 } 899 900 /* Write the data. */ 901 bnx2x_write_data(bp, (u32 *)&admin_mib, offset, 902 sizeof(struct lldp_admin_mib)); 903 904 } 905 906 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled) 907 { 908 if (!CHIP_IS_E1x(bp)) { 909 bp->dcb_state = dcb_on; 910 bp->dcbx_enabled = dcbx_enabled; 911 } else { 912 bp->dcb_state = false; 913 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID; 914 } 915 DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n", 916 dcb_on ? "ON" : "OFF", 917 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" : 918 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" : 919 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ? 920 "on-chip with negotiation" : "invalid"); 921 } 922 923 void bnx2x_dcbx_init_params(struct bnx2x *bp) 924 { 925 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */ 926 bp->dcbx_config_params.admin_ets_willing = 1; 927 bp->dcbx_config_params.admin_pfc_willing = 1; 928 bp->dcbx_config_params.overwrite_settings = 1; 929 bp->dcbx_config_params.admin_ets_enable = 1; 930 bp->dcbx_config_params.admin_pfc_enable = 1; 931 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1; 932 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 933 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 934 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 935 bp->dcbx_config_params.admin_ets_reco_valid = 1; 936 bp->dcbx_config_params.admin_app_priority_willing = 1; 937 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100; 938 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0; 939 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0; 940 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0; 941 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0; 942 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0; 943 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0; 944 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0; 945 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0; 946 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0; 947 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0; 948 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0; 949 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0; 950 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0; 951 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0; 952 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0; 953 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100; 954 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0; 955 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0; 956 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0; 957 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0; 958 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0; 959 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0; 960 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0; 961 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0; 962 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1; 963 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2; 964 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3; 965 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4; 966 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5; 967 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6; 968 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7; 969 bp->dcbx_config_params.admin_pfc_bitmap = 0x0; 970 bp->dcbx_config_params.admin_priority_app_table[0].valid = 0; 971 bp->dcbx_config_params.admin_priority_app_table[1].valid = 0; 972 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0; 973 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0; 974 bp->dcbx_config_params.admin_default_priority = 0; 975 } 976 977 void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem) 978 { 979 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE; 980 981 /* only PMF can send ADMIN msg to MFW in old MFW versions */ 982 if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF))) 983 return; 984 985 if (bp->dcbx_enabled <= 0) 986 return; 987 988 /* validate: 989 * chip of good for dcbx version, 990 * dcb is wanted 991 * shmem2 contains DCBX support fields 992 */ 993 DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n", 994 bp->dcb_state, bp->port.pmf); 995 996 if (bp->dcb_state == BNX2X_DCB_STATE_ON && 997 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) { 998 dcbx_lldp_params_offset = 999 SHMEM2_RD(bp, dcbx_lldp_params_offset); 1000 1001 DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n", 1002 dcbx_lldp_params_offset); 1003 1004 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0); 1005 1006 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) { 1007 /* need HW lock to avoid scenario of two drivers 1008 * writing in parallel to shmem 1009 */ 1010 bnx2x_acquire_hw_lock(bp, 1011 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1012 if (update_shmem) 1013 bnx2x_dcbx_admin_mib_updated_params(bp, 1014 dcbx_lldp_params_offset); 1015 1016 /* Let HW start negotiation */ 1017 bnx2x_fw_command(bp, 1018 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0); 1019 /* release HW lock only after MFW acks that it finished 1020 * reading values from shmem 1021 */ 1022 bnx2x_release_hw_lock(bp, 1023 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1024 } 1025 } 1026 } 1027 static void 1028 bnx2x_dcbx_print_cos_params(struct bnx2x *bp, 1029 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1030 { 1031 u8 pri = 0; 1032 u8 cos = 0; 1033 1034 DP(BNX2X_MSG_DCB, 1035 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version); 1036 DP(BNX2X_MSG_DCB, 1037 "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n", 1038 bp->dcbx_port_params.pfc.priority_non_pauseable_mask); 1039 1040 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) { 1041 DP(BNX2X_MSG_DCB, 1042 "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n", 1043 cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask); 1044 1045 DP(BNX2X_MSG_DCB, 1046 "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n", 1047 cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl); 1048 1049 DP(BNX2X_MSG_DCB, 1050 "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n", 1051 cos, bp->dcbx_port_params.ets.cos_params[cos].strict); 1052 1053 DP(BNX2X_MSG_DCB, 1054 "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n", 1055 cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable); 1056 } 1057 1058 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1059 DP(BNX2X_MSG_DCB, 1060 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n", 1061 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority); 1062 1063 DP(BNX2X_MSG_DCB, 1064 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n", 1065 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos); 1066 } 1067 } 1068 1069 /* fills help_data according to pg_info */ 1070 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 1071 u32 *pg_pri_orginal_spread, 1072 struct pg_help_data *help_data) 1073 { 1074 bool pg_found = false; 1075 u32 i, traf_type, add_traf_type, add_pg; 1076 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1077 struct pg_entry_help_data *data = help_data->data; /*shotcut*/ 1078 1079 /* Set to invalid */ 1080 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 1081 data[i].pg = DCBX_ILLEGAL_PG; 1082 1083 for (add_traf_type = 0; 1084 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) { 1085 pg_found = false; 1086 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) { 1087 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]]; 1088 for (traf_type = 0; 1089 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1090 traf_type++) { 1091 if (data[traf_type].pg == add_pg) { 1092 if (!(data[traf_type].pg_priority & 1093 (1 << ttp[add_traf_type]))) 1094 data[traf_type]. 1095 num_of_dif_pri++; 1096 data[traf_type].pg_priority |= 1097 (1 << ttp[add_traf_type]); 1098 pg_found = true; 1099 break; 1100 } 1101 } 1102 if (false == pg_found) { 1103 data[help_data->num_of_pg].pg = add_pg; 1104 data[help_data->num_of_pg].pg_priority = 1105 (1 << ttp[add_traf_type]); 1106 data[help_data->num_of_pg].num_of_dif_pri = 1; 1107 help_data->num_of_pg++; 1108 } 1109 } 1110 DP(BNX2X_MSG_DCB, 1111 "add_traf_type %d pg_found %s num_of_pg %d\n", 1112 add_traf_type, (false == pg_found) ? "NO" : "YES", 1113 help_data->num_of_pg); 1114 } 1115 } 1116 1117 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp, 1118 struct cos_help_data *cos_data, 1119 u32 pri_join_mask) 1120 { 1121 /* Only one priority than only one COS */ 1122 cos_data->data[0].pausable = 1123 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1124 cos_data->data[0].pri_join_mask = pri_join_mask; 1125 cos_data->data[0].cos_bw = 100; 1126 cos_data->num_of_cos = 1; 1127 } 1128 1129 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp, 1130 struct cos_entry_help_data *data, 1131 u8 pg_bw) 1132 { 1133 if (data->cos_bw == DCBX_INVALID_COS_BW) 1134 data->cos_bw = pg_bw; 1135 else 1136 data->cos_bw += pg_bw; 1137 } 1138 1139 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 1140 struct cos_help_data *cos_data, 1141 u32 *pg_pri_orginal_spread, 1142 struct dcbx_ets_feature *ets) 1143 { 1144 u32 pri_tested = 0; 1145 u8 i = 0; 1146 u8 entry = 0; 1147 u8 pg_entry = 0; 1148 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1149 1150 cos_data->data[0].pausable = true; 1151 cos_data->data[1].pausable = false; 1152 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1153 1154 for (i = 0 ; i < num_of_pri ; i++) { 1155 pri_tested = 1 << bp->dcbx_port_params. 1156 app.traffic_type_priority[i]; 1157 1158 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) { 1159 cos_data->data[1].pri_join_mask |= pri_tested; 1160 entry = 1; 1161 } else { 1162 cos_data->data[0].pri_join_mask |= pri_tested; 1163 entry = 0; 1164 } 1165 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params. 1166 app.traffic_type_priority[i]]; 1167 /* There can be only one strict pg */ 1168 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) 1169 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry], 1170 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry)); 1171 else 1172 /* If we join a group and one is strict 1173 * than the bw rulls */ 1174 cos_data->data[entry].strict = 1175 BNX2X_DCBX_STRICT_COS_HIGHEST; 1176 } 1177 if ((0 == cos_data->data[0].pri_join_mask) && 1178 (0 == cos_data->data[1].pri_join_mask)) 1179 BNX2X_ERR("dcbx error: Both groups must have priorities\n"); 1180 } 1181 1182 1183 #ifndef POWER_OF_2 1184 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) 1185 #endif 1186 1187 static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp, 1188 struct pg_help_data *pg_help_data, 1189 struct cos_help_data *cos_data, 1190 u32 pri_join_mask, 1191 u8 num_of_dif_pri) 1192 { 1193 u8 i = 0; 1194 u32 pri_tested = 0; 1195 u32 pri_mask_without_pri = 0; 1196 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1197 /*debug*/ 1198 if (num_of_dif_pri == 1) { 1199 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask); 1200 return; 1201 } 1202 /* single priority group */ 1203 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1204 /* If there are both pauseable and non-pauseable priorities, 1205 * the pauseable priorities go to the first queue and 1206 * the non-pauseable priorities go to the second queue. 1207 */ 1208 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1209 /* Pauseable */ 1210 cos_data->data[0].pausable = true; 1211 /* Non pauseable.*/ 1212 cos_data->data[1].pausable = false; 1213 1214 if (2 == num_of_dif_pri) { 1215 cos_data->data[0].cos_bw = 50; 1216 cos_data->data[1].cos_bw = 50; 1217 } 1218 1219 if (3 == num_of_dif_pri) { 1220 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp, 1221 pri_join_mask))) { 1222 cos_data->data[0].cos_bw = 33; 1223 cos_data->data[1].cos_bw = 67; 1224 } else { 1225 cos_data->data[0].cos_bw = 67; 1226 cos_data->data[1].cos_bw = 33; 1227 } 1228 } 1229 1230 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) { 1231 /* If there are only pauseable priorities, 1232 * then one/two priorities go to the first queue 1233 * and one priority goes to the second queue. 1234 */ 1235 if (2 == num_of_dif_pri) { 1236 cos_data->data[0].cos_bw = 50; 1237 cos_data->data[1].cos_bw = 50; 1238 } else { 1239 cos_data->data[0].cos_bw = 67; 1240 cos_data->data[1].cos_bw = 33; 1241 } 1242 cos_data->data[1].pausable = true; 1243 cos_data->data[0].pausable = true; 1244 /* All priorities except FCOE */ 1245 cos_data->data[0].pri_join_mask = (pri_join_mask & 1246 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]))); 1247 /* Only FCOE priority.*/ 1248 cos_data->data[1].pri_join_mask = 1249 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]); 1250 } else 1251 /* If there are only non-pauseable priorities, 1252 * they will all go to the same queue. 1253 */ 1254 bnx2x_dcbx_ets_disabled_entry_data(bp, 1255 cos_data, pri_join_mask); 1256 } else { 1257 /* priority group which is not BW limited (PG#15):*/ 1258 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1259 /* If there are both pauseable and non-pauseable 1260 * priorities, the pauseable priorities go to the first 1261 * queue and the non-pauseable priorities 1262 * go to the second queue. 1263 */ 1264 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) > 1265 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) { 1266 cos_data->data[0].strict = 1267 BNX2X_DCBX_STRICT_COS_HIGHEST; 1268 cos_data->data[1].strict = 1269 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1270 BNX2X_DCBX_STRICT_COS_HIGHEST); 1271 } else { 1272 cos_data->data[0].strict = 1273 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1274 BNX2X_DCBX_STRICT_COS_HIGHEST); 1275 cos_data->data[1].strict = 1276 BNX2X_DCBX_STRICT_COS_HIGHEST; 1277 } 1278 /* Pauseable */ 1279 cos_data->data[0].pausable = true; 1280 /* Non pause-able.*/ 1281 cos_data->data[1].pausable = false; 1282 } else { 1283 /* If there are only pauseable priorities or 1284 * only non-pauseable,* the lower priorities go 1285 * to the first queue and the higherpriorities go 1286 * to the second queue. 1287 */ 1288 cos_data->data[0].pausable = 1289 cos_data->data[1].pausable = 1290 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1291 1292 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) { 1293 pri_tested = 1 << bp->dcbx_port_params. 1294 app.traffic_type_priority[i]; 1295 /* Remove priority tested */ 1296 pri_mask_without_pri = 1297 (pri_join_mask & ((u8)(~pri_tested))); 1298 if (pri_mask_without_pri < pri_tested) 1299 break; 1300 } 1301 1302 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX) 1303 BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n"); 1304 1305 cos_data->data[0].pri_join_mask = pri_mask_without_pri; 1306 cos_data->data[1].pri_join_mask = pri_tested; 1307 /* Both queues are strict priority, 1308 * and that with the highest priority 1309 * gets the highest strict priority in the arbiter. 1310 */ 1311 cos_data->data[0].strict = 1312 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1313 BNX2X_DCBX_STRICT_COS_HIGHEST); 1314 cos_data->data[1].strict = 1315 BNX2X_DCBX_STRICT_COS_HIGHEST; 1316 } 1317 } 1318 } 1319 1320 static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1321 struct bnx2x *bp, 1322 struct pg_help_data *pg_help_data, 1323 struct dcbx_ets_feature *ets, 1324 struct cos_help_data *cos_data, 1325 u32 *pg_pri_orginal_spread, 1326 u32 pri_join_mask, 1327 u8 num_of_dif_pri) 1328 { 1329 u8 i = 0; 1330 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 }; 1331 1332 /* If there are both pauseable and non-pauseable priorities, 1333 * the pauseable priorities go to the first queue and 1334 * the non-pauseable priorities go to the second queue. 1335 */ 1336 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1337 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1338 pg_help_data->data[0].pg_priority) || 1339 IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1340 pg_help_data->data[1].pg_priority)) { 1341 /* If one PG contains both pauseable and 1342 * non-pauseable priorities then ETS is disabled. 1343 */ 1344 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data, 1345 pg_pri_orginal_spread, ets); 1346 bp->dcbx_port_params.ets.enabled = false; 1347 return; 1348 } 1349 1350 /* Pauseable */ 1351 cos_data->data[0].pausable = true; 1352 /* Non pauseable. */ 1353 cos_data->data[1].pausable = false; 1354 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, 1355 pg_help_data->data[0].pg_priority)) { 1356 /* 0 is pauseable */ 1357 cos_data->data[0].pri_join_mask = 1358 pg_help_data->data[0].pg_priority; 1359 pg[0] = pg_help_data->data[0].pg; 1360 cos_data->data[1].pri_join_mask = 1361 pg_help_data->data[1].pg_priority; 1362 pg[1] = pg_help_data->data[1].pg; 1363 } else {/* 1 is pauseable */ 1364 cos_data->data[0].pri_join_mask = 1365 pg_help_data->data[1].pg_priority; 1366 pg[0] = pg_help_data->data[1].pg; 1367 cos_data->data[1].pri_join_mask = 1368 pg_help_data->data[0].pg_priority; 1369 pg[1] = pg_help_data->data[0].pg; 1370 } 1371 } else { 1372 /* If there are only pauseable priorities or 1373 * only non-pauseable, each PG goes to a queue. 1374 */ 1375 cos_data->data[0].pausable = cos_data->data[1].pausable = 1376 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1377 cos_data->data[0].pri_join_mask = 1378 pg_help_data->data[0].pg_priority; 1379 pg[0] = pg_help_data->data[0].pg; 1380 cos_data->data[1].pri_join_mask = 1381 pg_help_data->data[1].pg_priority; 1382 pg[1] = pg_help_data->data[1].pg; 1383 } 1384 1385 /* There can be only one strict pg */ 1386 for (i = 0 ; i < ARRAY_SIZE(pg); i++) { 1387 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES) 1388 cos_data->data[i].cos_bw = 1389 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]); 1390 else 1391 cos_data->data[i].strict = 1392 BNX2X_DCBX_STRICT_COS_HIGHEST; 1393 } 1394 } 1395 1396 static int bnx2x_dcbx_join_pgs( 1397 struct bnx2x *bp, 1398 struct dcbx_ets_feature *ets, 1399 struct pg_help_data *pg_help_data, 1400 u8 required_num_of_pg) 1401 { 1402 u8 entry_joined = pg_help_data->num_of_pg - 1; 1403 u8 entry_removed = entry_joined + 1; 1404 u8 pg_joined = 0; 1405 1406 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data) 1407 <= pg_help_data->num_of_pg) { 1408 1409 BNX2X_ERR("required_num_of_pg can't be zero\n"); 1410 return -EINVAL; 1411 } 1412 1413 while (required_num_of_pg < pg_help_data->num_of_pg) { 1414 entry_joined = pg_help_data->num_of_pg - 2; 1415 entry_removed = entry_joined + 1; 1416 /* protect index */ 1417 entry_removed %= ARRAY_SIZE(pg_help_data->data); 1418 1419 pg_help_data->data[entry_joined].pg_priority |= 1420 pg_help_data->data[entry_removed].pg_priority; 1421 1422 pg_help_data->data[entry_joined].num_of_dif_pri += 1423 pg_help_data->data[entry_removed].num_of_dif_pri; 1424 1425 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG || 1426 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG) 1427 /* Entries joined strict priority rules */ 1428 pg_help_data->data[entry_joined].pg = 1429 DCBX_STRICT_PRI_PG; 1430 else { 1431 /* Entries can be joined join BW */ 1432 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl, 1433 pg_help_data->data[entry_joined].pg) + 1434 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1435 pg_help_data->data[entry_removed].pg); 1436 1437 DCBX_PG_BW_SET(ets->pg_bw_tbl, 1438 pg_help_data->data[entry_joined].pg, pg_joined); 1439 } 1440 /* Joined the entries */ 1441 pg_help_data->num_of_pg--; 1442 } 1443 1444 return 0; 1445 } 1446 1447 static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1448 struct bnx2x *bp, 1449 struct pg_help_data *pg_help_data, 1450 struct dcbx_ets_feature *ets, 1451 struct cos_help_data *cos_data, 1452 u32 *pg_pri_orginal_spread, 1453 u32 pri_join_mask, 1454 u8 num_of_dif_pri) 1455 { 1456 u8 i = 0; 1457 u32 pri_tested = 0; 1458 u8 entry = 0; 1459 u8 pg_entry = 0; 1460 bool b_found_strict = false; 1461 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1462 1463 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1464 /* If there are both pauseable and non-pauseable priorities, 1465 * the pauseable priorities go to the first queue and the 1466 * non-pauseable priorities go to the second queue. 1467 */ 1468 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) 1469 bnx2x_dcbx_separate_pauseable_from_non(bp, 1470 cos_data, pg_pri_orginal_spread, ets); 1471 else { 1472 /* If two BW-limited PG-s were combined to one queue, 1473 * the BW is their sum. 1474 * 1475 * If there are only pauseable priorities or only non-pauseable, 1476 * and there are both BW-limited and non-BW-limited PG-s, 1477 * the BW-limited PG/s go to one queue and the non-BW-limited 1478 * PG/s go to the second queue. 1479 * 1480 * If there are only pauseable priorities or only non-pauseable 1481 * and all are BW limited, then two priorities go to the first 1482 * queue and one priority goes to the second queue. 1483 * 1484 * We will join this two cases: 1485 * if one is BW limited it will go to the secoend queue 1486 * otherwise the last priority will get it 1487 */ 1488 1489 cos_data->data[0].pausable = cos_data->data[1].pausable = 1490 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1491 1492 for (i = 0 ; i < num_of_pri; i++) { 1493 pri_tested = 1 << bp->dcbx_port_params. 1494 app.traffic_type_priority[i]; 1495 pg_entry = (u8)pg_pri_orginal_spread[bp-> 1496 dcbx_port_params.app.traffic_type_priority[i]]; 1497 1498 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1499 entry = 0; 1500 1501 if (i == (num_of_pri-1) && 1502 false == b_found_strict) 1503 /* last entry will be handled separately 1504 * If no priority is strict than last 1505 * enty goes to last queue.*/ 1506 entry = 1; 1507 cos_data->data[entry].pri_join_mask |= 1508 pri_tested; 1509 bnx2x_dcbx_add_to_cos_bw(bp, 1510 &cos_data->data[entry], 1511 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1512 pg_entry)); 1513 } else { 1514 b_found_strict = true; 1515 cos_data->data[1].pri_join_mask |= pri_tested; 1516 /* If we join a group and one is strict 1517 * than the bw rulls */ 1518 cos_data->data[1].strict = 1519 BNX2X_DCBX_STRICT_COS_HIGHEST; 1520 } 1521 } 1522 } 1523 } 1524 1525 1526 static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, 1527 struct pg_help_data *help_data, 1528 struct dcbx_ets_feature *ets, 1529 struct cos_help_data *cos_data, 1530 u32 *pg_pri_orginal_spread, 1531 u32 pri_join_mask, 1532 u8 num_of_dif_pri) 1533 { 1534 1535 /* default E2 settings */ 1536 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2; 1537 1538 switch (help_data->num_of_pg) { 1539 case 1: 1540 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params( 1541 bp, 1542 help_data, 1543 cos_data, 1544 pri_join_mask, 1545 num_of_dif_pri); 1546 break; 1547 case 2: 1548 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1549 bp, 1550 help_data, 1551 ets, 1552 cos_data, 1553 pg_pri_orginal_spread, 1554 pri_join_mask, 1555 num_of_dif_pri); 1556 break; 1557 1558 case 3: 1559 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1560 bp, 1561 help_data, 1562 ets, 1563 cos_data, 1564 pg_pri_orginal_spread, 1565 pri_join_mask, 1566 num_of_dif_pri); 1567 break; 1568 default: 1569 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n"); 1570 bnx2x_dcbx_ets_disabled_entry_data(bp, 1571 cos_data, pri_join_mask); 1572 } 1573 } 1574 1575 static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp, 1576 struct cos_help_data *cos_data, 1577 u8 entry, 1578 u8 num_spread_of_entries, 1579 u8 strict_app_pris) 1580 { 1581 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST; 1582 u8 num_of_app_pri = MAX_PFC_PRIORITIES; 1583 u8 app_pri_bit = 0; 1584 1585 while (num_spread_of_entries && num_of_app_pri > 0) { 1586 app_pri_bit = 1 << (num_of_app_pri - 1); 1587 if (app_pri_bit & strict_app_pris) { 1588 struct cos_entry_help_data *data = &cos_data-> 1589 data[entry]; 1590 num_spread_of_entries--; 1591 if (num_spread_of_entries == 0) { 1592 /* last entry needed put all the entries left */ 1593 data->cos_bw = DCBX_INVALID_COS_BW; 1594 data->strict = strict_pri; 1595 data->pri_join_mask = strict_app_pris; 1596 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1597 data->pri_join_mask); 1598 } else { 1599 strict_app_pris &= ~app_pri_bit; 1600 1601 data->cos_bw = DCBX_INVALID_COS_BW; 1602 data->strict = strict_pri; 1603 data->pri_join_mask = app_pri_bit; 1604 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1605 data->pri_join_mask); 1606 } 1607 1608 strict_pri = 1609 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri); 1610 entry++; 1611 } 1612 1613 num_of_app_pri--; 1614 } 1615 1616 if (num_spread_of_entries) { 1617 BNX2X_ERR("Didn't succeed to spread strict priorities\n"); 1618 return -EINVAL; 1619 } 1620 1621 return 0; 1622 } 1623 1624 static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp, 1625 struct cos_help_data *cos_data, 1626 u8 entry, 1627 u8 num_spread_of_entries, 1628 u8 strict_app_pris) 1629 { 1630 1631 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry, 1632 num_spread_of_entries, 1633 strict_app_pris)) { 1634 struct cos_entry_help_data *data = &cos_data-> 1635 data[entry]; 1636 /* Fill BW entry */ 1637 data->cos_bw = DCBX_INVALID_COS_BW; 1638 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST; 1639 data->pri_join_mask = strict_app_pris; 1640 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1641 data->pri_join_mask); 1642 return 1; 1643 } 1644 1645 return num_spread_of_entries; 1646 } 1647 1648 static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp, 1649 struct pg_help_data *help_data, 1650 struct dcbx_ets_feature *ets, 1651 struct cos_help_data *cos_data, 1652 u32 pri_join_mask) 1653 1654 { 1655 u8 need_num_of_entries = 0; 1656 u8 i = 0; 1657 u8 entry = 0; 1658 1659 /* 1660 * if the number of requested PG-s in CEE is greater than 3 1661 * then the results are not determined since this is a violation 1662 * of the standard. 1663 */ 1664 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) { 1665 if (bnx2x_dcbx_join_pgs(bp, ets, help_data, 1666 DCBX_COS_MAX_NUM_E3B0)) { 1667 BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n"); 1668 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, 1669 pri_join_mask); 1670 return; 1671 } 1672 } 1673 1674 for (i = 0 ; i < help_data->num_of_pg; i++) { 1675 struct pg_entry_help_data *pg = &help_data->data[i]; 1676 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1677 struct cos_entry_help_data *data = &cos_data-> 1678 data[entry]; 1679 /* Fill BW entry */ 1680 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg); 1681 data->strict = BNX2X_DCBX_STRICT_INVALID; 1682 data->pri_join_mask = pg->pg_priority; 1683 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1684 data->pri_join_mask); 1685 1686 entry++; 1687 } else { 1688 need_num_of_entries = min_t(u8, 1689 (u8)pg->num_of_dif_pri, 1690 (u8)DCBX_COS_MAX_NUM_E3B0 - 1691 help_data->num_of_pg + 1); 1692 /* 1693 * If there are still VOQ-s which have no associated PG, 1694 * then associate these VOQ-s to PG15. These PG-s will 1695 * be used for SP between priorities on PG15. 1696 */ 1697 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data, 1698 entry, need_num_of_entries, pg->pg_priority); 1699 } 1700 } 1701 1702 /* the entry will represent the number of COSes used */ 1703 cos_data->num_of_cos = entry; 1704 } 1705 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 1706 struct pg_help_data *help_data, 1707 struct dcbx_ets_feature *ets, 1708 u32 *pg_pri_orginal_spread) 1709 { 1710 struct cos_help_data cos_data; 1711 u8 i = 0; 1712 u32 pri_join_mask = 0; 1713 u8 num_of_dif_pri = 0; 1714 1715 memset(&cos_data, 0, sizeof(cos_data)); 1716 1717 /* Validate the pg value */ 1718 for (i = 0; i < help_data->num_of_pg ; i++) { 1719 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg && 1720 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg) 1721 BNX2X_ERR("Invalid pg[%d] data %x\n", i, 1722 help_data->data[i].pg); 1723 pri_join_mask |= help_data->data[i].pg_priority; 1724 num_of_dif_pri += help_data->data[i].num_of_dif_pri; 1725 } 1726 1727 /* defaults */ 1728 cos_data.num_of_cos = 1; 1729 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) { 1730 cos_data.data[i].pri_join_mask = 0; 1731 cos_data.data[i].pausable = false; 1732 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID; 1733 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW; 1734 } 1735 1736 if (CHIP_IS_E3B0(bp)) 1737 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets, 1738 &cos_data, pri_join_mask); 1739 else /* E2 + E3A0 */ 1740 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp, 1741 help_data, ets, 1742 &cos_data, 1743 pg_pri_orginal_spread, 1744 pri_join_mask, 1745 num_of_dif_pri); 1746 1747 for (i = 0; i < cos_data.num_of_cos ; i++) { 1748 struct bnx2x_dcbx_cos_params *p = 1749 &bp->dcbx_port_params.ets.cos_params[i]; 1750 1751 p->strict = cos_data.data[i].strict; 1752 p->bw_tbl = cos_data.data[i].cos_bw; 1753 p->pri_bitmask = cos_data.data[i].pri_join_mask; 1754 p->pauseable = cos_data.data[i].pausable; 1755 1756 /* sanity */ 1757 if (p->bw_tbl != DCBX_INVALID_COS_BW || 1758 p->strict != BNX2X_DCBX_STRICT_INVALID) { 1759 if (p->pri_bitmask == 0) 1760 BNX2X_ERR("Invalid pri_bitmask for %d\n", i); 1761 1762 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) { 1763 1764 if (p->pauseable && 1765 DCBX_PFC_PRI_GET_NON_PAUSE(bp, 1766 p->pri_bitmask) != 0) 1767 BNX2X_ERR("Inconsistent config for pausable COS %d\n", 1768 i); 1769 1770 if (!p->pauseable && 1771 DCBX_PFC_PRI_GET_PAUSE(bp, 1772 p->pri_bitmask) != 0) 1773 BNX2X_ERR("Inconsistent config for nonpausable COS %d\n", 1774 i); 1775 } 1776 } 1777 1778 if (p->pauseable) 1779 DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n", 1780 i, cos_data.data[i].pri_join_mask); 1781 else 1782 DP(BNX2X_MSG_DCB, 1783 "COS %d NONPAUSABLE prijoinmask 0x%x\n", 1784 i, cos_data.data[i].pri_join_mask); 1785 } 1786 1787 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ; 1788 } 1789 1790 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 1791 u32 *set_configuration_ets_pg, 1792 u32 *pri_pg_tbl) 1793 { 1794 int i; 1795 1796 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 1797 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i); 1798 1799 DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n", 1800 i, set_configuration_ets_pg[i]); 1801 } 1802 } 1803 1804 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 1805 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1806 { 1807 u16 pri_bit = 0; 1808 u8 cos = 0, pri = 0; 1809 struct priority_cos *tt2cos; 1810 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1811 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 1812 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1813 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 1814 1815 memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg)); 1816 1817 /* to disable DCB - the structure must be zeroed */ 1818 if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured) 1819 return; 1820 1821 /*shortcut*/ 1822 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos; 1823 1824 /* Fw version should be incremented each update */ 1825 pfc_fw_cfg->dcb_version = ++bp->dcb_version; 1826 pfc_fw_cfg->dcb_enabled = 1; 1827 1828 /* Fill priority parameters */ 1829 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1830 tt2cos[pri].priority = ttp[pri]; 1831 pri_bit = 1 << tt2cos[pri].priority; 1832 1833 /* Fill COS parameters based on COS calculated to 1834 * make it more general for future use */ 1835 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) 1836 if (bp->dcbx_port_params.ets.cos_params[cos]. 1837 pri_bitmask & pri_bit) 1838 tt2cos[pri].cos = cos; 1839 } 1840 1841 /* we never want the FW to add a 0 vlan tag */ 1842 pfc_fw_cfg->dont_add_pri_0_en = 1; 1843 1844 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg); 1845 } 1846 1847 void bnx2x_dcbx_pmf_update(struct bnx2x *bp) 1848 { 1849 /* if we need to syncronize DCBX result from prev PMF 1850 * read it from shmem and update bp and netdev accordingly 1851 */ 1852 if (SHMEM2_HAS(bp, drv_flags) && 1853 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) { 1854 /* Read neg results if dcbx is in the FW */ 1855 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 1856 return; 1857 1858 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1859 bp->dcbx_error); 1860 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1861 bp->dcbx_error); 1862 #ifdef BCM_DCBNL 1863 /* 1864 * Add new app tlvs to dcbnl 1865 */ 1866 bnx2x_dcbnl_update_applist(bp, false); 1867 /* 1868 * Send a notification for the new negotiated parameters 1869 */ 1870 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 1871 #endif 1872 /* 1873 * reconfigure the netdevice with the results of the new 1874 * dcbx negotiation. 1875 */ 1876 bnx2x_dcbx_update_tc_mapping(bp); 1877 1878 } 1879 } 1880 1881 /* DCB netlink */ 1882 #ifdef BCM_DCBNL 1883 1884 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \ 1885 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC) 1886 1887 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp) 1888 { 1889 /* validate dcbnl call that may change HW state: 1890 * DCB is on and DCBX mode was SUCCESSFULLY set by the user. 1891 */ 1892 return bp->dcb_state && bp->dcbx_mode_uset; 1893 } 1894 1895 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev) 1896 { 1897 struct bnx2x *bp = netdev_priv(netdev); 1898 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state); 1899 return bp->dcb_state; 1900 } 1901 1902 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state) 1903 { 1904 struct bnx2x *bp = netdev_priv(netdev); 1905 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 1906 1907 if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) || 1908 (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) { 1909 DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n"); 1910 return 1; 1911 } 1912 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled); 1913 return 0; 1914 } 1915 1916 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev, 1917 u8 *perm_addr) 1918 { 1919 struct bnx2x *bp = netdev_priv(netdev); 1920 DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n"); 1921 1922 /* first the HW mac address */ 1923 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len); 1924 1925 if (CNIC_LOADED(bp)) 1926 /* second SAN address */ 1927 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, 1928 netdev->addr_len); 1929 } 1930 1931 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio, 1932 u8 prio_type, u8 pgid, u8 bw_pct, 1933 u8 up_map) 1934 { 1935 struct bnx2x *bp = netdev_priv(netdev); 1936 1937 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid); 1938 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 1939 return; 1940 1941 /** 1942 * bw_pct ingnored - band-width percentage devision between user 1943 * priorities within the same group is not 1944 * standard and hence not supported 1945 * 1946 * prio_type igonred - priority levels within the same group are not 1947 * standard and hence are not supported. According 1948 * to the standard pgid 15 is dedicated to strict 1949 * prioirty traffic (on the port level). 1950 * 1951 * up_map ignored 1952 */ 1953 1954 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid; 1955 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1956 } 1957 1958 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev, 1959 int pgid, u8 bw_pct) 1960 { 1961 struct bnx2x *bp = netdev_priv(netdev); 1962 DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct); 1963 1964 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 1965 return; 1966 1967 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct; 1968 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1969 } 1970 1971 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio, 1972 u8 prio_type, u8 pgid, u8 bw_pct, 1973 u8 up_map) 1974 { 1975 struct bnx2x *bp = netdev_priv(netdev); 1976 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 1977 } 1978 1979 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev, 1980 int pgid, u8 bw_pct) 1981 { 1982 struct bnx2x *bp = netdev_priv(netdev); 1983 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 1984 } 1985 1986 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio, 1987 u8 *prio_type, u8 *pgid, u8 *bw_pct, 1988 u8 *up_map) 1989 { 1990 struct bnx2x *bp = netdev_priv(netdev); 1991 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 1992 1993 /** 1994 * bw_pct ingnored - band-width percentage devision between user 1995 * priorities within the same group is not 1996 * standard and hence not supported 1997 * 1998 * prio_type igonred - priority levels within the same group are not 1999 * standard and hence are not supported. According 2000 * to the standard pgid 15 is dedicated to strict 2001 * prioirty traffic (on the port level). 2002 * 2003 * up_map ignored 2004 */ 2005 *up_map = *bw_pct = *prio_type = *pgid = 0; 2006 2007 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 2008 return; 2009 2010 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio); 2011 } 2012 2013 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev, 2014 int pgid, u8 *bw_pct) 2015 { 2016 struct bnx2x *bp = netdev_priv(netdev); 2017 DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid); 2018 2019 *bw_pct = 0; 2020 2021 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 2022 return; 2023 2024 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid); 2025 } 2026 2027 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio, 2028 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2029 u8 *up_map) 2030 { 2031 struct bnx2x *bp = netdev_priv(netdev); 2032 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2033 2034 *prio_type = *pgid = *bw_pct = *up_map = 0; 2035 } 2036 2037 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev, 2038 int pgid, u8 *bw_pct) 2039 { 2040 struct bnx2x *bp = netdev_priv(netdev); 2041 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2042 2043 *bw_pct = 0; 2044 } 2045 2046 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio, 2047 u8 setting) 2048 { 2049 struct bnx2x *bp = netdev_priv(netdev); 2050 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting); 2051 2052 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES) 2053 return; 2054 2055 2056 if (setting) { 2057 bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio); 2058 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 2059 } else { 2060 bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio); 2061 } 2062 } 2063 2064 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio, 2065 u8 *setting) 2066 { 2067 struct bnx2x *bp = netdev_priv(netdev); 2068 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2069 2070 *setting = 0; 2071 2072 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES) 2073 return; 2074 2075 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1; 2076 } 2077 2078 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev) 2079 { 2080 struct bnx2x *bp = netdev_priv(netdev); 2081 int rc = 0; 2082 2083 DP(BNX2X_MSG_DCB, "SET-ALL\n"); 2084 2085 if (!bnx2x_dcbnl_set_valid(bp)) 2086 return 1; 2087 2088 if (bp->recovery_state != BNX2X_RECOVERY_DONE) { 2089 netdev_err(bp->dev, 2090 "Handling parity error recovery. Try again later\n"); 2091 return 1; 2092 } 2093 if (netif_running(bp->dev)) { 2094 bnx2x_update_drv_flags(bp, 2095 1 << DRV_FLAGS_DCB_MFW_CONFIGURED, 2096 1); 2097 bnx2x_dcbx_init(bp, true); 2098 } 2099 DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc); 2100 if (rc) 2101 return 1; 2102 2103 return 0; 2104 } 2105 2106 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap) 2107 { 2108 struct bnx2x *bp = netdev_priv(netdev); 2109 u8 rval = 0; 2110 2111 if (bp->dcb_state) { 2112 switch (capid) { 2113 case DCB_CAP_ATTR_PG: 2114 *cap = true; 2115 break; 2116 case DCB_CAP_ATTR_PFC: 2117 *cap = true; 2118 break; 2119 case DCB_CAP_ATTR_UP2TC: 2120 *cap = false; 2121 break; 2122 case DCB_CAP_ATTR_PG_TCS: 2123 *cap = 0x80; /* 8 priorities for PGs */ 2124 break; 2125 case DCB_CAP_ATTR_PFC_TCS: 2126 *cap = 0x80; /* 8 priorities for PFC */ 2127 break; 2128 case DCB_CAP_ATTR_GSP: 2129 *cap = true; 2130 break; 2131 case DCB_CAP_ATTR_BCN: 2132 *cap = false; 2133 break; 2134 case DCB_CAP_ATTR_DCBX: 2135 *cap = BNX2X_DCBX_CAPS; 2136 break; 2137 default: 2138 BNX2X_ERR("Non valid capability ID\n"); 2139 rval = -EINVAL; 2140 break; 2141 } 2142 } else { 2143 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2144 rval = -EINVAL; 2145 } 2146 2147 DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap); 2148 return rval; 2149 } 2150 2151 static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num) 2152 { 2153 struct bnx2x *bp = netdev_priv(netdev); 2154 u8 rval = 0; 2155 2156 DP(BNX2X_MSG_DCB, "tcid %d\n", tcid); 2157 2158 if (bp->dcb_state) { 2159 switch (tcid) { 2160 case DCB_NUMTCS_ATTR_PG: 2161 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2162 DCBX_COS_MAX_NUM_E2; 2163 break; 2164 case DCB_NUMTCS_ATTR_PFC: 2165 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2166 DCBX_COS_MAX_NUM_E2; 2167 break; 2168 default: 2169 BNX2X_ERR("Non valid TC-ID\n"); 2170 rval = -EINVAL; 2171 break; 2172 } 2173 } else { 2174 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2175 rval = -EINVAL; 2176 } 2177 2178 return rval; 2179 } 2180 2181 static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) 2182 { 2183 struct bnx2x *bp = netdev_priv(netdev); 2184 DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num); 2185 return -EINVAL; 2186 } 2187 2188 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) 2189 { 2190 struct bnx2x *bp = netdev_priv(netdev); 2191 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled); 2192 2193 if (!bp->dcb_state) 2194 return 0; 2195 2196 return bp->dcbx_local_feat.pfc.enabled; 2197 } 2198 2199 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state) 2200 { 2201 struct bnx2x *bp = netdev_priv(netdev); 2202 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 2203 2204 if (!bnx2x_dcbnl_set_valid(bp)) 2205 return; 2206 2207 bp->dcbx_config_params.admin_pfc_tx_enable = 2208 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0); 2209 } 2210 2211 static void bnx2x_admin_app_set_ent( 2212 struct bnx2x_admin_priority_app_table *app_ent, 2213 u8 idtype, u16 idval, u8 up) 2214 { 2215 app_ent->valid = 1; 2216 2217 switch (idtype) { 2218 case DCB_APP_IDTYPE_ETHTYPE: 2219 app_ent->traffic_type = TRAFFIC_TYPE_ETH; 2220 break; 2221 case DCB_APP_IDTYPE_PORTNUM: 2222 app_ent->traffic_type = TRAFFIC_TYPE_PORT; 2223 break; 2224 default: 2225 break; /* never gets here */ 2226 } 2227 app_ent->app_id = idval; 2228 app_ent->priority = up; 2229 } 2230 2231 static bool bnx2x_admin_app_is_equal( 2232 struct bnx2x_admin_priority_app_table *app_ent, 2233 u8 idtype, u16 idval) 2234 { 2235 if (!app_ent->valid) 2236 return false; 2237 2238 switch (idtype) { 2239 case DCB_APP_IDTYPE_ETHTYPE: 2240 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH) 2241 return false; 2242 break; 2243 case DCB_APP_IDTYPE_PORTNUM: 2244 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT) 2245 return false; 2246 break; 2247 default: 2248 return false; 2249 } 2250 if (app_ent->app_id != idval) 2251 return false; 2252 2253 return true; 2254 } 2255 2256 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up) 2257 { 2258 int i, ff; 2259 2260 /* iterate over the app entries looking for idtype and idval */ 2261 for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 2262 struct bnx2x_admin_priority_app_table *app_ent = 2263 &bp->dcbx_config_params.admin_priority_app_table[i]; 2264 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval)) 2265 break; 2266 2267 if (ff < 0 && !app_ent->valid) 2268 ff = i; 2269 } 2270 if (i < DCBX_CONFIG_MAX_APP_PROTOCOL) 2271 /* if found overwrite up */ 2272 bp->dcbx_config_params. 2273 admin_priority_app_table[i].priority = up; 2274 else if (ff >= 0) 2275 /* not found use first-free */ 2276 bnx2x_admin_app_set_ent( 2277 &bp->dcbx_config_params.admin_priority_app_table[ff], 2278 idtype, idval, up); 2279 else { 2280 /* app table is full */ 2281 BNX2X_ERR("Application table is too large\n"); 2282 return -EBUSY; 2283 } 2284 2285 /* up configured, if not 0 make sure feature is enabled */ 2286 if (up) 2287 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 2288 2289 return 0; 2290 } 2291 2292 static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype, 2293 u16 idval, u8 up) 2294 { 2295 struct bnx2x *bp = netdev_priv(netdev); 2296 2297 DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n", 2298 idtype, idval, up); 2299 2300 if (!bnx2x_dcbnl_set_valid(bp)) { 2301 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2302 return -EINVAL; 2303 } 2304 2305 /* verify idtype */ 2306 switch (idtype) { 2307 case DCB_APP_IDTYPE_ETHTYPE: 2308 case DCB_APP_IDTYPE_PORTNUM: 2309 break; 2310 default: 2311 DP(BNX2X_MSG_DCB, "Wrong ID type\n"); 2312 return -EINVAL; 2313 } 2314 return bnx2x_set_admin_app_up(bp, idtype, idval, up); 2315 } 2316 2317 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev) 2318 { 2319 struct bnx2x *bp = netdev_priv(netdev); 2320 u8 state; 2321 2322 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE; 2323 2324 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF) 2325 state |= DCB_CAP_DCBX_STATIC; 2326 2327 return state; 2328 } 2329 2330 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state) 2331 { 2332 struct bnx2x *bp = netdev_priv(netdev); 2333 DP(BNX2X_MSG_DCB, "state = %02x\n", state); 2334 2335 /* set dcbx mode */ 2336 2337 if ((state & BNX2X_DCBX_CAPS) != state) { 2338 BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n", 2339 state); 2340 return 1; 2341 } 2342 2343 if (bp->dcb_state != BNX2X_DCB_STATE_ON) { 2344 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n"); 2345 return 1; 2346 } 2347 2348 if (state & DCB_CAP_DCBX_STATIC) 2349 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF; 2350 else 2351 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON; 2352 2353 bp->dcbx_mode_uset = true; 2354 return 0; 2355 } 2356 2357 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, 2358 u8 *flags) 2359 { 2360 struct bnx2x *bp = netdev_priv(netdev); 2361 u8 rval = 0; 2362 2363 DP(BNX2X_MSG_DCB, "featid %d\n", featid); 2364 2365 if (bp->dcb_state) { 2366 *flags = 0; 2367 switch (featid) { 2368 case DCB_FEATCFG_ATTR_PG: 2369 if (bp->dcbx_local_feat.ets.enabled) 2370 *flags |= DCB_FEATCFG_ENABLE; 2371 if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR) 2372 *flags |= DCB_FEATCFG_ERROR; 2373 break; 2374 case DCB_FEATCFG_ATTR_PFC: 2375 if (bp->dcbx_local_feat.pfc.enabled) 2376 *flags |= DCB_FEATCFG_ENABLE; 2377 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR | 2378 DCBX_LOCAL_PFC_MISMATCH)) 2379 *flags |= DCB_FEATCFG_ERROR; 2380 break; 2381 case DCB_FEATCFG_ATTR_APP: 2382 if (bp->dcbx_local_feat.app.enabled) 2383 *flags |= DCB_FEATCFG_ENABLE; 2384 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR | 2385 DCBX_LOCAL_APP_MISMATCH)) 2386 *flags |= DCB_FEATCFG_ERROR; 2387 break; 2388 default: 2389 BNX2X_ERR("Non valid featrue-ID\n"); 2390 rval = -EINVAL; 2391 break; 2392 } 2393 } else { 2394 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2395 rval = -EINVAL; 2396 } 2397 2398 return rval; 2399 } 2400 2401 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, 2402 u8 flags) 2403 { 2404 struct bnx2x *bp = netdev_priv(netdev); 2405 u8 rval = 0; 2406 2407 DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags); 2408 2409 /* ignore the 'advertise' flag */ 2410 if (bnx2x_dcbnl_set_valid(bp)) { 2411 switch (featid) { 2412 case DCB_FEATCFG_ATTR_PG: 2413 bp->dcbx_config_params.admin_ets_enable = 2414 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2415 bp->dcbx_config_params.admin_ets_willing = 2416 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2417 break; 2418 case DCB_FEATCFG_ATTR_PFC: 2419 bp->dcbx_config_params.admin_pfc_enable = 2420 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2421 bp->dcbx_config_params.admin_pfc_willing = 2422 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2423 break; 2424 case DCB_FEATCFG_ATTR_APP: 2425 /* ignore enable, always enabled */ 2426 bp->dcbx_config_params.admin_app_priority_willing = 2427 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2428 break; 2429 default: 2430 BNX2X_ERR("Non valid featrue-ID\n"); 2431 rval = -EINVAL; 2432 break; 2433 } 2434 } else { 2435 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2436 rval = -EINVAL; 2437 } 2438 2439 return rval; 2440 } 2441 2442 static int bnx2x_peer_appinfo(struct net_device *netdev, 2443 struct dcb_peer_app_info *info, u16* app_count) 2444 { 2445 int i; 2446 struct bnx2x *bp = netdev_priv(netdev); 2447 2448 DP(BNX2X_MSG_DCB, "APP-INFO\n"); 2449 2450 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0; 2451 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0; 2452 *app_count = 0; 2453 2454 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) 2455 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield & 2456 DCBX_APP_ENTRY_VALID) 2457 (*app_count)++; 2458 return 0; 2459 } 2460 2461 static int bnx2x_peer_apptable(struct net_device *netdev, 2462 struct dcb_app *table) 2463 { 2464 int i, j; 2465 struct bnx2x *bp = netdev_priv(netdev); 2466 2467 DP(BNX2X_MSG_DCB, "APP-TABLE\n"); 2468 2469 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 2470 struct dcbx_app_priority_entry *ent = 2471 &bp->dcbx_remote_feat.app.app_pri_tbl[i]; 2472 2473 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 2474 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 2475 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent); 2476 table[j++].protocol = ent->app_id; 2477 } 2478 } 2479 return 0; 2480 } 2481 2482 static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg) 2483 { 2484 int i; 2485 struct bnx2x *bp = netdev_priv(netdev); 2486 2487 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0; 2488 2489 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) { 2490 pg->pg_bw[i] = 2491 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i); 2492 pg->prio_pg[i] = 2493 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i); 2494 } 2495 return 0; 2496 } 2497 2498 static int bnx2x_cee_peer_getpfc(struct net_device *netdev, 2499 struct cee_pfc *pfc) 2500 { 2501 struct bnx2x *bp = netdev_priv(netdev); 2502 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps; 2503 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap; 2504 return 0; 2505 } 2506 2507 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = { 2508 .getstate = bnx2x_dcbnl_get_state, 2509 .setstate = bnx2x_dcbnl_set_state, 2510 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr, 2511 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx, 2512 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx, 2513 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx, 2514 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx, 2515 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx, 2516 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx, 2517 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx, 2518 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx, 2519 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg, 2520 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg, 2521 .setall = bnx2x_dcbnl_set_all, 2522 .getcap = bnx2x_dcbnl_get_cap, 2523 .getnumtcs = bnx2x_dcbnl_get_numtcs, 2524 .setnumtcs = bnx2x_dcbnl_set_numtcs, 2525 .getpfcstate = bnx2x_dcbnl_get_pfc_state, 2526 .setpfcstate = bnx2x_dcbnl_set_pfc_state, 2527 .setapp = bnx2x_dcbnl_set_app_up, 2528 .getdcbx = bnx2x_dcbnl_get_dcbx, 2529 .setdcbx = bnx2x_dcbnl_set_dcbx, 2530 .getfeatcfg = bnx2x_dcbnl_get_featcfg, 2531 .setfeatcfg = bnx2x_dcbnl_set_featcfg, 2532 .peer_getappinfo = bnx2x_peer_appinfo, 2533 .peer_getapptable = bnx2x_peer_apptable, 2534 .cee_peer_getpg = bnx2x_cee_peer_getpg, 2535 .cee_peer_getpfc = bnx2x_cee_peer_getpfc, 2536 }; 2537 2538 #endif /* BCM_DCBNL */ 2539