1 /* Altera Triple-Speed Ethernet MAC driver
2  * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
3  *
4  * Contributors:
5  *   Dalon Westergreen
6  *   Thomas Chou
7  *   Ian Abbott
8  *   Yuriy Kozlov
9  *   Tobias Klauser
10  *   Andriy Smolskyy
11  *   Roman Bulgakov
12  *   Dmytro Mytarchuk
13  *   Matthew Gerlach
14  *
15  * Original driver contributed by SLS.
16  * Major updates contributed by GlobalLogic
17  *
18  * This program is free software; you can redistribute it and/or modify it
19  * under the terms and conditions of the GNU General Public License,
20  * version 2, as published by the Free Software Foundation.
21  *
22  * This program is distributed in the hope it will be useful, but WITHOUT
23  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
24  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
25  * more details.
26  *
27  * You should have received a copy of the GNU General Public License along with
28  * this program.  If not, see <http://www.gnu.org/licenses/>.
29  */
30 
31 #include <linux/atomic.h>
32 #include <linux/delay.h>
33 #include <linux/etherdevice.h>
34 #include <linux/if_vlan.h>
35 #include <linux/init.h>
36 #include <linux/interrupt.h>
37 #include <linux/io.h>
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/netdevice.h>
41 #include <linux/of_device.h>
42 #include <linux/of_mdio.h>
43 #include <linux/of_net.h>
44 #include <linux/of_platform.h>
45 #include <linux/phy.h>
46 #include <linux/platform_device.h>
47 #include <linux/skbuff.h>
48 #include <asm/cacheflush.h>
49 
50 #include "altera_utils.h"
51 #include "altera_tse.h"
52 #include "altera_sgdma.h"
53 #include "altera_msgdma.h"
54 
55 static atomic_t instance_count = ATOMIC_INIT(~0);
56 /* Module parameters */
57 static int debug = -1;
58 module_param(debug, int, S_IRUGO | S_IWUSR);
59 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
60 
61 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
62 					NETIF_MSG_LINK | NETIF_MSG_IFUP |
63 					NETIF_MSG_IFDOWN);
64 
65 #define RX_DESCRIPTORS 64
66 static int dma_rx_num = RX_DESCRIPTORS;
67 module_param(dma_rx_num, int, S_IRUGO | S_IWUSR);
68 MODULE_PARM_DESC(dma_rx_num, "Number of descriptors in the RX list");
69 
70 #define TX_DESCRIPTORS 64
71 static int dma_tx_num = TX_DESCRIPTORS;
72 module_param(dma_tx_num, int, S_IRUGO | S_IWUSR);
73 MODULE_PARM_DESC(dma_tx_num, "Number of descriptors in the TX list");
74 
75 
76 #define POLL_PHY (-1)
77 
78 /* Make sure DMA buffer size is larger than the max frame size
79  * plus some alignment offset and a VLAN header. If the max frame size is
80  * 1518, a VLAN header would be additional 4 bytes and additional
81  * headroom for alignment is 2 bytes, 2048 is just fine.
82  */
83 #define ALTERA_RXDMABUFFER_SIZE	2048
84 
85 /* Allow network stack to resume queueing packets after we've
86  * finished transmitting at least 1/4 of the packets in the queue.
87  */
88 #define TSE_TX_THRESH(x)	(x->tx_ring_size / 4)
89 
90 #define TXQUEUESTOP_THRESHHOLD	2
91 
92 static const struct of_device_id altera_tse_ids[];
93 
94 static inline u32 tse_tx_avail(struct altera_tse_private *priv)
95 {
96 	return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1;
97 }
98 
99 /* MDIO specific functions
100  */
101 static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
102 {
103 	struct net_device *ndev = bus->priv;
104 	struct altera_tse_private *priv = netdev_priv(ndev);
105 
106 	/* set MDIO address */
107 	csrwr32((mii_id & 0x1f), priv->mac_dev,
108 		tse_csroffs(mdio_phy1_addr));
109 
110 	/* get the data */
111 	return csrrd32(priv->mac_dev,
112 		       tse_csroffs(mdio_phy1) + regnum * 4) & 0xffff;
113 }
114 
115 static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
116 				 u16 value)
117 {
118 	struct net_device *ndev = bus->priv;
119 	struct altera_tse_private *priv = netdev_priv(ndev);
120 
121 	/* set MDIO address */
122 	csrwr32((mii_id & 0x1f), priv->mac_dev,
123 		tse_csroffs(mdio_phy1_addr));
124 
125 	/* write the data */
126 	csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy1) + regnum * 4);
127 	return 0;
128 }
129 
130 static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)
131 {
132 	struct altera_tse_private *priv = netdev_priv(dev);
133 	int ret;
134 	struct device_node *mdio_node = NULL;
135 	struct mii_bus *mdio = NULL;
136 	struct device_node *child_node = NULL;
137 
138 	for_each_child_of_node(priv->device->of_node, child_node) {
139 		if (of_device_is_compatible(child_node, "altr,tse-mdio")) {
140 			mdio_node = child_node;
141 			break;
142 		}
143 	}
144 
145 	if (mdio_node) {
146 		netdev_dbg(dev, "FOUND MDIO subnode\n");
147 	} else {
148 		netdev_dbg(dev, "NO MDIO subnode\n");
149 		return 0;
150 	}
151 
152 	mdio = mdiobus_alloc();
153 	if (mdio == NULL) {
154 		netdev_err(dev, "Error allocating MDIO bus\n");
155 		return -ENOMEM;
156 	}
157 
158 	mdio->name = ALTERA_TSE_RESOURCE_NAME;
159 	mdio->read = &altera_tse_mdio_read;
160 	mdio->write = &altera_tse_mdio_write;
161 	snprintf(mdio->id, MII_BUS_ID_SIZE, "%s-%u", mdio->name, id);
162 
163 	mdio->priv = dev;
164 	mdio->parent = priv->device;
165 
166 	ret = of_mdiobus_register(mdio, mdio_node);
167 	if (ret != 0) {
168 		netdev_err(dev, "Cannot register MDIO bus %s\n",
169 			   mdio->id);
170 		goto out_free_mdio;
171 	}
172 
173 	if (netif_msg_drv(priv))
174 		netdev_info(dev, "MDIO bus %s: created\n", mdio->id);
175 
176 	priv->mdio = mdio;
177 	return 0;
178 out_free_mdio:
179 	mdiobus_free(mdio);
180 	mdio = NULL;
181 	return ret;
182 }
183 
184 static void altera_tse_mdio_destroy(struct net_device *dev)
185 {
186 	struct altera_tse_private *priv = netdev_priv(dev);
187 
188 	if (priv->mdio == NULL)
189 		return;
190 
191 	if (netif_msg_drv(priv))
192 		netdev_info(dev, "MDIO bus %s: removed\n",
193 			    priv->mdio->id);
194 
195 	mdiobus_unregister(priv->mdio);
196 	mdiobus_free(priv->mdio);
197 	priv->mdio = NULL;
198 }
199 
200 static int tse_init_rx_buffer(struct altera_tse_private *priv,
201 			      struct tse_buffer *rxbuffer, int len)
202 {
203 	rxbuffer->skb = netdev_alloc_skb_ip_align(priv->dev, len);
204 	if (!rxbuffer->skb)
205 		return -ENOMEM;
206 
207 	rxbuffer->dma_addr = dma_map_single(priv->device, rxbuffer->skb->data,
208 						len,
209 						DMA_FROM_DEVICE);
210 
211 	if (dma_mapping_error(priv->device, rxbuffer->dma_addr)) {
212 		netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
213 		dev_kfree_skb_any(rxbuffer->skb);
214 		return -EINVAL;
215 	}
216 	rxbuffer->dma_addr &= (dma_addr_t)~3;
217 	rxbuffer->len = len;
218 	return 0;
219 }
220 
221 static void tse_free_rx_buffer(struct altera_tse_private *priv,
222 			       struct tse_buffer *rxbuffer)
223 {
224 	struct sk_buff *skb = rxbuffer->skb;
225 	dma_addr_t dma_addr = rxbuffer->dma_addr;
226 
227 	if (skb != NULL) {
228 		if (dma_addr)
229 			dma_unmap_single(priv->device, dma_addr,
230 					 rxbuffer->len,
231 					 DMA_FROM_DEVICE);
232 		dev_kfree_skb_any(skb);
233 		rxbuffer->skb = NULL;
234 		rxbuffer->dma_addr = 0;
235 	}
236 }
237 
238 /* Unmap and free Tx buffer resources
239  */
240 static void tse_free_tx_buffer(struct altera_tse_private *priv,
241 			       struct tse_buffer *buffer)
242 {
243 	if (buffer->dma_addr) {
244 		if (buffer->mapped_as_page)
245 			dma_unmap_page(priv->device, buffer->dma_addr,
246 				       buffer->len, DMA_TO_DEVICE);
247 		else
248 			dma_unmap_single(priv->device, buffer->dma_addr,
249 					 buffer->len, DMA_TO_DEVICE);
250 		buffer->dma_addr = 0;
251 	}
252 	if (buffer->skb) {
253 		dev_kfree_skb_any(buffer->skb);
254 		buffer->skb = NULL;
255 	}
256 }
257 
258 static int alloc_init_skbufs(struct altera_tse_private *priv)
259 {
260 	unsigned int rx_descs = priv->rx_ring_size;
261 	unsigned int tx_descs = priv->tx_ring_size;
262 	int ret = -ENOMEM;
263 	int i;
264 
265 	/* Create Rx ring buffer */
266 	priv->rx_ring = kcalloc(rx_descs, sizeof(struct tse_buffer),
267 				GFP_KERNEL);
268 	if (!priv->rx_ring)
269 		goto err_rx_ring;
270 
271 	/* Create Tx ring buffer */
272 	priv->tx_ring = kcalloc(tx_descs, sizeof(struct tse_buffer),
273 				GFP_KERNEL);
274 	if (!priv->tx_ring)
275 		goto err_tx_ring;
276 
277 	priv->tx_cons = 0;
278 	priv->tx_prod = 0;
279 
280 	/* Init Rx ring */
281 	for (i = 0; i < rx_descs; i++) {
282 		ret = tse_init_rx_buffer(priv, &priv->rx_ring[i],
283 					 priv->rx_dma_buf_sz);
284 		if (ret)
285 			goto err_init_rx_buffers;
286 	}
287 
288 	priv->rx_cons = 0;
289 	priv->rx_prod = 0;
290 
291 	return 0;
292 err_init_rx_buffers:
293 	while (--i >= 0)
294 		tse_free_rx_buffer(priv, &priv->rx_ring[i]);
295 	kfree(priv->tx_ring);
296 err_tx_ring:
297 	kfree(priv->rx_ring);
298 err_rx_ring:
299 	return ret;
300 }
301 
302 static void free_skbufs(struct net_device *dev)
303 {
304 	struct altera_tse_private *priv = netdev_priv(dev);
305 	unsigned int rx_descs = priv->rx_ring_size;
306 	unsigned int tx_descs = priv->tx_ring_size;
307 	int i;
308 
309 	/* Release the DMA TX/RX socket buffers */
310 	for (i = 0; i < rx_descs; i++)
311 		tse_free_rx_buffer(priv, &priv->rx_ring[i]);
312 	for (i = 0; i < tx_descs; i++)
313 		tse_free_tx_buffer(priv, &priv->tx_ring[i]);
314 
315 
316 	kfree(priv->tx_ring);
317 }
318 
319 /* Reallocate the skb for the reception process
320  */
321 static inline void tse_rx_refill(struct altera_tse_private *priv)
322 {
323 	unsigned int rxsize = priv->rx_ring_size;
324 	unsigned int entry;
325 	int ret;
326 
327 	for (; priv->rx_cons - priv->rx_prod > 0;
328 			priv->rx_prod++) {
329 		entry = priv->rx_prod % rxsize;
330 		if (likely(priv->rx_ring[entry].skb == NULL)) {
331 			ret = tse_init_rx_buffer(priv, &priv->rx_ring[entry],
332 				priv->rx_dma_buf_sz);
333 			if (unlikely(ret != 0))
334 				break;
335 			priv->dmaops->add_rx_desc(priv, &priv->rx_ring[entry]);
336 		}
337 	}
338 }
339 
340 /* Pull out the VLAN tag and fix up the packet
341  */
342 static inline void tse_rx_vlan(struct net_device *dev, struct sk_buff *skb)
343 {
344 	struct ethhdr *eth_hdr;
345 	u16 vid;
346 	if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
347 	    !__vlan_get_tag(skb, &vid)) {
348 		eth_hdr = (struct ethhdr *)skb->data;
349 		memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
350 		skb_pull(skb, VLAN_HLEN);
351 		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
352 	}
353 }
354 
355 /* Receive a packet: retrieve and pass over to upper levels
356  */
357 static int tse_rx(struct altera_tse_private *priv, int limit)
358 {
359 	unsigned int count = 0;
360 	unsigned int next_entry;
361 	struct sk_buff *skb;
362 	unsigned int entry = priv->rx_cons % priv->rx_ring_size;
363 	u32 rxstatus;
364 	u16 pktlength;
365 	u16 pktstatus;
366 
367 	/* Check for count < limit first as get_rx_status is changing
368 	* the response-fifo so we must process the next packet
369 	* after calling get_rx_status if a response is pending.
370 	* (reading the last byte of the response pops the value from the fifo.)
371 	*/
372 	while ((count < limit) &&
373 	       ((rxstatus = priv->dmaops->get_rx_status(priv)) != 0)) {
374 		pktstatus = rxstatus >> 16;
375 		pktlength = rxstatus & 0xffff;
376 
377 		if ((pktstatus & 0xFF) || (pktlength == 0))
378 			netdev_err(priv->dev,
379 				   "RCV pktstatus %08X pktlength %08X\n",
380 				   pktstatus, pktlength);
381 
382 		/* DMA trasfer from TSE starts with 2 aditional bytes for
383 		 * IP payload alignment. Status returned by get_rx_status()
384 		 * contains DMA transfer length. Packet is 2 bytes shorter.
385 		 */
386 		pktlength -= 2;
387 
388 		count++;
389 		next_entry = (++priv->rx_cons) % priv->rx_ring_size;
390 
391 		skb = priv->rx_ring[entry].skb;
392 		if (unlikely(!skb)) {
393 			netdev_err(priv->dev,
394 				   "%s: Inconsistent Rx descriptor chain\n",
395 				   __func__);
396 			priv->dev->stats.rx_dropped++;
397 			break;
398 		}
399 		priv->rx_ring[entry].skb = NULL;
400 
401 		skb_put(skb, pktlength);
402 
403 		/* make cache consistent with receive packet buffer */
404 		dma_sync_single_for_cpu(priv->device,
405 					priv->rx_ring[entry].dma_addr,
406 					priv->rx_ring[entry].len,
407 					DMA_FROM_DEVICE);
408 
409 		dma_unmap_single(priv->device, priv->rx_ring[entry].dma_addr,
410 				 priv->rx_ring[entry].len, DMA_FROM_DEVICE);
411 
412 		if (netif_msg_pktdata(priv)) {
413 			netdev_info(priv->dev, "frame received %d bytes\n",
414 				    pktlength);
415 			print_hex_dump(KERN_ERR, "data: ", DUMP_PREFIX_OFFSET,
416 				       16, 1, skb->data, pktlength, true);
417 		}
418 
419 		tse_rx_vlan(priv->dev, skb);
420 
421 		skb->protocol = eth_type_trans(skb, priv->dev);
422 		skb_checksum_none_assert(skb);
423 
424 		napi_gro_receive(&priv->napi, skb);
425 
426 		priv->dev->stats.rx_packets++;
427 		priv->dev->stats.rx_bytes += pktlength;
428 
429 		entry = next_entry;
430 
431 		tse_rx_refill(priv);
432 	}
433 
434 	return count;
435 }
436 
437 /* Reclaim resources after transmission completes
438  */
439 static int tse_tx_complete(struct altera_tse_private *priv)
440 {
441 	unsigned int txsize = priv->tx_ring_size;
442 	u32 ready;
443 	unsigned int entry;
444 	struct tse_buffer *tx_buff;
445 	int txcomplete = 0;
446 
447 	spin_lock(&priv->tx_lock);
448 
449 	ready = priv->dmaops->tx_completions(priv);
450 
451 	/* Free sent buffers */
452 	while (ready && (priv->tx_cons != priv->tx_prod)) {
453 		entry = priv->tx_cons % txsize;
454 		tx_buff = &priv->tx_ring[entry];
455 
456 		if (netif_msg_tx_done(priv))
457 			netdev_dbg(priv->dev, "%s: curr %d, dirty %d\n",
458 				   __func__, priv->tx_prod, priv->tx_cons);
459 
460 		if (likely(tx_buff->skb))
461 			priv->dev->stats.tx_packets++;
462 
463 		tse_free_tx_buffer(priv, tx_buff);
464 		priv->tx_cons++;
465 
466 		txcomplete++;
467 		ready--;
468 	}
469 
470 	if (unlikely(netif_queue_stopped(priv->dev) &&
471 		     tse_tx_avail(priv) > TSE_TX_THRESH(priv))) {
472 		netif_tx_lock(priv->dev);
473 		if (netif_queue_stopped(priv->dev) &&
474 		    tse_tx_avail(priv) > TSE_TX_THRESH(priv)) {
475 			if (netif_msg_tx_done(priv))
476 				netdev_dbg(priv->dev, "%s: restart transmit\n",
477 					   __func__);
478 			netif_wake_queue(priv->dev);
479 		}
480 		netif_tx_unlock(priv->dev);
481 	}
482 
483 	spin_unlock(&priv->tx_lock);
484 	return txcomplete;
485 }
486 
487 /* NAPI polling function
488  */
489 static int tse_poll(struct napi_struct *napi, int budget)
490 {
491 	struct altera_tse_private *priv =
492 			container_of(napi, struct altera_tse_private, napi);
493 	int rxcomplete = 0;
494 	unsigned long int flags;
495 
496 	tse_tx_complete(priv);
497 
498 	rxcomplete = tse_rx(priv, budget);
499 
500 	if (rxcomplete < budget) {
501 
502 		napi_complete(napi);
503 
504 		netdev_dbg(priv->dev,
505 			   "NAPI Complete, did %d packets with budget %d\n",
506 			   rxcomplete, budget);
507 
508 		spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
509 		priv->dmaops->enable_rxirq(priv);
510 		priv->dmaops->enable_txirq(priv);
511 		spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
512 	}
513 	return rxcomplete;
514 }
515 
516 /* DMA TX & RX FIFO interrupt routing
517  */
518 static irqreturn_t altera_isr(int irq, void *dev_id)
519 {
520 	struct net_device *dev = dev_id;
521 	struct altera_tse_private *priv;
522 
523 	if (unlikely(!dev)) {
524 		pr_err("%s: invalid dev pointer\n", __func__);
525 		return IRQ_NONE;
526 	}
527 	priv = netdev_priv(dev);
528 
529 	spin_lock(&priv->rxdma_irq_lock);
530 	/* reset IRQs */
531 	priv->dmaops->clear_rxirq(priv);
532 	priv->dmaops->clear_txirq(priv);
533 	spin_unlock(&priv->rxdma_irq_lock);
534 
535 	if (likely(napi_schedule_prep(&priv->napi))) {
536 		spin_lock(&priv->rxdma_irq_lock);
537 		priv->dmaops->disable_rxirq(priv);
538 		priv->dmaops->disable_txirq(priv);
539 		spin_unlock(&priv->rxdma_irq_lock);
540 		__napi_schedule(&priv->napi);
541 	}
542 
543 
544 	return IRQ_HANDLED;
545 }
546 
547 /* Transmit a packet (called by the kernel). Dispatches
548  * either the SGDMA method for transmitting or the
549  * MSGDMA method, assumes no scatter/gather support,
550  * implying an assumption that there's only one
551  * physically contiguous fragment starting at
552  * skb->data, for length of skb_headlen(skb).
553  */
554 static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev)
555 {
556 	struct altera_tse_private *priv = netdev_priv(dev);
557 	unsigned int txsize = priv->tx_ring_size;
558 	unsigned int entry;
559 	struct tse_buffer *buffer = NULL;
560 	int nfrags = skb_shinfo(skb)->nr_frags;
561 	unsigned int nopaged_len = skb_headlen(skb);
562 	enum netdev_tx ret = NETDEV_TX_OK;
563 	dma_addr_t dma_addr;
564 
565 	spin_lock_bh(&priv->tx_lock);
566 
567 	if (unlikely(tse_tx_avail(priv) < nfrags + 1)) {
568 		if (!netif_queue_stopped(dev)) {
569 			netif_stop_queue(dev);
570 			/* This is a hard error, log it. */
571 			netdev_err(priv->dev,
572 				   "%s: Tx list full when queue awake\n",
573 				   __func__);
574 		}
575 		ret = NETDEV_TX_BUSY;
576 		goto out;
577 	}
578 
579 	/* Map the first skb fragment */
580 	entry = priv->tx_prod % txsize;
581 	buffer = &priv->tx_ring[entry];
582 
583 	dma_addr = dma_map_single(priv->device, skb->data, nopaged_len,
584 				  DMA_TO_DEVICE);
585 	if (dma_mapping_error(priv->device, dma_addr)) {
586 		netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
587 		ret = NETDEV_TX_OK;
588 		goto out;
589 	}
590 
591 	buffer->skb = skb;
592 	buffer->dma_addr = dma_addr;
593 	buffer->len = nopaged_len;
594 
595 	/* Push data out of the cache hierarchy into main memory */
596 	dma_sync_single_for_device(priv->device, buffer->dma_addr,
597 				   buffer->len, DMA_TO_DEVICE);
598 
599 	priv->dmaops->tx_buffer(priv, buffer);
600 
601 	skb_tx_timestamp(skb);
602 
603 	priv->tx_prod++;
604 	dev->stats.tx_bytes += skb->len;
605 
606 	if (unlikely(tse_tx_avail(priv) <= TXQUEUESTOP_THRESHHOLD)) {
607 		if (netif_msg_hw(priv))
608 			netdev_dbg(priv->dev, "%s: stop transmitted packets\n",
609 				   __func__);
610 		netif_stop_queue(dev);
611 	}
612 
613 out:
614 	spin_unlock_bh(&priv->tx_lock);
615 
616 	return ret;
617 }
618 
619 /* Called every time the controller might need to be made
620  * aware of new link state.  The PHY code conveys this
621  * information through variables in the phydev structure, and this
622  * function converts those variables into the appropriate
623  * register values, and can bring down the device if needed.
624  */
625 static void altera_tse_adjust_link(struct net_device *dev)
626 {
627 	struct altera_tse_private *priv = netdev_priv(dev);
628 	struct phy_device *phydev = dev->phydev;
629 	int new_state = 0;
630 
631 	/* only change config if there is a link */
632 	spin_lock(&priv->mac_cfg_lock);
633 	if (phydev->link) {
634 		/* Read old config */
635 		u32 cfg_reg = ioread32(&priv->mac_dev->command_config);
636 
637 		/* Check duplex */
638 		if (phydev->duplex != priv->oldduplex) {
639 			new_state = 1;
640 			if (!(phydev->duplex))
641 				cfg_reg |= MAC_CMDCFG_HD_ENA;
642 			else
643 				cfg_reg &= ~MAC_CMDCFG_HD_ENA;
644 
645 			netdev_dbg(priv->dev, "%s: Link duplex = 0x%x\n",
646 				   dev->name, phydev->duplex);
647 
648 			priv->oldduplex = phydev->duplex;
649 		}
650 
651 		/* Check speed */
652 		if (phydev->speed != priv->oldspeed) {
653 			new_state = 1;
654 			switch (phydev->speed) {
655 			case 1000:
656 				cfg_reg |= MAC_CMDCFG_ETH_SPEED;
657 				cfg_reg &= ~MAC_CMDCFG_ENA_10;
658 				break;
659 			case 100:
660 				cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
661 				cfg_reg &= ~MAC_CMDCFG_ENA_10;
662 				break;
663 			case 10:
664 				cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
665 				cfg_reg |= MAC_CMDCFG_ENA_10;
666 				break;
667 			default:
668 				if (netif_msg_link(priv))
669 					netdev_warn(dev, "Speed (%d) is not 10/100/1000!\n",
670 						    phydev->speed);
671 				break;
672 			}
673 			priv->oldspeed = phydev->speed;
674 		}
675 		iowrite32(cfg_reg, &priv->mac_dev->command_config);
676 
677 		if (!priv->oldlink) {
678 			new_state = 1;
679 			priv->oldlink = 1;
680 		}
681 	} else if (priv->oldlink) {
682 		new_state = 1;
683 		priv->oldlink = 0;
684 		priv->oldspeed = 0;
685 		priv->oldduplex = -1;
686 	}
687 
688 	if (new_state && netif_msg_link(priv))
689 		phy_print_status(phydev);
690 
691 	spin_unlock(&priv->mac_cfg_lock);
692 }
693 static struct phy_device *connect_local_phy(struct net_device *dev)
694 {
695 	struct altera_tse_private *priv = netdev_priv(dev);
696 	struct phy_device *phydev = NULL;
697 	char phy_id_fmt[MII_BUS_ID_SIZE + 3];
698 
699 	if (priv->phy_addr != POLL_PHY) {
700 		snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
701 			 priv->mdio->id, priv->phy_addr);
702 
703 		netdev_dbg(dev, "trying to attach to %s\n", phy_id_fmt);
704 
705 		phydev = phy_connect(dev, phy_id_fmt, &altera_tse_adjust_link,
706 				     priv->phy_iface);
707 		if (IS_ERR(phydev))
708 			netdev_err(dev, "Could not attach to PHY\n");
709 
710 	} else {
711 		int ret;
712 		phydev = phy_find_first(priv->mdio);
713 		if (phydev == NULL) {
714 			netdev_err(dev, "No PHY found\n");
715 			return phydev;
716 		}
717 
718 		ret = phy_connect_direct(dev, phydev, &altera_tse_adjust_link,
719 				priv->phy_iface);
720 		if (ret != 0) {
721 			netdev_err(dev, "Could not attach to PHY\n");
722 			phydev = NULL;
723 		}
724 	}
725 	return phydev;
726 }
727 
728 static int altera_tse_phy_get_addr_mdio_create(struct net_device *dev)
729 {
730 	struct altera_tse_private *priv = netdev_priv(dev);
731 	struct device_node *np = priv->device->of_node;
732 	int ret = 0;
733 
734 	priv->phy_iface = of_get_phy_mode(np);
735 
736 	/* Avoid get phy addr and create mdio if no phy is present */
737 	if (!priv->phy_iface)
738 		return 0;
739 
740 	/* try to get PHY address from device tree, use PHY autodetection if
741 	 * no valid address is given
742 	 */
743 
744 	if (of_property_read_u32(priv->device->of_node, "phy-addr",
745 			 &priv->phy_addr)) {
746 		priv->phy_addr = POLL_PHY;
747 	}
748 
749 	if (!((priv->phy_addr == POLL_PHY) ||
750 		  ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) {
751 		netdev_err(dev, "invalid phy-addr specified %d\n",
752 			priv->phy_addr);
753 		return -ENODEV;
754 	}
755 
756 	/* Create/attach to MDIO bus */
757 	ret = altera_tse_mdio_create(dev,
758 					 atomic_add_return(1, &instance_count));
759 
760 	if (ret)
761 		return -ENODEV;
762 
763 	return 0;
764 }
765 
766 /* Initialize driver's PHY state, and attach to the PHY
767  */
768 static int init_phy(struct net_device *dev)
769 {
770 	struct altera_tse_private *priv = netdev_priv(dev);
771 	struct phy_device *phydev;
772 	struct device_node *phynode;
773 	bool fixed_link = false;
774 	int rc = 0;
775 
776 	/* Avoid init phy in case of no phy present */
777 	if (!priv->phy_iface)
778 		return 0;
779 
780 	priv->oldlink = 0;
781 	priv->oldspeed = 0;
782 	priv->oldduplex = -1;
783 
784 	phynode = of_parse_phandle(priv->device->of_node, "phy-handle", 0);
785 
786 	if (!phynode) {
787 		/* check if a fixed-link is defined in device-tree */
788 		if (of_phy_is_fixed_link(priv->device->of_node)) {
789 			rc = of_phy_register_fixed_link(priv->device->of_node);
790 			if (rc < 0) {
791 				netdev_err(dev, "cannot register fixed PHY\n");
792 				return rc;
793 			}
794 
795 			/* In the case of a fixed PHY, the DT node associated
796 			 * to the PHY is the Ethernet MAC DT node.
797 			 */
798 			phynode = of_node_get(priv->device->of_node);
799 			fixed_link = true;
800 
801 			netdev_dbg(dev, "fixed-link detected\n");
802 			phydev = of_phy_connect(dev, phynode,
803 						&altera_tse_adjust_link,
804 						0, priv->phy_iface);
805 		} else {
806 			netdev_dbg(dev, "no phy-handle found\n");
807 			if (!priv->mdio) {
808 				netdev_err(dev, "No phy-handle nor local mdio specified\n");
809 				return -ENODEV;
810 			}
811 			phydev = connect_local_phy(dev);
812 		}
813 	} else {
814 		netdev_dbg(dev, "phy-handle found\n");
815 		phydev = of_phy_connect(dev, phynode,
816 			&altera_tse_adjust_link, 0, priv->phy_iface);
817 	}
818 	of_node_put(phynode);
819 
820 	if (!phydev) {
821 		netdev_err(dev, "Could not find the PHY\n");
822 		return -ENODEV;
823 	}
824 
825 	/* Stop Advertising 1000BASE Capability if interface is not GMII
826 	 * Note: Checkpatch throws CHECKs for the camel case defines below,
827 	 * it's ok to ignore.
828 	 */
829 	if ((priv->phy_iface == PHY_INTERFACE_MODE_MII) ||
830 	    (priv->phy_iface == PHY_INTERFACE_MODE_RMII))
831 		phydev->advertising &= ~(SUPPORTED_1000baseT_Half |
832 					 SUPPORTED_1000baseT_Full);
833 
834 	/* Broken HW is sometimes missing the pull-up resistor on the
835 	 * MDIO line, which results in reads to non-existent devices returning
836 	 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
837 	 * device as well. If a fixed-link is used the phy_id is always 0.
838 	 * Note: phydev->phy_id is the result of reading the UID PHY registers.
839 	 */
840 	if ((phydev->phy_id == 0) && !fixed_link) {
841 		netdev_err(dev, "Bad PHY UID 0x%08x\n", phydev->phy_id);
842 		phy_disconnect(phydev);
843 		return -ENODEV;
844 	}
845 
846 	netdev_dbg(dev, "attached to PHY %d UID 0x%08x Link = %d\n",
847 		   phydev->mdio.addr, phydev->phy_id, phydev->link);
848 
849 	return 0;
850 }
851 
852 static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr)
853 {
854 	u32 msb;
855 	u32 lsb;
856 
857 	msb = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
858 	lsb = ((addr[5] << 8) | addr[4]) & 0xffff;
859 
860 	/* Set primary MAC address */
861 	csrwr32(msb, priv->mac_dev, tse_csroffs(mac_addr_0));
862 	csrwr32(lsb, priv->mac_dev, tse_csroffs(mac_addr_1));
863 }
864 
865 /* MAC software reset.
866  * When reset is triggered, the MAC function completes the current
867  * transmission or reception, and subsequently disables the transmit and
868  * receive logic, flushes the receive FIFO buffer, and resets the statistics
869  * counters.
870  */
871 static int reset_mac(struct altera_tse_private *priv)
872 {
873 	int counter;
874 	u32 dat;
875 
876 	dat = csrrd32(priv->mac_dev, tse_csroffs(command_config));
877 	dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
878 	dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET;
879 	csrwr32(dat, priv->mac_dev, tse_csroffs(command_config));
880 
881 	counter = 0;
882 	while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
883 		if (tse_bit_is_clear(priv->mac_dev, tse_csroffs(command_config),
884 				     MAC_CMDCFG_SW_RESET))
885 			break;
886 		udelay(1);
887 	}
888 
889 	if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
890 		dat = csrrd32(priv->mac_dev, tse_csroffs(command_config));
891 		dat &= ~MAC_CMDCFG_SW_RESET;
892 		csrwr32(dat, priv->mac_dev, tse_csroffs(command_config));
893 		return -1;
894 	}
895 	return 0;
896 }
897 
898 /* Initialize MAC core registers
899 */
900 static int init_mac(struct altera_tse_private *priv)
901 {
902 	unsigned int cmd = 0;
903 	u32 frm_length;
904 
905 	/* Setup Rx FIFO */
906 	csrwr32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY,
907 		priv->mac_dev, tse_csroffs(rx_section_empty));
908 
909 	csrwr32(ALTERA_TSE_RX_SECTION_FULL, priv->mac_dev,
910 		tse_csroffs(rx_section_full));
911 
912 	csrwr32(ALTERA_TSE_RX_ALMOST_EMPTY, priv->mac_dev,
913 		tse_csroffs(rx_almost_empty));
914 
915 	csrwr32(ALTERA_TSE_RX_ALMOST_FULL, priv->mac_dev,
916 		tse_csroffs(rx_almost_full));
917 
918 	/* Setup Tx FIFO */
919 	csrwr32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY,
920 		priv->mac_dev, tse_csroffs(tx_section_empty));
921 
922 	csrwr32(ALTERA_TSE_TX_SECTION_FULL, priv->mac_dev,
923 		tse_csroffs(tx_section_full));
924 
925 	csrwr32(ALTERA_TSE_TX_ALMOST_EMPTY, priv->mac_dev,
926 		tse_csroffs(tx_almost_empty));
927 
928 	csrwr32(ALTERA_TSE_TX_ALMOST_FULL, priv->mac_dev,
929 		tse_csroffs(tx_almost_full));
930 
931 	/* MAC Address Configuration */
932 	tse_update_mac_addr(priv, priv->dev->dev_addr);
933 
934 	/* MAC Function Configuration */
935 	frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN;
936 	csrwr32(frm_length, priv->mac_dev, tse_csroffs(frm_length));
937 
938 	csrwr32(ALTERA_TSE_TX_IPG_LENGTH, priv->mac_dev,
939 		tse_csroffs(tx_ipg_length));
940 
941 	/* Disable RX/TX shift 16 for alignment of all received frames on 16-bit
942 	 * start address
943 	 */
944 	tse_set_bit(priv->mac_dev, tse_csroffs(rx_cmd_stat),
945 		    ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16);
946 
947 	tse_clear_bit(priv->mac_dev, tse_csroffs(tx_cmd_stat),
948 		      ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 |
949 		      ALTERA_TSE_TX_CMD_STAT_OMIT_CRC);
950 
951 	/* Set the MAC options */
952 	cmd = csrrd32(priv->mac_dev, tse_csroffs(command_config));
953 	cmd &= ~MAC_CMDCFG_PAD_EN;	/* No padding Removal on Receive */
954 	cmd &= ~MAC_CMDCFG_CRC_FWD;	/* CRC Removal */
955 	cmd |= MAC_CMDCFG_RX_ERR_DISC;	/* Automatically discard frames
956 					 * with CRC errors
957 					 */
958 	cmd |= MAC_CMDCFG_CNTL_FRM_ENA;
959 	cmd &= ~MAC_CMDCFG_TX_ENA;
960 	cmd &= ~MAC_CMDCFG_RX_ENA;
961 
962 	/* Default speed and duplex setting, full/100 */
963 	cmd &= ~MAC_CMDCFG_HD_ENA;
964 	cmd &= ~MAC_CMDCFG_ETH_SPEED;
965 	cmd &= ~MAC_CMDCFG_ENA_10;
966 
967 	csrwr32(cmd, priv->mac_dev, tse_csroffs(command_config));
968 
969 	csrwr32(ALTERA_TSE_PAUSE_QUANTA, priv->mac_dev,
970 		tse_csroffs(pause_quanta));
971 
972 	if (netif_msg_hw(priv))
973 		dev_dbg(priv->device,
974 			"MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd);
975 
976 	return 0;
977 }
978 
979 /* Start/stop MAC transmission logic
980  */
981 static void tse_set_mac(struct altera_tse_private *priv, bool enable)
982 {
983 	u32 value = csrrd32(priv->mac_dev, tse_csroffs(command_config));
984 
985 	if (enable)
986 		value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA;
987 	else
988 		value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
989 
990 	csrwr32(value, priv->mac_dev, tse_csroffs(command_config));
991 }
992 
993 /* Change the MTU
994  */
995 static int tse_change_mtu(struct net_device *dev, int new_mtu)
996 {
997 	struct altera_tse_private *priv = netdev_priv(dev);
998 	unsigned int max_mtu = priv->max_mtu;
999 	unsigned int min_mtu = ETH_ZLEN + ETH_FCS_LEN;
1000 
1001 	if (netif_running(dev)) {
1002 		netdev_err(dev, "must be stopped to change its MTU\n");
1003 		return -EBUSY;
1004 	}
1005 
1006 	if ((new_mtu < min_mtu) || (new_mtu > max_mtu)) {
1007 		netdev_err(dev, "invalid MTU, max MTU is: %u\n", max_mtu);
1008 		return -EINVAL;
1009 	}
1010 
1011 	dev->mtu = new_mtu;
1012 	netdev_update_features(dev);
1013 
1014 	return 0;
1015 }
1016 
1017 static void altera_tse_set_mcfilter(struct net_device *dev)
1018 {
1019 	struct altera_tse_private *priv = netdev_priv(dev);
1020 	int i;
1021 	struct netdev_hw_addr *ha;
1022 
1023 	/* clear the hash filter */
1024 	for (i = 0; i < 64; i++)
1025 		csrwr32(0, priv->mac_dev, tse_csroffs(hash_table) + i * 4);
1026 
1027 	netdev_for_each_mc_addr(ha, dev) {
1028 		unsigned int hash = 0;
1029 		int mac_octet;
1030 
1031 		for (mac_octet = 5; mac_octet >= 0; mac_octet--) {
1032 			unsigned char xor_bit = 0;
1033 			unsigned char octet = ha->addr[mac_octet];
1034 			unsigned int bitshift;
1035 
1036 			for (bitshift = 0; bitshift < 8; bitshift++)
1037 				xor_bit ^= ((octet >> bitshift) & 0x01);
1038 
1039 			hash = (hash << 1) | xor_bit;
1040 		}
1041 		csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + hash * 4);
1042 	}
1043 }
1044 
1045 
1046 static void altera_tse_set_mcfilterall(struct net_device *dev)
1047 {
1048 	struct altera_tse_private *priv = netdev_priv(dev);
1049 	int i;
1050 
1051 	/* set the hash filter */
1052 	for (i = 0; i < 64; i++)
1053 		csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + i * 4);
1054 }
1055 
1056 /* Set or clear the multicast filter for this adaptor
1057  */
1058 static void tse_set_rx_mode_hashfilter(struct net_device *dev)
1059 {
1060 	struct altera_tse_private *priv = netdev_priv(dev);
1061 
1062 	spin_lock(&priv->mac_cfg_lock);
1063 
1064 	if (dev->flags & IFF_PROMISC)
1065 		tse_set_bit(priv->mac_dev, tse_csroffs(command_config),
1066 			    MAC_CMDCFG_PROMIS_EN);
1067 
1068 	if (dev->flags & IFF_ALLMULTI)
1069 		altera_tse_set_mcfilterall(dev);
1070 	else
1071 		altera_tse_set_mcfilter(dev);
1072 
1073 	spin_unlock(&priv->mac_cfg_lock);
1074 }
1075 
1076 /* Set or clear the multicast filter for this adaptor
1077  */
1078 static void tse_set_rx_mode(struct net_device *dev)
1079 {
1080 	struct altera_tse_private *priv = netdev_priv(dev);
1081 
1082 	spin_lock(&priv->mac_cfg_lock);
1083 
1084 	if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) ||
1085 	    !netdev_mc_empty(dev) || !netdev_uc_empty(dev))
1086 		tse_set_bit(priv->mac_dev, tse_csroffs(command_config),
1087 			    MAC_CMDCFG_PROMIS_EN);
1088 	else
1089 		tse_clear_bit(priv->mac_dev, tse_csroffs(command_config),
1090 			      MAC_CMDCFG_PROMIS_EN);
1091 
1092 	spin_unlock(&priv->mac_cfg_lock);
1093 }
1094 
1095 /* Open and initialize the interface
1096  */
1097 static int tse_open(struct net_device *dev)
1098 {
1099 	struct altera_tse_private *priv = netdev_priv(dev);
1100 	int ret = 0;
1101 	int i;
1102 	unsigned long int flags;
1103 
1104 	/* Reset and configure TSE MAC and probe associated PHY */
1105 	ret = priv->dmaops->init_dma(priv);
1106 	if (ret != 0) {
1107 		netdev_err(dev, "Cannot initialize DMA\n");
1108 		goto phy_error;
1109 	}
1110 
1111 	if (netif_msg_ifup(priv))
1112 		netdev_warn(dev, "device MAC address %pM\n",
1113 			    dev->dev_addr);
1114 
1115 	if ((priv->revision < 0xd00) || (priv->revision > 0xe00))
1116 		netdev_warn(dev, "TSE revision %x\n", priv->revision);
1117 
1118 	spin_lock(&priv->mac_cfg_lock);
1119 	ret = reset_mac(priv);
1120 	/* Note that reset_mac will fail if the clocks are gated by the PHY
1121 	 * due to the PHY being put into isolation or power down mode.
1122 	 * This is not an error if reset fails due to no clock.
1123 	 */
1124 	if (ret)
1125 		netdev_dbg(dev, "Cannot reset MAC core (error: %d)\n", ret);
1126 
1127 	ret = init_mac(priv);
1128 	spin_unlock(&priv->mac_cfg_lock);
1129 	if (ret) {
1130 		netdev_err(dev, "Cannot init MAC core (error: %d)\n", ret);
1131 		goto alloc_skbuf_error;
1132 	}
1133 
1134 	priv->dmaops->reset_dma(priv);
1135 
1136 	/* Create and initialize the TX/RX descriptors chains. */
1137 	priv->rx_ring_size = dma_rx_num;
1138 	priv->tx_ring_size = dma_tx_num;
1139 	ret = alloc_init_skbufs(priv);
1140 	if (ret) {
1141 		netdev_err(dev, "DMA descriptors initialization failed\n");
1142 		goto alloc_skbuf_error;
1143 	}
1144 
1145 
1146 	/* Register RX interrupt */
1147 	ret = request_irq(priv->rx_irq, altera_isr, IRQF_SHARED,
1148 			  dev->name, dev);
1149 	if (ret) {
1150 		netdev_err(dev, "Unable to register RX interrupt %d\n",
1151 			   priv->rx_irq);
1152 		goto init_error;
1153 	}
1154 
1155 	/* Register TX interrupt */
1156 	ret = request_irq(priv->tx_irq, altera_isr, IRQF_SHARED,
1157 			  dev->name, dev);
1158 	if (ret) {
1159 		netdev_err(dev, "Unable to register TX interrupt %d\n",
1160 			   priv->tx_irq);
1161 		goto tx_request_irq_error;
1162 	}
1163 
1164 	/* Enable DMA interrupts */
1165 	spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1166 	priv->dmaops->enable_rxirq(priv);
1167 	priv->dmaops->enable_txirq(priv);
1168 
1169 	/* Setup RX descriptor chain */
1170 	for (i = 0; i < priv->rx_ring_size; i++)
1171 		priv->dmaops->add_rx_desc(priv, &priv->rx_ring[i]);
1172 
1173 	spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1174 
1175 	if (dev->phydev)
1176 		phy_start(dev->phydev);
1177 
1178 	napi_enable(&priv->napi);
1179 	netif_start_queue(dev);
1180 
1181 	priv->dmaops->start_rxdma(priv);
1182 
1183 	/* Start MAC Rx/Tx */
1184 	spin_lock(&priv->mac_cfg_lock);
1185 	tse_set_mac(priv, true);
1186 	spin_unlock(&priv->mac_cfg_lock);
1187 
1188 	return 0;
1189 
1190 tx_request_irq_error:
1191 	free_irq(priv->rx_irq, dev);
1192 init_error:
1193 	free_skbufs(dev);
1194 alloc_skbuf_error:
1195 phy_error:
1196 	return ret;
1197 }
1198 
1199 /* Stop TSE MAC interface and put the device in an inactive state
1200  */
1201 static int tse_shutdown(struct net_device *dev)
1202 {
1203 	struct altera_tse_private *priv = netdev_priv(dev);
1204 	int ret;
1205 	unsigned long int flags;
1206 
1207 	/* Stop the PHY */
1208 	if (dev->phydev)
1209 		phy_stop(dev->phydev);
1210 
1211 	netif_stop_queue(dev);
1212 	napi_disable(&priv->napi);
1213 
1214 	/* Disable DMA interrupts */
1215 	spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1216 	priv->dmaops->disable_rxirq(priv);
1217 	priv->dmaops->disable_txirq(priv);
1218 	spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1219 
1220 	/* Free the IRQ lines */
1221 	free_irq(priv->rx_irq, dev);
1222 	free_irq(priv->tx_irq, dev);
1223 
1224 	/* disable and reset the MAC, empties fifo */
1225 	spin_lock(&priv->mac_cfg_lock);
1226 	spin_lock(&priv->tx_lock);
1227 
1228 	ret = reset_mac(priv);
1229 	/* Note that reset_mac will fail if the clocks are gated by the PHY
1230 	 * due to the PHY being put into isolation or power down mode.
1231 	 * This is not an error if reset fails due to no clock.
1232 	 */
1233 	if (ret)
1234 		netdev_dbg(dev, "Cannot reset MAC core (error: %d)\n", ret);
1235 	priv->dmaops->reset_dma(priv);
1236 	free_skbufs(dev);
1237 
1238 	spin_unlock(&priv->tx_lock);
1239 	spin_unlock(&priv->mac_cfg_lock);
1240 
1241 	priv->dmaops->uninit_dma(priv);
1242 
1243 	return 0;
1244 }
1245 
1246 static struct net_device_ops altera_tse_netdev_ops = {
1247 	.ndo_open		= tse_open,
1248 	.ndo_stop		= tse_shutdown,
1249 	.ndo_start_xmit		= tse_start_xmit,
1250 	.ndo_set_mac_address	= eth_mac_addr,
1251 	.ndo_set_rx_mode	= tse_set_rx_mode,
1252 	.ndo_change_mtu		= tse_change_mtu,
1253 	.ndo_validate_addr	= eth_validate_addr,
1254 };
1255 
1256 static int request_and_map(struct platform_device *pdev, const char *name,
1257 			   struct resource **res, void __iomem **ptr)
1258 {
1259 	struct resource *region;
1260 	struct device *device = &pdev->dev;
1261 
1262 	*res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
1263 	if (*res == NULL) {
1264 		dev_err(device, "resource %s not defined\n", name);
1265 		return -ENODEV;
1266 	}
1267 
1268 	region = devm_request_mem_region(device, (*res)->start,
1269 					 resource_size(*res), dev_name(device));
1270 	if (region == NULL) {
1271 		dev_err(device, "unable to request %s\n", name);
1272 		return -EBUSY;
1273 	}
1274 
1275 	*ptr = devm_ioremap_nocache(device, region->start,
1276 				    resource_size(region));
1277 	if (*ptr == NULL) {
1278 		dev_err(device, "ioremap_nocache of %s failed!", name);
1279 		return -ENOMEM;
1280 	}
1281 
1282 	return 0;
1283 }
1284 
1285 /* Probe Altera TSE MAC device
1286  */
1287 static int altera_tse_probe(struct platform_device *pdev)
1288 {
1289 	struct net_device *ndev;
1290 	int ret = -ENODEV;
1291 	struct resource *control_port;
1292 	struct resource *dma_res;
1293 	struct altera_tse_private *priv;
1294 	const unsigned char *macaddr;
1295 	void __iomem *descmap;
1296 	const struct of_device_id *of_id = NULL;
1297 
1298 	ndev = alloc_etherdev(sizeof(struct altera_tse_private));
1299 	if (!ndev) {
1300 		dev_err(&pdev->dev, "Could not allocate network device\n");
1301 		return -ENODEV;
1302 	}
1303 
1304 	SET_NETDEV_DEV(ndev, &pdev->dev);
1305 
1306 	priv = netdev_priv(ndev);
1307 	priv->device = &pdev->dev;
1308 	priv->dev = ndev;
1309 	priv->msg_enable = netif_msg_init(debug, default_msg_level);
1310 
1311 	of_id = of_match_device(altera_tse_ids, &pdev->dev);
1312 
1313 	if (of_id)
1314 		priv->dmaops = (struct altera_dmaops *)of_id->data;
1315 
1316 
1317 	if (priv->dmaops &&
1318 	    priv->dmaops->altera_dtype == ALTERA_DTYPE_SGDMA) {
1319 		/* Get the mapped address to the SGDMA descriptor memory */
1320 		ret = request_and_map(pdev, "s1", &dma_res, &descmap);
1321 		if (ret)
1322 			goto err_free_netdev;
1323 
1324 		/* Start of that memory is for transmit descriptors */
1325 		priv->tx_dma_desc = descmap;
1326 
1327 		/* First half is for tx descriptors, other half for tx */
1328 		priv->txdescmem = resource_size(dma_res)/2;
1329 
1330 		priv->txdescmem_busaddr = (dma_addr_t)dma_res->start;
1331 
1332 		priv->rx_dma_desc = (void __iomem *)((uintptr_t)(descmap +
1333 						     priv->txdescmem));
1334 		priv->rxdescmem = resource_size(dma_res)/2;
1335 		priv->rxdescmem_busaddr = dma_res->start;
1336 		priv->rxdescmem_busaddr += priv->txdescmem;
1337 
1338 		if (upper_32_bits(priv->rxdescmem_busaddr)) {
1339 			dev_dbg(priv->device,
1340 				"SGDMA bus addresses greater than 32-bits\n");
1341 			goto err_free_netdev;
1342 		}
1343 		if (upper_32_bits(priv->txdescmem_busaddr)) {
1344 			dev_dbg(priv->device,
1345 				"SGDMA bus addresses greater than 32-bits\n");
1346 			goto err_free_netdev;
1347 		}
1348 	} else if (priv->dmaops &&
1349 		   priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) {
1350 		ret = request_and_map(pdev, "rx_resp", &dma_res,
1351 				      &priv->rx_dma_resp);
1352 		if (ret)
1353 			goto err_free_netdev;
1354 
1355 		ret = request_and_map(pdev, "tx_desc", &dma_res,
1356 				      &priv->tx_dma_desc);
1357 		if (ret)
1358 			goto err_free_netdev;
1359 
1360 		priv->txdescmem = resource_size(dma_res);
1361 		priv->txdescmem_busaddr = dma_res->start;
1362 
1363 		ret = request_and_map(pdev, "rx_desc", &dma_res,
1364 				      &priv->rx_dma_desc);
1365 		if (ret)
1366 			goto err_free_netdev;
1367 
1368 		priv->rxdescmem = resource_size(dma_res);
1369 		priv->rxdescmem_busaddr = dma_res->start;
1370 
1371 	} else {
1372 		goto err_free_netdev;
1373 	}
1374 
1375 	if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask)))
1376 		dma_set_coherent_mask(priv->device,
1377 				      DMA_BIT_MASK(priv->dmaops->dmamask));
1378 	else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32)))
1379 		dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32));
1380 	else
1381 		goto err_free_netdev;
1382 
1383 	/* MAC address space */
1384 	ret = request_and_map(pdev, "control_port", &control_port,
1385 			      (void __iomem **)&priv->mac_dev);
1386 	if (ret)
1387 		goto err_free_netdev;
1388 
1389 	/* xSGDMA Rx Dispatcher address space */
1390 	ret = request_and_map(pdev, "rx_csr", &dma_res,
1391 			      &priv->rx_dma_csr);
1392 	if (ret)
1393 		goto err_free_netdev;
1394 
1395 
1396 	/* xSGDMA Tx Dispatcher address space */
1397 	ret = request_and_map(pdev, "tx_csr", &dma_res,
1398 			      &priv->tx_dma_csr);
1399 	if (ret)
1400 		goto err_free_netdev;
1401 
1402 
1403 	/* Rx IRQ */
1404 	priv->rx_irq = platform_get_irq_byname(pdev, "rx_irq");
1405 	if (priv->rx_irq == -ENXIO) {
1406 		dev_err(&pdev->dev, "cannot obtain Rx IRQ\n");
1407 		ret = -ENXIO;
1408 		goto err_free_netdev;
1409 	}
1410 
1411 	/* Tx IRQ */
1412 	priv->tx_irq = platform_get_irq_byname(pdev, "tx_irq");
1413 	if (priv->tx_irq == -ENXIO) {
1414 		dev_err(&pdev->dev, "cannot obtain Tx IRQ\n");
1415 		ret = -ENXIO;
1416 		goto err_free_netdev;
1417 	}
1418 
1419 	/* get FIFO depths from device tree */
1420 	if (of_property_read_u32(pdev->dev.of_node, "rx-fifo-depth",
1421 				 &priv->rx_fifo_depth)) {
1422 		dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n");
1423 		ret = -ENXIO;
1424 		goto err_free_netdev;
1425 	}
1426 
1427 	if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
1428 				 &priv->tx_fifo_depth)) {
1429 		dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n");
1430 		ret = -ENXIO;
1431 		goto err_free_netdev;
1432 	}
1433 
1434 	/* get hash filter settings for this instance */
1435 	priv->hash_filter =
1436 		of_property_read_bool(pdev->dev.of_node,
1437 				      "altr,has-hash-multicast-filter");
1438 
1439 	/* Set hash filter to not set for now until the
1440 	 * multicast filter receive issue is debugged
1441 	 */
1442 	priv->hash_filter = 0;
1443 
1444 	/* get supplemental address settings for this instance */
1445 	priv->added_unicast =
1446 		of_property_read_bool(pdev->dev.of_node,
1447 				      "altr,has-supplementary-unicast");
1448 
1449 	/* Max MTU is 1500, ETH_DATA_LEN */
1450 	priv->max_mtu = ETH_DATA_LEN;
1451 
1452 	/* Get the max mtu from the device tree. Note that the
1453 	 * "max-frame-size" parameter is actually max mtu. Definition
1454 	 * in the ePAPR v1.1 spec and usage differ, so go with usage.
1455 	 */
1456 	of_property_read_u32(pdev->dev.of_node, "max-frame-size",
1457 			     &priv->max_mtu);
1458 
1459 	/* The DMA buffer size already accounts for an alignment bias
1460 	 * to avoid unaligned access exceptions for the NIOS processor,
1461 	 */
1462 	priv->rx_dma_buf_sz = ALTERA_RXDMABUFFER_SIZE;
1463 
1464 	/* get default MAC address from device tree */
1465 	macaddr = of_get_mac_address(pdev->dev.of_node);
1466 	if (macaddr)
1467 		ether_addr_copy(ndev->dev_addr, macaddr);
1468 	else
1469 		eth_hw_addr_random(ndev);
1470 
1471 	/* get phy addr and create mdio */
1472 	ret = altera_tse_phy_get_addr_mdio_create(ndev);
1473 
1474 	if (ret)
1475 		goto err_free_netdev;
1476 
1477 	/* initialize netdev */
1478 	ndev->mem_start = control_port->start;
1479 	ndev->mem_end = control_port->end;
1480 	ndev->netdev_ops = &altera_tse_netdev_ops;
1481 	altera_tse_set_ethtool_ops(ndev);
1482 
1483 	altera_tse_netdev_ops.ndo_set_rx_mode = tse_set_rx_mode;
1484 
1485 	if (priv->hash_filter)
1486 		altera_tse_netdev_ops.ndo_set_rx_mode =
1487 			tse_set_rx_mode_hashfilter;
1488 
1489 	/* Scatter/gather IO is not supported,
1490 	 * so it is turned off
1491 	 */
1492 	ndev->hw_features &= ~NETIF_F_SG;
1493 	ndev->features |= ndev->hw_features | NETIF_F_HIGHDMA;
1494 
1495 	/* VLAN offloading of tagging, stripping and filtering is not
1496 	 * supported by hardware, but driver will accommodate the
1497 	 * extra 4-byte VLAN tag for processing by upper layers
1498 	 */
1499 	ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
1500 
1501 	/* setup NAPI interface */
1502 	netif_napi_add(ndev, &priv->napi, tse_poll, NAPI_POLL_WEIGHT);
1503 
1504 	spin_lock_init(&priv->mac_cfg_lock);
1505 	spin_lock_init(&priv->tx_lock);
1506 	spin_lock_init(&priv->rxdma_irq_lock);
1507 
1508 	netif_carrier_off(ndev);
1509 	ret = register_netdev(ndev);
1510 	if (ret) {
1511 		dev_err(&pdev->dev, "failed to register TSE net device\n");
1512 		goto err_register_netdev;
1513 	}
1514 
1515 	platform_set_drvdata(pdev, ndev);
1516 
1517 	priv->revision = ioread32(&priv->mac_dev->megacore_revision);
1518 
1519 	if (netif_msg_probe(priv))
1520 		dev_info(&pdev->dev, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",
1521 			 (priv->revision >> 8) & 0xff,
1522 			 priv->revision & 0xff,
1523 			 (unsigned long) control_port->start, priv->rx_irq,
1524 			 priv->tx_irq);
1525 
1526 	ret = init_phy(ndev);
1527 	if (ret != 0) {
1528 		netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);
1529 		goto err_init_phy;
1530 	}
1531 	return 0;
1532 
1533 err_init_phy:
1534 	unregister_netdev(ndev);
1535 err_register_netdev:
1536 	netif_napi_del(&priv->napi);
1537 	altera_tse_mdio_destroy(ndev);
1538 err_free_netdev:
1539 	free_netdev(ndev);
1540 	return ret;
1541 }
1542 
1543 /* Remove Altera TSE MAC device
1544  */
1545 static int altera_tse_remove(struct platform_device *pdev)
1546 {
1547 	struct net_device *ndev = platform_get_drvdata(pdev);
1548 
1549 	if (ndev->phydev)
1550 		phy_disconnect(ndev->phydev);
1551 
1552 	platform_set_drvdata(pdev, NULL);
1553 	altera_tse_mdio_destroy(ndev);
1554 	unregister_netdev(ndev);
1555 	free_netdev(ndev);
1556 
1557 	return 0;
1558 }
1559 
1560 static const struct altera_dmaops altera_dtype_sgdma = {
1561 	.altera_dtype = ALTERA_DTYPE_SGDMA,
1562 	.dmamask = 32,
1563 	.reset_dma = sgdma_reset,
1564 	.enable_txirq = sgdma_enable_txirq,
1565 	.enable_rxirq = sgdma_enable_rxirq,
1566 	.disable_txirq = sgdma_disable_txirq,
1567 	.disable_rxirq = sgdma_disable_rxirq,
1568 	.clear_txirq = sgdma_clear_txirq,
1569 	.clear_rxirq = sgdma_clear_rxirq,
1570 	.tx_buffer = sgdma_tx_buffer,
1571 	.tx_completions = sgdma_tx_completions,
1572 	.add_rx_desc = sgdma_add_rx_desc,
1573 	.get_rx_status = sgdma_rx_status,
1574 	.init_dma = sgdma_initialize,
1575 	.uninit_dma = sgdma_uninitialize,
1576 	.start_rxdma = sgdma_start_rxdma,
1577 };
1578 
1579 static const struct altera_dmaops altera_dtype_msgdma = {
1580 	.altera_dtype = ALTERA_DTYPE_MSGDMA,
1581 	.dmamask = 64,
1582 	.reset_dma = msgdma_reset,
1583 	.enable_txirq = msgdma_enable_txirq,
1584 	.enable_rxirq = msgdma_enable_rxirq,
1585 	.disable_txirq = msgdma_disable_txirq,
1586 	.disable_rxirq = msgdma_disable_rxirq,
1587 	.clear_txirq = msgdma_clear_txirq,
1588 	.clear_rxirq = msgdma_clear_rxirq,
1589 	.tx_buffer = msgdma_tx_buffer,
1590 	.tx_completions = msgdma_tx_completions,
1591 	.add_rx_desc = msgdma_add_rx_desc,
1592 	.get_rx_status = msgdma_rx_status,
1593 	.init_dma = msgdma_initialize,
1594 	.uninit_dma = msgdma_uninitialize,
1595 	.start_rxdma = msgdma_start_rxdma,
1596 };
1597 
1598 static const struct of_device_id altera_tse_ids[] = {
1599 	{ .compatible = "altr,tse-msgdma-1.0", .data = &altera_dtype_msgdma, },
1600 	{ .compatible = "altr,tse-1.0", .data = &altera_dtype_sgdma, },
1601 	{ .compatible = "ALTR,tse-1.0", .data = &altera_dtype_sgdma, },
1602 	{},
1603 };
1604 MODULE_DEVICE_TABLE(of, altera_tse_ids);
1605 
1606 static struct platform_driver altera_tse_driver = {
1607 	.probe		= altera_tse_probe,
1608 	.remove		= altera_tse_remove,
1609 	.suspend	= NULL,
1610 	.resume		= NULL,
1611 	.driver		= {
1612 		.name	= ALTERA_TSE_RESOURCE_NAME,
1613 		.of_match_table = altera_tse_ids,
1614 	},
1615 };
1616 
1617 module_platform_driver(altera_tse_driver);
1618 
1619 MODULE_AUTHOR("Altera Corporation");
1620 MODULE_DESCRIPTION("Altera Triple Speed Ethernet MAC driver");
1621 MODULE_LICENSE("GPL v2");
1622