19cb15142SSrinivas Kandagatla /* 29cb15142SSrinivas Kandagatla * 39cb15142SSrinivas Kandagatla * Copyright (c) 2011, The Linux Foundation. All rights reserved. 49cb15142SSrinivas Kandagatla * 59cb15142SSrinivas Kandagatla * This program is free software; you can redistribute it and/or modify 69cb15142SSrinivas Kandagatla * it under the terms of the GNU General Public License version 2 and 79cb15142SSrinivas Kandagatla * only version 2 as published by the Free Software Foundation. 89cb15142SSrinivas Kandagatla * 99cb15142SSrinivas Kandagatla * This program is distributed in the hope that it will be useful, 109cb15142SSrinivas Kandagatla * but WITHOUT ANY WARRANTY; without even the implied warranty of 119cb15142SSrinivas Kandagatla * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 129cb15142SSrinivas Kandagatla * GNU General Public License for more details. 139cb15142SSrinivas Kandagatla * 149cb15142SSrinivas Kandagatla */ 159cb15142SSrinivas Kandagatla #include <linux/of.h> 169cb15142SSrinivas Kandagatla #include <linux/of_dma.h> 179cb15142SSrinivas Kandagatla #include <linux/bitops.h> 189cb15142SSrinivas Kandagatla #include <linux/mmc/host.h> 199cb15142SSrinivas Kandagatla #include <linux/mmc/card.h> 209cb15142SSrinivas Kandagatla #include "mmci.h" 219cb15142SSrinivas Kandagatla 229cb15142SSrinivas Kandagatla /* Registers */ 239cb15142SSrinivas Kandagatla #define DML_CONFIG 0x00 249cb15142SSrinivas Kandagatla #define PRODUCER_CRCI_MSK GENMASK(1, 0) 259cb15142SSrinivas Kandagatla #define PRODUCER_CRCI_DISABLE 0 269cb15142SSrinivas Kandagatla #define PRODUCER_CRCI_X_SEL BIT(0) 279cb15142SSrinivas Kandagatla #define PRODUCER_CRCI_Y_SEL BIT(1) 289cb15142SSrinivas Kandagatla #define CONSUMER_CRCI_MSK GENMASK(3, 2) 299cb15142SSrinivas Kandagatla #define CONSUMER_CRCI_DISABLE 0 309cb15142SSrinivas Kandagatla #define CONSUMER_CRCI_X_SEL BIT(2) 319cb15142SSrinivas Kandagatla #define CONSUMER_CRCI_Y_SEL BIT(3) 329cb15142SSrinivas Kandagatla #define PRODUCER_TRANS_END_EN BIT(4) 339cb15142SSrinivas Kandagatla #define BYPASS BIT(16) 349cb15142SSrinivas Kandagatla #define DIRECT_MODE BIT(17) 359cb15142SSrinivas Kandagatla #define INFINITE_CONS_TRANS BIT(18) 369cb15142SSrinivas Kandagatla 379cb15142SSrinivas Kandagatla #define DML_SW_RESET 0x08 389cb15142SSrinivas Kandagatla #define DML_PRODUCER_START 0x0c 399cb15142SSrinivas Kandagatla #define DML_CONSUMER_START 0x10 409cb15142SSrinivas Kandagatla #define DML_PRODUCER_PIPE_LOGICAL_SIZE 0x14 419cb15142SSrinivas Kandagatla #define DML_CONSUMER_PIPE_LOGICAL_SIZE 0x18 429cb15142SSrinivas Kandagatla #define DML_PIPE_ID 0x1c 439cb15142SSrinivas Kandagatla #define PRODUCER_PIPE_ID_SHFT 0 449cb15142SSrinivas Kandagatla #define PRODUCER_PIPE_ID_MSK GENMASK(4, 0) 459cb15142SSrinivas Kandagatla #define CONSUMER_PIPE_ID_SHFT 16 469cb15142SSrinivas Kandagatla #define CONSUMER_PIPE_ID_MSK GENMASK(20, 16) 479cb15142SSrinivas Kandagatla 489cb15142SSrinivas Kandagatla #define DML_PRODUCER_BAM_BLOCK_SIZE 0x24 499cb15142SSrinivas Kandagatla #define DML_PRODUCER_BAM_TRANS_SIZE 0x28 509cb15142SSrinivas Kandagatla 519cb15142SSrinivas Kandagatla /* other definitions */ 529cb15142SSrinivas Kandagatla #define PRODUCER_PIPE_LOGICAL_SIZE 4096 539cb15142SSrinivas Kandagatla #define CONSUMER_PIPE_LOGICAL_SIZE 4096 549cb15142SSrinivas Kandagatla 559cb15142SSrinivas Kandagatla #define DML_OFFSET 0x800 569cb15142SSrinivas Kandagatla 579cb15142SSrinivas Kandagatla void dml_start_xfer(struct mmci_host *host, struct mmc_data *data) 589cb15142SSrinivas Kandagatla { 599cb15142SSrinivas Kandagatla u32 config; 609cb15142SSrinivas Kandagatla void __iomem *base = host->base + DML_OFFSET; 619cb15142SSrinivas Kandagatla 629cb15142SSrinivas Kandagatla if (data->flags & MMC_DATA_READ) { 639cb15142SSrinivas Kandagatla /* Read operation: configure DML for producer operation */ 649cb15142SSrinivas Kandagatla /* Set producer CRCI-x and disable consumer CRCI */ 659cb15142SSrinivas Kandagatla config = readl_relaxed(base + DML_CONFIG); 669cb15142SSrinivas Kandagatla config = (config & ~PRODUCER_CRCI_MSK) | PRODUCER_CRCI_X_SEL; 679cb15142SSrinivas Kandagatla config = (config & ~CONSUMER_CRCI_MSK) | CONSUMER_CRCI_DISABLE; 689cb15142SSrinivas Kandagatla writel_relaxed(config, base + DML_CONFIG); 699cb15142SSrinivas Kandagatla 709cb15142SSrinivas Kandagatla /* Set the Producer BAM block size */ 719cb15142SSrinivas Kandagatla writel_relaxed(data->blksz, base + DML_PRODUCER_BAM_BLOCK_SIZE); 729cb15142SSrinivas Kandagatla 739cb15142SSrinivas Kandagatla /* Set Producer BAM Transaction size */ 749cb15142SSrinivas Kandagatla writel_relaxed(data->blocks * data->blksz, 759cb15142SSrinivas Kandagatla base + DML_PRODUCER_BAM_TRANS_SIZE); 769cb15142SSrinivas Kandagatla /* Set Producer Transaction End bit */ 779cb15142SSrinivas Kandagatla config = readl_relaxed(base + DML_CONFIG); 789cb15142SSrinivas Kandagatla config |= PRODUCER_TRANS_END_EN; 799cb15142SSrinivas Kandagatla writel_relaxed(config, base + DML_CONFIG); 809cb15142SSrinivas Kandagatla /* Trigger producer */ 819cb15142SSrinivas Kandagatla writel_relaxed(1, base + DML_PRODUCER_START); 829cb15142SSrinivas Kandagatla } else { 839cb15142SSrinivas Kandagatla /* Write operation: configure DML for consumer operation */ 849cb15142SSrinivas Kandagatla /* Set consumer CRCI-x and disable producer CRCI*/ 859cb15142SSrinivas Kandagatla config = readl_relaxed(base + DML_CONFIG); 869cb15142SSrinivas Kandagatla config = (config & ~CONSUMER_CRCI_MSK) | CONSUMER_CRCI_X_SEL; 879cb15142SSrinivas Kandagatla config = (config & ~PRODUCER_CRCI_MSK) | PRODUCER_CRCI_DISABLE; 889cb15142SSrinivas Kandagatla writel_relaxed(config, base + DML_CONFIG); 899cb15142SSrinivas Kandagatla /* Clear Producer Transaction End bit */ 909cb15142SSrinivas Kandagatla config = readl_relaxed(base + DML_CONFIG); 919cb15142SSrinivas Kandagatla config &= ~PRODUCER_TRANS_END_EN; 929cb15142SSrinivas Kandagatla writel_relaxed(config, base + DML_CONFIG); 939cb15142SSrinivas Kandagatla /* Trigger consumer */ 949cb15142SSrinivas Kandagatla writel_relaxed(1, base + DML_CONSUMER_START); 959cb15142SSrinivas Kandagatla } 969cb15142SSrinivas Kandagatla 979cb15142SSrinivas Kandagatla /* make sure the dml is configured before dma is triggered */ 989cb15142SSrinivas Kandagatla wmb(); 999cb15142SSrinivas Kandagatla } 1009cb15142SSrinivas Kandagatla 1019cb15142SSrinivas Kandagatla static int of_get_dml_pipe_index(struct device_node *np, const char *name) 1029cb15142SSrinivas Kandagatla { 1039cb15142SSrinivas Kandagatla int index; 1049cb15142SSrinivas Kandagatla struct of_phandle_args dma_spec; 1059cb15142SSrinivas Kandagatla 1069cb15142SSrinivas Kandagatla index = of_property_match_string(np, "dma-names", name); 1079cb15142SSrinivas Kandagatla 1089cb15142SSrinivas Kandagatla if (index < 0) 1099cb15142SSrinivas Kandagatla return -ENODEV; 1109cb15142SSrinivas Kandagatla 1119cb15142SSrinivas Kandagatla if (of_parse_phandle_with_args(np, "dmas", "#dma-cells", index, 1129cb15142SSrinivas Kandagatla &dma_spec)) 1139cb15142SSrinivas Kandagatla return -ENODEV; 1149cb15142SSrinivas Kandagatla 1159cb15142SSrinivas Kandagatla if (dma_spec.args_count) 1169cb15142SSrinivas Kandagatla return dma_spec.args[0]; 1179cb15142SSrinivas Kandagatla 1189cb15142SSrinivas Kandagatla return -ENODEV; 1199cb15142SSrinivas Kandagatla } 1209cb15142SSrinivas Kandagatla 1219cb15142SSrinivas Kandagatla /* Initialize the dml hardware connected to SD Card controller */ 1229cb15142SSrinivas Kandagatla int dml_hw_init(struct mmci_host *host, struct device_node *np) 1239cb15142SSrinivas Kandagatla { 1249cb15142SSrinivas Kandagatla u32 config; 1259cb15142SSrinivas Kandagatla void __iomem *base; 1269cb15142SSrinivas Kandagatla int consumer_id, producer_id; 1279cb15142SSrinivas Kandagatla 1289cb15142SSrinivas Kandagatla consumer_id = of_get_dml_pipe_index(np, "tx"); 1299cb15142SSrinivas Kandagatla producer_id = of_get_dml_pipe_index(np, "rx"); 1309cb15142SSrinivas Kandagatla 1319cb15142SSrinivas Kandagatla if (producer_id < 0 || consumer_id < 0) 1329cb15142SSrinivas Kandagatla return -ENODEV; 1339cb15142SSrinivas Kandagatla 1349cb15142SSrinivas Kandagatla base = host->base + DML_OFFSET; 1359cb15142SSrinivas Kandagatla 1369cb15142SSrinivas Kandagatla /* Reset the DML block */ 1379cb15142SSrinivas Kandagatla writel_relaxed(1, base + DML_SW_RESET); 1389cb15142SSrinivas Kandagatla 1399cb15142SSrinivas Kandagatla /* Disable the producer and consumer CRCI */ 1409cb15142SSrinivas Kandagatla config = (PRODUCER_CRCI_DISABLE | CONSUMER_CRCI_DISABLE); 1419cb15142SSrinivas Kandagatla /* 1429cb15142SSrinivas Kandagatla * Disable the bypass mode. Bypass mode will only be used 1439cb15142SSrinivas Kandagatla * if data transfer is to happen in PIO mode and don't 1449cb15142SSrinivas Kandagatla * want the BAM interface to connect with SDCC-DML. 1459cb15142SSrinivas Kandagatla */ 1469cb15142SSrinivas Kandagatla config &= ~BYPASS; 1479cb15142SSrinivas Kandagatla /* 1489cb15142SSrinivas Kandagatla * Disable direct mode as we don't DML to MASTER the AHB bus. 1499cb15142SSrinivas Kandagatla * BAM connected with DML should MASTER the AHB bus. 1509cb15142SSrinivas Kandagatla */ 1519cb15142SSrinivas Kandagatla config &= ~DIRECT_MODE; 1529cb15142SSrinivas Kandagatla /* 1539cb15142SSrinivas Kandagatla * Disable infinite mode transfer as we won't be doing any 1549cb15142SSrinivas Kandagatla * infinite size data transfers. All data transfer will be 1559cb15142SSrinivas Kandagatla * of finite data size. 1569cb15142SSrinivas Kandagatla */ 1579cb15142SSrinivas Kandagatla config &= ~INFINITE_CONS_TRANS; 1589cb15142SSrinivas Kandagatla writel_relaxed(config, base + DML_CONFIG); 1599cb15142SSrinivas Kandagatla 1609cb15142SSrinivas Kandagatla /* 1619cb15142SSrinivas Kandagatla * Initialize the logical BAM pipe size for producer 1629cb15142SSrinivas Kandagatla * and consumer. 1639cb15142SSrinivas Kandagatla */ 1649cb15142SSrinivas Kandagatla writel_relaxed(PRODUCER_PIPE_LOGICAL_SIZE, 1659cb15142SSrinivas Kandagatla base + DML_PRODUCER_PIPE_LOGICAL_SIZE); 1669cb15142SSrinivas Kandagatla writel_relaxed(CONSUMER_PIPE_LOGICAL_SIZE, 1679cb15142SSrinivas Kandagatla base + DML_CONSUMER_PIPE_LOGICAL_SIZE); 1689cb15142SSrinivas Kandagatla 1699cb15142SSrinivas Kandagatla /* Initialize Producer/consumer pipe id */ 1709cb15142SSrinivas Kandagatla writel_relaxed(producer_id | (consumer_id << CONSUMER_PIPE_ID_SHFT), 1719cb15142SSrinivas Kandagatla base + DML_PIPE_ID); 1729cb15142SSrinivas Kandagatla 1739cb15142SSrinivas Kandagatla /* Make sure dml intialization is finished */ 1749cb15142SSrinivas Kandagatla mb(); 1759cb15142SSrinivas Kandagatla 1769cb15142SSrinivas Kandagatla return 0; 1779cb15142SSrinivas Kandagatla } 178