1a6159740SKrzysztof Kozlowski // SPDX-License-Identifier: GPL-2.0 217c50b70SJoachim Eastwood /* 317c50b70SJoachim Eastwood * Memory controller driver for ARM PrimeCell PL172 417c50b70SJoachim Eastwood * PrimeCell MultiPort Memory Controller (PL172) 517c50b70SJoachim Eastwood * 617c50b70SJoachim Eastwood * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com> 717c50b70SJoachim Eastwood * 817c50b70SJoachim Eastwood * Based on: 917c50b70SJoachim Eastwood * TI AEMIF driver, Copyright (C) 2010 - 2013 Texas Instruments Inc. 1017c50b70SJoachim Eastwood */ 1117c50b70SJoachim Eastwood 1217c50b70SJoachim Eastwood #include <linux/amba/bus.h> 1317c50b70SJoachim Eastwood #include <linux/clk.h> 1417c50b70SJoachim Eastwood #include <linux/device.h> 1517c50b70SJoachim Eastwood #include <linux/err.h> 1617c50b70SJoachim Eastwood #include <linux/init.h> 1717c50b70SJoachim Eastwood #include <linux/io.h> 1817c50b70SJoachim Eastwood #include <linux/kernel.h> 1917c50b70SJoachim Eastwood #include <linux/module.h> 2017c50b70SJoachim Eastwood #include <linux/of.h> 2117c50b70SJoachim Eastwood #include <linux/of_platform.h> 2217c50b70SJoachim Eastwood #include <linux/time.h> 2317c50b70SJoachim Eastwood 2417c50b70SJoachim Eastwood #define MPMC_STATIC_CFG(n) (0x200 + 0x20 * n) 2517c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_MW_8BIT 0x0 2617c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_MW_16BIT 0x1 2717c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_MW_32BIT 0x2 2817c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_PM BIT(3) 2917c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_PC BIT(6) 3017c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_PB BIT(7) 3117c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_EW BIT(8) 3217c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_B BIT(19) 3317c50b70SJoachim Eastwood #define MPMC_STATIC_CFG_P BIT(20) 3417c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_WEN(n) (0x204 + 0x20 * n) 3517c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_WEN_MAX 0x0f 3617c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_OEN(n) (0x208 + 0x20 * n) 3717c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_OEN_MAX 0x0f 3817c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_RD(n) (0x20c + 0x20 * n) 3917c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_RD_MAX 0x1f 4017c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_PAGE(n) (0x210 + 0x20 * n) 4117c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_PAGE_MAX 0x1f 4217c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_WR(n) (0x214 + 0x20 * n) 4317c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_WR_MAX 0x1f 4417c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_TURN(n) (0x218 + 0x20 * n) 4517c50b70SJoachim Eastwood #define MPMC_STATIC_WAIT_TURN_MAX 0x0f 4617c50b70SJoachim Eastwood 4717c50b70SJoachim Eastwood /* Maximum number of static chip selects */ 4817c50b70SJoachim Eastwood #define PL172_MAX_CS 4 4917c50b70SJoachim Eastwood 5017c50b70SJoachim Eastwood struct pl172_data { 5117c50b70SJoachim Eastwood void __iomem *base; 5217c50b70SJoachim Eastwood unsigned long rate; 5317c50b70SJoachim Eastwood struct clk *clk; 5417c50b70SJoachim Eastwood }; 5517c50b70SJoachim Eastwood 5617c50b70SJoachim Eastwood static int pl172_timing_prop(struct amba_device *adev, 5717c50b70SJoachim Eastwood const struct device_node *np, const char *name, 5817c50b70SJoachim Eastwood u32 reg_offset, u32 max, int start) 5917c50b70SJoachim Eastwood { 6017c50b70SJoachim Eastwood struct pl172_data *pl172 = amba_get_drvdata(adev); 6117c50b70SJoachim Eastwood int cycles; 6217c50b70SJoachim Eastwood u32 val; 6317c50b70SJoachim Eastwood 6417c50b70SJoachim Eastwood if (!of_property_read_u32(np, name, &val)) { 6517c50b70SJoachim Eastwood cycles = DIV_ROUND_UP(val * pl172->rate, NSEC_PER_MSEC) - start; 6617c50b70SJoachim Eastwood if (cycles < 0) { 6717c50b70SJoachim Eastwood cycles = 0; 6817c50b70SJoachim Eastwood } else if (cycles > max) { 6917c50b70SJoachim Eastwood dev_err(&adev->dev, "%s timing too tight\n", name); 7017c50b70SJoachim Eastwood return -EINVAL; 7117c50b70SJoachim Eastwood } 7217c50b70SJoachim Eastwood 7317c50b70SJoachim Eastwood writel(cycles, pl172->base + reg_offset); 7417c50b70SJoachim Eastwood } 7517c50b70SJoachim Eastwood 7617c50b70SJoachim Eastwood dev_dbg(&adev->dev, "%s: %u cycle(s)\n", name, start + 7717c50b70SJoachim Eastwood readl(pl172->base + reg_offset)); 7817c50b70SJoachim Eastwood 7917c50b70SJoachim Eastwood return 0; 8017c50b70SJoachim Eastwood } 8117c50b70SJoachim Eastwood 8217c50b70SJoachim Eastwood static int pl172_setup_static(struct amba_device *adev, 8317c50b70SJoachim Eastwood struct device_node *np, u32 cs) 8417c50b70SJoachim Eastwood { 8517c50b70SJoachim Eastwood struct pl172_data *pl172 = amba_get_drvdata(adev); 8617c50b70SJoachim Eastwood u32 cfg; 8717c50b70SJoachim Eastwood int ret; 8817c50b70SJoachim Eastwood 8917c50b70SJoachim Eastwood /* MPMC static memory configuration */ 9017c50b70SJoachim Eastwood if (!of_property_read_u32(np, "mpmc,memory-width", &cfg)) { 9117c50b70SJoachim Eastwood if (cfg == 8) { 9217c50b70SJoachim Eastwood cfg = MPMC_STATIC_CFG_MW_8BIT; 9317c50b70SJoachim Eastwood } else if (cfg == 16) { 9417c50b70SJoachim Eastwood cfg = MPMC_STATIC_CFG_MW_16BIT; 9517c50b70SJoachim Eastwood } else if (cfg == 32) { 9617c50b70SJoachim Eastwood cfg = MPMC_STATIC_CFG_MW_32BIT; 9717c50b70SJoachim Eastwood } else { 9817c50b70SJoachim Eastwood dev_err(&adev->dev, "invalid memory width cs%u\n", cs); 9917c50b70SJoachim Eastwood return -EINVAL; 10017c50b70SJoachim Eastwood } 10117c50b70SJoachim Eastwood } else { 10217c50b70SJoachim Eastwood dev_err(&adev->dev, "memory-width property required\n"); 10317c50b70SJoachim Eastwood return -EINVAL; 10417c50b70SJoachim Eastwood } 10517c50b70SJoachim Eastwood 10617c50b70SJoachim Eastwood if (of_property_read_bool(np, "mpmc,async-page-mode")) 10717c50b70SJoachim Eastwood cfg |= MPMC_STATIC_CFG_PM; 10817c50b70SJoachim Eastwood 10917c50b70SJoachim Eastwood if (of_property_read_bool(np, "mpmc,cs-active-high")) 11017c50b70SJoachim Eastwood cfg |= MPMC_STATIC_CFG_PC; 11117c50b70SJoachim Eastwood 11217c50b70SJoachim Eastwood if (of_property_read_bool(np, "mpmc,byte-lane-low")) 11317c50b70SJoachim Eastwood cfg |= MPMC_STATIC_CFG_PB; 11417c50b70SJoachim Eastwood 11517c50b70SJoachim Eastwood if (of_property_read_bool(np, "mpmc,extended-wait")) 11617c50b70SJoachim Eastwood cfg |= MPMC_STATIC_CFG_EW; 11717c50b70SJoachim Eastwood 118b794df56SVladimir Zapolskiy if (amba_part(adev) == 0x172 && 119b794df56SVladimir Zapolskiy of_property_read_bool(np, "mpmc,buffer-enable")) 12017c50b70SJoachim Eastwood cfg |= MPMC_STATIC_CFG_B; 12117c50b70SJoachim Eastwood 12217c50b70SJoachim Eastwood if (of_property_read_bool(np, "mpmc,write-protect")) 12317c50b70SJoachim Eastwood cfg |= MPMC_STATIC_CFG_P; 12417c50b70SJoachim Eastwood 12517c50b70SJoachim Eastwood writel(cfg, pl172->base + MPMC_STATIC_CFG(cs)); 12617c50b70SJoachim Eastwood dev_dbg(&adev->dev, "mpmc static config cs%u: 0x%08x\n", cs, cfg); 12717c50b70SJoachim Eastwood 12817c50b70SJoachim Eastwood /* MPMC static memory timing */ 12917c50b70SJoachim Eastwood ret = pl172_timing_prop(adev, np, "mpmc,write-enable-delay", 13017c50b70SJoachim Eastwood MPMC_STATIC_WAIT_WEN(cs), 13117c50b70SJoachim Eastwood MPMC_STATIC_WAIT_WEN_MAX, 1); 13217c50b70SJoachim Eastwood if (ret) 13317c50b70SJoachim Eastwood goto fail; 13417c50b70SJoachim Eastwood 13517c50b70SJoachim Eastwood ret = pl172_timing_prop(adev, np, "mpmc,output-enable-delay", 13617c50b70SJoachim Eastwood MPMC_STATIC_WAIT_OEN(cs), 13717c50b70SJoachim Eastwood MPMC_STATIC_WAIT_OEN_MAX, 0); 13817c50b70SJoachim Eastwood if (ret) 13917c50b70SJoachim Eastwood goto fail; 14017c50b70SJoachim Eastwood 14117c50b70SJoachim Eastwood ret = pl172_timing_prop(adev, np, "mpmc,read-access-delay", 14217c50b70SJoachim Eastwood MPMC_STATIC_WAIT_RD(cs), 14317c50b70SJoachim Eastwood MPMC_STATIC_WAIT_RD_MAX, 1); 14417c50b70SJoachim Eastwood if (ret) 14517c50b70SJoachim Eastwood goto fail; 14617c50b70SJoachim Eastwood 14717c50b70SJoachim Eastwood ret = pl172_timing_prop(adev, np, "mpmc,page-mode-read-delay", 14817c50b70SJoachim Eastwood MPMC_STATIC_WAIT_PAGE(cs), 14917c50b70SJoachim Eastwood MPMC_STATIC_WAIT_PAGE_MAX, 1); 15017c50b70SJoachim Eastwood if (ret) 15117c50b70SJoachim Eastwood goto fail; 15217c50b70SJoachim Eastwood 15317c50b70SJoachim Eastwood ret = pl172_timing_prop(adev, np, "mpmc,write-access-delay", 15417c50b70SJoachim Eastwood MPMC_STATIC_WAIT_WR(cs), 15517c50b70SJoachim Eastwood MPMC_STATIC_WAIT_WR_MAX, 2); 15617c50b70SJoachim Eastwood if (ret) 15717c50b70SJoachim Eastwood goto fail; 15817c50b70SJoachim Eastwood 15917c50b70SJoachim Eastwood ret = pl172_timing_prop(adev, np, "mpmc,turn-round-delay", 16017c50b70SJoachim Eastwood MPMC_STATIC_WAIT_TURN(cs), 16117c50b70SJoachim Eastwood MPMC_STATIC_WAIT_TURN_MAX, 1); 16217c50b70SJoachim Eastwood if (ret) 16317c50b70SJoachim Eastwood goto fail; 16417c50b70SJoachim Eastwood 16517c50b70SJoachim Eastwood return 0; 16617c50b70SJoachim Eastwood fail: 16717c50b70SJoachim Eastwood dev_err(&adev->dev, "failed to configure cs%u\n", cs); 16817c50b70SJoachim Eastwood return ret; 16917c50b70SJoachim Eastwood } 17017c50b70SJoachim Eastwood 17117c50b70SJoachim Eastwood static int pl172_parse_cs_config(struct amba_device *adev, 17217c50b70SJoachim Eastwood struct device_node *np) 17317c50b70SJoachim Eastwood { 17417c50b70SJoachim Eastwood u32 cs; 17517c50b70SJoachim Eastwood 17617c50b70SJoachim Eastwood if (!of_property_read_u32(np, "mpmc,cs", &cs)) { 17717c50b70SJoachim Eastwood if (cs >= PL172_MAX_CS) { 17817c50b70SJoachim Eastwood dev_err(&adev->dev, "cs%u invalid\n", cs); 17917c50b70SJoachim Eastwood return -EINVAL; 18017c50b70SJoachim Eastwood } 18117c50b70SJoachim Eastwood 18217c50b70SJoachim Eastwood return pl172_setup_static(adev, np, cs); 18317c50b70SJoachim Eastwood } 18417c50b70SJoachim Eastwood 18517c50b70SJoachim Eastwood dev_err(&adev->dev, "cs property required\n"); 18617c50b70SJoachim Eastwood 18717c50b70SJoachim Eastwood return -EINVAL; 18817c50b70SJoachim Eastwood } 18917c50b70SJoachim Eastwood 19017c50b70SJoachim Eastwood static const char * const pl172_revisions[] = {"r1", "r2", "r2p3", "r2p4"}; 191b794df56SVladimir Zapolskiy static const char * const pl175_revisions[] = {"r1"}; 192f6d77beeSVladimir Zapolskiy static const char * const pl176_revisions[] = {"r0"}; 19317c50b70SJoachim Eastwood 19417c50b70SJoachim Eastwood static int pl172_probe(struct amba_device *adev, const struct amba_id *id) 19517c50b70SJoachim Eastwood { 19617c50b70SJoachim Eastwood struct device_node *child_np, *np = adev->dev.of_node; 19717c50b70SJoachim Eastwood struct device *dev = &adev->dev; 19817c50b70SJoachim Eastwood static const char *rev = "?"; 19917c50b70SJoachim Eastwood struct pl172_data *pl172; 20017c50b70SJoachim Eastwood int ret; 20117c50b70SJoachim Eastwood 20217c50b70SJoachim Eastwood if (amba_part(adev) == 0x172) { 20317c50b70SJoachim Eastwood if (amba_rev(adev) < ARRAY_SIZE(pl172_revisions)) 20417c50b70SJoachim Eastwood rev = pl172_revisions[amba_rev(adev)]; 205b794df56SVladimir Zapolskiy } else if (amba_part(adev) == 0x175) { 206b794df56SVladimir Zapolskiy if (amba_rev(adev) < ARRAY_SIZE(pl175_revisions)) 207b794df56SVladimir Zapolskiy rev = pl175_revisions[amba_rev(adev)]; 208f6d77beeSVladimir Zapolskiy } else if (amba_part(adev) == 0x176) { 209f6d77beeSVladimir Zapolskiy if (amba_rev(adev) < ARRAY_SIZE(pl176_revisions)) 210f6d77beeSVladimir Zapolskiy rev = pl176_revisions[amba_rev(adev)]; 21117c50b70SJoachim Eastwood } 21217c50b70SJoachim Eastwood 21317c50b70SJoachim Eastwood dev_info(dev, "ARM PL%x revision %s\n", amba_part(adev), rev); 21417c50b70SJoachim Eastwood 21517c50b70SJoachim Eastwood pl172 = devm_kzalloc(dev, sizeof(*pl172), GFP_KERNEL); 21617c50b70SJoachim Eastwood if (!pl172) 21717c50b70SJoachim Eastwood return -ENOMEM; 21817c50b70SJoachim Eastwood 21917c50b70SJoachim Eastwood pl172->clk = devm_clk_get(dev, "mpmcclk"); 22017c50b70SJoachim Eastwood if (IS_ERR(pl172->clk)) { 22117c50b70SJoachim Eastwood dev_err(dev, "no mpmcclk provided clock\n"); 22217c50b70SJoachim Eastwood return PTR_ERR(pl172->clk); 22317c50b70SJoachim Eastwood } 22417c50b70SJoachim Eastwood 22517c50b70SJoachim Eastwood ret = clk_prepare_enable(pl172->clk); 22617c50b70SJoachim Eastwood if (ret) { 22717c50b70SJoachim Eastwood dev_err(dev, "unable to mpmcclk enable clock\n"); 22817c50b70SJoachim Eastwood return ret; 22917c50b70SJoachim Eastwood } 23017c50b70SJoachim Eastwood 23117c50b70SJoachim Eastwood pl172->rate = clk_get_rate(pl172->clk) / MSEC_PER_SEC; 23217c50b70SJoachim Eastwood if (!pl172->rate) { 23317c50b70SJoachim Eastwood dev_err(dev, "unable to get mpmcclk clock rate\n"); 23417c50b70SJoachim Eastwood ret = -EINVAL; 23517c50b70SJoachim Eastwood goto err_clk_enable; 23617c50b70SJoachim Eastwood } 23717c50b70SJoachim Eastwood 23817c50b70SJoachim Eastwood ret = amba_request_regions(adev, NULL); 23917c50b70SJoachim Eastwood if (ret) { 24017c50b70SJoachim Eastwood dev_err(dev, "unable to request AMBA regions\n"); 24117c50b70SJoachim Eastwood goto err_clk_enable; 24217c50b70SJoachim Eastwood } 24317c50b70SJoachim Eastwood 24417c50b70SJoachim Eastwood pl172->base = devm_ioremap(dev, adev->res.start, 24517c50b70SJoachim Eastwood resource_size(&adev->res)); 24617c50b70SJoachim Eastwood if (!pl172->base) { 24717c50b70SJoachim Eastwood dev_err(dev, "ioremap failed\n"); 24817c50b70SJoachim Eastwood ret = -ENOMEM; 24917c50b70SJoachim Eastwood goto err_no_ioremap; 25017c50b70SJoachim Eastwood } 25117c50b70SJoachim Eastwood 25217c50b70SJoachim Eastwood amba_set_drvdata(adev, pl172); 25317c50b70SJoachim Eastwood 25417c50b70SJoachim Eastwood /* 25517c50b70SJoachim Eastwood * Loop through each child node, which represent a chip select, and 25617c50b70SJoachim Eastwood * configure parameters and timing. If successful; populate devices 25717c50b70SJoachim Eastwood * under that node. 25817c50b70SJoachim Eastwood */ 25917c50b70SJoachim Eastwood for_each_available_child_of_node(np, child_np) { 26017c50b70SJoachim Eastwood ret = pl172_parse_cs_config(adev, child_np); 26117c50b70SJoachim Eastwood if (ret) 26217c50b70SJoachim Eastwood continue; 26317c50b70SJoachim Eastwood 2640ff818efSJoachim Eastwood of_platform_populate(child_np, NULL, NULL, dev); 26517c50b70SJoachim Eastwood } 26617c50b70SJoachim Eastwood 26717c50b70SJoachim Eastwood return 0; 26817c50b70SJoachim Eastwood 26917c50b70SJoachim Eastwood err_no_ioremap: 27017c50b70SJoachim Eastwood amba_release_regions(adev); 27117c50b70SJoachim Eastwood err_clk_enable: 27217c50b70SJoachim Eastwood clk_disable_unprepare(pl172->clk); 27317c50b70SJoachim Eastwood return ret; 27417c50b70SJoachim Eastwood } 27517c50b70SJoachim Eastwood 27617c50b70SJoachim Eastwood static int pl172_remove(struct amba_device *adev) 27717c50b70SJoachim Eastwood { 27817c50b70SJoachim Eastwood struct pl172_data *pl172 = amba_get_drvdata(adev); 27917c50b70SJoachim Eastwood 28017c50b70SJoachim Eastwood clk_disable_unprepare(pl172->clk); 28117c50b70SJoachim Eastwood amba_release_regions(adev); 28217c50b70SJoachim Eastwood 28317c50b70SJoachim Eastwood return 0; 28417c50b70SJoachim Eastwood } 28517c50b70SJoachim Eastwood 28617c50b70SJoachim Eastwood static const struct amba_id pl172_ids[] = { 2875b32b136SVladimir Zapolskiy /* PrimeCell MPMC PL172, EMC found on NXP LPC18xx and LPC43xx */ 28817c50b70SJoachim Eastwood { 2895b32b136SVladimir Zapolskiy .id = 0x07041172, 2905b32b136SVladimir Zapolskiy .mask = 0x3f0fffff, 29117c50b70SJoachim Eastwood }, 292b794df56SVladimir Zapolskiy /* PrimeCell MPMC PL175, EMC found on NXP LPC32xx */ 293b794df56SVladimir Zapolskiy { 294b794df56SVladimir Zapolskiy .id = 0x07041175, 295b794df56SVladimir Zapolskiy .mask = 0x3f0fffff, 296b794df56SVladimir Zapolskiy }, 297f6d77beeSVladimir Zapolskiy /* PrimeCell MPMC PL176 */ 298f6d77beeSVladimir Zapolskiy { 299f6d77beeSVladimir Zapolskiy .id = 0x89041176, 300f6d77beeSVladimir Zapolskiy .mask = 0xff0fffff, 301f6d77beeSVladimir Zapolskiy }, 30217c50b70SJoachim Eastwood { 0, 0 }, 30317c50b70SJoachim Eastwood }; 30417c50b70SJoachim Eastwood MODULE_DEVICE_TABLE(amba, pl172_ids); 30517c50b70SJoachim Eastwood 30617c50b70SJoachim Eastwood static struct amba_driver pl172_driver = { 30717c50b70SJoachim Eastwood .drv = { 30817c50b70SJoachim Eastwood .name = "memory-pl172", 30917c50b70SJoachim Eastwood }, 31017c50b70SJoachim Eastwood .probe = pl172_probe, 31117c50b70SJoachim Eastwood .remove = pl172_remove, 31217c50b70SJoachim Eastwood .id_table = pl172_ids, 31317c50b70SJoachim Eastwood }; 31417c50b70SJoachim Eastwood module_amba_driver(pl172_driver); 31517c50b70SJoachim Eastwood 31617c50b70SJoachim Eastwood MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>"); 31717c50b70SJoachim Eastwood MODULE_DESCRIPTION("PL172 Memory Controller Driver"); 31817c50b70SJoachim Eastwood MODULE_LICENSE("GPL v2"); 319