amba: Make the remove callback return void

All amba drivers return 0 in their remove callback. Together with the
driver core ignoring the return value anyhow, it doesn't make sense to
return a value

amba: Make the remove callback return void

All amba drivers return 0 in their remove callback. Together with the
driver core ignoring the return value anyhow, it doesn't make sense to
return a value here.

Change the remove prototype to return void, which makes it explicit that
returning an error value doesn't work as expected. This simplifies changing
the core remove callback to return void, too.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org> # for drivers/memory
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> # for hwtracing/coresight
Acked-By: Vinod Koul <vkoul@kernel.org> # for dmaengine
Acked-by: Guenter Roeck <linux@roeck-us.net> # for watchdog
Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C
Acked-by: Takashi Iwai <tiwai@suse.de> # for sound
Acked-by: Vladimir Zapolskiy <vz@mleia.com> # for memory/pl172
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/20210126165835.687514-5-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

show more ...

memory: pl172: Enclose macro argument usage in parenthesis

Macros arguments should be enclosed by parenthesis for safety.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

memory: pl172: Add GPLv2 SPDX license header

Add GPLv2 license header and remove GPL boiler plate text.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

memory: pl172: add ARM PrimeCell PL176 MPMC support

The change adds support of ARM PrimeCell PL176 MPMC.

Static memory configuration of PL175 MPMC is very similar to one found
on PL172 and PL175 co

memory: pl172: add ARM PrimeCell PL176 MPMC support

The change adds support of ARM PrimeCell PL176 MPMC.

Static memory configuration of PL175 MPMC is very similar to one found
on PL172 and PL175 controllers, so it is preferred to add its support
into the existing driver. The difference is that PL176 supports up to
10 slave ports (but only 4 of them may be connected to static memory
devices), AHB master bus width cab be 64-bit wide, also NAND devices
can be interfaced.

Similar to PL175 contoller, PL176 has no write buffer enable control
in static memory configuration register, the rest of static memory
configuration bits (with exception of NAND) is the same.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>

show more ...

memory: pl172: add ARM PrimeCell PL175 MPMC support

The change adds support of ARM PrimeCell PL175 MPMC, the controller is
found on NXP LPC32xx SoC.

PL175 MPMC is very similar to PL172 controller,

memory: pl172: add ARM PrimeCell PL175 MPMC support

The change adds support of ARM PrimeCell PL175 MPMC, the controller is
found on NXP LPC32xx SoC.

PL175 MPMC is very similar to PL172 controller, so it is preferred to
add its support into the existing driver.

One of the differences between PL172 and PL175 is that the latter one
supports up to 6 AHB ports, but still only 4 AHB ports can be assigned
to a static memory device, also PL175 does not have write buffer
enable control in static memory configuration register.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>

show more ...

memory: pl172: correct MPMC peripheral ID register bits

According to PL172 TRM read of bits [7:6] of MPMCPeriphID3 is
undefined, so unmask them. Also the driver supports all currently
present revisi

memory: pl172: correct MPMC peripheral ID register bits

According to PL172 TRM read of bits [7:6] of MPMCPeriphID3 is
undefined, so unmask them. Also the driver supports all currently
present revisions of PL172, this allows to alleviate requirements to
the revision version matched by the driver.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>

show more ...

memory: pl172: fix modular build

Building pl172 as a module fails with:
> ERROR: "of_default_bus_match_table" [drivers/memory/pl172.ko] undefined!

Because the symbol of_default_bus_match_table isn'

memory: pl172: fix modular build

Building pl172 as a module fails with:
> ERROR: "of_default_bus_match_table" [drivers/memory/pl172.ko] undefined!

Because the symbol of_default_bus_match_table isn't exported by the OF
core code so can't be referenced from modules. Fix this by removing
the usage of of_default_bus_match_table for now. The side effect of
this is that child nodes can't use "simple-bus" or "simple-mfd".

Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

show more ...

memory: add ARM PL172 MultiPort Memory Controller driver

This driver makes it possible to configure the static memory
chip selects on the ARM PL172 MultiPort Memory Controller
from a set of properti

memory: add ARM PL172 MultiPort Memory Controller driver

This driver makes it possible to configure the static memory
chip selects on the ARM PL172 MultiPort Memory Controller
from a set of properties in DT. Configuration of dynamic
memory is not supported and is left to the boot loader.

The intended usage is to setup timing and configuration for
static memory devices like NAND and NOR Flash before they
are probed by a driver.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

show more ...

memory: pl172: Enclose macro argument usage in parenthesis

Macros arguments should be enclosed by parenthesis for safety.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

memory: pl172: Add GPLv2 SPDX license header

Add GPLv2 license header and remove GPL boiler plate text.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

memory: pl172: add ARM PrimeCell PL176 MPMC support

The change adds support of ARM PrimeCell PL176 MPMC.

Static memory configuration of PL175 MPMC is very similar to one found
o

memory: pl172: add ARM PrimeCell PL176 MPMC support

The change adds support of ARM PrimeCell PL176 MPMC.

Static memory configuration of PL175 MPMC is very similar to one found
on PL172 and PL175 controllers, so it is preferred to add its support
into the existing driver. The difference is that PL176 supports up to
10 slave ports (but only 4 of them may be connected to static memory
devices), AHB master bus width cab be 64-bit wide, also NAND devices
can be interfaced.

Similar to PL175 contoller, PL176 has no write buffer enable control
in static memory configuration register, the rest of static memory
configuration bits (with exception of NAND) is the same.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>

show more ...

memory: pl172: add ARM PrimeCell PL175 MPMC support

The change adds support of ARM PrimeCell PL175 MPMC, the controller is
found on NXP LPC32xx SoC.

PL175 MPMC is very similar t

memory: pl172: add ARM PrimeCell PL175 MPMC support

The change adds support of ARM PrimeCell PL175 MPMC, the controller is
found on NXP LPC32xx SoC.

PL175 MPMC is very similar to PL172 controller, so it is preferred to
add its support into the existing driver.

One of the differences between PL172 and PL175 is that the latter one
supports up to 6 AHB ports, but still only 4 AHB ports can be assigned
to a static memory device, also PL175 does not have write buffer
enable control in static memory configuration register.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>

show more ...

memory: pl172: correct MPMC peripheral ID register bits

According to PL172 TRM read of bits [7:6] of MPMCPeriphID3 is
undefined, so unmask them. Also the driver supports all currently

memory: pl172: correct MPMC peripheral ID register bits

According to PL172 TRM read of bits [7:6] of MPMCPeriphID3 is
undefined, so unmask them. Also the driver supports all currently
present revisions of PL172, this allows to alleviate requirements to
the revision version matched by the driver.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>

show more ...

memory: pl172: fix modular build

Building pl172 as a module fails with:
> ERROR: "of_default_bus_match_table" [drivers/memory/pl172.ko] undefined!

Because the symbol of_default_

memory: pl172: fix modular build

Building pl172 as a module fails with:
> ERROR: "of_default_bus_match_table" [drivers/memory/pl172.ko] undefined!

Because the symbol of_default_bus_match_table isn't exported by the OF
core code so can't be referenced from modules. Fix this by removing
the usage of of_default_bus_match_table for now. The side effect of
this is that child nodes can't use "simple-bus" or "simple-mfd".

Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

show more ...

memory: add ARM PL172 MultiPort Memory Controller driver

This driver makes it possible to configure the static memory
chip selects on the ARM PL172 MultiPort Memory Controller
from a

memory: add ARM PL172 MultiPort Memory Controller driver

This driver makes it possible to configure the static memory
chip selects on the ARM PL172 MultiPort Memory Controller
from a set of properties in DT. Configuration of dynamic
memory is not supported and is left to the boot loader.

The intended usage is to setup timing and configuration for
static memory devices like NAND and NOR Flash before they
are probed by a driver.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

show more ...