1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2016 MediaTek Inc.
4  * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
5  *         Rick Chang <rick.chang@mediatek.com>
6  */
7 
8 #ifndef _MTK_JPEG_REG_H
9 #define _MTK_JPEG_REG_H
10 
11 #define MTK_JPEG_BLOCK_MAX		10
12 #define MTK_JPEG_DCTSIZE		8
13 
14 #define BIT_INQST_MASK_ERROR_BS		0x20
15 #define BIT_INQST_MASK_PAUSE		0x10
16 #define BIT_INQST_MASK_OVERFLOW		0x04
17 #define BIT_INQST_MASK_UNDERFLOW	0x02
18 #define BIT_INQST_MASK_EOF		0x01
19 #define BIT_INQST_MASK_ALLIRQ		0x37
20 
21 #define JPGDEC_REG_RESET		0x0090
22 #define JPGDEC_REG_BRZ_FACTOR		0x00f8
23 #define JPGDEC_REG_DU_NUM		0x00fc
24 #define JPGDEC_REG_DEST_ADDR0_Y		0x0140
25 #define JPGDEC_REG_DEST_ADDR0_U		0x0144
26 #define JPGDEC_REG_DEST_ADDR0_V		0x0148
27 #define JPGDEC_REG_DEST_ADDR1_Y		0x014c
28 #define JPGDEC_REG_DEST_ADDR1_U		0x0150
29 #define JPGDEC_REG_DEST_ADDR1_V		0x0154
30 #define JPGDEC_REG_STRIDE_Y		0x0158
31 #define JPGDEC_REG_STRIDE_UV		0x015c
32 #define JPGDEC_REG_IMG_STRIDE_Y		0x0160
33 #define JPGDEC_REG_IMG_STRIDE_UV	0x0164
34 #define JPGDEC_REG_WDMA_CTRL		0x016c
35 #define JPGDEC_REG_PAUSE_MCU_NUM	0x0170
36 #define JPGDEC_REG_OPERATION_MODE	0x017c
37 #define JPGDEC_REG_FILE_ADDR		0x0200
38 #define JPGDEC_REG_COMP_ID		0x020c
39 #define JPGDEC_REG_TOTAL_MCU_NUM	0x0210
40 #define JPGDEC_REG_COMP0_DATA_UNIT_NUM	0x0224
41 #define JPGDEC_REG_DU_CTRL		0x023c
42 #define JPGDEC_REG_TRIG			0x0240
43 #define JPGDEC_REG_FILE_BRP		0x0248
44 #define JPGDEC_REG_FILE_TOTAL_SIZE	0x024c
45 #define JPGDEC_REG_QT_ID		0x0270
46 #define JPGDEC_REG_INTERRUPT_STATUS	0x0274
47 #define JPGDEC_REG_STATUS		0x0278
48 #define JPGDEC_REG_BIT_STREAM_SIZE	0x0344
49 
50 #endif /* _MTK_JPEG_REG_H */
51