1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2020 Intel Corporation.
3
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/delay.h>
7 #include <linux/i2c.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-device.h>
12 #include <media/v4l2-fwnode.h>
13
14 #define OV9734_LINK_FREQ_180MHZ 180000000ULL
15 #define OV9734_SCLK 36000000LL
16 #define OV9734_MCLK 19200000
17 /* ov9734 only support 1-lane mipi output */
18 #define OV9734_DATA_LANES 1
19 #define OV9734_RGB_DEPTH 10
20
21 #define OV9734_REG_CHIP_ID 0x300a
22 #define OV9734_CHIP_ID 0x9734
23
24 #define OV9734_REG_MODE_SELECT 0x0100
25 #define OV9734_MODE_STANDBY 0x00
26 #define OV9734_MODE_STREAMING 0x01
27
28 /* vertical-timings from sensor */
29 #define OV9734_REG_VTS 0x380e
30 #define OV9734_VTS_30FPS 0x0322
31 #define OV9734_VTS_30FPS_MIN 0x0322
32 #define OV9734_VTS_MAX 0x7fff
33
34 /* horizontal-timings from sensor */
35 #define OV9734_REG_HTS 0x380c
36
37 /* Exposure controls from sensor */
38 #define OV9734_REG_EXPOSURE 0x3500
39 #define OV9734_EXPOSURE_MIN 4
40 #define OV9734_EXPOSURE_MAX_MARGIN 4
41 #define OV9734_EXPOSURE_STEP 1
42
43 /* Analog gain controls from sensor */
44 #define OV9734_REG_ANALOG_GAIN 0x350a
45 #define OV9734_ANAL_GAIN_MIN 16
46 #define OV9734_ANAL_GAIN_MAX 248
47 #define OV9734_ANAL_GAIN_STEP 1
48
49 /* Digital gain controls from sensor */
50 #define OV9734_REG_MWB_R_GAIN 0x5180
51 #define OV9734_REG_MWB_G_GAIN 0x5182
52 #define OV9734_REG_MWB_B_GAIN 0x5184
53 #define OV9734_DGTL_GAIN_MIN 256
54 #define OV9734_DGTL_GAIN_MAX 1023
55 #define OV9734_DGTL_GAIN_STEP 1
56 #define OV9734_DGTL_GAIN_DEFAULT 256
57
58 /* Test Pattern Control */
59 #define OV9734_REG_TEST_PATTERN 0x5080
60 #define OV9734_TEST_PATTERN_ENABLE BIT(7)
61 #define OV9734_TEST_PATTERN_BAR_SHIFT 2
62
63 /* Group Access */
64 #define OV9734_REG_GROUP_ACCESS 0x3208
65 #define OV9734_GROUP_HOLD_START 0x0
66 #define OV9734_GROUP_HOLD_END 0x10
67 #define OV9734_GROUP_HOLD_LAUNCH 0xa0
68
69 enum {
70 OV9734_LINK_FREQ_180MHZ_INDEX,
71 };
72
73 struct ov9734_reg {
74 u16 address;
75 u8 val;
76 };
77
78 struct ov9734_reg_list {
79 u32 num_of_regs;
80 const struct ov9734_reg *regs;
81 };
82
83 struct ov9734_link_freq_config {
84 const struct ov9734_reg_list reg_list;
85 };
86
87 struct ov9734_mode {
88 /* Frame width in pixels */
89 u32 width;
90
91 /* Frame height in pixels */
92 u32 height;
93
94 /* Horizontal timining size */
95 u32 hts;
96
97 /* Default vertical timining size */
98 u32 vts_def;
99
100 /* Min vertical timining size */
101 u32 vts_min;
102
103 /* Link frequency needed for this resolution */
104 u32 link_freq_index;
105
106 /* Sensor register settings for this resolution */
107 const struct ov9734_reg_list reg_list;
108 };
109
110 static const struct ov9734_reg mipi_data_rate_360mbps[] = {
111 {0x3030, 0x19},
112 {0x3080, 0x02},
113 {0x3081, 0x4b},
114 {0x3082, 0x04},
115 {0x3083, 0x00},
116 {0x3084, 0x02},
117 {0x3085, 0x01},
118 {0x3086, 0x01},
119 {0x3089, 0x01},
120 {0x308a, 0x00},
121 {0x301e, 0x15},
122 {0x3103, 0x01},
123 };
124
125 static const struct ov9734_reg mode_1296x734_regs[] = {
126 {0x3001, 0x00},
127 {0x3002, 0x00},
128 {0x3007, 0x00},
129 {0x3010, 0x00},
130 {0x3011, 0x08},
131 {0x3014, 0x22},
132 {0x3600, 0x55},
133 {0x3601, 0x02},
134 {0x3605, 0x22},
135 {0x3611, 0xe7},
136 {0x3654, 0x10},
137 {0x3655, 0x77},
138 {0x3656, 0x77},
139 {0x3657, 0x07},
140 {0x3658, 0x22},
141 {0x3659, 0x22},
142 {0x365a, 0x02},
143 {0x3784, 0x05},
144 {0x3785, 0x55},
145 {0x37c0, 0x07},
146 {0x3800, 0x00},
147 {0x3801, 0x04},
148 {0x3802, 0x00},
149 {0x3803, 0x04},
150 {0x3804, 0x05},
151 {0x3805, 0x0b},
152 {0x3806, 0x02},
153 {0x3807, 0xdb},
154 {0x3808, 0x05},
155 {0x3809, 0x00},
156 {0x380a, 0x02},
157 {0x380b, 0xd0},
158 {0x380c, 0x05},
159 {0x380d, 0xc6},
160 {0x380e, 0x03},
161 {0x380f, 0x22},
162 {0x3810, 0x00},
163 {0x3811, 0x04},
164 {0x3812, 0x00},
165 {0x3813, 0x04},
166 {0x3816, 0x00},
167 {0x3817, 0x00},
168 {0x3818, 0x00},
169 {0x3819, 0x04},
170 {0x3820, 0x18},
171 {0x3821, 0x00},
172 {0x382c, 0x06},
173 {0x3500, 0x00},
174 {0x3501, 0x31},
175 {0x3502, 0x00},
176 {0x3503, 0x03},
177 {0x3504, 0x00},
178 {0x3505, 0x00},
179 {0x3509, 0x10},
180 {0x350a, 0x00},
181 {0x350b, 0x40},
182 {0x3d00, 0x00},
183 {0x3d01, 0x00},
184 {0x3d02, 0x00},
185 {0x3d03, 0x00},
186 {0x3d04, 0x00},
187 {0x3d05, 0x00},
188 {0x3d06, 0x00},
189 {0x3d07, 0x00},
190 {0x3d08, 0x00},
191 {0x3d09, 0x00},
192 {0x3d0a, 0x00},
193 {0x3d0b, 0x00},
194 {0x3d0c, 0x00},
195 {0x3d0d, 0x00},
196 {0x3d0e, 0x00},
197 {0x3d0f, 0x00},
198 {0x3d80, 0x00},
199 {0x3d81, 0x00},
200 {0x3d82, 0x38},
201 {0x3d83, 0xa4},
202 {0x3d84, 0x00},
203 {0x3d85, 0x00},
204 {0x3d86, 0x1f},
205 {0x3d87, 0x03},
206 {0x3d8b, 0x00},
207 {0x3d8f, 0x00},
208 {0x4001, 0xe0},
209 {0x4009, 0x0b},
210 {0x4300, 0x03},
211 {0x4301, 0xff},
212 {0x4304, 0x00},
213 {0x4305, 0x00},
214 {0x4309, 0x00},
215 {0x4600, 0x00},
216 {0x4601, 0x80},
217 {0x4800, 0x00},
218 {0x4805, 0x00},
219 {0x4821, 0x50},
220 {0x4823, 0x50},
221 {0x4837, 0x2d},
222 {0x4a00, 0x00},
223 {0x4f00, 0x80},
224 {0x4f01, 0x10},
225 {0x4f02, 0x00},
226 {0x4f03, 0x00},
227 {0x4f04, 0x00},
228 {0x4f05, 0x00},
229 {0x4f06, 0x00},
230 {0x4f07, 0x00},
231 {0x4f08, 0x00},
232 {0x4f09, 0x00},
233 {0x5000, 0x2f},
234 {0x500c, 0x00},
235 {0x500d, 0x00},
236 {0x500e, 0x00},
237 {0x500f, 0x00},
238 {0x5010, 0x00},
239 {0x5011, 0x00},
240 {0x5012, 0x00},
241 {0x5013, 0x00},
242 {0x5014, 0x00},
243 {0x5015, 0x00},
244 {0x5016, 0x00},
245 {0x5017, 0x00},
246 {0x5080, 0x00},
247 {0x5180, 0x01},
248 {0x5181, 0x00},
249 {0x5182, 0x01},
250 {0x5183, 0x00},
251 {0x5184, 0x01},
252 {0x5185, 0x00},
253 {0x5708, 0x06},
254 {0x380f, 0x2a},
255 {0x5780, 0x3e},
256 {0x5781, 0x0f},
257 {0x5782, 0x44},
258 {0x5783, 0x02},
259 {0x5784, 0x01},
260 {0x5785, 0x01},
261 {0x5786, 0x00},
262 {0x5787, 0x04},
263 {0x5788, 0x02},
264 {0x5789, 0x0f},
265 {0x578a, 0xfd},
266 {0x578b, 0xf5},
267 {0x578c, 0xf5},
268 {0x578d, 0x03},
269 {0x578e, 0x08},
270 {0x578f, 0x0c},
271 {0x5790, 0x08},
272 {0x5791, 0x04},
273 {0x5792, 0x00},
274 {0x5793, 0x52},
275 {0x5794, 0xa3},
276 {0x5000, 0x3f},
277 {0x3801, 0x00},
278 {0x3803, 0x00},
279 {0x3805, 0x0f},
280 {0x3807, 0xdf},
281 {0x3809, 0x10},
282 {0x380b, 0xde},
283 {0x3811, 0x00},
284 {0x3813, 0x01},
285 };
286
287 static const char * const ov9734_test_pattern_menu[] = {
288 "Disabled",
289 "Standard Color Bar",
290 "Top-Bottom Darker Color Bar",
291 "Right-Left Darker Color Bar",
292 "Bottom-Top Darker Color Bar",
293 };
294
295 static const s64 link_freq_menu_items[] = {
296 OV9734_LINK_FREQ_180MHZ,
297 };
298
299 static const struct ov9734_link_freq_config link_freq_configs[] = {
300 [OV9734_LINK_FREQ_180MHZ_INDEX] = {
301 .reg_list = {
302 .num_of_regs = ARRAY_SIZE(mipi_data_rate_360mbps),
303 .regs = mipi_data_rate_360mbps,
304 }
305 },
306 };
307
308 static const struct ov9734_mode supported_modes[] = {
309 {
310 .width = 1296,
311 .height = 734,
312 .hts = 0x5c6,
313 .vts_def = OV9734_VTS_30FPS,
314 .vts_min = OV9734_VTS_30FPS_MIN,
315 .reg_list = {
316 .num_of_regs = ARRAY_SIZE(mode_1296x734_regs),
317 .regs = mode_1296x734_regs,
318 },
319 .link_freq_index = OV9734_LINK_FREQ_180MHZ_INDEX,
320 },
321 };
322
323 struct ov9734 {
324 struct v4l2_subdev sd;
325 struct media_pad pad;
326 struct v4l2_ctrl_handler ctrl_handler;
327
328 /* V4L2 Controls */
329 struct v4l2_ctrl *link_freq;
330 struct v4l2_ctrl *pixel_rate;
331 struct v4l2_ctrl *vblank;
332 struct v4l2_ctrl *hblank;
333 struct v4l2_ctrl *exposure;
334
335 /* Current mode */
336 const struct ov9734_mode *cur_mode;
337
338 /* To serialize asynchronus callbacks */
339 struct mutex mutex;
340
341 /* Streaming on/off */
342 bool streaming;
343 };
344
to_ov9734(struct v4l2_subdev * subdev)345 static inline struct ov9734 *to_ov9734(struct v4l2_subdev *subdev)
346 {
347 return container_of(subdev, struct ov9734, sd);
348 }
349
to_pixel_rate(u32 f_index)350 static u64 to_pixel_rate(u32 f_index)
351 {
352 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV9734_DATA_LANES;
353
354 do_div(pixel_rate, OV9734_RGB_DEPTH);
355
356 return pixel_rate;
357 }
358
to_pixels_per_line(u32 hts,u32 f_index)359 static u64 to_pixels_per_line(u32 hts, u32 f_index)
360 {
361 u64 ppl = hts * to_pixel_rate(f_index);
362
363 do_div(ppl, OV9734_SCLK);
364
365 return ppl;
366 }
367
ov9734_read_reg(struct ov9734 * ov9734,u16 reg,u16 len,u32 * val)368 static int ov9734_read_reg(struct ov9734 *ov9734, u16 reg, u16 len, u32 *val)
369 {
370 struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
371 struct i2c_msg msgs[2];
372 u8 addr_buf[2];
373 u8 data_buf[4] = {0};
374 int ret;
375
376 if (len > sizeof(data_buf))
377 return -EINVAL;
378
379 put_unaligned_be16(reg, addr_buf);
380 msgs[0].addr = client->addr;
381 msgs[0].flags = 0;
382 msgs[0].len = sizeof(addr_buf);
383 msgs[0].buf = addr_buf;
384 msgs[1].addr = client->addr;
385 msgs[1].flags = I2C_M_RD;
386 msgs[1].len = len;
387 msgs[1].buf = &data_buf[sizeof(data_buf) - len];
388
389 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
390 if (ret != ARRAY_SIZE(msgs))
391 return ret < 0 ? ret : -EIO;
392
393 *val = get_unaligned_be32(data_buf);
394
395 return 0;
396 }
397
ov9734_write_reg(struct ov9734 * ov9734,u16 reg,u16 len,u32 val)398 static int ov9734_write_reg(struct ov9734 *ov9734, u16 reg, u16 len, u32 val)
399 {
400 struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
401 u8 buf[6];
402 int ret = 0;
403
404 if (len > 4)
405 return -EINVAL;
406
407 put_unaligned_be16(reg, buf);
408 put_unaligned_be32(val << 8 * (4 - len), buf + 2);
409
410 ret = i2c_master_send(client, buf, len + 2);
411 if (ret != len + 2)
412 return ret < 0 ? ret : -EIO;
413
414 return 0;
415 }
416
ov9734_write_reg_list(struct ov9734 * ov9734,const struct ov9734_reg_list * r_list)417 static int ov9734_write_reg_list(struct ov9734 *ov9734,
418 const struct ov9734_reg_list *r_list)
419 {
420 struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
421 unsigned int i;
422 int ret;
423
424 for (i = 0; i < r_list->num_of_regs; i++) {
425 ret = ov9734_write_reg(ov9734, r_list->regs[i].address, 1,
426 r_list->regs[i].val);
427 if (ret) {
428 dev_err_ratelimited(&client->dev,
429 "write reg 0x%4.4x return err = %d",
430 r_list->regs[i].address, ret);
431 return ret;
432 }
433 }
434
435 return 0;
436 }
437
ov9734_update_digital_gain(struct ov9734 * ov9734,u32 d_gain)438 static int ov9734_update_digital_gain(struct ov9734 *ov9734, u32 d_gain)
439 {
440 int ret;
441
442 ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
443 OV9734_GROUP_HOLD_START);
444 if (ret)
445 return ret;
446
447 ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_R_GAIN, 2, d_gain);
448 if (ret)
449 return ret;
450
451 ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_G_GAIN, 2, d_gain);
452 if (ret)
453 return ret;
454
455 ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_B_GAIN, 2, d_gain);
456 if (ret)
457 return ret;
458
459 ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
460 OV9734_GROUP_HOLD_END);
461 if (ret)
462 return ret;
463
464 ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
465 OV9734_GROUP_HOLD_LAUNCH);
466 return ret;
467 }
468
ov9734_test_pattern(struct ov9734 * ov9734,u32 pattern)469 static int ov9734_test_pattern(struct ov9734 *ov9734, u32 pattern)
470 {
471 if (pattern)
472 pattern = (pattern - 1) << OV9734_TEST_PATTERN_BAR_SHIFT |
473 OV9734_TEST_PATTERN_ENABLE;
474
475 return ov9734_write_reg(ov9734, OV9734_REG_TEST_PATTERN, 1, pattern);
476 }
477
ov9734_set_ctrl(struct v4l2_ctrl * ctrl)478 static int ov9734_set_ctrl(struct v4l2_ctrl *ctrl)
479 {
480 struct ov9734 *ov9734 = container_of(ctrl->handler,
481 struct ov9734, ctrl_handler);
482 struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
483 s64 exposure_max;
484 int ret = 0;
485
486 /* Propagate change of current control to all related controls */
487 if (ctrl->id == V4L2_CID_VBLANK) {
488 /* Update max exposure while meeting expected vblanking */
489 exposure_max = ov9734->cur_mode->height + ctrl->val -
490 OV9734_EXPOSURE_MAX_MARGIN;
491 __v4l2_ctrl_modify_range(ov9734->exposure,
492 ov9734->exposure->minimum,
493 exposure_max, ov9734->exposure->step,
494 exposure_max);
495 }
496
497 /* V4L2 controls values will be applied only when power is already up */
498 if (!pm_runtime_get_if_in_use(&client->dev))
499 return 0;
500
501 switch (ctrl->id) {
502 case V4L2_CID_ANALOGUE_GAIN:
503 ret = ov9734_write_reg(ov9734, OV9734_REG_ANALOG_GAIN,
504 2, ctrl->val);
505 break;
506
507 case V4L2_CID_DIGITAL_GAIN:
508 ret = ov9734_update_digital_gain(ov9734, ctrl->val);
509 break;
510
511 case V4L2_CID_EXPOSURE:
512 /* 4 least significant bits of expsoure are fractional part */
513 ret = ov9734_write_reg(ov9734, OV9734_REG_EXPOSURE,
514 3, ctrl->val << 4);
515 break;
516
517 case V4L2_CID_VBLANK:
518 ret = ov9734_write_reg(ov9734, OV9734_REG_VTS, 2,
519 ov9734->cur_mode->height + ctrl->val);
520 break;
521
522 case V4L2_CID_TEST_PATTERN:
523 ret = ov9734_test_pattern(ov9734, ctrl->val);
524 break;
525
526 default:
527 ret = -EINVAL;
528 break;
529 }
530
531 pm_runtime_put(&client->dev);
532
533 return ret;
534 }
535
536 static const struct v4l2_ctrl_ops ov9734_ctrl_ops = {
537 .s_ctrl = ov9734_set_ctrl,
538 };
539
ov9734_init_controls(struct ov9734 * ov9734)540 static int ov9734_init_controls(struct ov9734 *ov9734)
541 {
542 struct v4l2_ctrl_handler *ctrl_hdlr;
543 const struct ov9734_mode *cur_mode;
544 s64 exposure_max, h_blank, pixel_rate;
545 u32 vblank_min, vblank_max, vblank_default;
546 int ret, size;
547
548 ctrl_hdlr = &ov9734->ctrl_handler;
549 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
550 if (ret)
551 return ret;
552
553 ctrl_hdlr->lock = &ov9734->mutex;
554 cur_mode = ov9734->cur_mode;
555 size = ARRAY_SIZE(link_freq_menu_items);
556 ov9734->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov9734_ctrl_ops,
557 V4L2_CID_LINK_FREQ,
558 size - 1, 0,
559 link_freq_menu_items);
560 if (ov9734->link_freq)
561 ov9734->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
562
563 pixel_rate = to_pixel_rate(OV9734_LINK_FREQ_180MHZ_INDEX);
564 ov9734->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
565 V4L2_CID_PIXEL_RATE, 0,
566 pixel_rate, 1, pixel_rate);
567 vblank_min = cur_mode->vts_min - cur_mode->height;
568 vblank_max = OV9734_VTS_MAX - cur_mode->height;
569 vblank_default = cur_mode->vts_def - cur_mode->height;
570 ov9734->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
571 V4L2_CID_VBLANK, vblank_min,
572 vblank_max, 1, vblank_default);
573 h_blank = to_pixels_per_line(cur_mode->hts, cur_mode->link_freq_index);
574 h_blank -= cur_mode->width;
575 ov9734->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
576 V4L2_CID_HBLANK, h_blank, h_blank, 1,
577 h_blank);
578 if (ov9734->hblank)
579 ov9734->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
580
581 v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
582 OV9734_ANAL_GAIN_MIN, OV9734_ANAL_GAIN_MAX,
583 OV9734_ANAL_GAIN_STEP, OV9734_ANAL_GAIN_MIN);
584 v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
585 OV9734_DGTL_GAIN_MIN, OV9734_DGTL_GAIN_MAX,
586 OV9734_DGTL_GAIN_STEP, OV9734_DGTL_GAIN_DEFAULT);
587 exposure_max = ov9734->cur_mode->vts_def - OV9734_EXPOSURE_MAX_MARGIN;
588 ov9734->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
589 V4L2_CID_EXPOSURE,
590 OV9734_EXPOSURE_MIN, exposure_max,
591 OV9734_EXPOSURE_STEP,
592 exposure_max);
593 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov9734_ctrl_ops,
594 V4L2_CID_TEST_PATTERN,
595 ARRAY_SIZE(ov9734_test_pattern_menu) - 1,
596 0, 0, ov9734_test_pattern_menu);
597 if (ctrl_hdlr->error)
598 return ctrl_hdlr->error;
599
600 ov9734->sd.ctrl_handler = ctrl_hdlr;
601
602 return 0;
603 }
604
ov9734_update_pad_format(const struct ov9734_mode * mode,struct v4l2_mbus_framefmt * fmt)605 static void ov9734_update_pad_format(const struct ov9734_mode *mode,
606 struct v4l2_mbus_framefmt *fmt)
607 {
608 fmt->width = mode->width;
609 fmt->height = mode->height;
610 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
611 fmt->field = V4L2_FIELD_NONE;
612 }
613
ov9734_start_streaming(struct ov9734 * ov9734)614 static int ov9734_start_streaming(struct ov9734 *ov9734)
615 {
616 struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
617 const struct ov9734_reg_list *reg_list;
618 int link_freq_index, ret;
619
620 link_freq_index = ov9734->cur_mode->link_freq_index;
621 reg_list = &link_freq_configs[link_freq_index].reg_list;
622 ret = ov9734_write_reg_list(ov9734, reg_list);
623 if (ret) {
624 dev_err(&client->dev, "failed to set plls");
625 return ret;
626 }
627
628 reg_list = &ov9734->cur_mode->reg_list;
629 ret = ov9734_write_reg_list(ov9734, reg_list);
630 if (ret) {
631 dev_err(&client->dev, "failed to set mode");
632 return ret;
633 }
634
635 ret = __v4l2_ctrl_handler_setup(ov9734->sd.ctrl_handler);
636 if (ret)
637 return ret;
638
639 ret = ov9734_write_reg(ov9734, OV9734_REG_MODE_SELECT,
640 1, OV9734_MODE_STREAMING);
641 if (ret)
642 dev_err(&client->dev, "failed to start stream");
643
644 return ret;
645 }
646
ov9734_stop_streaming(struct ov9734 * ov9734)647 static void ov9734_stop_streaming(struct ov9734 *ov9734)
648 {
649 struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
650
651 if (ov9734_write_reg(ov9734, OV9734_REG_MODE_SELECT,
652 1, OV9734_MODE_STANDBY))
653 dev_err(&client->dev, "failed to stop stream");
654 }
655
ov9734_set_stream(struct v4l2_subdev * sd,int enable)656 static int ov9734_set_stream(struct v4l2_subdev *sd, int enable)
657 {
658 struct ov9734 *ov9734 = to_ov9734(sd);
659 struct i2c_client *client = v4l2_get_subdevdata(sd);
660 int ret = 0;
661
662 mutex_lock(&ov9734->mutex);
663 if (ov9734->streaming == enable) {
664 mutex_unlock(&ov9734->mutex);
665 return 0;
666 }
667
668 if (enable) {
669 ret = pm_runtime_resume_and_get(&client->dev);
670 if (ret < 0) {
671 mutex_unlock(&ov9734->mutex);
672 return ret;
673 }
674
675 ret = ov9734_start_streaming(ov9734);
676 if (ret) {
677 enable = 0;
678 ov9734_stop_streaming(ov9734);
679 pm_runtime_put(&client->dev);
680 }
681 } else {
682 ov9734_stop_streaming(ov9734);
683 pm_runtime_put(&client->dev);
684 }
685
686 ov9734->streaming = enable;
687 mutex_unlock(&ov9734->mutex);
688
689 return ret;
690 }
691
ov9734_suspend(struct device * dev)692 static int __maybe_unused ov9734_suspend(struct device *dev)
693 {
694 struct i2c_client *client = to_i2c_client(dev);
695 struct v4l2_subdev *sd = i2c_get_clientdata(client);
696 struct ov9734 *ov9734 = to_ov9734(sd);
697
698 mutex_lock(&ov9734->mutex);
699 if (ov9734->streaming)
700 ov9734_stop_streaming(ov9734);
701
702 mutex_unlock(&ov9734->mutex);
703
704 return 0;
705 }
706
ov9734_resume(struct device * dev)707 static int __maybe_unused ov9734_resume(struct device *dev)
708 {
709 struct i2c_client *client = to_i2c_client(dev);
710 struct v4l2_subdev *sd = i2c_get_clientdata(client);
711 struct ov9734 *ov9734 = to_ov9734(sd);
712 int ret = 0;
713
714 mutex_lock(&ov9734->mutex);
715 if (!ov9734->streaming)
716 goto exit;
717
718 ret = ov9734_start_streaming(ov9734);
719 if (ret) {
720 ov9734->streaming = false;
721 ov9734_stop_streaming(ov9734);
722 }
723
724 exit:
725 mutex_unlock(&ov9734->mutex);
726 return ret;
727 }
728
ov9734_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)729 static int ov9734_set_format(struct v4l2_subdev *sd,
730 struct v4l2_subdev_state *sd_state,
731 struct v4l2_subdev_format *fmt)
732 {
733 struct ov9734 *ov9734 = to_ov9734(sd);
734 const struct ov9734_mode *mode;
735 s32 vblank_def, h_blank;
736
737 mode = v4l2_find_nearest_size(supported_modes,
738 ARRAY_SIZE(supported_modes), width,
739 height, fmt->format.width,
740 fmt->format.height);
741
742 mutex_lock(&ov9734->mutex);
743 ov9734_update_pad_format(mode, &fmt->format);
744 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
745 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
746 } else {
747 ov9734->cur_mode = mode;
748 __v4l2_ctrl_s_ctrl(ov9734->link_freq, mode->link_freq_index);
749 __v4l2_ctrl_s_ctrl_int64(ov9734->pixel_rate,
750 to_pixel_rate(mode->link_freq_index));
751
752 /* Update limits and set FPS to default */
753 vblank_def = mode->vts_def - mode->height;
754 __v4l2_ctrl_modify_range(ov9734->vblank,
755 mode->vts_min - mode->height,
756 OV9734_VTS_MAX - mode->height, 1,
757 vblank_def);
758 __v4l2_ctrl_s_ctrl(ov9734->vblank, vblank_def);
759 h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
760 mode->width;
761 __v4l2_ctrl_modify_range(ov9734->hblank, h_blank, h_blank, 1,
762 h_blank);
763 }
764
765 mutex_unlock(&ov9734->mutex);
766
767 return 0;
768 }
769
ov9734_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)770 static int ov9734_get_format(struct v4l2_subdev *sd,
771 struct v4l2_subdev_state *sd_state,
772 struct v4l2_subdev_format *fmt)
773 {
774 struct ov9734 *ov9734 = to_ov9734(sd);
775
776 mutex_lock(&ov9734->mutex);
777 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
778 fmt->format = *v4l2_subdev_get_try_format(&ov9734->sd,
779 sd_state,
780 fmt->pad);
781 else
782 ov9734_update_pad_format(ov9734->cur_mode, &fmt->format);
783
784 mutex_unlock(&ov9734->mutex);
785
786 return 0;
787 }
788
ov9734_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)789 static int ov9734_enum_mbus_code(struct v4l2_subdev *sd,
790 struct v4l2_subdev_state *sd_state,
791 struct v4l2_subdev_mbus_code_enum *code)
792 {
793 if (code->index > 0)
794 return -EINVAL;
795
796 code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
797
798 return 0;
799 }
800
ov9734_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)801 static int ov9734_enum_frame_size(struct v4l2_subdev *sd,
802 struct v4l2_subdev_state *sd_state,
803 struct v4l2_subdev_frame_size_enum *fse)
804 {
805 if (fse->index >= ARRAY_SIZE(supported_modes))
806 return -EINVAL;
807
808 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
809 return -EINVAL;
810
811 fse->min_width = supported_modes[fse->index].width;
812 fse->max_width = fse->min_width;
813 fse->min_height = supported_modes[fse->index].height;
814 fse->max_height = fse->min_height;
815
816 return 0;
817 }
818
ov9734_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)819 static int ov9734_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
820 {
821 struct ov9734 *ov9734 = to_ov9734(sd);
822
823 mutex_lock(&ov9734->mutex);
824 ov9734_update_pad_format(&supported_modes[0],
825 v4l2_subdev_get_try_format(sd, fh->state, 0));
826 mutex_unlock(&ov9734->mutex);
827
828 return 0;
829 }
830
831 static const struct v4l2_subdev_video_ops ov9734_video_ops = {
832 .s_stream = ov9734_set_stream,
833 };
834
835 static const struct v4l2_subdev_pad_ops ov9734_pad_ops = {
836 .set_fmt = ov9734_set_format,
837 .get_fmt = ov9734_get_format,
838 .enum_mbus_code = ov9734_enum_mbus_code,
839 .enum_frame_size = ov9734_enum_frame_size,
840 };
841
842 static const struct v4l2_subdev_ops ov9734_subdev_ops = {
843 .video = &ov9734_video_ops,
844 .pad = &ov9734_pad_ops,
845 };
846
847 static const struct media_entity_operations ov9734_subdev_entity_ops = {
848 .link_validate = v4l2_subdev_link_validate,
849 };
850
851 static const struct v4l2_subdev_internal_ops ov9734_internal_ops = {
852 .open = ov9734_open,
853 };
854
ov9734_identify_module(struct ov9734 * ov9734)855 static int ov9734_identify_module(struct ov9734 *ov9734)
856 {
857 struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
858 int ret;
859 u32 val;
860
861 ret = ov9734_read_reg(ov9734, OV9734_REG_CHIP_ID, 2, &val);
862 if (ret)
863 return ret;
864
865 if (val != OV9734_CHIP_ID) {
866 dev_err(&client->dev, "chip id mismatch: %x!=%x",
867 OV9734_CHIP_ID, val);
868 return -ENXIO;
869 }
870
871 return 0;
872 }
873
ov9734_check_hwcfg(struct device * dev)874 static int ov9734_check_hwcfg(struct device *dev)
875 {
876 struct fwnode_handle *ep;
877 struct fwnode_handle *fwnode = dev_fwnode(dev);
878 struct v4l2_fwnode_endpoint bus_cfg = {
879 .bus_type = V4L2_MBUS_CSI2_DPHY
880 };
881 u32 mclk;
882 int ret;
883 unsigned int i, j;
884
885 if (!fwnode)
886 return -ENXIO;
887
888 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
889 if (ret)
890 return ret;
891
892 if (mclk != OV9734_MCLK) {
893 dev_err(dev, "external clock %d is not supported", mclk);
894 return -EINVAL;
895 }
896
897 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
898 if (!ep)
899 return -ENXIO;
900
901 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
902 fwnode_handle_put(ep);
903 if (ret)
904 return ret;
905
906 if (!bus_cfg.nr_of_link_frequencies) {
907 dev_err(dev, "no link frequencies defined");
908 ret = -EINVAL;
909 goto check_hwcfg_error;
910 }
911
912 for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
913 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
914 if (link_freq_menu_items[i] ==
915 bus_cfg.link_frequencies[j])
916 break;
917 }
918
919 if (j == bus_cfg.nr_of_link_frequencies) {
920 dev_err(dev, "no link frequency %lld supported",
921 link_freq_menu_items[i]);
922 ret = -EINVAL;
923 goto check_hwcfg_error;
924 }
925 }
926
927 check_hwcfg_error:
928 v4l2_fwnode_endpoint_free(&bus_cfg);
929
930 return ret;
931 }
932
ov9734_remove(struct i2c_client * client)933 static void ov9734_remove(struct i2c_client *client)
934 {
935 struct v4l2_subdev *sd = i2c_get_clientdata(client);
936 struct ov9734 *ov9734 = to_ov9734(sd);
937
938 v4l2_async_unregister_subdev(sd);
939 media_entity_cleanup(&sd->entity);
940 v4l2_ctrl_handler_free(sd->ctrl_handler);
941 pm_runtime_disable(&client->dev);
942 pm_runtime_set_suspended(&client->dev);
943 mutex_destroy(&ov9734->mutex);
944 }
945
ov9734_probe(struct i2c_client * client)946 static int ov9734_probe(struct i2c_client *client)
947 {
948 struct ov9734 *ov9734;
949 int ret;
950
951 ret = ov9734_check_hwcfg(&client->dev);
952 if (ret) {
953 dev_err(&client->dev, "failed to check HW configuration: %d",
954 ret);
955 return ret;
956 }
957
958 ov9734 = devm_kzalloc(&client->dev, sizeof(*ov9734), GFP_KERNEL);
959 if (!ov9734)
960 return -ENOMEM;
961
962 v4l2_i2c_subdev_init(&ov9734->sd, client, &ov9734_subdev_ops);
963 ret = ov9734_identify_module(ov9734);
964 if (ret) {
965 dev_err(&client->dev, "failed to find sensor: %d", ret);
966 return ret;
967 }
968
969 mutex_init(&ov9734->mutex);
970 ov9734->cur_mode = &supported_modes[0];
971 ret = ov9734_init_controls(ov9734);
972 if (ret) {
973 dev_err(&client->dev, "failed to init controls: %d", ret);
974 goto probe_error_v4l2_ctrl_handler_free;
975 }
976
977 ov9734->sd.internal_ops = &ov9734_internal_ops;
978 ov9734->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
979 ov9734->sd.entity.ops = &ov9734_subdev_entity_ops;
980 ov9734->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
981 ov9734->pad.flags = MEDIA_PAD_FL_SOURCE;
982 ret = media_entity_pads_init(&ov9734->sd.entity, 1, &ov9734->pad);
983 if (ret) {
984 dev_err(&client->dev, "failed to init entity pads: %d", ret);
985 goto probe_error_v4l2_ctrl_handler_free;
986 }
987
988 /*
989 * Device is already turned on by i2c-core with ACPI domain PM.
990 * Enable runtime PM and turn off the device.
991 */
992 pm_runtime_set_active(&client->dev);
993 pm_runtime_enable(&client->dev);
994 pm_runtime_idle(&client->dev);
995
996 ret = v4l2_async_register_subdev_sensor(&ov9734->sd);
997 if (ret < 0) {
998 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
999 ret);
1000 goto probe_error_media_entity_cleanup_pm;
1001 }
1002
1003 return 0;
1004
1005 probe_error_media_entity_cleanup_pm:
1006 pm_runtime_disable(&client->dev);
1007 pm_runtime_set_suspended(&client->dev);
1008 media_entity_cleanup(&ov9734->sd.entity);
1009
1010 probe_error_v4l2_ctrl_handler_free:
1011 v4l2_ctrl_handler_free(ov9734->sd.ctrl_handler);
1012 mutex_destroy(&ov9734->mutex);
1013
1014 return ret;
1015 }
1016
1017 static const struct dev_pm_ops ov9734_pm_ops = {
1018 SET_SYSTEM_SLEEP_PM_OPS(ov9734_suspend, ov9734_resume)
1019 };
1020
1021 static const struct acpi_device_id ov9734_acpi_ids[] = {
1022 { "OVTI9734", },
1023 {}
1024 };
1025
1026 MODULE_DEVICE_TABLE(acpi, ov9734_acpi_ids);
1027
1028 static struct i2c_driver ov9734_i2c_driver = {
1029 .driver = {
1030 .name = "ov9734",
1031 .pm = &ov9734_pm_ops,
1032 .acpi_match_table = ov9734_acpi_ids,
1033 },
1034 .probe = ov9734_probe,
1035 .remove = ov9734_remove,
1036 };
1037
1038 module_i2c_driver(ov9734_i2c_driver);
1039
1040 MODULE_AUTHOR("Qiu, Tianshu <tian.shu.qiu@intel.com>");
1041 MODULE_AUTHOR("Bingbu Cao <bingbu.cao@intel.com>");
1042 MODULE_DESCRIPTION("OmniVision OV9734 sensor driver");
1043 MODULE_LICENSE("GPL v2");
1044