1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Sony IMX290 CMOS Image Sensor Driver 4 * 5 * Copyright (C) 2019 FRAMOS GmbH. 6 * 7 * Copyright (C) 2019 Linaro Ltd. 8 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 9 */ 10 11 #include <linux/clk.h> 12 #include <linux/delay.h> 13 #include <linux/gpio/consumer.h> 14 #include <linux/i2c.h> 15 #include <linux/module.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/regmap.h> 18 #include <linux/regulator/consumer.h> 19 #include <media/media-entity.h> 20 #include <media/v4l2-ctrls.h> 21 #include <media/v4l2-device.h> 22 #include <media/v4l2-fwnode.h> 23 #include <media/v4l2-subdev.h> 24 25 #define IMX290_STANDBY 0x3000 26 #define IMX290_REGHOLD 0x3001 27 #define IMX290_XMSTA 0x3002 28 #define IMX290_GAIN 0x3014 29 30 #define IMX290_DEFAULT_LINK_FREQ 445500000 31 32 static const char * const imx290_supply_name[] = { 33 "vdda", 34 "vddd", 35 "vdddo", 36 }; 37 38 #define IMX290_NUM_SUPPLIES ARRAY_SIZE(imx290_supply_name) 39 40 struct imx290_regval { 41 u16 reg; 42 u8 val; 43 }; 44 45 struct imx290_mode { 46 u32 width; 47 u32 height; 48 u32 pixel_rate; 49 u32 link_freq_index; 50 51 const struct imx290_regval *data; 52 u32 data_size; 53 }; 54 55 struct imx290 { 56 struct device *dev; 57 struct clk *xclk; 58 struct regmap *regmap; 59 60 struct v4l2_subdev sd; 61 struct v4l2_fwnode_endpoint ep; 62 struct media_pad pad; 63 struct v4l2_mbus_framefmt current_format; 64 const struct imx290_mode *current_mode; 65 66 struct regulator_bulk_data supplies[IMX290_NUM_SUPPLIES]; 67 struct gpio_desc *rst_gpio; 68 69 struct v4l2_ctrl_handler ctrls; 70 struct v4l2_ctrl *link_freq; 71 struct v4l2_ctrl *pixel_rate; 72 73 struct mutex lock; 74 }; 75 76 struct imx290_pixfmt { 77 u32 code; 78 }; 79 80 static const struct imx290_pixfmt imx290_formats[] = { 81 { MEDIA_BUS_FMT_SRGGB10_1X10 }, 82 }; 83 84 static const struct regmap_config imx290_regmap_config = { 85 .reg_bits = 16, 86 .val_bits = 8, 87 .cache_type = REGCACHE_RBTREE, 88 }; 89 90 static const struct imx290_regval imx290_global_init_settings[] = { 91 { 0x3007, 0x00 }, 92 { 0x3009, 0x00 }, 93 { 0x3018, 0x65 }, 94 { 0x3019, 0x04 }, 95 { 0x301a, 0x00 }, 96 { 0x3443, 0x03 }, 97 { 0x3444, 0x20 }, 98 { 0x3445, 0x25 }, 99 { 0x3407, 0x03 }, 100 { 0x303a, 0x0c }, 101 { 0x3040, 0x00 }, 102 { 0x3041, 0x00 }, 103 { 0x303c, 0x00 }, 104 { 0x303d, 0x00 }, 105 { 0x3042, 0x9c }, 106 { 0x3043, 0x07 }, 107 { 0x303e, 0x49 }, 108 { 0x303f, 0x04 }, 109 { 0x304b, 0x0a }, 110 { 0x300f, 0x00 }, 111 { 0x3010, 0x21 }, 112 { 0x3012, 0x64 }, 113 { 0x3016, 0x09 }, 114 { 0x3070, 0x02 }, 115 { 0x3071, 0x11 }, 116 { 0x309b, 0x10 }, 117 { 0x309c, 0x22 }, 118 { 0x30a2, 0x02 }, 119 { 0x30a6, 0x20 }, 120 { 0x30a8, 0x20 }, 121 { 0x30aa, 0x20 }, 122 { 0x30ac, 0x20 }, 123 { 0x30b0, 0x43 }, 124 { 0x3119, 0x9e }, 125 { 0x311c, 0x1e }, 126 { 0x311e, 0x08 }, 127 { 0x3128, 0x05 }, 128 { 0x313d, 0x83 }, 129 { 0x3150, 0x03 }, 130 { 0x317e, 0x00 }, 131 { 0x32b8, 0x50 }, 132 { 0x32b9, 0x10 }, 133 { 0x32ba, 0x00 }, 134 { 0x32bb, 0x04 }, 135 { 0x32c8, 0x50 }, 136 { 0x32c9, 0x10 }, 137 { 0x32ca, 0x00 }, 138 { 0x32cb, 0x04 }, 139 { 0x332c, 0xd3 }, 140 { 0x332d, 0x10 }, 141 { 0x332e, 0x0d }, 142 { 0x3358, 0x06 }, 143 { 0x3359, 0xe1 }, 144 { 0x335a, 0x11 }, 145 { 0x3360, 0x1e }, 146 { 0x3361, 0x61 }, 147 { 0x3362, 0x10 }, 148 { 0x33b0, 0x50 }, 149 { 0x33b2, 0x1a }, 150 { 0x33b3, 0x04 }, 151 }; 152 153 static const struct imx290_regval imx290_1080p_settings[] = { 154 /* mode settings */ 155 { 0x3007, 0x00 }, 156 { 0x303a, 0x0c }, 157 { 0x3414, 0x0a }, 158 { 0x3472, 0x80 }, 159 { 0x3473, 0x07 }, 160 { 0x3418, 0x38 }, 161 { 0x3419, 0x04 }, 162 { 0x3012, 0x64 }, 163 { 0x3013, 0x00 }, 164 { 0x305c, 0x18 }, 165 { 0x305d, 0x03 }, 166 { 0x305e, 0x20 }, 167 { 0x305f, 0x01 }, 168 { 0x315e, 0x1a }, 169 { 0x3164, 0x1a }, 170 { 0x3480, 0x49 }, 171 /* data rate settings */ 172 { 0x3009, 0x01 }, 173 { 0x3405, 0x10 }, 174 { 0x3446, 0x57 }, 175 { 0x3447, 0x00 }, 176 { 0x3448, 0x37 }, 177 { 0x3449, 0x00 }, 178 { 0x344a, 0x1f }, 179 { 0x344b, 0x00 }, 180 { 0x344c, 0x1f }, 181 { 0x344d, 0x00 }, 182 { 0x344e, 0x1f }, 183 { 0x344f, 0x00 }, 184 { 0x3450, 0x77 }, 185 { 0x3451, 0x00 }, 186 { 0x3452, 0x1f }, 187 { 0x3453, 0x00 }, 188 { 0x3454, 0x17 }, 189 { 0x3455, 0x00 }, 190 { 0x301c, 0x98 }, 191 { 0x301d, 0x08 }, 192 }; 193 194 static const struct imx290_regval imx290_720p_settings[] = { 195 /* mode settings */ 196 { 0x3007, 0x10 }, 197 { 0x303a, 0x06 }, 198 { 0x3414, 0x04 }, 199 { 0x3472, 0x00 }, 200 { 0x3473, 0x05 }, 201 { 0x3418, 0xd0 }, 202 { 0x3419, 0x02 }, 203 { 0x3012, 0x64 }, 204 { 0x3013, 0x00 }, 205 { 0x305c, 0x20 }, 206 { 0x305d, 0x00 }, 207 { 0x305e, 0x20 }, 208 { 0x305f, 0x01 }, 209 { 0x315e, 0x1a }, 210 { 0x3164, 0x1a }, 211 { 0x3480, 0x49 }, 212 /* data rate settings */ 213 { 0x3009, 0x01 }, 214 { 0x3405, 0x10 }, 215 { 0x3446, 0x4f }, 216 { 0x3447, 0x00 }, 217 { 0x3448, 0x2f }, 218 { 0x3449, 0x00 }, 219 { 0x344a, 0x17 }, 220 { 0x344b, 0x00 }, 221 { 0x344c, 0x17 }, 222 { 0x344d, 0x00 }, 223 { 0x344e, 0x17 }, 224 { 0x344f, 0x00 }, 225 { 0x3450, 0x57 }, 226 { 0x3451, 0x00 }, 227 { 0x3452, 0x17 }, 228 { 0x3453, 0x00 }, 229 { 0x3454, 0x17 }, 230 { 0x3455, 0x00 }, 231 { 0x301c, 0xe4 }, 232 { 0x301d, 0x0c }, 233 }; 234 235 static const struct imx290_regval imx290_10bit_settings[] = { 236 { 0x3005, 0x00}, 237 { 0x3046, 0x00}, 238 { 0x3129, 0x1d}, 239 { 0x317c, 0x12}, 240 { 0x31ec, 0x37}, 241 { 0x3441, 0x0a}, 242 { 0x3442, 0x0a}, 243 { 0x300a, 0x3c}, 244 { 0x300b, 0x00}, 245 }; 246 247 /* supported link frequencies */ 248 static const s64 imx290_link_freq[] = { 249 IMX290_DEFAULT_LINK_FREQ, 250 }; 251 252 /* Mode configs */ 253 static const struct imx290_mode imx290_modes[] = { 254 { 255 .width = 1920, 256 .height = 1080, 257 .data = imx290_1080p_settings, 258 .data_size = ARRAY_SIZE(imx290_1080p_settings), 259 .pixel_rate = 178200000, 260 .link_freq_index = 0, 261 }, 262 { 263 .width = 1280, 264 .height = 720, 265 .data = imx290_720p_settings, 266 .data_size = ARRAY_SIZE(imx290_720p_settings), 267 .pixel_rate = 178200000, 268 .link_freq_index = 0, 269 }, 270 }; 271 272 static inline struct imx290 *to_imx290(struct v4l2_subdev *_sd) 273 { 274 return container_of(_sd, struct imx290, sd); 275 } 276 277 static inline int imx290_read_reg(struct imx290 *imx290, u16 addr, u8 *value) 278 { 279 unsigned int regval; 280 int ret; 281 282 ret = regmap_read(imx290->regmap, addr, ®val); 283 if (ret) { 284 dev_err(imx290->dev, "I2C read failed for addr: %x\n", addr); 285 return ret; 286 } 287 288 *value = regval & 0xff; 289 290 return 0; 291 } 292 293 static int imx290_write_reg(struct imx290 *imx290, u16 addr, u8 value) 294 { 295 int ret; 296 297 ret = regmap_write(imx290->regmap, addr, value); 298 if (ret) { 299 dev_err(imx290->dev, "I2C write failed for addr: %x\n", addr); 300 return ret; 301 } 302 303 return ret; 304 } 305 306 static int imx290_set_register_array(struct imx290 *imx290, 307 const struct imx290_regval *settings, 308 unsigned int num_settings) 309 { 310 unsigned int i; 311 int ret; 312 313 for (i = 0; i < num_settings; ++i, ++settings) { 314 ret = imx290_write_reg(imx290, settings->reg, settings->val); 315 if (ret < 0) 316 return ret; 317 318 /* Settle time is 10ms for all registers */ 319 msleep(10); 320 } 321 322 return 0; 323 } 324 325 static int imx290_write_buffered_reg(struct imx290 *imx290, u16 address_low, 326 u8 nr_regs, u32 value) 327 { 328 unsigned int i; 329 int ret; 330 331 ret = imx290_write_reg(imx290, IMX290_REGHOLD, 0x01); 332 if (ret) { 333 dev_err(imx290->dev, "Error setting hold register\n"); 334 return ret; 335 } 336 337 for (i = 0; i < nr_regs; i++) { 338 ret = imx290_write_reg(imx290, address_low + i, 339 (u8)(value >> (i * 8))); 340 if (ret) { 341 dev_err(imx290->dev, "Error writing buffered registers\n"); 342 return ret; 343 } 344 } 345 346 ret = imx290_write_reg(imx290, IMX290_REGHOLD, 0x00); 347 if (ret) { 348 dev_err(imx290->dev, "Error setting hold register\n"); 349 return ret; 350 } 351 352 return ret; 353 } 354 355 static int imx290_set_gain(struct imx290 *imx290, u32 value) 356 { 357 int ret; 358 359 ret = imx290_write_buffered_reg(imx290, IMX290_GAIN, 1, value); 360 if (ret) 361 dev_err(imx290->dev, "Unable to write gain\n"); 362 363 return ret; 364 } 365 366 /* Stop streaming */ 367 static int imx290_stop_streaming(struct imx290 *imx290) 368 { 369 int ret; 370 371 ret = imx290_write_reg(imx290, IMX290_STANDBY, 0x01); 372 if (ret < 0) 373 return ret; 374 375 msleep(30); 376 377 return imx290_write_reg(imx290, IMX290_XMSTA, 0x01); 378 } 379 380 static int imx290_set_ctrl(struct v4l2_ctrl *ctrl) 381 { 382 struct imx290 *imx290 = container_of(ctrl->handler, 383 struct imx290, ctrls); 384 int ret = 0; 385 386 /* V4L2 controls values will be applied only when power is already up */ 387 if (!pm_runtime_get_if_in_use(imx290->dev)) 388 return 0; 389 390 switch (ctrl->id) { 391 case V4L2_CID_GAIN: 392 ret = imx290_set_gain(imx290, ctrl->val); 393 break; 394 default: 395 ret = -EINVAL; 396 break; 397 } 398 399 pm_runtime_put(imx290->dev); 400 401 return ret; 402 } 403 404 static const struct v4l2_ctrl_ops imx290_ctrl_ops = { 405 .s_ctrl = imx290_set_ctrl, 406 }; 407 408 static int imx290_enum_mbus_code(struct v4l2_subdev *sd, 409 struct v4l2_subdev_pad_config *cfg, 410 struct v4l2_subdev_mbus_code_enum *code) 411 { 412 if (code->index >= ARRAY_SIZE(imx290_formats)) 413 return -EINVAL; 414 415 code->code = imx290_formats[code->index].code; 416 417 return 0; 418 } 419 420 static int imx290_get_fmt(struct v4l2_subdev *sd, 421 struct v4l2_subdev_pad_config *cfg, 422 struct v4l2_subdev_format *fmt) 423 { 424 struct imx290 *imx290 = to_imx290(sd); 425 struct v4l2_mbus_framefmt *framefmt; 426 427 mutex_lock(&imx290->lock); 428 429 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) 430 framefmt = v4l2_subdev_get_try_format(&imx290->sd, cfg, 431 fmt->pad); 432 else 433 framefmt = &imx290->current_format; 434 435 fmt->format = *framefmt; 436 437 mutex_unlock(&imx290->lock); 438 439 return 0; 440 } 441 442 static int imx290_set_fmt(struct v4l2_subdev *sd, 443 struct v4l2_subdev_pad_config *cfg, 444 struct v4l2_subdev_format *fmt) 445 { 446 struct imx290 *imx290 = to_imx290(sd); 447 const struct imx290_mode *mode; 448 struct v4l2_mbus_framefmt *format; 449 unsigned int i; 450 451 mutex_lock(&imx290->lock); 452 453 mode = v4l2_find_nearest_size(imx290_modes, 454 ARRAY_SIZE(imx290_modes), 455 width, height, 456 fmt->format.width, fmt->format.height); 457 458 fmt->format.width = mode->width; 459 fmt->format.height = mode->height; 460 461 for (i = 0; i < ARRAY_SIZE(imx290_formats); i++) 462 if (imx290_formats[i].code == fmt->format.code) 463 break; 464 465 if (i >= ARRAY_SIZE(imx290_formats)) 466 i = 0; 467 468 fmt->format.code = imx290_formats[i].code; 469 fmt->format.field = V4L2_FIELD_NONE; 470 471 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 472 format = v4l2_subdev_get_try_format(sd, cfg, fmt->pad); 473 } else { 474 format = &imx290->current_format; 475 __v4l2_ctrl_s_ctrl(imx290->link_freq, mode->link_freq_index); 476 __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate, mode->pixel_rate); 477 478 imx290->current_mode = mode; 479 } 480 481 *format = fmt->format; 482 483 mutex_unlock(&imx290->lock); 484 485 return 0; 486 } 487 488 static int imx290_entity_init_cfg(struct v4l2_subdev *subdev, 489 struct v4l2_subdev_pad_config *cfg) 490 { 491 struct v4l2_subdev_format fmt = { 0 }; 492 493 fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 494 fmt.format.width = 1920; 495 fmt.format.height = 1080; 496 497 imx290_set_fmt(subdev, cfg, &fmt); 498 499 return 0; 500 } 501 502 static int imx290_write_current_format(struct imx290 *imx290, 503 struct v4l2_mbus_framefmt *format) 504 { 505 int ret; 506 507 switch (format->code) { 508 case MEDIA_BUS_FMT_SRGGB10_1X10: 509 ret = imx290_set_register_array(imx290, imx290_10bit_settings, 510 ARRAY_SIZE( 511 imx290_10bit_settings)); 512 if (ret < 0) { 513 dev_err(imx290->dev, "Could not set format registers\n"); 514 return ret; 515 } 516 break; 517 default: 518 dev_err(imx290->dev, "Unknown pixel format\n"); 519 return -EINVAL; 520 } 521 522 return 0; 523 } 524 525 /* Start streaming */ 526 static int imx290_start_streaming(struct imx290 *imx290) 527 { 528 int ret; 529 530 /* Set init register settings */ 531 ret = imx290_set_register_array(imx290, imx290_global_init_settings, 532 ARRAY_SIZE( 533 imx290_global_init_settings)); 534 if (ret < 0) { 535 dev_err(imx290->dev, "Could not set init registers\n"); 536 return ret; 537 } 538 539 /* Set current frame format */ 540 ret = imx290_write_current_format(imx290, &imx290->current_format); 541 if (ret < 0) { 542 dev_err(imx290->dev, "Could not set frame format\n"); 543 return ret; 544 } 545 546 /* Apply default values of current mode */ 547 ret = imx290_set_register_array(imx290, imx290->current_mode->data, 548 imx290->current_mode->data_size); 549 if (ret < 0) { 550 dev_err(imx290->dev, "Could not set current mode\n"); 551 return ret; 552 } 553 554 /* Apply customized values from user */ 555 ret = v4l2_ctrl_handler_setup(imx290->sd.ctrl_handler); 556 if (ret) { 557 dev_err(imx290->dev, "Could not sync v4l2 controls\n"); 558 return ret; 559 } 560 561 ret = imx290_write_reg(imx290, IMX290_STANDBY, 0x00); 562 if (ret < 0) 563 return ret; 564 565 msleep(30); 566 567 /* Start streaming */ 568 return imx290_write_reg(imx290, IMX290_XMSTA, 0x00); 569 } 570 571 static int imx290_set_stream(struct v4l2_subdev *sd, int enable) 572 { 573 struct imx290 *imx290 = to_imx290(sd); 574 int ret = 0; 575 576 if (enable) { 577 ret = pm_runtime_get_sync(imx290->dev); 578 if (ret < 0) { 579 pm_runtime_put_noidle(imx290->dev); 580 goto unlock_and_return; 581 } 582 583 ret = imx290_start_streaming(imx290); 584 if (ret) { 585 dev_err(imx290->dev, "Start stream failed\n"); 586 pm_runtime_put(imx290->dev); 587 goto unlock_and_return; 588 } 589 } else { 590 imx290_stop_streaming(imx290); 591 pm_runtime_put(imx290->dev); 592 } 593 594 unlock_and_return: 595 596 return ret; 597 } 598 599 static int imx290_get_regulators(struct device *dev, struct imx290 *imx290) 600 { 601 unsigned int i; 602 603 for (i = 0; i < IMX290_NUM_SUPPLIES; i++) 604 imx290->supplies[i].supply = imx290_supply_name[i]; 605 606 return devm_regulator_bulk_get(dev, IMX290_NUM_SUPPLIES, 607 imx290->supplies); 608 } 609 610 static int imx290_power_on(struct device *dev) 611 { 612 struct i2c_client *client = to_i2c_client(dev); 613 struct v4l2_subdev *sd = i2c_get_clientdata(client); 614 struct imx290 *imx290 = to_imx290(sd); 615 int ret; 616 617 ret = clk_prepare_enable(imx290->xclk); 618 if (ret) { 619 dev_err(imx290->dev, "Failed to enable clock\n"); 620 return ret; 621 } 622 623 ret = regulator_bulk_enable(IMX290_NUM_SUPPLIES, imx290->supplies); 624 if (ret) { 625 dev_err(imx290->dev, "Failed to enable regulators\n"); 626 clk_disable_unprepare(imx290->xclk); 627 return ret; 628 } 629 630 usleep_range(1, 2); 631 gpiod_set_value_cansleep(imx290->rst_gpio, 1); 632 usleep_range(30000, 31000); 633 634 return 0; 635 } 636 637 static int imx290_power_off(struct device *dev) 638 { 639 struct i2c_client *client = to_i2c_client(dev); 640 struct v4l2_subdev *sd = i2c_get_clientdata(client); 641 struct imx290 *imx290 = to_imx290(sd); 642 643 clk_disable_unprepare(imx290->xclk); 644 gpiod_set_value_cansleep(imx290->rst_gpio, 0); 645 regulator_bulk_disable(IMX290_NUM_SUPPLIES, imx290->supplies); 646 647 return 0; 648 } 649 650 static const struct dev_pm_ops imx290_pm_ops = { 651 SET_RUNTIME_PM_OPS(imx290_power_on, imx290_power_off, NULL) 652 }; 653 654 static const struct v4l2_subdev_video_ops imx290_video_ops = { 655 .s_stream = imx290_set_stream, 656 }; 657 658 static const struct v4l2_subdev_pad_ops imx290_pad_ops = { 659 .init_cfg = imx290_entity_init_cfg, 660 .enum_mbus_code = imx290_enum_mbus_code, 661 .get_fmt = imx290_get_fmt, 662 .set_fmt = imx290_set_fmt, 663 }; 664 665 static const struct v4l2_subdev_ops imx290_subdev_ops = { 666 .video = &imx290_video_ops, 667 .pad = &imx290_pad_ops, 668 }; 669 670 static const struct media_entity_operations imx290_subdev_entity_ops = { 671 .link_validate = v4l2_subdev_link_validate, 672 }; 673 674 static int imx290_probe(struct i2c_client *client) 675 { 676 struct device *dev = &client->dev; 677 struct fwnode_handle *endpoint; 678 struct imx290 *imx290; 679 u32 xclk_freq; 680 int ret; 681 682 imx290 = devm_kzalloc(dev, sizeof(*imx290), GFP_KERNEL); 683 if (!imx290) 684 return -ENOMEM; 685 686 imx290->dev = dev; 687 imx290->regmap = devm_regmap_init_i2c(client, &imx290_regmap_config); 688 if (IS_ERR(imx290->regmap)) { 689 dev_err(dev, "Unable to initialize I2C\n"); 690 return -ENODEV; 691 } 692 693 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL); 694 if (!endpoint) { 695 dev_err(dev, "Endpoint node not found\n"); 696 return -EINVAL; 697 } 698 699 ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &imx290->ep); 700 fwnode_handle_put(endpoint); 701 if (ret) { 702 dev_err(dev, "Parsing endpoint node failed\n"); 703 goto free_err; 704 } 705 706 if (!imx290->ep.nr_of_link_frequencies) { 707 dev_err(dev, "link-frequency property not found in DT\n"); 708 ret = -EINVAL; 709 goto free_err; 710 } 711 712 if (imx290->ep.link_frequencies[0] != IMX290_DEFAULT_LINK_FREQ) { 713 dev_err(dev, "Unsupported link frequency\n"); 714 ret = -EINVAL; 715 goto free_err; 716 } 717 718 /* Only CSI2 is supported for now */ 719 if (imx290->ep.bus_type != V4L2_MBUS_CSI2_DPHY) { 720 dev_err(dev, "Unsupported bus type, should be CSI2\n"); 721 ret = -EINVAL; 722 goto free_err; 723 } 724 725 /* Set default mode to max resolution */ 726 imx290->current_mode = &imx290_modes[0]; 727 728 /* get system clock (xclk) */ 729 imx290->xclk = devm_clk_get(dev, "xclk"); 730 if (IS_ERR(imx290->xclk)) { 731 dev_err(dev, "Could not get xclk"); 732 ret = PTR_ERR(imx290->xclk); 733 goto free_err; 734 } 735 736 ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", 737 &xclk_freq); 738 if (ret) { 739 dev_err(dev, "Could not get xclk frequency\n"); 740 goto free_err; 741 } 742 743 /* external clock must be 37.125 MHz */ 744 if (xclk_freq != 37125000) { 745 dev_err(dev, "External clock frequency %u is not supported\n", 746 xclk_freq); 747 ret = -EINVAL; 748 goto free_err; 749 } 750 751 ret = clk_set_rate(imx290->xclk, xclk_freq); 752 if (ret) { 753 dev_err(dev, "Could not set xclk frequency\n"); 754 goto free_err; 755 } 756 757 ret = imx290_get_regulators(dev, imx290); 758 if (ret < 0) { 759 dev_err(dev, "Cannot get regulators\n"); 760 goto free_err; 761 } 762 763 imx290->rst_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS); 764 if (IS_ERR(imx290->rst_gpio)) { 765 dev_err(dev, "Cannot get reset gpio\n"); 766 ret = PTR_ERR(imx290->rst_gpio); 767 goto free_err; 768 } 769 770 mutex_init(&imx290->lock); 771 772 v4l2_ctrl_handler_init(&imx290->ctrls, 3); 773 774 v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, 775 V4L2_CID_GAIN, 0, 72, 1, 0); 776 imx290->link_freq = 777 v4l2_ctrl_new_int_menu(&imx290->ctrls, 778 &imx290_ctrl_ops, 779 V4L2_CID_LINK_FREQ, 780 ARRAY_SIZE(imx290_link_freq) - 1, 781 0, imx290_link_freq); 782 if (imx290->link_freq) 783 imx290->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 784 785 imx290->pixel_rate = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, 786 V4L2_CID_PIXEL_RATE, 1, 787 INT_MAX, 1, 788 imx290_modes[0].pixel_rate); 789 790 imx290->sd.ctrl_handler = &imx290->ctrls; 791 792 if (imx290->ctrls.error) { 793 dev_err(dev, "Control initialization error %d\n", 794 imx290->ctrls.error); 795 ret = imx290->ctrls.error; 796 goto free_ctrl; 797 } 798 799 v4l2_i2c_subdev_init(&imx290->sd, client, &imx290_subdev_ops); 800 imx290->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 801 imx290->sd.dev = &client->dev; 802 imx290->sd.entity.ops = &imx290_subdev_entity_ops; 803 imx290->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 804 805 imx290->pad.flags = MEDIA_PAD_FL_SOURCE; 806 ret = media_entity_pads_init(&imx290->sd.entity, 1, &imx290->pad); 807 if (ret < 0) { 808 dev_err(dev, "Could not register media entity\n"); 809 goto free_ctrl; 810 } 811 812 ret = v4l2_async_register_subdev(&imx290->sd); 813 if (ret < 0) { 814 dev_err(dev, "Could not register v4l2 device\n"); 815 goto free_entity; 816 } 817 818 /* Power on the device to match runtime PM state below */ 819 ret = imx290_power_on(dev); 820 if (ret < 0) { 821 dev_err(dev, "Could not power on the device\n"); 822 goto free_entity; 823 } 824 825 pm_runtime_set_active(dev); 826 pm_runtime_enable(dev); 827 pm_runtime_idle(dev); 828 829 v4l2_fwnode_endpoint_free(&imx290->ep); 830 831 return 0; 832 833 free_entity: 834 media_entity_cleanup(&imx290->sd.entity); 835 free_ctrl: 836 v4l2_ctrl_handler_free(&imx290->ctrls); 837 mutex_destroy(&imx290->lock); 838 free_err: 839 v4l2_fwnode_endpoint_free(&imx290->ep); 840 841 return ret; 842 } 843 844 static int imx290_remove(struct i2c_client *client) 845 { 846 struct v4l2_subdev *sd = i2c_get_clientdata(client); 847 struct imx290 *imx290 = to_imx290(sd); 848 849 v4l2_async_unregister_subdev(sd); 850 media_entity_cleanup(&sd->entity); 851 v4l2_ctrl_handler_free(sd->ctrl_handler); 852 853 mutex_destroy(&imx290->lock); 854 855 pm_runtime_disable(imx290->dev); 856 if (!pm_runtime_status_suspended(imx290->dev)) 857 imx290_power_off(imx290->dev); 858 pm_runtime_set_suspended(imx290->dev); 859 860 return 0; 861 } 862 863 static const struct of_device_id imx290_of_match[] = { 864 { .compatible = "sony,imx290" }, 865 { /* sentinel */ } 866 }; 867 MODULE_DEVICE_TABLE(of, imx290_of_match); 868 869 static struct i2c_driver imx290_i2c_driver = { 870 .probe_new = imx290_probe, 871 .remove = imx290_remove, 872 .driver = { 873 .name = "imx290", 874 .pm = &imx290_pm_ops, 875 .of_match_table = of_match_ptr(imx290_of_match), 876 }, 877 }; 878 879 module_i2c_driver(imx290_i2c_driver); 880 881 MODULE_DESCRIPTION("Sony IMX290 CMOS Image Sensor Driver"); 882 MODULE_AUTHOR("FRAMOS GmbH"); 883 MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>"); 884 MODULE_LICENSE("GPL v2"); 885